weifanglab a6cf67cc6b refactor: use slices.Contains to simplify code (#10702) ...

Signed-off-by: weifanglab <weifanglab@outlook.com>

2026-07-06 19:33:28 +02:00

..

clinfo_test.go

fix(intel): VRAM detection (#9944)

2026-05-25 09:29:00 +02:00

clinfo.go

refactor: use slices.Contains to simplify code (#10702)

2026-07-06 19:33:28 +02:00

computecap_internal_test.go

feat(config): hardware-tuned defaults — Blackwell batch + VRAM-scaled concurrency (#10411)

2026-06-20 14:45:59 +02:00

cpu.go

feat: add distributed mode (#9124)

2026-03-30 00:47:27 +02:00

drmfdinfo_test.go

fix(intel): VRAM detection (#9944)

2026-05-25 09:29:00 +02:00

drmfdinfo.go

fix(intel): VRAM detection (#9944)

2026-05-25 09:29:00 +02:00

gpu.go

fix(config): per-device VRAM headroom for Blackwell defaults (#10485) (#10494)

2026-06-25 00:07:48 +02:00

memory_total_test.go

fix(xsysinfo): container-aware total RAM detection (cgroup/lxcfs) (#8059) (#10288)

2026-06-13 18:13:06 +02:00

memory_total.go

fix(xsysinfo): container-aware total RAM detection (cgroup/lxcfs) (#8059) (#10288)

2026-06-13 18:13:06 +02:00

memory.go

fix(xsysinfo): container-aware total RAM detection (cgroup/lxcfs) (#8059) (#10288)

2026-06-13 18:13:06 +02:00

minvram_internal_test.go

fix(config): per-device VRAM headroom for Blackwell defaults (#10485) (#10494)

2026-06-25 00:07:48 +02:00

xsysinfo_suite_test.go

fix(intel): VRAM detection (#9944)

2026-05-25 09:29:00 +02:00