* Fix of the issue that source clock for PWM
module was improperly assumed to be derived
from AHB_CLK, while in reality it is
derived from IPG_CLK, what resulted in
module generating signal with 4 times
lower frequency than the configured
one.
* Cleanups.
* Adding document describing how to use logger
* Adjusting logs to follow a new guide
* Change order in log header:
line number is now before function name
Split module-utils into smaller components for better dependency
management. Fix many dependencies throughout the project.
Signed-off-by: Marcin Smoczyński <smoczynski.marcin@gmail.com>
