mirror of
https://github.com/mudita/MuditaOS.git
synced 2025-12-23 22:17:57 -05:00
454 lines
14 KiB
Plaintext
454 lines
14 KiB
Plaintext
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//
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void Load_Dcdc_Trim()
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{
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unsigned int ocotp_base;
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unsigned int dcdc_base;
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unsigned int ocotp_fuse_bank0_base;
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unsigned int reg;
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unsigned int index;
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unsigned int trim_value;
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unsigned int dcdc_trim_loaded;
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ocotp_base = 0x401F4000;
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ocotp_fuse_bank0_base = 0x401F4000 + 0x400;
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dcdc_base = 0x40080000;
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dcdc_trim_loaded = 0;
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reg = Target.ReadU32(ocotp_fuse_bank0_base + 0x90);
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if (reg & (1<<10))
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{
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trim_value = (reg & (0x1F << 11)) >> 11;
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reg = (Target.ReadU32(dcdc_base + 0x4) & ~(0x1F << 24)) | (trim_value << 24);
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Target.WriteU32(dcdc_base + 0x4, reg);
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dcdc_trim_loaded = 1;
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}
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// DCDC_VOLT_CHANG_EN
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reg = Target.ReadU32(ocotp_fuse_bank0_base + 0x80);
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if (reg & (1<<30))
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{
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index = (reg & (3 << 28)) >> 28;
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if (index < 4)
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{
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reg = (Target.ReadU32(dcdc_base + 0xC) & ~(0x1F)) | (0xF + index);
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Target.WriteU32(dcdc_base + 0xC, reg);
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dcdc_trim_loaded = 1;
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}
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}
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if (dcdc_trim_loaded)
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{
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// delay 1ms for dcdc to get stable
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Util.Sleep(1);
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Util.Log("DCDC trim value loaded.");
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}
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}
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void Clock_Init()
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{
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// Enable all clocks
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Target.WriteU32(0x400FC068,0xffffffff);
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Target.WriteU32(0x400FC06C,0xffffffff);
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Target.WriteU32(0x400FC070,0xffffffff);
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Target.WriteU32(0x400FC074,0xffffffff);
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Target.WriteU32(0x400FC078,0xffffffff);
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Target.WriteU32(0x400FC07C,0xffffffff);
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Target.WriteU32(0x400FC080,0xffffffff);
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Target.WriteU32(0x400D8030,0x00002001);
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Target.WriteU32(0x400D8100,0x001d0000);
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Target.WriteU32(0x400FC014,0x00010D40);
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Util.Log("Clock Init Done");
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}
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void SDRAM_WaitIpCmdDone(void)
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{
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unsigned int reg;
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do
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{
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reg = Target.ReadU32(0x402F003C);
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}while((reg & 0x3) == 0);
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Target.WriteU32(0x402F003C,0x00000003); // clear IPCMDERR and IPCMDDONE bits
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}
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void SDRAM_Init() {
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// Config IOMUX for SDRAM
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Target.WriteU32(0x401F8014,0x00000000); // EMC_00
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Target.WriteU32(0x401F8018,0x00000000); // EMC_01
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Target.WriteU32(0x401F801C,0x00000000); // EMC_02
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Target.WriteU32(0x401F8020,0x00000000); // EMC_03
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Target.WriteU32(0x401F8024,0x00000000); // EMC_04
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Target.WriteU32(0x401F8028,0x00000000); // EMC_05
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Target.WriteU32(0x401F802C,0x00000000); // EMC_06
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Target.WriteU32(0x401F8030,0x00000000); // EMC_07
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Target.WriteU32(0x401F8034,0x00000000); // EMC_08
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Target.WriteU32(0x401F8038,0x00000000); // EMC_09
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Target.WriteU32(0x401F803C,0x00000000); // EMC_10
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Target.WriteU32(0x401F8040,0x00000000); // EMC_11
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Target.WriteU32(0x401F8044,0x00000000); // EMC_12
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Target.WriteU32(0x401F8048,0x00000000); // EMC_13
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Target.WriteU32(0x401F804C,0x00000000); // EMC_14
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Target.WriteU32(0x401F8050,0x00000000); // EMC_15
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Target.WriteU32(0x401F8054,0x00000000); // EMC_16
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Target.WriteU32(0x401F8058,0x00000000); // EMC_17
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Target.WriteU32(0x401F805C,0x00000000); // EMC_18
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Target.WriteU32(0x401F8060,0x00000000); // EMC_19
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Target.WriteU32(0x401F8064,0x00000000); // EMC_20
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Target.WriteU32(0x401F8068,0x00000000); // EMC_21
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Target.WriteU32(0x401F806C,0x00000000); // EMC_22
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Target.WriteU32(0x401F8070,0x00000000); // EMC_23
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Target.WriteU32(0x401F8074,0x00000000); // EMC_24
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Target.WriteU32(0x401F8078,0x00000000); // EMC_25
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Target.WriteU32(0x401F807C,0x00000000); // EMC_26
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Target.WriteU32(0x401F8080,0x00000000); // EMC_27
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Target.WriteU32(0x401F8084,0x00000000); // EMC_28
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Target.WriteU32(0x401F8088,0x00000000); // EMC_29
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Target.WriteU32(0x401F808C,0x00000000); // EMC_30
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Target.WriteU32(0x401F8090,0x00000000); // EMC_31
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Target.WriteU32(0x401F8094,0x00000000); // EMC_32
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Target.WriteU32(0x401F8098,0x00000000); // EMC_33
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Target.WriteU32(0x401F809C,0x00000000); // EMC_34
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Target.WriteU32(0x401F80A0,0x00000000); // EMC_35
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Target.WriteU32(0x401F80A4,0x00000000); // EMC_36
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Target.WriteU32(0x401F80A8,0x00000000); // EMC_37
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Target.WriteU32(0x401F80AC,0x00000000); // EMC_38
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Target.WriteU32(0x401F80B0,0x00000010); // EMC_39, DQS PIN, enable SION
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Target.WriteU32(0x401F80B4,0x00000000); // EMC_40
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Target.WriteU32(0x401F80B8,0x00000000); // EMC_41
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// PAD ctrl
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// drive strength = 0x7 to increase drive strength
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// otherwise the data7 bit may fail.
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Target.WriteU32(0x401F8204,0x000110F9); // EMC_00
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Target.WriteU32(0x401F8208,0x000110F9); // EMC_01
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Target.WriteU32(0x401F820C,0x000110F9); // EMC_02
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Target.WriteU32(0x401F8210,0x000110F9); // EMC_03
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Target.WriteU32(0x401F8214,0x000110F9); // EMC_04
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Target.WriteU32(0x401F8218,0x000110F9); // EMC_05
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Target.WriteU32(0x401F821C,0x000110F9); // EMC_06
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Target.WriteU32(0x401F8220,0x000110F9); // EMC_07
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Target.WriteU32(0x401F8224,0x000110F9); // EMC_08
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Target.WriteU32(0x401F8228,0x000110F9); // EMC_09
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Target.WriteU32(0x401F822C,0x000110F9); // EMC_10
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Target.WriteU32(0x401F8230,0x000110F9); // EMC_11
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Target.WriteU32(0x401F8234,0x000110F9); // EMC_12
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Target.WriteU32(0x401F8238,0x000110F9); // EMC_13
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Target.WriteU32(0x401F823C,0x000110F9); // EMC_14
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Target.WriteU32(0x401F8240,0x000110F9); // EMC_15
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Target.WriteU32(0x401F8244,0x000110F9); // EMC_16
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Target.WriteU32(0x401F8248,0x000110F9); // EMC_17
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Target.WriteU32(0x401F824C,0x000110F9); // EMC_18
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Target.WriteU32(0x401F8250,0x000110F9); // EMC_19
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Target.WriteU32(0x401F8254,0x000110F9); // EMC_20
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Target.WriteU32(0x401F8258,0x000110F9); // EMC_21
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Target.WriteU32(0x401F825C,0x000110F9); // EMC_22
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Target.WriteU32(0x401F8260,0x000110F9); // EMC_23
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Target.WriteU32(0x401F8264,0x000110F9); // EMC_24
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Target.WriteU32(0x401F8268,0x000110F9); // EMC_25
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Target.WriteU32(0x401F826C,0x000110F9); // EMC_26
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Target.WriteU32(0x401F8270,0x000110F9); // EMC_27
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Target.WriteU32(0x401F8274,0x000110F9); // EMC_28
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Target.WriteU32(0x401F8278,0x000110F9); // EMC_29
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Target.WriteU32(0x401F827C,0x000110F9); // EMC_30
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Target.WriteU32(0x401F8280,0x000110F9); // EMC_31
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Target.WriteU32(0x401F8284,0x000110F9); // EMC_32
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Target.WriteU32(0x401F8288,0x000110F9); // EMC_33
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Target.WriteU32(0x401F828C,0x000110F9); // EMC_34
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Target.WriteU32(0x401F8290,0x000110F9); // EMC_35
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Target.WriteU32(0x401F8294,0x000110F9); // EMC_36
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Target.WriteU32(0x401F8298,0x000110F9); // EMC_37
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Target.WriteU32(0x401F829C,0x000110F9); // EMC_38
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Target.WriteU32(0x401F82A0,0x000110F9); // EMC_39
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Target.WriteU32(0x401F82A4,0x000110F9); // EMC_40
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Target.WriteU32(0x401F82A8,0x000110F9); // EMC_41
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// Config SDR Controller Registers/
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Target.WriteU32(0x402F0000,0x10000004); // MCR
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Target.WriteU32(0x402F0008,0x00030524); // BMCR0
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Target.WriteU32(0x402F000C,0x06030524); // BMCR1
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Target.WriteU32(0x402F0010,0x80000019); // BR0, 16MB
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Target.WriteU32(0x402F0040,0x00000F31); // SDRAMCR0
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Target.WriteU32(0x402F0044,0x00652922); // SDRAMCR1
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Target.WriteU32(0x402F0048,0x000a0b0d); // SDRAMCR2
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Target.WriteU32(0x402F004C,0x0f0f0a00); // SDRAMCR3
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Target.WriteU32(0x402F0090,0x80000000); // IPCR0
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Target.WriteU32(0x402F0094,0x00000002); // IPCR1
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Target.WriteU32(0x402F0098,0x00000000); // IPCR2
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Target.WriteU32(0x402F009C,0xA55A000F); // IPCMD, SD_CC_IPREA
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SDRAM_WaitIpCmdDone();
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Target.WriteU32(0x402F009C,0xA55A000C); // SD_CC_IAF
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SDRAM_WaitIpCmdDone();
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Target.WriteU32(0x402F009C,0xA55A000C); // SD_CC_IAF
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SDRAM_WaitIpCmdDone();
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Target.WriteU32(0x402F00A0,0x00000033); // IPTXDAT
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Target.WriteU32(0x402F009C,0xA55A000A); // SD_CC_IMS
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SDRAM_WaitIpCmdDone();
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Target.WriteU32(0x402F004C,0x08080A01 ); // enable sdram self refresh again after initialization done.
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Util.Log("SDRAM Init Done");
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}
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void INTRAM_Init() {
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unsigned int gpr14_addr;
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unsigned int gpr16_addr;
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unsigned int gpr17_addr;
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unsigned int ret;
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gpr14_addr = 0x400AC038;
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gpr16_addr = 0x400AC040;
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gpr17_addr = 0x400AC044;
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ret = 0;
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// 448 KBytes of DTCM
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Target.WriteU32(gpr17_addr,0x5AAAAAAA);
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ret = Target.ReadU32(gpr16_addr);
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// Turn off DTCM
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//ret &= ~0x02;
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// Turn off ITCM
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ret &= ~0x01;
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Target.WriteU32(gpr16_addr,ret);
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// Configure DTCM/ITCM size
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ret = Target.ReadU32(gpr14_addr);
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// Mask ITCM/DTCM size bits
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ret &= ~0xFF0000;
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// Set DTCM size to 512KBytes
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ret |= 0xA00000;
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Target.WriteU32(gpr14_addr,ret);
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ret = Target.ReadU32(gpr16_addr);
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// FlexRAM_BANK_CFG_SEL
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ret &= ~0x04;
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ret |= 0x04;
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Target.WriteU32(gpr16_addr,ret);
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Util.Log("INTRAM Init Done");
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}
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/*********************************************************************
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*
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* OnProjectLoad
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*
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* Function description
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* Project load routine. Required.
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*
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**********************************************************************
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*/
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void OnProjectLoad (void) {
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//
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// Dialog-generated settings
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//
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Project.SetDevice ("MCIMXRT1051");
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Project.SetHostIF ("USB", "");
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Project.SetTargetIF ("SWD");
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Project.SetTIFSpeed ("1 MHz");
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Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd");
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Project.AddPathSubstitute ("/home/mati/Software/Mudita/git/PurePhone", "$(ProjectDir)");
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Project.SetOSPlugin("FreeRTOSPlugin");
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//
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// User settings
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//
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File.Open ("$(ProjectDir)/build/PurePhone.elf");
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}
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/*********************************************************************
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*
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* TargetReset
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*
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* Function description
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* Replaces the default target device reset routine. Optional.
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*
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* Notes
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* This example demonstrates the usage when
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* debugging a RAM program on a Cortex-M target device
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*
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**********************************************************************
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*/
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void TargetReset (void) {
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Exec.Reset();
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}
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/*********************************************************************
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*
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* BeforeTargetReset
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*
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* Function description
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* Event handler routine. Optional.
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*
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**********************************************************************
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*/
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void BeforeTargetReset (void) {
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}
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/*********************************************************************
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*
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* AfterTargetReset
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*
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* Function description
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* Event handler routine.
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* - Sets the PC register to program reset value.
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* - Sets the SP register to program reset value on Cortex-M.
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*
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**********************************************************************
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*/
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void AfterTargetReset (void) {
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Load_Dcdc_Trim();
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Clock_Init();
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SDRAM_Init();
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INTRAM_Init();
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}
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/*********************************************************************
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*
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* DebugStart
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*
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* Function description
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* Replaces the default debug session startup routine. Optional.
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*
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**********************************************************************
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*/
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//void DebugStart (void) {
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//}
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/*********************************************************************
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*
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* TargetConnect
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*
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* Function description
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* Replaces the default target IF connection routine. Optional.
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*
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**********************************************************************
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*/
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//void TargetConnect (void) {
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//}
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/*********************************************************************
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*
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* BeforeTargetConnect
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*
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* Function description
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* Event handler routine. Optional.
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*
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**********************************************************************
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*/
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//void BeforeTargetConnect (void) {
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//}
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/*********************************************************************
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*
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* AfterTargetConnect
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*
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* Function description
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* Event handler routine. Optional.
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*
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**********************************************************************
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*/
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//void AfterTargetConnect (void) {
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//}
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/*********************************************************************
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*
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* TargetDownload
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*
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* Function description
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* Replaces the default program download routine. Optional.
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*
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**********************************************************************
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*/
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//void TargetDownload (void) {
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//}
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/*********************************************************************
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*
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* BeforeTargetDownload
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*
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* Function description
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* Event handler routine. Optional.
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*
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**********************************************************************
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*/
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//void BeforeTargetDownload (void) {
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//}
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/*********************************************************************
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*
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* AfterTargetDownload
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*
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* Function description
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* Event handler routine.
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* - Sets the PC register to program reset value.
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* - Sets the SP register to program reset value on Cortex-M.
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*
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**********************************************************************
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*/
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void AfterTargetDownload (void) {
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unsigned int SP;
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unsigned int PC;
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unsigned int VectorTableAddr;
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VectorTableAddr = Elf.GetExprValue( "g_pfnVectors" );
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if (VectorTableAddr == 0xFFFFFFFF) {
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Util.Log("Project file error: failed to get program base");
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} else {
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SP = Target.ReadU32(VectorTableAddr);
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Target.SetReg("SP", SP);
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PC = Target.ReadU32(VectorTableAddr + 4);
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Target.SetReg("PC", PC);
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}
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}
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/*********************************************************************
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*
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* BeforeTargetDisconnect
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*
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* Function description
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* Event handler routine. Optional.
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*
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**********************************************************************
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*/
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//void BeforeTargetDisconnect (void) {
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//}
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/*********************************************************************
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*
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* AfterTargetDisconnect
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*
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* Function description
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* Event handler routine. Optional.
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*
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**********************************************************************
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*/
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//void AfterTargetDisconnect (void) {
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//}
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/*********************************************************************
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*
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* AfterTargetHalt
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*
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* Function description
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* Event handler routine. Optional.
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*
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**********************************************************************
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*/
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//void AfterTargetHalt (void) {
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//}
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