From cf01215aef09b70dd1ae7d9bb264f072a30e1dad Mon Sep 17 00:00:00 2001
From: Colin Lienard <colin.lienard87@gmail.com>
Date: Wed, 12 Aug 2026 15:32:20 +0200
Subject: [PATCH 001/215] vendor/sdl3: wasm foreign import library configurable

---
 vendor/sdl3/sdl3__foreign.odin | 6 +++++-
 vendor/sdl3/ttf/sdl3_ttf.odin  | 6 +++++-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/vendor/sdl3/sdl3__foreign.odin b/vendor/sdl3/sdl3__foreign.odin
index 16ccdd9ec..844b1a318 100644
--- a/vendor/sdl3/sdl3__foreign.odin
+++ b/vendor/sdl3/sdl3__foreign.odin
@@ -1,6 +1,10 @@
 package sdl3
 
-when ODIN_OS == .Windows {
+SDL3_WASM_LIB :: #config(SDL3_WASM_LIB, "env.o")
+
+when ODIN_ARCH == .wasm32 || ODIN_ARCH == .wasm64p32 {
+	@(export) foreign import lib { SDL3_WASM_LIB }
+} else when ODIN_OS == .Windows {
 	@(export) foreign import lib { "SDL3.lib" }
 } else {
 	@(export) foreign import lib { "system:SDL3" }
diff --git a/vendor/sdl3/ttf/sdl3_ttf.odin b/vendor/sdl3/ttf/sdl3_ttf.odin
index 10d313fbb..511d527c4 100644
--- a/vendor/sdl3/ttf/sdl3_ttf.odin
+++ b/vendor/sdl3/ttf/sdl3_ttf.odin
@@ -4,7 +4,11 @@ package sdl3_ttf
 import "core:c"
 import SDL "vendor:sdl3"
 
-when ODIN_OS == .Windows {
+SDL3_TTF_WASM_LIB :: #config(SDL3_TTF_WASM_LIB, "env.o")
+
+when ODIN_ARCH == .wasm32 || ODIN_ARCH == .wasm64p32 {
+	foreign import lib { SDL3_TTF_WASM_LIB }
+} else when ODIN_OS == .Windows {
 	foreign import lib "SDL3_ttf.lib"
 } else {
 	foreign import lib "system:SDL3_ttf"

From 7e6d9359d1361a0eff07a821e01658d7f445999b Mon Sep 17 00:00:00 2001
From: Jan Go <janemgo86@gmail.com>
Date: Sun, 30 Aug 2026 19:42:31 +0800
Subject: [PATCH 002/215] Document all public procs in core:sort

---
 core/sort/sort.odin | 750 +++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 748 insertions(+), 2 deletions(-)

diff --git a/core/sort/sort.odin b/core/sort/sort.odin
index 30abc5336..69f5484ba 100644
--- a/core/sort/sort.odin
+++ b/core/sort/sort.odin
@@ -7,6 +7,17 @@ import "base:intrinsics"
 _ :: intrinsics
 ORD :: intrinsics.type_is_ordered
 
+/*
+A generic interface describing a sequence of elements that can be sorted.
+
+It provides the operations the sorting procedures use to inspect and reorder
+the elements: `len` reports the number of elements, `less` compares two
+elements, and `swap` exchanges two elements. The underlying data lives in
+`collection`.
+
+Use `slice_interface` to obtain an `Interface` for a slice, or
+`reverse_interface` to wrap an `Interface` so that it is ordered in reverse.
+*/
 Interface :: struct {
 	len:  proc(it: Interface) -> int,
 	less: proc(it: Interface, i, j: int) -> bool,
@@ -14,8 +25,30 @@ Interface :: struct {
 	collection: rawptr,
 }
 
-// sort sorts an Interface
-// This sort is not guaranteed to be stable
+/*
+Sorts the elements of an `Interface` in place.
+
+This sort is not guaranteed to be stable.
+
+Inputs:
+- it: The `Interface` to sort.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	sort_example :: proc() {
+		data := []int{5, 2, 8, 1, 9}
+		sort.sort(sort.slice_interface(&data))
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 2, 5, 8, 9]
+
+*/
 sort :: proc(it: Interface) {
 	max_depth :: proc(n: int) -> int { // 2*ceil(log2(n+1))
 		depth: int
@@ -29,6 +62,38 @@ sort :: proc(it: Interface) {
 	_quick_sort(it, 0, n, max_depth(n))
 }
 
+/*
+Creates an `Interface` over the given slice of ordered elements, for use with
+the sorting procedures.
+
+The elements are compared with the `<` operator, so the resulting sort is in
+ascending order.
+
+Inputs:
+- s: A pointer to the slice to wrap.
+
+Returns:
+- An `Interface` that describes the elements of `s`.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	slice_interface_example :: proc() {
+		data := []int{3, 1, 2}
+		it := sort.slice_interface(&data)
+		fmt.println(sort.is_sorted(it))
+		sort.sort(it)
+		fmt.println(data)
+	}
+
+Output:
+
+	false
+	[1, 2, 3]
+
+*/
 slice_interface :: proc(s: ^$T/[]$E) -> Interface where ORD(E) {
 	return Interface{
 		collection = rawptr(s),
@@ -47,6 +112,33 @@ slice_interface :: proc(s: ^$T/[]$E) -> Interface where ORD(E) {
 	}
 }
 
+/*
+Wraps an `Interface` so that the ordering is reversed, making the sorting
+procedures sort the elements in descending order.
+
+Inputs:
+- it: A pointer to the `Interface` to reverse.
+
+Returns:
+- A new `Interface` that reverses the ordering of `it`.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	reverse_interface_example :: proc() {
+		data := []int{5, 2, 8}
+		s := sort.slice_interface(&data)
+		sort.sort(sort.reverse_interface(&s))
+		fmt.println(data)
+	}
+
+Output:
+
+	[8, 5, 2]
+
+*/
 reverse_interface :: proc(it: ^Interface) -> Interface {
 	return Interface{
 		collection = it,
@@ -66,11 +158,62 @@ reverse_interface :: proc(it: ^Interface) -> Interface {
 	}
 }
 
+/*
+Sorts the elements of an `Interface` in descending order, in place.
+
+This sort is not guaranteed to be stable.
+
+Inputs:
+- it: The `Interface` to sort.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	reverse_sort_example :: proc() {
+		data := []int{5, 2, 8, 1}
+		sort.reverse_sort(sort.slice_interface(&data))
+		fmt.println(data)
+	}
+
+Output:
+
+	[8, 5, 2, 1]
+
+*/
 reverse_sort :: proc(it: Interface) {
 	it := it
 	sort(reverse_interface(&it))
 }
 
+/*
+Reports whether the elements of an `Interface` are in ascending order.
+
+Inputs:
+- it: The `Interface` to check.
+
+Returns:
+- `true` if the elements are sorted in ascending order, `false` otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	is_sorted_example :: proc() {
+		a := []int{1, 2, 3}
+		b := []int{3, 1, 2}
+		fmt.println(sort.is_sorted(sort.slice_interface(&a)))
+		fmt.println(sort.is_sorted(sort.slice_interface(&b)))
+	}
+
+Output:
+
+	true
+	false
+
+*/
 is_sorted :: proc(it: Interface) -> bool {
 	n := it->len()
 	for i := n-1; i > 0; i -= 1 {
@@ -82,12 +225,64 @@ is_sorted :: proc(it: Interface) -> bool {
 }
 
 
+/*
+Swaps `n` elements beginning at index `a` with the `n` elements beginning at
+index `b`.
+
+Inputs:
+- it: The `Interface`.
+- a: Start index of the first range to swap.
+- b: Start index of the second range to swap.
+- n: The number of elements to swap.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	swap_range_example :: proc() {
+		data := []int{1, 2, 3, 4}
+		sort.swap_range(sort.slice_interface(&data), 0, 2, 2)
+		fmt.println(data)
+	}
+
+Output:
+
+	[3, 4, 1, 2]
+
+*/
 swap_range :: proc(it: Interface, a, b, n: int) {
 	for i in 0..<n {
 		it->swap(a+i, b+i)
 	}
 }
 
+/*
+Rotates the elements of an `Interface` in the range `[a, b)` so that the
+element at index `m` becomes the first element of the range.
+
+Inputs:
+- it: The `Interface`.
+- a: Start index of the range.
+- m: The index whose element becomes first after the rotation.
+- b: Exclusive end index of the range.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	rotate_example :: proc() {
+		data := []int{0, 1, 2, 3}
+		sort.rotate(sort.slice_interface(&data), 0, 2, 4)
+		fmt.println(data)
+	}
+
+Output:
+
+	[2, 3, 0, 1]
+
+*/
 rotate :: proc(it: Interface, a, m, b: int) {
 	i := m - a
 	j := b - m
@@ -260,6 +455,33 @@ _insertion_sort :: proc(it: Interface, a, b: int) {
 	}
 }
 
+/*
+Sorts a slice in place using bubble sort, ordered by the given comparator.
+
+The comparator `f` is called with two elements and must return a negative
+number if the first is less than the second, `0` if they are equal, and a
+positive number otherwise.
+
+Inputs:
+- array: The slice to sort.
+- f: The comparator used to order the elements.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	bubble_sort_proc_example :: proc() {
+		data := []int{5, 3, 8, 1}
+		sort.bubble_sort_proc(data, sort.compare_ints)
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 3, 5, 8]
+
+*/
 bubble_sort_proc :: proc(array: $A/[]$T, f: proc(T, T) -> int) {
 	assert(f != nil)
 	count := len(array)
@@ -288,6 +510,29 @@ bubble_sort_proc :: proc(array: $A/[]$T, f: proc(T, T) -> int) {
 	}
 }
 
+/*
+Sorts a slice of ordered elements in place using bubble sort, in ascending
+order.
+
+Inputs:
+- array: The slice to sort.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	bubble_sort_example :: proc() {
+		data := []int{5, 3, 8, 1}
+		sort.bubble_sort(data)
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 3, 5, 8]
+
+*/
 bubble_sort :: proc(array: $A/[]$T) where intrinsics.type_is_ordered(T) {
 	count := len(array)
 
@@ -315,6 +560,33 @@ bubble_sort :: proc(array: $A/[]$T) where intrinsics.type_is_ordered(T) {
 	}
 }
 
+/*
+Sorts a slice in place using quick sort, ordered by the given comparator.
+
+The comparator `f` is called with two elements and must return a negative
+number if the first is less than the second, `0` if they are equal, and a
+positive number otherwise.
+
+Inputs:
+- array: The slice to sort.
+- f: The comparator used to order the elements.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	quick_sort_proc_example :: proc() {
+		data := []int{5, 3, 8, 1}
+		sort.quick_sort_proc(data, sort.compare_ints)
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 3, 5, 8]
+
+*/
 quick_sort_proc :: proc(array: $A/[]$T, f: proc(T, T) -> int) {
 	assert(f != nil)
 	a := array
@@ -343,6 +615,29 @@ quick_sort_proc :: proc(array: $A/[]$T, f: proc(T, T) -> int) {
 	quick_sort_proc(a[i:n], f)
 }
 
+/*
+Sorts a slice of ordered elements in place using quick sort, in ascending
+order.
+
+Inputs:
+- array: The slice to sort.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	quick_sort_example :: proc() {
+		data := []int{5, 3, 8, 1}
+		sort.quick_sort(data)
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 3, 5, 8]
+
+*/
 quick_sort :: proc(array: $A/[]$T) where intrinsics.type_is_ordered(T) {
 	a := array
 	n := len(a)
@@ -378,6 +673,33 @@ _log2 :: proc(x: int) -> int {
 	return res
 }
 
+/*
+Sorts a slice in place using merge sort, ordered by the given comparator.
+
+The comparator `f` is called with two elements and must return a negative
+number if the first is less than the second, `0` if they are equal, and a
+positive number otherwise.
+
+Inputs:
+- array: The slice to sort.
+- f: The comparator used to order the elements.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	merge_sort_proc_example :: proc() {
+		data := []int{5, 3, 8, 1}
+		sort.merge_sort_proc(data, sort.compare_ints)
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 3, 5, 8]
+
+*/
 merge_sort_proc :: proc(array: $A/[]$T, f: proc(T, T) -> int) {
 	merge :: proc(a: A, start, mid, end: int, f: proc(T, T) -> int) {
 		s, m := start, mid
@@ -419,6 +741,29 @@ merge_sort_proc :: proc(array: $A/[]$T, f: proc(T, T) -> int) {
 	internal_sort(array, 0, len(array)-1, f)
 }
 
+/*
+Sorts a slice of ordered elements in place using merge sort, in ascending
+order.
+
+Inputs:
+- array: The slice to sort.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	merge_sort_example :: proc() {
+		data := []int{5, 3, 8, 1}
+		sort.merge_sort(data)
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 3, 5, 8]
+
+*/
 merge_sort :: proc(array: $A/[]$T) where intrinsics.type_is_ordered(T) {
 	merge :: proc(a: A, start, mid, end: int) {
 		s, m := start, mid
@@ -460,6 +805,33 @@ merge_sort :: proc(array: $A/[]$T) where intrinsics.type_is_ordered(T) {
 	internal_sort(array, 0, len(array)-1)
 }
 
+/*
+Sorts a slice in place using heap sort, ordered by the given comparator.
+
+The comparator `f` is called with two elements and must return a negative
+number if the first is less than the second, `0` if they are equal, and a
+positive number otherwise.
+
+Inputs:
+- array: The slice to sort.
+- f: The comparator used to order the elements.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	heap_sort_proc_example :: proc() {
+		data := []int{5, 3, 8, 1}
+		sort.heap_sort_proc(data, sort.compare_ints)
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 3, 5, 8]
+
+*/
 heap_sort_proc :: proc(array: $A/[]$T, f: proc(T, T) -> int) {
 	sift_proc :: proc(a: A, pi: int, n: int, f: proc(T, T) -> int) #no_bounds_check {
 		p := pi
@@ -494,6 +866,29 @@ heap_sort_proc :: proc(array: $A/[]$T, f: proc(T, T) -> int) {
 	}
 }
 
+/*
+Sorts a slice of ordered elements in place using heap sort, in ascending
+order.
+
+Inputs:
+- array: The slice to sort.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	heap_sort_example :: proc() {
+		data := []int{5, 3, 8, 1}
+		sort.heap_sort(data)
+		fmt.println(data)
+	}
+
+Output:
+
+	[1, 3, 5, 8]
+
+*/
 heap_sort :: proc(array: $A/[]$T) where intrinsics.type_is_ordered(T) {
 	sift :: proc(a: A, pi: int, n: int) #no_bounds_check {
 		p := pi
@@ -528,6 +923,32 @@ heap_sort :: proc(array: $A/[]$T) where intrinsics.type_is_ordered(T) {
 	}
 }
 
+/*
+Compares two booleans for ordering, where `false` is considered less than
+`true`.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_bools_example :: proc() {
+		fmt.println(sort.compare_bools(false, true))
+		fmt.println(sort.compare_bools(true, true))
+		fmt.println(sort.compare_bools(true, false))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_bools :: proc(a, b: bool) -> int {
 	switch {
 	case !a && b: return -1
@@ -537,6 +958,31 @@ compare_bools :: proc(a, b: bool) -> int {
 }
 
 
+/*
+Compares two `int` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_ints_example :: proc() {
+		fmt.println(sort.compare_ints(1, 2))
+		fmt.println(sort.compare_ints(2, 2))
+		fmt.println(sort.compare_ints(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_ints :: proc(a, b: int) -> int {
 	switch delta := a - b; {
 	case delta < 0: return -1
@@ -545,6 +991,31 @@ compare_ints :: proc(a, b: int) -> int {
 	return 0
 }
 
+/*
+Compares two `uint` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_uints_example :: proc() {
+		fmt.println(sort.compare_uints(1, 2))
+		fmt.println(sort.compare_uints(2, 2))
+		fmt.println(sort.compare_uints(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_uints :: proc(a, b: uint) -> int {
 	switch {
 	case a < b: return -1
@@ -553,6 +1024,31 @@ compare_uints :: proc(a, b: uint) -> int {
 	return 0
 }
 
+/*
+Compares two `u8` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_u8s_example :: proc() {
+		fmt.println(sort.compare_u8s(1, 2))
+		fmt.println(sort.compare_u8s(2, 2))
+		fmt.println(sort.compare_u8s(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_u8s :: proc(a, b: u8) -> int {
 	switch {
 	case a < b: return -1
@@ -561,6 +1057,31 @@ compare_u8s :: proc(a, b: u8) -> int {
 	return 0
 }
 
+/*
+Compares two `u16` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_u16s_example :: proc() {
+		fmt.println(sort.compare_u16s(1, 2))
+		fmt.println(sort.compare_u16s(2, 2))
+		fmt.println(sort.compare_u16s(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_u16s :: proc(a, b: u16) -> int {
 	switch {
 	case a < b: return -1
@@ -569,6 +1090,31 @@ compare_u16s :: proc(a, b: u16) -> int {
 	return 0
 }
 
+/*
+Compares two `u32` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_u32s_example :: proc() {
+		fmt.println(sort.compare_u32s(1, 2))
+		fmt.println(sort.compare_u32s(2, 2))
+		fmt.println(sort.compare_u32s(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_u32s :: proc(a, b: u32) -> int {
 	switch {
 	case a < b: return -1
@@ -577,6 +1123,31 @@ compare_u32s :: proc(a, b: u32) -> int {
 	return 0
 }
 
+/*
+Compares two `u64` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_u64s_example :: proc() {
+		fmt.println(sort.compare_u64s(1, 2))
+		fmt.println(sort.compare_u64s(2, 2))
+		fmt.println(sort.compare_u64s(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_u64s :: proc(a, b: u64) -> int {
 	switch {
 	case a < b: return -1
@@ -585,6 +1156,31 @@ compare_u64s :: proc(a, b: u64) -> int {
 	return 0
 }
 
+/*
+Compares two `i8` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_i8s_example :: proc() {
+		fmt.println(sort.compare_i8s(-1, 2))
+		fmt.println(sort.compare_i8s(2, 2))
+		fmt.println(sort.compare_i8s(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_i8s :: proc(a, b: i8) -> int {
 	switch {
 	case a < b: return -1
@@ -593,6 +1189,31 @@ compare_i8s :: proc(a, b: i8) -> int {
 	return 0
 }
 
+/*
+Compares two `i16` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_i16s_example :: proc() {
+		fmt.println(sort.compare_i16s(-1, 2))
+		fmt.println(sort.compare_i16s(2, 2))
+		fmt.println(sort.compare_i16s(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_i16s :: proc(a, b: i16) -> int {
 	switch {
 	case a < b: return -1
@@ -601,6 +1222,31 @@ compare_i16s :: proc(a, b: i16) -> int {
 	return 0
 }
 
+/*
+Compares two `i32` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_i32s_example :: proc() {
+		fmt.println(sort.compare_i32s(-1, 2))
+		fmt.println(sort.compare_i32s(2, 2))
+		fmt.println(sort.compare_i32s(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_i32s :: proc(a, b: i32) -> int {
 	switch {
 	case a < b: return -1
@@ -609,6 +1255,31 @@ compare_i32s :: proc(a, b: i32) -> int {
 	return 0
 }
 
+/*
+Compares two `i64` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_i64s_example :: proc() {
+		fmt.println(sort.compare_i64s(-1, 2))
+		fmt.println(sort.compare_i64s(2, 2))
+		fmt.println(sort.compare_i64s(3, 2))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_i64s :: proc(a, b: i64) -> int {
 	switch {
 	case a < b: return -1
@@ -620,6 +1291,31 @@ compare_i64s :: proc(a, b: i64) -> int {
 
 
 
+/*
+Compares two `f32` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_f32s_example :: proc() {
+		fmt.println(sort.compare_f32s(1.0, 2.0))
+		fmt.println(sort.compare_f32s(2.0, 2.0))
+		fmt.println(sort.compare_f32s(3.0, 2.0))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_f32s :: proc(a, b: f32) -> int {
 	switch delta := a - b; {
 	case delta < 0: return -1
@@ -627,6 +1323,31 @@ compare_f32s :: proc(a, b: f32) -> int {
 	}
 	return 0
 }
+/*
+Compares two `f64` values for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_f64s_example :: proc() {
+		fmt.println(sort.compare_f64s(1.0, 2.0))
+		fmt.println(sort.compare_f64s(2.0, 2.0))
+		fmt.println(sort.compare_f64s(3.0, 2.0))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_f64s :: proc(a, b: f64) -> int {
 	switch delta := a - b; {
 	case delta < 0: return -1
@@ -634,6 +1355,31 @@ compare_f64s :: proc(a, b: f64) -> int {
 	}
 	return 0
 }
+/*
+Compares two strings lexicographically (byte-wise) for ordering.
+
+Returns:
+- A negative number if `a` is less than `b`, `0` if they are equal, and a
+  positive number otherwise.
+
+Example:
+
+	import "core:fmt"
+	import "core:sort"
+
+	compare_strings_example :: proc() {
+		fmt.println(sort.compare_strings("apple", "banana"))
+		fmt.println(sort.compare_strings("apple", "apple"))
+		fmt.println(sort.compare_strings("banana", "apple"))
+	}
+
+Output:
+
+	-1
+	0
+	1
+
+*/
 compare_strings :: proc(a, b: string) -> int {
 	x := transmute(mem.Raw_String)a
 	y := transmute(mem.Raw_String)b

From 4839f20da9852045a6f7c626a0793e92b20b5bd4 Mon Sep 17 00:00:00 2001
From: Kriday Kini <kriday.kini@gmail.com>
Date: Sun, 6 Sep 2026 10:00:30 +0530
Subject: [PATCH 003/215] Fix #soa pointer field access through using (#7513).

lb_emit_deep_field_gep treated an #soa pointer as a one-shot field grab and never updated the current type, so using paths with extra selection indices ICE'd.
---
 src/llvm_backend_utility.cpp              | 18 ++++----
 tests/core/runtime/test_core_runtime.odin | 53 +++++++++++++++++++++++
 2 files changed, 61 insertions(+), 10 deletions(-)

diff --git a/src/llvm_backend_utility.cpp b/src/llvm_backend_utility.cpp
index 430677aa3..75e5c2711 100644
--- a/src/llvm_backend_utility.cpp
+++ b/src/llvm_backend_utility.cpp
@@ -1557,27 +1557,25 @@ gb_internal lbValue lb_emit_deep_field_gep(lbProcedure *p, lbValue e, Selection
 		type = core_type(type);
 
 		if (type->kind == Type_SoaPointer) {
+			// #soa pointer is {^container, index}; index into the selected
+			// column, then keep walking remaining selection indices (e.g. `using`)
 			lbValue addr = lb_emit_struct_ep(p, e, 0);
-			lbValue index = lb_emit_struct_ep(p, e, 1);
+			lbValue soa_index = lb_emit_struct_ep(p, e, 1);
 			addr = lb_emit_load(p, addr);
-			index = lb_emit_load(p, index);
+			soa_index = lb_emit_load(p, soa_index);
 
-			i32 first_index = sel.index[0];
-			Selection sub_sel = sel;
-			sub_sel.index.data += 1;
-			sub_sel.index.count -= 1;
-
-			lbValue arr = lb_emit_struct_ep(p, addr, first_index);
+			lbValue arr = lb_emit_struct_ep(p, addr, index);
 
 			Type *t = base_type(type_deref(addr.type));
 			GB_ASSERT(is_type_soa_struct(t));
 
 			if (t->Struct.soa_kind == StructSoa_Fixed) {
-				e = lb_emit_array_ep(p, arr, index);
+				e = lb_emit_array_ep(p, arr, soa_index);
 			} else {
-				e = lb_emit_ptr_offset(p, lb_emit_load(p, arr), index);
+				e = lb_emit_ptr_offset(p, lb_emit_load(p, arr), soa_index);
 			}
 			e.type = alloc_type_multi_pointer_to_pointer(e.type);
+			type = type_deref(e.type);
 
 		} else if (is_type_quaternion(type)) {
 			e = lb_emit_struct_ep(p, e, index);
diff --git a/tests/core/runtime/test_core_runtime.odin b/tests/core/runtime/test_core_runtime.odin
index 13b0f02a0..abdb340f0 100644
--- a/tests/core/runtime/test_core_runtime.odin
+++ b/tests/core/runtime/test_core_runtime.odin
@@ -884,6 +884,59 @@ test_soa_for_in_addr :: proc(t: ^testing.T) {
 	testing.expect_value(t, arr.y[1], 20)
 }
 
+// field access through an #soa pointer when the field is reached via `using`
+@(test)
+test_soa_pointer_using_field :: proc(t: ^testing.T) {
+	fixed: #soa[3]struct {
+		using foo: struct {
+			bar: int,
+		},
+	}
+	fixed[1].bar = 2
+	testing.expect_value(t, fixed.foo[1].bar, 2)
+
+	p := &fixed[1]
+	testing.expect_value(t, p.bar, 2)
+	p.bar = 3
+	testing.expect_value(t, fixed[1].bar, 3)
+	testing.expect_value(t, p^.bar, 3)
+	testing.expect_value(t, p.foo.bar, 3)
+
+	// nested using
+	nested: #soa[2]struct {
+		using inner: struct {
+			using mid: struct {
+				x: int,
+			},
+			y: int,
+		},
+		z: int,
+	}
+	nested[0] = {x = 1, y = 2, z = 3}
+	np := &nested[0]
+	testing.expect_value(t, np.x, 1)
+	testing.expect_value(t, np.y, 2)
+	testing.expect_value(t, np.z, 3)
+	np.x = 10
+	np.y = 20
+	np.z = 30
+	testing.expect_value(t, nested.inner[0].mid.x, 10)
+	testing.expect_value(t, nested.inner[0].y, 20)
+	testing.expect_value(t, nested.z[0], 30)
+
+	// slice / dynamic kinds use a different column representation
+	dyn := make(#soa[dynamic]struct {
+		using foo: struct {
+			bar: int,
+		},
+	}, 2)
+	defer delete(dyn)
+	dp := &dyn[1]
+	dp.bar = 7
+	testing.expect_value(t, dyn[1].bar, 7)
+	testing.expect_value(t, dyn.foo[1].bar, 7)
+}
+
 @(test)
 test_soa_array_allocator_resize :: proc(t: ^testing.T) {
 

From d5100c434145118b7c271981f28fa5f60af2b268 Mon Sep 17 00:00:00 2001
From: Kriday Kini <kridaykini@Kridays-MacBook-Pro.local>
Date: Tue, 8 Sep 2026 07:29:13 +0530
Subject: [PATCH 004/215] Lower #soa pointer field access through SoaVariable.

p.bar on an #soa pointer now unpacks like p^.bar, so using paths do not deep-GEP the fat pointer.
---
 src/llvm_backend_expr.cpp | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index dbca83803..9afdd8383 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -6659,7 +6659,15 @@ gb_internal lbAddr lb_build_addr_internal(lbProcedure *p, Ast *expr) {
 				return lb_addr(lb_find_value_from_entity(p->module, e));
 			}
 
-			lbAddr addr = lb_build_addr(p, se->expr);
+			lbAddr addr = {};
+			if (is_type_soa_pointer(tav.type)) {
+				// auto-deref p.bar, where p is an #soa pointer;
+				// same lowering as an explicit p^.bar so `using` paths
+				// go through lbAddr_SoaVariable instead of deep-GEP on the fat pointer
+				addr = lb_addr_soa_variable_from_soa_ptr(p, lb_build_expr(p, se->expr));
+			} else {
+				addr = lb_build_addr(p, se->expr);
+			}
 
 			// NOTE(harold): Only allow ivar pseudo field access on indirect selectors.
 			//				 It is incoherent otherwise as Objective-C objects are zero-sized.

From c1ec54290cdc6a97192364fbc7364d91d50dad56 Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Thu, 17 Sep 2026 12:58:38 +0200
Subject: [PATCH 005/215] Fix and add bindings for common win32 dialogs

---
 core/sys/windows/comdlg32.odin        | 368 ++++++++++++++++++++++++--
 core/sys/windows/window_messages.odin |   7 -
 2 files changed, 347 insertions(+), 28 deletions(-)

diff --git a/core/sys/windows/comdlg32.odin b/core/sys/windows/comdlg32.odin
index a9800b47a..fabcc8c31 100644
--- a/core/sys/windows/comdlg32.odin
+++ b/core/sys/windows/comdlg32.odin
@@ -1,31 +1,37 @@
 #+build windows
 package sys_windows
 
+// Bindings for the various common Win32 dialogs.
+// See: https://learn.microsoft.com/en-us/windows/win32/dlgbox/using-common-dialog-boxes
+// Corresponds to Commdlg.h
+
 foreign import "system:Comdlg32.lib"
 
+// OpenFile/SaveFile dialogs
+
 LPOFNHOOKPROC :: #type proc "system" (hdlg: HWND, msg: u32, wparam: WPARAM, lparam: LPARAM) -> UINT_PTR
 
 OPENFILENAMEW :: struct {
-	lStructSize: 	        DWORD,
-	hwndOwner: 	        HWND,
-	hInstance: 	        HINSTANCE,
-	lpstrFilter: 	        wstring,
-	lpstrCustomFilter: 	wstring,
-	nMaxCustFilter: 	DWORD,
-	nFilterIndex: 	        DWORD,
-	lpstrFile: 	        wstring,
-	nMaxFile: 	        DWORD,
-	lpstrFileTitle: 	wstring,
-	nMaxFileTitle: 	        DWORD,
-	lpstrInitialDir: 	wstring,
-	lpstrTitle: 	        wstring,
-	Flags: 	                DWORD,
-	nFileOffset: 	        WORD,
-	nFileExtension: 	WORD,
-	lpstrDefExt: 	        wstring,
-	lCustData: 	        LPARAM,
-	lpfnHook: 	        LPOFNHOOKPROC,
-	lpTemplateName: 	wstring,
+	lStructSize:            DWORD,
+	hwndOwner:              HWND,
+	hInstance:              HINSTANCE,
+	lpstrFilter:            LPCWSTR,
+	lpstrCustomFilter:      LPWSTR,
+	nMaxCustFilter:         DWORD,
+	nFilterIndex:           DWORD,
+	lpstrFile:              LPWSTR,
+	nMaxFile:               DWORD,
+	lpstrFileTitle:         LPWSTR,
+	nMaxFileTitle:          DWORD,
+	lpstrInitialDir:        LPCWSTR,
+	lpstrTitle:             LPCWSTR,
+	Flags:                  DWORD,
+	nFileOffset:            WORD,
+	nFileExtension:         WORD,
+	lpstrDefExt:            LPCWSTR,
+	lCustData:              LPARAM,
+	lpfnHook:               LPOFNHOOKPROC,
+	lpTemplateName:         LPCWSTR,
 	pvReserved:             rawptr,
 	dwReserved:             DWORD,
 	FlagsEx:                DWORD,
@@ -35,7 +41,8 @@ OPENFILENAMEW :: struct {
 foreign Comdlg32 {
 	GetOpenFileNameW     :: proc(arg1: ^OPENFILENAMEW) -> BOOL ---
 	GetSaveFileNameW     :: proc(arg1: ^OPENFILENAMEW) -> BOOL ---
-	CommDlgExtendedError :: proc() -> u32 ---
+
+	GetFileTitleW        :: proc(s: LPCWSTR, Buf: LPWSTR, cchSize: WORD) -> c_short ---
 }
 
 OPEN_TITLE :: "Select file to open"
@@ -153,6 +160,325 @@ OFN_READONLY             :: 0x00000001
 OFN_SHAREAWARE           :: 0x00004000
 OFN_SHOWHELP             :: 0x00000010
 
+// Choose Color dialog
+
+LPCCHOOKPROC :: #type proc "system" (hwnd: HWND, msg: UINT, wParam: WPARAM, lParam: LPARAM) -> UINT_PTR
+
+CHOOSECOLORW :: struct {
+	lStructSize:     DWORD,
+	hwndOwner:       HWND,
+	hInstance:       HWND,
+	rgbResult:       COLORREF,
+	lpCustColors:    ^COLORREF,
+	Flags:           DWORD,
+	lCustData:       LPARAM,
+	lpfnHook:        LPCCHOOKPROC,
+	lpTemplateName:  LPCWSTR,
+}
+
+@(default_calling_convention="system")
+foreign Comdlg32 {
+	ChooseColorW :: proc(lpcc: ^CHOOSECOLORW) -> BOOL ---
+}
+
+// Flags for CHOOSECOLORW
+CC_RGBINIT               :: 0x00000001
+CC_FULLOPEN              :: 0x00000002
+CC_PREVENTFULLOPEN       :: 0x00000004
+CC_SHOWHELP              :: 0x00000008
+CC_ENABLEHOOK            :: 0x00000010
+CC_ENABLETEMPLATE        :: 0x00000020
+CC_ENABLETEMPLATEHANDLE  :: 0x00000040
+CC_SOLIDCOLOR            :: 0x00000080
+CC_ANYCOLOR              :: 0x00000100
+
+// Find and replace dialog
+
+LPFRHOOKPROC :: #type proc "system" (hwnd: HWND, msg: UINT, wparam: WPARAM, lparam: LPARAM) -> UINT_PTR
+
+FINDREPLACEW :: struct {
+	lStructSize:       DWORD,         // size of this struct 0x20
+	hwndOwner:         HWND,          // handle to owner's window
+	hInstance:         HINSTANCE,     // instance handle of.EXE that contains cust. dlg. template
+	Flags:             DWORD,         // one or more of the FR_??
+	lpstrFindWhat:     LPWSTR,        // ptr. to search string
+	lpstrReplaceWith:  LPWSTR,        // ptr. to replace string
+	wFindWhatLen:      WORD,          // size of find buffer
+	wReplaceWithLen:   WORD,          // size of replace buffer
+	lCustData:         LPARAM,        // data passed to hook fn.
+	lpfnHook:          LPFRHOOKPROC,  // ptr. to hook fn. or NULL
+	lpTemplateName:    LPCWSTR,       // custom template name
+}
+
+// Flags for FINDREPLACEW
+FR_DOWN                  :: 0x00000001
+FR_WHOLEWORD             :: 0x00000002
+FR_MATCHCASE             :: 0x00000004
+FR_FINDNEXT              :: 0x00000008
+FR_REPLACE               :: 0x00000010
+FR_REPLACEALL            :: 0x00000020
+FR_DIALOGTERM            :: 0x00000040
+FR_SHOWHELP              :: 0x00000080
+FR_ENABLEHOOK            :: 0x00000100
+FR_ENABLETEMPLATE        :: 0x00000200
+FR_NOUPDOWN              :: 0x00000400
+FR_NOMATCHCASE           :: 0x00000800
+FR_NOWHOLEWORD           :: 0x00001000
+FR_ENABLETEMPLATEHANDLE  :: 0x00002000
+FR_HIDEUPDOWN            :: 0x00004000
+FR_HIDEMATCHCASE         :: 0x00008000
+FR_HIDEWHOLEWORD         :: 0x00010000
+FR_RAW                   :: 0x00020000
+FR_SHOWWRAPAROUND        :: 0x00040000
+FR_NOWRAPAROUND          :: 0x00080000
+FR_WRAPAROUND            :: 0x00100000
+FR_MATCHDIAC             :: 0x20000000
+FR_MATCHKASHIDA          :: 0x40000000
+FR_MATCHALEFHAMZA        :: 0x80000000
+
+@(default_calling_convention="system")
+foreign Comdlg32 {
+	FindTextW :: proc(lpcc: ^FINDREPLACEW) -> HWND ---
+	ReplaceTextW :: proc(lpcc: ^FINDREPLACEW) -> HWND ---
+}
+
+FINDMSGSTRINGW :: wstring("commdlg_FindReplace")
+
+// Choose Font dialog
+
+LPCFHOOKPROC :: #type proc "system" (hwnd: HWND, msg: UINT, wparam: WPARAM, lparam: LPARAM) -> UINT_PTR
+
+CHOOSEFONTW :: struct {
+	lStructSize:     DWORD,
+	hwndOwner:       HWND,          // caller's window handle
+	hDC:             HDC,           // printer DC/IC or NULL
+	lpLogFont:       LPLOGFONTW,    // ptr. to a LOGFONT struct
+	iPointSize:      INT,           // 10 * size in points of selected font
+	Flags:           DWORD,         // enum. type flags
+	rgbColors:       COLORREF,      // returned text color
+	lCustData:       LPARAM,        // data passed to hook fn.
+	lpfnHook:        LPCFHOOKPROC,  // ptr. to hook function
+	lpTemplateName:  LPCWSTR,       // custom template name
+	hInstance:       HINSTANCE,     // instance handle of.EXE that contains cust. dlg. template
+	lpszStyle:       LPWSTR,        // return the style field here
+	                                // must be LF_FACESIZE or bigger
+	nFontType:       WORD,          // same value reported to the EnumFonts call back with the extra FONTTYPE_ bits added
+	___MISSING_ALIGNMENT__: WORD,
+	nSizeMin:        INT,           // minimum pt size allowed &
+	nSizeMax:        INT,           // max pt size allowed if CF_LIMITSIZE is used
+}
+
+@(default_calling_convention="system")
+foreign Comdlg32 {
+	ChooseFontW :: proc(lpcc: ^CHOOSEFONTW) -> BOOL ---
+}
+
+// Flags for CHOOSEFONTW
+CF_SCREENFONTS            :: 0x00000001
+CF_PRINTERFONTS           :: 0x00000002
+CF_BOTH                   :: (CF_SCREENFONTS | CF_PRINTERFONTS)
+CF_SHOWHELP               :: 0x00000004
+CF_ENABLEHOOK             :: 0x00000008
+CF_ENABLETEMPLATE         :: 0x00000010
+CF_ENABLETEMPLATEHANDLE   :: 0x00000020
+CF_INITTOLOGFONTSTRUCT    :: 0x00000040
+CF_USESTYLE               :: 0x00000080
+CF_EFFECTS                :: 0x00000100
+CF_APPLY                  :: 0x00000200
+CF_ANSIONLY               :: 0x00000400
+CF_SCRIPTSONLY            :: CF_ANSIONLY
+CF_NOVECTORFONTS          :: 0x00000800
+CF_NOOEMFONTS             :: CF_NOVECTORFONTS
+CF_NOSIMULATIONS          :: 0x00001000
+CF_LIMITSIZE              :: 0x00002000
+CF_FIXEDPITCHONLY         :: 0x00004000
+CF_WYSIWYG                :: 0x00008000 // must also have CF_SCREENFONTS & CF_PRINTERFONTS
+CF_FORCEFONTEXIST         :: 0x00010000
+CF_SCALABLEONLY           :: 0x00020000
+CF_TTONLY                 :: 0x00040000
+CF_NOFACESEL              :: 0x00080000
+CF_NOSTYLESEL             :: 0x00100000
+CF_NOSIZESEL              :: 0x00200000
+CF_SELECTSCRIPT           :: 0x00400000
+CF_NOSCRIPTSEL            :: 0x00800000
+CF_NOVERTFONTS            :: 0x01000000
+CF_INACTIVEFONTS          :: 0x02000000
+
+// Print dialog
+
+LPPRINTHOOKPROC :: #type proc "system" (hwnd: HWND, msg: UINT, wparam: WPARAM, lparam: LPARAM) -> UINT_PTR
+LPSETUPHOOKPROC :: #type proc "system" (hwnd: HWND, msg: UINT, wparam: WPARAM, lparam: LPARAM) -> UINT_PTR
+
+PRINTDLGW :: struct {
+	lStructSize:          DWORD,
+	hwndOwner:            HWND,
+	hDevMode:             HGLOBAL,
+	hDevNames:            HGLOBAL,
+	hDC:                  HDC,
+	Flags:                DWORD,
+	nFromPage:            WORD,
+	nToPage:              WORD,
+	nMinPage:             WORD,
+	nMaxPage:             WORD,
+	nCopies:              WORD,
+	hInstance:            HINSTANCE,
+	lCustData:            LPARAM,
+	lpfnPrintHook:        LPPRINTHOOKPROC,
+	lpfnSetupHook:        LPSETUPHOOKPROC,
+	lpPrintTemplateName:  LPCWSTR,
+	lpSetupTemplateName:  LPCWSTR,
+	hPrintTemplate:       HGLOBAL,
+	hSetupTemplate:       HGLOBAL,
+}
+
+PRINTPAGERANGE :: struct {
+	nFromPage:  DWORD,
+	nToPage:    DWORD,
+}
+
+LPPRINTPAGERANGE :: #type ^PRINTPAGERANGE
+HPROPSHEETPAGE :: distinct LPVOID
+
+PRINTDLGEXW :: struct {
+	lStructSize:          DWORD,             // size of structure in bytes
+	hwndOwner:            HWND,              // caller's window handle
+	hDevMode:             HGLOBAL,           // handle to DevMode
+	hDevNames:            HGLOBAL,           // handle to DevNames
+	hDC:                  HDC,               // printer DC/IC or NULL
+	Flags:                DWORD,             // PD_ flags
+	Flags2:               DWORD,             // reserved
+	ExclusionFlags:       DWORD,             // items to exclude from driver pages
+	nPageRanges:          DWORD,             // number of page ranges
+	nMaxPageRanges:       DWORD,             // max number of page ranges
+	lpPageRanges:         LPPRINTPAGERANGE,  // array of page ranges
+	nMinPage:             DWORD,             // min page number
+	nMaxPage:             DWORD,             // max page number
+	nCopies:              DWORD,             // number of copies
+	hInstance:            HINSTANCE,         // instance handle
+	lpPrintTemplateName:  LPCWSTR,           // template name for app specific area
+	lpCallback:           LPUNKNOWN,         // app callback interface
+	nPropertyPages:       DWORD,             // number of app property pages in lphPropertyPages
+	lphPropertyPages:     ^HPROPSHEETPAGE,   // array of app property page handles
+	nStartPage:           DWORD,             // start page id
+	dwResultAction:       DWORD,             // result action if S_OK is returned
+}
+
+// Device Names structure for PrintDlg and PrintDlgEx.
+DEVNAMES :: struct {
+	wDriverOffset: WORD,
+	wDeviceOffset: WORD,
+	wOutputOffset: WORD,
+	wDefault:      WORD,
+}
+
+@(default_calling_convention="system")
+foreign Comdlg32 {
+	PrintDlgW :: proc(lpcc: ^PRINTDLGW) -> BOOL ---
+	PrintDlgExW :: proc(lpcc: ^PRINTDLGEXW) -> HRESULT ---
+}
+
+// Flags for PRINTDLGW and PRINTDLGEXW
+PD_ALLPAGES                    :: 0x00000000
+PD_SELECTION                   :: 0x00000001
+PD_PAGENUMS                    :: 0x00000002
+PD_NOSELECTION                 :: 0x00000004
+PD_NOPAGENUMS                  :: 0x00000008
+PD_COLLATE                     :: 0x00000010
+PD_PRINTTOFILE                 :: 0x00000020
+PD_PRINTSETUP                  :: 0x00000040
+PD_NOWARNING                   :: 0x00000080
+PD_RETURNDC                    :: 0x00000100
+PD_RETURNIC                    :: 0x00000200
+PD_RETURNDEFAULT               :: 0x00000400
+PD_SHOWHELP                    :: 0x00000800
+PD_ENABLEPRINTHOOK             :: 0x00001000
+PD_ENABLESETUPHOOK             :: 0x00002000
+PD_ENABLEPRINTTEMPLATE         :: 0x00004000
+PD_ENABLESETUPTEMPLATE         :: 0x00008000
+PD_ENABLEPRINTTEMPLATEHANDLE   :: 0x00010000
+PD_ENABLESETUPTEMPLATEHANDLE   :: 0x00020000
+PD_USEDEVMODECOPIES            :: 0x00040000
+PD_USEDEVMODECOPIESANDCOLLATE  :: 0x00040000
+PD_DISABLEPRINTTOFILE          :: 0x00080000
+PD_HIDEPRINTTOFILE             :: 0x00100000
+PD_NONETWORKBUTTON             :: 0x00200000
+PD_CURRENTPAGE                 :: 0x00400000
+PD_NOCURRENTPAGE               :: 0x00800000
+PD_EXCLUSIONFLAGS              :: 0x01000000
+PD_USELARGETEMPLATE            :: 0x10000000
+
+//  Define the start page for the print dialog when using PrintDlgEx.
+START_PAGE_GENERAL             :: 0xffffffff
+
+//  Result action ids for PrintDlgEx.
+PD_RESULT_CANCEL               :: 0
+PD_RESULT_PRINT                :: 1
+PD_RESULT_APPLY                :: 2
+
+// Page Setup dialog
+
+// Window Message IDs for the LPPAGEPAINTHOOK
+WM_PSD_PAGESETUPDLG     :: (WM_USER  )
+WM_PSD_FULLPAGERECT     :: (WM_USER+1)
+WM_PSD_MINMARGINRECT    :: (WM_USER+2)
+WM_PSD_MARGINRECT       :: (WM_USER+3)
+WM_PSD_GREEKTEXTRECT    :: (WM_USER+4)
+WM_PSD_ENVSTAMPRECT     :: (WM_USER+5)
+WM_PSD_YAFULLPAGERECT   :: (WM_USER+6)
+
+LPPAGEPAINTHOOK :: #type proc "system" (hwnd: HWND, msg: UINT, wparam: WPARAM, lparam: LPARAM) -> UINT_PTR
+LPPAGESETUPHOOK :: #type proc "system" (hwnd: HWND, msg: UINT, wparam: WPARAM, lparam: LPARAM) -> UINT_PTR
+
+PAGESETUPDLGW :: struct {
+	lStructSize:              DWORD,
+	hwndOwner:                HWND,
+	hDevMode:                 HGLOBAL,
+	hDevNames:                HGLOBAL,
+	Flags:                    DWORD,
+	ptPaperSize:              POINT,
+	rtMinMargin:              RECT,
+	rtMargin:                 RECT,
+	hInstance:                HINSTANCE,
+	lCustData:                LPARAM,
+	lpfnPageSetupHook:        LPPAGESETUPHOOK,
+	lpfnPagePaintHook:        LPPAGEPAINTHOOK,
+	lpPageSetupTemplateName:  LPCWSTR,
+	hPageSetupTemplate:       HGLOBAL,
+}
+
+@(default_calling_convention="system")
+foreign Comdlg32 {
+	PageSetupDlgW :: proc(lpcc: ^PAGESETUPDLGW) -> BOOL ---
+}
+
+PSD_DEFAULTMINMARGINS              :: 0x00000000 // default (printer's)
+PSD_INWININIINTLMEASURE            :: 0x00000000 // 1st of 4 possible
+
+PSD_MINMARGINS                     :: 0x00000001 // use caller's
+PSD_MARGINS                        :: 0x00000002 // use caller's
+PSD_INTHOUSANDTHSOFINCHES          :: 0x00000004 // 2nd of 4 possible
+PSD_INHUNDREDTHSOFMILLIMETERS      :: 0x00000008 // 3rd of 4 possible
+PSD_DISABLEMARGINS                 :: 0x00000010
+PSD_DISABLEPRINTER                 :: 0x00000020
+PSD_NOWARNING                      :: 0x00000080 // must be same as PD_*
+PSD_DISABLEORIENTATION             :: 0x00000100
+PSD_RETURNDEFAULT                  :: 0x00000400 // must be same as PD_*
+PSD_DISABLEPAPER                   :: 0x00000200
+PSD_SHOWHELP                       :: 0x00000800 // must be same as PD_*
+PSD_ENABLEPAGESETUPHOOK            :: 0x00002000 // must be same as PD_*
+PSD_ENABLEPAGESETUPTEMPLATE        :: 0x00008000 // must be same as PD_*
+PSD_ENABLEPAGESETUPTEMPLATEHANDLE  :: 0x00020000 // must be same as PD_*
+PSD_ENABLEPAGEPAINTHOOK            :: 0x00040000
+PSD_DISABLEPAGEPAINTING            :: 0x00080000
+PSD_NONETWORKBUTTON                :: 0x00200000 // must be same as PD_*
+
+// Common error codes for all comdlg32 dialogs (CommDlgExtendedError)
+
+@(default_calling_convention="system")
+foreign Comdlg32 {
+	CommDlgExtendedError :: proc() -> u32 ---
+}
+
 CDERR_DIALOGFAILURE      :: 0x0000FFFF
 CDERR_GENERALCODES       :: 0x00000000
 CDERR_STRUCTSIZE         :: 0x00000001
diff --git a/core/sys/windows/window_messages.odin b/core/sys/windows/window_messages.odin
index 0901ee696..90ecbda4a 100644
--- a/core/sys/windows/window_messages.odin
+++ b/core/sys/windows/window_messages.odin
@@ -376,7 +376,6 @@ DDM_SETFMT                        :: 0x0400
 DM_GETDEFID                       :: 0x0400
 NIN_SELECT                        :: 0x0400
 TBM_GETPOS                        :: 0x0400
-WM_PSD_PAGESETUPDLG               :: 0x0400
 WM_USER                           :: 0x0400
 CBEM_INSERTITEMA                  :: 0x0401
 DDM_DRAW                          :: 0x0401
@@ -389,7 +388,6 @@ TB_ENABLEBUTTON                   :: 0x0401
 TBM_GETRANGEMIN                   :: 0x0401
 TTM_ACTIVATE                      :: 0x0401
 WM_CHOOSEFONT_GETLOGFONT          :: 0x0401
-WM_PSD_FULLPAGERECT               :: 0x0401
 CBEM_SETIMAGELIST                 :: 0x0402
 DDM_CLOSE                         :: 0x0402
 DM_REPOSITION                     :: 0x0402
@@ -399,7 +397,6 @@ RB_DELETEBAND                     :: 0x0402
 SB_GETTEXTA                       :: 0x0402
 TB_CHECKBUTTON                    :: 0x0402
 TBM_GETRANGEMAX                   :: 0x0402
-WM_PSD_MINMARGINRECT              :: 0x0402
 CBEM_GETIMAGELIST                 :: 0x0403
 DDM_BEGIN                         :: 0x0403
 HKM_SETRULES                      :: 0x0403
@@ -409,7 +406,6 @@ SB_GETTEXTLENGTHA                 :: 0x0403
 TBM_GETTIC                        :: 0x0403
 TB_PRESSBUTTON                    :: 0x0403
 TTM_SETDELAYTIME                  :: 0x0403
-WM_PSD_MARGINRECT                 :: 0x0403
 CBEM_GETITEMA                     :: 0x0404
 DDM_END                           :: 0x0404
 PBM_SETSTEP                       :: 0x0404
@@ -418,13 +414,11 @@ SB_SETPARTS                       :: 0x0404
 TB_HIDEBUTTON                     :: 0x0404
 TBM_SETTIC                        :: 0x0404
 TTM_ADDTOOLA                      :: 0x0404
-WM_PSD_GREEKTEXTRECT              :: 0x0404
 CBEM_SETITEMA                     :: 0x0405
 PBM_STEPIT                        :: 0x0405
 TB_INDETERMINATE                  :: 0x0405
 TBM_SETPOS                        :: 0x0405
 TTM_DELTOOLA                      :: 0x0405
-WM_PSD_ENVSTAMPRECT               :: 0x0405
 CBEM_GETCOMBOCONTROL              :: 0x0406
 PBM_SETRANGE32                    :: 0x0406
 RB_SETBANDINFOA                   :: 0x0406
@@ -432,7 +426,6 @@ SB_GETPARTS                       :: 0x0406
 TB_MARKBUTTON                     :: 0x0406
 TBM_SETRANGE                      :: 0x0406
 TTM_NEWTOOLRECTA                  :: 0x0406
-WM_PSD_YAFULLPAGERECT             :: 0x0406
 CBEM_GETEDITCONTROL               :: 0x0407
 PBM_GETRANGE                      :: 0x0407
 RB_SETPARENT                      :: 0x0407

From be72d9f6cc79ea8311beb8fd454baed4d9655276 Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Thu, 17 Sep 2026 13:01:34 +0200
Subject: [PATCH 006/215] Add API doc to wstring related utils, and make N
 default value consistent within procedure group utf8_to_wstring

---
 core/sys/windows/util.odin | 37 +++++++++++++++++++++++++++++++++++--
 1 file changed, 35 insertions(+), 2 deletions(-)

diff --git a/core/sys/windows/util.odin b/core/sys/windows/util.odin
index fc2b61033..7990e5a59 100644
--- a/core/sys/windows/util.odin
+++ b/core/sys/windows/util.odin
@@ -236,8 +236,25 @@ utf8_to_wstring_buf :: proc(buf: []u16, s: string) -> wstring {
 // An empty string is valid, and results in a value distinct from `nil`.
 utf8_to_wstring :: proc{utf8_to_wstring_alloc, utf8_to_wstring_buf}
 
+/*
+Converts a UTF-16 `wstring` into a regular UTF-8 `string` and allocates the result.
+The procedure can either assume a null-terminated input string, or convert
+a fixed number of characters.
+
+*Allocates Using Provided Allocator*
+
+Inputs:
+- s: The string to be converted
+- N: The number of characters in `s` that should be converted. A value of `-1` indicates that the
+     procedure should keep going until it finds a terminating null character in `s`.
+- allocator: (default: context.temp_allocator)
+
+Returns:
+- res: A cloned and converted string
+- err: An optional allocator error if one occured, `nil` otherwise
+*/
 @(require_results)
-wstring_to_utf8_alloc :: proc(s: wstring, N: int, allocator := context.temp_allocator) -> (res: string, err: runtime.Allocator_Error) {
+wstring_to_utf8_alloc :: proc(s: wstring, N := -1, allocator := context.temp_allocator) -> (res: string, err: runtime.Allocator_Error) {
 	context.allocator = allocator
 
 	if N == 0 {
@@ -271,6 +288,22 @@ wstring_to_utf8_alloc :: proc(s: wstring, N: int, allocator := context.temp_allo
 	return string(text[:n]), nil
 }
 
+/*
+Converts a UTF-16 `wstring` into a regular UTF-8 `string`, using `buf` as its backing buffer.
+The procedure can either assume a null-terminated input string, or convert
+a fixed number of characters.
+
+*Uses `buf` for backing*
+
+Inputs:
+- buf: Backing buffer for result string
+- s: The string to be converted
+- N: The number of characters in `s` that should be converted. A value of `-1` indicates that the
+     procedure should keep going until it finds a terminating null character in `s`.
+
+Returns:
+- res: A cloned and converted string
+*/
 @(require_results)
 wstring_to_utf8_buf :: proc(buf: []u8, s: wstring, N := -1) -> (res: string) {
 	n := WideCharToMultiByte(CP_UTF8, WC_ERR_INVALID_CHARS, s, c_int(N), nil, 0, nil, nil)
@@ -307,7 +340,7 @@ to it will be converted.
 
 Inputs:
 - s: The string to be converted
-- allocator: (default: context.allocator)
+- allocator: (default: context.temp_allocator)
 
 Returns:
 - res: A cloned and converted string

From 04577f42c11d1518be19ad27a6e2ab8d8fce8ae9 Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Thu, 17 Sep 2026 16:53:13 +0200
Subject: [PATCH 007/215] Removed outdated comment/example code (replacement in
 examples repo)

---
 core/sys/windows/comdlg32.odin | 80 ----------------------------------
 1 file changed, 80 deletions(-)

diff --git a/core/sys/windows/comdlg32.odin b/core/sys/windows/comdlg32.odin
index fabcc8c31..853238208 100644
--- a/core/sys/windows/comdlg32.odin
+++ b/core/sys/windows/comdlg32.odin
@@ -53,86 +53,6 @@ SAVE_TITLE :: "Select file to save"
 SAVE_FLAGS :: u32(OFN_OVERWRITEPROMPT | OFN_EXPLORER)
 SAVE_EXT   :: "txt"
 
-/*
-import "core:strings"
-
-Open_Save_Mode :: enum {
-	Open = 0,
-	Save = 1,
-}
-
-_open_file_dialog :: proc(title: string, dir: string,
-                          filters: []string, default_filter: u32,
-                          flags: u32, default_ext: string,
-                          mode: Open_Save_Mode, allocator := context.temp_allocator) -> (path: string, ok: bool = true) {
-	context.allocator = allocator
-	file_buf := make([]u16, MAX_PATH_WIDE)
-	defer if !ok {
-		delete(file_buf)
-	}
-
-	// Filters need to be passed as a pair of strings (title, filter)
-	filter_len := u32(len(filters))
-	if filter_len % 2 != 0 {
-		return "", false
-	}
-
-	filter: string
-	filter = strings.join(filters, "\u0000", context.temp_allocator)
-	filter = strings.concatenate({filter, "\u0000"}, context.temp_allocator)
-
-	ofn := OPENFILENAMEW{
-		lStructSize     = size_of(OPENFILENAMEW),
-		lpstrFile       = wstring(&file_buf[0]),
-		nMaxFile        = MAX_PATH_WIDE,
-		lpstrTitle      = utf8_to_wstring(title, context.temp_allocator),
-		lpstrFilter     = utf8_to_wstring(filter, context.temp_allocator),
-		lpstrInitialDir = utf8_to_wstring(dir, context.temp_allocator),
-		nFilterIndex    = u32(clamp(default_filter, 1, filter_len / 2)),
-		lpstrDefExt     = utf8_to_wstring(default_ext, context.temp_allocator),
-		Flags           = u32(flags),
-	}
-
-	switch mode {
-	case .Open:
-		ok = bool(GetOpenFileNameW(&ofn))
-	case .Save:
-		ok = bool(GetSaveFileNameW(&ofn))
-	case:
-		ok = false
-	}
-
-	if !ok {
-		return
-	}
-
-
-	file_name, _ := utf16_to_utf8(file_buf[:], allocator)
-	path = strings.trim_right_null(file_name)
-	return
-}
-
-select_file_to_open :: proc(title := OPEN_TITLE, dir := ".",
-                            filters := []string{"All Files", "*.*"}, default_filter := u32(1),
-                            flags := OPEN_FLAGS, allocator := context.temp_allocator) -> (path: string, ok: bool) {
-
-	path, ok = _open_file_dialog(title, dir, filters, default_filter, flags, "", Open_Save_Mode.Open, allocator)
-	return
-}
-
-select_file_to_save :: proc(title := SAVE_TITLE, dir := ".",
-                            filters := []string{"All Files", "*.*"}, default_filter := u32(1),
-                            flags := SAVE_FLAGS, default_ext := SAVE_EXT,
-                            allocator := context.temp_allocator) -> (path: string, ok: bool) {
-
-	path, ok = _open_file_dialog(title, dir, filters, default_filter, flags, default_ext, Open_Save_Mode.Save, allocator)
-	return
-}
-*/
-
-// TODO: Implement convenience function for select_file_to_open with ALLOW_MULTI_SELECT that takes
-//       it output of the form "path\u0000\file1u\0000file2" and turns it into []string with the path + file pre-concatenated for you.
-
 OFN_ALLOWMULTISELECT     :: 0x00000200 // NOTE(Jeroen): Without OFN_EXPLORER it uses the Win3 dialog.
 OFN_CREATEPROMPT         :: 0x00002000
 OFN_DONTADDTORECENT      :: 0x02000000

From 02c14865ad3b38ab580b512bfc9a52f532f0a14b Mon Sep 17 00:00:00 2001
From: Abderrahim Indjaren <rahimos.123@gmail.com>
Date: Fri, 18 Sep 2026 01:58:49 +0100
Subject: [PATCH 008/215] fix: out of bounds init tuple element in CompoundLit
 reported as error

---
 src/check_expr.cpp | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index aa62a6114..d0acc0744 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -11203,6 +11203,9 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 					}
 
 					max += tt->variables.count-1;
+					if (0 <= max_type_count && max_type_count <= max) {
+						error(e, "Expansion reaches index %lld which goes out of bounds (>= %lld) for %.*s", cast(long long)max, cast(long long)max_type_count, LIT(context_name));
+					}
 				} else {
 					check_assignment(c, &operand, elem_type, context_name);
 

From 09c81c8a7fd885c44fa9fff18cb3af2c04678843 Mon Sep 17 00:00:00 2001
From: Abderrahim Indjaren <rahimos.123@gmail.com>
Date: Fri, 18 Sep 2026 02:50:18 +0100
Subject: [PATCH 009/215] fix: prevent struct crashing from tuple expansion
 overflow

---
 src/check_expr.cpp | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index d0acc0744..d35231b91 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -10959,6 +10959,8 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 							Operand src_o = o;
 							src_o.type = src_field->type;
 
+							if (index + jj >= field_count)
+								continue ;
 							field = t->Struct.fields[index + (jj++)];
 
 							check_assignment(c, &src_o, field->type, str_lit("structure literal"));
@@ -10981,15 +10983,18 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 
 						handled_elem_count += 1;
 					}
-
+					if (handled_elem_count > field_count) {
+						error(o.expr, "Expansion overflows structure literal, expected %td, got %td", field_count, handled_elem_count);
+						break ;
+					}
 				}
 				if (cl->elems.count < field_count) {
 					if (min_field_count < field_count) {
 						if (cl->elems.count < min_field_count) {
-							error(cl->close, "Too few values in structure literal, expected at least %td, got %td", min_field_count, cl->elems.count);
+							error(cl->close, "Too few values in structure literal, expected at least %td, got %td", min_field_count, handled_elem_count);
 						}
 					} else if (handled_elem_count != field_count) {
-						error(cl->close, "Too few values in structure literal, expected %td, got %td", field_count, cl->elems.count);
+						error(cl->close, "Too few values in structure literal, expected %td, got %td", field_count, handled_elem_count);
 					}
 				}
 			}

From d32bbfd7be7f40c6335dc4833b72839c96ae8b8a Mon Sep 17 00:00:00 2001
From: Abderrahim Indjaren <rahimos.123@gmail.com>
Date: Fri, 18 Sep 2026 03:04:18 +0100
Subject: [PATCH 010/215] fix: oversight during underflow condition fix:
 incorrect message format argument for index overflow

---
 src/check_expr.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index d35231b91..1ee44831b 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -10940,7 +10940,7 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 						continue;
 					}
 					if (index >= field_count) {
-						error(elem, "Too many values in structure literal, expected %td, got %td", field_count, cl->elems.count);
+						error(elem, "Too many values in structure literal, expected %td, got %td", field_count, index + 1);
 						break;
 					}
 
@@ -10988,9 +10988,9 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 						break ;
 					}
 				}
-				if (cl->elems.count < field_count) {
+				if (handled_elem_count < field_count) {
 					if (min_field_count < field_count) {
-						if (cl->elems.count < min_field_count) {
+						if (handled_elem_count < min_field_count) {
 							error(cl->close, "Too few values in structure literal, expected at least %td, got %td", min_field_count, handled_elem_count);
 						}
 					} else if (handled_elem_count != field_count) {

From 4aa73f6c10f62ed6c53cdeb90d0984addf930ed8 Mon Sep 17 00:00:00 2001
From: Artur Leite <arturleite164@gmail.com>
Date: Fri, 18 Sep 2026 10:52:14 +0200
Subject: [PATCH 011/215] core/os: allocate the long-path buffer in the
 caller's allocator

`_fix_long_path_internal` built the `\\?\` prefixed path in an arena it guarded
itself, so `TEMP_ALLOCATOR_GUARD`'s deferred end rewound that arena as the proc
returned and `_fix_long_path`/`_fix_long_path_slice` converted memory that had
already been reclaimed. Paths of 248 bytes or more reached the conversion as
released storage whenever long path support was unavailable.

Take the scratch allocator as a parameter and let the two callers guard it, as
they already receive the destination allocator and can exclude it from the
collision list.
---
 core/os/path_windows.odin | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/core/os/path_windows.odin b/core/os/path_windows.odin
index 753f1665f..671b50865 100644
--- a/core/os/path_windows.odin
+++ b/core/os/path_windows.odin
@@ -213,16 +213,18 @@ has_long_path_support :: proc "contextless" () -> bool {
 
 @(require_results)
 _fix_long_path_slice :: proc(path: string, allocator: runtime.Allocator) -> ([]u16, runtime.Allocator_Error) {
-	return win32_utf8_to_utf16(_fix_long_path_internal(path), allocator)
+	temp_allocator := TEMP_ALLOCATOR_GUARD({allocator})
+	return win32_utf8_to_utf16(_fix_long_path_internal(path, temp_allocator), allocator)
 }
 
 @(require_results)
 _fix_long_path :: proc(path: string, allocator: runtime.Allocator) -> (win32.wstring, runtime.Allocator_Error) {
-	return win32_utf8_to_wstring(_fix_long_path_internal(path), allocator)
+	temp_allocator := TEMP_ALLOCATOR_GUARD({allocator})
+	return win32_utf8_to_wstring(_fix_long_path_internal(path, temp_allocator), allocator)
 }
 
 @(require_results)
-_fix_long_path_internal :: proc(path: string) -> string {
+_fix_long_path_internal :: proc(path: string, allocator: runtime.Allocator) -> string {
 	if has_long_path_support() {
 		return path
 	}
@@ -244,10 +246,8 @@ _fix_long_path_internal :: proc(path: string) -> string {
 		return path
 	}
 
-	temp_allocator := TEMP_ALLOCATOR_GUARD({})
-
 	PREFIX :: `\\?`
-	path_buf := make([]byte, len(PREFIX)+len(path)+1, temp_allocator)
+	path_buf := make([]byte, len(PREFIX)+len(path)+1, allocator)
 	copy(path_buf, PREFIX)
 	n := len(path)
 	r, w := 0, len(PREFIX)

From a7b67e44732592d669ea45052ec8b6e85b430fe8 Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Sat, 19 Sep 2026 12:16:55 +0200
Subject: [PATCH 012/215] -strict-style requires comma before newline after
 proc parameters which have a default value (#7583)

---
 core/crypto/_mldsa/dsa_internal.odin |  2 +-
 core/mem/alloc.odin                  | 10 +++++-----
 core/mem/allocators.odin             | 18 +++++++++---------
 core/nbio/ops.odin                   | 16 ++++++++--------
 src/parser.cpp                       | 10 ++++++++++
 5 files changed, 33 insertions(+), 23 deletions(-)

diff --git a/core/crypto/_mldsa/dsa_internal.odin b/core/crypto/_mldsa/dsa_internal.odin
index bfb6b7508..a4c88a263 100644
--- a/core/crypto/_mldsa/dsa_internal.odin
+++ b/core/crypto/_mldsa/dsa_internal.odin
@@ -162,7 +162,7 @@ dsa_sign_internal :: proc(
 	ctx: []byte,
 	rnd: []byte,
 	priv_key: ^Private_Key,
-	external_mu: []byte = nil
+	external_mu: []byte = nil,
 ) -> bool {
 	params := priv_key.params
 	switch params {
diff --git a/core/mem/alloc.odin b/core/mem/alloc.odin
index 282c8d0b4..86ea82bf3 100644
--- a/core/mem/alloc.odin
+++ b/core/mem/alloc.odin
@@ -1024,7 +1024,7 @@ make_multi_pointer :: proc(
 	$T: typeid/[^]$E,
 	#any_int len: int,
 	allocator := context.allocator,
-	loc := #caller_location
+	loc := #caller_location,
 ) -> (mp: T, err: Allocator_Error) {
 	return runtime.make_multi_pointer(T, len, allocator, loc)
 }
@@ -1040,7 +1040,7 @@ make_soa_slice :: proc(
 	$T: typeid/#soa[]$E,
 	#any_int len: int,
 	allocator := context.allocator,
-	loc := #caller_location
+	loc := #caller_location,
 ) -> (array: T, err: Allocator_Error) {
 	return runtime.make_soa_slice(T, len, allocator, loc)
 }
@@ -1055,7 +1055,7 @@ its backing allocator, and initial length and capacity of `0`.
 make_soa_dynamic_array :: proc(
 	$T: typeid/#soa[dynamic]$E,
 	allocator := context.allocator,
-	loc := #caller_location
+	loc := #caller_location,
 ) -> (array: T, err: Allocator_Error) {
 	return runtime.make_soa_dynamic_array(T, allocator, loc)
 }
@@ -1071,7 +1071,7 @@ make_soa_dynamic_array_len :: proc(
 	$T: typeid/#soa[dynamic]$E,
 	#any_int len: int,
 	allocator := context.allocator,
-	loc := #caller_location
+	loc := #caller_location,
 ) -> (array: T, err: Allocator_Error) {
 	return runtime.make_soa_dynamic_array_len(T, len, allocator, loc)
 }
@@ -1089,7 +1089,7 @@ make_soa_dynamic_array_len_cap :: proc(
 	#any_int len: int,
 	#any_int cap: int,
 	allocator := context.allocator,
-	loc := #caller_location
+	loc := #caller_location,
 ) -> (array: T, err: Allocator_Error) {
 	return runtime.make_soa_dynamic_array_len_cap(T, len, cap, allocator, loc)
 }
diff --git a/core/mem/allocators.odin b/core/mem/allocators.odin
index db5806876..57a360464 100644
--- a/core/mem/allocators.odin
+++ b/core/mem/allocators.odin
@@ -262,7 +262,7 @@ arena_alloc_bytes_non_zeroed :: proc(
 	a:    ^Arena,
 	size: int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> ([]byte, Allocator_Error) {
 	if a.data == nil {
 		panic("Allocation on uninitialized Arena allocator.", loc)
@@ -654,7 +654,7 @@ scratch_resize :: proc(
 	old_size:   int,
 	size:       int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> (rawptr, Allocator_Error) {
 	bytes, err := scratch_resize_bytes(s, byte_slice(old_memory, old_size), size, alignment, loc)
 	return raw_data(bytes), err
@@ -682,7 +682,7 @@ scratch_resize_bytes :: proc(
 	old_data: []byte,
 	size:     int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> ([]byte, Allocator_Error) {
 	bytes, err := scratch_resize_bytes_non_zeroed(s, old_data, size, alignment, loc)
 	if bytes != nil && size > len(old_data) {
@@ -714,7 +714,7 @@ scratch_resize_non_zeroed :: proc(
 	old_size:   int,
 	size:       int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> (rawptr, Allocator_Error) {
 	bytes, err := scratch_resize_bytes_non_zeroed(s, byte_slice(old_memory, old_size), size, alignment, loc)
 	return raw_data(bytes), err
@@ -742,7 +742,7 @@ scratch_resize_bytes_non_zeroed :: proc(
 	old_data: []byte,
 	size:     int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> ([]byte, Allocator_Error) {
 	old_memory := raw_data(old_data)
 	old_size := len(old_data)
@@ -883,7 +883,7 @@ stack_alloc :: proc(
 	s:    ^Stack,
 	size: int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> (rawptr, Allocator_Error) {
 	bytes, err := stack_alloc_bytes(s, size, alignment, loc)
 	return raw_data(bytes), err
@@ -901,7 +901,7 @@ stack_alloc_bytes :: proc(
 	s:    ^Stack,
 	size: int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> ([]byte, Allocator_Error) {
 	bytes, err := stack_alloc_bytes_non_zeroed(s, size, alignment, loc)
 	if bytes != nil {
@@ -922,7 +922,7 @@ stack_alloc_non_zeroed :: proc(
 	s:    ^Stack,
 	size: int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> (rawptr, Allocator_Error) {
 	bytes, err := stack_alloc_bytes_non_zeroed(s, size, alignment, loc)
 	return raw_data(bytes), err
@@ -940,7 +940,7 @@ stack_alloc_bytes_non_zeroed :: proc(
 	s:    ^Stack,
 	size: int,
 	alignment := DEFAULT_ALIGNMENT,
-	loc       := #caller_location
+	loc       := #caller_location,
 ) -> ([]byte, Allocator_Error) {
 	if s.data == nil {
 		panic("Allocation on an uninitialized Stack allocator.", loc)
diff --git a/core/nbio/ops.odin b/core/nbio/ops.odin
index 6af266e72..7d1b92e46 100644
--- a/core/nbio/ops.odin
+++ b/core/nbio/ops.odin
@@ -100,7 +100,7 @@ accept_poly :: #force_inline proc(
 	p: $T,
 	cb: $C/proc(op: ^Operation, p: T),
 	timeout: time.Duration = NO_TIMEOUT,
-	l: ^Event_Loop = nil
+	l: ^Event_Loop = nil,
 ) -> ^Operation where size_of(T) <= size_of(rawptr) * MAX_USER_ARGUMENTS {
 
 	op := prep_accept(socket, _poly_cb(C, T), timeout, l)
@@ -582,7 +582,7 @@ recv :: #force_inline proc(
 	cb: Callback,
 	all := false,
 	timeout: time.Duration = NO_TIMEOUT,
-	l: ^Event_Loop = nil
+	l: ^Event_Loop = nil,
 ) -> ^Operation {
 	op := prep_recv(socket, bufs, cb, all, timeout, l)
 	exec(op)
@@ -1053,7 +1053,7 @@ read_poly :: #force_inline proc(
 	cb: $C/proc(op: ^Operation, p: T),
 	all := false,
 	timeout: time.Duration = NO_TIMEOUT,
-	l: ^Event_Loop = nil
+	l: ^Event_Loop = nil,
 ) -> ^Operation where size_of(T) <= size_of(rawptr) * MAX_USER_ARGUMENTS {
 
 	op := prep_read(handle, offset, buf, _poly_cb(C, T), all=all, timeout=timeout, l=l)
@@ -1092,7 +1092,7 @@ read_poly2 :: #force_inline proc(
 	cb: $C/proc(op: ^Operation, p: T, p2: T2),
 	all := false,
 	timeout: time.Duration = NO_TIMEOUT,
-	l: ^Event_Loop = nil
+	l: ^Event_Loop = nil,
 ) -> ^Operation where size_of(T) + size_of(T2) <= size_of(rawptr) * MAX_USER_ARGUMENTS {
 
 	op := prep_read(handle, offset, buf, _poly_cb2(C, T, T2), all, timeout, l)
@@ -1132,7 +1132,7 @@ read_poly3 :: #force_inline proc(
 	cb: $C/proc(op: ^Operation, p: T, p2: T2, p3: T3),
 	all := false,
 	timeout: time.Duration = NO_TIMEOUT,
-	l: ^Event_Loop = nil
+	l: ^Event_Loop = nil,
 ) -> ^Operation where size_of(T) + size_of(T2) + size_of(T3) <= size_of(rawptr) * MAX_USER_ARGUMENTS {
 
 	op := prep_read(handle, offset, buf, _poly_cb3(C, T, T2, T3), all, timeout, l)
@@ -1270,7 +1270,7 @@ write_poly :: #force_inline proc(
 	cb: $C/proc(op: ^Operation, p: T),
 	all := true,
 	timeout: time.Duration = NO_TIMEOUT,
-	l: ^Event_Loop = nil
+	l: ^Event_Loop = nil,
 ) -> ^Operation where size_of(T) <= size_of(rawptr) * MAX_USER_ARGUMENTS {
 
 	op := prep_write(handle, offset, buf, _poly_cb(C, T), all=all, timeout=timeout, l=l)
@@ -1309,7 +1309,7 @@ write_poly2 :: #force_inline proc(
 	cb: $C/proc(op: ^Operation, p: T, p2: T2),
 	all := true,
 	timeout: time.Duration = NO_TIMEOUT,
-	l: ^Event_Loop = nil
+	l: ^Event_Loop = nil,
 ) -> ^Operation where size_of(T) + size_of(T2) <= size_of(rawptr) * MAX_USER_ARGUMENTS {
 
 	op := prep_write(handle, offset, buf, _poly_cb2(C, T, T2), all, timeout, l)
@@ -1349,7 +1349,7 @@ write_poly3 :: #force_inline proc(
 	cb: $C/proc(op: ^Operation, p: T, p2: T2, p3: T3),
 	all := true,
 	timeout: time.Duration = NO_TIMEOUT,
-	l: ^Event_Loop = nil
+	l: ^Event_Loop = nil,
 ) -> ^Operation where size_of(T) + size_of(T2) + size_of(T3) <= size_of(rawptr) * MAX_USER_ARGUMENTS {
 
 	op := prep_write(handle, offset, buf, _poly_cb3(C, T, T2, T3), all, timeout, l)
diff --git a/src/parser.cpp b/src/parser.cpp
index e3688d91d..2ec24fb96 100644
--- a/src/parser.cpp
+++ b/src/parser.cpp
@@ -5188,7 +5188,12 @@ gb_internal Ast *parse_field_list(AstFile *f, isize *name_count_, u32 allowed_fl
 	}
 
 	if (allow_token(f, Token_Eq)) {
+		// NOTE(bplu4t2f): We're usually at expr_level == 1 here, but the default value expr needs to be self-contained to ensure correct newline behavior after it.
+		isize previous_expr_level = f->expr_level;
+		f->expr_level = 0;
 		default_value = parse_expr(f, false);
+		GB_ASSERT(f->expr_level == 0);
+		f->expr_level = previous_expr_level;
 		if (!allow_default_parameters) {
 			syntax_error(f->curr_token, "Default parameters are only allowed for procedures");
 			default_value = nullptr;
@@ -5263,7 +5268,12 @@ gb_internal Ast *parse_field_list(AstFile *f, isize *name_count_, u32 allowed_fl
 		}
 
 		if (allow_token(f, Token_Eq)) {
+			// NOTE(bplu4t2f): We're usually at expr_level == 1 here, but the default value expr needs to be self-contained to ensure correct newline behavior after it.
+			isize previous_expr_level = f->expr_level;
+			f->expr_level = 0;
 			default_value = parse_expr(f, false);
+			GB_ASSERT(f->expr_level == 0);
+			f->expr_level = previous_expr_level;
 			if (!allow_default_parameters) {
 				syntax_error(f->curr_token, "Default parameters are only allowed for procedures");
 				default_value = nullptr;

From 7f546546f7c2a878be4dc6e95ce73922863c0220 Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Sat, 19 Sep 2026 12:43:24 +0200
Subject: [PATCH 013/215] Fix missing comma before newline

---
 tests/core/io/test_core_io.odin | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/core/io/test_core_io.odin b/tests/core/io/test_core_io.odin
index 728771b1b..cb40f4728 100644
--- a/tests/core/io/test_core_io.odin
+++ b/tests/core/io/test_core_io.odin
@@ -19,7 +19,7 @@ _test_stream :: proc(
 	resets_on_empty: bool = false,
 	do_destroy: bool = true,
 
-	loc := #caller_location
+	loc := #caller_location,
 ) -> (passed: Passed_Tests, ok: bool) {
 	// We only test what the stream reports to support.
 

From bac6130710a237c576ba7d12e6b9d5d383a46773 Mon Sep 17 00:00:00 2001
From: corley <28909106+corleypc@users.noreply.github.com>
Date: Sun, 20 Sep 2026 15:55:26 +0300
Subject: [PATCH 014/215] lifetime markers for named locals

---
 src/build_settings.cpp                  |   1 +
 src/llvm_backend.hpp                    |  15 ++
 src/llvm_backend_general.cpp            | 150 ++++++++++++++++++++
 src/llvm_backend_proc.cpp               |   4 +
 src/llvm_backend_stmt.cpp               |  24 +++-
 src/main.cpp                            |  13 ++
 tests/issues/run.bat                    |   2 +
 tests/issues/run.sh                     |   3 +
 tests/issues/test_lifetime_markers.odin | 178 ++++++++++++++++++++++++
 9 files changed, 384 insertions(+), 6 deletions(-)
 create mode 100644 tests/issues/test_lifetime_markers.odin

diff --git a/src/build_settings.cpp b/src/build_settings.cpp
index 9b60c8765..745943744 100644
--- a/src/build_settings.cpp
+++ b/src/build_settings.cpp
@@ -546,6 +546,7 @@ struct BuildContext {
 	bool   ignore_unknown_attributes;
 	bool   no_bounds_check;
 	bool   no_type_assert;
+	bool   lifetime_markers; // Opt-in to llvm.lifetime.* markers on scoped locals.
 	bool   dynamic_literals;  // Opt-in to `#+feature dynamic-literals` project-wide.
 	bool   no_output_files;
 	bool   no_crt;
diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index 6e933d152..f0ac0e6c3 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -279,6 +279,12 @@ struct lbDefer {
 	};
 };
 
+struct lbLifetimeLocal {
+	LLVMValueRef ptr;
+	i64          size;
+	isize        scope_index;
+};
+
 struct lbTargetList {
 	lbTargetList *prev;
 	bool          is_block;
@@ -375,6 +381,11 @@ struct lbProcedure {
 
 	Array<lbValue> asan_stack_locals;
 
+	Array<lbLifetimeLocal> lifetime_locals;
+	// matches scope_stack (count == scope_index);
+	// whether that scope's named locals may be lifetime marked
+	Array<bool>            lifetime_scopes;
+
 	void (*generate_body)(lbModule *m, lbProcedure *p);
 	Array<lbGlobalVariable> *global_variables;
 	lbProcedure *objc_names;
@@ -487,6 +498,10 @@ gb_internal lbAddr lb_add_global_generated_from_procedure(lbProcedure *p, Type *
 gb_internal lbAddr lb_add_global_generated_with_name(lbModule *m, Type *type, lbValue value, String name, Entity **entity_=nullptr);
 gb_internal lbAddr lb_add_local(lbProcedure *p, Type *type, Entity *e=nullptr, bool zero_init=true, bool force_no_init=false);
 
+gb_internal bool lb_lifetime_markers_enabled(void);
+gb_internal void lb_add_lifetime_local(lbProcedure *p, LLVMValueRef ptr, Type *type);
+gb_internal void lb_emit_lifetime_ends(lbProcedure *p, lbDeferExitKind kind, lbBlock *block);
+
 gb_internal void lb_add_foreign_library_path(lbModule *m, Entity *e);
 
 gb_internal lbValue lb_typeid(lbModule *m, Type *type);
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 17b41cfad..5e5d58e71 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -3911,6 +3911,147 @@ gb_internal lbValue lb_build_cond(lbProcedure *p, Ast *cond, lbBlock *true_block
 }
 
 
+
+// only named user locals are marked, and only where the innermost open
+// scope opted in with lb_open_scope(..., lifetime_scope=true);
+// these include blocks (proc body, loop/if/else bodies, do, {}) and switch cases
+//
+// notably excluded:
+// 1) params and named results;
+// 2) locals declared by a statement outside its body (e.g. for i:=0; ..., or if x := f()),
+//    see comment on lb_open_scope;
+// 3) temps made by lb_add_local_generated (these have no syntactic scope);
+// 4) a constant literal that needs backing storage (slice, or a struct containing a slice) 
+//    gets it from lb_const_value, not lb_add_local, so v := []i8{...} gets no markers
+//    (TODO: this can be handled in lb_const_value)
+//
+// opt in with the -lifetime-markers compiler flag;
+// code that uses an address of a local past the local's scope should NOT use the flag;
+// (this is not hypothetical, core:crypto does it in a few places)
+gb_internal bool lb_lifetime_markers_enabled(void) {
+	if (!build_context.lifetime_markers) {
+		return false;
+	}
+	if (build_context.optimization_level < OptimizationLevel_Size) {
+		// the StackColoring pass only runs at opt levels >= Size
+		return false;
+	}
+	if (build_context.sanitizer_flags & SanitizerFlag_Address) {
+		// this is conservative, so that markers don't interfere with
+		// the manual unpoisoning currently done in lb_emit_defer_stmts
+		return false;
+	}
+	return true;
+}
+
+gb_internal bool lb_can_emit_at_curr_block(lbProcedure *p) {
+	if (p->curr_block == nullptr) {
+		return false;
+	}
+	return !lb_is_instr_terminating(LLVMGetLastInstruction(p->curr_block->block));
+}
+
+// ptr must be an alloca
+gb_internal void lb_emit_lifetime_marker(lbProcedure *p, char const *name, LLVMValueRef ptr, i64 size) {
+	LLVMTypeRef types[1] = { LLVMTypeOf(ptr) };
+#if LLVM_VERSION_MAJOR >= 22
+	// the size operand was removed in LLVM 22
+	gb_unused(size);
+	LLVMValueRef args[1] = {
+		ptr,
+	};
+#else
+	LLVMValueRef args[2] = {
+		LLVMConstInt(LLVMInt64TypeInContext(p->module->ctx), cast(u64)size, false),
+		ptr,
+	};
+#endif
+	lb_call_intrinsic(p, name, args, gb_count_of(args), types, gb_count_of(types));
+}
+
+gb_internal bool lb_lifetime_scope_is_markable(lbProcedure *p) {
+	GB_ASSERT(p->lifetime_scopes.count == p->scope_index);
+	if (p->scope_index < 1) {
+		// scope 0 is lb_begin_procedure_body (params, named results);
+		// proc body block is scope 1
+		return false;
+	}
+	return p->lifetime_scopes[p->lifetime_scopes.count-1];
+}
+
+gb_internal void lb_add_lifetime_local(lbProcedure *p, LLVMValueRef ptr, Type *type) {
+	if (!lb_lifetime_markers_enabled()) {
+		return;
+	}
+	if (!lb_lifetime_scope_is_markable(p)) {
+		return;
+	}
+	i64 size = type_size_of(type);
+	if (size <= 0) {
+		return;
+	}
+	GB_ASSERT(lb_can_emit_at_curr_block(p));
+
+	lb_emit_lifetime_marker(p, "llvm.lifetime.start", ptr, size);
+
+	lbLifetimeLocal l = {};
+	l.ptr         = ptr;
+	l.size        = size;
+	l.scope_index = p->scope_index;
+	array_add(&p->lifetime_locals, l);
+}
+
+// this mirrors what lb_emit_defer_stmts does over p->defer_stmts;
+// must run after the defer bodies, because a defer may reference the locals
+gb_internal void lb_emit_lifetime_ends(lbProcedure *p, lbDeferExitKind kind, lbBlock *block) {
+	if (p->lifetime_locals.count == 0) {
+		return;
+	}
+	bool can_emit = lb_can_emit_at_curr_block(p);
+	if (kind == lbDeferExit_Branch) {
+		GB_ASSERT(block != nullptr);
+	}
+	if (!can_emit && kind != lbDeferExit_Default) {
+		// only a default close has stuff to do when no end can be emitted
+		return;
+	}
+
+	isize i = p->lifetime_locals.count;
+	while (i --> 0) {
+		lbLifetimeLocal const &l = p->lifetime_locals[i];
+
+		if (kind == lbDeferExit_Default) {
+			// p->scope_index is the scope ending and only its own locals are done;
+			// everything with a smaller index belongs to scopes that are still open,
+			// so stop on the first non-matching one
+			if (l.scope_index != p->scope_index) {
+				GB_ASSERT(l.scope_index < p->scope_index);
+				return;
+			}
+			if (can_emit) {
+				lb_emit_lifetime_marker(p, "llvm.lifetime.end", l.ptr, l.size);
+			}
+			// always pop no matter whether lifetime.end was emitted above
+			array_pop(&p->lifetime_locals);
+		} else if (kind == lbDeferExit_Return) {
+			lb_emit_lifetime_marker(p, "llvm.lifetime.end", l.ptr, l.size);
+			// don't pop here,
+			// ended lifetimes will be popped in their owning scope default close
+		} else if (kind == lbDeferExit_Branch) {
+			// block->scope_index is the depth we land back at
+			// and everything deeper is being unwound;
+			// end all lifetimes (innermost first) up to this level
+			if (l.scope_index <= block->scope_index) {
+				return;
+			}
+			lb_emit_lifetime_marker(p, "llvm.lifetime.end", l.ptr, l.size);
+			// don't pop here,
+			// ended lifetimes will be popped in their owning scope default close
+		}
+	}
+}
+
+
 gb_internal lbAddr lb_add_local(lbProcedure *p, Type *type, Entity *e, bool zero_init, bool force_no_init) {
 	GB_ASSERT(p->decl_block != p->curr_block);
 	LLVMPositionBuilderAtEnd(p->builder, p->decl_block->block);
@@ -3930,6 +4071,15 @@ gb_internal lbAddr lb_add_local(lbProcedure *p, Type *type, Entity *e, bool zero
 
 	LLVMValueRef ptr = llvm_alloca(p, llvm_type, alignment, name);
 
+	if (e != nullptr) {
+		// only named user locals get lifetime markers;
+		//
+		// the alloca itself sits in p->decl_block, but llvm_alloca moves the builder back
+		// to p->curr_block, which is where the declaration actually runs and the slot becomes live;
+		// emitting lifetime.start here keeps it before any stores to the local (zero init included)
+		lb_add_lifetime_local(p, ptr, type);
+	}
+
 	if (!zero_init && !force_no_init) {
 		// If there is any padding of any kind, just zero init regardless of zero_init parameter
 		LLVMTypeKind kind = LLVMGetTypeKind(llvm_type);
diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp
index d904270fa..67beeca18 100644
--- a/src/llvm_backend_proc.cpp
+++ b/src/llvm_backend_proc.cpp
@@ -136,6 +136,8 @@ gb_internal lbProcedure *lb_create_procedure(lbModule *m, Entity *entity, bool i
 	p->context_stack.allocator     = a;
 	p->scope_stack.allocator       = a;
 	p->asan_stack_locals.allocator = a;
+	p->lifetime_locals.allocator   = a;
+	p->lifetime_scopes.allocator   = a;
 	// map_init(&p->selector_values,  0);
 	// map_init(&p->selector_addr,    0);
 	// map_init(&p->tuple_fix_map,    0);
@@ -462,6 +464,8 @@ gb_internal lbProcedure *lb_create_dummy_procedure(lbModule *m, String link_name
 	p->branch_blocks.allocator     = a;
 	p->context_stack.allocator     = a;
 	p->asan_stack_locals.allocator = a;
+	p->lifetime_locals.allocator   = a;
+	p->lifetime_scopes.allocator   = a;
 	map_init(&p->tuple_fix_map, 0);
 
 
diff --git a/src/llvm_backend_stmt.cpp b/src/llvm_backend_stmt.cpp
index a0f0f48a3..9ad012dce 100644
--- a/src/llvm_backend_stmt.cpp
+++ b/src/llvm_backend_stmt.cpp
@@ -292,7 +292,11 @@ gb_internal void lb_pop_target_list(lbProcedure *p) {
 	p->target_list = p->target_list->prev;
 }
 
-gb_internal void lb_open_scope(lbProcedure *p, Scope *s) {
+// NOTE: lifetime_scope=true means that this scope ends exactly where
+// lb_close_scope is called for it, which is what makes it safe to mark
+// named locals with llvm.lifetime.start/llvm.lifetime.end;
+// (it is NOT true for the scope a loop statement opens for its own variables)
+gb_internal void lb_open_scope(lbProcedure *p, Scope *s, bool lifetime_scope=false) {
 	lbModule *m = p->module;
 	if (m->debug_builder) {
 		LLVMMetadataRef curr_metadata = lb_get_llvm_metadata(m, s);
@@ -328,10 +332,11 @@ gb_internal void lb_open_scope(lbProcedure *p, Scope *s) {
 	p->curr_scope = s;
 	p->scope_index += 1;
 	array_add(&p->scope_stack, s);
-
+	array_add(&p->lifetime_scopes, lifetime_scope);
 }
 
 gb_internal void lb_close_scope(lbProcedure *p, lbDeferExitKind kind, lbBlock *block, Ast *node, bool pop_stack=true) {
+	GB_ASSERT(p->scope_stack.count == p->lifetime_scopes.count);
 	lb_emit_defer_stmts(p, kind, block, node);
 	GB_ASSERT(p->scope_index > 0);
 
@@ -352,6 +357,7 @@ gb_internal void lb_close_scope(lbProcedure *p, lbDeferExitKind kind, lbBlock *b
 
 	p->scope_index -= 1;
 	array_pop(&p->scope_stack);
+	array_pop(&p->lifetime_scopes);
 }
 
 gb_internal void lb_build_when_stmt(lbProcedure *p, AstWhenStmt *ws) {
@@ -2102,7 +2108,7 @@ gb_internal void lb_build_switch_stmt(lbProcedure *p, AstSwitchStmt *ss, Scope *
 		lb_start_block(p, body);
 
 		lb_push_target_list(p, ss->label, done, nullptr, fall);
-		lb_open_scope(p, body->scope);
+		lb_open_scope(p, body->scope, true);
 		lb_build_stmt_list(p, cc->stmts);
 		lb_close_scope(p, lbDeferExit_Default, body, clause);
 		lb_pop_target_list(p);
@@ -2120,7 +2126,7 @@ gb_internal void lb_build_switch_stmt(lbProcedure *p, AstSwitchStmt *ss, Scope *
 		lb_start_block(p, default_block);
 
 		lb_push_target_list(p, ss->label, done, nullptr, default_fall);
-		lb_open_scope(p, default_block->scope);
+		lb_open_scope(p, default_block->scope, true);
 		lb_build_stmt_list(p, default_stmts);
 		lb_close_scope(p, lbDeferExit_Default, default_block, default_clause);
 		lb_pop_target_list(p);
@@ -2308,7 +2314,7 @@ gb_internal void lb_build_type_switch_stmt(lbProcedure *p, AstTypeSwitchStmt *ss
 		ast_node(cc, CaseClause, clause);
 
 		Entity *case_entity = implicit_entity_of_node(clause);
-		lb_open_scope(p, cc->scope);
+		lb_open_scope(p, cc->scope, true);
 
 		if (cc->list.count == 0) {
 			lb_start_block(p, default_block);
@@ -2661,6 +2667,9 @@ gb_internal void lb_build_return_stmt(lbProcedure *p, Slice<Ast *> const &return
 						rw_mutex_shared_unlock(&p->module->values_mutex);
 						lb_emit_store(p, found, lb_emit_conv(p, res, e->type));
 					}
+					// lifetime ends are emitted in lb_emit_defer_stmts,
+					// but no defers run on this path, so call it explicitly
+					lb_emit_lifetime_ends(p, lbDeferExit_Return, nullptr);
 					LLVMBuildRetVoid(p->builder);
 					return;
 				}
@@ -3300,7 +3309,7 @@ gb_internal void lb_build_stmt(lbProcedure *p, Ast *node) {
 			tl->is_block = true;
 		}
 
-		lb_open_scope(p, bs->scope);
+		lb_open_scope(p, bs->scope, true);
 		lb_build_stmt_list(p, bs->stmts);
 		lb_close_scope(p, lbDeferExit_Default, nullptr, node);
 
@@ -3579,6 +3588,9 @@ gb_internal void lb_emit_defer_stmts(lbProcedure *p, lbDeferExitKind kind, lbBlo
 			}
 		}
 	}
+
+	// end lifetimes after the defer bodies, a defer may reference the locals
+	lb_emit_lifetime_ends(p, kind, block);
 }
 
 gb_internal void lb_emit_defer_stmts(lbProcedure *p, lbDeferExitKind kind, lbBlock *block, Ast *node) {
diff --git a/src/main.cpp b/src/main.cpp
index 3605717e7..d69b00259 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -430,6 +430,7 @@ enum BuildFlagKind {
 	BuildFlag_NoBoundsCheck,
 	BuildFlag_WebkitSwitchWorkaround,
 	BuildFlag_NoTypeAssert,
+	BuildFlag_LifetimeMarkers,
 	BuildFlag_NoDynamicLiterals,
 	BuildFlag_DynamicLiterals,
 	BuildFlag_NoCRT,
@@ -691,6 +692,7 @@ gb_internal bool parse_build_flags(Array<String> args) {
 	add_flag(&build_flags, BuildFlag_NoBoundsCheck,           str_lit("no-bounds-check"),           BuildFlagParam_None,    Command__does_check);
 	add_flag(&build_flags, BuildFlag_WebkitSwitchWorkaround,  str_lit("webkit-switch-workaround"),  BuildFlagParam_None,    Command__does_check);
 	add_flag(&build_flags, BuildFlag_NoTypeAssert,            str_lit("no-type-assert"),            BuildFlagParam_None,    Command__does_check);
+	add_flag(&build_flags, BuildFlag_LifetimeMarkers,         str_lit("lifetime-markers"),          BuildFlagParam_None,    Command__does_build);
 	add_flag(&build_flags, BuildFlag_NoThreadLocal,           str_lit("no-thread-local"),           BuildFlagParam_None,    Command__does_check);
 	add_flag(&build_flags, BuildFlag_NoDynamicLiterals,       str_lit("no-dynamic-literals"),       BuildFlagParam_None,    Command__does_check);
 	add_flag(&build_flags, BuildFlag_DynamicLiterals,         str_lit("dynamic-literals"),          BuildFlagParam_None,    Command__does_check);
@@ -1392,6 +1394,9 @@ gb_internal bool parse_build_flags(Array<String> args) {
 						case BuildFlag_NoTypeAssert:
 							build_context.no_type_assert = true;
 							break;
+						case BuildFlag_LifetimeMarkers:
+							build_context.lifetime_markers = true;
+							break;
 						case BuildFlag_NoDynamicLiterals:
 							gb_printf_err("Warning: Use of -no-dynamic-literals is now redundant\n");
 							break;
@@ -3055,6 +3060,14 @@ gb_internal int print_show_help(String const arg0, String command, String option
 	}
 
 	if (run_or_build) {
+		if (print_flag("-lifetime-markers")) {
+			print_usage_line(2, "Emits lifetime markers for named locals, so that locals from");
+			print_usage_line(2, "non-overlapping scopes may reuse stack.");
+			print_usage_line(2, "Requires '-o:size' or above; no effect with '-sanitize:address'.");
+			print_usage_line(2, "Warning: this applies to every package in the build; using the address");
+			print_usage_line(2, "of a local after the local's declaring scope ended can miscompile.");
+		}
+
 		if (print_flag("-linker:<string>")) {
 			print_usage_line(2, "Specify the linker to use.");
 			print_usage_line(2, "Choices:");
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index ff09d0275..ac25b4066 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -58,6 +58,8 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_sysv_abi.odin %COMMON%  || exit /b
 ..\..\..\odin build ..\test_issue_7073-1.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
 ..\..\..\odin test ..\test_issue_swizzle_multi_assign.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_lifetime_markers.odin %COMMON% -o:size -lifetime-markers  || exit /b
+..\..\..\odin test ..\test_lifetime_markers.odin %COMMON% -o:speed -lifetime-markers  || exit /b
 
 @echo off
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 565528ed8..42605abf4 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -171,6 +171,9 @@ else
 	$ODIN test ../test_issue_5640.odin -o:none $COMMON
 fi
 
+$ODIN test ../test_lifetime_markers.odin $COMMON -o:size -lifetime-markers
+$ODIN test ../test_lifetime_markers.odin $COMMON -o:speed -lifetime-markers
+
 set +x
 
 popd
diff --git a/tests/issues/test_lifetime_markers.odin b/tests/issues/test_lifetime_markers.odin
new file mode 100644
index 000000000..ba272d69a
--- /dev/null
+++ b/tests/issues/test_lifetime_markers.odin
@@ -0,0 +1,178 @@
+package test_issues
+
+import "core:testing"
+
+// tests the -lifetime-markers compiler flag
+
+
+peek :: #force_no_inline proc(buf: ^[8]int, i: int) -> int {
+	return buf[i]
+}
+
+@(test)
+test_defer_reads_local :: proc(t: ^testing.T) {
+	v := 0
+	{
+		buf: [8]int
+		defer v = peek(&buf, 3)
+		buf[3] = 42
+	}
+	testing.expect_value(t, v, 42)
+}
+
+@(test)
+test_return_from_nested :: proc(t: ^testing.T) {
+
+	early_return :: proc(out: ^int, early_out: bool) {
+		buf: [8]int
+		defer out^ = peek(&buf, 5)
+		{
+			buf[5] = 42
+			if early_out {
+				return
+			}
+		}
+		buf[5] = 43
+	}
+
+	r := 0
+	early_return(&r, true)
+	testing.expect_value(t, r, 42)
+	early_return(&r, false)
+	testing.expect_value(t, r, 43)
+}
+
+@(test)
+test_break_out_of_nested :: proc(t: ^testing.T) {
+	total := 0
+	outer: for i in 0 ..< 4 {
+		for j in 0 ..< 4 {
+			buf: [8]int
+			defer total += peek(&buf, 0)
+			buf[0] = i*10 + j
+			if j == 2 {
+				break outer
+			}
+		}
+	}
+	// i == 0, j == 0, 1, 2
+	testing.expect_value(t, total, 3)
+}
+
+@(test)
+test_continue_defer :: proc(t: ^testing.T) {
+	total := 0
+	for i in 0 ..< 4 {
+		buf: [8]int
+		defer total += peek(&buf, 4)
+		buf[4] = i
+		if i % 2 == 0 {
+			continue
+		}
+		buf[4] = 100 + i
+	}
+	// 0 + 101 + 2 + 103
+	testing.expect_value(t, total, 206)
+}
+
+@(test)
+test_switch_cases :: proc(t: ^testing.T) {
+
+	switch_cases :: proc(x: int) -> int {
+		r := 0
+		switch x {
+		case 1:
+			a: [8]int
+			defer r += peek(&a, 0)
+			a[0] = 5
+			fallthrough
+		case 2:
+			b: [8]int
+			defer r += peek(&b, 1)
+			b[1] = 7
+		}
+		return r
+	}
+
+	testing.expect_value(t, switch_cases(1), 12)
+	testing.expect_value(t, switch_cases(2), 7)
+	testing.expect_value(t, switch_cases(3), 0)
+}
+
+
+@(test)
+test_type_switch_cases :: proc(t: ^testing.T) {
+
+	Value :: union {
+		int,
+		[8]int,
+	}
+
+	type_switch_cases :: proc(v: Value) -> int {
+		r := 0
+		switch x in v {
+		case [8]int:
+			copied := x
+			defer r = peek(&copied, 2)
+			copied[2] += 1
+		case int:
+			r = x
+		}
+		return r
+	}
+
+	v: Value = [8]int{2 = 9}
+	testing.expect_value(t, type_switch_cases(v), 10)
+	v = 3
+	testing.expect_value(t, type_switch_cases(v), 3)
+}
+
+@(test)
+test_or_return_runs_defer :: proc(t: ^testing.T) {
+
+	or_return_helper :: proc(out: ^int, ok: bool) -> bool {
+
+		f :: #force_no_inline proc(b: bool) -> bool {
+			return b
+		}
+
+		buf: [8]int
+		defer out^ = peek(&buf, 2)
+		buf[2] = 31
+		f(ok) or_return
+		buf[2] = 32
+		return true
+	}
+
+	r := 0
+	testing.expect_value(t, or_return_helper(&r, false), false)
+	testing.expect_value(t, r, 31)
+	testing.expect_value(t, or_return_helper(&r, true), true)
+	testing.expect_value(t, r, 32)
+}
+
+@(test)
+test_sret_forwarding :: proc(t: ^testing.T) {
+
+	Big :: struct {
+		data: [32]int,
+	}
+
+	make_big :: #force_no_inline proc(src: ^[32]int) -> (b: Big) {
+		b.data = src^
+		return
+	}
+
+	init_big :: proc() -> Big {
+		tmp: [32]int
+		for i in 0 ..< 32 {
+			tmp[i] = i * 3
+		}
+		tmp[7] = 1234
+		return make_big(&tmp)
+	}
+
+	b := init_big()
+	testing.expect_value(t, b.data[7], 1234)
+	testing.expect_value(t, b.data[31], 93)
+}

From 36c1173df6440098364998af12a23d01ffe8997c Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Mon, 21 Sep 2026 16:52:33 +0200
Subject: [PATCH 015/215] Fix #7547

---
 core/os/file_windows.odin         |  33 ++++++
 core/os/path_windows.odin         |   8 +-
 core/sys/windows/types.odin       |   2 +
 tests/issues/run.bat              |   1 +
 tests/issues/run.sh               |   2 +
 tests/issues/test_issue_7547.odin | 169 ++++++++++++++++++++++++++++++
 6 files changed, 211 insertions(+), 4 deletions(-)
 create mode 100644 tests/issues/test_issue_7547.odin

diff --git a/core/os/file_windows.odin b/core/os/file_windows.odin
index ab1209c5b..ead220a77 100644
--- a/core/os/file_windows.odin
+++ b/core/os/file_windows.odin
@@ -913,6 +913,39 @@ win32_utf8_to_utf16 :: proc(s: string, allocator: runtime.Allocator) -> (ws: []u
 	return
 }
 
+// Used for `SHFILEOPSTRUCTW`, which requires double-null-terminated strings (`PCZZWSTR`).
+@(private="package", require_results)
+win32_utf8_to_pczzwstr :: proc(s: string, allocator: runtime.Allocator) -> (ws: win32.PCZZWSTR, err: Error) {
+	if len(s) < 1 {
+		// We still need to provide a double-null-terminated empty string.
+		t := make([]u16, 2, allocator) or_return
+		ws = cast(win32.PCZZWSTR)raw_data(t)
+		return
+	}
+
+	b := transmute([]byte)s
+	cstr := raw_data(b)
+	n := win32.MultiByteToWideChar(win32.CP_UTF8, win32.MB_ERR_INVALID_CHARS, cstr, i32(len(s)), nil, 0)
+	if n == 0 {
+		err = _get_platform_error()
+		return
+	}
+
+	text := make([]u16, n+2, allocator) or_return
+
+	n1 := win32.MultiByteToWideChar(win32.CP_UTF8, win32.MB_ERR_INVALID_CHARS, cstr, i32(len(s)), raw_data(text), n)
+	if n1 == 0 {
+		err = _get_platform_error()
+		delete(text, allocator)
+		return
+	}
+
+	text[n+1] = 0
+	text[n] = 0
+	ws = cast(win32.PCZZWSTR)raw_data(text)
+	return
+}
+
 @(private="package", require_results)
 win32_wstring_to_utf8 :: proc(s: cstring16, allocator: runtime.Allocator) -> (res: string, err: runtime.Allocator_Error) {
 	if s == nil || s == "" {
diff --git a/core/os/path_windows.odin b/core/os/path_windows.odin
index 753f1665f..1e98d704e 100644
--- a/core/os/path_windows.odin
+++ b/core/os/path_windows.odin
@@ -90,19 +90,19 @@ _remove_all :: proc(path: string) -> Error {
 	if !_is_absolute_path(path) {
 		abs_path = _get_absolute_path(path, temp_allocator) or_return
 	}
-	dir := win32_utf8_to_wstring(abs_path, temp_allocator) or_return
 
-	empty: [1]u16
+	// NOTE: The path `dir` must be double-null-terminated (`PCZZWSTR`).
+	dir := win32_utf8_to_pczzwstr(abs_path, temp_allocator) or_return
 
 	file_op := win32.SHFILEOPSTRUCTW {
 		nil,
 		win32.FO_DELETE,
 		dir,
-		cstring16(&empty[0]),
+		nil,
 		win32.FOF_NOCONFIRMATION | win32.FOF_NOERRORUI | win32.FOF_SILENT,
 		false,
 		nil,
-		cstring16(&empty[0]),
+		nil,
 	}
 	res := win32.SHFileOperationW(&file_op)
 	if res != 0 {
diff --git a/core/sys/windows/types.odin b/core/sys/windows/types.odin
index c3d47ef95..00586e240 100644
--- a/core/sys/windows/types.odin
+++ b/core/sys/windows/types.odin
@@ -1724,6 +1724,8 @@ NM_FONTCHANGED          :: NM_OUTOFMEMORY-22
 NM_CUSTOMTEXT           :: NM_OUTOFMEMORY-23 // uses NMCUSTOMTEXT struct
 NM_TVSTATEIMAGECHANGING :: NM_OUTOFMEMORY-23 // uses NMTVSTATEIMAGECHANGING struct, defined after HTREEITEM
 
+// Pointer to a double-null-terminated string.
+// Special care must be taken when converting to this type.
 PCZZWSTR :: cstring16
 
 SHFILEOPSTRUCTW :: struct {
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index ff09d0275..3da3c8174 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -58,6 +58,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_sysv_abi.odin %COMMON%  || exit /b
 ..\..\..\odin build ..\test_issue_7073-1.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
 ..\..\..\odin test ..\test_issue_swizzle_multi_assign.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_7547.odin %COMMON%  || exit /b
 
 @echo off
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 7cd74fcda..0a381eb56 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -180,6 +180,8 @@ else
 	$ODIN test ../test_issue_5640.odin -o:none $COMMON
 fi
 
+$ODIN test ../test_issue_7547.odin $COMMON
+
 set +x
 
 popd
diff --git a/tests/issues/test_issue_7547.odin b/tests/issues/test_issue_7547.odin
new file mode 100644
index 000000000..d33de64b1
--- /dev/null
+++ b/tests/issues/test_issue_7547.odin
@@ -0,0 +1,169 @@
+// Tests issue #7547 https://github.com/odin-lang/Odin/issues/7547 (win32 implementation of `os.remove_all`)
+#+build windows
+package test_issues
+
+import runtime "base:runtime"
+import testing "core:testing"
+import filepath "core:path/filepath"
+import fmt "core:fmt"
+import slice "core:slice"
+import os "core:os"
+import win32 "core:sys/windows"
+
+@(test)
+test_issue_7547 :: proc(t: ^testing.T) {
+	// Test first that `os.remove_all` works at all to avoid false positives.
+	root, root_error := os.make_directory_temp("", "odin-issue-7547-*", context.temp_allocator)
+	if root_error != nil {
+		testing.fail_now(t, "could not create temporary directory")
+	}
+	nested, nested_error := filepath.join({root, "nested"}, context.temp_allocator)
+	if nested_error != nil {
+		testing.fail_now(t, "could not construct nested directory path")
+	}
+	if directory_error := os.make_directory_all(nested); directory_error != nil {
+		testing.fail_now(t, "could not create nested directory")
+	}
+	leaf, leaf_error := filepath.join({nested, "file.txt"}, context.temp_allocator)
+	if leaf_error != nil {
+		testing.fail_now(t, "could not construct leaf file path")
+	}
+	if write_error := os.write_entire_file(leaf, "issue 7547\n"); write_error != nil {
+		testing.fail_now(t, "could not create leaf file")
+	}
+
+	{
+		err := os.remove(root)
+		testing.expect(t, err != nil, fmt.aprintf("os.remove should not have been able to delete a non-empty directory.", allocator = context.temp_allocator))
+	}
+
+	{
+		remove_error := os.remove_all(root)
+		testing.expect(t, remove_error == nil, fmt.aprintf("os.remove_all failed to remove non-empty directory.", allocator = context.temp_allocator))
+		testing.expect(t, !os.exists(root), fmt.aprintf("os.remove_all left the tree behind", allocator = context.temp_allocator))
+	}
+}
+
+// On Windows, os.remove_all hands its converted path to SHFileOperationW,
+// which reads a double-NUL-terminated path list. The conversion produced a
+// single terminator, so the shell operation scanned past the buffer until it
+// found a zero u16 somewhere behind it — undefined behaviour that surfaces as
+// a returned error, a fatal access violation, or a livelock once the scan
+// leaves the arena block. Fresh arena memory is zero-filled, which hides the
+// scan from small isolated programs; this test drives the thread's core:os
+// temporary arena and the heap through enough churn, on the test runner's
+// worker thread, to place the converted path in front of recycled non-zero
+// bytes, which is how the crash manifests in real test suites.
+@(test)
+test_issue_7547_dirty :: proc(t: ^testing.T) {
+	pointers := make_dynamic_array_len_cap([dynamic]string, 0, 2000, context.allocator)
+	defer {
+		for p in pointers {
+			delete(p, context.allocator)
+		}
+		delete(pointers)
+	}
+
+	for iteration in 0..<64 {
+		root, root_error := os.make_directory_temp("", "odin-issue-7547-*", context.allocator)
+		if root_error != nil {
+			testing.fail_now(t, "could not create temporary directory")
+		}
+		append(&pointers, root)
+		nested, nested_error := filepath.join({root, "nested"}, context.allocator)
+		if nested_error != nil {
+			testing.fail_now(t, "could not construct nested directory path")
+		}
+		append(&pointers, nested)
+		if directory_error := os.make_directory_all(nested); directory_error != nil {
+			testing.fail_now(t, "could not create nested directory")
+		}
+		leaf, leaf_error := filepath.join({nested, "file.txt"}, context.allocator)
+		if leaf_error != nil {
+			testing.fail_now(t, "could not construct leaf file path")
+		}
+		append(&pointers, leaf)
+		if write_error := os.write_entire_file(leaf, "issue 7547\n"); write_error != nil {
+			testing.fail_now(t, "could not create leaf file")
+		}
+
+		// Grow and recycle both allocators with path-shaped data so the
+		// temporary arena has handed back, and the heap has reused,
+		// non-zero memory behind the arena's current position.
+		for scale in 0..<8 {
+			garbage := fmt.aprintf("C:\\%s\\%d", root, scale*iteration, allocator=context.allocator)
+			_, _ = os.lstat(garbage, context.allocator)
+			delete(garbage, context.allocator)
+		}
+
+		remove_error := os.remove_all(root)
+		testing.expect(t, remove_error == nil, fmt.aprintf("os.remove_all failed on iteration %d", iteration, allocator=context.temp_allocator))
+		testing.expect(t, !os.exists(root), fmt.aprintf("os.remove_all left the tree behind on iteration %d", iteration, allocator=context.temp_allocator))
+	}
+}
+
+@(test)
+test_issue_7547_internal :: proc(t: ^testing.T) {
+	{
+		dir, err := win32_utf8_to_pczzwstr_core("PATH")
+		testing.expect_value(t, err, nil)
+		testing.expect_value(t, len(dir), 6)
+		testing.expect(t, slice.equal(dir, []u16{'P', 'A', 'T', 'H', 0, 0}))
+	}
+
+	{
+		dir, err := win32_utf8_to_pczzwstr_core("")
+		testing.expect_value(t, err, nil)
+		testing.expect_value(t, len(dir), 2)
+		testing.expect(t, slice.equal(dir, []u16{0, 0}))
+	}
+
+	{
+		chinese_text := "你好"
+		testing.expect(t, len(transmute([]u8)chinese_text) != 2)
+		dir, err := win32_utf8_to_pczzwstr_core(chinese_text)
+		testing.expect_value(t, err, nil)
+		testing.expect_value(t, len(dir), 4)
+		testing.expect(t, slice.equal(dir, []u16{'你', '好', 0, 0}))
+	}
+
+	{
+		invalid_utf8 := transmute(string)[]u8 { 0xC0, 0xAF } // overlong "/"
+		dir, err := win32_utf8_to_pczzwstr_core(invalid_utf8)
+		testing.expect(t, err != nil)
+		testing.expect_value(t, len(dir), 0)
+	}
+
+}
+
+// Used for `SHFILEOPSTRUCTW`, which requires double-null-terminated strings (`PCZZWSTR`).
+@(private="package", require_results)
+win32_utf8_to_pczzwstr_core :: proc(s: string, allocator: runtime.Allocator = context.temp_allocator) -> (ws: []u16, err: os.Error) {
+	if len(s) < 1 {
+		// We still need to provide a double-null-terminated empty string.
+		t := make([]u16, 2, allocator) or_return
+		ws = t
+		return
+	}
+
+	b := transmute([]byte)s
+	cstr := raw_data(b)
+	n := win32.MultiByteToWideChar(win32.CP_UTF8, win32.MB_ERR_INVALID_CHARS, cstr, i32(len(s)), nil, 0)
+	if n == 0 {
+		err = os.Platform_Error.GEN_FAILURE
+		return
+	}
+
+	text := make([]u16, n+2, allocator) or_return
+
+	n1 := win32.MultiByteToWideChar(win32.CP_UTF8, win32.MB_ERR_INVALID_CHARS, cstr, i32(len(s)), raw_data(text), n)
+	if n1 == 0 {
+		err = os.Platform_Error.GEN_FAILURE
+		delete(text, allocator)
+		return
+	}
+
+	text[n+1] = 0
+	text[n] = 0
+	return text, nil
+}

From ba3ddfadccd261d62830a2ea561e144b1ecc7ee7 Mon Sep 17 00:00:00 2001
From: jack gleeson <jack@jpgleeson.com>
Date: Wed, 16 Sep 2026 15:27:31 -0600
Subject: [PATCH 016/215] [core/c] Fix size of fastX int types per different
 archs/OSes

---
 core/c/c.odin | 115 +++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 96 insertions(+), 19 deletions(-)

diff --git a/core/c/c.odin b/core/c/c.odin
index cbff10e66..70a5b172f 100644
--- a/core/c/c.odin
+++ b/core/c/c.odin
@@ -49,32 +49,109 @@ uint_least32_t :: builtin.u32
 int_least64_t  :: builtin.i64
 uint_least64_t :: builtin.u64
 
-// Same on Windows, Linux, and FreeBSD
+// 7.18.1.3 Fastest minimum-width integer types
+// Linux (glibc only, musl matches BSD spec)
+// https://sourceware.org/cgit/glibc/tree/stdlib/stdint.h
+// *BSD
+// https://cgit.freebsd.org/src/tree/sys/x86/include/_types.h
+// https://cgit.freebsd.org/src/tree/sys/i386/include/_types.h
+// Darwin
+// https://github.com/apple-oss-distributions/Libc/blob/main/include/stdint.h
+//
 when ODIN_ARCH == .i386 {
-	int_fast8_t    :: builtin.i8
-	uint_fast8_t   :: builtin.u8
-	int_fast16_t   :: builtin.i32
-	uint_fast16_t  :: builtin.u32
-	int_fast32_t   :: builtin.i32
-	uint_fast32_t  :: builtin.u32
+	when ODIN_OS == .FreeBSD || ODIN_OS == .OpenBSD || ODIN_OS == .NetBSD { // https://cgit.freebsd.org/src/tree/sys/i386/include/_types.h
+		int_fast8_t    :: builtin.i32
+		uint_fast8_t   :: builtin.u32
+		int_fast16_t   :: builtin.i32
+		uint_fast16_t  :: builtin.u32
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	} else when ODIN_OS == .Darwin { // https://github.com/apple-oss-distributions/Libc/blob/main/include/stdint.h#L39
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: builtin.i16
+		uint_fast16_t  :: builtin.u16
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	} else {
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: builtin.i32
+		uint_fast16_t  :: builtin.u32
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	}
 	int_fast64_t   :: builtin.i64
 	uint_fast64_t  :: builtin.u64
 } else when ODIN_ARCH == .amd64 {
-	int_fast8_t    :: builtin.i8
-	uint_fast8_t   :: builtin.u8
-	int_fast16_t   :: long
-	uint_fast16_t  :: ulong
-	int_fast32_t   :: long
-	uint_fast32_t  :: ulong
+	when ODIN_OS == .FreeBSD || ODIN_OS == .OpenBSD || ODIN_OS == .NetBSD { // https://cgit.freebsd.org/src/tree/sys/x86/include/_types.h#n66
+		int_fast8_t    :: builtin.i32
+		uint_fast8_t   :: builtin.u32
+		int_fast16_t   :: builtin.i32
+		uint_fast16_t  :: builtin.u32
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	} else when ODIN_OS == .Darwin {
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: builtin.i16
+		uint_fast16_t  :: builtin.u16
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	} else when ODIN_OS == .Windows {
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: builtin.i32
+		uint_fast16_t  :: builtin.u32
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	} else when ODIN_OS == .Linux {
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: long // todo: musl is i32 to match BSD spec. No way to target it yet
+		uint_fast16_t  :: ulong
+		int_fast32_t   :: long
+		uint_fast32_t  :: ulong
+	} else {
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: builtin.i32
+		uint_fast16_t  :: builtin.u32
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	}
 	int_fast64_t   :: builtin.i64
 	uint_fast64_t  :: builtin.u64
 } else {
-	int_fast8_t    :: builtin.i8
-	uint_fast8_t   :: builtin.u8
-	int_fast16_t   :: builtin.i16
-	uint_fast16_t  :: builtin.u16
-	int_fast32_t   :: builtin.i32
-	uint_fast32_t  :: builtin.u32
+	when ODIN_OS == .FreeBSD || ODIN_OS == .OpenBSD || ODIN_OS == .NetBSD {
+		int_fast8_t    :: builtin.i32
+		uint_fast8_t   :: builtin.u32
+		int_fast16_t   :: builtin.i32
+		uint_fast16_t  :: builtin.u32
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	} else when ODIN_OS == .Darwin {
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: builtin.i16
+		uint_fast16_t  :: builtin.u16
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	} else when ODIN_OS == .Linux {
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: long // todo: musl is i32 to match BSD spec. No way to target it yet
+		uint_fast16_t  :: ulong
+		int_fast32_t   :: long
+		uint_fast32_t  :: ulong
+	} else {
+		int_fast8_t    :: builtin.i8
+		uint_fast8_t   :: builtin.u8
+		int_fast16_t   :: builtin.i32
+		uint_fast16_t  :: builtin.u32
+		int_fast32_t   :: builtin.i32
+		uint_fast32_t  :: builtin.u32
+	}
 	int_fast64_t   :: builtin.i64
 	uint_fast64_t  :: builtin.u64
 }

From f9ea2407b8ca2787e8f142f07f68e185eeda523c Mon Sep 17 00:00:00 2001
From: jack gleeson <jack@jpgleeson.com>
Date: Wed, 16 Sep 2026 15:41:12 -0600
Subject: [PATCH 017/215] Add tests for fastint widths - essentially just
 asserts but helpful for regression

---
 .../c/libc/test_core_libc_fastint_width.odin  | 53 +++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 tests/core/c/libc/test_core_libc_fastint_width.odin

diff --git a/tests/core/c/libc/test_core_libc_fastint_width.odin b/tests/core/c/libc/test_core_libc_fastint_width.odin
new file mode 100644
index 000000000..9d4146c63
--- /dev/null
+++ b/tests/core/c/libc/test_core_libc_fastint_width.odin
@@ -0,0 +1,53 @@
+package test_core_libc
+
+import "core:c"
+import "core:testing"
+
+@test
+test_libc_fastint_width :: proc(t: ^testing.T) {
+	when ODIN_OS == .FreeBSD || ODIN_OS == .OpenBSD || ODIN_OS == .NetBSD {
+		testing.expect_value(t, size_of(c.int_fast8_t), 4)
+		testing.expect_value(t, size_of(c.uint_fast8_t), 4)
+		testing.expect_value(t, size_of(c.int_fast16_t), 4)
+		testing.expect_value(t, size_of(c.uint_fast16_t), 4)
+		testing.expect_value(t, size_of(c.int_fast32_t), 4)
+		testing.expect_value(t, size_of(c.uint_fast32_t), 4)
+	} else when ODIN_OS == .Darwin {
+		testing.expect_value(t, size_of(c.int_fast8_t), 1)
+		testing.expect_value(t, size_of(c.uint_fast8_t), 1)
+		testing.expect_value(t, size_of(c.int_fast16_t), 2)
+		testing.expect_value(t, size_of(c.uint_fast16_t), 2)
+		testing.expect_value(t, size_of(c.int_fast32_t), 4)
+		testing.expect_value(t, size_of(c.uint_fast32_t), 4)
+	} else when ODIN_OS == .Linux {
+		testing.expect_value(t, size_of(c.int_fast8_t), 1)
+		testing.expect_value(t, size_of(c.uint_fast8_t), 1)
+		when size_of(rawptr) == 8 { // glibc only - broken for musl
+			testing.expect_value(t, size_of(c.int_fast16_t), 8)
+			testing.expect_value(t, size_of(c.uint_fast16_t), 8)
+			testing.expect_value(t, size_of(c.int_fast32_t), 8)
+			testing.expect_value(t, size_of(c.uint_fast32_t), 8)
+		} else {
+			testing.expect_value(t, size_of(c.int_fast16_t), 4)
+			testing.expect_value(t, size_of(c.uint_fast16_t), 4)
+			testing.expect_value(t, size_of(c.int_fast32_t), 4)
+			testing.expect_value(t, size_of(c.uint_fast32_t), 4)
+		}
+	} else when ODIN_OS == .Windows {
+		testing.expect_value(t, size_of(c.int_fast8_t), 1)
+		testing.expect_value(t, size_of(c.uint_fast8_t), 1)
+		testing.expect_value(t, size_of(c.int_fast16_t), 4)
+		testing.expect_value(t, size_of(c.uint_fast16_t), 4)
+		testing.expect_value(t, size_of(c.int_fast32_t), 4)
+		testing.expect_value(t, size_of(c.uint_fast32_t), 4)
+	} else {
+		testing.expect_value(t, size_of(c.int_fast8_t), 1)
+		testing.expect_value(t, size_of(c.uint_fast8_t), 1)
+		testing.expect_value(t, size_of(c.int_fast16_t), 4)
+		testing.expect_value(t, size_of(c.uint_fast16_t), 4)
+		testing.expect_value(t, size_of(c.int_fast32_t), 4)
+		testing.expect_value(t, size_of(c.uint_fast32_t), 4)
+	}
+	testing.expect_value(t, size_of(c.int_fast64_t), 8)
+	testing.expect_value(t, size_of(c.uint_fast64_t), 8)
+}

From 9f9d7f7f55b4a67295398e0d6d6a53364f7d8cc0 Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Fri, 25 Sep 2026 11:55:36 +0200
Subject: [PATCH 018/215] ported Eisel-Lemire's fast float algorithm to odin

also fixed string the float conversion producing wrong results.
---
 core/strconv/LICENSE_fast_float           |  31 +
 core/strconv/fast_float.odin              | 784 ++++++++++++++++++++++
 core/strconv/strconv.odin                 | 112 +++-
 tests/core/strconv/test_core_strconv.odin | 111 ++-
 4 files changed, 1003 insertions(+), 35 deletions(-)
 create mode 100644 core/strconv/LICENSE_fast_float
 create mode 100644 core/strconv/fast_float.odin

diff --git a/core/strconv/LICENSE_fast_float b/core/strconv/LICENSE_fast_float
new file mode 100644
index 000000000..8ddef69e7
--- /dev/null
+++ b/core/strconv/LICENSE_fast_float
@@ -0,0 +1,31 @@
+This license applies to the Eisel-Lemire code and the _POW5_128 table in
+fast_float.odin, which are ported from ffc.h and fast_float.
+
+  ffc.h:      https://github.com/kolemannix/ffc.h
+  fast_float: https://github.com/fastfloat/fast_float
+
+Copyright (c) 2021 The fast_float authors
+
+Boost Software License - Version 1.0 - August 17th, 2003
+
+Permission is hereby granted, free of charge, to any person or organization
+obtaining a copy of the software and accompanying documentation covered by
+this license (the "Software") to use, reproduce, display, distribute,
+execute, and transmit the Software, and to prepare derivative works of the
+Software, and to permit third-parties to whom the Software is furnished to
+do so, all subject to the following:
+
+The copyright notices in the Software and this entire statement, including
+the above license grant, this restriction and the following disclaimer,
+must be included in all copies of the Software, in whole or in part, and
+all derivative works of the Software, unless such copies or derivative
+works are solely in the form of machine-executable object code generated by
+a source language processor.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.
diff --git a/core/strconv/fast_float.odin b/core/strconv/fast_float.odin
new file mode 100644
index 000000000..a68184cad
--- /dev/null
+++ b/core/strconv/fast_float.odin
@@ -0,0 +1,784 @@
+package strconv
+
+import "core:math/bits"
+
+/*
+	Eisel-Lemire decimal to binary conversion.
+
+	Ported from ffc.h (https://github.com/kolemannix/ffc.h)
+	Made available under the Boost Software License 1.0,
+	see LICENSE_fast_float in this package.
+
+	List of contributors:
+		Daniel Lemire, João Paulo Magalhaes: Original fast_float implementation
+		Koleman Nix:                         C port (ffc.h)
+*/
+
+/*
+	References:
+	- Daniel Lemire, "Number Parsing at a Gigabyte per Second",
+	  Software: Practice and Experience 51 (8), 2021. https://arxiv.org/abs/2101.11408
+	- Noble Mushtak, Daniel Lemire, "Fast Number Parsing Without Fallback",
+	  Software: Practice and Experience 53 (7), 2023. https://arxiv.org/abs/2212.06644
+*/
+
+@(private="file")
+_POW5_128_MIN_EXP :: -342
+
+/*
+Computes the `T` closest to `w * 10^q`, rounding ties to even.
+
+`w` must be the exact decimal significand. When the input had more digits than fit
+in a `u64`, call this with both the truncated significand `w` and `w + 1`: if both
+calls return the same bits, the result is correct. Otherwise, use a slow path.
+
+**Inputs**
+- T: `f32` or `f64`
+- q: The decimal exponent
+- w: The decimal significand
+
+**Returns**
+- The IEEE-754 bit pattern of the result, without the sign bit. An overflow gives the bit pattern of infinity.
+*/
+fast_float_compute_float :: proc "contextless" ($T: typeid, q: int, w: u64) -> u64 where T == f32 || T == f64 #no_bounds_check {
+	when T == f64 {
+		MANT_BITS          :: 52
+		MIN_EXPONENT       :: -1023
+		INFINITE_POWER     :: 0x7ff
+		SMALLEST_POW10     :: -342
+		LARGEST_POW10      :: 308
+		MIN_EXP_ROUND_EVEN :: -4
+		MAX_EXP_ROUND_EVEN :: 23
+	} else {
+		MANT_BITS          :: 23
+		MIN_EXPONENT       :: -127
+		INFINITE_POWER     :: 0xff
+		SMALLEST_POW10     :: -64
+		LARGEST_POW10      :: 38
+		MIN_EXP_ROUND_EVEN :: -17
+		MAX_EXP_ROUND_EVEN :: 10
+	}
+
+	// w <= max(u64) and q < SMALLEST_POW10 always rounds to zero.
+	if w == 0 || q < SMALLEST_POW10 {
+		return 0
+	}
+	if q > LARGEST_POW10 {
+		return INFINITE_POWER << MANT_BITS
+	}
+
+	lz := bits.count_leading_zeros(w)
+	wn := w << lz // normalized so the top bit is set
+
+	// Compute a 128-bit approximation of wn * 5^q. We need the product to be accurate
+	// to MANT_BITS+3 bits. If the lower bits of the high word are all ones, the error
+	// in the first product could affect them, so we refine the result with the lower
+	// half of the power of five.
+	PRECISION_MASK :: max(u64) >> (MANT_BITS + 3)
+	pow5 := &_POW5_128[q - _POW5_128_MIN_EXP]
+	hi, lo := bits.mul_u64(wn, pow5[0])
+	if hi & PRECISION_MASK == PRECISION_MASK {
+		hi2, _ := bits.mul_u64(wn, pow5[1])
+		lo += hi2
+		if hi2 > lo {
+			hi += 1
+		}
+	}
+	// Mushtak & Lemire (2023) prove that this product is always accurate enough.
+
+	upperbit := int(hi >> 63)
+	shift    := uint(upperbit + 64 - MANT_BITS - 3)
+	mantissa := hi >> shift
+	// ((152170 + 65536) * q) >> 16 is floor(q * log2(10)) for |q| < 1650.
+	power2   := (((152170 + 65536) * q) >> 16) + 63 + upperbit - int(lz) - MIN_EXPONENT
+
+	if power2 <= 0 {
+		// Subnormal result.
+		if -power2 + 1 >= 64 {
+			return 0
+		}
+		mantissa >>= uint(-power2 + 1)
+		mantissa += mantissa & 1 // round up
+		mantissa >>= 1
+		// Rounding up can give the smallest normal number. Then the hidden bit
+		// is set, and it is also the lowest bit of the exponent.
+		return mantissa
+	}
+
+	// We usually round up. If the value is exactly halfway between two floats,
+	// and the lower float is even, we must round down. An exact halfway value is
+	// possible only for a small range of exponents.
+	if lo <= 1 && q >= MIN_EXP_ROUND_EVEN && q <= MAX_EXP_ROUND_EVEN && mantissa & 3 == 1 {
+		if mantissa << shift == hi {
+			mantissa &~= 1
+		}
+	}
+	mantissa += mantissa & 1 // round up
+	mantissa >>= 1
+	if mantissa >= 2 << MANT_BITS {
+		mantissa = 1 << MANT_BITS
+		power2 += 1
+	}
+	mantissa &~= 1 << MANT_BITS
+	if power2 >= INFINITE_POWER {
+		return INFINITE_POWER << MANT_BITS
+	}
+	return mantissa | u64(power2) << MANT_BITS
+}
+
+// 128-bit truncated mantissas of 5^-342 to 5^308, with the most significant
+// bit set. Generated by fast_float script/table_generation.py.
+@(private="file", rodata)
+_POW5_128 := [651][2]u64{
+	{0xeef453d6923bd65a, 0x113faa2906a13b3f}, // 5^-342
+	{0x9558b4661b6565f8, 0x4ac7ca59a424c507}, // 5^-341
+	{0xbaaee17fa23ebf76, 0x5d79bcf00d2df649}, // 5^-340
+	{0xe95a99df8ace6f53, 0xf4d82c2c107973dc}, // 5^-339
+	{0x91d8a02bb6c10594, 0x79071b9b8a4be869}, // 5^-338
+	{0xb64ec836a47146f9, 0x9748e2826cdee284}, // 5^-337
+	{0xe3e27a444d8d98b7, 0xfd1b1b2308169b25}, // 5^-336
+	{0x8e6d8c6ab0787f72, 0xfe30f0f5e50e20f7}, // 5^-335
+	{0xb208ef855c969f4f, 0xbdbd2d335e51a935}, // 5^-334
+	{0xde8b2b66b3bc4723, 0xad2c788035e61382}, // 5^-333
+	{0x8b16fb203055ac76, 0x4c3bcb5021afcc31}, // 5^-332
+	{0xaddcb9e83c6b1793, 0xdf4abe242a1bbf3d}, // 5^-331
+	{0xd953e8624b85dd78, 0xd71d6dad34a2af0d}, // 5^-330
+	{0x87d4713d6f33aa6b, 0x8672648c40e5ad68}, // 5^-329
+	{0xa9c98d8ccb009506, 0x680efdaf511f18c2}, // 5^-328
+	{0xd43bf0effdc0ba48, 0x0212bd1b2566def2}, // 5^-327
+	{0x84a57695fe98746d, 0x014bb630f7604b57}, // 5^-326
+	{0xa5ced43b7e3e9188, 0x419ea3bd35385e2d}, // 5^-325
+	{0xcf42894a5dce35ea, 0x52064cac828675b9}, // 5^-324
+	{0x818995ce7aa0e1b2, 0x7343efebd1940993}, // 5^-323
+	{0xa1ebfb4219491a1f, 0x1014ebe6c5f90bf8}, // 5^-322
+	{0xca66fa129f9b60a6, 0xd41a26e077774ef6}, // 5^-321
+	{0xfd00b897478238d0, 0x8920b098955522b4}, // 5^-320
+	{0x9e20735e8cb16382, 0x55b46e5f5d5535b0}, // 5^-319
+	{0xc5a890362fddbc62, 0xeb2189f734aa831d}, // 5^-318
+	{0xf712b443bbd52b7b, 0xa5e9ec7501d523e4}, // 5^-317
+	{0x9a6bb0aa55653b2d, 0x47b233c92125366e}, // 5^-316
+	{0xc1069cd4eabe89f8, 0x999ec0bb696e840a}, // 5^-315
+	{0xf148440a256e2c76, 0xc00670ea43ca250d}, // 5^-314
+	{0x96cd2a865764dbca, 0x380406926a5e5728}, // 5^-313
+	{0xbc807527ed3e12bc, 0xc605083704f5ecf2}, // 5^-312
+	{0xeba09271e88d976b, 0xf7864a44c633682e}, // 5^-311
+	{0x93445b8731587ea3, 0x7ab3ee6afbe0211d}, // 5^-310
+	{0xb8157268fdae9e4c, 0x5960ea05bad82964}, // 5^-309
+	{0xe61acf033d1a45df, 0x6fb92487298e33bd}, // 5^-308
+	{0x8fd0c16206306bab, 0xa5d3b6d479f8e056}, // 5^-307
+	{0xb3c4f1ba87bc8696, 0x8f48a4899877186c}, // 5^-306
+	{0xe0b62e2929aba83c, 0x331acdabfe94de87}, // 5^-305
+	{0x8c71dcd9ba0b4925, 0x9ff0c08b7f1d0b14}, // 5^-304
+	{0xaf8e5410288e1b6f, 0x07ecf0ae5ee44dd9}, // 5^-303
+	{0xdb71e91432b1a24a, 0xc9e82cd9f69d6150}, // 5^-302
+	{0x892731ac9faf056e, 0xbe311c083a225cd2}, // 5^-301
+	{0xab70fe17c79ac6ca, 0x6dbd630a48aaf406}, // 5^-300
+	{0xd64d3d9db981787d, 0x092cbbccdad5b108}, // 5^-299
+	{0x85f0468293f0eb4e, 0x25bbf56008c58ea5}, // 5^-298
+	{0xa76c582338ed2621, 0xaf2af2b80af6f24e}, // 5^-297
+	{0xd1476e2c07286faa, 0x1af5af660db4aee1}, // 5^-296
+	{0x82cca4db847945ca, 0x50d98d9fc890ed4d}, // 5^-295
+	{0xa37fce126597973c, 0xe50ff107bab528a0}, // 5^-294
+	{0xcc5fc196fefd7d0c, 0x1e53ed49a96272c8}, // 5^-293
+	{0xff77b1fcbebcdc4f, 0x25e8e89c13bb0f7a}, // 5^-292
+	{0x9faacf3df73609b1, 0x77b191618c54e9ac}, // 5^-291
+	{0xc795830d75038c1d, 0xd59df5b9ef6a2417}, // 5^-290
+	{0xf97ae3d0d2446f25, 0x4b0573286b44ad1d}, // 5^-289
+	{0x9becce62836ac577, 0x4ee367f9430aec32}, // 5^-288
+	{0xc2e801fb244576d5, 0x229c41f793cda73f}, // 5^-287
+	{0xf3a20279ed56d48a, 0x6b43527578c1110f}, // 5^-286
+	{0x9845418c345644d6, 0x830a13896b78aaa9}, // 5^-285
+	{0xbe5691ef416bd60c, 0x23cc986bc656d553}, // 5^-284
+	{0xedec366b11c6cb8f, 0x2cbfbe86b7ec8aa8}, // 5^-283
+	{0x94b3a202eb1c3f39, 0x7bf7d71432f3d6a9}, // 5^-282
+	{0xb9e08a83a5e34f07, 0xdaf5ccd93fb0cc53}, // 5^-281
+	{0xe858ad248f5c22c9, 0xd1b3400f8f9cff68}, // 5^-280
+	{0x91376c36d99995be, 0x23100809b9c21fa1}, // 5^-279
+	{0xb58547448ffffb2d, 0xabd40a0c2832a78a}, // 5^-278
+	{0xe2e69915b3fff9f9, 0x16c90c8f323f516c}, // 5^-277
+	{0x8dd01fad907ffc3b, 0xae3da7d97f6792e3}, // 5^-276
+	{0xb1442798f49ffb4a, 0x99cd11cfdf41779c}, // 5^-275
+	{0xdd95317f31c7fa1d, 0x40405643d711d583}, // 5^-274
+	{0x8a7d3eef7f1cfc52, 0x482835ea666b2572}, // 5^-273
+	{0xad1c8eab5ee43b66, 0xda3243650005eecf}, // 5^-272
+	{0xd863b256369d4a40, 0x90bed43e40076a82}, // 5^-271
+	{0x873e4f75e2224e68, 0x5a7744a6e804a291}, // 5^-270
+	{0xa90de3535aaae202, 0x711515d0a205cb36}, // 5^-269
+	{0xd3515c2831559a83, 0x0d5a5b44ca873e03}, // 5^-268
+	{0x8412d9991ed58091, 0xe858790afe9486c2}, // 5^-267
+	{0xa5178fff668ae0b6, 0x626e974dbe39a872}, // 5^-266
+	{0xce5d73ff402d98e3, 0xfb0a3d212dc8128f}, // 5^-265
+	{0x80fa687f881c7f8e, 0x7ce66634bc9d0b99}, // 5^-264
+	{0xa139029f6a239f72, 0x1c1fffc1ebc44e80}, // 5^-263
+	{0xc987434744ac874e, 0xa327ffb266b56220}, // 5^-262
+	{0xfbe9141915d7a922, 0x4bf1ff9f0062baa8}, // 5^-261
+	{0x9d71ac8fada6c9b5, 0x6f773fc3603db4a9}, // 5^-260
+	{0xc4ce17b399107c22, 0xcb550fb4384d21d3}, // 5^-259
+	{0xf6019da07f549b2b, 0x7e2a53a146606a48}, // 5^-258
+	{0x99c102844f94e0fb, 0x2eda7444cbfc426d}, // 5^-257
+	{0xc0314325637a1939, 0xfa911155fefb5308}, // 5^-256
+	{0xf03d93eebc589f88, 0x793555ab7eba27ca}, // 5^-255
+	{0x96267c7535b763b5, 0x4bc1558b2f3458de}, // 5^-254
+	{0xbbb01b9283253ca2, 0x9eb1aaedfb016f16}, // 5^-253
+	{0xea9c227723ee8bcb, 0x465e15a979c1cadc}, // 5^-252
+	{0x92a1958a7675175f, 0x0bfacd89ec191ec9}, // 5^-251
+	{0xb749faed14125d36, 0xcef980ec671f667b}, // 5^-250
+	{0xe51c79a85916f484, 0x82b7e12780e7401a}, // 5^-249
+	{0x8f31cc0937ae58d2, 0xd1b2ecb8b0908810}, // 5^-248
+	{0xb2fe3f0b8599ef07, 0x861fa7e6dcb4aa15}, // 5^-247
+	{0xdfbdcece67006ac9, 0x67a791e093e1d49a}, // 5^-246
+	{0x8bd6a141006042bd, 0xe0c8bb2c5c6d24e0}, // 5^-245
+	{0xaecc49914078536d, 0x58fae9f773886e18}, // 5^-244
+	{0xda7f5bf590966848, 0xaf39a475506a899e}, // 5^-243
+	{0x888f99797a5e012d, 0x6d8406c952429603}, // 5^-242
+	{0xaab37fd7d8f58178, 0xc8e5087ba6d33b83}, // 5^-241
+	{0xd5605fcdcf32e1d6, 0xfb1e4a9a90880a64}, // 5^-240
+	{0x855c3be0a17fcd26, 0x5cf2eea09a55067f}, // 5^-239
+	{0xa6b34ad8c9dfc06f, 0xf42faa48c0ea481e}, // 5^-238
+	{0xd0601d8efc57b08b, 0xf13b94daf124da26}, // 5^-237
+	{0x823c12795db6ce57, 0x76c53d08d6b70858}, // 5^-236
+	{0xa2cb1717b52481ed, 0x54768c4b0c64ca6e}, // 5^-235
+	{0xcb7ddcdda26da268, 0xa9942f5dcf7dfd09}, // 5^-234
+	{0xfe5d54150b090b02, 0xd3f93b35435d7c4c}, // 5^-233
+	{0x9efa548d26e5a6e1, 0xc47bc5014a1a6daf}, // 5^-232
+	{0xc6b8e9b0709f109a, 0x359ab6419ca1091b}, // 5^-231
+	{0xf867241c8cc6d4c0, 0xc30163d203c94b62}, // 5^-230
+	{0x9b407691d7fc44f8, 0x79e0de63425dcf1d}, // 5^-229
+	{0xc21094364dfb5636, 0x985915fc12f542e4}, // 5^-228
+	{0xf294b943e17a2bc4, 0x3e6f5b7b17b2939d}, // 5^-227
+	{0x979cf3ca6cec5b5a, 0xa705992ceecf9c42}, // 5^-226
+	{0xbd8430bd08277231, 0x50c6ff782a838353}, // 5^-225
+	{0xece53cec4a314ebd, 0xa4f8bf5635246428}, // 5^-224
+	{0x940f4613ae5ed136, 0x871b7795e136be99}, // 5^-223
+	{0xb913179899f68584, 0x28e2557b59846e3f}, // 5^-222
+	{0xe757dd7ec07426e5, 0x331aeada2fe589cf}, // 5^-221
+	{0x9096ea6f3848984f, 0x3ff0d2c85def7621}, // 5^-220
+	{0xb4bca50b065abe63, 0x0fed077a756b53a9}, // 5^-219
+	{0xe1ebce4dc7f16dfb, 0xd3e8495912c62894}, // 5^-218
+	{0x8d3360f09cf6e4bd, 0x64712dd7abbbd95c}, // 5^-217
+	{0xb080392cc4349dec, 0xbd8d794d96aacfb3}, // 5^-216
+	{0xdca04777f541c567, 0xecf0d7a0fc5583a0}, // 5^-215
+	{0x89e42caaf9491b60, 0xf41686c49db57244}, // 5^-214
+	{0xac5d37d5b79b6239, 0x311c2875c522ced5}, // 5^-213
+	{0xd77485cb25823ac7, 0x7d633293366b828b}, // 5^-212
+	{0x86a8d39ef77164bc, 0xae5dff9c02033197}, // 5^-211
+	{0xa8530886b54dbdeb, 0xd9f57f830283fdfc}, // 5^-210
+	{0xd267caa862a12d66, 0xd072df63c324fd7b}, // 5^-209
+	{0x8380dea93da4bc60, 0x4247cb9e59f71e6d}, // 5^-208
+	{0xa46116538d0deb78, 0x52d9be85f074e608}, // 5^-207
+	{0xcd795be870516656, 0x67902e276c921f8b}, // 5^-206
+	{0x806bd9714632dff6, 0x00ba1cd8a3db53b6}, // 5^-205
+	{0xa086cfcd97bf97f3, 0x80e8a40eccd228a4}, // 5^-204
+	{0xc8a883c0fdaf7df0, 0x6122cd128006b2cd}, // 5^-203
+	{0xfad2a4b13d1b5d6c, 0x796b805720085f81}, // 5^-202
+	{0x9cc3a6eec6311a63, 0xcbe3303674053bb0}, // 5^-201
+	{0xc3f490aa77bd60fc, 0xbedbfc4411068a9c}, // 5^-200
+	{0xf4f1b4d515acb93b, 0xee92fb5515482d44}, // 5^-199
+	{0x991711052d8bf3c5, 0x751bdd152d4d1c4a}, // 5^-198
+	{0xbf5cd54678eef0b6, 0xd262d45a78a0635d}, // 5^-197
+	{0xef340a98172aace4, 0x86fb897116c87c34}, // 5^-196
+	{0x9580869f0e7aac0e, 0xd45d35e6ae3d4da0}, // 5^-195
+	{0xbae0a846d2195712, 0x8974836059cca109}, // 5^-194
+	{0xe998d258869facd7, 0x2bd1a438703fc94b}, // 5^-193
+	{0x91ff83775423cc06, 0x7b6306a34627ddcf}, // 5^-192
+	{0xb67f6455292cbf08, 0x1a3bc84c17b1d542}, // 5^-191
+	{0xe41f3d6a7377eeca, 0x20caba5f1d9e4a93}, // 5^-190
+	{0x8e938662882af53e, 0x547eb47b7282ee9c}, // 5^-189
+	{0xb23867fb2a35b28d, 0xe99e619a4f23aa43}, // 5^-188
+	{0xdec681f9f4c31f31, 0x6405fa00e2ec94d4}, // 5^-187
+	{0x8b3c113c38f9f37e, 0xde83bc408dd3dd04}, // 5^-186
+	{0xae0b158b4738705e, 0x9624ab50b148d445}, // 5^-185
+	{0xd98ddaee19068c76, 0x3badd624dd9b0957}, // 5^-184
+	{0x87f8a8d4cfa417c9, 0xe54ca5d70a80e5d6}, // 5^-183
+	{0xa9f6d30a038d1dbc, 0x5e9fcf4ccd211f4c}, // 5^-182
+	{0xd47487cc8470652b, 0x7647c3200069671f}, // 5^-181
+	{0x84c8d4dfd2c63f3b, 0x29ecd9f40041e073}, // 5^-180
+	{0xa5fb0a17c777cf09, 0xf468107100525890}, // 5^-179
+	{0xcf79cc9db955c2cc, 0x7182148d4066eeb4}, // 5^-178
+	{0x81ac1fe293d599bf, 0xc6f14cd848405530}, // 5^-177
+	{0xa21727db38cb002f, 0xb8ada00e5a506a7c}, // 5^-176
+	{0xca9cf1d206fdc03b, 0xa6d90811f0e4851c}, // 5^-175
+	{0xfd442e4688bd304a, 0x908f4a166d1da663}, // 5^-174
+	{0x9e4a9cec15763e2e, 0x9a598e4e043287fe}, // 5^-173
+	{0xc5dd44271ad3cdba, 0x40eff1e1853f29fd}, // 5^-172
+	{0xf7549530e188c128, 0xd12bee59e68ef47c}, // 5^-171
+	{0x9a94dd3e8cf578b9, 0x82bb74f8301958ce}, // 5^-170
+	{0xc13a148e3032d6e7, 0xe36a52363c1faf01}, // 5^-169
+	{0xf18899b1bc3f8ca1, 0xdc44e6c3cb279ac1}, // 5^-168
+	{0x96f5600f15a7b7e5, 0x29ab103a5ef8c0b9}, // 5^-167
+	{0xbcb2b812db11a5de, 0x7415d448f6b6f0e7}, // 5^-166
+	{0xebdf661791d60f56, 0x111b495b3464ad21}, // 5^-165
+	{0x936b9fcebb25c995, 0xcab10dd900beec34}, // 5^-164
+	{0xb84687c269ef3bfb, 0x3d5d514f40eea742}, // 5^-163
+	{0xe65829b3046b0afa, 0x0cb4a5a3112a5112}, // 5^-162
+	{0x8ff71a0fe2c2e6dc, 0x47f0e785eaba72ab}, // 5^-161
+	{0xb3f4e093db73a093, 0x59ed216765690f56}, // 5^-160
+	{0xe0f218b8d25088b8, 0x306869c13ec3532c}, // 5^-159
+	{0x8c974f7383725573, 0x1e414218c73a13fb}, // 5^-158
+	{0xafbd2350644eeacf, 0xe5d1929ef90898fa}, // 5^-157
+	{0xdbac6c247d62a583, 0xdf45f746b74abf39}, // 5^-156
+	{0x894bc396ce5da772, 0x6b8bba8c328eb783}, // 5^-155
+	{0xab9eb47c81f5114f, 0x066ea92f3f326564}, // 5^-154
+	{0xd686619ba27255a2, 0xc80a537b0efefebd}, // 5^-153
+	{0x8613fd0145877585, 0xbd06742ce95f5f36}, // 5^-152
+	{0xa798fc4196e952e7, 0x2c48113823b73704}, // 5^-151
+	{0xd17f3b51fca3a7a0, 0xf75a15862ca504c5}, // 5^-150
+	{0x82ef85133de648c4, 0x9a984d73dbe722fb}, // 5^-149
+	{0xa3ab66580d5fdaf5, 0xc13e60d0d2e0ebba}, // 5^-148
+	{0xcc963fee10b7d1b3, 0x318df905079926a8}, // 5^-147
+	{0xffbbcfe994e5c61f, 0xfdf17746497f7052}, // 5^-146
+	{0x9fd561f1fd0f9bd3, 0xfeb6ea8bedefa633}, // 5^-145
+	{0xc7caba6e7c5382c8, 0xfe64a52ee96b8fc0}, // 5^-144
+	{0xf9bd690a1b68637b, 0x3dfdce7aa3c673b0}, // 5^-143
+	{0x9c1661a651213e2d, 0x06bea10ca65c084e}, // 5^-142
+	{0xc31bfa0fe5698db8, 0x486e494fcff30a62}, // 5^-141
+	{0xf3e2f893dec3f126, 0x5a89dba3c3efccfa}, // 5^-140
+	{0x986ddb5c6b3a76b7, 0xf89629465a75e01c}, // 5^-139
+	{0xbe89523386091465, 0xf6bbb397f1135823}, // 5^-138
+	{0xee2ba6c0678b597f, 0x746aa07ded582e2c}, // 5^-137
+	{0x94db483840b717ef, 0xa8c2a44eb4571cdc}, // 5^-136
+	{0xba121a4650e4ddeb, 0x92f34d62616ce413}, // 5^-135
+	{0xe896a0d7e51e1566, 0x77b020baf9c81d17}, // 5^-134
+	{0x915e2486ef32cd60, 0x0ace1474dc1d122e}, // 5^-133
+	{0xb5b5ada8aaff80b8, 0x0d819992132456ba}, // 5^-132
+	{0xe3231912d5bf60e6, 0x10e1fff697ed6c69}, // 5^-131
+	{0x8df5efabc5979c8f, 0xca8d3ffa1ef463c1}, // 5^-130
+	{0xb1736b96b6fd83b3, 0xbd308ff8a6b17cb2}, // 5^-129
+	{0xddd0467c64bce4a0, 0xac7cb3f6d05ddbde}, // 5^-128
+	{0x8aa22c0dbef60ee4, 0x6bcdf07a423aa96b}, // 5^-127
+	{0xad4ab7112eb3929d, 0x86c16c98d2c953c6}, // 5^-126
+	{0xd89d64d57a607744, 0xe871c7bf077ba8b7}, // 5^-125
+	{0x87625f056c7c4a8b, 0x11471cd764ad4972}, // 5^-124
+	{0xa93af6c6c79b5d2d, 0xd598e40d3dd89bcf}, // 5^-123
+	{0xd389b47879823479, 0x4aff1d108d4ec2c3}, // 5^-122
+	{0x843610cb4bf160cb, 0xcedf722a585139ba}, // 5^-121
+	{0xa54394fe1eedb8fe, 0xc2974eb4ee658828}, // 5^-120
+	{0xce947a3da6a9273e, 0x733d226229feea32}, // 5^-119
+	{0x811ccc668829b887, 0x0806357d5a3f525f}, // 5^-118
+	{0xa163ff802a3426a8, 0xca07c2dcb0cf26f7}, // 5^-117
+	{0xc9bcff6034c13052, 0xfc89b393dd02f0b5}, // 5^-116
+	{0xfc2c3f3841f17c67, 0xbbac2078d443ace2}, // 5^-115
+	{0x9d9ba7832936edc0, 0xd54b944b84aa4c0d}, // 5^-114
+	{0xc5029163f384a931, 0x0a9e795e65d4df11}, // 5^-113
+	{0xf64335bcf065d37d, 0x4d4617b5ff4a16d5}, // 5^-112
+	{0x99ea0196163fa42e, 0x504bced1bf8e4e45}, // 5^-111
+	{0xc06481fb9bcf8d39, 0xe45ec2862f71e1d6}, // 5^-110
+	{0xf07da27a82c37088, 0x5d767327bb4e5a4c}, // 5^-109
+	{0x964e858c91ba2655, 0x3a6a07f8d510f86f}, // 5^-108
+	{0xbbe226efb628afea, 0x890489f70a55368b}, // 5^-107
+	{0xeadab0aba3b2dbe5, 0x2b45ac74ccea842e}, // 5^-106
+	{0x92c8ae6b464fc96f, 0x3b0b8bc90012929d}, // 5^-105
+	{0xb77ada0617e3bbcb, 0x09ce6ebb40173744}, // 5^-104
+	{0xe55990879ddcaabd, 0xcc420a6a101d0515}, // 5^-103
+	{0x8f57fa54c2a9eab6, 0x9fa946824a12232d}, // 5^-102
+	{0xb32df8e9f3546564, 0x47939822dc96abf9}, // 5^-101
+	{0xdff9772470297ebd, 0x59787e2b93bc56f7}, // 5^-100
+	{0x8bfbea76c619ef36, 0x57eb4edb3c55b65a}, // 5^-99
+	{0xaefae51477a06b03, 0xede622920b6b23f1}, // 5^-98
+	{0xdab99e59958885c4, 0xe95fab368e45eced}, // 5^-97
+	{0x88b402f7fd75539b, 0x11dbcb0218ebb414}, // 5^-96
+	{0xaae103b5fcd2a881, 0xd652bdc29f26a119}, // 5^-95
+	{0xd59944a37c0752a2, 0x4be76d3346f0495f}, // 5^-94
+	{0x857fcae62d8493a5, 0x6f70a4400c562ddb}, // 5^-93
+	{0xa6dfbd9fb8e5b88e, 0xcb4ccd500f6bb952}, // 5^-92
+	{0xd097ad07a71f26b2, 0x7e2000a41346a7a7}, // 5^-91
+	{0x825ecc24c873782f, 0x8ed400668c0c28c8}, // 5^-90
+	{0xa2f67f2dfa90563b, 0x728900802f0f32fa}, // 5^-89
+	{0xcbb41ef979346bca, 0x4f2b40a03ad2ffb9}, // 5^-88
+	{0xfea126b7d78186bc, 0xe2f610c84987bfa8}, // 5^-87
+	{0x9f24b832e6b0f436, 0x0dd9ca7d2df4d7c9}, // 5^-86
+	{0xc6ede63fa05d3143, 0x91503d1c79720dbb}, // 5^-85
+	{0xf8a95fcf88747d94, 0x75a44c6397ce912a}, // 5^-84
+	{0x9b69dbe1b548ce7c, 0xc986afbe3ee11aba}, // 5^-83
+	{0xc24452da229b021b, 0xfbe85badce996168}, // 5^-82
+	{0xf2d56790ab41c2a2, 0xfae27299423fb9c3}, // 5^-81
+	{0x97c560ba6b0919a5, 0xdccd879fc967d41a}, // 5^-80
+	{0xbdb6b8e905cb600f, 0x5400e987bbc1c920}, // 5^-79
+	{0xed246723473e3813, 0x290123e9aab23b68}, // 5^-78
+	{0x9436c0760c86e30b, 0xf9a0b6720aaf6521}, // 5^-77
+	{0xb94470938fa89bce, 0xf808e40e8d5b3e69}, // 5^-76
+	{0xe7958cb87392c2c2, 0xb60b1d1230b20e04}, // 5^-75
+	{0x90bd77f3483bb9b9, 0xb1c6f22b5e6f48c2}, // 5^-74
+	{0xb4ecd5f01a4aa828, 0x1e38aeb6360b1af3}, // 5^-73
+	{0xe2280b6c20dd5232, 0x25c6da63c38de1b0}, // 5^-72
+	{0x8d590723948a535f, 0x579c487e5a38ad0e}, // 5^-71
+	{0xb0af48ec79ace837, 0x2d835a9df0c6d851}, // 5^-70
+	{0xdcdb1b2798182244, 0xf8e431456cf88e65}, // 5^-69
+	{0x8a08f0f8bf0f156b, 0x1b8e9ecb641b58ff}, // 5^-68
+	{0xac8b2d36eed2dac5, 0xe272467e3d222f3f}, // 5^-67
+	{0xd7adf884aa879177, 0x5b0ed81dcc6abb0f}, // 5^-66
+	{0x86ccbb52ea94baea, 0x98e947129fc2b4e9}, // 5^-65
+	{0xa87fea27a539e9a5, 0x3f2398d747b36224}, // 5^-64
+	{0xd29fe4b18e88640e, 0x8eec7f0d19a03aad}, // 5^-63
+	{0x83a3eeeef9153e89, 0x1953cf68300424ac}, // 5^-62
+	{0xa48ceaaab75a8e2b, 0x5fa8c3423c052dd7}, // 5^-61
+	{0xcdb02555653131b6, 0x3792f412cb06794d}, // 5^-60
+	{0x808e17555f3ebf11, 0xe2bbd88bbee40bd0}, // 5^-59
+	{0xa0b19d2ab70e6ed6, 0x5b6aceaeae9d0ec4}, // 5^-58
+	{0xc8de047564d20a8b, 0xf245825a5a445275}, // 5^-57
+	{0xfb158592be068d2e, 0xeed6e2f0f0d56712}, // 5^-56
+	{0x9ced737bb6c4183d, 0x55464dd69685606b}, // 5^-55
+	{0xc428d05aa4751e4c, 0xaa97e14c3c26b886}, // 5^-54
+	{0xf53304714d9265df, 0xd53dd99f4b3066a8}, // 5^-53
+	{0x993fe2c6d07b7fab, 0xe546a8038efe4029}, // 5^-52
+	{0xbf8fdb78849a5f96, 0xde98520472bdd033}, // 5^-51
+	{0xef73d256a5c0f77c, 0x963e66858f6d4440}, // 5^-50
+	{0x95a8637627989aad, 0xdde7001379a44aa8}, // 5^-49
+	{0xbb127c53b17ec159, 0x5560c018580d5d52}, // 5^-48
+	{0xe9d71b689dde71af, 0xaab8f01e6e10b4a6}, // 5^-47
+	{0x9226712162ab070d, 0xcab3961304ca70e8}, // 5^-46
+	{0xb6b00d69bb55c8d1, 0x3d607b97c5fd0d22}, // 5^-45
+	{0xe45c10c42a2b3b05, 0x8cb89a7db77c506a}, // 5^-44
+	{0x8eb98a7a9a5b04e3, 0x77f3608e92adb242}, // 5^-43
+	{0xb267ed1940f1c61c, 0x55f038b237591ed3}, // 5^-42
+	{0xdf01e85f912e37a3, 0x6b6c46dec52f6688}, // 5^-41
+	{0x8b61313bbabce2c6, 0x2323ac4b3b3da015}, // 5^-40
+	{0xae397d8aa96c1b77, 0xabec975e0a0d081a}, // 5^-39
+	{0xd9c7dced53c72255, 0x96e7bd358c904a21}, // 5^-38
+	{0x881cea14545c7575, 0x7e50d64177da2e54}, // 5^-37
+	{0xaa242499697392d2, 0xdde50bd1d5d0b9e9}, // 5^-36
+	{0xd4ad2dbfc3d07787, 0x955e4ec64b44e864}, // 5^-35
+	{0x84ec3c97da624ab4, 0xbd5af13bef0b113e}, // 5^-34
+	{0xa6274bbdd0fadd61, 0xecb1ad8aeacdd58e}, // 5^-33
+	{0xcfb11ead453994ba, 0x67de18eda5814af2}, // 5^-32
+	{0x81ceb32c4b43fcf4, 0x80eacf948770ced7}, // 5^-31
+	{0xa2425ff75e14fc31, 0xa1258379a94d028d}, // 5^-30
+	{0xcad2f7f5359a3b3e, 0x096ee45813a04330}, // 5^-29
+	{0xfd87b5f28300ca0d, 0x8bca9d6e188853fc}, // 5^-28
+	{0x9e74d1b791e07e48, 0x775ea264cf55347e}, // 5^-27
+	{0xc612062576589dda, 0x95364afe032a819e}, // 5^-26
+	{0xf79687aed3eec551, 0x3a83ddbd83f52205}, // 5^-25
+	{0x9abe14cd44753b52, 0xc4926a9672793543}, // 5^-24
+	{0xc16d9a0095928a27, 0x75b7053c0f178294}, // 5^-23
+	{0xf1c90080baf72cb1, 0x5324c68b12dd6339}, // 5^-22
+	{0x971da05074da7bee, 0xd3f6fc16ebca5e04}, // 5^-21
+	{0xbce5086492111aea, 0x88f4bb1ca6bcf585}, // 5^-20
+	{0xec1e4a7db69561a5, 0x2b31e9e3d06c32e6}, // 5^-19
+	{0x9392ee8e921d5d07, 0x3aff322e62439fd0}, // 5^-18
+	{0xb877aa3236a4b449, 0x09befeb9fad487c3}, // 5^-17
+	{0xe69594bec44de15b, 0x4c2ebe687989a9b4}, // 5^-16
+	{0x901d7cf73ab0acd9, 0x0f9d37014bf60a11}, // 5^-15
+	{0xb424dc35095cd80f, 0x538484c19ef38c95}, // 5^-14
+	{0xe12e13424bb40e13, 0x2865a5f206b06fba}, // 5^-13
+	{0x8cbccc096f5088cb, 0xf93f87b7442e45d4}, // 5^-12
+	{0xafebff0bcb24aafe, 0xf78f69a51539d749}, // 5^-11
+	{0xdbe6fecebdedd5be, 0xb573440e5a884d1c}, // 5^-10
+	{0x89705f4136b4a597, 0x31680a88f8953031}, // 5^-9
+	{0xabcc77118461cefc, 0xfdc20d2b36ba7c3e}, // 5^-8
+	{0xd6bf94d5e57a42bc, 0x3d32907604691b4d}, // 5^-7
+	{0x8637bd05af6c69b5, 0xa63f9a49c2c1b110}, // 5^-6
+	{0xa7c5ac471b478423, 0x0fcf80dc33721d54}, // 5^-5
+	{0xd1b71758e219652b, 0xd3c36113404ea4a9}, // 5^-4
+	{0x83126e978d4fdf3b, 0x645a1cac083126ea}, // 5^-3
+	{0xa3d70a3d70a3d70a, 0x3d70a3d70a3d70a4}, // 5^-2
+	{0xcccccccccccccccc, 0xcccccccccccccccd}, // 5^-1
+	{0x8000000000000000, 0x0000000000000000}, // 5^0
+	{0xa000000000000000, 0x0000000000000000}, // 5^1
+	{0xc800000000000000, 0x0000000000000000}, // 5^2
+	{0xfa00000000000000, 0x0000000000000000}, // 5^3
+	{0x9c40000000000000, 0x0000000000000000}, // 5^4
+	{0xc350000000000000, 0x0000000000000000}, // 5^5
+	{0xf424000000000000, 0x0000000000000000}, // 5^6
+	{0x9896800000000000, 0x0000000000000000}, // 5^7
+	{0xbebc200000000000, 0x0000000000000000}, // 5^8
+	{0xee6b280000000000, 0x0000000000000000}, // 5^9
+	{0x9502f90000000000, 0x0000000000000000}, // 5^10
+	{0xba43b74000000000, 0x0000000000000000}, // 5^11
+	{0xe8d4a51000000000, 0x0000000000000000}, // 5^12
+	{0x9184e72a00000000, 0x0000000000000000}, // 5^13
+	{0xb5e620f480000000, 0x0000000000000000}, // 5^14
+	{0xe35fa931a0000000, 0x0000000000000000}, // 5^15
+	{0x8e1bc9bf04000000, 0x0000000000000000}, // 5^16
+	{0xb1a2bc2ec5000000, 0x0000000000000000}, // 5^17
+	{0xde0b6b3a76400000, 0x0000000000000000}, // 5^18
+	{0x8ac7230489e80000, 0x0000000000000000}, // 5^19
+	{0xad78ebc5ac620000, 0x0000000000000000}, // 5^20
+	{0xd8d726b7177a8000, 0x0000000000000000}, // 5^21
+	{0x878678326eac9000, 0x0000000000000000}, // 5^22
+	{0xa968163f0a57b400, 0x0000000000000000}, // 5^23
+	{0xd3c21bcecceda100, 0x0000000000000000}, // 5^24
+	{0x84595161401484a0, 0x0000000000000000}, // 5^25
+	{0xa56fa5b99019a5c8, 0x0000000000000000}, // 5^26
+	{0xcecb8f27f4200f3a, 0x0000000000000000}, // 5^27
+	{0x813f3978f8940984, 0x4000000000000000}, // 5^28
+	{0xa18f07d736b90be5, 0x5000000000000000}, // 5^29
+	{0xc9f2c9cd04674ede, 0xa400000000000000}, // 5^30
+	{0xfc6f7c4045812296, 0x4d00000000000000}, // 5^31
+	{0x9dc5ada82b70b59d, 0xf020000000000000}, // 5^32
+	{0xc5371912364ce305, 0x6c28000000000000}, // 5^33
+	{0xf684df56c3e01bc6, 0xc732000000000000}, // 5^34
+	{0x9a130b963a6c115c, 0x3c7f400000000000}, // 5^35
+	{0xc097ce7bc90715b3, 0x4b9f100000000000}, // 5^36
+	{0xf0bdc21abb48db20, 0x1e86d40000000000}, // 5^37
+	{0x96769950b50d88f4, 0x1314448000000000}, // 5^38
+	{0xbc143fa4e250eb31, 0x17d955a000000000}, // 5^39
+	{0xeb194f8e1ae525fd, 0x5dcfab0800000000}, // 5^40
+	{0x92efd1b8d0cf37be, 0x5aa1cae500000000}, // 5^41
+	{0xb7abc627050305ad, 0xf14a3d9e40000000}, // 5^42
+	{0xe596b7b0c643c719, 0x6d9ccd05d0000000}, // 5^43
+	{0x8f7e32ce7bea5c6f, 0xe4820023a2000000}, // 5^44
+	{0xb35dbf821ae4f38b, 0xdda2802c8a800000}, // 5^45
+	{0xe0352f62a19e306e, 0xd50b2037ad200000}, // 5^46
+	{0x8c213d9da502de45, 0x4526f422cc340000}, // 5^47
+	{0xaf298d050e4395d6, 0x9670b12b7f410000}, // 5^48
+	{0xdaf3f04651d47b4c, 0x3c0cdd765f114000}, // 5^49
+	{0x88d8762bf324cd0f, 0xa5880a69fb6ac800}, // 5^50
+	{0xab0e93b6efee0053, 0x8eea0d047a457a00}, // 5^51
+	{0xd5d238a4abe98068, 0x72a4904598d6d880}, // 5^52
+	{0x85a36366eb71f041, 0x47a6da2b7f864750}, // 5^53
+	{0xa70c3c40a64e6c51, 0x999090b65f67d924}, // 5^54
+	{0xd0cf4b50cfe20765, 0xfff4b4e3f741cf6d}, // 5^55
+	{0x82818f1281ed449f, 0xbff8f10e7a8921a4}, // 5^56
+	{0xa321f2d7226895c7, 0xaff72d52192b6a0d}, // 5^57
+	{0xcbea6f8ceb02bb39, 0x9bf4f8a69f764490}, // 5^58
+	{0xfee50b7025c36a08, 0x02f236d04753d5b4}, // 5^59
+	{0x9f4f2726179a2245, 0x01d762422c946590}, // 5^60
+	{0xc722f0ef9d80aad6, 0x424d3ad2b7b97ef5}, // 5^61
+	{0xf8ebad2b84e0d58b, 0xd2e0898765a7deb2}, // 5^62
+	{0x9b934c3b330c8577, 0x63cc55f49f88eb2f}, // 5^63
+	{0xc2781f49ffcfa6d5, 0x3cbf6b71c76b25fb}, // 5^64
+	{0xf316271c7fc3908a, 0x8bef464e3945ef7a}, // 5^65
+	{0x97edd871cfda3a56, 0x97758bf0e3cbb5ac}, // 5^66
+	{0xbde94e8e43d0c8ec, 0x3d52eeed1cbea317}, // 5^67
+	{0xed63a231d4c4fb27, 0x4ca7aaa863ee4bdd}, // 5^68
+	{0x945e455f24fb1cf8, 0x8fe8caa93e74ef6a}, // 5^69
+	{0xb975d6b6ee39e436, 0xb3e2fd538e122b44}, // 5^70
+	{0xe7d34c64a9c85d44, 0x60dbbca87196b616}, // 5^71
+	{0x90e40fbeea1d3a4a, 0xbc8955e946fe31cd}, // 5^72
+	{0xb51d13aea4a488dd, 0x6babab6398bdbe41}, // 5^73
+	{0xe264589a4dcdab14, 0xc696963c7eed2dd1}, // 5^74
+	{0x8d7eb76070a08aec, 0xfc1e1de5cf543ca2}, // 5^75
+	{0xb0de65388cc8ada8, 0x3b25a55f43294bcb}, // 5^76
+	{0xdd15fe86affad912, 0x49ef0eb713f39ebe}, // 5^77
+	{0x8a2dbf142dfcc7ab, 0x6e3569326c784337}, // 5^78
+	{0xacb92ed9397bf996, 0x49c2c37f07965404}, // 5^79
+	{0xd7e77a8f87daf7fb, 0xdc33745ec97be906}, // 5^80
+	{0x86f0ac99b4e8dafd, 0x69a028bb3ded71a3}, // 5^81
+	{0xa8acd7c0222311bc, 0xc40832ea0d68ce0c}, // 5^82
+	{0xd2d80db02aabd62b, 0xf50a3fa490c30190}, // 5^83
+	{0x83c7088e1aab65db, 0x792667c6da79e0fa}, // 5^84
+	{0xa4b8cab1a1563f52, 0x577001b891185938}, // 5^85
+	{0xcde6fd5e09abcf26, 0xed4c0226b55e6f86}, // 5^86
+	{0x80b05e5ac60b6178, 0x544f8158315b05b4}, // 5^87
+	{0xa0dc75f1778e39d6, 0x696361ae3db1c721}, // 5^88
+	{0xc913936dd571c84c, 0x03bc3a19cd1e38e9}, // 5^89
+	{0xfb5878494ace3a5f, 0x04ab48a04065c723}, // 5^90
+	{0x9d174b2dcec0e47b, 0x62eb0d64283f9c76}, // 5^91
+	{0xc45d1df942711d9a, 0x3ba5d0bd324f8394}, // 5^92
+	{0xf5746577930d6500, 0xca8f44ec7ee36479}, // 5^93
+	{0x9968bf6abbe85f20, 0x7e998b13cf4e1ecb}, // 5^94
+	{0xbfc2ef456ae276e8, 0x9e3fedd8c321a67e}, // 5^95
+	{0xefb3ab16c59b14a2, 0xc5cfe94ef3ea101e}, // 5^96
+	{0x95d04aee3b80ece5, 0xbba1f1d158724a12}, // 5^97
+	{0xbb445da9ca61281f, 0x2a8a6e45ae8edc97}, // 5^98
+	{0xea1575143cf97226, 0xf52d09d71a3293bd}, // 5^99
+	{0x924d692ca61be758, 0x593c2626705f9c56}, // 5^100
+	{0xb6e0c377cfa2e12e, 0x6f8b2fb00c77836c}, // 5^101
+	{0xe498f455c38b997a, 0x0b6dfb9c0f956447}, // 5^102
+	{0x8edf98b59a373fec, 0x4724bd4189bd5eac}, // 5^103
+	{0xb2977ee300c50fe7, 0x58edec91ec2cb657}, // 5^104
+	{0xdf3d5e9bc0f653e1, 0x2f2967b66737e3ed}, // 5^105
+	{0x8b865b215899f46c, 0xbd79e0d20082ee74}, // 5^106
+	{0xae67f1e9aec07187, 0xecd8590680a3aa11}, // 5^107
+	{0xda01ee641a708de9, 0xe80e6f4820cc9495}, // 5^108
+	{0x884134fe908658b2, 0x3109058d147fdcdd}, // 5^109
+	{0xaa51823e34a7eede, 0xbd4b46f0599fd415}, // 5^110
+	{0xd4e5e2cdc1d1ea96, 0x6c9e18ac7007c91a}, // 5^111
+	{0x850fadc09923329e, 0x03e2cf6bc604ddb0}, // 5^112
+	{0xa6539930bf6bff45, 0x84db8346b786151c}, // 5^113
+	{0xcfe87f7cef46ff16, 0xe612641865679a63}, // 5^114
+	{0x81f14fae158c5f6e, 0x4fcb7e8f3f60c07e}, // 5^115
+	{0xa26da3999aef7749, 0xe3be5e330f38f09d}, // 5^116
+	{0xcb090c8001ab551c, 0x5cadf5bfd3072cc5}, // 5^117
+	{0xfdcb4fa002162a63, 0x73d9732fc7c8f7f6}, // 5^118
+	{0x9e9f11c4014dda7e, 0x2867e7fddcdd9afa}, // 5^119
+	{0xc646d63501a1511d, 0xb281e1fd541501b8}, // 5^120
+	{0xf7d88bc24209a565, 0x1f225a7ca91a4226}, // 5^121
+	{0x9ae757596946075f, 0x3375788de9b06958}, // 5^122
+	{0xc1a12d2fc3978937, 0x0052d6b1641c83ae}, // 5^123
+	{0xf209787bb47d6b84, 0xc0678c5dbd23a49a}, // 5^124
+	{0x9745eb4d50ce6332, 0xf840b7ba963646e0}, // 5^125
+	{0xbd176620a501fbff, 0xb650e5a93bc3d898}, // 5^126
+	{0xec5d3fa8ce427aff, 0xa3e51f138ab4cebe}, // 5^127
+	{0x93ba47c980e98cdf, 0xc66f336c36b10137}, // 5^128
+	{0xb8a8d9bbe123f017, 0xb80b0047445d4184}, // 5^129
+	{0xe6d3102ad96cec1d, 0xa60dc059157491e5}, // 5^130
+	{0x9043ea1ac7e41392, 0x87c89837ad68db2f}, // 5^131
+	{0xb454e4a179dd1877, 0x29babe4598c311fb}, // 5^132
+	{0xe16a1dc9d8545e94, 0xf4296dd6fef3d67a}, // 5^133
+	{0x8ce2529e2734bb1d, 0x1899e4a65f58660c}, // 5^134
+	{0xb01ae745b101e9e4, 0x5ec05dcff72e7f8f}, // 5^135
+	{0xdc21a1171d42645d, 0x76707543f4fa1f73}, // 5^136
+	{0x899504ae72497eba, 0x6a06494a791c53a8}, // 5^137
+	{0xabfa45da0edbde69, 0x0487db9d17636892}, // 5^138
+	{0xd6f8d7509292d603, 0x45a9d2845d3c42b6}, // 5^139
+	{0x865b86925b9bc5c2, 0x0b8a2392ba45a9b2}, // 5^140
+	{0xa7f26836f282b732, 0x8e6cac7768d7141e}, // 5^141
+	{0xd1ef0244af2364ff, 0x3207d795430cd926}, // 5^142
+	{0x8335616aed761f1f, 0x7f44e6bd49e807b8}, // 5^143
+	{0xa402b9c5a8d3a6e7, 0x5f16206c9c6209a6}, // 5^144
+	{0xcd036837130890a1, 0x36dba887c37a8c0f}, // 5^145
+	{0x802221226be55a64, 0xc2494954da2c9789}, // 5^146
+	{0xa02aa96b06deb0fd, 0xf2db9baa10b7bd6c}, // 5^147
+	{0xc83553c5c8965d3d, 0x6f92829494e5acc7}, // 5^148
+	{0xfa42a8b73abbf48c, 0xcb772339ba1f17f9}, // 5^149
+	{0x9c69a97284b578d7, 0xff2a760414536efb}, // 5^150
+	{0xc38413cf25e2d70d, 0xfef5138519684aba}, // 5^151
+	{0xf46518c2ef5b8cd1, 0x7eb258665fc25d69}, // 5^152
+	{0x98bf2f79d5993802, 0xef2f773ffbd97a61}, // 5^153
+	{0xbeeefb584aff8603, 0xaafb550ffacfd8fa}, // 5^154
+	{0xeeaaba2e5dbf6784, 0x95ba2a53f983cf38}, // 5^155
+	{0x952ab45cfa97a0b2, 0xdd945a747bf26183}, // 5^156
+	{0xba756174393d88df, 0x94f971119aeef9e4}, // 5^157
+	{0xe912b9d1478ceb17, 0x7a37cd5601aab85d}, // 5^158
+	{0x91abb422ccb812ee, 0xac62e055c10ab33a}, // 5^159
+	{0xb616a12b7fe617aa, 0x577b986b314d6009}, // 5^160
+	{0xe39c49765fdf9d94, 0xed5a7e85fda0b80b}, // 5^161
+	{0x8e41ade9fbebc27d, 0x14588f13be847307}, // 5^162
+	{0xb1d219647ae6b31c, 0x596eb2d8ae258fc8}, // 5^163
+	{0xde469fbd99a05fe3, 0x6fca5f8ed9aef3bb}, // 5^164
+	{0x8aec23d680043bee, 0x25de7bb9480d5854}, // 5^165
+	{0xada72ccc20054ae9, 0xaf561aa79a10ae6a}, // 5^166
+	{0xd910f7ff28069da4, 0x1b2ba1518094da04}, // 5^167
+	{0x87aa9aff79042286, 0x90fb44d2f05d0842}, // 5^168
+	{0xa99541bf57452b28, 0x353a1607ac744a53}, // 5^169
+	{0xd3fa922f2d1675f2, 0x42889b8997915ce8}, // 5^170
+	{0x847c9b5d7c2e09b7, 0x69956135febada11}, // 5^171
+	{0xa59bc234db398c25, 0x43fab9837e699095}, // 5^172
+	{0xcf02b2c21207ef2e, 0x94f967e45e03f4bb}, // 5^173
+	{0x8161afb94b44f57d, 0x1d1be0eebac278f5}, // 5^174
+	{0xa1ba1ba79e1632dc, 0x6462d92a69731732}, // 5^175
+	{0xca28a291859bbf93, 0x7d7b8f7503cfdcfe}, // 5^176
+	{0xfcb2cb35e702af78, 0x5cda735244c3d43e}, // 5^177
+	{0x9defbf01b061adab, 0x3a0888136afa64a7}, // 5^178
+	{0xc56baec21c7a1916, 0x088aaa1845b8fdd0}, // 5^179
+	{0xf6c69a72a3989f5b, 0x8aad549e57273d45}, // 5^180
+	{0x9a3c2087a63f6399, 0x36ac54e2f678864b}, // 5^181
+	{0xc0cb28a98fcf3c7f, 0x84576a1bb416a7dd}, // 5^182
+	{0xf0fdf2d3f3c30b9f, 0x656d44a2a11c51d5}, // 5^183
+	{0x969eb7c47859e743, 0x9f644ae5a4b1b325}, // 5^184
+	{0xbc4665b596706114, 0x873d5d9f0dde1fee}, // 5^185
+	{0xeb57ff22fc0c7959, 0xa90cb506d155a7ea}, // 5^186
+	{0x9316ff75dd87cbd8, 0x09a7f12442d588f2}, // 5^187
+	{0xb7dcbf5354e9bece, 0x0c11ed6d538aeb2f}, // 5^188
+	{0xe5d3ef282a242e81, 0x8f1668c8a86da5fa}, // 5^189
+	{0x8fa475791a569d10, 0xf96e017d694487bc}, // 5^190
+	{0xb38d92d760ec4455, 0x37c981dcc395a9ac}, // 5^191
+	{0xe070f78d3927556a, 0x85bbe253f47b1417}, // 5^192
+	{0x8c469ab843b89562, 0x93956d7478ccec8e}, // 5^193
+	{0xaf58416654a6babb, 0x387ac8d1970027b2}, // 5^194
+	{0xdb2e51bfe9d0696a, 0x06997b05fcc0319e}, // 5^195
+	{0x88fcf317f22241e2, 0x441fece3bdf81f03}, // 5^196
+	{0xab3c2fddeeaad25a, 0xd527e81cad7626c3}, // 5^197
+	{0xd60b3bd56a5586f1, 0x8a71e223d8d3b074}, // 5^198
+	{0x85c7056562757456, 0xf6872d5667844e49}, // 5^199
+	{0xa738c6bebb12d16c, 0xb428f8ac016561db}, // 5^200
+	{0xd106f86e69d785c7, 0xe13336d701beba52}, // 5^201
+	{0x82a45b450226b39c, 0xecc0024661173473}, // 5^202
+	{0xa34d721642b06084, 0x27f002d7f95d0190}, // 5^203
+	{0xcc20ce9bd35c78a5, 0x31ec038df7b441f4}, // 5^204
+	{0xff290242c83396ce, 0x7e67047175a15271}, // 5^205
+	{0x9f79a169bd203e41, 0x0f0062c6e984d386}, // 5^206
+	{0xc75809c42c684dd1, 0x52c07b78a3e60868}, // 5^207
+	{0xf92e0c3537826145, 0xa7709a56ccdf8a82}, // 5^208
+	{0x9bbcc7a142b17ccb, 0x88a66076400bb691}, // 5^209
+	{0xc2abf989935ddbfe, 0x6acff893d00ea435}, // 5^210
+	{0xf356f7ebf83552fe, 0x0583f6b8c4124d43}, // 5^211
+	{0x98165af37b2153de, 0xc3727a337a8b704a}, // 5^212
+	{0xbe1bf1b059e9a8d6, 0x744f18c0592e4c5c}, // 5^213
+	{0xeda2ee1c7064130c, 0x1162def06f79df73}, // 5^214
+	{0x9485d4d1c63e8be7, 0x8addcb5645ac2ba8}, // 5^215
+	{0xb9a74a0637ce2ee1, 0x6d953e2bd7173692}, // 5^216
+	{0xe8111c87c5c1ba99, 0xc8fa8db6ccdd0437}, // 5^217
+	{0x910ab1d4db9914a0, 0x1d9c9892400a22a2}, // 5^218
+	{0xb54d5e4a127f59c8, 0x2503beb6d00cab4b}, // 5^219
+	{0xe2a0b5dc971f303a, 0x2e44ae64840fd61d}, // 5^220
+	{0x8da471a9de737e24, 0x5ceaecfed289e5d2}, // 5^221
+	{0xb10d8e1456105dad, 0x7425a83e872c5f47}, // 5^222
+	{0xdd50f1996b947518, 0xd12f124e28f77719}, // 5^223
+	{0x8a5296ffe33cc92f, 0x82bd6b70d99aaa6f}, // 5^224
+	{0xace73cbfdc0bfb7b, 0x636cc64d1001550b}, // 5^225
+	{0xd8210befd30efa5a, 0x3c47f7e05401aa4e}, // 5^226
+	{0x8714a775e3e95c78, 0x65acfaec34810a71}, // 5^227
+	{0xa8d9d1535ce3b396, 0x7f1839a741a14d0d}, // 5^228
+	{0xd31045a8341ca07c, 0x1ede48111209a050}, // 5^229
+	{0x83ea2b892091e44d, 0x934aed0aab460432}, // 5^230
+	{0xa4e4b66b68b65d60, 0xf81da84d5617853f}, // 5^231
+	{0xce1de40642e3f4b9, 0x36251260ab9d668e}, // 5^232
+	{0x80d2ae83e9ce78f3, 0xc1d72b7c6b426019}, // 5^233
+	{0xa1075a24e4421730, 0xb24cf65b8612f81f}, // 5^234
+	{0xc94930ae1d529cfc, 0xdee033f26797b627}, // 5^235
+	{0xfb9b7cd9a4a7443c, 0x169840ef017da3b1}, // 5^236
+	{0x9d412e0806e88aa5, 0x8e1f289560ee864e}, // 5^237
+	{0xc491798a08a2ad4e, 0xf1a6f2bab92a27e2}, // 5^238
+	{0xf5b5d7ec8acb58a2, 0xae10af696774b1db}, // 5^239
+	{0x9991a6f3d6bf1765, 0xacca6da1e0a8ef29}, // 5^240
+	{0xbff610b0cc6edd3f, 0x17fd090a58d32af3}, // 5^241
+	{0xeff394dcff8a948e, 0xddfc4b4cef07f5b0}, // 5^242
+	{0x95f83d0a1fb69cd9, 0x4abdaf101564f98e}, // 5^243
+	{0xbb764c4ca7a4440f, 0x9d6d1ad41abe37f1}, // 5^244
+	{0xea53df5fd18d5513, 0x84c86189216dc5ed}, // 5^245
+	{0x92746b9be2f8552c, 0x32fd3cf5b4e49bb4}, // 5^246
+	{0xb7118682dbb66a77, 0x3fbc8c33221dc2a1}, // 5^247
+	{0xe4d5e82392a40515, 0x0fabaf3feaa5334a}, // 5^248
+	{0x8f05b1163ba6832d, 0x29cb4d87f2a7400e}, // 5^249
+	{0xb2c71d5bca9023f8, 0x743e20e9ef511012}, // 5^250
+	{0xdf78e4b2bd342cf6, 0x914da9246b255416}, // 5^251
+	{0x8bab8eefb6409c1a, 0x1ad089b6c2f7548e}, // 5^252
+	{0xae9672aba3d0c320, 0xa184ac2473b529b1}, // 5^253
+	{0xda3c0f568cc4f3e8, 0xc9e5d72d90a2741e}, // 5^254
+	{0x8865899617fb1871, 0x7e2fa67c7a658892}, // 5^255
+	{0xaa7eebfb9df9de8d, 0xddbb901b98feeab7}, // 5^256
+	{0xd51ea6fa85785631, 0x552a74227f3ea565}, // 5^257
+	{0x8533285c936b35de, 0xd53a88958f87275f}, // 5^258
+	{0xa67ff273b8460356, 0x8a892abaf368f137}, // 5^259
+	{0xd01fef10a657842c, 0x2d2b7569b0432d85}, // 5^260
+	{0x8213f56a67f6b29b, 0x9c3b29620e29fc73}, // 5^261
+	{0xa298f2c501f45f42, 0x8349f3ba91b47b8f}, // 5^262
+	{0xcb3f2f7642717713, 0x241c70a936219a73}, // 5^263
+	{0xfe0efb53d30dd4d7, 0xed238cd383aa0110}, // 5^264
+	{0x9ec95d1463e8a506, 0xf4363804324a40aa}, // 5^265
+	{0xc67bb4597ce2ce48, 0xb143c6053edcd0d5}, // 5^266
+	{0xf81aa16fdc1b81da, 0xdd94b7868e94050a}, // 5^267
+	{0x9b10a4e5e9913128, 0xca7cf2b4191c8326}, // 5^268
+	{0xc1d4ce1f63f57d72, 0xfd1c2f611f63a3f0}, // 5^269
+	{0xf24a01a73cf2dccf, 0xbc633b39673c8cec}, // 5^270
+	{0x976e41088617ca01, 0xd5be0503e085d813}, // 5^271
+	{0xbd49d14aa79dbc82, 0x4b2d8644d8a74e18}, // 5^272
+	{0xec9c459d51852ba2, 0xddf8e7d60ed1219e}, // 5^273
+	{0x93e1ab8252f33b45, 0xcabb90e5c942b503}, // 5^274
+	{0xb8da1662e7b00a17, 0x3d6a751f3b936243}, // 5^275
+	{0xe7109bfba19c0c9d, 0x0cc512670a783ad4}, // 5^276
+	{0x906a617d450187e2, 0x27fb2b80668b24c5}, // 5^277
+	{0xb484f9dc9641e9da, 0xb1f9f660802dedf6}, // 5^278
+	{0xe1a63853bbd26451, 0x5e7873f8a0396973}, // 5^279
+	{0x8d07e33455637eb2, 0xdb0b487b6423e1e8}, // 5^280
+	{0xb049dc016abc5e5f, 0x91ce1a9a3d2cda62}, // 5^281
+	{0xdc5c5301c56b75f7, 0x7641a140cc7810fb}, // 5^282
+	{0x89b9b3e11b6329ba, 0xa9e904c87fcb0a9d}, // 5^283
+	{0xac2820d9623bf429, 0x546345fa9fbdcd44}, // 5^284
+	{0xd732290fbacaf133, 0xa97c177947ad4095}, // 5^285
+	{0x867f59a9d4bed6c0, 0x49ed8eabcccc485d}, // 5^286
+	{0xa81f301449ee8c70, 0x5c68f256bfff5a74}, // 5^287
+	{0xd226fc195c6a2f8c, 0x73832eec6fff3111}, // 5^288
+	{0x83585d8fd9c25db7, 0xc831fd53c5ff7eab}, // 5^289
+	{0xa42e74f3d032f525, 0xba3e7ca8b77f5e55}, // 5^290
+	{0xcd3a1230c43fb26f, 0x28ce1bd2e55f35eb}, // 5^291
+	{0x80444b5e7aa7cf85, 0x7980d163cf5b81b3}, // 5^292
+	{0xa0555e361951c366, 0xd7e105bcc332621f}, // 5^293
+	{0xc86ab5c39fa63440, 0x8dd9472bf3fefaa7}, // 5^294
+	{0xfa856334878fc150, 0xb14f98f6f0feb951}, // 5^295
+	{0x9c935e00d4b9d8d2, 0x6ed1bf9a569f33d3}, // 5^296
+	{0xc3b8358109e84f07, 0x0a862f80ec4700c8}, // 5^297
+	{0xf4a642e14c6262c8, 0xcd27bb612758c0fa}, // 5^298
+	{0x98e7e9cccfbd7dbd, 0x8038d51cb897789c}, // 5^299
+	{0xbf21e44003acdd2c, 0xe0470a63e6bd56c3}, // 5^300
+	{0xeeea5d5004981478, 0x1858ccfce06cac74}, // 5^301
+	{0x95527a5202df0ccb, 0x0f37801e0c43ebc8}, // 5^302
+	{0xbaa718e68396cffd, 0xd30560258f54e6ba}, // 5^303
+	{0xe950df20247c83fd, 0x47c6b82ef32a2069}, // 5^304
+	{0x91d28b7416cdd27e, 0x4cdc331d57fa5441}, // 5^305
+	{0xb6472e511c81471d, 0xe0133fe4adf8e952}, // 5^306
+	{0xe3d8f9e563a198e5, 0x58180fddd97723a6}, // 5^307
+	{0x8e679c2f5e44ff8f, 0x570f09eaa7ea7648}, // 5^308
+}
diff --git a/core/strconv/strconv.odin b/core/strconv/strconv.odin
index f2450dcbd..f6fe48e8d 100644
--- a/core/strconv/strconv.odin
+++ b/core/strconv/strconv.odin
@@ -746,9 +746,13 @@ Output:
 - ok: `false` if a base 10 float could not be found, or if the input string contained more than just the number.
 */
 parse_f32 :: proc(s: string, n: ^int = nil) -> (value: f32, ok: bool) {
-	v: f64 = ---
-	v, ok = parse_f64(s, n)
-	return f32(v), ok
+	nr: int
+	value, nr, ok = parse_f32_prefix(s)
+	if ok && len(s) != nr {
+		ok = false
+	}
+	if n != nil { n^ = nr }
+	return
 }
 /*
 Parses a 64-bit floating point number from a string
@@ -817,10 +821,7 @@ Output:
 - ok: A boolean indicating whether the parsing was successful.
 */
 parse_f32_prefix :: proc(str: string) -> (value: f32, nr: int, ok: bool) {
-	f: f64
-	f, nr, ok = parse_f64_prefix(str)
-	value = f32(f)
-	return
+	return parse_float_prefix_generic(f32, str)
 }
 /*
 Parses a 64-bit floating point number from a string and returns the parsed number, the length of the parsed substring, and a boolean indicating whether the parsing was successful
@@ -855,6 +856,11 @@ Output:
 - ok: `false` if a base 10 float could not be found
 */
 parse_f64_prefix :: proc(str: string) -> (value: f64, nr: int, ok: bool) {
+	return parse_float_prefix_generic(f64, str)
+}
+
+// Parses directly to `T`, so the result is correctly rounded for both `f32` and `f64`.
+parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: int, ok: bool) where T == f32 || T == f64 {
 	common_prefix_len_ignore_case :: proc "contextless" (s, prefix: string) -> int {
 		n := len(prefix)
 		if n > len(s) {
@@ -1122,19 +1128,27 @@ parse_f64_prefix :: proc(str: string) -> (value: f64, nr: int, ok: bool) {
 
 		switch digits {
 		case 4:
-			value = cast(f64)transmute(f16)cast(u16)as_int
+			value = cast(T)transmute(f16)cast(u16)as_int
 		case 8:
-			value = cast(f64)transmute(f32)cast(u32)as_int
+			value = cast(T)transmute(f32)cast(u32)as_int
 		case 16:
-			value = transmute(f64)as_int
+			value = cast(T)transmute(f64)as_int
 		case:
 			ok = false
 		}
 		return
 	}
 
-	if value, nr, ok = check_special(str); ok {
-		return
+	if f, n, special := check_special(str); special {
+		return T(f), n, true
+	}
+
+	when T == f64 {
+		Bits :: u64
+		info := &_f64_info
+	} else {
+		Bits :: u32
+		info := &_f32_info
 	}
 
 	mantissa: u64
@@ -1143,11 +1157,18 @@ parse_f64_prefix :: proc(str: string) -> (value: f64, nr: int, ok: bool) {
 	mantissa, exp, neg, trunc, hex, nr = parse_components(str) or_return
 
 	if hex {
-		value, ok = parse_hex(str, mantissa, exp, neg, trunc)
+		f: f64
+		f, ok = parse_hex(str, mantissa, exp, neg, trunc)
+		value = T(f)
+		when T == f32 {
+			// A finite f64 can be too large for f32.
+			ok = ok && transmute(u32)value & 0x7f80_0000 != 0x7f80_0000
+		}
 		return
 	}
 
-	trunc_block: if !trunc {
+	// Clinger's fast path algorithm
+	clinger_fast_path: if !trunc && !(ODIN_ARCH == .i386 && ODIN_OS != .Windows) {
 		@(static, rodata) pow10 := [?]f64{
 			1e0,  1e1,  1e2,  1e3,  1e4,  1e5,  1e6,  1e7,  1e8,  1e9,
 			1e10, 1e11, 1e12, 1e13, 1e14, 1e15, 1e16, 1e17, 1e18, 1e19,
@@ -1155,33 +1176,58 @@ parse_f64_prefix :: proc(str: string) -> (value: f64, nr: int, ok: bool) {
 		}
 
 		if mantissa>>_f64_info.mantbits != 0 {
-			break trunc_block
+			break clinger_fast_path
 		}
 		f := f64(mantissa)
-		f_abs := f
+		switch {
+		case exp == 0:
+		case exp > 0 && exp <= 15+22:
+			e := exp
+			if e > 22 {
+				f *= pow10[e-22]
+				e = 22
+				if f > 1e15 {
+					break clinger_fast_path
+				}
+			}
+			f *= pow10[e]
+		case -22 <= exp && exp < 0:
+			f /= pow10[-exp]
+		case:
+			break clinger_fast_path
+		}
+		when T == f32 {
+			// Every f32 midpoint is an f64 value, so rounding to f64 cannot
+			// move the result past a midpoint. The conversion to f32 is then
+			// correct, unless the f64 result is exactly a midpoint.
+			if transmute(u64)f & (1<<29 - 1) == 1<<28 {
+				break clinger_fast_path
+			}
+		}
 		if neg {
 			f = -f
 		}
-		switch {
-		case exp == 0:
-			return f, nr, true
-		case exp > 0 && exp <= 15+22:
-			if exp > 22 {
-				f *= pow10[exp-22]
-				exp = 22
-			}
-			if f_abs > 1e15 || f_abs < 1e-15 {
-				break trunc_block
-			}
-			return f * pow10[exp], nr, true
-		case -22 <= exp && exp < 0:
-			return f / pow10[-exp], nr, true
-		}
+		return T(f), nr, true
 	}
+
+	// Eisel-Lemire's fast float algorithm
+	fast_float: {
+		b := fast_float_compute_float(T, exp, mantissa)
+		if trunc && b != fast_float_compute_float(T, exp, mantissa+1) {
+			break fast_float
+		}
+		ok = b >> info.mantbits != 1<<info.expbits - 1 // infinity means overflow
+		if neg {
+			b |= 1 << info.mantbits << info.expbits
+		}
+		return transmute(T)Bits(b), nr, ok
+	}
+
+	// Slow path for arbitrary-precision decimal
 	d: decimal.Decimal
 	decimal.set(&d, str[:nr])
-	b, overflow := decimal_to_float_bits(&d, &_f64_info)
-	value = transmute(f64)b
+	b, overflow := decimal_to_float_bits(&d, info)
+	value = transmute(T)Bits(b)
 	ok = !overflow
 	return
 }
diff --git a/tests/core/strconv/test_core_strconv.odin b/tests/core/strconv/test_core_strconv.odin
index 8947f3632..cc8946483 100644
--- a/tests/core/strconv/test_core_strconv.odin
+++ b/tests/core/strconv/test_core_strconv.odin
@@ -116,7 +116,7 @@ test_infinity :: proc(t: ^testing.T) {
 			testing.expect_value(t, math.classify(f), math.Float_Class.Zero)
 		}
 	}
-	
+
 	s = "+infinity"
 	for i in 0 ..< len(s) + 1 {
 		ss := s[:i]
@@ -216,4 +216,111 @@ test_float_hex :: proc(t: ^testing.T) {
 		testing.expectf(t, ok, "%q: ok=false", c.s)
 		testing.expectf(t, transmute(u32)f == c.bits, "%q: got %08x, want %08x", c.s, transmute(u32)f, c.bits)
 	}
-}
\ No newline at end of file
+}
+
+@(test)
+test_float_rounding_f64 :: proc(t: ^testing.T) {
+	Case :: struct { s: string, bits: u64 }
+	cases := []Case{
+		{"1.2",                     0x3ff3333333333333},
+		{"123456789e-5",            0x40934a4584f4c6e7},
+		{"4503599627370495",        0x432ffffffffffffe}, // 2^52 - 1
+		{"0.1234567890123456",      0x3fbf9add3746f659}, // 16 digits
+		{"1e22",                    0x4480f0cf064dd592},
+		{"1e-22",                   0x3b5e392010175ee6},
+		{"1e37",                    0x479e17b84357691b}, // 1e15 * 1e22
+		{"-0.0",                    0x8000000000000000},
+		{"1_000.5",                 0x408f440000000000},
+		{"12345678901234e30",       0x48e1b716107ef6cd},
+		{"8807505e35",              0x48a43896104bfb7b},
+		{"49275500062000e27",       0x486219d883804133},
+		{"9007199254740991",        0x433fffffffffffff}, // 2^53 - 1
+		{"0.12345678901234567",     0x3fbf9add3746f65e}, // 17 digits
+		{"1e-23",                   0x3b282db34012b251},
+		{"1e38",                    0x47d2ced32a16a1b1},
+		{"1.7976931348623157e308",  0x7fefffffffffffff}, // largest f64
+		{"2.2250738585072014e-308", 0x0010000000000000}, // smallest normal
+		{"2.4703282292062328e-324", 0x0000000000000001}, // rounds up to the smallest subnormal
+		{"2.4703282292062327e-324", 0x0000000000000000}, // rounds down to zero
+		{"9007199254740993",        0x4340000000000000}, // halfway, round to even
+		{"123456789012345678901234",   0x44ba249b1f10a06d},
+		{"0.1000000000000000000000001", 0x3fb999999999999a},
+		{"9007199254740993.0000000000000000001", 0x4340000000000001},
+	}
+	for c in cases {
+		f, ok := strconv.parse_f64(c.s)
+		testing.expectf(t, ok, "%q: ok=false", c.s)
+		testing.expectf(t, transmute(u64)f == c.bits, "%q: got %016x, want %016x", c.s, transmute(u64)f, c.bits)
+	}
+}
+
+@(test)
+test_float_rounding_f32 :: proc(t: ^testing.T) {
+	Case :: struct { s: string, bits: u32 }
+	cases := []Case{
+		{"1.2",                                  0x3f99999a},
+		{"3.4028235e38",                         0x7f7fffff},
+		{"1.17549435e-38",                       0x00800000},
+		{"1e-45",                                0x00000001},
+		// Parsing as f64 and converting to f32 rounds twice and gives the wrong f32.
+		// These use Eisel-Lemire or the slow path.
+		{"7.0064923216240854e-46",               0x00000001},
+		{"1.1754947011469036e-38",               0x00800003},
+		{"2.1665680640000002384185791015625e9",  0x4f012335},
+		{"8.589934335999999523162841796875e+09", 0x4fffffff},
+		{"0.00036393293703440577",               0x39bece41},
+		// The f64 fast path gives exactly an f32 midpoint, but the input is not
+		// a midpoint. The conversion to f32 would round the wrong way.
+		{"2.295306995511055e-01",                0x3e6b0a19},
+		{"2.346675395965576e+01",                0x41bbbbe9},
+		{"1.26108672702685e-03",                 0x3aa54b0d},
+		{"2.76996448636055e-01",                 0x3e8dd27b},
+	}
+	for c in cases {
+		f, ok := strconv.parse_f32(c.s)
+		testing.expectf(t, ok, "%q: ok=false", c.s)
+		testing.expectf(t, transmute(u32)f == c.bits, "%q: got %08x, want %08x", c.s, transmute(u32)f, c.bits)
+	}
+
+	n: int
+	f, ok := strconv.parse_f32("1.5x", &n)
+	testing.expect_value(t, f, 1.5)
+	testing.expect_value(t, n, 3)
+	testing.expect_value(t, ok, false)
+}
+
+@(test)
+test_float_overflow :: proc(t: ^testing.T) {
+	f64v, ok64 := strconv.parse_f64("1e309")
+	testing.expect_value(t, math.classify(f64v), math.Float_Class.Inf)
+	testing.expect_value(t, ok64, false)
+
+	f64v, ok64 = strconv.parse_f64("-1e309")
+	testing.expect_value(t, math.classify(f64v), math.Float_Class.Neg_Inf)
+	testing.expect_value(t, ok64, false)
+
+	f32v, ok32 := strconv.parse_f32("1e39")
+	testing.expect_value(t, math.classify(f32v), math.Float_Class.Inf)
+	testing.expect_value(t, ok32, false)
+
+	f32v, ok32 = strconv.parse_f32("-1e39")
+	testing.expect_value(t, math.classify(f32v), math.Float_Class.Neg_Inf)
+	testing.expect_value(t, ok32, false)
+
+	f32v, ok32 = strconv.parse_f32("0x1p128")
+	testing.expect_value(t, math.classify(f32v), math.Float_Class.Inf)
+	testing.expect_value(t, ok32, false)
+
+	f32v, ok32 = strconv.parse_f32("1e309")
+	testing.expect_value(t, math.classify(f32v), math.Float_Class.Inf)
+	testing.expect_value(t, ok32, false)
+
+	// Underflow to zero is not an error.
+	f64v, ok64 = strconv.parse_f64("1e-400")
+	testing.expect_value(t, f64v, 0)
+	testing.expect_value(t, ok64, true)
+
+	f32v, ok32 = strconv.parse_f32("1e-50")
+	testing.expect_value(t, f32v, 0)
+	testing.expect_value(t, ok32, true)
+}

From afbecefac79c133129d105e60d4f3a81e590343a Mon Sep 17 00:00:00 2001
From: Alexander Zhura <nice.zhura@list.ru>
Date: Fri, 25 Sep 2026 19:41:42 +0300
Subject: [PATCH 019/215] Impl simd arm neon transpose reverse set1

---
 core/simd/arm/aes.odin   |  12 +
 core/simd/arm/neon.odin  | 686 +++++++++++++++++++++++++++++++++++++++
 core/simd/arm/pmull.odin | 220 +++++++++++++
 3 files changed, 918 insertions(+)

diff --git a/core/simd/arm/aes.odin b/core/simd/arm/aes.odin
index b1f44e52c..49090de68 100644
--- a/core/simd/arm/aes.odin
+++ b/core/simd/arm/aes.odin
@@ -1,21 +1,33 @@
 #+build arm64,arm32
 package simd_arm
 
+// AES single round encryption.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaeseq_u8)
 @(require_results, enable_target_feature = "aes")
 vaeseq_u8 :: #force_inline proc "c" (data, key: uint8x16_t) -> uint8x16_t {
 	return _vaeseq_u8(data, key)
 }
 
+// AES single round decryption.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesdq_u8)
 @(require_results, enable_target_feature = "aes")
 vaesdq_u8 :: #force_inline proc "c" (data, key: uint8x16_t) -> uint8x16_t {
 	return _vaesdq_u8(data, key)
 }
 
+// AES mix columns.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesmcq_u8)
 @(require_results, enable_target_feature = "aes")
 vaesmcq_u8 :: #force_inline proc "c" (data: uint8x16_t) -> uint8x16_t {
 	return _vaesmcq_u8(data)
 }
 
+// AES inverse mix columns.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesimcq_u8)
 @(require_results,enable_target_feature = "aes")
 vaesimcq_u8 :: #force_inline proc "c" (data: uint8x16_t) -> uint8x16_t {
 	return _vaesimcq_u8(data)
diff --git a/core/simd/arm/neon.odin b/core/simd/arm/neon.odin
index 82cb0930b..d6f76d10b 100644
--- a/core/simd/arm/neon.odin
+++ b/core/simd/arm/neon.odin
@@ -5282,6 +5282,692 @@ vuzpq_u32 :: #force_inline proc "c" (a, b: uint32x4_t) -> uint32x4x2_t {
 	}
 }
 
+// Duplicate vector element to vector or scalar
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_s8)
+@(require_results, enable_target_feature = "neon")
+vget_low_s8 :: #force_inline proc "c" (a: int8x16_t) -> int8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 0, 1, 2, 3, 4, 5, 6, 7)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 0, 1, 2, 3, 4, 5, 6, 7)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Duplicate vector element to vector or scalar
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_u8)
+@(require_results, enable_target_feature = "neon")
+vget_low_u8 :: #force_inline proc "c" (a: uint8x16_t) -> uint8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 0, 1, 2, 3, 4, 5, 6, 7)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 0, 1, 2, 3, 4, 5, 6, 7)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Duplicate vector element to vector or scalar
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_s16)
+@(require_results, enable_target_feature = "neon")
+vget_low_s16 :: #force_inline proc "c" (a: int16x8_t) -> int16x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 0, 1, 2, 3)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 0, 1, 2, 3)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Duplicate vector element to vector or scalar
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_u16)
+@(require_results, enable_target_feature = "neon")
+vget_low_u16 :: #force_inline proc "c" (a: uint16x8_t) -> uint16x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 0, 1, 2, 3)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 0, 1, 2, 3)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Duplicate vector element to vector or scalar
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_s32)
+@(require_results, enable_target_feature = "neon")
+vget_low_s32 :: #force_inline proc "c" (a: int32x4_t) -> int32x2_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 0, 1)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 0, 1)
+		return simd.shuffle(b, b, 1, 0)
+	}
+}
+
+// Duplicate vector element to vector or scalar
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_u32)
+@(require_results, enable_target_feature = "neon")
+vget_low_u32 :: #force_inline proc "c" (a: uint32x4_t) -> uint32x2_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 0, 1)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 0, 1)
+		return simd.shuffle(b, b, 1, 0)
+	}
+}
+
+// Duplicate vector element to vector or scalar
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_s64)
+@(require_results, enable_target_feature = "neon")
+vget_low_s64 :: #force_inline proc "c" (a: int64x2_t) -> int64x1_t {
+	when ODIN_ENDIAN == .Little {
+		return transmute(int64x1_t)simd.extract(a, 0)
+	} else {
+		a := simd.shuffle(a, a, 1, 0)
+		return transmute(int64x1_t)simd.extract(a, 0)
+	}
+}
+
+// Duplicate vector element to vector or scalar
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vget_low_u64)
+@(require_results, enable_target_feature = "neon")
+vget_low_u64 :: #force_inline proc "c" (a: uint64x2_t) -> uint64x1_t {
+	when ODIN_ENDIAN == .Little {
+		return transmute(uint64x1_t)simd.extract(a, 0)
+	} else {
+		a := simd.shuffle(a, a, 1, 0)
+		return transmute(uint64x1_t)simd.extract(a, 0)
+	}
+}
+
+// Reverse elements in 16-bit halfwords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev16_s8)
+@(require_results, enable_target_feature = "neon")
+vrev16_s8 :: #force_inline proc "c" (a: int8x8_t) -> int8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 16-bit halfwords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev16_u8)
+@(require_results, enable_target_feature = "neon")
+vrev16_u8 :: #force_inline proc "c" (a: uint8x8_t) -> uint8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 16-bit halfwords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev16q_s8)
+@(require_results, enable_target_feature = "neon")
+vrev16q_s8 :: #force_inline proc "c" (a: int8x16_t) -> int8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 16-bit halfwords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev16q_u8)
+@(require_results, enable_target_feature = "neon")
+vrev16q_u8 :: #force_inline proc "c" (a: uint8x16_t) -> uint8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32_s8)
+@(require_results, enable_target_feature = "neon")
+vrev32_s8 :: #force_inline proc "c" (a: int8x8_t) -> int8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32_u8)
+@(require_results, enable_target_feature = "neon")
+vrev32_u8 :: #force_inline proc "c" (a: uint8x8_t) -> uint8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32_s16)
+@(require_results, enable_target_feature = "neon")
+vrev32_s16 :: #force_inline proc "c" (a: int16x4_t) -> int16x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32_u16)
+@(require_results, enable_target_feature = "neon")
+vrev32_u16 :: #force_inline proc "c" (a: uint16x4_t) -> uint16x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32q_s8)
+@(require_results, enable_target_feature = "neon")
+vrev32q_s8 :: #force_inline proc "c" (a: int8x16_t) -> int8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32q_u8)
+@(require_results, enable_target_feature = "neon")
+vrev32q_u8 :: #force_inline proc "c" (a: uint8x16_t) -> uint8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32q_s16)
+@(require_results, enable_target_feature = "neon")
+vrev32q_s16 :: #force_inline proc "c" (a: int16x8_t) -> int16x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32q_u16)
+@(require_results, enable_target_feature = "neon")
+vrev32q_u16 :: #force_inline proc "c" (a: uint16x8_t) -> uint16x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64_s8)
+@(require_results, enable_target_feature = "neon")
+vrev64_s8 :: #force_inline proc "c" (a: int8x8_t) -> int8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64_u8)
+@(require_results, enable_target_feature = "neon")
+vrev64_u8 :: #force_inline proc "c" (a: uint8x8_t) -> uint8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64_s16)
+@(require_results, enable_target_feature = "neon")
+vrev64_s16 :: #force_inline proc "c" (a: int16x4_t) -> int16x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64_u16)
+@(require_results, enable_target_feature = "neon")
+vrev64_u16 :: #force_inline proc "c" (a: uint16x4_t) -> uint16x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64_s32)
+@(require_results, enable_target_feature = "neon")
+vrev64_s32 :: #force_inline proc "c" (a: int32x2_t) -> int32x2_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0)
+	} else {
+		a := simd.shuffle(a, a, 1, 0)
+		b := simd.shuffle(a, a, 1, 0)
+		return simd.shuffle(b, b, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64_u32)
+@(require_results, enable_target_feature = "neon")
+vrev64_u32 :: #force_inline proc "c" (a: uint32x2_t) -> uint32x2_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0)
+	} else {
+		a := simd.shuffle(a, a, 1, 0)
+		b := simd.shuffle(a, a, 1, 0)
+		return simd.shuffle(b, b, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64q_s8)
+@(require_results, enable_target_feature = "neon")
+vrev64q_s8 :: #force_inline proc "c" (a: int8x16_t) -> int8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64q_u8)
+@(require_results, enable_target_feature = "neon")
+vrev64q_u8 :: #force_inline proc "c" (a: uint8x16_t) -> uint8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64q_s16)
+@(require_results, enable_target_feature = "neon")
+vrev64q_s16 :: #force_inline proc "c" (a: int16x8_t) -> int16x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64q_u16)
+@(require_results, enable_target_feature = "neon")
+vrev64q_u16 :: #force_inline proc "c" (a: uint16x8_t) -> uint16x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64q_s32)
+@(require_results, enable_target_feature = "neon")
+vrev64q_s32 :: #force_inline proc "c" (a: int32x4_t) -> int32x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64q_u32)
+@(require_results, enable_target_feature = "neon")
+vrev64q_u32 :: #force_inline proc "c" (a: uint32x4_t) -> uint32x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn_s8)
+@(require_results, enable_target_feature = "neon")
+vtrn_s8 :: #force_inline proc "c" (a, b: int8x8_t) -> int8x8x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		return int8x8x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		c  = simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 7, 6, 5, 4, 3, 2, 1, 0)
+		return int8x8x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn_u8)
+@(require_results, enable_target_feature = "neon")
+vtrn_u8 :: #force_inline proc "c" (a, b: uint8x8_t) -> uint8x8x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		return uint8x8x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		c  = simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 7, 6, 5, 4, 3, 2, 1, 0)
+		return uint8x8x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn_s16)
+@(require_results, enable_target_feature = "neon")
+vtrn_s16 :: #force_inline proc "c" (a, b: int16x4_t) -> int16x4x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		return int16x4x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		c  = simd.shuffle(c, c, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 3, 2, 1, 0)
+		return int16x4x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn_u16)
+@(require_results, enable_target_feature = "neon")
+vtrn_u16 :: #force_inline proc "c" (a, b: uint16x4_t) -> uint16x4x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		return uint16x4x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		c  = simd.shuffle(c, c, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 3, 2, 1, 0)
+		return uint16x4x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn_s32)
+@(require_results, enable_target_feature = "neon")
+vtrn_s32 :: #force_inline proc "c" (a, b: int32x2_t) -> int32x2x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 2)
+		d := simd.shuffle(a, b, 1, 3)
+		return int32x2x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 1, 0)
+		b := simd.shuffle(b, b, 1, 0)
+		c := simd.shuffle(a, b, 0, 2)
+		d := simd.shuffle(a, b, 1, 3)
+		c  = simd.shuffle(c, c, 1, 0)
+		d  = simd.shuffle(d, d, 1, 0)
+		return int32x2x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn_u32)
+@(require_results, enable_target_feature = "neon")
+vtrn_u32 :: #force_inline proc "c" (a, b: uint32x2_t) -> uint32x2x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 2)
+		d := simd.shuffle(a, b, 1, 3)
+		return uint32x2x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 1, 0)
+		b := simd.shuffle(b, b, 1, 0)
+		c := simd.shuffle(a, b, 0, 2)
+		d := simd.shuffle(a, b, 1, 3)
+		c  = simd.shuffle(c, c, 1, 0)
+		d  = simd.shuffle(d, d, 1, 0)
+		return uint32x2x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrnq_s8)
+@(require_results, enable_target_feature = "neon")
+vtrnq_s8 :: #force_inline proc "c" (a, b: int8x16_t) -> int8x16x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		d := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		return int8x16x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		d := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		c  = simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		return int8x16x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrnq_u8)
+@(require_results, enable_target_feature = "neon")
+vtrnq_u8 :: #force_inline proc "c" (a, b: uint8x16_t) -> uint8x16x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		d := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		return uint8x16x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		d := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		c  = simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		return uint8x16x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrnq_s16)
+@(require_results, enable_target_feature = "neon")
+vtrnq_s16 :: #force_inline proc "c" (a, b: int16x8_t) -> int16x8x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		return int16x8x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		c  = simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 7, 6, 5, 4, 3, 2, 1, 0)
+		return int16x8x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrnq_u16)
+@(require_results, enable_target_feature = "neon")
+vtrnq_u16 :: #force_inline proc "c" (a, b: uint16x8_t) -> uint16x8x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		return uint16x8x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		c  = simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 7, 6, 5, 4, 3, 2, 1, 0)
+		return uint16x8x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrnq_s32)
+@(require_results, enable_target_feature = "neon")
+vtrnq_s32 :: #force_inline proc "c" (a, b: int32x4_t) -> int32x4x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		return int32x4x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		c  = simd.shuffle(c, c, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 3, 2, 1, 0)
+		return int32x4x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrnq_u32)
+@(require_results, enable_target_feature = "neon")
+vtrnq_u32 :: #force_inline proc "c" (a, b: uint32x4_t) -> uint32x4x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		return uint32x4x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		c  = simd.shuffle(c, c, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 3, 2, 1, 0)
+		return uint32x4x2_t {c, d}
+	}
+}
+
 when ODIN_ARCH == .arm64 {
 	// Table Lookup.
 	//
diff --git a/core/simd/arm/pmull.odin b/core/simd/arm/pmull.odin
index 4ea88f776..a05301ac3 100644
--- a/core/simd/arm/pmull.odin
+++ b/core/simd/arm/pmull.odin
@@ -1243,6 +1243,226 @@ vuzpq_p16 :: #force_inline proc "c" (a, b: poly16x8_t) -> poly16x8x2_t {
 	}
 }
 
+// Reverse elements in 16-bit halfwords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev16_p8)
+@(require_results, enable_target_feature = "neon")
+vrev16_p8 :: #force_inline proc "c" (a: poly8x8_t) -> poly8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 16-bit halfwords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev16q_p8)
+@(require_results, enable_target_feature = "neon")
+vrev16q_p8 :: #force_inline proc "c" (a: poly8x16_t) -> poly8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32_p8)
+@(require_results, enable_target_feature = "neon")
+vrev32_p8 :: #force_inline proc "c" (a: poly8x8_t) -> poly8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32_p16)
+@(require_results, enable_target_feature = "neon")
+vrev32_p16 :: #force_inline proc "c" (a: poly16x4_t) -> poly16x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32q_p8)
+@(require_results, enable_target_feature = "neon")
+vrev32q_p8 :: #force_inline proc "c" (a: poly8x16_t) -> poly8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 32-bit words.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev32q_p16)
+@(require_results, enable_target_feature = "neon")
+vrev32q_p16 :: #force_inline proc "c" (a: poly16x8_t) -> poly16x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 1, 0, 3, 2, 5, 4, 7, 6)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64_p8)
+@(require_results, enable_target_feature = "neon")
+vrev64_p8 :: #force_inline proc "c" (a: poly8x8_t) -> poly8x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64_p16)
+@(require_results, enable_target_feature = "neon")
+vrev64_p16 :: #force_inline proc "c" (a: poly16x4_t) -> poly16x4_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0)
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0)
+		return simd.shuffle(b, b, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64q_p8)
+@(require_results, enable_target_feature = "neon")
+vrev64q_p8 :: #force_inline proc "c" (a: poly8x16_t) -> poly8x16_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8)
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8)
+		return simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Reverse elements in 64-bit doublewords.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrev64q_p16)
+@(require_results, enable_target_feature = "neon")
+vrev64q_p16 :: #force_inline proc "c" (a: poly16x8_t) -> poly16x8_t {
+	when ODIN_ENDIAN == .Little {
+		return simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(a, a, 3, 2, 1, 0, 7, 6, 5, 4)
+		return simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn_p8)
+@(require_results, enable_target_feature = "neon")
+vtrn_p8 :: #force_inline proc "c" (a, b: poly8x8_t) -> poly8x8x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		return poly8x8x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		c  = simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 7, 6, 5, 4, 3, 2, 1, 0)
+		return poly8x8x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn_p16)
+@(require_results, enable_target_feature = "neon")
+vtrn_p16 :: #force_inline proc "c" (a, b: poly16x4_t) -> poly16x4x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		return poly16x4x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 4, 2, 6)
+		d := simd.shuffle(a, b, 1, 5, 3, 7)
+		c  = simd.shuffle(c, c, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 3, 2, 1, 0)
+		return poly16x4x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrnq_p8)
+@(require_results, enable_target_feature = "neon")
+vtrnq_p8 :: #force_inline proc "c" (a, b: poly8x16_t) -> poly8x16x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		d := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		return poly8x16x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		d := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		c  = simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		return poly8x16x2_t {c, d}
+	}
+}
+
+// Transpose vectors.
+//
+// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrnq_p16)
+@(require_results, enable_target_feature = "neon")
+vtrnq_p16 :: #force_inline proc "c" (a, b: poly16x8_t) -> poly16x8x2_t {
+	when ODIN_ENDIAN == .Little {
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		return poly16x8x2_t {c, d}
+	} else {
+		a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+		b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+		c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		d := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		c  = simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		d  = simd.shuffle(d, d, 7, 6, 5, 4, 3, 2, 1, 0)
+		return poly16x8x2_t {c, d}
+	}
+}
+
 when ODIN_ARCH == .arm64 {
 	// Polynomial multiply long
 	//

From da2c46aaee3a8ab8094cd3d18fdada819280d88f Mon Sep 17 00:00:00 2001
From: Alexander Zhura <nice.zhura@list.ru>
Date: Fri, 25 Sep 2026 19:49:39 +0300
Subject: [PATCH 020/215] Impl simd arm neon transpose reverse set2

---
 core/simd/arm/neon.odin  | 452 +++++++++++++++++++++++++++++++++++++++
 core/simd/arm/pmull.odin | 166 ++++++++++++++
 2 files changed, 618 insertions(+)

diff --git a/core/simd/arm/neon.odin b/core/simd/arm/neon.odin
index d6f76d10b..caf6066a4 100644
--- a/core/simd/arm/neon.odin
+++ b/core/simd/arm/neon.odin
@@ -8451,6 +8451,458 @@ when ODIN_ARCH == .arm64 {
 			return simd.shuffle(c, c, 1, 0)
 		}
 	}
+
+	// Reverse bit order.
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrbit_s8)
+	@(require_results, enable_target_feature = "neon")
+	vrbit_s8 :: #force_inline proc "c" (a: int8x8_t) -> int8x8_t {
+		return simd.reverse_bits(a)
+	}
+
+	// Reverse bit order.
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrbit_u8)
+	@(require_results, enable_target_feature = "neon")
+	vrbit_u8 :: #force_inline proc "c" (a: uint8x8_t) -> uint8x8_t {
+		return simd.reverse_bits(a)
+	}
+
+	// Reverse bit order.
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrbitq_s8)
+	@(require_results, enable_target_feature = "neon")
+	vrbitq_s8 :: #force_inline proc "c" (a: int8x16_t) -> int8x16_t {
+		return simd.reverse_bits(a)
+	}
+
+	// Reverse bit order.
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrbitq_u8)
+	@(require_results, enable_target_feature = "neon")
+	vrbitq_u8 :: #force_inline proc "c" (a: uint8x16_t) -> uint8x16_t {
+		return simd.reverse_bits(a)
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_s8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1_s8 :: #force_inline proc "c" (a, b: int8x8_t) -> int8x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_u8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1_u8 :: #force_inline proc "c" (a, b: uint8x8_t) -> uint8x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_s16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1_s16 :: #force_inline proc "c" (a, b: int16x4_t) -> int16x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 4, 2, 6)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 4, 2, 6)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_u16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1_u16 :: #force_inline proc "c" (a, b: uint16x4_t) -> uint16x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 4, 2, 6)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 4, 2, 6)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_s32)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1_s32 :: #force_inline proc "c" (a, b: int32x2_t) -> int32x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 2)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 0, 2)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_u32)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1_u32 :: #force_inline proc "c" (a, b: uint32x2_t) -> uint32x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 2)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 0, 2)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_s8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_s8 :: #force_inline proc "c" (a, b: int8x16_t) -> int8x16_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		} else {
+			a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+			return simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_u8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_u8 :: #force_inline proc "c" (a, b: uint8x16_t) -> uint8x16_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		} else {
+			a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+			return simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_s16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_s16 :: #force_inline proc "c" (a, b: int16x8_t) -> int16x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_u16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_u16 :: #force_inline proc "c" (a, b: uint16x8_t) -> uint16x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_s32)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_s32 :: #force_inline proc "c" (a, b: int32x4_t) -> int32x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 4, 2, 6)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 4, 2, 6)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_u32)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_u32 :: #force_inline proc "c" (a, b: uint32x4_t) -> uint32x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 4, 2, 6)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 4, 2, 6)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_s64)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_s64 :: #force_inline proc "c" (a, b: int64x2_t) -> int64x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 2)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 0, 2)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_u64)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_u64 :: #force_inline proc "c" (a, b: uint64x2_t) -> uint64x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 2)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 0, 2)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2_s8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2_s8 :: #force_inline proc "c" (a, b: int8x8_t) -> int8x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2_u8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2_u8 :: #force_inline proc "c" (a, b: uint8x8_t) -> uint8x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2_s16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2_s16 :: #force_inline proc "c" (a, b: int16x4_t) -> int16x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 5, 3, 7)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 5, 3, 7)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2_u16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2_u16 :: #force_inline proc "c" (a, b: uint16x4_t) -> uint16x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 5, 3, 7)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 5, 3, 7)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2_s32)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2_s32 :: #force_inline proc "c" (a, b: int32x2_t) -> int32x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 3)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 1, 3)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2_u32)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2_u32 :: #force_inline proc "c" (a, b: uint32x2_t) -> uint32x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 3)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 1, 3)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_s8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_s8 :: #force_inline proc "c" (a, b: int8x16_t) -> int8x16_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		} else {
+			a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+			return simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_u8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_u8 :: #force_inline proc "c" (a, b: uint8x16_t) -> uint8x16_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		} else {
+			a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+			return simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_s16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_s16 :: #force_inline proc "c" (a, b: int16x8_t) -> int16x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_u16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_u16 :: #force_inline proc "c" (a, b: uint16x8_t) -> uint16x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_s32)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_s32 :: #force_inline proc "c" (a, b: int32x4_t) -> int32x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 5, 3, 7)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 5, 3, 7)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_u32)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_u32 :: #force_inline proc "c" (a, b: uint32x4_t) -> uint32x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 5, 3, 7)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 5, 3, 7)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_s64)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_s64 :: #force_inline proc "c" (a, b: int64x2_t) -> int64x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 3)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 1, 3)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_u64)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_u64 :: #force_inline proc "c" (a, b: uint64x2_t) -> uint64x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 3)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 1, 3)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
 }
 
 @(private, default_calling_convention = "none")
diff --git a/core/simd/arm/pmull.odin b/core/simd/arm/pmull.odin
index a05301ac3..a65e06630 100644
--- a/core/simd/arm/pmull.odin
+++ b/core/simd/arm/pmull.odin
@@ -2233,6 +2233,172 @@ when ODIN_ARCH == .arm64 {
 			return simd.shuffle(c, c, 1, 0)
 		}
 	}
+
+	// Reverse bit order.
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrbit_p8)
+	@(require_results, enable_target_feature = "neon")
+	vrbit_p8 :: #force_inline proc "c" (a: poly8x8_t) -> poly8x8_t {
+		return simd.reverse_bits(a)
+	}
+
+	// Reverse bit order.
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrbitq_p8)
+	@(require_results, enable_target_feature = "neon")
+	vrbitq_p8 :: #force_inline proc "c" (a: poly8x16_t) -> poly8x16_t {
+		return simd.reverse_bits(a)
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_p8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1_p8 :: #force_inline proc "c" (a, b: poly8x8_t) -> poly8x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_p16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1_p16 :: #force_inline proc "c" (a, b: poly16x4_t) -> poly16x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 4, 2, 6)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 4, 2, 6)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_p8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_p8 :: #force_inline proc "c" (a, b: poly8x16_t) -> poly8x16_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+		} else {
+			a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
+			return simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_p16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_p16 :: #force_inline proc "c" (a, b: poly16x8_t) -> poly16x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 0, 8, 2, 10, 4, 12, 6, 14)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (primary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1q_p64)
+	@(require_results, enable_target_feature = "neon")
+	vtrn1q_p64 :: #force_inline proc "c" (a, b: poly64x2_t) -> poly64x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 0, 2)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 0, 2)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2_p8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2_p8 :: #force_inline proc "c" (a, b: poly8x8_t) -> poly8x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2_p16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2_p16 :: #force_inline proc "c" (a, b: poly16x4_t) -> poly16x4_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 5, 3, 7)
+		} else {
+			a := simd.shuffle(a, a, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 5, 3, 7)
+			return simd.shuffle(c, c, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_p8)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_p8 :: #force_inline proc "c" (a, b: poly8x16_t) -> poly8x16_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+		} else {
+			a := simd.shuffle(a, a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
+			return simd.shuffle(c, c, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_p16)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_p16 :: #force_inline proc "c" (a, b: poly16x8_t) -> poly16x8_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+		} else {
+			a := simd.shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0)
+			b := simd.shuffle(b, b, 7, 6, 5, 4, 3, 2, 1, 0)
+			c := simd.shuffle(a, b, 1, 9, 3, 11, 5, 13, 7, 15)
+			return simd.shuffle(c, c, 7, 6, 5, 4, 3, 2, 1, 0)
+		}
+	}
+
+	// Transpose vectors (secondary).
+	//
+	// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn2q_p64)
+	@(require_results, enable_target_feature = "neon")
+	vtrn2q_p64 :: #force_inline proc "c" (a, b: poly64x2_t) -> poly64x2_t {
+		when ODIN_ENDIAN == .Little {
+			return simd.shuffle(a, b, 1, 3)
+		} else {
+			a := simd.shuffle(a, a, 1, 0)
+			b := simd.shuffle(b, b, 1, 0)
+			c := simd.shuffle(a, b, 1, 3)
+			return simd.shuffle(c, c, 1, 0)
+		}
+	}
 }
 
 @(private, default_calling_convention = "none")

From 9453e0e75eb0a43e580c63cdab6f19381be3a474 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Sat, 26 Sep 2026 19:39:53 -0400
Subject: [PATCH 021/215] Fix broadcasting arrays of matrices and matrices

---
 src/llvm_backend_expr.cpp         |  7 ++++++
 src/llvm_backend_stmt.cpp         |  2 +-
 tests/issues/run.bat              |  1 +
 tests/issues/run.sh               |  1 +
 tests/issues/test_issue_6302.odin | 39 +++++++++++++++++++++++++++++++
 5 files changed, 49 insertions(+), 1 deletion(-)
 create mode 100644 tests/issues/test_issue_6302.odin

diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index dbca83803..8b9f41750 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -1412,6 +1412,13 @@ gb_internal lbValue lb_emit_vector_mul_matrix(lbProcedure *p, lbValue lhs, lbVal
 gb_internal lbValue lb_emit_arith_matrix(lbProcedure *p, TokenKind op, lbValue lhs, lbValue rhs, Type *type, bool component_wise) {
 	GB_ASSERT(is_type_matrix(lhs.type) || is_type_matrix(rhs.type));
 
+	// NOTE: Only an array of the matrix's element type is a vector. Any other array is array programming. (See #6302)
+	Type *elem = base_array_type(is_type_matrix(lhs.type) ? lhs.type : rhs.type);
+	if ((is_type_array_like(lhs.type) && !are_types_identical(base_array_type(lhs.type), elem)) ||
+	    (is_type_array_like(rhs.type) && !are_types_identical(base_array_type(rhs.type), elem))) {
+		return lb_emit_arith_array(p, op, lhs, rhs, type);
+	}
+
 	if (op == Token_Mul && !component_wise) {
 		Type *xt = base_type(lhs.type);
 		Type *yt = base_type(rhs.type);
diff --git a/src/llvm_backend_stmt.cpp b/src/llvm_backend_stmt.cpp
index a0f0f48a3..74ffdaf82 100644
--- a/src/llvm_backend_stmt.cpp
+++ b/src/llvm_backend_stmt.cpp
@@ -3207,7 +3207,7 @@ gb_internal void lb_build_assign_stmt(lbProcedure *p, AstAssignStmt *as) {
 		if (op == Token_Mul && is_type_matrix(value.type) && is_type_array(lhs_type)) {
 			lbValue old_value = lb_addr_load(p, lhs);
 			Type *type = old_value.type;
-			lbValue new_value = lb_emit_vector_mul_matrix(p, old_value, value, type);
+			lbValue new_value = lb_emit_arith_matrix(p, op, old_value, value, type, false);
 			lb_addr_store(p, lhs, new_value);
 			return;
 		}
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 0a3127946..b10f6d786 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -30,6 +30,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin test ..\test_issue_5699.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_6068.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_6165.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_6302.odin %COMMON%  || exit /b
 ..\..\..\odin build ..\test_issue_6240.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "3" || exit /b
 ..\..\..\odin build ..\test_issue_6401.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "3" || exit /b
 ..\..\..\odin test ..\test_issue_6419.odin %COMMON%  || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 08d2db369..cf1f81a01 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -42,6 +42,7 @@ fi
 $ODIN test ../test_issue_5699.odin $COMMON
 $ODIN test ../test_issue_6068.odin $COMMON
 $ODIN test ../test_issue_6165.odin $COMMON
+$ODIN test ../test_issue_6302.odin $COMMON
 $ODIN test ../test_issue_6344.odin $COMMON
 $ODIN test ../test_issue_6344.odin $COMMON -o:speed
 $ODIN test ../test_issue_6396.odin $COMMON
diff --git a/tests/issues/test_issue_6302.odin b/tests/issues/test_issue_6302.odin
new file mode 100644
index 000000000..89e6e61af
--- /dev/null
+++ b/tests/issues/test_issue_6302.odin
@@ -0,0 +1,39 @@
+// Tests issue #6302 https://github.com/odin-lang/Odin/issues/6302
+package test_issues
+
+import "core:testing"
+
+@(test)
+test_issue_6302 :: proc(t: ^testing.T) {
+	a := [2]matrix[2, 2]f32{{0, 1, 2, 3}, {4, 5, 6, 7}}
+	b := matrix[2, 2]f32{10, 10, 10, 10}
+
+	ab_plus := a + b
+	testing.expect(t, ab_plus[0] == {10, 11, 12, 13})
+	testing.expect(t, ab_plus[1] == {14, 15, 16, 17})
+
+	ba_minus := b - a
+	testing.expect(t, ba_minus[0] == {10, 9, 8, 7})
+	testing.expect(t, ba_minus[1] == {6, 5, 4, 3})
+
+	ab_mult := a * b
+	testing.expect(t, ab_mult[0] == {10, 10, 50, 50})
+	testing.expect(t, ab_mult[1] == {90, 90, 130, 130})
+
+	ba_mult := b * a
+	testing.expect(t, ba_mult[0] == {20, 40, 20, 40})
+	testing.expect(t, ba_mult[1] == {100, 120, 100, 120})
+
+	aa_mult := a * a
+	testing.expect(t, aa_mult[0] == {2, 3, 6, 11})
+	testing.expect(t, aa_mult[1] == {46, 55, 66, 79})
+
+	n := [2][2]matrix[2, 2]f32{{a[0], a[1]}, {a[1], a[0]}}
+	nb_mult := n * b
+	testing.expect(t, nb_mult[0][1] == {90, 90, 130, 130})
+	testing.expect(t, nb_mult[1][1] == {10, 10, 50, 50})
+
+	a *= b
+	testing.expect(t, a[0] == {10, 10, 50, 50})
+	testing.expect(t, a[1] == {90, 90, 130, 130})
+}

From 13988d863a0922847a2b8a4ebd82f395a78d9647 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Sat, 26 Sep 2026 21:46:20 -0400
Subject: [PATCH 022/215] Fix forwarded `$` procedure parameters reusing the
 first instantiation

---
 src/check_type.cpp                            |  2 +-
 tests/issues/run.bat                          |  1 +
 tests/issues/run.sh                           |  1 +
 .../test_issue_forwarded_poly_proc.odin       | 24 +++++++++++++++++++
 4 files changed, 27 insertions(+), 1 deletion(-)
 create mode 100644 tests/issues/test_issue_forwarded_poly_proc.odin

diff --git a/src/check_type.cpp b/src/check_type.cpp
index cb99bb4d9..3f2084909 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -2208,7 +2208,7 @@ gb_internal Type *check_get_params(CheckerContext *ctx, Scope *scope, Ast *_para
 						bool valid = false;
 						if (is_type_proc(op.type)) {
 							Ast *expr = unparen_expr(op.expr);
-							Entity *proc_entity = entity_from_expr(expr);
+							Entity *proc_entity = strip_entity_wrapping(expr);
 							if (proc_entity) {
 								poly_const = exact_value_procedure(proc_entity->identifier.load() ? proc_entity->identifier.load() : op.expr);
 								valid = true;
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 0a3127946..db165a28e 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -45,6 +45,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin test ..\test_issue_bool_to_be_conversion.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_bool_comparison_truthiness.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_const_array_broadcast.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_forwarded_poly_proc.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_7336.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_ellipsis_type_call.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b
 ..\..\..\odin check ..\test_issue_foreign_redeclaration.odin -no-entry-point %COMMON% || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 08d2db369..a528fa5df 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -108,6 +108,7 @@ $ODIN check ../test_issue_7260.odin -no-entry-point $COMMON_CHECK
 $ODIN test ../test_issue_bool_to_be_conversion.odin $COMMON
 $ODIN test ../test_issue_bool_comparison_truthiness.odin $COMMON
 $ODIN test ../test_issue_const_array_broadcast.odin $COMMON
+$ODIN test ../test_issue_forwarded_poly_proc.odin $COMMON
 $ODIN test ../test_issue_swizzle_multi_assign.odin $COMMON
 
 $ODIN check ../test_issue_foreign_redeclaration.odin -no-entry-point $COMMON_CHECK
diff --git a/tests/issues/test_issue_forwarded_poly_proc.odin b/tests/issues/test_issue_forwarded_poly_proc.odin
new file mode 100644
index 000000000..56b3c3d89
--- /dev/null
+++ b/tests/issues/test_issue_forwarded_poly_proc.odin
@@ -0,0 +1,24 @@
+package test_issues
+
+import "core:testing"
+
+// Passing a `$` proc parameter to another `$` parameter used to reuse the first instantiation,
+// making every forwarding call run the procedure given to the first one.
+
+apply   :: proc(v: ^int, $f: proc(^int)) { f(v) }
+forward :: proc(v: ^int, $f: proc(^int)) { apply(v, f) }
+twice   :: proc(v: ^int, $f: proc(^int)) { forward(v, f) }
+one     :: proc(v: ^int) { v^ += 1 }
+hundred :: proc(v: ^int) { v^ += 100 }
+
+@(test)
+forwarded_poly_proc :: proc(t: ^testing.T) {
+	x := 0
+	forward(&x, one)
+	forward(&x, hundred)
+	twice(&x, one)
+	twice(&x, hundred)
+	forward(&x, proc(v: ^int) { v^ += 1 })
+	forward(&x, proc(v: ^int) { v^ += 100 })
+	testing.expect_value(t, x, 303)
+}

From d65d743ab71fc5da9f23ea519e64f0a10da9f912 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Sat, 26 Sep 2026 22:22:42 -0400
Subject: [PATCH 023/215] Fix full length swizzles through a pointer keeping
 the pointer type

---
 src/check_expr.cpp                |  4 ++--
 tests/issues/run.bat              |  1 +
 tests/issues/run.sh               |  1 +
 tests/issues/test_issue_7587.odin | 16 ++++++++++++++++
 4 files changed, 20 insertions(+), 2 deletions(-)
 create mode 100644 tests/issues/test_issue_7587.odin

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 758d7a5fd..fade7a46c 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -5830,7 +5830,7 @@ gb_internal Type *determine_swizzle_array_type(Type *original_type, Type *type_h
 	Type *elem_type = array_type->Array.elem;
 
 	Type *swizzle_array_type = nullptr;
-	Type *bth = base_type(type_deref(type_hint));
+	Type *bth = base_type(type_hint);
 	if (bth != nullptr && bth->kind == Type_Array &&
 	    bth->Array.count == new_count &&
 	    are_types_identical(bth->Array.elem, elem_type)) {
@@ -5838,7 +5838,7 @@ gb_internal Type *determine_swizzle_array_type(Type *original_type, Type *type_h
 	} else {
 		i64 max_count = array_type->Array.count;
 		if (new_count == max_count) {
-			swizzle_array_type = original_type;
+			swizzle_array_type = type_deref(original_type);
 		} else {
 			swizzle_array_type = alloc_type_array(elem_type, new_count);
 		}
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 0a3127946..f19e17313 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -61,6 +61,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin run ..\test_issue_7482.odin %COMMON% || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local -o:speed || exit /b
+..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 
 @echo off
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 08d2db369..eb889fa41 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -92,6 +92,7 @@ $ODIN check ../test_issue_7012.odin -no-entry-point $COMMON_CHECK
 $ODIN build ../test_issue_7037.odin $COMMON -o:none
 $ODIN run ../test_issue_7482.odin $COMMON
 $ODIN run ../test_issue_7564.odin $COMMON
+$ODIN test ../test_issue_7587.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON
 if [[ $($ODIN check ../test_issue_7421_tagged_duplicate.odin $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error: Duplicate case") -eq 1 ]]; then
 	echo "SUCCESSFUL 1/1"
diff --git a/tests/issues/test_issue_7587.odin b/tests/issues/test_issue_7587.odin
new file mode 100644
index 000000000..c6458a9a7
--- /dev/null
+++ b/tests/issues/test_issue_7587.odin
@@ -0,0 +1,16 @@
+// Tests issue #7587 https://github.com/odin-lang/Odin/issues/7587
+package test_issues
+
+import "core:testing"
+
+@(test)
+test_issue_7587 :: proc(t: ^testing.T) {
+	v := [4]f32{1, 2, 3, 4}
+	p := &v
+
+	w := p.wzyx
+	testing.expect_value(t, w, [4]f32{4, 3, 2, 1})
+
+	p.wzyx = {1, 2, 3, 4}
+	testing.expect_value(t, v, [4]f32{4, 3, 2, 1})
+}

From 11c3c339702c533f6a26d50905247f5b6e67fbb4 Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Sun, 27 Sep 2026 13:56:41 +0200
Subject: [PATCH 024/215] changed variable names to be more descriptive

---
 core/strconv/LICENSE_fast_float |  2 +-
 core/strconv/fast_float.odin    | 93 +++++++++++++++++----------------
 2 files changed, 48 insertions(+), 47 deletions(-)

diff --git a/core/strconv/LICENSE_fast_float b/core/strconv/LICENSE_fast_float
index 8ddef69e7..70afbb92d 100644
--- a/core/strconv/LICENSE_fast_float
+++ b/core/strconv/LICENSE_fast_float
@@ -1,4 +1,4 @@
-This license applies to the Eisel-Lemire code and the _POW5_128 table in
+This license applies to the Eisel-Lemire code and the _POWER_OF_FIVE_128 table in
 fast_float.odin, which are ported from ffc.h and fast_float.
 
   ffc.h:      https://github.com/kolemannix/ffc.h
diff --git a/core/strconv/fast_float.odin b/core/strconv/fast_float.odin
index a68184cad..568766e72 100644
--- a/core/strconv/fast_float.odin
+++ b/core/strconv/fast_float.odin
@@ -22,8 +22,7 @@ import "core:math/bits"
 	  Software: Practice and Experience 53 (7), 2023. https://arxiv.org/abs/2212.06644
 */
 
-@(private="file")
-_POW5_128_MIN_EXP :: -342
+_SMALLEST_POWER_OF_FIVE :: -342
 
 /*
 Computes the `T` closest to `w * 10^q`, rounding ties to even.
@@ -42,55 +41,57 @@ calls return the same bits, the result is correct. Otherwise, use a slow path.
 */
 fast_float_compute_float :: proc "contextless" ($T: typeid, q: int, w: u64) -> u64 where T == f32 || T == f64 #no_bounds_check {
 	when T == f64 {
-		MANT_BITS          :: 52
-		MIN_EXPONENT       :: -1023
-		INFINITE_POWER     :: 0x7ff
-		SMALLEST_POW10     :: -342
-		LARGEST_POW10      :: 308
-		MIN_EXP_ROUND_EVEN :: -4
-		MAX_EXP_ROUND_EVEN :: 23
+		MANTISSA_EXPLICIT_BITS     :: 52
+		MINIMUM_EXPONENT           :: -1023
+		INFINITE_POWER             :: 0x7ff
+		SMALLEST_POWER_OF_TEN      :: -342
+		LARGEST_POWER_OF_TEN       :: 308
+		MIN_EXPONENT_ROUND_TO_EVEN :: -4
+		MAX_EXPONENT_ROUND_TO_EVEN :: 23
 	} else {
-		MANT_BITS          :: 23
-		MIN_EXPONENT       :: -127
-		INFINITE_POWER     :: 0xff
-		SMALLEST_POW10     :: -64
-		LARGEST_POW10      :: 38
-		MIN_EXP_ROUND_EVEN :: -17
-		MAX_EXP_ROUND_EVEN :: 10
+		MANTISSA_EXPLICIT_BITS     :: 23
+		MINIMUM_EXPONENT           :: -127
+		INFINITE_POWER             :: 0xff
+		SMALLEST_POWER_OF_TEN      :: -64
+		LARGEST_POWER_OF_TEN       :: 38
+		MIN_EXPONENT_ROUND_TO_EVEN :: -17
+		MAX_EXPONENT_ROUND_TO_EVEN :: 10
 	}
 
-	// w <= max(u64) and q < SMALLEST_POW10 always rounds to zero.
-	if w == 0 || q < SMALLEST_POW10 {
+	// w <= max(u64) and q < SMALLEST_POWER_OF_TEN always rounds to zero.
+	if w == 0 || q < SMALLEST_POWER_OF_TEN {
 		return 0
 	}
-	if q > LARGEST_POW10 {
-		return INFINITE_POWER << MANT_BITS
+	if q > LARGEST_POWER_OF_TEN {
+		return INFINITE_POWER << MANTISSA_EXPLICIT_BITS
 	}
 
+	// Set the most significant bit of w.
 	lz := bits.count_leading_zeros(w)
-	wn := w << lz // normalized so the top bit is set
+	w := w
+	w <<= lz
 
-	// Compute a 128-bit approximation of wn * 5^q. We need the product to be accurate
-	// to MANT_BITS+3 bits. If the lower bits of the high word are all ones, the error
-	// in the first product could affect them, so we refine the result with the lower
-	// half of the power of five.
-	PRECISION_MASK :: max(u64) >> (MANT_BITS + 3)
-	pow5 := &_POW5_128[q - _POW5_128_MIN_EXP]
-	hi, lo := bits.mul_u64(wn, pow5[0])
-	if hi & PRECISION_MASK == PRECISION_MASK {
-		hi2, _ := bits.mul_u64(wn, pow5[1])
-		lo += hi2
-		if hi2 > lo {
-			hi += 1
+	// Compute a 128-bit approximation of w * 5^q. We need the product to be accurate
+	// to MANTISSA_EXPLICIT_BITS+3 bits. If the lower bits of the high word are all ones,
+	// the error in the first product could affect them, so we refine the result with
+	// the lower half of the power of five.
+	PRECISION_MASK :: max(u64) >> (MANTISSA_EXPLICIT_BITS + 3)
+	pow5 := &_POWER_OF_FIVE_128[q - _SMALLEST_POWER_OF_FIVE]
+	high, low := bits.mul_u64(w, pow5[0])
+	if high & PRECISION_MASK == PRECISION_MASK {
+		second_high, _ := bits.mul_u64(w, pow5[1])
+		low += second_high
+		if second_high > low {
+			high += 1
 		}
 	}
 	// Mushtak & Lemire (2023) prove that this product is always accurate enough.
 
-	upperbit := int(hi >> 63)
-	shift    := uint(upperbit + 64 - MANT_BITS - 3)
-	mantissa := hi >> shift
+	upperbit := int(high >> 63)
+	shift    := uint(upperbit + 64 - MANTISSA_EXPLICIT_BITS - 3)
+	mantissa := high >> shift
 	// ((152170 + 65536) * q) >> 16 is floor(q * log2(10)) for |q| < 1650.
-	power2   := (((152170 + 65536) * q) >> 16) + 63 + upperbit - int(lz) - MIN_EXPONENT
+	power2   := (((152170 + 65536) * q) >> 16) + 63 + upperbit - int(lz) - MINIMUM_EXPONENT
 
 	if power2 <= 0 {
 		// Subnormal result.
@@ -108,28 +109,28 @@ fast_float_compute_float :: proc "contextless" ($T: typeid, q: int, w: u64) -> u
 	// We usually round up. If the value is exactly halfway between two floats,
 	// and the lower float is even, we must round down. An exact halfway value is
 	// possible only for a small range of exponents.
-	if lo <= 1 && q >= MIN_EXP_ROUND_EVEN && q <= MAX_EXP_ROUND_EVEN && mantissa & 3 == 1 {
-		if mantissa << shift == hi {
+	if low <= 1 && q >= MIN_EXPONENT_ROUND_TO_EVEN && q <= MAX_EXPONENT_ROUND_TO_EVEN && mantissa & 3 == 1 {
+		if mantissa << shift == high {
 			mantissa &~= 1
 		}
 	}
 	mantissa += mantissa & 1 // round up
 	mantissa >>= 1
-	if mantissa >= 2 << MANT_BITS {
-		mantissa = 1 << MANT_BITS
+	if mantissa >= 2 << MANTISSA_EXPLICIT_BITS {
+		mantissa = 1 << MANTISSA_EXPLICIT_BITS
 		power2 += 1
 	}
-	mantissa &~= 1 << MANT_BITS
+	mantissa &~= 1 << MANTISSA_EXPLICIT_BITS
 	if power2 >= INFINITE_POWER {
-		return INFINITE_POWER << MANT_BITS
+		return INFINITE_POWER << MANTISSA_EXPLICIT_BITS
 	}
-	return mantissa | u64(power2) << MANT_BITS
+	return mantissa | u64(power2) << MANTISSA_EXPLICIT_BITS
 }
 
 // 128-bit truncated mantissas of 5^-342 to 5^308, with the most significant
 // bit set. Generated by fast_float script/table_generation.py.
-@(private="file", rodata)
-_POW5_128 := [651][2]u64{
+@(rodata)
+_POWER_OF_FIVE_128 := [651][2]u64{
 	{0xeef453d6923bd65a, 0x113faa2906a13b3f}, // 5^-342
 	{0x9558b4661b6565f8, 0x4ac7ca59a424c507}, // 5^-341
 	{0xbaaee17fa23ebf76, 0x5d79bcf00d2df649}, // 5^-340

From fc8b49f5f50b86dcdad5fb2bd9f3fbf9f20b8eba Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Sun, 27 Sep 2026 10:39:39 -0400
Subject: [PATCH 025/215] Fix the same `$` procedure argument generating
 duplicate instantiations

---
 src/checker.cpp                                 |  4 +++-
 tests/issues/run.bat                            |  1 +
 tests/issues/run.sh                             |  1 +
 .../test_issue_proc_constant_instantiation.odin | 17 +++++++++++++++++
 4 files changed, 22 insertions(+), 1 deletion(-)
 create mode 100644 tests/issues/test_issue_proc_constant_instantiation.odin

diff --git a/src/checker.cpp b/src/checker.cpp
index f9e1f523f..fa65098a8 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -2153,7 +2153,9 @@ gb_internal void add_entity_use(CheckerContext *c, Ast *identifier, Entity *enti
 	if (identifier == nullptr || identifier->kind != Ast_Ident) {
 		return;
 	}
-	entity->identifier.store(identifier);
+	// NOTE: only set it once, as `$` procedure arguments are matched by this identifier
+	Ast *empty_ident = nullptr;
+	entity->identifier.compare_exchange_strong(empty_ident, identifier);
 
 	identifier->Ident.entity = entity;
 
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index db165a28e..21286575a 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -46,6 +46,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin test ..\test_issue_bool_comparison_truthiness.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_const_array_broadcast.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_forwarded_poly_proc.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_proc_constant_instantiation.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_7336.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_ellipsis_type_call.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b
 ..\..\..\odin check ..\test_issue_foreign_redeclaration.odin -no-entry-point %COMMON% || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index a528fa5df..0d049886e 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -109,6 +109,7 @@ $ODIN test ../test_issue_bool_to_be_conversion.odin $COMMON
 $ODIN test ../test_issue_bool_comparison_truthiness.odin $COMMON
 $ODIN test ../test_issue_const_array_broadcast.odin $COMMON
 $ODIN test ../test_issue_forwarded_poly_proc.odin $COMMON
+$ODIN test ../test_issue_proc_constant_instantiation.odin $COMMON
 $ODIN test ../test_issue_swizzle_multi_assign.odin $COMMON
 
 $ODIN check ../test_issue_foreign_redeclaration.odin -no-entry-point $COMMON_CHECK
diff --git a/tests/issues/test_issue_proc_constant_instantiation.odin b/tests/issues/test_issue_proc_constant_instantiation.odin
new file mode 100644
index 000000000..718f6d06b
--- /dev/null
+++ b/tests/issues/test_issue_proc_constant_instantiation.odin
@@ -0,0 +1,17 @@
+package test_issues
+
+import "core:testing"
+
+// Passing the same procedure to a `$` parameter from two calls used to generate two instantiations,
+// each with its own `Box` crashing the compiler.
+
+box_of :: proc($f: proc() -> int) -> typeid {
+	Box :: struct {}
+	return Box
+}
+one :: proc() -> int { return 1 }
+
+@(test)
+proc_constant_instantiation :: proc(t: ^testing.T) {
+	testing.expect_value(t, box_of(one), box_of(one))
+}

From cfff95749b1f0698d27d95ac49cb093da16958c2 Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Sun, 27 Sep 2026 18:01:26 +0200
Subject: [PATCH 026/215] Ported SWAR based string parsing from fast_float to
 Odin

---
 core/strconv/LICENSE_fast_float |   4 +-
 core/strconv/fast_float.odin    | 346 +++++++++++++++++++++++++++++++-
 2 files changed, 346 insertions(+), 4 deletions(-)

diff --git a/core/strconv/LICENSE_fast_float b/core/strconv/LICENSE_fast_float
index 70afbb92d..f37596968 100644
--- a/core/strconv/LICENSE_fast_float
+++ b/core/strconv/LICENSE_fast_float
@@ -1,5 +1,5 @@
-This license applies to the Eisel-Lemire code and the _POWER_OF_FIVE_128 table in
-fast_float.odin, which are ported from ffc.h and fast_float.
+This license applies to the code in fast_float.odin, which is ported from
+ffc.h and fast_float.
 
   ffc.h:      https://github.com/kolemannix/ffc.h
   fast_float: https://github.com/fastfloat/fast_float
diff --git a/core/strconv/fast_float.odin b/core/strconv/fast_float.odin
index 568766e72..f65992e6a 100644
--- a/core/strconv/fast_float.odin
+++ b/core/strconv/fast_float.odin
@@ -1,9 +1,11 @@
 package strconv
 
+import "base:intrinsics"
 import "core:math/bits"
 
 /*
-	Eisel-Lemire decimal to binary conversion.
+	Decimal to binary float conversion: a fast scanner for decimal floats
+	and the Eisel-Lemire algorithm.
 
 	Ported from ffc.h (https://github.com/kolemannix/ffc.h)
 	Made available under the Boost Software License 1.0,
@@ -76,7 +78,7 @@ fast_float_compute_float :: proc "contextless" ($T: typeid, q: int, w: u64) -> u
 	// the error in the first product could affect them, so we refine the result with
 	// the lower half of the power of five.
 	PRECISION_MASK :: max(u64) >> (MANTISSA_EXPLICIT_BITS + 3)
-	pow5 := &_POWER_OF_FIVE_128[q - _SMALLEST_POWER_OF_FIVE]
+	pow5 := _POWER_OF_FIVE_128[q - _SMALLEST_POWER_OF_FIVE]
 	high, low := bits.mul_u64(w, pow5[0])
 	if high & PRECISION_MASK == PRECISION_MASK {
 		second_high, _ := bits.mul_u64(w, pow5[1])
@@ -127,6 +129,346 @@ fast_float_compute_float :: proc "contextless" ($T: typeid, q: int, w: u64) -> u
 	return mantissa | u64(power2) << MANTISSA_EXPLICIT_BITS
 }
 
+// A fast scanner for the common decimal float syntax, `[+-] digits [. digits] [(e|E) [+-] digits]`.
+// It reads 8 digits at a time with SWAR ("SIMD within a register") integer arithmetic.
+//
+// It skips a `_` between digits, and a second `.` ends the number.
+// It returns `ok = false` for a hex float, "inf", "nan", and a string that is not a number.
+// Then the caller tries `check_special` and `scan_hex_float`.
+
+@(private)
+MAX_SIG_DIGITS :: 19 // 10^19 - 1 < 2^64
+
+/*
+Scans a decimal floating-point number at the start of `s`.
+
+**Returns**
+- mantissa, exp: The value is `mantissa * 10^exp`. If `trunc` is true, the significant digits after the first 19 were dropped, and at least one of them was not zero.
+- neg: The number has a minus sign.
+- nr: The number of bytes in the number.
+- ok: `false` if `s` does not start with a decimal number.
+*/
+parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa: u64, exp: int, neg, trunc: bool, nr: int, ok: bool) #no_bounds_check {
+	n := len(s)
+	if n == 0 {
+		return
+	}
+	// Written without branches, because the sign of the input is often unpredictable.
+	neg = s[0] == '-'
+	i := int(neg || s[0] == '+')
+	if i+2 < n && s[i] == '0' && lower(s[i+1]) == 'x' {
+		return // a hex float
+	}
+
+	// Integer part
+	int_start := i
+	for i < n && s[i] - '0' <= 9 {
+		mantissa = mantissa*10 + u64(s[i] - '0')
+		i += 1
+	}
+	digits := i - int_start
+	if i < n && s[i] == '_' {
+		more: int
+		i, mantissa, more = parse_digits_with_separators(s, i, mantissa)
+		digits += more
+	}
+
+	// Fraction part
+	if i < n && s[i] == '.' {
+		i += 1
+		frac_start := i
+		i, mantissa = loop_parse_if_eight_digits(s, i, mantissa)
+		for i < n && s[i] - '0' <= 9 {
+			mantissa = mantissa*10 + u64(s[i] - '0')
+			i += 1
+		}
+		frac_digits := i - frac_start
+		if i < n && s[i] == '_' {
+			more: int
+			i, mantissa, more = parse_digits_with_separators(s, i, mantissa)
+			frac_digits += more
+		}
+		exp = -frac_digits
+		digits += frac_digits
+	}
+	if digits == 0 {
+		return
+	}
+	if digits > MAX_SIG_DIGITS {
+		// The mantissa may have overflowed (unless most digits are leading zeros).
+		return scan_decimal_exact(s)
+	}
+
+	// Exponent part. The first byte after `e` and the sign must be a digit.
+	if i < n && lower(s[i]) == 'e' {
+		i += 1
+		exp_neg := false
+		if i < n && (s[i] == '+' || s[i] == '-') {
+			exp_neg = s[i] == '-'
+			i += 1
+		}
+		if i >= n || s[i] - '0' > 9 {
+			return // not a valid exponent, so not a number
+		}
+		x := 0
+		for i < n && s[i] - '0' <= 9 {
+			if x < 100_000 { // larger exponents overflow or underflow anyway
+				x = x*10 + int(s[i] - '0')
+			}
+			i += 1
+		}
+		if i < n && s[i] == '_' {
+			i, x = parse_exponent_with_separators(s, i, x)
+		}
+		exp += -x if exp_neg else x
+	}
+
+	if mantissa == 0 {
+		exp = 0
+	}
+	nr, ok = i, true
+	return
+}
+
+
+// Returns the new position, the mantissa and the number of digits.
+@(cold)
+parse_digits_with_separators :: proc "contextless" (s: string, i: int, mantissa: u64) -> (int, u64, int) #no_bounds_check {
+	i, mantissa := i, mantissa
+	digits := 0
+	for i < len(s) {
+		if s[i] - '0' <= 9 {
+			mantissa = mantissa*10 + u64(s[i] - '0')
+			digits += 1
+		} else if s[i] != '_' {
+			break
+		}
+		i += 1
+	}
+	return i, mantissa, digits
+}
+
+@(cold)
+parse_exponent_with_separators :: proc "contextless" (s: string, i: int, x: int) -> (int, int) #no_bounds_check {
+	i, x := i, x
+	for i < len(s) {
+		if s[i] - '0' <= 9 {
+			if x < 100_000 { // larger exponents overflow or underflow anyway
+				x = x*10 + int(s[i] - '0')
+			}
+		} else if s[i] != '_' {
+			break
+		}
+		i += 1
+	}
+	return i, x
+}
+
+// It is only used for numbers with more than 19 digits
+scan_decimal_exact :: proc "contextless" (s: string) -> (mantissa: u64, exp: int, neg, trunc: bool, nr: int, ok: bool) #no_bounds_check {
+	n := len(s)
+	if n == 0 {
+		return
+	}
+	neg = s[0] == '-'
+	i := int(neg || s[0] == '+')
+	if i+2 < n && s[i] == '0' && lower(s[i+1]) == 'x' {
+		return // a hex float
+	}
+
+	m:  u64 // significant digits
+	nd: int // number of significant digits in m
+	e:  int // decimal exponent
+	saw_digits := false
+
+	// Integer part. Leading zeros do not count as significant digits, and `_` is skipped
+	for i+8 <= n && read8_to_u64(s, i) == 0x3030_3030_3030_3030 {
+		i += 8
+		saw_digits = true
+	}
+	for i < n && (s[i] == '0' || s[i] == '_') {
+		saw_digits ||= s[i] == '0'
+		i += 1
+	}
+	for i+8 <= n && nd+8 <= MAX_SIG_DIGITS {
+		v := read8_to_u64(s, i)
+		if !is_made_of_eight_digits_fast(v) {
+			break
+		}
+		m = m*100_000_000 + parse_eight_digits_unrolled(v)
+		nd += 8
+		i += 8
+		saw_digits = true
+	}
+	for i < n {
+		d := s[i] - '0'
+		if d > 9 {
+			if s[i] != '_' {
+				break
+			}
+		} else if nd < MAX_SIG_DIGITS {
+			m = m*10 + u64(d)
+			nd += 1
+			saw_digits = true
+		} else {
+			e += 1 // dropped digit
+			trunc ||= d != 0
+		}
+		i += 1
+	}
+
+	// Fraction part
+	if i < n && s[i] == '.' {
+		i += 1
+		if m == 0 {
+			// Leading zeros of the fraction change only the exponent
+			for i+8 <= n && read8_to_u64(s, i) == 0x3030_3030_3030_3030 {
+				e -= 8
+				i += 8
+				saw_digits = true
+			}
+			for i < n && (s[i] == '0' || s[i] == '_') {
+				if s[i] == '0' {
+					e -= 1
+					saw_digits = true
+				}
+				i += 1
+			}
+		}
+		for i+8 <= n && nd+8 <= MAX_SIG_DIGITS {
+			v := read8_to_u64(s, i)
+			if !is_made_of_eight_digits_fast(v) {
+				break
+			}
+			m = m*100_000_000 + parse_eight_digits_unrolled(v)
+			nd += 8
+			e -= 8
+			i += 8
+			saw_digits = true
+		}
+		if i+4 <= n && nd+4 <= MAX_SIG_DIGITS {
+			v := read4_to_u32(s, i)
+			if is_made_of_four_digits_fast(v) {
+				m = m*10_000 + parse_four_digits_unrolled(v)
+				nd += 4
+				e -= 4
+				i += 4
+				saw_digits = true
+			}
+		}
+		for i < n {
+			d := s[i] - '0'
+			if d > 9 {
+				if s[i] != '_' {
+					break
+				}
+			} else if m == 0 && d == 0 {
+				e -= 1 // a leading zero of the fraction
+				saw_digits = true
+			} else if nd < MAX_SIG_DIGITS {
+				m = m*10 + u64(d)
+				nd += 1
+				e -= 1
+				saw_digits = true
+			} else {
+				trunc ||= d != 0 // dropped digit
+				saw_digits = true
+			}
+			i += 1
+		}
+	}
+	if !saw_digits {
+		return
+	}
+
+	// Exponent part. The first byte after `e` and the sign must be a digit
+	if i < n && lower(s[i]) == 'e' {
+		i += 1
+		exp_neg := false
+		if i < n && (s[i] == '+' || s[i] == '-') {
+			exp_neg = s[i] == '-'
+			i += 1
+		}
+		if i >= n || s[i] - '0' > 9 {
+			return // not a valid exponent, so not a number
+		}
+		x := 0
+		for i < n {
+			d := s[i] - '0'
+			if d > 9 {
+				if s[i] != '_' {
+					break
+				}
+			} else if x < 100_000 { // larger exponents overflow or underflow anyway
+				x = x*10 + int(d)
+			}
+			i += 1
+		}
+		e += -x if exp_neg else x
+	}
+
+	if m == 0 {
+		e = 0
+		trunc = false
+	}
+	return m, e, neg, trunc, i, true
+}
+
+// Loads 8 bytes starting at `s[i]` in little-endian order. The caller checks that `i+8 <= len(s)`.
+read8_to_u64 :: #force_inline proc "contextless" (s: string, i: int) -> u64 {
+	return u64(intrinsics.unaligned_load((^u64le)(&raw_data(s)[i])))
+}
+
+read4_to_u32 :: #force_inline proc "contextless" (s: string, i: int) -> u32 {
+	return u32(intrinsics.unaligned_load((^u32le)(&raw_data(s)[i])))
+}
+
+// Reports if all 8 bytes of `v` are ASCII digits.
+is_made_of_eight_digits_fast :: #force_inline proc "contextless" (v: u64) -> bool {
+	return ((v + 0x4646_4646_4646_4646) | (v - 0x3030_3030_3030_3030)) & 0x8080_8080_8080_8080 == 0
+}
+
+is_made_of_four_digits_fast :: #force_inline proc "contextless" (v: u32) -> bool {
+	return ((v + 0x4646_4646) | (v - 0x3030_3030)) & 0x8080_8080 == 0
+}
+
+// Returns the new position and mantissa.
+loop_parse_if_eight_digits :: #force_inline proc "contextless" (s: string, i: int, m: u64) -> (int, u64) #no_bounds_check {
+	i, m := i, m
+	for i+8 <= len(s) {
+		v := read8_to_u64(s, i)
+		if !is_made_of_eight_digits_fast(v) {
+			break
+		}
+		m = m*100_000_000 + parse_eight_digits_unrolled(v)
+		i += 8
+	}
+	if i+4 <= len(s) {
+		v := read4_to_u32(s, i)
+		if is_made_of_four_digits_fast(v) {
+			m = m*10_000 + parse_four_digits_unrolled(v)
+			i += 4
+		}
+	}
+	return i, m
+}
+
+// Converts 8 ASCII digits (the first digit in the lowest byte) to their value
+parse_eight_digits_unrolled :: #force_inline proc "contextless" (chars: u64) -> u64 {
+	MASK :: 0x0000_00ff_0000_00ff
+	MUL1 :: 0x000f_4240_0000_0064 // 100 + (1000000 << 32)
+	MUL2 :: 0x0000_2710_0000_0001 // 1 + (10000 << 32)
+	v := chars - 0x3030_3030_3030_3030
+	v = v*10 + v>>8
+	return u64(u32(((v & MASK)*MUL1 + ((v>>16) & MASK)*MUL2) >> 32))
+}
+
+parse_four_digits_unrolled :: #force_inline proc "contextless" (chars: u32) -> u64 {
+	v := chars - 0x3030_3030
+	v = v*10 + v>>8
+	return u64(((v & 0x00ff_00ff) * 0x0064_0001) >> 16)
+}
+
 // 128-bit truncated mantissas of 5^-342 to 5^308, with the most significant
 // bit set. Generated by fast_float script/table_generation.py.
 @(rodata)

From 432ca38c54daf43f3ad2470e7b1b835f2c7598fc Mon Sep 17 00:00:00 2001
From: dogue <dogue@oddhelix.com>
Date: Sun, 27 Sep 2026 18:20:47 -0400
Subject: [PATCH 027/215] [vendor:sdl2/sdl_render.odin]: add `RenderSetVSync`
 binding

---
 vendor/sdl2/sdl_render.odin | 1 +
 1 file changed, 1 insertion(+)

diff --git a/vendor/sdl2/sdl_render.odin b/vendor/sdl2/sdl_render.odin
index 5e913e5a3..0bec18d7d 100644
--- a/vendor/sdl2/sdl_render.odin
+++ b/vendor/sdl2/sdl_render.odin
@@ -143,4 +143,5 @@ foreign lib {
 	GL_UnbindTexture             :: proc(texture:  ^Texture) -> c.int ---
 	RenderGetMetalLayer          :: proc(renderer: ^Renderer) -> rawptr ---
 	RenderGetMetalCommandEncoder :: proc(renderer: ^Renderer) -> rawptr ---
+	RenderSetVSync				 :: proc(renderer: ^Renderer, vsync: bool) -> c.int ---
 }

From 7b10b43f082018ec9d318bc4e425128f835ba782 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Mon, 28 Sep 2026 09:47:53 -0400
Subject: [PATCH 028/215] Rename the forwarded `$` procedure test after #6951

---
 tests/issues/run.bat                                            | 2 +-
 tests/issues/run.sh                                             | 2 +-
 ...test_issue_forwarded_poly_proc.odin => test_issue_6951.odin} | 1 +
 3 files changed, 3 insertions(+), 2 deletions(-)
 rename tests/issues/{test_issue_forwarded_poly_proc.odin => test_issue_6951.odin} (91%)

diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 3f8139e7d..ba8bc7819 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -38,6 +38,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin check ..\test_issue_6484.odin -no-entry-point %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_6753.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_6874.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "1" || exit /b
+..\..\..\odin test ..\test_issue_6951.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_6979.odin -no-entry-point %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7008.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_7012.odin -no-entry-point %COMMON% || exit /b
@@ -45,7 +46,6 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin test ..\test_issue_bool_to_be_conversion.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_bool_comparison_truthiness.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_const_array_broadcast.odin %COMMON%  || exit /b
-..\..\..\odin test ..\test_issue_forwarded_poly_proc.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_proc_constant_instantiation.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_7336.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_ellipsis_type_call.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 0c518136e..02d9e740c 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -86,6 +86,7 @@ else
 	echo "SUCCESSFUL 0/1"
 	exit 1
 fi
+$ODIN test ../test_issue_6951.odin $COMMON
 $ODIN check ../test_issue_6979.odin -no-entry-point $COMMON_CHECK
 $ODIN test ../test_issue_7008.odin $COMMON
 $ODIN check ../test_issue_7012.odin -no-entry-point $COMMON_CHECK
@@ -109,7 +110,6 @@ $ODIN check ../test_issue_7260.odin -no-entry-point $COMMON_CHECK
 $ODIN test ../test_issue_bool_to_be_conversion.odin $COMMON
 $ODIN test ../test_issue_bool_comparison_truthiness.odin $COMMON
 $ODIN test ../test_issue_const_array_broadcast.odin $COMMON
-$ODIN test ../test_issue_forwarded_poly_proc.odin $COMMON
 $ODIN test ../test_issue_proc_constant_instantiation.odin $COMMON
 $ODIN test ../test_issue_swizzle_multi_assign.odin $COMMON
 
diff --git a/tests/issues/test_issue_forwarded_poly_proc.odin b/tests/issues/test_issue_6951.odin
similarity index 91%
rename from tests/issues/test_issue_forwarded_poly_proc.odin
rename to tests/issues/test_issue_6951.odin
index 56b3c3d89..327bb738c 100644
--- a/tests/issues/test_issue_forwarded_poly_proc.odin
+++ b/tests/issues/test_issue_6951.odin
@@ -1,3 +1,4 @@
+// Tests issue #6951 https://github.com/odin-lang/Odin/issues/6951
 package test_issues
 
 import "core:testing"

From e9657d17b686cba5afadeca79e42ef62e7162840 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Mon, 28 Sep 2026 09:58:32 -0400
Subject: [PATCH 029/215] Cover #5214 in the forwarded `$` procedure test

---
 tests/issues/run.bat                   |  2 +-
 tests/issues/run.sh                    |  2 +-
 tests/issues/test_issue_6951.odin      | 25 ---------------------
 tests/issues/test_issue_6951_5214.odin | 31 ++++++++++++++++++++++++++
 4 files changed, 33 insertions(+), 27 deletions(-)
 delete mode 100644 tests/issues/test_issue_6951.odin
 create mode 100644 tests/issues/test_issue_6951_5214.odin

diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index ba8bc7819..a13032c6c 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -38,7 +38,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin check ..\test_issue_6484.odin -no-entry-point %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_6753.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_6874.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "1" || exit /b
-..\..\..\odin test ..\test_issue_6951.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_6951_5214.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_6979.odin -no-entry-point %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7008.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_7012.odin -no-entry-point %COMMON% || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 02d9e740c..f84672838 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -86,7 +86,7 @@ else
 	echo "SUCCESSFUL 0/1"
 	exit 1
 fi
-$ODIN test ../test_issue_6951.odin $COMMON
+$ODIN test ../test_issue_6951_5214.odin $COMMON
 $ODIN check ../test_issue_6979.odin -no-entry-point $COMMON_CHECK
 $ODIN test ../test_issue_7008.odin $COMMON
 $ODIN check ../test_issue_7012.odin -no-entry-point $COMMON_CHECK
diff --git a/tests/issues/test_issue_6951.odin b/tests/issues/test_issue_6951.odin
deleted file mode 100644
index 327bb738c..000000000
--- a/tests/issues/test_issue_6951.odin
+++ /dev/null
@@ -1,25 +0,0 @@
-// Tests issue #6951 https://github.com/odin-lang/Odin/issues/6951
-package test_issues
-
-import "core:testing"
-
-// Passing a `$` proc parameter to another `$` parameter used to reuse the first instantiation,
-// making every forwarding call run the procedure given to the first one.
-
-apply   :: proc(v: ^int, $f: proc(^int)) { f(v) }
-forward :: proc(v: ^int, $f: proc(^int)) { apply(v, f) }
-twice   :: proc(v: ^int, $f: proc(^int)) { forward(v, f) }
-one     :: proc(v: ^int) { v^ += 1 }
-hundred :: proc(v: ^int) { v^ += 100 }
-
-@(test)
-forwarded_poly_proc :: proc(t: ^testing.T) {
-	x := 0
-	forward(&x, one)
-	forward(&x, hundred)
-	twice(&x, one)
-	twice(&x, hundred)
-	forward(&x, proc(v: ^int) { v^ += 1 })
-	forward(&x, proc(v: ^int) { v^ += 100 })
-	testing.expect_value(t, x, 303)
-}
diff --git a/tests/issues/test_issue_6951_5214.odin b/tests/issues/test_issue_6951_5214.odin
new file mode 100644
index 000000000..66a065237
--- /dev/null
+++ b/tests/issues/test_issue_6951_5214.odin
@@ -0,0 +1,31 @@
+// Tests issues #6951 https://github.com/odin-lang/Odin/issues/6951
+// and #5214 https://github.com/odin-lang/Odin/issues/5214
+package test_issues
+
+import "core:testing"
+
+// Passing a `$` proc parameter to another `$` parameter used to reuse the first instantiation,
+// making every forwarding call run the procedure given to the first one.
+
+apply       :: proc(v: ^int, $f: proc(^int)) { f(v) }
+forward     :: proc(v: ^int, $f: proc(^int)) { apply(v, f) }
+twice       :: proc(v: ^int, $f: proc(^int)) { forward(v, f) }
+apply_any   :: proc(v: ^int, $f: $F) { f(v) }
+forward_any :: proc(v: ^int, $f: $F) { apply_any(v, f) }
+one         :: proc(v: ^int) { v^ += 1 }
+ten         :: proc "contextless" (v: ^int) { v^ += 10 }
+hundred     :: proc(v: ^int) { v^ += 100 }
+
+@(test)
+forwarded_poly_proc :: proc(t: ^testing.T) {
+	x := 0
+	forward(&x, one)
+	forward(&x, hundred)
+	twice(&x, one)
+	twice(&x, hundred)
+	forward(&x, proc(v: ^int) { v^ += 1 })
+	forward(&x, proc(v: ^int) { v^ += 100 })
+	forward_any(&x, one)
+	forward_any(&x, ten)
+	testing.expect_value(t, x, 314)
+}

From 4269f09236cbcf46531998045edf2495802a58ff Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Mon, 28 Sep 2026 16:00:01 +0200
Subject: [PATCH 030/215] moved license notice into fast_float.odin

---
 core/strconv/LICENSE_fast_float | 31 -------------------------------
 core/strconv/fast_float.odin    | 33 +++++++++++++++++++++++++++++++++
 2 files changed, 33 insertions(+), 31 deletions(-)
 delete mode 100644 core/strconv/LICENSE_fast_float

diff --git a/core/strconv/LICENSE_fast_float b/core/strconv/LICENSE_fast_float
deleted file mode 100644
index 70afbb92d..000000000
--- a/core/strconv/LICENSE_fast_float
+++ /dev/null
@@ -1,31 +0,0 @@
-This license applies to the Eisel-Lemire code and the _POWER_OF_FIVE_128 table in
-fast_float.odin, which are ported from ffc.h and fast_float.
-
-  ffc.h:      https://github.com/kolemannix/ffc.h
-  fast_float: https://github.com/fastfloat/fast_float
-
-Copyright (c) 2021 The fast_float authors
-
-Boost Software License - Version 1.0 - August 17th, 2003
-
-Permission is hereby granted, free of charge, to any person or organization
-obtaining a copy of the software and accompanying documentation covered by
-this license (the "Software") to use, reproduce, display, distribute,
-execute, and transmit the Software, and to prepare derivative works of the
-Software, and to permit third-parties to whom the Software is furnished to
-do so, all subject to the following:
-
-The copyright notices in the Software and this entire statement, including
-the above license grant, this restriction and the following disclaimer,
-must be included in all copies of the Software, in whole or in part, and
-all derivative works of the Software, unless such copies or derivative
-works are solely in the form of machine-executable object code generated by
-a source language processor.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
-SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
-FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
-ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-DEALINGS IN THE SOFTWARE.
diff --git a/core/strconv/fast_float.odin b/core/strconv/fast_float.odin
index 568766e72..83e63b2a5 100644
--- a/core/strconv/fast_float.odin
+++ b/core/strconv/fast_float.odin
@@ -783,3 +783,36 @@ _POWER_OF_FIVE_128 := [651][2]u64{
 	{0xe3d8f9e563a198e5, 0x58180fddd97723a6}, // 5^307
 	{0x8e679c2f5e44ff8f, 0x570f09eaa7ea7648}, // 5^308
 }
+
+/*
+Ported from ffc.h and fast_float.
+
+  ffc.h:      https://github.com/kolemannix/ffc.h
+  fast_float: https://github.com/fastfloat/fast_float
+
+Copyright (c) 2021 The fast_float authors
+
+Boost Software License - Version 1.0 - August 17th, 2003
+
+Permission is hereby granted, free of charge, to any person or organization
+obtaining a copy of the software and accompanying documentation covered by
+this license (the "Software") to use, reproduce, display, distribute,
+execute, and transmit the Software, and to prepare derivative works of the
+Software, and to permit third-parties to whom the Software is furnished to
+do so, all subject to the following:
+
+The copyright notices in the Software and this entire statement, including
+the above license grant, this restriction and the following disclaimer,
+must be included in all copies of the Software, in whole or in part, and
+all derivative works of the Software, unless such copies or derivative
+works are solely in the form of machine-executable object code generated by
+a source language processor.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.
+*/

From b9c4067f7874507a2d05eae774d5c2ced7140c12 Mon Sep 17 00:00:00 2001
From: alyekypo <alyekypo@gmail.com>
Date: Mon, 28 Sep 2026 19:32:04 +0000
Subject: [PATCH 031/215] fix(llvm): emit union constants for non-constantable
 unions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

`constant: U : value` produced a constant of the wrong type:
lb_const_value took its union-lowering branch only when
`is_type_union_constantable(type)` held, so for a union with a variant
that whitelist rejects (`union{bool, ^int}`) the value fell through to
the scalar branch and reached `LLVMConstInt(lb_type(m, union_type),
...)`.  The constant emitted there does not match the union's type:
bytes that change between runs for `true`, a compiler crash for `1.0`,
an `is_type_string` assertion for a string literal.

The checker already resolves which variant a constant represents and
records it in `ExactValue::variant_type` - the variant type, tag index,
payload and padding the union branch needs - so that branch is now also
taken when the value pins a variant this backend can build as a
constant.  The type-level whitelist was re-guessing information the
value already carries; variant types this backend cannot build as
constants (`any`) stay excluded.

lb_build_static_variables had the same defect in another place: it
lowered an initializer with the expression's type instead of the
declared type, so `@(static) s: U` emitted a payload-only constant and
LLVM rejected the module with “Global variable initializer type does not
match global variable type!”.  It now passes the declared type and gives
the global the constant's layout-compatible type, the way the file-scope
path already does.

Blast radius: every union-typed constant, i.e. typed constants, global
static initializers, @(static)/@(thread_local)/@(rodata), default
parameters and constant aggregate elements.  Unions whose variants are
all constantable keep the previous path.
---
 src/llvm_backend_const.cpp                    |   6 +-
 src/llvm_backend_stmt.cpp                     |  18 +-
 .../test_union_const_nonconstantable.odin     | 196 ++++++++++++++++++
 3 files changed, 218 insertions(+), 2 deletions(-)
 create mode 100644 tests/internal/test_union_const_nonconstantable.odin

diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index 31d1e16fb..01e049544 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -830,7 +830,11 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 	bool is_local = cc.allow_local && m->curr_procedure != nullptr;
 
 
-	if (is_type_union(type) && is_type_union_constantable(type)) {
+	// A union constant needs a payload this backend can build, and the checker pins
+	// `variant_type` even for variants it cannot (`any` needs a backing global and a typeid),
+	// so ask the same question the aggregate constant paths ask.
+	if (is_type_union(type) && (is_type_union_constantable(type) ||
+	    (value.variant_type != nullptr && elem_type_can_be_constant(value.variant_type)))) {
 		Type *bt = base_type(type);
 		GB_ASSERT(bt->kind == Type_Union);
 		if (bt->Union.variants.count == 0) {
diff --git a/src/llvm_backend_stmt.cpp b/src/llvm_backend_stmt.cpp
index a0f0f48a3..b888d86bd 100644
--- a/src/llvm_backend_stmt.cpp
+++ b/src/llvm_backend_stmt.cpp
@@ -2434,7 +2434,7 @@ gb_internal void lb_build_static_variables(lbProcedure *p, AstValueDecl *vd) {
 			if (e->Variable.is_rodata) {
 				cc.is_rodata = true;
 			}
-			value = lb_const_value(p->module, ast_value->tav.type, ast_value->tav.value, cc);
+			value = lb_const_value(p->module, is_type_any(e->type) ? ast_value->tav.type : e->type, ast_value->tav.value, cc);
 		}
 
 		String mangled_name = {};
@@ -2488,6 +2488,22 @@ gb_internal void lb_build_static_variables(lbProcedure *p, AstValueDecl *vd) {
 				LLVMValueRef init = llvm_const_named_struct(p->module, e->type, vals.data, vals.count);
 				LLVMSetInitializer(global, init);
 			} else {
+				LLVMTypeRef expected_type = lb_type(p->module, e->type);
+				LLVMTypeRef actual_type = LLVMTypeOf(value.value);
+				GB_ASSERT_MSG(lb_sizeof(actual_type) == lb_sizeof(expected_type),
+					"size mismatch for @(static) initializer of %.*s",
+					LIT(name));
+				if (actual_type != expected_type) {
+					LLVMDeleteGlobal(global);
+					global = LLVMAddGlobal(p->module->mod, actual_type, c_name);
+					LLVMSetAlignment(global, cast(u32)type_align_of(e->type));
+					if (e->Variable.is_rodata) {
+						LLVMSetGlobalConstant(global, true);
+					}
+					if (!lb_apply_thread_local_model(global, e->Variable.thread_local_model)) {
+						LLVMSetLinkage(global, LLVMInternalLinkage);
+					}
+				}
 				LLVMSetInitializer(global, value.value);
 			}
 		}
diff --git a/tests/internal/test_union_const_nonconstantable.odin b/tests/internal/test_union_const_nonconstantable.odin
new file mode 100644
index 000000000..c6ca58b78
--- /dev/null
+++ b/tests/internal/test_union_const_nonconstantable.odin
@@ -0,0 +1,196 @@
+package test_internal
+
+import "core:testing"
+
+// A union constant must be byte-identical to the same value built at run time,
+// whatever the variant.  These unions are not `is_type_union_constantable`, so
+// lb_const_value used to skip its union branch for them and lower the value as
+// a scalar of the union's LLVM type.
+
+V :: union { bool, f64, ^int }
+SP :: struct { p: ^int, n: int }
+VI :: union { SP, int }
+VE :: enum { A, B }
+VES :: union { VE, ^int }
+VA :: union { bool, [4]^int }
+VAOK :: struct { a: int, b: int }
+VC :: union { VAOK, int }
+
+@(private="file")
+expect_same_bytes :: proc(t: ^testing.T, constant, variable: $T, what: string) {
+	testing.expectf(t,
+		transmute([size_of(T)]u8)constant == transmute([size_of(T)]u8)variable,
+		"%s: constant %v vs variable %v", what,
+		transmute([size_of(T)]u8)constant, transmute([size_of(T)]u8)variable)
+}
+
+// typed constant in a procedure body (the report's program)
+@(test)
+union_typed_constant_local :: proc(t: ^testing.T) {
+	{
+		c: V : true
+		v: V = true
+		expect_same_bytes(t, c, v, "bool")
+	}
+	{
+		c: V : f64(1.5)
+		v: V = f64(1.5)
+		expect_same_bytes(t, c, v, "f64")
+	}
+	{
+		c: V : f64(2)
+		v: V = f64(2)
+		expect_same_bytes(t, c, v, "f64 from integer literal")
+	}
+}
+
+// file-scope typed constants and global variables with constant initializers
+@(private="file") FC_BOOL: V = true
+@(private="file") FC_F64: V = f64(2.718)
+@(private="file") FC_INT: VI = 7
+
+@(test)
+union_typed_constant_file_scope :: proc(t: ^testing.T) {
+	c0: V = true
+	c1: V = f64(2.718)
+	c2: VI = 7
+	expect_same_bytes(t, FC_BOOL, c0, "file-scope bool constant")
+	expect_same_bytes(t, FC_F64, c1, "file-scope f64 constant")
+	expect_same_bytes(t, FC_INT, c2, "file-scope int constant")
+}
+
+@(test)
+union_global_initializer :: proc(t: ^testing.T) {
+	c0: V = true
+	c1: V = f64(1.25)
+	expect_same_bytes(t, GB, c0, "global bool")
+	expect_same_bytes(t, GF, c1, "global f64")
+}
+
+@(private="file") GB: V = true
+@(private="file") GF: V = f64(1.25)
+
+// every variant kind, including the ones the constant whitelist rejects
+@(test)
+union_variant_kinds :: proc(t: ^testing.T) {
+	{
+		c: VE : .B
+		v: VE = .B
+		expect_same_bytes(t, c, v, "enum-variant union")
+	}
+	{
+		c: VI : SP{n=7}
+		v: VI = SP{n=7}
+		expect_same_bytes(t, c, v, "struct-with-pointer variant")
+	}
+	{
+		c: VI : 42
+		v: VI = 42
+		expect_same_bytes(t, c, v, "other variant of the same union")
+	}
+	{
+		c: VA : true
+		v: VA = true
+		expect_same_bytes(t, c, v, "large-payload variant")
+	}
+	{
+		c: VES : VE.A
+		v: VES = VE.A
+		expect_same_bytes(t, c, v, "enum payload with pointer variant present")
+	}
+}
+
+// a union with only constantable variants keeps working
+@(test)
+union_constantable_control :: proc(t: ^testing.T) {
+	c: VC : VAOK{1, 2}
+	v: VC = VAOK{1, 2}
+	expect_same_bytes(t, c, v, "constantable union")
+}
+
+// default parameter values are materialized through the same constant path
+union_default :: proc(x: V = true) -> V { return x }
+
+@(test)
+union_default_parameter :: proc(t: ^testing.T) {
+	v: V = true
+	expect_same_bytes(t, union_default(), v, "default parameter")
+}
+
+// @(static) / @(thread_local) / @(rodata): the initializer used to be lowered
+// with the expression's type instead of the declared type, so the global was
+// sized to the payload while every access used the union layout.
+VS :: union { int, bool }
+VSS :: union { string, int }
+
+@(test)
+union_static_and_rodata :: proc(t: ^testing.T) {
+	@(static) s_int: VS = 1
+	@(static) s_str: VSS = "xy"
+	@(static) s_bool: V = true
+	@(static) s_f64: V = f64(1.5)
+	@(thread_local) th: V = true
+	@(static) @(rodata) ro: V = true
+
+	i: VS = 1
+	s: VSS = "xy"
+	b: V = true
+	f: V = f64(1.5)
+	expect_same_bytes(t, s_int, i, "@(static) int")
+	expect_same_bytes(t, s_str, s, "@(static) string")
+	expect_same_bytes(t, s_bool, b, "@(static) bool")
+	expect_same_bytes(t, s_f64, f, "@(static) f64")
+	expect_same_bytes(t, th, b, "@(thread_local)")
+	expect_same_bytes(t, ro, b, "@(rodata) static")
+	expect_same_bytes(t, RO_GLOBAL, b, "@(rodata) global")
+
+	// the tag must be in the right place, not past the end of the global
+	if v, ok := s_int.(int); ok {
+		testing.expect_value(t, v, 1)
+	} else {
+		testing.expectf(t, false, "@(static) int variant not resolved")
+	}
+	if v, ok := s_str.(string); ok {
+		testing.expect_value(t, v, "xy")
+	} else {
+		testing.expectf(t, false, "@(static) string variant not resolved")
+	}
+	if v, ok := s_bool.(bool); ok {
+		testing.expect(t, v, "@(static) bool variant not resolved")
+	} else {
+		testing.expectf(t, false, "@(static) bool variant not resolved")
+	}
+	if v, ok := s_f64.(f64); ok {
+		testing.expect_value(t, v, 1.5)
+	} else {
+		testing.expectf(t, false, "@(static) f64 variant not resolved")
+	}
+	if v, ok := th.(bool); ok {
+		testing.expect(t, v, "@(thread_local) bool variant not resolved")
+	} else {
+		testing.expectf(t, false, "@(thread_local) bool variant not resolved")
+	}
+	if v, ok := ro.(bool); ok {
+		testing.expect(t, v, "@(rodata) bool variant not resolved")
+	} else {
+		testing.expectf(t, false, "@(rodata) bool variant not resolved")
+	}
+}
+
+@(rodata)
+RO_GLOBAL: V = true
+
+// statics of non-union types must be unaffected
+@(test)
+static_non_union_unaffected :: proc(t: ^testing.T) {
+	@(static) i: int = 42
+	@(static) f: f64 = 2.5
+	@(static) s: string = "hey"
+	@(static) a: [3]int = {1, 2, 3}
+	@(static) e: VE = .B
+	testing.expect_value(t, i, 42)
+	testing.expect_value(t, f, 2.5)
+	testing.expect_value(t, s, "hey")
+	testing.expect_value(t, a, [3]int{1, 2, 3})
+	testing.expect_value(t, e, VE.B)
+}
\ No newline at end of file

From a931018a2464b2857db7f7f1f9322c2042e4b6e0 Mon Sep 17 00:00:00 2001
From: corley <28909106+corleypc@users.noreply.github.com>
Date: Tue, 29 Sep 2026 01:57:49 +0300
Subject: [PATCH 032/215] fixes #must_tail on wasm targets

---
 src/check_expr.cpp        |  3 +++
 src/llvm_abi.cpp          | 17 ++++++++++-------
 src/llvm_backend.hpp      |  2 ++
 src/llvm_backend_proc.cpp | 14 ++------------
 4 files changed, 17 insertions(+), 19 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index a159df6a6..1c9a3f412 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -9161,6 +9161,9 @@ gb_internal ExprKind check_call_expr(CheckerContext *c, Operand *operand, Ast *c
 			gb_string_free(b);
 			gb_string_free(a);
 		}
+		if (is_arch_wasm() && !check_target_feature_is_enabled(str_lit("tail-call"), nullptr)) {
+			error(call, "'#must_tail' on a WebAssembly target requires the 'tail-call' target feature, e.g. '-target-features:tail-call'");
+		}
 		break;
 	}
 
diff --git a/src/llvm_abi.cpp b/src/llvm_abi.cpp
index 4af0fed0f..02da1c835 100644
--- a/src/llvm_abi.cpp
+++ b/src/llvm_abi.cpp
@@ -150,6 +150,15 @@ gb_internal LLVMTypeRef lb_function_type_to_llvm_raw(lbFunctionType *ft, bool is
 // 	return LLVMPointerType(func_type, 0);
 // }
 
+gb_internal lbCallingConventionKind lb_calling_convention_kind(ProcCallingConvention cc) {
+	if (selected_subtarget == Subtarget_Playdate) {
+		return lbCallingConvention_ARM_AAPCS_VFP;
+	}
+	if (is_arch_wasm()) {
+		return lbCallingConvention_C;
+	}
+	return lb_calling_convention_map[cc];
+}
 
 gb_internal void lb_add_function_type_attributes(LLVMValueRef fn, lbFunctionType *ft, ProcCallingConvention calling_convention) {
 	if (ft == nullptr) {
@@ -204,13 +213,7 @@ gb_internal void lb_add_function_type_attributes(LLVMValueRef fn, lbFunctionType
 		LLVMAddAttributeAtIndex(fn, offset, noalias_attr);
 	}
 
-	lbCallingConventionKind cc_kind = lbCallingConvention_C;
-	// TODO(bill): Clean up this logic
-	if (selected_subtarget == Subtarget_Playdate) {
-		cc_kind = lbCallingConvention_ARM_AAPCS_VFP;
-	} else if (!is_arch_wasm()) {
-		cc_kind = lb_calling_convention_map[calling_convention];
-	}
+	lbCallingConventionKind cc_kind = lb_calling_convention_kind(calling_convention);
 	// if (build_context.metrics.arch == TargetArch_amd64) {
 	// 	if (build_context.metrics.os == TargetOs_windows) {
 	// 		if (cc_kind == lbCallingConvention_C) {
diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index 6e933d152..828566c38 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -718,6 +718,8 @@ lbCallingConventionKind const lb_calling_convention_map[ProcCC_MAX] = {
 
 };
 
+gb_internal lbCallingConventionKind lb_calling_convention_kind(ProcCallingConvention cc);
+
 enum : LLVMDWARFTypeEncoding {
 	LLVMDWARFTypeEncoding_Address = 1,
 	LLVMDWARFTypeEncoding_Boolean = 2,
diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp
index 5b55bbf14..d5c066eb2 100644
--- a/src/llvm_backend_proc.cpp
+++ b/src/llvm_backend_proc.cpp
@@ -471,13 +471,7 @@ gb_internal lbProcedure *lb_create_dummy_procedure(lbModule *m, String link_name
 	p->value = LLVMAddFunction(m->mod, c_link_name, func_type);
 
 	Type *pt = p->type;
-	lbCallingConventionKind cc_kind = lbCallingConvention_C;
-	if (selected_subtarget == Subtarget_Playdate) {
-		cc_kind = lbCallingConvention_ARM_AAPCS_VFP;
-	} else if (!is_arch_wasm()) {
-		cc_kind = lb_calling_convention_map[pt->Proc.calling_convention];
-	}
-	LLVMSetFunctionCallConv(p->value, cc_kind);
+	LLVMSetFunctionCallConv(p->value, lb_calling_convention_kind(pt->Proc.calling_convention));
 	lbValue proc_value = {p->value, p->type};
 	lb_add_member(m, p->name, proc_value);
 	lb_add_procedure_value(m, p);
@@ -1074,11 +1068,7 @@ gb_internal lbValue lb_emit_call_internal(lbProcedure *p, lbValue value, lbValue
 
 		LLVMValueRef ret = LLVMBuildCall2(p->builder, fnp, fn, args, arg_count, "");
 
-		auto llvm_cc = lb_calling_convention_map[proc_type->Proc.calling_convention];
-		if (selected_subtarget == Subtarget_Playdate) {
-			llvm_cc = lbCallingConvention_ARM_AAPCS_VFP;
-		}
-		LLVMSetInstructionCallConv(ret, llvm_cc);
+		LLVMSetInstructionCallConv(ret, lb_calling_convention_kind(proc_type->Proc.calling_convention));
 
 		LLVMAttributeIndex param_offset = LLVMAttributeIndex_FirstArgIndex;
 		if (return_ptr.value != nullptr) {

From 2109ba8fbdfb7393029bbd0b0190910d58f05914 Mon Sep 17 00:00:00 2001
From: Ihor Antonov <ngor@hugpoint.tech>
Date: Mon, 28 Sep 2026 19:58:17 -0700
Subject: [PATCH 033/215] core: add strict base64 decoding

core:encoding/base64 currently decodes leniently: it infers padding from the
last one or two bytes, accepts missing/extra/interior padding, and does not
check the trailing padding bits required by RFC 4648 Section 3.5.
Go exposes canonical decoding as `Encoding.Strict()`; Odin has no equivalent,
so downstream ports (e.g. age) have to reimplement base64 from scratch.

This adds opt-in strict decoding through a `Decode_Options` bit set.
Existing calls and behavior are unchanged.
---
 core/encoding/base64/base64.odin       | 125 ++++++++++++++++++-
 tests/core/encoding/base64/base64.odin | 161 +++++++++++++++++++++++++
 2 files changed, 283 insertions(+), 3 deletions(-)

diff --git a/core/encoding/base64/base64.odin b/core/encoding/base64/base64.odin
index e97652cd4..ecfe1adba 100644
--- a/core/encoding/base64/base64.odin
+++ b/core/encoding/base64/base64.odin
@@ -6,6 +6,12 @@ A secondary param can be used to supply a custom alphabet to `encode` and a matc
 If none is supplied it just uses the standard Base64 alphabet.
 In case your specific version does not use padding, you may
 truncate it from the encoded output.
+
+By default `decode` is lenient, accepting padded and unpadded input and not
+checking the trailing padding bits. Decode options can enable strict
+(RFC 4648 section 3.5) canonical decoding: `{.Strict}` requires correct
+padding and zero trailing bits, while `{.Strict, .No_Padding}` accepts only
+canonical unpadded input.
 */
 package encoding_base64
 
@@ -122,8 +128,23 @@ Error :: union #shared_nil {
 Decode_Error :: enum {
 	None,
 	Invalid_Character,
+	Invalid_Padding,
+	Non_Canonical,
 }
 
+// Decode_Option selects optional validation performed by the decode routines.
+Decode_Option :: enum {
+	// Strict requires canonical input as described in RFC 4648 section 3.5:
+	// trailing padding bits must be zero, padding must be exact, and padding
+	// characters may only appear at the end.
+	Strict,
+	// No_Padding rejects the padding character, requiring unpadded input.
+	No_Padding,
+}
+
+// Decode_Options is a set of Decode_Option values.
+Decode_Options :: bit_set[Decode_Option; u8]
+
 encode :: proc(data: []byte, ENC_TBL := ENC_TABLE, allocator := context.allocator) -> (encoded: string, err: runtime.Allocator_Error) #optional_allocator_error {
 	out_length := encoded_len(data)
 	if out_length == 0 {
@@ -211,7 +232,97 @@ encoded_len :: proc(data: []byte) -> int {
 	return ((4 * length / 3) + 3) &~ 3
 }
 
-decode :: proc(data: string, DEC_TBL := DEC_TABLE, dst: []byte = nil, allocator := context.allocator) -> (decoded: []byte, err: Error) {
+@(private)
+validate_strict_decode :: proc(data: string, dec_tbl: [256]i8, options: Decode_Options) -> Decode_Error {
+	if options == {} {
+		return .None
+	}
+
+	n := len(data)
+	if n == 0 {
+		return .None
+	}
+
+	si := n
+	pad: int
+	if .No_Padding in options {
+		for i in 0 ..< n {
+			if data[i] == PADDING {
+				return .Invalid_Padding
+			}
+		}
+	} else {
+		for si > 0 && data[si - 1] == PADDING {
+			si -= 1
+			pad += 1
+		}
+		if pad > 2 {
+			return .Invalid_Padding
+		}
+		for j in 0 ..< si {
+			if data[j] == PADDING {
+				return .Invalid_Padding
+			}
+		}
+	}
+
+	rem := si % 4
+	if .No_Padding in options && rem == 1 {
+		return .Invalid_Padding
+	}
+
+	if .Strict in options {
+		if .No_Padding not_in options {
+			if n % 4 != 0 {
+				return .Invalid_Padding
+			}
+
+			switch rem {
+			case 0:
+				if pad != 0 {
+					return .Invalid_Padding
+				}
+			case 2:
+				if pad != 2 {
+					return .Invalid_Padding
+				}
+			case 3:
+				if pad != 1 {
+					return .Invalid_Padding
+				}
+			case:
+				return .Invalid_Padding
+			}
+		}
+
+		switch rem {
+		case 2:
+			c := dec_tbl[data[si - 1]]
+			if c < 0 {
+				return .Invalid_Character
+			}
+			if (c & 0x0f) != 0 {
+				return .Non_Canonical
+			}
+		case 3:
+			c := dec_tbl[data[si - 1]]
+			if c < 0 {
+				return .Invalid_Character
+			}
+			if (c & 0x03) != 0 {
+				return .Non_Canonical
+			}
+		}
+	}
+
+	return .None
+}
+
+decode :: proc(data: string, DEC_TBL := DEC_TABLE, dst: []byte = nil, allocator := context.allocator, options := Decode_Options{}) -> (decoded: []byte, err: Error) {
+	if derr := validate_strict_decode(data, DEC_TBL, options); derr != .None {
+		return nil, derr
+	}
+
 	out_length := decoded_len(data)
 	if out_length == 0 {
 		return nil, nil
@@ -231,7 +342,11 @@ decode :: proc(data: string, DEC_TBL := DEC_TABLE, dst: []byte = nil, allocator
 	return
 }
 
-decode_into_buf :: proc(dst: []byte, data: string, DEC_TBL := DEC_TABLE) -> (decoded: []byte, err: Error) {
+decode_into_buf :: proc(dst: []byte, data: string, DEC_TBL := DEC_TABLE, options := Decode_Options{}) -> (decoded: []byte, err: Error) {
+	if derr := validate_strict_decode(data, DEC_TBL, options); derr != .None {
+		return nil, derr
+	}
+
 	out_length := decoded_len(data)
 	if out_length == 0 {
 		return
@@ -240,7 +355,11 @@ decode_into_buf :: proc(dst: []byte, data: string, DEC_TBL := DEC_TABLE) -> (dec
 	return decode_impl(dst, data, DEC_TBL)
 }
 
-decode_into :: proc(w: io.Writer, data: string, DEC_TBL := DEC_TABLE) -> Error {
+decode_into :: proc(w: io.Writer, data: string, DEC_TBL := DEC_TABLE, options := Decode_Options{}) -> Error {
+	if derr := validate_strict_decode(data, DEC_TBL, options); derr != .None {
+		return derr
+	}
+
 	_, err := decode_impl(w, data, DEC_TBL)
 	return err
 }
diff --git a/tests/core/encoding/base64/base64.odin b/tests/core/encoding/base64/base64.odin
index ba7572139..0ef1e61cc 100644
--- a/tests/core/encoding/base64/base64.odin
+++ b/tests/core/encoding/base64/base64.odin
@@ -2,6 +2,7 @@ package test_encoding_base64
 
 import "base:intrinsics"
 import "core:encoding/base64"
+import "core:strings"
 import "core:testing"
 
 Test :: struct {
@@ -84,3 +85,163 @@ test_base64url :: proc(t: ^testing.T) {
 	defer delete(decoded)
 	testing.expect_value(t, string(decoded), plain)
 }
+
+@(test)
+test_strict_known :: proc(t: ^testing.T) {
+	cases := []struct {
+		src:     string,
+		options: base64.Decode_Options,
+		exp:     string,
+	} {
+		{"", {.Strict}, ""},
+		{"", {.Strict, .No_Padding}, ""},
+		{"Zg==", {.Strict}, "f"},
+		{"Zm8=", {.Strict}, "fo"},
+		{"Zm9v", {.Strict}, "foo"},
+		{"Zm9vYg==", {.Strict}, "foob"},
+		{"Zm9vYmE=", {.Strict}, "fooba"},
+		{"Zm9vYmFy", {.Strict}, "foobar"},
+		{"Zg", {.Strict, .No_Padding}, "f"},
+		{"Zm8", {.Strict, .No_Padding}, "fo"},
+		{"Zm9v", {.Strict, .No_Padding}, "foo"},
+		{"Zm9vYg", {.Strict, .No_Padding}, "foob"},
+		{"Zm9vYmE", {.Strict, .No_Padding}, "fooba"},
+		{"Zm9vYmFy", {.Strict, .No_Padding}, "foobar"},
+	}
+	for c in cases {
+		decoded, err := base64.decode(c.src, options = c.options)
+		if !testing.expectf(t, err == nil, "decode(%q, %v): %v", c.src, c.options, err) {
+			continue
+		}
+		testing.expectf(t, string(decoded) == c.exp, "decode(%q): got %q, want %q", c.src, decoded, c.exp)
+		delete(decoded)
+	}
+}
+
+@(test)
+test_strict_reject :: proc(t: ^testing.T) {
+	cases := []struct {
+		src:     string,
+		options: base64.Decode_Options,
+		err:     base64.Decode_Error,
+	} {
+		{"A", {.Strict}, .Invalid_Padding},
+		{"AA", {.Strict}, .Invalid_Padding},
+		{"Zg", {.Strict}, .Invalid_Padding},
+		{"Zm8", {.Strict}, .Invalid_Padding},
+		{"Zg=", {.Strict}, .Invalid_Padding},
+		{"Zg===", {.Strict}, .Invalid_Padding},
+		{"=Zg=", {.Strict}, .Invalid_Padding},
+		{"Zm=8", {.Strict}, .Invalid_Padding},
+		{"AAAAAA=", {.Strict}, .Invalid_Padding},
+		{"Zh==", {.Strict}, .Non_Canonical},
+		{"QR==", {.Strict}, .Non_Canonical},
+		{"WvLTlMrX9NpYDQlEIFlnDB==", {.Strict}, .Non_Canonical},
+		{"Zg==", {.Strict, .No_Padding}, .Invalid_Padding},
+		{"Zm8=", {.Strict, .No_Padding}, .Invalid_Padding},
+		{"Z", {.Strict, .No_Padding}, .Invalid_Padding},
+		{"QR", {.Strict, .No_Padding}, .Non_Canonical},
+		{"!!!!", {.Strict}, .Invalid_Character},
+		{"Zm9!", {.Strict}, .Invalid_Character},
+	}
+	for c in cases {
+		decoded, err := base64.decode(c.src, options = c.options)
+		testing.expectf(t, err == c.err, "decode(%q, %v): got %v, want %v", c.src, c.options, err, c.err)
+		delete(decoded)
+	}
+}
+
+@(test)
+test_strict_trailing_bits :: proc(t: ^testing.T) {
+	// The pair from Go's TestDecoderIssue15656.
+	decoded, err := base64.decode("WvLTlMrX9NpYDQlEIFlnDA==", options = {.Strict})
+	if testing.expect_value(t, err, nil) {
+		delete(decoded)
+	}
+
+	decoded, err = base64.decode("WvLTlMrX9NpYDQlEIFlnDB==", options = {.Strict})
+	testing.expect(t, err == base64.Decode_Error.Non_Canonical)
+	testing.expect(t, decoded == nil)
+}
+
+@(test)
+test_strict_base64url :: proc(t: ^testing.T) {
+	// '>>>' encodes to 'Pj4-' (raw) in the URL alphabet.
+	decoded, err := base64.decode("Pj4-", base64.DEC_URL_TABLE, options = {.Strict, .No_Padding})
+	if testing.expect_value(t, err, nil) {
+		testing.expect_value(t, string(decoded), ">>>")
+		delete(decoded)
+	}
+
+	// URL alphabet characters are invalid in the standard alphabet.
+	_, err = base64.decode("Pj4-", options = {.Strict, .No_Padding})
+	testing.expect(t, err == base64.Decode_Error.Invalid_Character)
+
+	// Padded URL alphabet: {0xFB, 0xEF} encodes to '--8='.
+	decoded, err = base64.decode("--8=", base64.DEC_URL_TABLE, options = {.Strict})
+	if testing.expect_value(t, err, nil) {
+		testing.expect_value(t, string(decoded), "\xFB\xEF")
+		delete(decoded)
+	}
+}
+
+@(test)
+test_strict_roundtrip :: proc(t: ^testing.T) {
+	values: [1024]u8
+	for &v, i in values[:] {
+		v = u8(i)
+	}
+
+	for n in 0 ..= len(values) {
+		data := values[:n]
+
+		padded := base64.encode(data)
+		defer delete(padded)
+
+		decoded, err := base64.decode(padded, options = {.Strict})
+		if testing.expectf(t, err == nil, "strict padded decode n=%d: %v", n, err) {
+			testing.expectf(t, string(decoded) == string(data), "strict padded roundtrip mismatch n=%d", n)
+			delete(decoded)
+		}
+
+		raw := strings.trim_right(padded, "=")
+		decoded, err = base64.decode(raw, options = {.Strict, .No_Padding})
+		if testing.expectf(t, err == nil, "strict raw decode n=%d: %v", n, err) {
+			testing.expectf(t, string(decoded) == string(data), "strict raw roundtrip mismatch n=%d", n)
+			delete(decoded)
+		}
+	}
+}
+
+@(test)
+test_strict_decode_into :: proc(t: ^testing.T) {
+	builder: strings.Builder
+	strings.builder_init(&builder)
+	defer strings.builder_destroy(&builder)
+
+	err := base64.decode_into(strings.to_writer(&builder), "Zm9v", options = {.Strict})
+	testing.expect_value(t, err, nil)
+	testing.expect_value(t, strings.to_string(builder), "foo")
+
+	err = base64.decode_into(strings.to_writer(&builder), "Zh==", options = {.Strict})
+	testing.expect(t, err == base64.Decode_Error.Non_Canonical)
+
+	buf: [8]byte
+	decoded, derr := base64.decode_into_buf(buf[:], "Zm8", options = {.Strict, .No_Padding})
+	testing.expect_value(t, derr, nil)
+	testing.expect_value(t, string(decoded), "fo")
+
+	_, derr = base64.decode_into_buf(buf[:], "Zm8=", options = {.Strict, .No_Padding})
+	testing.expect(t, derr == base64.Decode_Error.Invalid_Padding)
+}
+
+@(test)
+test_strict_is_optional :: proc(t: ^testing.T) {
+	// Without options, the historical lenient behavior is preserved.
+	lenient := []string{"Zg", "Zh=="}
+	for src in lenient {
+		decoded, err := base64.decode(src)
+		testing.expectf(t, err == nil, "lenient decode(%q): %v", src, err)
+		delete(decoded)
+	}
+}

From f3dff6da4b21a412908e7ff035d47cfed8a9d8d1 Mon Sep 17 00:00:00 2001
From: Alexander Zhura <nice.zhura@list.ru>
Date: Tue, 29 Sep 2026 13:21:03 +0300
Subject: [PATCH 034/215] Impl simd x86 avx2 avx512 shift logical

---
 core/simd/x86/avx2.odin     | 125 ++++++++++++++++++++++++++++++++++++
 core/simd/x86/avx512bw.odin |  70 ++++++++++++++++++++
 core/simd/x86/avx512f.odin  |  81 +++++++++++++++++++++++
 3 files changed, 276 insertions(+)
 create mode 100644 core/simd/x86/avx2.odin
 create mode 100644 core/simd/x86/avx512bw.odin
 create mode 100644 core/simd/x86/avx512f.odin

diff --git a/core/simd/x86/avx2.odin b/core/simd/x86/avx2.odin
new file mode 100644
index 000000000..c1afb7e50
--- /dev/null
+++ b/core/simd/x86/avx2.odin
@@ -0,0 +1,125 @@
+#+build i386, amd64
+package simd_x86
+
+import "core:simd"
+
+// Shift packed 32-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_srlv_epi32)
+@(require_results, enable_target_feature="avx2")
+_mm_srlv_epi32 :: #force_inline proc "c" (a: __m128i, count: __m128i) -> __m128i {
+	b := simd.lanes_lt(transmute(simd.u32x4)count, simd.u32x4(8 * size_of(u32)))
+	c := simd.select(b, transmute(simd.u32x4)count, simd.u32x4(0))
+	return transmute(__m128i)simd.select(b, simd.shr(transmute(simd.u32x4)a, c), simd.u32x4(0))
+}
+
+// Shift packed 64-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_srlv_epi64)
+@(require_results, enable_target_feature="avx2")
+_mm_srlv_epi64 :: #force_inline proc "c" (a: __m128i, count: __m128i) -> __m128i {
+	b := simd.lanes_lt(transmute(simd.u64x2)count, simd.u64x2(8 * size_of(u64)))
+	c := simd.select(b, transmute(simd.u64x2)count, simd.u64x2(0))
+	return transmute(__m128i)simd.select(b, simd.shr(transmute(simd.u64x2)a, c), simd.u64x2(0))
+}
+
+// Shift packed 32-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_srlv_epi32)
+@(require_results, enable_target_feature="avx2")
+_mm256_srlv_epi32 :: #force_inline proc "c" (a: __m256i, count: __m256i) -> __m256i {
+	b := simd.lanes_lt(transmute(simd.u32x8)count, simd.u32x8(8 * size_of(u32)))
+	c := simd.select(b, transmute(simd.u32x8)count, simd.u32x8(0))
+	return transmute(__m256i)simd.select(b, simd.shr(transmute(simd.u32x8)a, c), simd.u32x8(0))
+}
+
+// Shift packed 64-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_srlv_epi64)
+@(require_results, enable_target_feature="avx2")
+_mm256_srlv_epi64 :: #force_inline proc "c" (a: __m256i, count: __m256i) -> __m256i {
+	b := simd.lanes_lt(transmute(simd.u64x4)count, simd.u64x4(8 * size_of(u64)))
+	c := simd.select(b, transmute(simd.u64x4)count, simd.u64x4(0))
+	return transmute(__m256i)simd.select(b, simd.shr(transmute(simd.u64x4)a, c), simd.u64x4(0))
+}
+
+// Shift packed 32-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_sllv_epi32)
+@(require_results, enable_target_feature="avx2")
+_mm_sllv_epi32 :: #force_inline proc "c" (a: __m128i, count: __m128i) -> __m128i {
+	b := simd.lanes_lt(transmute(simd.u32x4)count, simd.u32x4(8 * size_of(u32)))
+	c := simd.select(b, transmute(simd.u32x4)count, simd.u32x4(0))
+	return transmute(__m128i)simd.select(b, simd.shl(transmute(simd.u32x4)a, c), simd.u32x4(0))
+}
+
+// Shift packed 64-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_sllv_epi64)
+@(require_results, enable_target_feature="avx2")
+_mm_sllv_epi64 :: #force_inline proc "c" (a: __m128i, count: __m128i) -> __m128i {
+	b := simd.lanes_lt(transmute(simd.u64x2)count, simd.u64x2(8 * size_of(u64)))
+	c := simd.select(b, transmute(simd.u64x2)count, simd.u64x2(0))
+	return transmute(__m128i)simd.select(b, simd.shl(transmute(simd.u64x2)a, c), simd.u64x2(0))
+}
+
+// Shift packed 32-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_sllv_epi32)
+@(require_results, enable_target_feature="avx2")
+_mm256_sllv_epi32 :: #force_inline proc "c" (a: __m256i, count: __m256i) -> __m256i {
+	b := simd.lanes_lt(transmute(simd.u32x8)count, simd.u32x8(8 * size_of(u32)))
+	c := simd.select(b, transmute(simd.u32x8)count, simd.u32x8(0))
+	return transmute(__m256i)simd.select(b, simd.shl(transmute(simd.u32x8)a, c), simd.u32x8(0))
+}
+
+// Shift packed 64-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_sllv_epi64)
+@(require_results, enable_target_feature="avx2")
+_mm256_sllv_epi64 :: #force_inline proc "c" (a: __m256i, count: __m256i) -> __m256i {
+	b := simd.lanes_lt(transmute(simd.u64x4)count, simd.u64x4(8 * size_of(u64)))
+	c := simd.select(b, transmute(simd.u64x4)count, simd.u64x4(0))
+	return transmute(__m256i)simd.select(b, simd.shl(transmute(simd.u64x4)a, c), simd.u64x4(0))
+}
+
+// Compute the bitwise AND of 256 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_and_si256)
+@(require_results, enable_target_feature="avx2")
+_mm256_and_si256 :: #force_inline proc "c" (a, b: __m256i) -> __m256i {
+	return simd.bit_and(a, b)
+}
+
+// Compute the bitwise NOT of 256 bits (representing integer data) in `a` and then AND with `b`, and store the result in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_andnot_si256)
+@(require_results, enable_target_feature="avx2")
+_mm256_andnot_si256 :: #force_inline proc "c" (a, b: __m256i) -> __m256i {
+	c := __m256i(-1)
+	return simd.bit_and(simd.bit_xor(a, c), b)
+}
+
+// Compute the bitwise OR of 256 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_or_si256)
+@(require_results, enable_target_feature="avx2")
+_mm256_or_si256 :: #force_inline proc "c" (a, b: __m256i) -> __m256i {
+	return simd.bit_or(a, b)
+}
+
+// Compute the bitwise XOR of 256 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_xor_si256)
+@(require_results, enable_target_feature="avx2")
+_mm256_xor_si256 :: #force_inline proc "c" (a, b: __m256i) -> __m256i {
+	return simd.bit_xor(a, b)
+}
diff --git a/core/simd/x86/avx512bw.odin b/core/simd/x86/avx512bw.odin
new file mode 100644
index 000000000..861b6af6e
--- /dev/null
+++ b/core/simd/x86/avx512bw.odin
@@ -0,0 +1,70 @@
+#+build i386, amd64
+package simd_x86
+
+import "core:simd"
+
+// Shift packed 16-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_srlv_epi16)
+@(require_results, enable_target_feature="avx512bw,avx512vl")
+_mm_srlv_epi16 :: #force_inline proc "c" (a: __m128i, count: __m128i) -> __m128i {
+	b := simd.lanes_lt(transmute(simd.u16x8)count, simd.u16x8(8 * size_of(u16)))
+	c := simd.select(b, transmute(simd.u16x8)count, simd.u16x8(0))
+	return transmute(__m128i)simd.select(b, simd.shr(transmute(simd.u16x8)a, c), simd.u16x8(0))
+}
+
+// Shift packed 16-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_srlv_epi16)
+@(require_results, enable_target_feature="avx512bw,avx512vl")
+_mm256_srlv_epi16 :: #force_inline proc "c" (a: __m256i, count: __m256i) -> __m256i {
+	b := simd.lanes_lt(transmute(simd.u16x16)count, simd.u16x16(8 * size_of(u16)))
+	c := simd.select(b, transmute(simd.u16x16)count, simd.u16x16(0))
+	return transmute(__m256i)simd.select(b, simd.shr(transmute(simd.u16x16)a, c), simd.u16x16(0))
+}
+
+// Shift packed 16-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_srlv_epi16)
+@(require_results, enable_target_feature="avx512bw")
+_mm512_srlv_epi16 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
+	b := simd.lanes_lt(transmute(simd.u16x32)count, simd.u16x32(8 * size_of(u16)))
+	c := simd.select(b, transmute(simd.u16x32)count, simd.u16x32(0))
+	return transmute(__m512i)simd.select(b, simd.shr(transmute(simd.u16x32)a, c), simd.u16x32(0))
+}
+
+// Shift packed 16-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_sllv_epi16)
+@(require_results, enable_target_feature="avx512bw,avx512vl")
+_mm_sllv_epi16 :: #force_inline proc "c" (a: __m128i, count: __m128i) -> __m128i {
+	b := simd.lanes_lt(transmute(simd.u16x8)count, simd.u16x8(8 * size_of(u16)))
+	c := simd.select(b, transmute(simd.u16x8)count, simd.u16x8(0))
+	return transmute(__m128i)simd.select(b, simd.shl(transmute(simd.u16x8)a, c), simd.u16x8(0))
+}
+
+// Shift packed 16-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_sllv_epi16)
+@(require_results, enable_target_feature="avx512bw,avx512vl")
+_mm256_sllv_epi16 :: #force_inline proc "c" (a: __m256i, count: __m256i) -> __m256i {
+	b := simd.lanes_lt(transmute(simd.u16x16)count, simd.u16x16(8 * size_of(u16)))
+	c := simd.select(b, transmute(simd.u16x16)count, simd.u16x16(0))
+	return transmute(__m256i)simd.select(b, simd.shl(transmute(simd.u16x16)a, c), simd.u16x16(0))
+}
+
+// Shift packed 16-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_sllv_epi16)
+@(require_results, enable_target_feature="avx512bw")
+_mm512_sllv_epi16 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
+	b := simd.lanes_lt(transmute(simd.u16x32)count, simd.u16x32(8 * size_of(u16)))
+	c := simd.select(b, transmute(simd.u16x32)count, simd.u16x32(0))
+	return transmute(__m512i)simd.select(b, simd.shl(transmute(simd.u16x32)a, c), simd.u16x32(0))
+}
diff --git a/core/simd/x86/avx512f.odin b/core/simd/x86/avx512f.odin
new file mode 100644
index 000000000..8053abe87
--- /dev/null
+++ b/core/simd/x86/avx512f.odin
@@ -0,0 +1,81 @@
+#+build i386, amd64
+package simd_x86
+
+import "core:simd"
+
+// Shift packed 32-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_srlv_epi32)
+@(require_results, enable_target_feature="avx512f")
+_mm512_srlv_epi32 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
+	b := simd.lanes_lt(transmute(simd.u32x16)count, simd.u32x16(8 * size_of(u32)))
+	c := simd.select(b, transmute(simd.u32x16)count, simd.u32x16(0))
+	return transmute(__m512i)simd.select(b, simd.shr(transmute(simd.u32x16)a, c), simd.u32x16(0))
+}
+
+// Shift packed 64-bit integers in `a` right by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_srlv_epi64)
+@(require_results, enable_target_feature="avx512f")
+_mm512_srlv_epi64 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
+	b := simd.lanes_lt(transmute(simd.u64x8)count, simd.u64x8(8 * size_of(u64)))
+	c := simd.select(b, transmute(simd.u64x8)count, simd.u64x8(0))
+	return transmute(__m512i)simd.select(b, simd.shr(transmute(simd.u64x8)a, c), simd.u64x8(0))
+}
+
+// Shift packed 32-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_sllv_epi32)
+@(require_results, enable_target_feature="avx512f")
+_mm512_sllv_epi32 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
+	b := simd.lanes_lt(transmute(simd.u32x16)count, simd.u32x16(8 * size_of(u32)))
+	c := simd.select(b, transmute(simd.u32x16)count, simd.u32x16(0))
+	return transmute(__m512i)simd.select(b, simd.shl(transmute(simd.u32x16)a, c), simd.u32x16(0))
+}
+
+// Shift packed 64-bit integers in `a` left by the amount specified by
+// the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_sllv_epi64)
+@(require_results, enable_target_feature="avx512f")
+_mm512_sllv_epi64 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
+	b := simd.lanes_lt(transmute(simd.u64x8)count, simd.u64x8(8 * size_of(u64)))
+	c := simd.select(b, transmute(simd.u64x8)count, simd.u64x8(0))
+	return transmute(__m512i)simd.select(b, simd.shl(transmute(simd.u64x8)a, c), simd.u64x8(0))
+}
+
+// Compute the bitwise AND of 512 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_and_si512)
+@(require_results, enable_target_feature="avx512f")
+_mm512_and_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
+	return simd.bit_and(a, b)
+}
+
+// Compute the bitwise NOT of 512 bits (representing integer data) in `a` and then AND with `b`, and store the result in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_andnot_si512)
+@(require_results, enable_target_feature="avx512f")
+_mm512_andnot_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
+	c := __m512i(-1)
+	return simd.bit_and(simd.bit_xor(a, c), b)
+}
+
+// Compute the bitwise OR of 512 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_or_si512)
+@(require_results, enable_target_feature="avx512f")
+_mm512_or_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
+	return simd.bit_or(a, b)
+}
+
+// Compute the bitwise XOR of 512 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_xor_si512)
+@(require_results, enable_target_feature="avx512f")
+_mm512_xor_si512 :: #force_inline proc "c" (a, b: __m256i) -> __m256i {
+	return simd.bit_xor(a, b)
+}

From ae63a4a4c603082987e9ce8e48b5e93e2896bed6 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 11:41:50 +0100
Subject: [PATCH 035/215] Fix big integer representation of large numbers such
 as `98765.0e309`

---
 src/big_int.cpp     |   7 +--
 src/check_expr.cpp  |  26 +++++++++++
 src/exact_value.cpp | 110 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 138 insertions(+), 5 deletions(-)

diff --git a/src/big_int.cpp b/src/big_int.cpp
index 0d38f0ab1..9db4a8d55 100644
--- a/src/big_int.cpp
+++ b/src/big_int.cpp
@@ -300,11 +300,8 @@ gb_internal void big_int_from_string(BigInt *dst, String const &s, bool *success
 			return;
 		}
 
-		// NOTE(Jeroen): A valid integer can never have an exponent larger than 308 (per `max(f64)`).
-		//               As an integer, not even larger than `max(u128)` which has a base 10 exponent of 38.
-		//               But we also use this path to parse float literals like those in `core:math.pow10_f64`,
-		//               so we have to stick with 1e308.
-		if (exp > 308) {
+		// NOTE(bill): Just limit the maximum exponent to bigger than the actual maximum to allow for keeping overflows
+		if (exp > 512) {
 			*success = false;
 			return;
 		}
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index a159df6a6..ec812bac1 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -2516,6 +2516,28 @@ gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue i
 			return false;
 		}
 		check_update_float_precision(&v, type);
+
+		if (in_value.kind == ExactValue_Integer) {
+			bool overflowed = isinf(v.value_float) || isnan(v.value_float);
+			if (!overflowed) {
+				switch (type->Basic.kind) {
+				case Basic_f16:
+				case Basic_f16le:
+				case Basic_f16be:
+					// `check_update_float_precision` only rounds `f16` to `f32` precision, so a value
+					// that is finite as `f32` but out of range for `f16` must be caught explicitly.
+					if (isinf(cast(f64)f16_to_f32(f32_to_f16(cast(f32)v.value_float)))) {
+						overflowed = true;
+					}
+					break;
+				}
+			}
+			if (overflowed) {
+				// Leave `out_value` unset so the diagnostic reports the exact (finite) source value.
+				return false;
+			}
+		}
+
 		if (out_value) *out_value = v;
 
 		switch (type->Basic.kind) {
@@ -12607,6 +12629,10 @@ gb_internal ExprKind check_expr_base_internal(CheckerContext *c, Operand *o, Ast
 			t = t_untyped_integer;
 			if (bl->token.kind == Token_Rune) {
 				t = t_untyped_rune;
+			} else if (string_contains_char(bl->token.string, '.')) {
+				// NOTE(bill): A floating-point literal whose value happens to be an integer (e.g. `98765.0e309`) keeps
+				// its exact value as an integer, but still defaults to untyped float because it was written in floating-point form.
+				t = t_untyped_float;
 			}
 			break;
 		default:
diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index d768525ad..6e5b84bad 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -349,6 +349,106 @@ gb_internal f64 float_from_string(String const &string, bool *success = nullptr)
 */
 }
 
+gb_internal ExactValue exact_value_integer_from_decimal_float_string(String const &string, bool *is_integral) {
+	*is_integral = false;
+
+	BigInt mantissa = {};
+	big_int_from_u64(&mantissa, 0);
+	defer (big_int_dealloc(&mantissa));
+	BigInt ten = {};
+	big_int_from_u64(&ten, 10);
+	defer (big_int_dealloc(&ten));
+	BigInt digit = {};
+	defer (big_int_dealloc(&digit));
+
+	isize i = 0;
+	i64 frac_digits = 0;
+	bool seen_dot = false;
+	for (; i < string.len; i++) {
+		u8 c = string.text[i];
+		if (c == '_') {
+			continue;
+		}
+		if (c == '.') {
+			if (seen_dot) {
+				return {ExactValue_Invalid};
+			}
+			seen_dot = true;
+			continue;
+		}
+		if (c == 'e' || c == 'E') {
+			break;
+		}
+		if (!gb_char_is_digit(cast(char)c)) {
+			// NOTE(bill): Not a plain base-10 float literal (the tokenizer should have prevented this).
+			return {ExactValue_Invalid};
+		}
+		big_int_from_u64(&digit, u64_digit_value(cast(Rune)c));
+		big_int_mul_eq(&mantissa, &ten);
+		big_int_add_eq(&mantissa, &digit);
+		if (seen_dot) {
+			frac_digits += 1;
+		}
+	}
+
+	i64 exp = 0;
+	bool exp_negative = false;
+	if (i < string.len && (string.text[i] == 'e' || string.text[i] == 'E')) {
+		i += 1;
+		if (i < string.len && (string.text[i] == '+' || string.text[i] == '-')) {
+			exp_negative = string.text[i] == '-';
+			i += 1;
+		}
+		isize exp_digits = 0;
+		for (; i < string.len; i++) {
+			u8 c = string.text[i];
+			if (c == '_') {
+				continue;
+			}
+			if (!gb_char_is_digit(cast(char)c)) {
+				return {ExactValue_Invalid};
+			}
+			if (exp <= 512) {
+				// NOTE(bill): clamp so it cannot overflow; anything past the cap is rejected below
+				exp = exp*10 + cast(i64)u64_digit_value(cast(Rune)c);
+			}
+			exp_digits += 1;
+		}
+		if (exp_digits == 0) {
+			return {ExactValue_Invalid};
+		}
+	}
+
+	i64 signed_exp = exp_negative ? -exp : exp;
+	i64 effective_exp = signed_exp - frac_digits;
+	if (effective_exp < 0) {
+		// NOTE(bill): The value has a fractional part, so it is not an integer; let the caller parse it as a float.
+		return {ExactValue_Invalid};
+	}
+
+	*is_integral = true;
+
+	// NOTE(bill): Guard against pathological allocations; kept consistent with `big_int_from_string`.
+	if (signed_exp > 512) {
+		return {ExactValue_Invalid};
+	}
+
+	bool success = true;
+	BigInt scale = {};
+	mp_init(&scale);
+	defer (big_int_dealloc(&scale));
+	big_int_exp_u64(&scale, &ten, cast(u64)effective_exp, &success);
+	if (!success) {
+		return {ExactValue_Invalid};
+	}
+
+	ExactValue result = {ExactValue_Integer};
+	result.value_integer = {0};
+	mp_init(&result.value_integer);
+	big_int_mul(&result.value_integer, &mantissa, &scale);
+	return result;
+}
+
 gb_internal ExactValue exact_value_float_from_string(String string) {
 	if (string.len > 2 && string[0] == '0' && string[1] == 'h') {
 
@@ -383,6 +483,16 @@ gb_internal ExactValue exact_value_float_from_string(String string) {
 		return exact_value_integer_from_string(string);
 	}
 
+	{
+		// NOTE(bill): A decimal literal whose value is an integer (e.g. `98765.0e309`) is kept
+		// as an exact arbitrary-precision integer so it is not silently rounded to `+Inf` by `strtod`
+		bool is_integral = false;
+		ExactValue v = exact_value_integer_from_decimal_float_string(string, &is_integral);
+		if (is_integral) {
+			return v;
+		}
+	}
+
 	bool success;
 	f64 f = float_from_string(string, &success);
 	if (!success) {

From b153d6071cfd8a881fcbe6c1c16e12f1cb4bf5e2 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 12:17:02 +0100
Subject: [PATCH 036/215] Support `bit_set[E; [4]u64]` style types

---
 base/runtime/core_builtin.odin |  13 +++-
 core/fmt/fmt.odin              |  60 ++++++++++++++++
 src/check_expr.cpp             |   4 --
 src/check_type.cpp             |  13 ++--
 src/llvm_backend_const.cpp     |  40 ++++++++++-
 src/llvm_backend_expr.cpp      | 127 +++++++++++++++++++++++++++++++--
 6 files changed, 236 insertions(+), 21 deletions(-)

diff --git a/base/runtime/core_builtin.odin b/base/runtime/core_builtin.odin
index fccc8b1df..df8a36ff6 100644
--- a/base/runtime/core_builtin.odin
+++ b/base/runtime/core_builtin.odin
@@ -1652,7 +1652,18 @@ when MAP_ENABLED {
 // `card` returns the number of bits that are set in a bit_set—its cardinality
 @builtin
 card :: proc "contextless" (s: $S/bit_set[$E; $U]) -> int {
-	return int(intrinsics.count_ones(transmute(intrinsics.type_bit_set_underlying_type(S))s))
+	Backing :: intrinsics.type_bit_set_underlying_type(S)
+	when intrinsics.type_is_array(Backing) {
+		// bit_set backed by an array of integers: sum the population count of each element
+		backing := transmute(Backing)s
+		count := 0
+		for elem in backing {
+			count += int(intrinsics.count_ones(elem))
+		}
+		return count
+	} else {
+		return int(intrinsics.count_ones(transmute(Backing)s))
+	}
 }
 
 
diff --git a/core/fmt/fmt.odin b/core/fmt/fmt.odin
index 53cda51f4..a2e6d2247 100644
--- a/core/fmt/fmt.odin
+++ b/core/fmt/fmt.odin
@@ -1815,6 +1815,14 @@ fmt_bit_set :: proc(fi: ^Info, v: any, name: string = "", verb: rune = 'v') {
 		fmt_bit_set(fi, val, info.name, verb)
 
 	case runtime.Type_Info_Bit_Set:
+		if info.underlying != nil {
+			#partial switch _ in runtime.type_info_base(info.underlying).variant {
+			case runtime.Type_Info_Array:
+				fmt_bit_set_array(fi, v, type_info, name, verb)
+				return
+			}
+		}
+
 		bits: u128
 		bit_size := u128(8*type_info.size)
 
@@ -1914,6 +1922,58 @@ fmt_bit_set :: proc(fi: ^Info, v: any, name: string = "", verb: rune = 'v') {
 	}
 }
 
+// Formats an array-of-integers backed bit_set (e.g. `bit_set[E; [4]u64]`).
+// The bits are stored as a little-endian sequence in memory (bit `b` is bit `b%8` of byte `b/8`),
+// so they can be scanned directly regardless of how many array elements back the set.
+fmt_bit_set_array :: proc(fi: ^Info, v: any, type_info: ^runtime.Type_Info, name: string, verb: rune) {
+	info := type_info.variant.(runtime.Type_Info_Bit_Set)
+	bit_size := int(8*type_info.size)
+
+	et := runtime.type_info_base(info.elem)
+	e, is_enum := et.variant.(runtime.Type_Info_Enum)
+
+	if verb != 'w' {
+		if name != "" {
+			io.write_string(fi.writer, name, &fi.n)
+		} else {
+			reflect.write_type(fi.writer, type_info, &fi.n)
+		}
+	}
+	io.write_byte(fi.writer, '{', &fi.n)
+	defer io.write_byte(fi.writer, '}', &fi.n)
+
+	bytes := ([^]u8)(v.data)
+	commas := 0
+	loop: for bit_index in 0..<bit_size {
+		if (bytes[bit_index/8] >> uint(bit_index & 7)) & 1 == 0 {
+			continue
+		}
+		i := i64(bit_index) + info.lower
+		if commas > 0 {
+			io.write_string(fi.writer, ", ", &fi.n)
+		}
+		if is_enum {
+			enum_name: string
+			if ti_named, is_named := info.elem.variant.(runtime.Type_Info_Named); is_named {
+				enum_name = ti_named.name
+			}
+			for ev, evi in e.values {
+				if u64(ev) == u64(i) {
+					if verb == 'w' {
+						io.write_string(fi.writer, enum_name, &fi.n)
+						io.write_byte(fi.writer, '.', &fi.n)
+					}
+					io.write_string(fi.writer, e.names[evi], &fi.n)
+					commas += 1
+					continue loop
+				}
+			}
+		}
+		io.write_i64(fi.writer, i, 10, &fi.n)
+		commas += 1
+	}
+}
+
 // Writes the specified number of indents to the provided Info structure
 //
 // Inputs:
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index ec812bac1..5d0c3df13 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -11707,10 +11707,6 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 			field_count = et->Enum.fields.count;
 		}
 
-		if (is_type_array(bit_set_to_int(t))) {
-			is_constant = false;
-		}
-
 		for (Ast *elem : cl->elems) {
 			if (elem->kind == Ast_FieldValue) {
 				error(elem, "'field = value' in a bit_set literal is not allowed");
diff --git a/src/check_type.cpp b/src/check_type.cpp
index cb99bb4d9..696ae21ab 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1384,14 +1384,11 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 		Type *t = default_type(lhs.type);
 		if (bs->underlying != nullptr) {
 			Type *u = check_type(c, bs->underlying);
-			// if (!is_valid_bit_field_backing_type(u)) {
-			if (!is_type_integer(u)) {
+			if (!is_valid_bit_field_backing_type(u)) {
 				gbString ts = type_to_string(u);
-				error(bs->underlying, "Expected an underlying integer for the bit set, got %s", ts);
+				error(bs->underlying, "Expected an underlying integer or array of integers for the bit set, got %s", ts);
 				gb_string_free(ts);
-				if (!is_valid_bit_field_backing_type(u)) {
-					return;
-				}
+				return;
 			}
 			type->BitSet.underlying = u;
 		}
@@ -1502,9 +1499,9 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 				i64 bits = MAX_BITS
 ;				if (bs->underlying != nullptr) {
 					Type *u = check_type(c, bs->underlying);
-					if (!is_type_integer(u)) {
+					if (!is_valid_bit_field_backing_type(u)) {
 						gbString ts = type_to_string(u);
-						error(bs->underlying, "Expected an underlying integer for the bit set, got %s", ts);
+						error(bs->underlying, "Expected an underlying integer or array of integers for the bit set, got %s", ts);
 						gb_string_free(ts);
 						return;
 					}
diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index 31d1e16fb..d9f7d51be 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -500,7 +500,45 @@ gb_internal LLVMValueRef lb_big_int_to_llvm(lbModule *m, Type *original_type, Bi
 	if (big_int_is_zero(a)) {
 		return LLVMConstNull(lb_type(m, original_type));
 	}
-	
+
+	// NOTE(bill): a bit_set backed by an array of integers (e.g. `bit_set[E; [4]u64]`) is represented as an LLVM array.
+	// There for its constant value is the same bit mask as an integer-backed bit_set, split into element-sized
+	// little-endian chunks (element `i` holds bits `[i*elem_bits, (i+1)*elem_bits)`), which matches how membership
+	// and literals index into the array.
+	if (is_type_bit_set(original_type)) {
+		Type *backing = bit_set_to_int(original_type);
+		if (is_type_array(backing)) {
+			Type *elem = backing->Array.elem;
+			i64 n = backing->Array.count;
+			i64 elem_bits = 8*type_size_of(elem);
+
+			BigInt v = {};
+			big_int_init(&v, a);
+			defer (big_int_dealloc(&v));
+
+			BigInt shift = {};
+			big_int_from_u64(&shift, cast(u64)elem_bits);
+			defer (big_int_dealloc(&shift));
+
+			BigInt mask = {}; // (1 << elem_bits) - 1
+			big_int_from_u64(&mask, 1);
+			big_int_shl(&mask, &mask, &shift);
+			mp_decr(&mask);
+			defer (big_int_dealloc(&mask));
+
+			LLVMTypeRef elem_llvm = lb_type(m, elem);
+			LLVMValueRef *elems = gb_alloc_array(temporary_allocator(), LLVMValueRef, cast(isize)n);
+			for (i64 i = 0; i < n; i++) {
+				BigInt chunk = {};
+				big_int_and(&chunk, &v, &mask);
+				elems[i] = lb_big_int_to_llvm(m, elem, &chunk);
+				big_int_dealloc(&chunk);
+				big_int_shr_eq(&v, &shift);
+			}
+			return LLVMConstArray(elem_llvm, elems, cast(unsigned)n);
+		}
+	}
+
 	BigInt val = {};
 	big_int_init(&val, a);
 
diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index 8348041b4..19bcefc5e 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -187,6 +187,10 @@ gb_internal lbValue lb_emit_unary_arith(lbProcedure *p, TokenKind op, lbValue x,
 		if (is_type_bit_set(x.type)) {
 			ExactValue ev_mask = exact_bit_set_all_set_mask(x.type);
 			lbValue mask = lb_const_value(p->module, x.type, ev_mask);
+			if (is_type_array(bit_set_to_int(x.type))) {
+				lbValue res = lb_emit_arith(p, Token_Xor, x, mask, x.type);
+				return lb_emit_conv(p, res, type);
+			}
 			cmp.value = LLVMBuildXor(p->builder, x.value, mask.value, "");
 		} else {
 			cmp.value = LLVMBuildNot(p->builder, x.value, "");
@@ -2116,6 +2120,36 @@ gb_internal lbValue lb_build_binary_in(lbProcedure *p, lbValue left, lbValue rig
 
 			Type *it = bit_set_to_int(rt);
 
+			if (is_type_array(it)) {
+				Type *elem    = base_array_type(it);
+				i64 elem_bits = 8*type_size_of(elem);
+
+				lbValue key     = lb_emit_conv(p, left, t_int);
+				lbValue lower_v = lb_const_int(p->module, t_int, rt->BitSet.lower);
+				key = lb_emit_arith(p, Token_Sub, key, lower_v, t_int);
+
+				lbValue ebits    = lb_const_int(p->module, t_int, elem_bits);
+				lbValue elem_idx = lb_emit_arith(p, Token_Quo, key, ebits, t_int);
+				lbValue bit_idx  = lb_emit_arith(p, Token_Mod, key, ebits, t_int);
+
+				lbValue arr     = lb_emit_transmute(p, right, it);
+				lbValue arr_ptr = lb_address_from_load_or_generate_local(p, arr);
+				arr_ptr.type    = alloc_type_pointer(it);
+
+				lbValue e_ptr   = lb_emit_array_ep(p, arr_ptr, elem_idx);
+				lbValue e_val   = lb_emit_load(p, e_ptr);
+
+				lbValue shifted = lb_emit_arith(p, Token_Shr, e_val, lb_emit_conv(p, bit_idx, elem), elem);
+				lbValue masked  = lb_emit_arith(p, Token_And, shifted, lb_const_int(p->module, elem, 1), elem);
+				lbValue zero    = lb_const_int(p->module, elem, 0);
+
+				if (op == Token_in) {
+					return lb_emit_conv(p, lb_emit_comp(p, Token_NotEq, masked, zero), t_bool);
+				} else {
+					return lb_emit_conv(p, lb_emit_comp(p, Token_CmpEq, masked, zero), t_bool);
+				}
+			}
+
 			left = lb_emit_conv(p, left, it);
 			if (is_type_different_to_arch_endianness(it)) {
 				left = lb_emit_byte_swap(p, left, integer_endian_type_to_platform_type(it));
@@ -3429,6 +3463,29 @@ gb_internal lbValue lb_compare_records(lbProcedure *p, TokenKind op_kind, lbValu
 
 
 
+gb_internal lbValue lb_bit_set_array_is_zero(lbProcedure *p, lbValue arr) {
+	Type *at = base_type(arr.type);
+	GB_ASSERT(at->kind == Type_Array);
+	Type *elem = at->Array.elem;
+	i64 n = at->Array.count;
+
+	lbValue acc = {};
+	acc.type = elem;
+	acc.value = LLVMBuildExtractValue(p->builder, arr.value, 0, "");
+	for (i64 i = 1; i < n; i++) {
+		lbValue e = {};
+		e.type  = elem;
+		e.value = LLVMBuildExtractValue(p->builder, arr.value, cast(unsigned)i, "");
+
+		acc = lb_emit_arith(p, Token_Or, acc, e, elem);
+	}
+
+	lbValue res = {};
+	res.type  = t_llvm_bool;
+	res.value = LLVMBuildICmp(p->builder, LLVMIntEQ, acc.value, lb_const_int(p->module, elem, 0).value, "");
+	return res;
+}
+
 gb_internal lbValue lb_emit_comp(lbProcedure *p, TokenKind op_kind, lbValue left, lbValue right) {
 	Type *a = core_type(left.type);
 	Type *b = core_type(right.type);
@@ -3753,6 +3810,52 @@ gb_internal lbValue lb_emit_comp(lbProcedure *p, TokenKind op_kind, lbValue left
 	}
 
 	if (is_type_bit_set(a)) {
+		Type *it_backing = bit_set_to_int(a);
+		if (is_type_array(it_backing)) {
+			lbValue lhs = lb_emit_transmute(p, left, it_backing);
+			lbValue rhs = lb_emit_transmute(p, right, it_backing);
+			switch (op_kind) {
+			case Token_CmpEq:
+			case Token_NotEq:
+				{
+					lbValue diff = lb_emit_arith(p, Token_Xor, lhs, rhs, it_backing);
+					lbValue equal = lb_bit_set_array_is_zero(p, diff);
+					if (op_kind == Token_NotEq) {
+						lbValue res = {};
+						res.type = t_llvm_bool;
+						res.value = LLVMBuildNot(p->builder, equal.value, "");
+						return res;
+					}
+					return equal;
+				}
+			case Token_Lt:
+			case Token_LtEq:
+				{
+					// subset: (lhs &~ rhs) == {}; strict also requires lhs != rhs
+					lbValue d = lb_emit_arith(p, Token_AndNot, lhs, rhs, it_backing);
+					lbValue res = lb_bit_set_array_is_zero(p, d);
+					if (op_kind == Token_Lt) {
+						lbValue diff = lb_emit_arith(p, Token_Xor, lhs, rhs, it_backing);
+						lbValue equal = lb_bit_set_array_is_zero(p, diff);
+						res = lb_emit_arith(p, Token_AndNot, res, equal, t_llvm_bool);
+					}
+					return res;
+				}
+			case Token_Gt:
+			case Token_GtEq:
+				{
+					// superset: (rhs &~ lhs) == {}; strict also requires lhs != rhs
+					lbValue d = lb_emit_arith(p, Token_AndNot, rhs, lhs, it_backing);
+					lbValue res = lb_bit_set_array_is_zero(p, d);
+					if (op_kind == Token_Gt) {
+						lbValue diff = lb_emit_arith(p, Token_Xor, lhs, rhs, it_backing);
+						lbValue equal = lb_bit_set_array_is_zero(p, diff);
+						res = lb_emit_arith(p, Token_AndNot, res, equal, t_llvm_bool);
+					}
+					return res;
+				}
+			}
+		}
 		switch (op_kind) {
 		case Token_Lt:
 		case Token_LtEq:
@@ -6461,20 +6564,30 @@ gb_internal lbAddr lb_build_addr_compound_lit(lbProcedure *p, Ast *expr) {
 
 			Type *backing = bit_set_to_int(type);
 			if (is_type_array(backing)) {
-				GB_PANIC("TODO: bit_set [N]T");
 				Type *base_it = core_array_type(backing);
 				i64 bits_per_elem = 8*type_size_of(base_it);
-				gb_unused(bits_per_elem);
-				lbValue one = lb_const_value(p->module, t_i64, exact_value_i64(1));
+				lbValue ebits = lb_const_value(p->module, t_int, exact_value_i64(bits_per_elem));
+				lbValue one = lb_const_value(p->module, base_it, exact_value_i64(1));
+
+				lbValue arr_ptr = lb_addr_get_ptr(p, v);
+				arr_ptr.type = alloc_type_pointer(backing);
+
 				for (Ast *elem : cl->elems) {
 					GB_ASSERT(elem->kind != Ast_FieldValue);
 					lbValue expr = lb_build_expr(p, elem);
 					GB_ASSERT(expr.type->kind != Type_Tuple);
 
-					lbValue e = lb_emit_conv(p, expr, t_i64);
-					e = lb_emit_arith(p, Token_Sub, e, lower, t_i64);
-					// lbValue idx = lb_emit_arith(p, Token_Div, e, bits_per_elem, t_i64);
-					// lbValue val = lb_emit_arith(p, Token_Div, e, bits_per_elem, t_i64);
+					lbValue e = lb_emit_conv(p, expr, t_int);
+					e = lb_emit_arith(p, Token_Sub, e, lower, t_int);
+
+					lbValue elem_idx = lb_emit_arith(p, Token_Quo, e, ebits, t_int);
+					lbValue bit_idx  = lb_emit_arith(p, Token_Mod, e, ebits, t_int);
+
+					lbValue e_ptr     = lb_emit_array_ep(p, arr_ptr, elem_idx);
+					lbValue bit       = lb_emit_arith(p, Token_Shl, one, lb_emit_conv(p, bit_idx, base_it), base_it);
+					lbValue old_value = lb_emit_load(p, e_ptr);
+					lbValue new_value = lb_emit_arith(p, Token_Or, old_value, bit, base_it);
+					lb_emit_store(p, e_ptr, new_value);
 				}
 			} else {
 				Type *it = bit_set_to_int(bt);

From bd87143db78b485b6831f47cf21d278b3ffae7a0 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 12:20:52 +0100
Subject: [PATCH 037/215] Add some regression tests for `bit_set` backed by
 arrays

---
 tests/internal/test_bit_set_array.odin | 189 +++++++++++++++++++++++++
 1 file changed, 189 insertions(+)
 create mode 100644 tests/internal/test_bit_set_array.odin

diff --git a/tests/internal/test_bit_set_array.odin b/tests/internal/test_bit_set_array.odin
new file mode 100644
index 000000000..465095bd8
--- /dev/null
+++ b/tests/internal/test_bit_set_array.odin
@@ -0,0 +1,189 @@
+package test_internal
+
+import "core:fmt"
+import "core:testing"
+
+// Regression tests for `bit_set` types backed by an array of integers, e.g. `bit_set[E; [4]u64]`.
+// The interesting cases are the set relations (`<`, `<=`, `>`, `>=`) with their subset/superset
+// semantics, which must agree between the compile-time constant folding and the generated code, and
+// must match an ordinary integer-backed bit_set. An array backing also lets a bit_set exceed the
+// 128-bit limit of the integer backings.
+
+@(private="file")
+Bsa_E :: enum u8 { A, B, C, D, E, F, G, H }
+
+@(private="file")
+Bsa_Arr :: bit_set[Bsa_E; [4]u64] // array backed (256 bits)
+
+@(private="file")
+Bsa_Int :: bit_set[Bsa_E; u16]    // integer backed, for cross-checking
+
+@(private="file")
+bsa_arr_from :: proc(m: u8) -> (s: Bsa_Arr) {
+	for i in 0..<8 {
+		if (m >> uint(i)) & 1 == 1 {
+			s += {Bsa_E(i)}
+		}
+	}
+	return
+}
+
+@(private="file")
+bsa_int_from :: proc(m: u8) -> (s: Bsa_Int) {
+	for i in 0..<8 {
+		if (m >> uint(i)) & 1 == 1 {
+			s += {Bsa_E(i)}
+		}
+	}
+	return
+}
+
+@(test)
+bit_set_array_membership :: proc(t: ^testing.T) {
+	s := Bsa_Arr{.A, .C, .E}
+	testing.expect(t, .A in     s, ".A should be in s")
+	testing.expect(t, .E in     s, ".E should be in s")
+	testing.expect(t, .B not_in s, ".B should not be in s")
+	testing.expect(t, .H not_in s, ".H should not be in s")
+
+	// runtime (non-constant) key
+	k := Bsa_E.E
+	testing.expect(t, k in s, "runtime key .E should be in s")
+	k = .F
+	testing.expect(t, k not_in s, "runtime key .F should not be in s")
+
+	// constant folding of `in`
+	C :: Bsa_Arr{.A, .C}
+	#assert(.A in C)
+	#assert(.B not_in C)
+}
+
+@(test)
+bit_set_array_algebra :: proc(t: ^testing.T) {
+	a := Bsa_Arr{.A, .C, .E}
+	b := Bsa_Arr{.C, .E, .G}
+
+	testing.expect_value(t, a | b, Bsa_Arr{.A, .C, .E, .G})
+	testing.expect_value(t, a & b, Bsa_Arr{.C, .E})
+	testing.expect_value(t, a &~ b, Bsa_Arr{.A})
+	testing.expect_value(t, a + b, a | b)  // `+` aliases `|`
+	testing.expect_value(t, a - b, a &~ b) // `-` aliases `&~`
+
+	// complement
+	full := ~Bsa_Arr{}
+	testing.expect_value(t, card(full), 8)
+	testing.expect_value(t, ~a, full &~ a)
+
+	// assignment operators
+	s := Bsa_Arr{.A}
+	s += {.C}
+	s |= {.E}
+	testing.expect_value(t, s, Bsa_Arr{.A, .C, .E})
+	s -= {.A}
+	s &~= {.C}
+	testing.expect_value(t, s, Bsa_Arr{.E})
+	s = Bsa_Arr{.A, .B, .C}
+	s &= {.B, .C, .D}
+	testing.expect_value(t, s, Bsa_Arr{.B, .C})
+}
+
+@(test)
+bit_set_array_subset :: proc(t: ^testing.T) {
+	sup := Bsa_Arr{.A, .B, .C, .D}
+	sub := Bsa_Arr{.B, .C}
+	dis := Bsa_Arr{.E, .F}
+
+	testing.expect(t, sub <= sup, "sub is a subset")
+	testing.expect(t, sub <  sup, "sub is a strict subset")
+	testing.expect(t, sup >= sub, "sup is a superset")
+	testing.expect(t, sup >  sub, "sup is a strict superset")
+
+	testing.expect(t, sup <= sup,   "reflexive <=")
+	testing.expect(t, sup >= sup,   "reflexive >=")
+	testing.expect(t, !(sup < sup), "not a strict subset of itself")
+	testing.expect(t, !(sup > sup), "not a strict superset of itself")
+
+	testing.expect(t, !(dis <= sup), "disjoint set is not a subset")
+	testing.expect(t, !(sup <= dis), "superset is not a subset of a disjoint set")
+
+	// the same relations must fold at compile time
+	CSUP :: Bsa_Arr{.A, .B, .C, .D}
+	CSUB :: Bsa_Arr{.B, .C}
+	#assert(CSUB <= CSUP)
+	#assert(CSUB < CSUP)
+	#assert(CSUP >= CSUB)
+	#assert(CSUP > CSUB)
+	#assert(CSUP <= CSUP)
+	#assert(!(CSUP < CSUP))
+	#assert(CSUP == CSUP)
+	#assert(CSUB != CSUP)
+}
+
+@(test)
+bit_set_array_card :: proc(t: ^testing.T) {
+	testing.expect_value(t, card(Bsa_Arr{}), 0)
+	testing.expect_value(t, card(Bsa_Arr{.A}), 1)
+	testing.expect_value(t, card(Bsa_Arr{.A, .C, .E, .G}), 4)
+	testing.expect_value(t, card(~Bsa_Arr{}), 8)
+}
+
+@(test)
+bit_set_array_over_128_bits :: proc(t: ^testing.T) {
+	Big :: enum { V0 = 0, V64 = 64, V127 = 127, V128 = 128, V200 = 200 }
+	BS :: bit_set[Big; [4]u64] // 256 bits, cannot be an integer backing
+
+	testing.expect_value(t, size_of(BS), 32)
+
+	s := BS{.V0, .V128, .V200}
+	testing.expect(t, .V0   in     s, ".V0 in s")
+	testing.expect(t, .V128 in     s, ".V128 in s (past 128 bits)")
+	testing.expect(t, .V200 in     s, ".V200 in s (past 128 bits)")
+	testing.expect(t, .V64  not_in s, ".V64 not in s")
+	testing.expect(t, .V127 not_in s, ".V127 not in s")
+	testing.expect_value(t, card(s), 3)
+
+	// bits beyond 128 must participate in the set relations
+	testing.expect(t, BS{.V200} <= s,   "high bit subset")
+	testing.expect(t, !(BS{.V64} <= s), "absent high bit is not a subset")
+	testing.expect_value(t, s & BS{.V128}, BS{.V128})
+}
+
+@(test)
+bit_set_array_matches_integer_backing :: proc(t: ^testing.T) {
+	// Exhaustively compare an array-backed and an integer-backed bit_set over the same 8-bit masks
+	// for every relation and set operation.
+	mismatches := 0
+	for a in u16(0)..<256 {
+		for b in u16(0)..<256 {
+			aa, ab := bsa_arr_from(u8(a)), bsa_arr_from(u8(b))
+			ia, ib := bsa_int_from(u8(a)), bsa_int_from(u8(b))
+
+			if (aa <  ab) != (ia <  ib) { mismatches += 1 }
+			if (aa <= ab) != (ia <= ib) { mismatches += 1 }
+			if (aa >  ab) != (ia >  ib) { mismatches += 1 }
+			if (aa >= ab) != (ia >= ib) { mismatches += 1 }
+			if (aa == ab) != (ia == ib) { mismatches += 1 }
+			if (aa != ab) != (ia != ib) { mismatches += 1 }
+
+			if card(aa)       != card(ia)       { mismatches += 1 }
+			if card(aa | ab)  != card(ia | ib)  { mismatches += 1 }
+			if card(aa & ab)  != card(ia & ib)  { mismatches += 1 }
+			if card(aa &~ ab) != card(ia &~ ib) { mismatches += 1 }
+			if card(~aa)      != card(~ia)      { mismatches += 1 }
+		}
+	}
+	testing.expect_value(t, mismatches, 0)
+}
+
+@(test)
+bit_set_array_formatting :: proc(t: ^testing.T) {
+	a := Bsa_Arr{.A, .C, .H}
+	i := Bsa_Int{.A, .C, .H}
+
+	// The `%w` verb lists the members without the surrounding bit_set type name, so an array-backed
+	// set and an integer-backed set with the same members format identically.
+	sa := fmt.tprintf("%w", a)
+	si := fmt.tprintf("%w", i)
+	testing.expect_value(t, sa, si)
+	testing.expect_value(t, sa, "{Bsa_E.A, Bsa_E.C, Bsa_E.H}")
+}

From 0af5fd70ffb9f9c2ec5c5ef5dce12453f6e0c68b Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 12:33:43 +0100
Subject: [PATCH 038/215] Correct for finite decimal literals

---
 src/exact_value.cpp | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index 6e5b84bad..7f757ec0b 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -483,21 +483,25 @@ gb_internal ExactValue exact_value_float_from_string(String string) {
 		return exact_value_integer_from_string(string);
 	}
 
-	{
-		// NOTE(bill): A decimal literal whose value is an integer (e.g. `98765.0e309`) is kept
-		// as an exact arbitrary-precision integer so it is not silently rounded to `+Inf` by `strtod`
-		bool is_integral = false;
-		ExactValue v = exact_value_integer_from_decimal_float_string(string, &is_integral);
-		if (is_integral) {
-			return v;
-		}
-	}
-
 	bool success;
 	f64 f = float_from_string(string, &success);
 	if (!success) {
 		return {ExactValue_Invalid};
 	}
+
+	// NOTE: A finite decimal literal is kept as a floating-point value so that ordinary
+	// floating-point constant arithmetic behaves as expected (e.g. `1.0 / 16.0` is `0.0625`, not
+	// integer division). Only when the literal overflows `f64` to an infinity is it re-parsed as an
+	// exact arbitrary-precision integer (every such literal is integer-valued, e.g. `98765.0e309`),
+	// so that it is not silently turned into `+Inf` and its representability can be checked exactly.
+	if (isinf(f)) {
+		bool is_integral = false;
+		ExactValue v = exact_value_integer_from_decimal_float_string(string, &is_integral);
+		if (is_integral) {
+			// This is the exact integer value, or Invalid if it exceeds the exponent cap.
+			return v;
+		}
+	}
 	return exact_value_float(f);
 }
 

From db10c6ba3fda60ec061530b8d307bbb769259c71 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 14:01:08 +0100
Subject: [PATCH 039/215] Implement the basics for a big rational library in
 the compiler

---
 src/big_rat.cpp | 189 ++++++++++++++++++++++++++++++++++++++++++++++++
 src/main.cpp    |   1 +
 2 files changed, 190 insertions(+)
 create mode 100644 src/big_rat.cpp

diff --git a/src/big_rat.cpp b/src/big_rat.cpp
new file mode 100644
index 000000000..087f5398e
--- /dev/null
+++ b/src/big_rat.cpp
@@ -0,0 +1,189 @@
+gb_internal bool big_rat_from_decimal_string(String const &s, mp_int *num, mp_int *den) {
+	TEMPORARY_ALLOCATOR_GUARD();
+	char *digits = gb_alloc_array(temporary_allocator(), char, s.len + 2);
+	isize dlen = 0;
+
+	isize i = 0;
+	bool neg = false;
+	if (i < s.len && (s[i] == '+' || s[i] == '-')) {
+		neg = s[i] == '-';
+		i += 1;
+	}
+
+	i64 frac_digits = 0;
+	bool seen_dot = false;
+	for (; i < s.len; i++) {
+		u8 c = s[i];
+		if (c == '_') {
+			continue;
+		}
+		if (c == '.') {
+			if (seen_dot) return false;
+			seen_dot = true;
+			continue;
+		}
+		if (c == 'e' || c == 'E') {
+			break;
+		}
+		if (!gb_char_is_digit(cast(char)c)) return false;
+		digits[dlen++] = cast(char)c;
+		if (seen_dot) frac_digits += 1;
+	}
+	if (dlen == 0) {
+		digits[dlen++] = '0';
+	}
+	digits[dlen] = 0;
+
+	i64 exp = 0;
+	bool exp_neg = false;
+	if (i < s.len && (s[i] == 'e' || s[i] == 'E')) {
+		i += 1;
+		if (i < s.len && (s[i] == '+' || s[i] == '-')) {
+			exp_neg = s[i] == '-';
+			i += 1;
+		}
+		isize exp_digits = 0;
+		for (; i < s.len; i++) {
+			u8 c = s[i];
+			if (c == '_') continue;
+			if (!gb_char_is_digit(cast(char)c)) return false;
+			exp = exp*10 + cast(i64)(c - '0');
+			exp_digits += 1;
+		}
+		if (exp_digits == 0) return false;
+	}
+
+	i64 signed_exp = exp_neg ? -exp : exp;
+	i64 net = signed_exp - frac_digits; // value = mantissa * 10^net
+
+	mp_init(num);
+	mp_init(den);
+	mp_read_radix(num, digits, 10);
+	mp_set_u64(den, 1);
+
+	if (net != 0) {
+		mp_int ten; mp_init(&ten); defer (mp_clear(&ten)); mp_set_u64(&ten, 10);
+		mp_int p;   mp_init(&p);   defer (mp_clear(&p));
+		mp_expt_n(&ten, cast(int)(net < 0 ? -net : net), &p);
+		if (net > 0) {
+			mp_mul(num, &p, num);
+		} else {
+			mp_copy(&p, den);
+		}
+	}
+	if (neg) {
+		mp_neg(num, num);
+	}
+	return true;
+}
+
+// Convert the exact rational `a/b` (b != 0) to the nearest f64 (round-to-nearest, ties-to-even).
+// NOTE(bill): Ported from core:math/big `internal_rat_to_float`.
+gb_internal f64 big_rat_to_f64(mp_int const *a_in, mp_int const *b_in) {
+	int const MSIZE  = 52;         // explicit mantissa bits
+	int const MSIZE1 = MSIZE + 1;  // 53, incl. the implicit bit
+	int const MSIZE2 = MSIZE + 2;  // 54, one guard bit
+	int const EBIAS  = 1023;
+	int const EMIN   = 1 - EBIAS;  // -1022
+
+	int alen = mp_count_bits(a_in);
+	if (alen == 0) {
+		return big_int_is_neg(a_in) ? -0.0 : 0.0;
+	}
+	bool has_sign = big_int_is_neg(a_in) != big_int_is_neg(b_in);
+
+	int exp = alen - mp_count_bits(b_in);
+
+	mp_int a2, b2, q, r;
+	mp_init(&a2); mp_init(&b2); mp_init(&q); mp_init(&r);
+	defer (mp_clear(&a2)); defer (mp_clear(&b2)); defer (mp_clear(&q)); defer (mp_clear(&r));
+	mp_abs(a_in, &a2);
+	mp_abs(b_in, &b2);
+
+	int shift = MSIZE2 - exp;
+	if (shift > 0) {
+		mp_mul_2d(&a2, shift, &a2);
+	} else if (shift < 0) {
+		mp_mul_2d(&b2, -shift, &b2);
+	}
+
+	mp_div(&a2, &b2, &q, &r);
+	bool has_rem = !mp_iszero(&r);
+	u64 mantissa = mp_get_mag_u64(&q);
+
+	if ((mantissa >> MSIZE2) == 1) {
+		if (mantissa & 1) has_rem = true;
+		mantissa >>= 1;
+		exp += 1;
+	}
+	// mantissa is now in [2^53, 2^54): 53 significant bits plus one guard bit.
+
+	if (EMIN - MSIZE <= exp && exp <= EMIN) {
+		// Denormalise: fold the bits that fall below the subnormal grid into the guard/sticky.
+		unsigned sh = cast(unsigned)(EMIN - (exp - 1));
+		u64 lost = mantissa & ((cast(u64)1 << sh) - 1);
+		has_rem = has_rem || (lost != 0);
+		mantissa >>= sh;
+		exp = 2 - EBIAS;
+	}
+
+	if (mantissa & 1) {
+		if (has_rem || (mantissa & 2)) { // round half to even
+			mantissa += 1;
+			if (mantissa >= (cast(u64)1 << MSIZE2)) {
+				mantissa >>= 1;
+				exp += 1;
+			}
+		}
+	}
+	mantissa >>= 1; // drop the guard bit
+
+	f64 f = ldexp(cast(f64)mantissa, exp - MSIZE1);
+	if (has_sign) {
+		f = -f;
+	}
+	return f;
+}
+
+/*
+gb_internal void big_rat_selftest(void) {
+	char const *lits[] = {
+		"0.1", "0.2", "0.3", "0.5", "1.5",
+		"3.14159265358979323846",
+		"1e10", "1e100", "1e308",
+		"1.7976931348623157e308",     // ~max normal
+		"2.2250738585072014e-308",    // min normal
+		"5e-324",                     // smallest subnormal
+		"2.5e-324", "7.5e-324",       // subnormal ties
+		"1e-324", "4e-324",           // below the smallest subnormal (round to 0 / to 1 ulp)
+		"9007199254740993",           // 2^53 + 1
+		"98765.0e309",                // overflow -> +Inf
+		"-0.1", "-2.5e-324",
+		"0.1000000000000000055511151231257827021181583404541015625", // exact f64(0.1)
+	};
+	int total = 0, diffs = 0;
+	for (isize k = 0; k < cast(isize)(gb_size_of(lits)/gb_size_of(lits[0])); k++) {
+		char const *lit = lits[k];
+		mp_int num, den;
+		if (!big_rat_from_decimal_string(make_string_c(lit), &num, &den)) {
+			gb_printf_err("  PARSE FAIL: %s\n", lit);
+			continue;
+		}
+		f64 mine = big_rat_to_f64(&num, &den);
+		mp_clear(&num); mp_clear(&den);
+
+		char *end = nullptr;
+		f64 ref = strtod(lit, &end);
+
+		union { f64 f; u64 u; } mb, rb;
+		mb.f = mine; rb.f = ref;
+		bool ok = mb.u == rb.u;
+		if (!ok) diffs += 1;
+		total += 1;
+		gb_printf("  %-56s mine=%016llx ref=%016llx %s\n",
+		          lit, cast(unsigned long long)mb.u, cast(unsigned long long)rb.u, ok ? "OK" : "DIFF");
+	}
+	gb_printf("big_rat_selftest: %d/%d correctly rounded vs strtod (%d diffs)\n", total-diffs, total, diffs);
+}
+
+*/
\ No newline at end of file
diff --git a/src/main.cpp b/src/main.cpp
index 3605717e7..2f506b501 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -7,6 +7,7 @@
 	#pragma warning(disable: 4505)
 #endif
 #include "big_int.cpp"
+#include "big_rat.cpp"
 #if defined(GB_SYSTEM_WINDOWS)
 	#pragma warning(pop)
 #endif

From e23e01510eb95df0007ffabaf06e2a241463e4fd Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 14:17:21 +0100
Subject: [PATCH 040/215] Add `ExactValue_Rational`; Start adding some tests
 for big rat

---
 src/big_rat.cpp     |  26 +++++++
 src/exact_value.cpp | 182 ++++++++++++++++++++++++++++++++++++++++++--
 src/main.cpp        |   6 ++
 3 files changed, 209 insertions(+), 5 deletions(-)

diff --git a/src/big_rat.cpp b/src/big_rat.cpp
index 087f5398e..afff7edc0 100644
--- a/src/big_rat.cpp
+++ b/src/big_rat.cpp
@@ -1,3 +1,29 @@
+// An exact rational value: num/den with den > 0, kept in lowest terms.
+struct BigRat {
+	mp_int num; // signed
+	mp_int den; // > 0
+};
+
+// Reduce num/den to lowest terms with den > 0 (0 becomes 0/1).
+gb_internal void big_rat_normalize(mp_int *num, mp_int *den) {
+	if (mp_iszero(num)) {
+		mp_set_u64(den, 1);
+		return;
+	}
+	if (big_int_is_neg(den)) {
+		mp_neg(num, num);
+		mp_neg(den, den);
+	}
+	mp_int g;   mp_init(&g);   defer (mp_clear(&g));
+	mp_int one; mp_init(&one); defer (mp_clear(&one)); mp_set_u64(&one, 1);
+	mp_gcd(num, den, &g);
+	if (!mp_iszero(&g) && mp_cmp(&g, &one) != MP_EQ) {
+		mp_int q, r; mp_init(&q); mp_init(&r); defer (mp_clear(&q)); defer (mp_clear(&r));
+		mp_div(num, &g, &q, &r); mp_copy(&q, num);
+		mp_div(den, &g, &q, &r); mp_copy(&q, den);
+	}
+}
+
 gb_internal bool big_rat_from_decimal_string(String const &s, mp_int *num, mp_int *den) {
 	TEMPORARY_ALLOCATOR_GUARD();
 	char *digits = gb_alloc_array(temporary_allocator(), char, s.len + 2);
diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index 7f757ec0b..ff5731140 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -30,6 +30,7 @@ enum ExactValueKind {
 	ExactValue_String16    = 11,
 	ExactValue_AsmTemplate = 12,
 	ExactValue_Variant     = 13,
+	ExactValue_Rational    = 14, // exact num/den for untyped float constants
 
 	ExactValue_Count,
 };
@@ -50,6 +51,7 @@ gb_global char const *exact_value_kind_string[ExactValue_Count] = {
 	"String16",
 	"AsmTemplate",
 	"Variant",
+	"Rational",
 };
 
 struct ExactValue {
@@ -59,6 +61,7 @@ struct ExactValue {
 		String         value_string;
 		BigInt         value_integer;
 		f64            value_float;
+		BigRat *       value_rational;
 		i64            value_pointer; // NOTE(bill): This must be an integer and not a pointer
 		Complex128    *value_complex;
 		Quaternion256 *value_quaternion;
@@ -99,6 +102,15 @@ gb_internal uintptr hash_exact_value(ExactValue v) {
 	case ExactValue_Float:
 		res = gb_fnv32a(&v.value_float, gb_size_of(v.value_float));
 		break;
+	case ExactValue_Rational:
+		{
+			BigInt const &n = v.value_rational->num;
+			BigInt const &d = v.value_rational->den;
+			u32 kn = gb_fnv32a(n.dp, gb_size_of(*n.dp) * n.used);
+			u32 kd = gb_fnv32a(d.dp, gb_size_of(*d.dp) * d.used);
+			res = ((kn ^ (u8)n.sign) * 0x01000193) ^ kd;
+			break;
+		}
 	case ExactValue_Pointer:
 		res = ptr_map_hash_key(v.value_pointer);
 		break;
@@ -173,6 +185,25 @@ gb_internal ExactValue exact_value_float(f64 f) {
 	return result;
 }
 
+// Make an exact-rational value from num/den (copied and reduced to lowest terms, den > 0).
+gb_internal ExactValue exact_value_rational_from_ints(mp_int const *num, mp_int const *den) {
+	BigRat *br = permanent_alloc_item<BigRat>();
+	mp_init(&br->num);
+	mp_init(&br->den);
+	mp_copy(num, &br->num);
+	mp_copy(den, &br->den);
+	big_rat_normalize(&br->num, &br->den);
+
+	ExactValue result = {ExactValue_Rational};
+	result.value_rational = br;
+	return result;
+}
+
+gb_internal ExactValue exact_value_rational_from_integer(BigInt const *i) {
+	mp_int one; mp_init(&one); defer (mp_clear(&one)); mp_set_u64(&one, 1);
+	return exact_value_rational_from_ints(i, &one);
+}
+
 gb_internal ExactValue exact_value_complex(f64 real, f64 imag) {
 	ExactValue result = {ExactValue_Complex};
 	result.value_complex = permanent_alloc_item<Complex128>();
@@ -567,6 +598,17 @@ gb_internal ExactValue exact_value_to_integer(ExactValue v) {
 
 	case ExactValue_Pointer:
 		return exact_value_i64(cast(i64)cast(intptr)v.value_pointer);
+
+	case ExactValue_Rational:
+		// Only an exact integer (den == 1 after reduction) converts to an integer.
+		if (mp_cmp_d(&v.value_rational->den, 1) == MP_EQ) {
+			ExactValue r = {ExactValue_Integer};
+			r.value_integer = {0};
+			mp_init(&r.value_integer);
+			mp_copy(&v.value_rational->num, &r.value_integer);
+			return r;
+		}
+		break;
 	}
 	ExactValue r = {ExactValue_Invalid};
 	return r;
@@ -578,6 +620,8 @@ gb_internal ExactValue exact_value_to_float(ExactValue v) {
 		return exact_value_float(big_int_to_f64(&v.value_integer));
 	case ExactValue_Float:
 		return v;
+	case ExactValue_Rational:
+		return exact_value_float(big_rat_to_f64(&v.value_rational->num, &v.value_rational->den));
 	}
 	ExactValue r = {ExactValue_Invalid};
 	return r;
@@ -589,6 +633,8 @@ gb_internal ExactValue exact_value_to_complex(ExactValue v) {
 		return exact_value_complex(big_int_to_f64(&v.value_integer), 0);
 	case ExactValue_Float:
 		return exact_value_complex(v.value_float, 0);
+	case ExactValue_Rational:
+		return exact_value_complex(big_rat_to_f64(&v.value_rational->num, &v.value_rational->den), 0);
 	case ExactValue_Complex:
 		return v;
 	// case ExactValue_Quaternion:
@@ -604,6 +650,8 @@ gb_internal ExactValue exact_value_to_quaternion(ExactValue v) {
 		return exact_value_quaternion(big_int_to_f64(&v.value_integer), 0, 0, 0);
 	case ExactValue_Float:
 		return exact_value_quaternion(v.value_float, 0, 0, 0);
+	case ExactValue_Rational:
+		return exact_value_quaternion(big_rat_to_f64(&v.value_rational->num, &v.value_rational->den), 0, 0, 0);
 	case ExactValue_Complex:
 		return exact_value_quaternion(v.value_complex->real, v.value_complex->imag, 0, 0);
 	case ExactValue_Quaternion:
@@ -618,6 +666,7 @@ gb_internal ExactValue exact_value_real(ExactValue v) {
 	switch (v.kind) {
 	case ExactValue_Integer:
 	case ExactValue_Float:
+	case ExactValue_Rational:
 		return v;
 	case ExactValue_Complex:
 		return exact_value_float(v.value_complex->real);
@@ -632,6 +681,7 @@ gb_internal ExactValue exact_value_imag(ExactValue v) {
 	switch (v.kind) {
 	case ExactValue_Integer:
 	case ExactValue_Float:
+	case ExactValue_Rational:
 		return exact_value_i64(0);
 	case ExactValue_Complex:
 		return exact_value_float(v.value_complex->imag);
@@ -646,6 +696,7 @@ gb_internal ExactValue exact_value_jmag(ExactValue v) {
 	switch (v.kind) {
 	case ExactValue_Integer:
 	case ExactValue_Float:
+	case ExactValue_Rational:
 	case ExactValue_Complex:
 		return exact_value_i64(0);
 	case ExactValue_Quaternion:
@@ -659,6 +710,7 @@ gb_internal ExactValue exact_value_kmag(ExactValue v) {
 	switch (v.kind) {
 	case ExactValue_Integer:
 	case ExactValue_Float:
+	case ExactValue_Rational:
 	case ExactValue_Complex:
 		return exact_value_i64(0);
 	case ExactValue_Quaternion:
@@ -740,6 +792,7 @@ gb_internal ExactValue exact_unary_operator_value(TokenKind op, ExactValue v, i3
 		switch (v.kind) {
 		case ExactValue_Invalid:
 		case ExactValue_Integer:
+		case ExactValue_Rational:
 		case ExactValue_Float:
 		case ExactValue_Complex:
 		case ExactValue_Quaternion:
@@ -763,6 +816,11 @@ gb_internal ExactValue exact_unary_operator_value(TokenKind op, ExactValue v, i3
 			i.value_float = -i.value_float;
 			return i;
 		}
+		case ExactValue_Rational: {
+			mp_int n; mp_init(&n); defer (mp_clear(&n));
+			big_int_neg(&n, &v.value_rational->num);
+			return exact_value_rational_from_ints(&n, &v.value_rational->den);
+		}
 		case ExactValue_Complex: {
 			f64 real = v.value_complex->real;
 			f64 imag = v.value_complex->imag;
@@ -823,16 +881,18 @@ gb_internal i32 exact_value_order(ExactValue const &v) {
 		return 1;
 	case ExactValue_Integer:
 		return 2;
-	case ExactValue_Float:
+	case ExactValue_Rational: // exact; between integer and (lossy) float
 		return 3;
-	case ExactValue_Complex:
+	case ExactValue_Float:
 		return 4;
-	case ExactValue_Quaternion:
+	case ExactValue_Complex:
 		return 5;
-	case ExactValue_Pointer:
+	case ExactValue_Quaternion:
 		return 6;
-	case ExactValue_Procedure:
+	case ExactValue_Pointer:
 		return 7;
+	case ExactValue_Procedure:
+		return 8;
 
 	default:
 		GB_PANIC("How'd you get here? Invalid Value.kind %d", v.kind);
@@ -867,6 +927,10 @@ gb_internal void match_exact_values(ExactValue *x, ExactValue *y) {
 		switch (y->kind) {
 		case ExactValue_Integer:
 			return;
+		case ExactValue_Rational:
+			// Promote the integer to an exact rational so folding stays exact.
+			*x = exact_value_rational_from_integer(&x->value_integer);
+			return;
 		case ExactValue_Float:
 			// TODO(bill): Is this good enough?
 			*x = exact_value_float(big_int_to_f64(&x->value_integer));
@@ -880,6 +944,22 @@ gb_internal void match_exact_values(ExactValue *x, ExactValue *y) {
 		}
 		break;
 
+	case ExactValue_Rational:
+		switch (y->kind) {
+		case ExactValue_Rational:
+			return;
+		case ExactValue_Float:
+			*x = exact_value_to_float(*x);
+			return;
+		case ExactValue_Complex:
+			*x = exact_value_to_complex(*x);
+			return;
+		case ExactValue_Quaternion:
+			*x = exact_value_to_quaternion(*x);
+			return;
+		}
+		break;
+
 	case ExactValue_Float:
 		switch (y->kind) {
 		case ExactValue_Float:
@@ -955,6 +1035,27 @@ gb_internal ExactValue exact_binary_operator_value(TokenKind op, ExactValue x, E
 		return res;
 	}
 
+	case ExactValue_Rational: {
+		// Exact rational arithmetic: a/b (op) c/d, result reduced to lowest terms.
+		mp_int const *an = &x.value_rational->num, *ad = &x.value_rational->den;
+		mp_int const *bn = &y.value_rational->num, *bd = &y.value_rational->den;
+		mp_int nn, nd, t1, t2;
+		mp_init(&nn); mp_init(&nd); mp_init(&t1); mp_init(&t2);
+		defer (mp_clear(&nn)); defer (mp_clear(&nd)); defer (mp_clear(&t1)); defer (mp_clear(&t2));
+		switch (op) {
+		case Token_Add: // (an*bd + bn*ad) / (ad*bd)
+			big_int_mul(&t1, an, bd); big_int_mul(&t2, bn, ad); big_int_add(&nn, &t1, &t2); big_int_mul(&nd, ad, bd); break;
+		case Token_Sub:
+			big_int_mul(&t1, an, bd); big_int_mul(&t2, bn, ad); big_int_sub(&nn, &t1, &t2); big_int_mul(&nd, ad, bd); break;
+		case Token_Mul:
+			big_int_mul(&nn, an, bn); big_int_mul(&nd, ad, bd); break;
+		case Token_Quo: // (an/ad) / (bn/bd) = (an*bd) / (ad*bn)
+			big_int_mul(&nn, an, bd); big_int_mul(&nd, ad, bn); break;
+		default: goto error;
+		}
+		return exact_value_rational_from_ints(&nn, &nd);
+	}
+
 	case ExactValue_Float: {
 		f64 a = x.value_float;
 		f64 b = y.value_float;
@@ -1136,6 +1237,23 @@ gb_internal bool compare_exact_values(TokenKind op, ExactValue x, ExactValue y)
 		break;
 	}
 
+	case ExactValue_Rational: {
+		// a/b (op) c/d with b,d > 0  <=>  a*d (op) c*b
+		mp_int lhs, rhs; mp_init(&lhs); mp_init(&rhs); defer (mp_clear(&lhs)); defer (mp_clear(&rhs));
+		big_int_mul(&lhs, &x.value_rational->num, &y.value_rational->den);
+		big_int_mul(&rhs, &y.value_rational->num, &x.value_rational->den);
+		i32 cmp = big_int_cmp(&lhs, &rhs);
+		switch (op) {
+		case Token_CmpEq: return cmp == 0;
+		case Token_NotEq: return cmp != 0;
+		case Token_Lt:    return cmp <  0;
+		case Token_LtEq:  return cmp <= 0;
+		case Token_Gt:    return cmp >  0;
+		case Token_GtEq:  return cmp >= 0;
+		}
+		break;
+	}
+
 	case ExactValue_Float: {
 		f64 a = x.value_float;
 		f64 b = y.value_float;
@@ -1318,6 +1436,8 @@ gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const
 	// NOTE(tf2spi): %.17g is specific enough to canonically serialize f64
 	case ExactValue_Float:
 		return gb_string_append_fmt(str, "%.17g", v.value_float);
+	case ExactValue_Rational:
+		return gb_string_append_fmt(str, "%.17g", big_rat_to_f64(&v.value_rational->num, &v.value_rational->den));
 	case ExactValue_Complex:
 		return gb_string_append_fmt(str, "%.17g+%.17gi", v.value_complex->real, v.value_complex->imag);
 	case ExactValue_Quaternion:
@@ -1338,3 +1458,55 @@ gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const
 gb_internal gbString exact_value_to_string(ExactValue const &v, isize string_limit=36) {
 	return write_exact_value_to_string(gb_string_make(heap_allocator(), ""), v, string_limit);
 }
+
+// TEMPORARY(bill): exercise ExactValue_Rational arithmetic/compare/convert
+gb_internal ExactValue exact_value_rational_from_decimal(char const *lit) {
+	mp_int num, den;
+	big_rat_from_decimal_string(make_string_c(lit), &num, &den);
+	ExactValue r = exact_value_rational_from_ints(&num, &den);
+	mp_clear(&num);
+	mp_clear(&den);
+	return r;
+}
+
+gb_internal void exact_value_rational_selftest(void) {
+	int total = 0, diffs = 0;
+	#define RAT(s)          exact_value_rational_from_decimal(s)
+	#define BIN(a, op, b)   exact_binary_operator_value(op, a, b)
+	#define TOF(v)          exact_value_to_float(v).value_float
+	#define CHK(label, gotf, wantstr) do {       \
+		f64 g_ = (gotf);                     \
+		f64 w_ = strtod((wantstr), nullptr); \
+		union { f64 f; u64 u; } gg, ww;      \
+		gg.f = g_;                           \
+		ww.f = w_;                           \
+		bool ok_ = gg.u == ww.u;             \
+		total += 1;                          \
+		if (!ok_) { diffs += 1; }            \
+		gb_printf("  %-24s got=%-24.17g want=%-24.17g %s\n", label, g_, w_, ok_ ? "OK" : "DIFF"); \
+	} while (0)
+
+	CHK("0.1 + 0.2",       TOF(BIN(RAT("0.1"), Token_Add, RAT("0.2"))), "0.3");
+	CHK("1.0 / 16.0",      TOF(BIN(RAT("1.0"), Token_Quo, RAT("16.0"))), "0.0625");
+	CHK("3.0 / 2.0",       TOF(BIN(RAT("3.0"), Token_Quo, RAT("2.0"))), "1.5");
+	CHK("2/3 + 1/3",       TOF(BIN(BIN(RAT("2.0"), Token_Quo, RAT("3.0")), Token_Add, BIN(RAT("1.0"), Token_Quo, RAT("3.0")))), "1.0");
+	CHK("0.3 - 0.2 - 0.1", TOF(BIN(BIN(RAT("0.3"), Token_Sub, RAT("0.2")), Token_Sub, RAT("0.1"))), "0.0");
+
+	// mixed integer + rational (exercises match_exact_values Integer -> Rational)
+	{
+		ExactValue one = exact_value_i64(1);
+		CHK("1 + 0.5 (int+rat)", TOF(BIN(one, Token_Add, RAT("0.5"))), "1.5");
+	}
+	// comparison folding: (0.1 + 0.2) == 0.3 is exactly true with rationals
+	{
+		bool eq = compare_exact_values(Token_CmpEq, BIN(RAT("0.1"), Token_Add, RAT("0.2")), RAT("0.3"));
+		total += 1; if (!eq) diffs += 1;
+		gb_printf("  %-24s got=%-5s              %s\n", "(0.1+0.2) == 0.3", eq ? "true" : "false", eq ? "OK" : "DIFF");
+	}
+
+	#undef RAT
+	#undef BIN
+	#undef TOF
+	#undef CHK
+	gb_printf("exact_value_rational_selftest: %d/%d ok (%d diffs)\n", total-diffs, total, diffs);
+}
diff --git a/src/main.cpp b/src/main.cpp
index 2f506b501..0bf759573 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -3860,6 +3860,12 @@ int main(int arg_count, char const **arg_ptr) {
 	init_keyword_hash_table();
 	init_terminal();
 
+	// TEMPORARY(bill): validate the exact-rational core in-tree.
+	if (gb_get_env("ODIN_BIGRAT_SELFTEST", heap_allocator()) != nullptr) {
+		exact_value_rational_selftest();
+		return 0;
+	}
+
 	if (!check_env()) {
 		return 1;
 	}

From 7b19697dcf266a42f16e5ead4ed6a875b32ddeba Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 14:38:08 +0100
Subject: [PATCH 041/215] Integrate `ExactValue_Rational` throughout the
 codebase

---
 src/big_rat.cpp            |  56 +++--------
 src/check_asm.cpp          |   2 +-
 src/check_builtin.cpp      |   3 +
 src/check_expr.cpp         |   9 +-
 src/check_type.cpp         |   4 +-
 src/exact_value.cpp        | 190 ++++---------------------------------
 src/llvm_backend_const.cpp |   4 +
 src/main.cpp               |   8 +-
 8 files changed, 49 insertions(+), 227 deletions(-)

diff --git a/src/big_rat.cpp b/src/big_rat.cpp
index afff7edc0..8f4383a72 100644
--- a/src/big_rat.cpp
+++ b/src/big_rat.cpp
@@ -4,6 +4,10 @@ struct BigRat {
 	mp_int den; // > 0
 };
 
+// Guards against a tiny literal requesting an enormous 10^N (e.g. `1.0e999999999`). Far beyond any
+// representable float (f64 range is ~1e+-324); a literal past this is rejected as malformed.
+i64 const BIG_RAT_MAX_DECIMAL_EXP = 65536;
+
 // Reduce num/den to lowest terms with den > 0 (0 becomes 0/1).
 gb_internal void big_rat_normalize(mp_int *num, mp_int *den) {
 	if (mp_iszero(num)) {
@@ -73,7 +77,9 @@ gb_internal bool big_rat_from_decimal_string(String const &s, mp_int *num, mp_in
 			u8 c = s[i];
 			if (c == '_') continue;
 			if (!gb_char_is_digit(cast(char)c)) return false;
-			exp = exp*10 + cast(i64)(c - '0');
+			if (exp <= BIG_RAT_MAX_DECIMAL_EXP) { // clamp so it cannot overflow; rejected below
+				exp = exp*10 + cast(i64)(c - '0');
+			}
 			exp_digits += 1;
 		}
 		if (exp_digits == 0) return false;
@@ -81,6 +87,9 @@ gb_internal bool big_rat_from_decimal_string(String const &s, mp_int *num, mp_in
 
 	i64 signed_exp = exp_neg ? -exp : exp;
 	i64 net = signed_exp - frac_digits; // value = mantissa * 10^net
+	if (net > BIG_RAT_MAX_DECIMAL_EXP || net < -BIG_RAT_MAX_DECIMAL_EXP) {
+		return false;
+	}
 
 	mp_init(num);
 	mp_init(den);
@@ -169,47 +178,4 @@ gb_internal f64 big_rat_to_f64(mp_int const *a_in, mp_int const *b_in) {
 		f = -f;
 	}
 	return f;
-}
-
-/*
-gb_internal void big_rat_selftest(void) {
-	char const *lits[] = {
-		"0.1", "0.2", "0.3", "0.5", "1.5",
-		"3.14159265358979323846",
-		"1e10", "1e100", "1e308",
-		"1.7976931348623157e308",     // ~max normal
-		"2.2250738585072014e-308",    // min normal
-		"5e-324",                     // smallest subnormal
-		"2.5e-324", "7.5e-324",       // subnormal ties
-		"1e-324", "4e-324",           // below the smallest subnormal (round to 0 / to 1 ulp)
-		"9007199254740993",           // 2^53 + 1
-		"98765.0e309",                // overflow -> +Inf
-		"-0.1", "-2.5e-324",
-		"0.1000000000000000055511151231257827021181583404541015625", // exact f64(0.1)
-	};
-	int total = 0, diffs = 0;
-	for (isize k = 0; k < cast(isize)(gb_size_of(lits)/gb_size_of(lits[0])); k++) {
-		char const *lit = lits[k];
-		mp_int num, den;
-		if (!big_rat_from_decimal_string(make_string_c(lit), &num, &den)) {
-			gb_printf_err("  PARSE FAIL: %s\n", lit);
-			continue;
-		}
-		f64 mine = big_rat_to_f64(&num, &den);
-		mp_clear(&num); mp_clear(&den);
-
-		char *end = nullptr;
-		f64 ref = strtod(lit, &end);
-
-		union { f64 f; u64 u; } mb, rb;
-		mb.f = mine; rb.f = ref;
-		bool ok = mb.u == rb.u;
-		if (!ok) diffs += 1;
-		total += 1;
-		gb_printf("  %-56s mine=%016llx ref=%016llx %s\n",
-		          lit, cast(unsigned long long)mb.u, cast(unsigned long long)rb.u, ok ? "OK" : "DIFF");
-	}
-	gb_printf("big_rat_selftest: %d/%d correctly rounded vs strtod (%d diffs)\n", total-diffs, total, diffs);
-}
-
-*/
\ No newline at end of file
+}
\ No newline at end of file
diff --git a/src/check_asm.cpp b/src/check_asm.cpp
index 83ad8125d..dc050f1f0 100644
--- a/src/check_asm.cpp
+++ b/src/check_asm.cpp
@@ -217,7 +217,7 @@ enum AsmMismatch : u8 {
 // Accepts either a signed or an unsigned interpretation of the bit pattern, which
 // matches how the assembler treats imm fields (e.g. both 200 and -56 fit imm8).
 gb_internal bool check_asm_immediate_value_fits(ExactValue ev, i32 bits, i32 *needed_, AsmMismatch *mismatch_) {
-	if (ev.kind == ExactValue_Float) {
+	if (ev.kind == ExactValue_Float || ev.kind == ExactValue_Rational) {
 		// Try to convert it if possible to an integer
 		ev = exact_value_to_integer(ev);
 	}
diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 187ddf43c..9a3013e8e 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -5202,6 +5202,9 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 		operand->type = o.type;
 
 		ExactValue value = o.value;
+		if (value.kind == ExactValue_Rational) {
+			value = exact_value_to_float(value); // constant floor/ceil/round operate on the f64
+		}
 		if (value.kind == ExactValue_Integer) {
 			// do nothing
 		} else if (value.kind == ExactValue_Float) {
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 248e9f146..45f5c504a 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -2517,7 +2517,9 @@ gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue i
 		}
 		check_update_float_precision(&v, type);
 
-		if (in_value.kind == ExactValue_Integer) {
+		// An exact finite constant (integer or rational) that overflows the target float's range is not
+		// representable by it; without this it would silently become +/-Inf (e.g. `x: f64 = 1.0e400`).
+		if (in_value.kind == ExactValue_Integer || in_value.kind == ExactValue_Rational) {
 			bool overflowed = isinf(v.value_float) || isnan(v.value_float);
 			if (!overflowed) {
 				switch (type->Basic.kind) {
@@ -2738,7 +2740,7 @@ gb_internal bool check_integer_exceed_suggestion(CheckerContext *c, Operand *o,
 // Returns how the empty value of `type` should be spelled when a numeric zero was written,
 // or nullptr if there is nothing worth suggesting.
 gb_internal char const *zero_value_suggestion(Operand *o, Type *type) {
-	if (o->value.kind != ExactValue_Integer && o->value.kind != ExactValue_Float) {
+	if (o->value.kind != ExactValue_Integer && o->value.kind != ExactValue_Float && o->value.kind != ExactValue_Rational) {
 		return nullptr;
 	}
 	if (!is_exact_value_zero(o->value)) {
@@ -12630,6 +12632,7 @@ gb_internal ExprKind check_expr_base_internal(CheckerContext *c, Operand *o, Ast
 		case ExactValue_String:     t = t_untyped_string;     break;
 		case ExactValue_String16:   t = t_string16;           break; // TODO(bill): determine this correctly
 		case ExactValue_Float:      t = t_untyped_float;      break;
+		case ExactValue_Rational:   t = t_untyped_float;      break; // exact decimal float literal
 		case ExactValue_Complex:    t = t_untyped_complex;    break;
 		case ExactValue_Quaternion: t = t_untyped_quaternion; break;
 		case ExactValue_Integer:
@@ -13064,6 +13067,8 @@ gb_internal bool is_exact_value_zero(ExactValue const &v) {
 		return big_int_is_zero(&v.value_integer);
 	case ExactValue_Float:
 		return v.value_float == 0.0;
+	case ExactValue_Rational:
+		return big_int_is_zero(&v.value_rational->num);
 	case ExactValue_Complex:
 		if (v.value_complex) {
 			return v.value_complex->real == 0.0 && v.value_complex->imag == 0.0;
diff --git a/src/check_type.cpp b/src/check_type.cpp
index a5a8e64a4..b48a6c8ae 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1139,7 +1139,7 @@ gb_internal void check_bit_field_type(CheckerContext *ctx, Type *bit_field_type,
 			error(f->bit_size, "A bit_field's specified bit size must be a constant");
 			o.mode = Addressing_Invalid;
 		}
-		if (o.value.kind == ExactValue_Float) {
+		if (o.value.kind == ExactValue_Float || o.value.kind == ExactValue_Rational) {
 			o.value = exact_value_to_integer(o.value);
 		}
 		if (f->bit_size->kind == Ast_BinaryExpr && f->bit_size->BinaryExpr.op.kind == Token_Or) {
@@ -2882,7 +2882,7 @@ gb_internal i64 check_array_count(CheckerContext *ctx, Operand *o, Ast *e) {
 	Type *type = core_type(o->type);
 	if (is_type_untyped(type) || is_type_integer(type)) {
 		ExactValue value = o->value;
-		if (value.kind == ExactValue_Float) {
+		if (value.kind == ExactValue_Float || value.kind == ExactValue_Rational) {
 			// NOTE: an integral float is a valid count, but it must be range checked as an integer
 			value = exact_value_to_integer(value);
 		}
diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index ff5731140..60126a401 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -380,106 +380,6 @@ gb_internal f64 float_from_string(String const &string, bool *success = nullptr)
 */
 }
 
-gb_internal ExactValue exact_value_integer_from_decimal_float_string(String const &string, bool *is_integral) {
-	*is_integral = false;
-
-	BigInt mantissa = {};
-	big_int_from_u64(&mantissa, 0);
-	defer (big_int_dealloc(&mantissa));
-	BigInt ten = {};
-	big_int_from_u64(&ten, 10);
-	defer (big_int_dealloc(&ten));
-	BigInt digit = {};
-	defer (big_int_dealloc(&digit));
-
-	isize i = 0;
-	i64 frac_digits = 0;
-	bool seen_dot = false;
-	for (; i < string.len; i++) {
-		u8 c = string.text[i];
-		if (c == '_') {
-			continue;
-		}
-		if (c == '.') {
-			if (seen_dot) {
-				return {ExactValue_Invalid};
-			}
-			seen_dot = true;
-			continue;
-		}
-		if (c == 'e' || c == 'E') {
-			break;
-		}
-		if (!gb_char_is_digit(cast(char)c)) {
-			// NOTE(bill): Not a plain base-10 float literal (the tokenizer should have prevented this).
-			return {ExactValue_Invalid};
-		}
-		big_int_from_u64(&digit, u64_digit_value(cast(Rune)c));
-		big_int_mul_eq(&mantissa, &ten);
-		big_int_add_eq(&mantissa, &digit);
-		if (seen_dot) {
-			frac_digits += 1;
-		}
-	}
-
-	i64 exp = 0;
-	bool exp_negative = false;
-	if (i < string.len && (string.text[i] == 'e' || string.text[i] == 'E')) {
-		i += 1;
-		if (i < string.len && (string.text[i] == '+' || string.text[i] == '-')) {
-			exp_negative = string.text[i] == '-';
-			i += 1;
-		}
-		isize exp_digits = 0;
-		for (; i < string.len; i++) {
-			u8 c = string.text[i];
-			if (c == '_') {
-				continue;
-			}
-			if (!gb_char_is_digit(cast(char)c)) {
-				return {ExactValue_Invalid};
-			}
-			if (exp <= 512) {
-				// NOTE(bill): clamp so it cannot overflow; anything past the cap is rejected below
-				exp = exp*10 + cast(i64)u64_digit_value(cast(Rune)c);
-			}
-			exp_digits += 1;
-		}
-		if (exp_digits == 0) {
-			return {ExactValue_Invalid};
-		}
-	}
-
-	i64 signed_exp = exp_negative ? -exp : exp;
-	i64 effective_exp = signed_exp - frac_digits;
-	if (effective_exp < 0) {
-		// NOTE(bill): The value has a fractional part, so it is not an integer; let the caller parse it as a float.
-		return {ExactValue_Invalid};
-	}
-
-	*is_integral = true;
-
-	// NOTE(bill): Guard against pathological allocations; kept consistent with `big_int_from_string`.
-	if (signed_exp > 512) {
-		return {ExactValue_Invalid};
-	}
-
-	bool success = true;
-	BigInt scale = {};
-	mp_init(&scale);
-	defer (big_int_dealloc(&scale));
-	big_int_exp_u64(&scale, &ten, cast(u64)effective_exp, &success);
-	if (!success) {
-		return {ExactValue_Invalid};
-	}
-
-	ExactValue result = {ExactValue_Integer};
-	result.value_integer = {0};
-	mp_init(&result.value_integer);
-	big_int_mul(&result.value_integer, &mantissa, &scale);
-	return result;
-}
-
 gb_internal ExactValue exact_value_float_from_string(String string) {
 	if (string.len > 2 && string[0] == '0' && string[1] == 'h') {
 
@@ -514,26 +414,28 @@ gb_internal ExactValue exact_value_float_from_string(String string) {
 		return exact_value_integer_from_string(string);
 	}
 
-	bool success;
-	f64 f = float_from_string(string, &success);
-	if (!success) {
-		return {ExactValue_Invalid};
-	}
-
-	// NOTE: A finite decimal literal is kept as a floating-point value so that ordinary
-	// floating-point constant arithmetic behaves as expected (e.g. `1.0 / 16.0` is `0.0625`, not
-	// integer division). Only when the literal overflows `f64` to an infinity is it re-parsed as an
-	// exact arbitrary-precision integer (every such literal is integer-valued, e.g. `98765.0e309`),
-	// so that it is not silently turned into `+Inf` and its representability can be checked exactly.
-	if (isinf(f)) {
-		bool is_integral = false;
-		ExactValue v = exact_value_integer_from_decimal_float_string(string, &is_integral);
-		if (is_integral) {
-			// This is the exact integer value, or Invalid if it exceeds the exponent cap.
-			return v;
+	// A finite base-10 floating-point literal is kept as an EXACT rational so that constant folding is
+	// exact and only rounds once, when the constant is finally given a concrete type (see
+	// `exact_value_to_float` and `check_representable_as_constant`). This mirrors Go's `go/constant`,
+	// where small values are held as `big.Rat`. The `0h...` hexadecimal-float path above keeps its
+	// exact bit pattern as an `f64`; that is also the side channel for the +/-Inf and NaN values that a
+	// rational cannot represent.
+	mp_int num, den;
+	if (big_rat_from_decimal_string(string, &num, &den)) {
+		// A zero-valued literal stays an f64 so that signed zero survives: a rational 0/1 has no sign,
+		// but `-0.0` (unary minus applied to this `0.0`) must keep its sign bit.
+		bool is_zero = mp_iszero(&num);
+		if (is_zero) {
+			mp_clear(&num);
+			mp_clear(&den);
+			return exact_value_float(0.0);
 		}
+		ExactValue r = exact_value_rational_from_ints(&num, &den);
+		mp_clear(&num);
+		mp_clear(&den);
+		return r;
 	}
-	return exact_value_float(f);
+	return {ExactValue_Invalid};
 }
 
 
@@ -1458,55 +1360,3 @@ gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const
 gb_internal gbString exact_value_to_string(ExactValue const &v, isize string_limit=36) {
 	return write_exact_value_to_string(gb_string_make(heap_allocator(), ""), v, string_limit);
 }
-
-// TEMPORARY(bill): exercise ExactValue_Rational arithmetic/compare/convert
-gb_internal ExactValue exact_value_rational_from_decimal(char const *lit) {
-	mp_int num, den;
-	big_rat_from_decimal_string(make_string_c(lit), &num, &den);
-	ExactValue r = exact_value_rational_from_ints(&num, &den);
-	mp_clear(&num);
-	mp_clear(&den);
-	return r;
-}
-
-gb_internal void exact_value_rational_selftest(void) {
-	int total = 0, diffs = 0;
-	#define RAT(s)          exact_value_rational_from_decimal(s)
-	#define BIN(a, op, b)   exact_binary_operator_value(op, a, b)
-	#define TOF(v)          exact_value_to_float(v).value_float
-	#define CHK(label, gotf, wantstr) do {       \
-		f64 g_ = (gotf);                     \
-		f64 w_ = strtod((wantstr), nullptr); \
-		union { f64 f; u64 u; } gg, ww;      \
-		gg.f = g_;                           \
-		ww.f = w_;                           \
-		bool ok_ = gg.u == ww.u;             \
-		total += 1;                          \
-		if (!ok_) { diffs += 1; }            \
-		gb_printf("  %-24s got=%-24.17g want=%-24.17g %s\n", label, g_, w_, ok_ ? "OK" : "DIFF"); \
-	} while (0)
-
-	CHK("0.1 + 0.2",       TOF(BIN(RAT("0.1"), Token_Add, RAT("0.2"))), "0.3");
-	CHK("1.0 / 16.0",      TOF(BIN(RAT("1.0"), Token_Quo, RAT("16.0"))), "0.0625");
-	CHK("3.0 / 2.0",       TOF(BIN(RAT("3.0"), Token_Quo, RAT("2.0"))), "1.5");
-	CHK("2/3 + 1/3",       TOF(BIN(BIN(RAT("2.0"), Token_Quo, RAT("3.0")), Token_Add, BIN(RAT("1.0"), Token_Quo, RAT("3.0")))), "1.0");
-	CHK("0.3 - 0.2 - 0.1", TOF(BIN(BIN(RAT("0.3"), Token_Sub, RAT("0.2")), Token_Sub, RAT("0.1"))), "0.0");
-
-	// mixed integer + rational (exercises match_exact_values Integer -> Rational)
-	{
-		ExactValue one = exact_value_i64(1);
-		CHK("1 + 0.5 (int+rat)", TOF(BIN(one, Token_Add, RAT("0.5"))), "1.5");
-	}
-	// comparison folding: (0.1 + 0.2) == 0.3 is exactly true with rationals
-	{
-		bool eq = compare_exact_values(Token_CmpEq, BIN(RAT("0.1"), Token_Add, RAT("0.2")), RAT("0.3"));
-		total += 1; if (!eq) diffs += 1;
-		gb_printf("  %-24s got=%-5s              %s\n", "(0.1+0.2) == 0.3", eq ? "true" : "false", eq ? "OK" : "DIFF");
-	}
-
-	#undef RAT
-	#undef BIN
-	#undef TOF
-	#undef CHK
-	gb_printf("exact_value_rational_selftest: %d/%d ok (%d diffs)\n", total-diffs, total, diffs);
-}
diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index 2f3a5d3e9..f86678727 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -1323,6 +1323,10 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 			res.value = lb_big_int_to_llvm(m, original_type, &value.value_integer);
 		}
 		return res;
+	case ExactValue_Rational:
+		// Round the exact rational to the target float once, then emit as a float constant.
+		value = exact_value_to_float(value);
+		/*fallthrough*/
 	case ExactValue_Float:
 		if (is_type_different_to_arch_endianness(type)) {
 			if (type->Basic.kind == Basic_f32le || type->Basic.kind == Basic_f32be) {
diff --git a/src/main.cpp b/src/main.cpp
index 0bf759573..34b69894e 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -937,7 +937,7 @@ gb_internal bool parse_build_flags(Array<String> args) {
 							}
 							break;
 						case BuildFlagParam_Float:
-							if (value.kind != ExactValue_Float) {
+							if (value.kind != ExactValue_Float && value.kind != ExactValue_Rational) {
 								gb_printf_err("%.*s expected a floating pointer number, got %.*s\n", LIT(name), LIT(param));
 								bad_flags = true;
 								ok = false;
@@ -3860,12 +3860,6 @@ int main(int arg_count, char const **arg_ptr) {
 	init_keyword_hash_table();
 	init_terminal();
 
-	// TEMPORARY(bill): validate the exact-rational core in-tree.
-	if (gb_get_env("ODIN_BIGRAT_SELFTEST", heap_allocator()) != nullptr) {
-		exact_value_rational_selftest();
-		return 0;
-	}
-
 	if (!check_env()) {
 		return 1;
 	}

From a910a0794d7055cf9f221755f3ca4a1337e28873 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 14:39:15 +0100
Subject: [PATCH 042/215] Add test_number_literals.odin

---
 tests/internal/test_number_literals.odin | 58 ++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 tests/internal/test_number_literals.odin

diff --git a/tests/internal/test_number_literals.odin b/tests/internal/test_number_literals.odin
new file mode 100644
index 000000000..98f221933
--- /dev/null
+++ b/tests/internal/test_number_literals.odin
@@ -0,0 +1,58 @@
+package test_internal
+
+import "core:testing"
+
+// Regression tests for numeric literal parsing and constant folding:
+//   * an integer literal with a large exponent (e.g. `98765e309`) is an exact arbitrary-precision
+//     integer rather than being rejected,
+//   * a decimal literal that overflows `f64` (e.g. `98765.0e309`) keeps that exact integer value so
+//     it is not silently turned into `+Inf`,
+//   * an ordinary finite decimal literal still behaves as a floating-point value, so float constant
+//     arithmetic like `1.0 / 16.0` folds to `0.0625` and never to integer division.
+
+@(test)
+float_literal_arithmetic :: proc(t: ^testing.T) {
+	// Trailing-dot and `.0` decimal literals must divide as floats, not integers. These are all
+	// constant expressions, so they exercise the compiler's constant folding.
+	testing.expect_value(t, 1.0/16.0,  0.0625)
+	testing.expect_value(t, 1./16.,    0.0625)
+	testing.expect_value(t, 1/16.,     0.0625)
+	testing.expect_value(t, 3./2.,     1.5)
+	testing.expect_value(t, 1.0e2,     100.0)
+	testing.expect_value(t, 2.5 + 0.5, 3.0)
+
+	// With exact-rational constant folding, `0.1 + 0.2` folds to exactly 0.3 (Go-style: the untyped
+	// float constants are exact until rounded once to the target type). The same expression evaluated
+	// at runtime on f64 variables still exhibits the usual binary floating-point rounding.
+	testing.expect(t, 0.1 + 0.2 == 0.3, "exact constant folding: 0.1 + 0.2 == 0.3")
+	{
+		ra, rb := 0.1, 0.2
+		testing.expect(t, ra + rb != 0.3, "runtime f64 arithmetic still rounds")
+	}
+
+	// Runtime values exercise the backend division path as well.
+	a := 1.
+	b := 16.
+	testing.expect_value(t, a/b, 0.0625)
+
+	// Signed zero must survive (a `0.0` literal is a float, not an integer `0`).
+	nz := -0.0
+	testing.expect_value(t, transmute(u64)nz, 0x8000_0000_0000_0000)
+}
+
+@(test)
+large_integer_literals :: proc(t: ^testing.T) {
+	// A large exponent denotes an exact big integer, and the three spellings of the same number all
+	// fold to the same value (previously `98765e309` was an "Invalid integer literal").
+	#assert(98765e309 == 987650e308)
+	#assert(98765.0e309 == 98765e309)
+	#assert(1e38 / 1e19 == 1e19) // exact, well beyond the range of any integer type
+
+	// Large but representable values still behave as ordinary `f64` constants.
+	testing.expect_value(t, f64(1e300), 1e300)
+	testing.expect(t, 1e308 > 1e307, "ordering of large f64 constants")
+
+	// A large-exponent integer literal that fits a wide integer type is exact.
+	testing.expect(t, u128(1e38) > u128(1e37), "1e38 > 1e37 as u128")
+	testing.expect_value(t, u128(1e38) / u128(1e19), u128(1e19))
+}

From 19f7b5e2e2760f45592d735090bdad78d5d5eefa Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 14:53:28 +0100
Subject: [PATCH 043/215] Add f16/f32 precision checks; Fix macOS `MSIZE` macro
 collision

---
 src/big_rat.cpp                          | 49 +++++++++++++++---------
 src/check_expr.cpp                       | 29 ++++++++++++--
 tests/internal/test_number_literals.odin | 37 ++++++++++++++++++
 3 files changed, 93 insertions(+), 22 deletions(-)

diff --git a/src/big_rat.cpp b/src/big_rat.cpp
index 8f4383a72..0acf64d70 100644
--- a/src/big_rat.cpp
+++ b/src/big_rat.cpp
@@ -1,11 +1,8 @@
-// An exact rational value: num/den with den > 0, kept in lowest terms.
 struct BigRat {
 	mp_int num; // signed
 	mp_int den; // > 0
 };
 
-// Guards against a tiny literal requesting an enormous 10^N (e.g. `1.0e999999999`). Far beyond any
-// representable float (f64 range is ~1e+-324); a literal past this is rejected as malformed.
 i64 const BIG_RAT_MAX_DECIMAL_EXP = 65536;
 
 // Reduce num/den to lowest terms with den > 0 (0 becomes 0/1).
@@ -112,14 +109,18 @@ gb_internal bool big_rat_from_decimal_string(String const &s, mp_int *num, mp_in
 	return true;
 }
 
-// Convert the exact rational `a/b` (b != 0) to the nearest f64 (round-to-nearest, ties-to-even).
+// Convert the exact rational `a/b` (b != 0) to the nearest value of a target IEEE-754 binary float,
+// with round-to-nearest, ties-to-even. `mantissa_bits`/`ebias` select the target format:
+//   f16: 10 / 15,  f32: 23 / 127,  f64: 52 / 1023.
+// The result is returned as an f64 that exactly equals that target value (target subnormals and
+// overflow-to-infinity included), so it can be stored in an f64 and re-emitted losslessly.
 // NOTE(bill): Ported from core:math/big `internal_rat_to_float`.
-gb_internal f64 big_rat_to_f64(mp_int const *a_in, mp_int const *b_in) {
-	int const MSIZE  = 52;         // explicit mantissa bits
-	int const MSIZE1 = MSIZE + 1;  // 53, incl. the implicit bit
-	int const MSIZE2 = MSIZE + 2;  // 54, one guard bit
-	int const EBIAS  = 1023;
-	int const EMIN   = 1 - EBIAS;  // -1022
+gb_internal f64 big_rat_to_float(mp_int const *a_in, mp_int const *b_in, int mantissa_bits, int ebias) {
+	// NOTE: lowercase locals on purpose: `MSIZE` is a system macro on some platforms (arm/param.h).
+	int const msize  = mantissa_bits; // explicit mantissa bits
+	int const msize1 = msize + 1;     // incl. the implicit bit
+	int const msize2 = msize + 2;     // one guard bit
+	int const emin   = 1 - ebias;
 
 	int alen = mp_count_bits(a_in);
 	if (alen == 0) {
@@ -135,7 +136,7 @@ gb_internal f64 big_rat_to_f64(mp_int const *a_in, mp_int const *b_in) {
 	mp_abs(a_in, &a2);
 	mp_abs(b_in, &b2);
 
-	int shift = MSIZE2 - exp;
+	int shift = msize2 - exp;
 	if (shift > 0) {
 		mp_mul_2d(&a2, shift, &a2);
 	} else if (shift < 0) {
@@ -146,26 +147,26 @@ gb_internal f64 big_rat_to_f64(mp_int const *a_in, mp_int const *b_in) {
 	bool has_rem = !mp_iszero(&r);
 	u64 mantissa = mp_get_mag_u64(&q);
 
-	if ((mantissa >> MSIZE2) == 1) {
+	if ((mantissa >> msize2) == 1) {
 		if (mantissa & 1) has_rem = true;
 		mantissa >>= 1;
 		exp += 1;
 	}
-	// mantissa is now in [2^53, 2^54): 53 significant bits plus one guard bit.
+	// mantissa is now in [2^msize1, 2^msize2): msize1 significant bits plus one guard bit.
 
-	if (EMIN - MSIZE <= exp && exp <= EMIN) {
+	if (emin - msize <= exp && exp <= emin) {
 		// Denormalise: fold the bits that fall below the subnormal grid into the guard/sticky.
-		unsigned sh = cast(unsigned)(EMIN - (exp - 1));
+		unsigned sh = cast(unsigned)(emin - (exp - 1));
 		u64 lost = mantissa & ((cast(u64)1 << sh) - 1);
 		has_rem = has_rem || (lost != 0);
 		mantissa >>= sh;
-		exp = 2 - EBIAS;
+		exp = 2 - ebias;
 	}
 
 	if (mantissa & 1) {
 		if (has_rem || (mantissa & 2)) { // round half to even
 			mantissa += 1;
-			if (mantissa >= (cast(u64)1 << MSIZE2)) {
+			if (mantissa >= (cast(u64)1 << msize2)) {
 				mantissa >>= 1;
 				exp += 1;
 			}
@@ -173,9 +174,21 @@ gb_internal f64 big_rat_to_f64(mp_int const *a_in, mp_int const *b_in) {
 	}
 	mantissa >>= 1; // drop the guard bit
 
-	f64 f = ldexp(cast(f64)mantissa, exp - MSIZE1);
+	f64 f = ldexp(cast(f64)mantissa, exp - msize1);
+	// Materialise the target format's overflow-to-infinity (exact otherwise: `f` already has the
+	// target's mantissa width and exponent, so the narrowing cast does not round).
+	if (msize == 23) {
+		f = cast(f64)cast(f32)f;
+	} else if (msize == 10) {
+		f = cast(f64)f16_to_f32(f32_to_f16(cast(f32)f));
+	}
 	if (has_sign) {
 		f = -f;
 	}
 	return f;
+}
+
+// Convert the exact rational `a/b` (b != 0) to the nearest f64 (round-to-nearest, ties-to-even).
+gb_internal f64 big_rat_to_f64(mp_int const *a_in, mp_int const *b_in) {
+	return big_rat_to_float(a_in, b_in, 52, 1023);
 }
\ No newline at end of file
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 45f5c504a..8c75dd8c0 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -2511,11 +2511,32 @@ gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue i
 		default: GB_PANIC("Compiler error: Unknown integer type!"); break;
 		}
 	} else if (is_type_float(type)) {
-		ExactValue v = exact_value_to_float(in_value);
-		if (v.kind != ExactValue_Float) {
-			return false;
+		ExactValue v;
+		if (in_value.kind == ExactValue_Rational) {
+			// Round the exact rational directly to the target format (single rounding, ties-to-even),
+			// rather than rational -> f64 -> f16/f32 which would round twice.
+
+
+			int mantissa_bits = 52;
+			int ebias         = 1023;
+			switch (type->Basic.kind) {
+			case Basic_f16: case Basic_f16le: case Basic_f16be:
+				mantissa_bits = 10;
+				ebias         = 15;
+				break;
+			case Basic_f32: case Basic_f32le: case Basic_f32be:
+				mantissa_bits = 23;
+				ebias         = 127;
+				break;
+			}
+			v = exact_value_float(big_rat_to_float(&in_value.value_rational->num, &in_value.value_rational->den, mantissa_bits, ebias));
+		} else {
+			v = exact_value_to_float(in_value);
+			if (v.kind != ExactValue_Float) {
+				return false;
+			}
+			check_update_float_precision(&v, type);
 		}
-		check_update_float_precision(&v, type);
 
 		// An exact finite constant (integer or rational) that overflows the target float's range is not
 		// representable by it; without this it would silently become +/-Inf (e.g. `x: f64 = 1.0e400`).
diff --git a/tests/internal/test_number_literals.odin b/tests/internal/test_number_literals.odin
index 98f221933..415b4227f 100644
--- a/tests/internal/test_number_literals.odin
+++ b/tests/internal/test_number_literals.odin
@@ -1,6 +1,7 @@
 package test_internal
 
 import "core:testing"
+import "core:strconv"
 
 // Regression tests for numeric literal parsing and constant folding:
 //   * an integer literal with a large exponent (e.g. `98765e309`) is an exact arbitrary-precision
@@ -56,3 +57,39 @@ large_integer_literals :: proc(t: ^testing.T) {
 	testing.expect(t, u128(1e38) > u128(1e37), "1e38 > 1e37 as u128")
 	testing.expect_value(t, u128(1e38) / u128(1e19), u128(1e19))
 }
+
+@(test)
+float_literal_f16_f32_precision :: proc(t: ^testing.T) {
+	// f16/f32 constants are rounded once, directly from the exact value, so a constant-folded literal
+	// matches the correctly-rounded runtime parse (rather than double-rounding via f64).
+	c32 :: proc(t: ^testing.T, got: f32, lit: string) {
+		want, _ := strconv.parse_f32(lit)
+		testing.expectf(t, transmute(u32)got == transmute(u32)want,
+			"f32 %s: got %08x, want %08x", lit, transmute(u32)got, transmute(u32)want)
+	}
+	c32(t, 0.1, "0.1")
+	c32(t, 0.2, "0.2")
+	c32(t, 0.3, "0.3")
+	c32(t, f32(1.0/3.0), "0.3333333333333333")
+	c32(t, 3.14159265358979323846, "3.14159265358979323846")
+	c32(t, 1.1, "1.1")
+	c32(t, 1e-40, "1e-40")   // subnormal f32
+	c32(t, 1.5e-45, "1.5e-45")
+	c32(t, 8388609.0, "8388609.0") // 2^23 + 1
+
+	// f16 spot checks against an f64-parsed reference (53 bits is exact relative to f16's 11).
+	c16 :: proc(t: ^testing.T, got: f16, lit: string) {
+		w64, _ := strconv.parse_f64(lit)
+		want := f16(w64)
+		testing.expectf(t, transmute(u16)got == transmute(u16)want,
+			"f16 %s: got %04x, want %04x", lit, transmute(u16)got, transmute(u16)want)
+	}
+	c16(t, 0.1, "0.1")
+	c16(t, f16(1.0/3.0), "0.3333333333333333")
+	c16(t, 3.14159265358979323846, "3.14159265358979323846")
+	c16(t, 6e-8, "6e-8") // subnormal f16
+
+	// f16/f32 overflow of an exact constant is rejected, not silently +Inf (compile-time #assert
+	// can't test a reject, but these confirm large finite values still fold correctly).
+	testing.expect_value(t, f32(1e38), strconv.parse_f32("1e38") or_else 0)
+}

From da7371404e36f104d059c2e66bf4fe7603867ea2 Mon Sep 17 00:00:00 2001
From: Jeroen van Rijn <Kelimion@users.noreply.github.com>
Date: Tue, 29 Sep 2026 06:54:42 -0700
Subject: [PATCH 044/215] Improve `bit_array` (#7665)

Fix `index: uint` -> `index: int`, examples.
Add `create_from_enum` helper.
---
 core/container/bit_array/bit_array.odin | 140 +++++++++++++++---------
 core/container/bit_array/doc.odin       |  35 +++---
 2 files changed, 105 insertions(+), 70 deletions(-)

diff --git a/core/container/bit_array/bit_array.odin b/core/container/bit_array/bit_array.odin
index 7d74d9ba7..8ff569319 100644
--- a/core/container/bit_array/bit_array.odin
+++ b/core/container/bit_array/bit_array.odin
@@ -3,9 +3,7 @@ package container_dynamic_bit_array
 import "base:builtin"
 import "base:intrinsics"
 
-/*
-	Note that these constants are dependent on the backing being a u64.
-*/
+// Note that these constants are dependent on the backing being a u64.
 @(private="file")
 INDEX_SHIFT :: 6
 
@@ -27,27 +25,29 @@ Bit_Array_Iterator :: struct {
 	word_idx: int,
 	bit_idx:  uint,
 }
+
 /*
-Wraps a `Bit_Array` into an Iterator
+Wraps a `Bit_Array` into an `Bit_Array_Iterator`.
 
 Inputs:
-- ba: Pointer to the Bit_Array
+- ba: Pointer to the `Bit_Array`
 
 Returns:
-- it: Iterator struct
+- it: `Bit_Array_Iterator`
 */
 make_iterator :: proc (ba: ^Bit_Array) -> (it: Bit_Array_Iterator) {
 	return Bit_Array_Iterator { array = ba }
 }
+
 /*
-Returns the next bit, including its set-state. ok=false once exhausted
+Returns the next bit, including its set-state. ok=false once exhausted.
 
 Inputs:
 - it: The iterator that holds the state.
 
 Returns:
 - set: `true` if the bit at `index` is set.
-- index: The next bit of the Bit_Array referenced by `it`.
+- index: The next bit of the `Bit_Array` referenced by `it`.
 - ok: `true` if the iterator can continue, `false` if the iterator is done
 */
 iterate_by_all :: proc (it: ^Bit_Array_Iterator) -> (set: bool, index: int, ok: bool) {
@@ -65,34 +65,37 @@ iterate_by_all :: proc (it: ^Bit_Array_Iterator) -> (set: bool, index: int, ok:
 
 	return set, index, true
 }
+
 /*
-Returns the next Set Bit, for example if `0b1010`, then the iterator will return index={1, 3} over two calls.
+Returns the next *set* bit, for example if `0b1010`, then the iterator will return index={1, 3} over two calls.
 
 Inputs:
 - it: The iterator that holds the state.
 
 Returns:
-- index: The next *set* bit of the Bit_Array referenced by `it`.
+- index: The next *set* bit of the `Bit_Array` referenced by `it`.
 - ok: `true` if the iterator can continue, `false` if the iterator is done
 */
 iterate_by_set :: proc (it: ^Bit_Array_Iterator) -> (index: int, ok: bool) {
-	return iterate_internal_(it, true)
+	return iterate_internal(it, true)
 }
+
 /*
-Returns the next Unset Bit, for example if `0b1010`, then the iterator will return index={0, 2} over two calls.
+Returns the next *unset* bit, for example if `0b1010`, then the iterator will return index={0, 2} over two calls.
 
 Inputs:
 - it: The iterator that holds the state.
 
 Returns:
-- index: The next *unset* bit of the Bit_Array referenced by `it`.
+- index: The next *unset* bit of the `Bit_Array` referenced by `it`.
 - ok: `true` if the iterator can continue, `false` if the iterator is done
 */
 iterate_by_unset:: proc (it: ^Bit_Array_Iterator) -> (index: int, ok: bool) {
-	return iterate_internal_(it, false)
+	return iterate_internal(it, false)
 }
+
 /*
-Iterates through set/unset bits
+Iterates through set/unset bits.
 
 *Private*
 
@@ -101,11 +104,11 @@ Inputs:
 - ITERATE_SET_BITS: `true` for returning only set bits, false for returning only unset bits
 
 Returns:
-- index: The next *unset* bit of the Bit_Array referenced by `it`.
+- index: The next *unset* bit of the `Bit_Array` referenced by `it`.
 - ok: `true` if the iterator can continue, `false` if the iterator is done
 */
 @(private="file")
-iterate_internal_ :: proc (it: ^Bit_Array_Iterator, $ITERATE_SET_BITS: bool) -> (index: int, ok: bool) {
+iterate_internal :: proc (it: ^Bit_Array_Iterator, $ITERATE_SET_BITS: bool) -> (index: int, ok: bool) {
 	word := it.array.bits[it.word_idx] if builtin.len(it.array.bits) > it.word_idx else 0
 	when ! ITERATE_SET_BITS { word = ~word }
 
@@ -137,19 +140,20 @@ iterate_internal_ :: proc (it: ^Bit_Array_Iterator, $ITERATE_SET_BITS: bool) ->
 	}
 	return index, index < it.array.length + it.array.bias
 }
+
 /*
-Gets the state of a bit in the bit-array
+Gets the state of a bit in the `Bit_Array`.
 
 Inputs:
-- ba: Pointer to the Bit_Array
+- ba: Pointer to the `Bit_Array`
 - index: Which bit in the array
 
 Returns:
 - res: `true` if the bit at `index` is set.
 - ok: Whether the index was valid. Returns `false` if the index is smaller than the bias.
 */
-get :: proc(ba: ^Bit_Array, #any_int index: uint) -> (res: bool, ok: bool) #optional_ok {
-	idx := int(index) - ba.bias
+get :: proc(ba: ^Bit_Array, #any_int index: int) -> (res: bool, ok: bool) #optional_ok {
+	idx := index - ba.bias
 
 	if ba == nil || int(index) < ba.bias { return false, false }
 
@@ -167,28 +171,30 @@ get :: proc(ba: ^Bit_Array, #any_int index: uint) -> (res: bool, ok: bool) #opti
 
 	return res, true
 }
+
 /*
-Gets the state of a bit in the bit-array
+Gets the state of a bit in the `Bit_Array`.
 
 *Bypasses all Checks*
 
 Inputs:
-- ba: Pointer to the Bit_Array
+- ba: Pointer to the `Bit_Array`
 - index: Which bit in the array
 
 Returns:
 - `true` if bit is set
 */
-unsafe_get :: #force_inline proc(ba: ^Bit_Array, #any_int index: uint) -> bool #no_bounds_check {
-	return bool((ba.bits[index >> INDEX_SHIFT] >> uint(index & INDEX_MASK)) & 1)
+unsafe_get :: #force_inline proc(ba: ^Bit_Array, #any_int index: int) -> bool #no_bounds_check {
+	return bool((ba.bits[index >> INDEX_SHIFT] >> (uint(index) & INDEX_MASK)) & 1)
 }
+
 /*
-Sets the state of a bit in the bit-array
+Sets the state of a bit in the `Bit_Array`.
 
 *Conditionally Allocates (Resizes backing data when `index > len(ba.bits)`)*
 
 Inputs:
-- ba: Pointer to the Bit_Array
+- ba: Pointer to the `Bit_Array`
 - index: Which bit in the array
 - set_to: `true` sets the bit on, `false` to turn it off
 - allocator: (default is context.allocator)
@@ -196,9 +202,9 @@ Inputs:
 Returns:
 - ok: Whether the set was successful, `false` on allocation failure or bad index
 */
-set :: proc(ba: ^Bit_Array, #any_int index: uint, set_to: bool = true, allocator := context.allocator) -> (ok: bool) {
+set :: proc(ba: ^Bit_Array, #any_int index: int, set_to: bool = true, allocator := context.allocator) -> (ok: bool) {
 
-	idx := int(index) - ba.bias
+	idx := index - ba.bias
 
 	if ba == nil || int(index) < ba.bias { return false }
 	context.allocator = allocator
@@ -218,41 +224,44 @@ set :: proc(ba: ^Bit_Array, #any_int index: uint, set_to: bool = true, allocator
 
 	return true
 }
+
 /*
-Sets the state of a bit in the bit-array
+Sets the state of a bit in the `Bit_Array`.
 
 *Bypasses all checks*
 
 Inputs:
-- ba: Pointer to the Bit_Array
+- ba: Pointer to the `Bit_Array`
 - index: Which bit in the array
 */
 unsafe_set :: proc(ba: ^Bit_Array, bit: int) #no_bounds_check {
 	ba.bits[bit >> INDEX_SHIFT] |= 1 << uint(bit & INDEX_MASK)
 }
+
 /*
-Unsets the state of a bit in the bit-array. (Convienence wrapper for `set`)
+Unsets the state of a bit in the `Bit_Array`. (Convienence wrapper for `set`)
 
 *Conditionally Allocates (Resizes backing data when `index > len(ba.bits)`)*
 
 Inputs:
-- ba: Pointer to the Bit_Array
+- ba: Pointer to the `Bit_Array`
 - index: Which bit in the array
 - allocator: (default is context.allocator)
 
 Returns:
 - ok: Whether the unset was successful, `false` on allocation failure or bad index
 */
-unset :: #force_inline proc(ba: ^Bit_Array, #any_int index: uint, allocator := context.allocator) -> (ok: bool) {
+unset :: #force_inline proc(ba: ^Bit_Array, #any_int index: int, allocator := context.allocator) -> (ok: bool) {
 	return set(ba, index, false, allocator)
 }
-/*
-Unsets the state of a bit in the bit-array
 
-*Bypasses all Checks*
+/*
+Unsets the state of a bit in the `Bit_Array`.
+
+*Bypasses all checks*
 
 Inputs:
-- ba: Pointer to the Bit_Array
+- ba: Pointer to the `Bit_Array`
 - index: Which bit in the array
 */
 unsafe_unset :: proc(b: ^Bit_Array, bit: int) #no_bounds_check {
@@ -260,7 +269,7 @@ unsafe_unset :: proc(b: ^Bit_Array, bit: int) #no_bounds_check {
 }
 
 /*
-A helper function to create a Bit Array with optional bias, in case your smallest index is non-zero (including negative).
+A helper function to create a `Bit_Array` with optional bias, in case your smallest index is non-zero (including negative).
 
 The range of bits created by this procedure is `min_index..<max_index`, and the
 array will be able to expand beyond `max_index` if needed.
@@ -273,10 +282,11 @@ Inputs:
 - allocator: (default is context.allocator)
 
 Returns:
-- ba: Allocates a bit_Array, backing data is set to `max-min / 64` indices, rounded up (eg 65 - 0 allocates for [2]u64).
+- ba: Allocates a `Bit_Array`, backing data is set to `max-min / 64` indices, rounded up (eg 65 - 0 allocates for [2]u64).
 */
-create :: proc(max_index: int, min_index: int = 0, allocator := context.allocator) -> (res: ^Bit_Array, ok: bool) #optional_ok {
+create :: proc(max_index: int, min_index: int = 0, allocator := context.allocator, loc := #caller_location) -> (res: ^Bit_Array, ok: bool) #optional_ok {
 	size_in_bits := max_index - min_index
+	assert(max_index >= min_index, loc=loc)
 
 	if size_in_bits < 0 { return {}, false }
 
@@ -290,7 +300,27 @@ create :: proc(max_index: int, min_index: int = 0, allocator := context.allocato
 }
 
 /*
-A helper function to initialize a Bit Array with optional bias, in case your smallest index is non-zero (including negative).
+A helper function to create a `Bit_Array` from an enum `E`.
+
+The range of bits created by this procedure is `min(E)..<max(E)`, and the
+array will be able to expand beyond `max(E)` if needed.
+
+*Allocates (`new(Bit_Array) & make(ba.bits)`)*
+
+Inputs:
+- e: an `enum`
+- min_index: minimum starting index (used as a bias)
+- allocator: (default is context.allocator)
+
+Returns:
+- ba: Allocates a `Bit_Array`, backing data is set to `max-min / 64` indices, rounded up (eg 65 - 0 allocates for [2]u64).
+*/
+create_from_enum :: proc($T: typeid, allocator := context.allocator) -> (res: ^Bit_Array, ok: bool) where intrinsics.type_is_enum(T) #optional_ok {
+	return create(int(max(T)), int(min(T)), allocator)
+}
+
+/*
+A helper function to initialize a `Bit_Array` with optional bias, in case your smallest index is non-zero (including negative).
 
 The range of bits created by this procedure is `min_index..<max_index`, and the
 array will be able to expand beyond `max_index` if needed.
@@ -321,20 +351,21 @@ init :: proc(res: ^Bit_Array, max_index: int, min_index: int = 0, allocator := c
 }
 
 /*
-Sets all values in the Bit_Array to zero.
+Sets all values in the `Bit_Array` to zero.
 
 Inputs:
-- ba: The target Bit_Array
+- ba: The target `Bit_Array`
 */
 clear :: proc(ba: ^Bit_Array) {
 	if ba == nil { return }
 	intrinsics.mem_zero(raw_data(ba.bits), builtin.len(ba.bits) * NUM_BITS / 8)
 }
+
 /*
-Gets the length of set and unset valid bits in the Bit_Array.
+Gets the length of set and unset valid bits in the `Bit_Array`.
 
 Inputs:
-- ba: The target Bit_Array
+- ba: The target `Bit_Array`
 
 Returns:
 - length: The length of valid bits.
@@ -343,11 +374,12 @@ len :: proc(ba: ^Bit_Array) -> (length: int) {
 	if ba == nil { return }
 	return ba.length
 }
+
 /*
-Shrinks the Bit_Array's backing storage to the smallest possible size.
+Shrinks the `Bit_Array`'s backing storage to the smallest possible size.
 
 Inputs:
-- ba: The target Bit_Array
+- ba: The target `Bit_Array`
 */
 shrink :: proc(ba: ^Bit_Array) #no_bounds_check {
 	if ba == nil { return }
@@ -372,22 +404,24 @@ shrink :: proc(ba: ^Bit_Array) #no_bounds_check {
 	resize(&ba.bits, legs_needed)
 	builtin.shrink(&ba.bits)
 }
+
 /*
-Deallocates the Bit_Array and its backing storage
+Deallocates the `Bit_Array` and its backing storage
 
 Inputs:
-- ba: The target Bit_Array
+- ba: The target `Bit_Array`
 */
 destroy :: proc(ba: ^Bit_Array) {
 	if ba == nil { return }
 	delete(ba.bits)
-	if ba.free_pointer { // Only free if this Bit_Array was created using `create`, not when on the stack.
+	if ba.free_pointer { // Only free if this `Bit_Array` was created using `create`, not when on the stack.
 		free(ba)
 	}
 }
+
 /*
-	Resizes the Bit Array. For internal use. Provisions needed capacity+1
-	If you want to reserve the memory for a given-sized Bit Array up front, you can use `create`.
+	Resizes the `Bit_Array`. For internal use. Provisions needed capacity+1
+	If you want to reserve the memory for a given-sized `Bit_Array` up front, you can use `create`.
 */
 @(private="file")
 resize_if_needed :: proc(ba: ^Bit_Array, legs: int, allocator := context.allocator) -> (ok: bool) {
diff --git a/core/container/bit_array/doc.odin b/core/container/bit_array/doc.odin
index e86059ecd..de7ba22a4 100644
--- a/core/container/bit_array/doc.odin
+++ b/core/container/bit_array/doc.odin
@@ -8,20 +8,18 @@ Example:
 	package test
 
 	import "core:fmt"
-	import "core:container/bit_array"
+	import ba "core:container/bit_array"
 
 	main :: proc() {
-		using bit_array
-
-		bits: Bit_Array
+		bits: ba.Bit_Array
 
 		// returns `true`
-		fmt.println(set(&bits, 42))
+		fmt.println(ba.set(&bits, 42))
 
 		// returns `false`, `false`, because this Bit Array wasn't created to allow negative indices.
-		was_set, was_retrieved := get(&bits, -1)
+		was_set, was_retrieved := ba.get(&bits, -1)
 		fmt.println(was_set, was_retrieved)
-		destroy(&bits)
+		ba.destroy(&bits)
 	}
 
 A `Bit_Array` can optionally allow for negative indices, if the minimum value was given during creation.
@@ -29,7 +27,7 @@ Example:
 	package test
 
 	import "core:fmt"
-	import "core:container/bit_array"
+	import ba "core:container/bit_array"
 
 	main :: proc() {
 		Foo :: enum int {
@@ -38,17 +36,20 @@ Example:
 			Leaves        = 69105,
 		}
 
-		using bit_array
+		bits := ba.create_from_enum(Foo)
+		defer ba.destroy(bits)
 
-		bits := create(int(max(Foo)), int(min(Foo)))
-		defer destroy(bits)
+		assert(bits.bias   == int(Foo.Negative_Test))
+		assert(bits.length == abs(int(min(Foo))) + int(max(Foo)))
 
-		fmt.printf("Set(Bar):           %v\n",     set(bits, Foo.Bar))
-		fmt.printf("Get(Bar):           %v, %v\n", get(bits, Foo.Bar))
-		fmt.printf("Set(Negative_Test): %v\n",     set(bits, Foo.Negative_Test))
-		fmt.printf("Get(Leaves):        %v, %v\n", get(bits, Foo.Leaves))
-		fmt.printf("Get(Negative_Test): %v, %v\n", get(bits, Foo.Negative_Test))
-		fmt.printf("Freed.\n")
+		fmt.printfln("Set(Bar):             %v", ba.set(bits, Foo.Bar))
+		fmt.printfln("Get(Bar):             %v", ba.get(bits, Foo.Bar))
+		fmt.printfln("Set(Negative_Test):   %v", ba.set(bits, Foo.Negative_Test))
+		fmt.printfln("Get(Leaves):          %v", ba.get(bits, Foo.Leaves))
+		fmt.printfln("Get(Leaves):          %v", ba.unsafe_get(bits, Foo.Leaves))
+		fmt.printfln("Get(Negative_Test):   %v", ba.get(bits, Foo.Negative_Test))
+		fmt.printfln("Unset(Negative_Test): %v", ba.unset(bits, Foo.Negative_Test))
+		assert(ba.get(bits, Foo.Negative_Test) == false)
 	}
 */
 package container_dynamic_bit_array
\ No newline at end of file

From 29b681b43d3fc3e79c07be1008cedee2a93a9176 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 15:21:00 +0100
Subject: [PATCH 045/215] Handle more cases where `ExactValue_Float` was being
 handled but not for `ExactValue_Rational`

---
 src/check_builtin.cpp |  7 +++++++
 src/check_expr.cpp    |  5 +++++
 src/checker.cpp       |  1 +
 src/exact_value.cpp   | 10 +++++++++-
 4 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 9a3013e8e..92ee2299f 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -4594,6 +4594,13 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 				operand->value.value_float = bit_cast<f64>(abs);
 				break;
 			}
+			case ExactValue_Rational: {
+				mp_int n; mp_init(&n);
+				defer (mp_clear(&n));
+				mp_abs(&operand->value.value_rational->num, &n);
+				operand->value = exact_value_rational_from_ints(&n, &operand->value.value_rational->den);
+				break;
+			}
 			case ExactValue_Complex: {
 				f64 r = operand->value.value_complex->real;
 				f64 i = operand->value.value_complex->imag;
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 8c75dd8c0..9de4d8859 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -4873,6 +4873,11 @@ gb_internal void check_binary_expr(CheckerContext *c, Operand *x, Ast *node, Typ
 					fail = true;
 				}
 				break;
+			case ExactValue_Rational:
+				if (big_int_is_zero(&y->value.value_rational->num)) {
+					fail = true;
+				}
+				break;
 			}
 
 			if (fail) {
diff --git a/src/checker.cpp b/src/checker.cpp
index fa65098a8..59f1c9c25 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -1480,6 +1480,7 @@ gb_internal void init_universal(void) {
 			type = t_untyped_integer;
 			break;
 		case ExactValue_Float:
+		case ExactValue_Rational:
 			type = t_untyped_float;
 			break;
 		}
diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index 60126a401..1cd282c2a 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -502,7 +502,7 @@ gb_internal ExactValue exact_value_to_integer(ExactValue v) {
 		return exact_value_i64(cast(i64)cast(intptr)v.value_pointer);
 
 	case ExactValue_Rational:
-		// Only an exact integer (den == 1 after reduction) converts to an integer.
+		// NOTE(bill): Only an exact integer (den == 1 after reduction) converts to an integer
 		if (mp_cmp_d(&v.value_rational->den, 1) == MP_EQ) {
 			ExactValue r = {ExactValue_Integer};
 			r.value_integer = {0};
@@ -1339,6 +1339,14 @@ gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const
 	case ExactValue_Float:
 		return gb_string_append_fmt(str, "%.17g", v.value_float);
 	case ExactValue_Rational:
+		// Integer-valued (den == 1, e.g. an overflowing literal like `1.0e400`) prints its exact decimal,
+		// so a diagnostic shows the real magnitude rather than an f64 that has rounded to +Inf.
+		if (mp_cmp_d(&v.value_rational->den, 1) == MP_EQ) {
+			String s = big_int_to_string(heap_allocator(), &v.value_rational->num);
+			str = gb_string_append_length(str, s.text, s.len);
+			gb_free(heap_allocator(), s.text);
+			return str;
+		}
 		return gb_string_append_fmt(str, "%.17g", big_rat_to_f64(&v.value_rational->num, &v.value_rational->den));
 	case ExactValue_Complex:
 		return gb_string_append_fmt(str, "%.17g+%.17gi", v.value_complex->real, v.value_complex->imag);

From 41d3f37fba762498bc6af8a02b58e79c44b37c0a Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Tue, 29 Sep 2026 10:21:08 -0400
Subject: [PATCH 046/215] Fix #5318: procedures passed to `$` parameters share
 an instantiation's name

---
 src/name_canonicalization.cpp     | 16 ++++++++++++++
 tests/issues/run.bat              |  1 +
 tests/issues/run.sh               |  1 +
 tests/issues/test_issue_5318.odin | 35 +++++++++++++++++++++++++++++++
 4 files changed, 53 insertions(+)
 create mode 100644 tests/issues/test_issue_5318.odin

diff --git a/src/name_canonicalization.cpp b/src/name_canonicalization.cpp
index f6243025a..0a4f60fec 100644
--- a/src/name_canonicalization.cpp
+++ b/src/name_canonicalization.cpp
@@ -494,6 +494,22 @@ gb_internal void write_canonical_params(TypeWriter *w, Type *params) {
 		case Entity_Constant:
 			{
 				type_writer_appendc(w, CANONICAL_PARAM_CONST);
+				if (v->Constant.value.kind == ExactValue_Procedure) {
+					// NOTE: a procedure is named by its declaration, as different procedures can be spelt the same (See #5318)
+					Ast *expr = unparen_expr(v->Constant.value.value_procedure);
+					Entity *proc = strip_entity_wrapping(expr);
+					if (proc != nullptr) {
+						write_canonical_entity_name(w, proc);
+						break;
+					}
+					if (expr->kind == Ast_ProcLit) {
+						DeclInfo *parent = expr->ProcLit.decl->parent;
+						if (parent != nullptr && parent->entity) {
+							write_canonical_entity_name(w, parent->entity);
+							type_writer_appendc(w, CANONICAL_NAME_SEPARATOR);
+						}
+					}
+				}
 				gbString s = exact_value_to_string(v->Constant.value, 1<<16);
 				type_writer_append(w, s, gb_string_length(s));
 				gb_string_free(s);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index aa959ff6d..a672af123 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -26,6 +26,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin build ..\test_issue_5097.odin %COMMON% || exit /b
 ..\..\..\odin build ..\test_issue_5097-2.odin %COMMON% || exit /b
 ..\..\..\odin build ..\test_issue_5265.odin %COMMON% || exit /b
+..\..\..\odin test ..\test_issue_5318.odin %COMMON%  || exit /b
 ..\..\..\odin build ..\test_issue_5573.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
 ..\..\..\odin test ..\test_issue_5699.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_6068.odin %COMMON%  || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 9b9e5a1e3..68b10fcdc 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -33,6 +33,7 @@ $ODIN build ../test_issue_5043.odin $COMMON
 $ODIN build ../test_issue_5097.odin $COMMON
 $ODIN build ../test_issue_5097-2.odin $COMMON
 $ODIN build ../test_issue_5265.odin $COMMON
+$ODIN test ../test_issue_5318.odin $COMMON
 if [[ $($ODIN build ../test_issue_5573.odin $COMMON 2>&1 >/dev/null | grep -c "Error:") -eq 2 ]]; then
 	echo "SUCCESSFUL 1/1"
 else
diff --git a/tests/issues/test_issue_5318.odin b/tests/issues/test_issue_5318.odin
new file mode 100644
index 000000000..69c4fdfc4
--- /dev/null
+++ b/tests/issues/test_issue_5318.odin
@@ -0,0 +1,35 @@
+// Tests issue #5318 https://github.com/odin-lang/Odin/issues/5318
+package test_issues
+
+import "core:testing"
+
+common :: proc($f: proc(i64, i64) -> i64) -> i64 { return f(16, 4) }
+
+sum :: proc() -> i64 {
+	internal :: proc(l, r: i64) -> i64 { return l + r }
+	return common(internal)
+}
+
+difference :: proc() -> i64 {
+	internal :: proc(l, r: i64) -> i64 { return l - r }
+	return common(internal)
+}
+
+apply :: proc(v: ^int, $f: proc(^int)) { f(v) }
+
+by_amount :: proc(v: ^int, $amount: int) {
+	add :: proc(v: ^int) { v^ += amount }
+	apply(v, add)
+	apply(v, proc(v: ^int) { v^ += amount })
+}
+
+@(test)
+test_issue_5318 :: proc(t: ^testing.T) {
+	testing.expect_value(t, sum(), 20)
+	testing.expect_value(t, difference(), 12)
+
+	x := 0
+	by_amount(&x, 1)
+	by_amount(&x, 100)
+	testing.expect_value(t, x, 202)
+}

From 28d8a790d7d0a2250f8c29404e6bec9f338e7e47 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 15:27:07 +0100
Subject: [PATCH 047/215] Add more tests for the float constant builtins

---
 tests/internal/test_number_literals.odin | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/tests/internal/test_number_literals.odin b/tests/internal/test_number_literals.odin
index 415b4227f..8053fe080 100644
--- a/tests/internal/test_number_literals.odin
+++ b/tests/internal/test_number_literals.odin
@@ -93,3 +93,17 @@ float_literal_f16_f32_precision :: proc(t: ^testing.T) {
 	// can't test a reject, but these confirm large finite values still fold correctly).
 	testing.expect_value(t, f32(1e38), strconv.parse_f32("1e38") or_else 0)
 }
+
+@(test)
+float_constant_builtins :: proc(t: ^testing.T) {
+	// Constant-folded builtins on decimal-float (rational) constants must not crash or mis-fold.
+	// `abs` in particular used to hit an unhandled ExactValue kind.
+	#assert(abs(-1.5) == 1.5)
+	#assert(abs(1.5) == 1.5)
+	#assert(abs(0.3 - 0.5) == 0.2)  // exact: |3/10 - 5/10| == 1/5
+	#assert(min(0.1, 0.2) == 0.1)
+	#assert(max(0.1, 0.2) == 0.2)
+	#assert(clamp(1.5, 0.0, 1.0) == 1.0)
+	testing.expect_value(t, abs(-2.5), 2.5)
+	testing.expect_value(t, min(1.0/3.0, 1.0/4.0), 1.0/4.0)
+}

From 95df4904e8f99b77b6b30f563a5704a2d241a643 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 16:00:28 +0100
Subject: [PATCH 048/215] Change `struct Complex128` and `struct Quaternion256`
 to use `ExactValue` elements to allow for the new `Big_Rat` benefits that
 floats get

---
 src/check_builtin.cpp      |  29 ++--
 src/check_expr.cpp         |  69 +++++++--
 src/exact_value.cpp        | 300 ++++++++++++++++++++-----------------
 src/llvm_backend_const.cpp |  36 ++---
 4 files changed, 251 insertions(+), 183 deletions(-)

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 92ee2299f..60a094408 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -3951,10 +3951,11 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 		
 		if (is_type_complex(t)) {
 			if (x->mode == Addressing_Constant) {
+				// Keep the conjugate exact: negate the imaginary component(s) as ExactValues.
 				ExactValue v = exact_value_to_complex(x->value);
-				f64 r = v.value_complex->real;
-				f64 i = -v.value_complex->imag;
-				x->value = exact_value_complex(r, i);
+				ExactValue r = v.value_complex->real;
+				ExactValue i = exact_unary_operator_value(Token_Sub, v.value_complex->imag, 0, false);
+				x->value = exact_value_complex_ev(r, i);
 				x->mode = Addressing_Constant;
 			} else {
 				x->mode = Addressing_Value;
@@ -3962,11 +3963,11 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 		} else if (is_type_quaternion(t)) {
 			if (x->mode == Addressing_Constant) {
 				ExactValue v = exact_value_to_quaternion(x->value);
-				f64 r = +v.value_quaternion->real;
-				f64 i = -v.value_quaternion->imag;
-				f64 j = -v.value_quaternion->jmag;
-				f64 k = -v.value_quaternion->kmag;
-				x->value = exact_value_quaternion(r, i, j, k);
+				ExactValue r = v.value_quaternion->real;
+				ExactValue i = exact_unary_operator_value(Token_Sub, v.value_quaternion->imag, 0, false);
+				ExactValue j = exact_unary_operator_value(Token_Sub, v.value_quaternion->jmag, 0, false);
+				ExactValue k = exact_unary_operator_value(Token_Sub, v.value_quaternion->kmag, 0, false);
+				x->value = exact_value_quaternion_ev(r, i, j, k);
 				x->mode = Addressing_Constant;
 			} else {
 				x->mode = Addressing_Value;
@@ -4602,16 +4603,16 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 				break;
 			}
 			case ExactValue_Complex: {
-				f64 r = operand->value.value_complex->real;
-				f64 i = operand->value.value_complex->imag;
+				f64 r = exact_value_to_f64(operand->value.value_complex->real);
+				f64 i = exact_value_to_f64(operand->value.value_complex->imag);
 				operand->value = exact_value_float(gb_sqrt(r*r + i*i));
 				break;
 			}
 			case ExactValue_Quaternion: {
-				f64 r = operand->value.value_quaternion->real;
-				f64 i = operand->value.value_quaternion->imag;
-				f64 j = operand->value.value_quaternion->jmag;
-				f64 k = operand->value.value_quaternion->kmag;
+				f64 r = exact_value_to_f64(operand->value.value_quaternion->real);
+				f64 i = exact_value_to_f64(operand->value.value_quaternion->imag);
+				f64 j = exact_value_to_f64(operand->value.value_quaternion->jmag);
+				f64 k = exact_value_to_f64(operand->value.value_quaternion->kmag);
 				operand->value = exact_value_float(gb_sqrt(r*r + i*i + j*j + k*k));
 				break;
 			}
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 9de4d8859..9689d0812 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -2338,6 +2338,35 @@ gb_internal bool check_update_float_precision(ExactValue *value, Type *type) {
 }
 
 
+gb_internal ExactValue exact_value_round_component_to_float(ExactValue comp, int mantissa_bits, int ebias) {
+	switch (comp.kind) {
+	case ExactValue_Rational:
+		return exact_value_float(big_rat_to_float(&comp.value_rational->num, &comp.value_rational->den, mantissa_bits, ebias));
+	case ExactValue_Integer: {
+		ExactValue r = exact_value_rational_from_integer(&comp.value_integer);
+		return exact_value_float(big_rat_to_float(&r.value_rational->num, &r.value_rational->den, mantissa_bits, ebias));
+	}
+	}
+	return exact_value_to_float(comp);
+}
+
+gb_internal void complex_quaternion_element_float_format(Type *type, int *mantissa_bits, int *ebias) {
+	*mantissa_bits = 52;
+	*ebias         = 1023;
+	switch (type->Basic.kind) {
+	case Basic_complex32:
+	case Basic_quaternion64:
+		*mantissa_bits = 10;
+		*ebias         = 15;
+		break;
+	case Basic_complex64:
+	case Basic_quaternion128:
+		*mantissa_bits = 23;
+		*ebias         = 127;
+		break;
+	}
+}
+
 gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue in_value, Type *type, ExactValue *out_value) {
 	if (in_value.kind == ExactValue_Invalid) {
 		// NOTE(bill): There's already been an error
@@ -2597,7 +2626,11 @@ gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue i
 			ExactValue imag = exact_value_imag(v);
 			if (real.kind != ExactValue_Invalid &&
 			    imag.kind != ExactValue_Invalid) {
-				if (out_value) *out_value = exact_value_complex(exact_value_to_f64(real), exact_value_to_f64(imag));
+				int mantissa_bits, ebias;
+				complex_quaternion_element_float_format(type, &mantissa_bits, &ebias);
+				if (out_value) *out_value = exact_value_complex_ev(
+					exact_value_round_component_to_float(real, mantissa_bits, ebias),
+					exact_value_round_component_to_float(imag, mantissa_bits, ebias));
 				return true;
 			}
 			break;
@@ -2625,7 +2658,13 @@ gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue i
 			ExactValue kmag = exact_value_kmag(v);
 			if (real.kind != ExactValue_Invalid &&
 			    imag.kind != ExactValue_Invalid) {
-				if (out_value) *out_value = exact_value_quaternion(exact_value_to_f64(real), exact_value_to_f64(imag), exact_value_to_f64(jmag), exact_value_to_f64(kmag));
+				int mantissa_bits, ebias;
+				complex_quaternion_element_float_format(type, &mantissa_bits, &ebias);
+				if (out_value) *out_value = exact_value_quaternion_ev(
+					exact_value_round_component_to_float(real, mantissa_bits, ebias),
+					exact_value_round_component_to_float(imag, mantissa_bits, ebias),
+					exact_value_round_component_to_float(jmag, mantissa_bits, ebias),
+					exact_value_round_component_to_float(kmag, mantissa_bits, ebias));
 				return true;
 			}
 			break;
@@ -5824,42 +5863,42 @@ gb_internal ExactValue get_constant_field(CheckerContext *c, Operand const *oper
 		return value;
 	} else if (value.kind == ExactValue_Quaternion) {
 		// @QuaternionLayout
-		Quaternion256 q = *value.value_quaternion;
+		ExactQuaternion q = *value.value_quaternion;
 		GB_ASSERT(sel.index.count == 1);
 
 		switch (sel.index[0]) {
 		case 3: // w
 			if (success_) *success_ = true;
-			return exact_value_float(q.real);
+			return q.real;
 
 		case 0: // x
 			if (success_) *success_ = true;
-			return exact_value_float(q.imag);
+			return q.imag;
 
 		case 1: // y
 			if (success_) *success_ = true;
-			return exact_value_float(q.jmag);
+			return q.jmag;
 
 		case 2: // z
 			if (success_) *success_ = true;
-			return exact_value_float(q.kmag);
+			return q.kmag;
 		}
 
 		if (success_) *success_ = false;
 		return empty_exact_value;
 	} else if (value.kind == ExactValue_Complex) {
 		// @QuaternionLayout
-		Complex128 c = *value.value_complex;
+		ExactComplex c = *value.value_complex;
 		GB_ASSERT(sel.index.count == 1);
 
 		switch (sel.index[0]) {
 		case 0: // real
 			if (success_) *success_ = true;
-			return exact_value_float(c.real);
+			return c.real;
 
 		case 1: // imag
 			if (success_) *success_ = true;
-			return exact_value_float(c.imag);
+			return c.imag;
 		}
 
 		if (success_) *success_ = false;
@@ -13097,15 +13136,15 @@ gb_internal bool is_exact_value_zero(ExactValue const &v) {
 		return big_int_is_zero(&v.value_rational->num);
 	case ExactValue_Complex:
 		if (v.value_complex) {
-			return v.value_complex->real == 0.0 && v.value_complex->imag == 0.0;
+			return is_exact_value_zero(v.value_complex->real) && is_exact_value_zero(v.value_complex->imag);
 		}
 		return true;
 	case ExactValue_Quaternion:
 		if (v.value_quaternion) {
-			return v.value_quaternion->real == 0.0 &&
-			       v.value_quaternion->imag == 0.0 &&
-			       v.value_quaternion->jmag == 0.0 &&
-			       v.value_quaternion->kmag == 0.0;
+			return is_exact_value_zero(v.value_quaternion->real) &&
+			       is_exact_value_zero(v.value_quaternion->imag) &&
+			       is_exact_value_zero(v.value_quaternion->jmag) &&
+			       is_exact_value_zero(v.value_quaternion->kmag);
 		}
 		return true;
 	case ExactValue_Pointer:
diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index 1cd282c2a..ff7ec97e9 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -7,12 +7,10 @@ struct Type;
 struct Entity;
 gb_internal bool are_types_identical(Type *x, Type *y);
 
-struct Complex128 {
-	f64 real, imag;
-};
-struct Quaternion256 {
-	f64 imag, jmag, kmag, real;
-};
+// NOTE(bill): Defined after ExactValue below, since their components are now exact values
+// (each a Float=f64 or Rational=big_rat) so complex/quaternion constant folding stays exact.
+struct ExactComplex;
+struct ExactQuaternion;
 
 enum ExactValueKind {
 	ExactValue_Invalid     = 0,
@@ -57,24 +55,33 @@ gb_global char const *exact_value_kind_string[ExactValue_Count] = {
 struct ExactValue {
 	ExactValueKind kind;
 	union {
-		bool           value_bool;
-		String         value_string;
-		BigInt         value_integer;
-		f64            value_float;
-		BigRat *       value_rational;
-		i64            value_pointer; // NOTE(bill): This must be an integer and not a pointer
-		Complex128    *value_complex;
-		Quaternion256 *value_quaternion;
-		Ast *          value_compound;
-		Ast *          value_procedure;
-		Type *         value_typeid;
-		String16       value_string16;
-		Ast *          value_asm_template;
-		Ast *          value_variant;
+		bool             value_bool;
+		String           value_string;
+		BigInt           value_integer;
+		f64              value_float;
+		BigRat *         value_rational;
+		i64              value_pointer; // NOTE(bill): This must be an integer and not a pointer
+		ExactComplex    *value_complex;
+		ExactQuaternion *value_quaternion;
+		Ast *            value_compound;
+		Ast *            value_procedure;
+		Type *           value_typeid;
+		String16         value_string16;
+		Ast *            value_asm_template;
+		Ast *            value_variant;
 	};
 	Type *variant_type;
 };
 
+// Complex/quaternion components are exact numeric values (Integer/Rational/Float), so their constant
+// arithmetic keeps full precision until the value is rounded to a concrete type.
+struct ExactComplex {
+	ExactValue real, imag;
+};
+struct ExactQuaternion {
+	ExactValue imag, jmag, kmag, real;
+};
+
 gb_global ExactValue const empty_exact_value = {};
 
 gb_internal uintptr hash_exact_value(ExactValue v) {
@@ -115,10 +122,14 @@ gb_internal uintptr hash_exact_value(ExactValue v) {
 		res = ptr_map_hash_key(v.value_pointer);
 		break;
 	case ExactValue_Complex:
-		res = gb_fnv32a(v.value_complex, gb_size_of(Complex128));
+		res = hash_exact_value(v.value_complex->real) ^
+		      (hash_exact_value(v.value_complex->imag) * 0x01000193);
 		break;
 	case ExactValue_Quaternion:
-		res = gb_fnv32a(v.value_quaternion, gb_size_of(Quaternion256));
+		res = hash_exact_value(v.value_quaternion->real) ^
+		      (hash_exact_value(v.value_quaternion->imag) * 0x01000193) ^
+		      (hash_exact_value(v.value_quaternion->jmag) * 0x01000193) ^
+		      (hash_exact_value(v.value_quaternion->kmag) * 0x01000193);
 		break;
 	case ExactValue_Compound:
 		res = ptr_map_hash_key(v.value_compound);
@@ -204,17 +215,26 @@ gb_internal ExactValue exact_value_rational_from_integer(BigInt const *i) {
 	return exact_value_rational_from_ints(i, &one);
 }
 
-gb_internal ExactValue exact_value_complex(f64 real, f64 imag) {
+// Promote an integer to an exact rational, leaving other kinds untouched. Used so complex/quaternion
+// division does true rational division rather than the integer `Token_Quo` path (which is `fmod`).
+gb_internal ExactValue exact_value_as_rational_if_integer(ExactValue v) {
+	if (v.kind == ExactValue_Integer) {
+		return exact_value_rational_from_integer(&v.value_integer);
+	}
+	return v;
+}
+
+// Exact-component constructors: each component is a numeric ExactValue (Integer/Rational/Float).
+gb_internal ExactValue exact_value_complex_ev(ExactValue real, ExactValue imag) {
 	ExactValue result = {ExactValue_Complex};
-	result.value_complex = permanent_alloc_item<Complex128>();
+	result.value_complex = permanent_alloc_item<ExactComplex>();
 	result.value_complex->real = real;
 	result.value_complex->imag = imag;
 	return result;
 }
-
-gb_internal ExactValue exact_value_quaternion(f64 real, f64 imag, f64 jmag, f64 kmag) {
+gb_internal ExactValue exact_value_quaternion_ev(ExactValue real, ExactValue imag, ExactValue jmag, ExactValue kmag) {
 	ExactValue result = {ExactValue_Quaternion};
-	result.value_quaternion = permanent_alloc_item<Quaternion256>();
+	result.value_quaternion = permanent_alloc_item<ExactQuaternion>();
 	result.value_quaternion->real = real;
 	result.value_quaternion->imag = imag;
 	result.value_quaternion->jmag = jmag;
@@ -222,6 +242,14 @@ gb_internal ExactValue exact_value_quaternion(f64 real, f64 imag, f64 jmag, f64
 	return result;
 }
 
+gb_internal ExactValue exact_value_complex(f64 real, f64 imag) {
+	return exact_value_complex_ev(exact_value_float(real), exact_value_float(imag));
+}
+
+gb_internal ExactValue exact_value_quaternion(f64 real, f64 imag, f64 jmag, f64 kmag) {
+	return exact_value_quaternion_ev(exact_value_float(real), exact_value_float(imag), exact_value_float(jmag), exact_value_float(kmag));
+}
+
 gb_internal ExactValue exact_value_pointer(i64 ptr) {
 	ExactValue result = {ExactValue_Pointer};
 	result.value_pointer = ptr;
@@ -448,12 +476,15 @@ gb_internal ExactValue exact_value_from_basic_literal(TokenKind kind, String con
 		String str = string;
 		Rune last_rune = cast(Rune)str[str.len-1];
 		str.len--; // Ignore the 'i|j|k'
-		f64 imag = float_from_string(str);
+		// Parse the magnitude with the same exact (rational) path as an ordinary float literal so the
+		// imaginary component keeps full precision rather than being pre-rounded to f64.
+		ExactValue imag = exact_value_float_from_string(str);
+		ExactValue zero = exact_value_i64(0);
 
 		switch (last_rune) {
-		case 'i': return exact_value_complex(0, imag);
-		case 'j': return exact_value_quaternion(0, 0, imag, 0);
-		case 'k': return exact_value_quaternion(0, 0, 0, imag);
+		case 'i': return exact_value_complex_ev(zero, imag);
+		case 'j': return exact_value_quaternion_ev(zero, zero, imag, zero);
+		case 'k': return exact_value_quaternion_ev(zero, zero, zero, imag);
 		default: GB_PANIC("Invalid imaginary basic literal");
 		}
 	}
@@ -532,35 +563,27 @@ gb_internal ExactValue exact_value_to_float(ExactValue v) {
 gb_internal ExactValue exact_value_to_complex(ExactValue v) {
 	switch (v.kind) {
 	case ExactValue_Integer:
-		return exact_value_complex(big_int_to_f64(&v.value_integer), 0);
 	case ExactValue_Float:
-		return exact_value_complex(v.value_float, 0);
 	case ExactValue_Rational:
-		return exact_value_complex(big_rat_to_f64(&v.value_rational->num, &v.value_rational->den), 0);
+		return exact_value_complex_ev(v, exact_value_i64(0)); // keep the real component exact
 	case ExactValue_Complex:
 		return v;
-	// case ExactValue_Quaternion:
-		// return exact_value_complex(v.value_quaternion.real, v.value_quaternion.imag);
 	}
 	ExactValue r = {ExactValue_Invalid};
-	v.value_complex = permanent_alloc_item<Complex128>();
 	return r;
 }
 gb_internal ExactValue exact_value_to_quaternion(ExactValue v) {
 	switch (v.kind) {
 	case ExactValue_Integer:
-		return exact_value_quaternion(big_int_to_f64(&v.value_integer), 0, 0, 0);
 	case ExactValue_Float:
-		return exact_value_quaternion(v.value_float, 0, 0, 0);
 	case ExactValue_Rational:
-		return exact_value_quaternion(big_rat_to_f64(&v.value_rational->num, &v.value_rational->den), 0, 0, 0);
+		return exact_value_quaternion_ev(v, exact_value_i64(0), exact_value_i64(0), exact_value_i64(0));
 	case ExactValue_Complex:
-		return exact_value_quaternion(v.value_complex->real, v.value_complex->imag, 0, 0);
+		return exact_value_quaternion_ev(v.value_complex->real, v.value_complex->imag, exact_value_i64(0), exact_value_i64(0));
 	case ExactValue_Quaternion:
 		return v;
 	}
 	ExactValue r = {ExactValue_Invalid};
-	v.value_quaternion = permanent_alloc_item<Quaternion256>();
 	return r;
 }
 
@@ -571,9 +594,9 @@ gb_internal ExactValue exact_value_real(ExactValue v) {
 	case ExactValue_Rational:
 		return v;
 	case ExactValue_Complex:
-		return exact_value_float(v.value_complex->real);
+		return v.value_complex->real;
 	case ExactValue_Quaternion:
-		return exact_value_float(v.value_quaternion->real);
+		return v.value_quaternion->real;
 	}
 	ExactValue r = {ExactValue_Invalid};
 	return r;
@@ -586,9 +609,9 @@ gb_internal ExactValue exact_value_imag(ExactValue v) {
 	case ExactValue_Rational:
 		return exact_value_i64(0);
 	case ExactValue_Complex:
-		return exact_value_float(v.value_complex->imag);
+		return v.value_complex->imag;
 	case ExactValue_Quaternion:
-		return exact_value_float(v.value_quaternion->imag);
+		return v.value_quaternion->imag;
 	}
 	ExactValue r = {ExactValue_Invalid};
 	return r;
@@ -602,7 +625,7 @@ gb_internal ExactValue exact_value_jmag(ExactValue v) {
 	case ExactValue_Complex:
 		return exact_value_i64(0);
 	case ExactValue_Quaternion:
-		return exact_value_float(v.value_quaternion->jmag);
+		return v.value_quaternion->jmag;
 	}
 	ExactValue r = {ExactValue_Invalid};
 	return r;
@@ -616,7 +639,7 @@ gb_internal ExactValue exact_value_kmag(ExactValue v) {
 	case ExactValue_Complex:
 		return exact_value_i64(0);
 	case ExactValue_Quaternion:
-		return exact_value_float(v.value_quaternion->kmag);
+		return v.value_quaternion->kmag;
 	}
 	ExactValue r = {ExactValue_Invalid};
 	return r;
@@ -724,16 +747,16 @@ gb_internal ExactValue exact_unary_operator_value(TokenKind op, ExactValue v, i3
 			return exact_value_rational_from_ints(&n, &v.value_rational->den);
 		}
 		case ExactValue_Complex: {
-			f64 real = v.value_complex->real;
-			f64 imag = v.value_complex->imag;
-			return exact_value_complex(-real, -imag);
+			ExactValue re = exact_unary_operator_value(Token_Sub, v.value_complex->real, precision, is_unsigned);
+			ExactValue im = exact_unary_operator_value(Token_Sub, v.value_complex->imag, precision, is_unsigned);
+			return exact_value_complex_ev(re, im);
 		}
 		case ExactValue_Quaternion: {
-			f64 real = v.value_quaternion->real;
-			f64 imag = v.value_quaternion->imag;
-			f64 jmag = v.value_quaternion->jmag;
-			f64 kmag = v.value_quaternion->kmag;
-			return exact_value_quaternion(-real, -imag, -jmag, -kmag);
+			ExactValue re = exact_unary_operator_value(Token_Sub, v.value_quaternion->real, precision, is_unsigned);
+			ExactValue im = exact_unary_operator_value(Token_Sub, v.value_quaternion->imag, precision, is_unsigned);
+			ExactValue jm = exact_unary_operator_value(Token_Sub, v.value_quaternion->jmag, precision, is_unsigned);
+			ExactValue km = exact_unary_operator_value(Token_Sub, v.value_quaternion->kmag, precision, is_unsigned);
+			return exact_value_quaternion_ev(re, im, jm, km);
 		}
 		}
 		break;
@@ -838,10 +861,10 @@ gb_internal void match_exact_values(ExactValue *x, ExactValue *y) {
 			*x = exact_value_float(big_int_to_f64(&x->value_integer));
 			return;
 		case ExactValue_Complex:
-			*x = exact_value_complex(big_int_to_f64(&x->value_integer), 0);
+			*x = exact_value_to_complex(*x);    // keep the integer component exact
 			return;
 		case ExactValue_Quaternion:
-			*x = exact_value_quaternion(big_int_to_f64(&x->value_integer), 0, 0, 0);
+			*x = exact_value_to_quaternion(*x); // keep the integer component exact
 			return;
 		}
 		break;
@@ -972,86 +995,103 @@ gb_internal ExactValue exact_binary_operator_value(TokenKind op, ExactValue x, E
 	}
 
 	case ExactValue_Complex: {
+		// Exact per-component arithmetic (each component is an Integer/Rational/Float ExactValue).
+		#define EV_MUL(p, q) exact_binary_operator_value(Token_Mul, (p), (q))
+		#define EV_ADD(p, q) exact_binary_operator_value(Token_Add, (p), (q))
+		#define EV_SUB(p, q) exact_binary_operator_value(Token_Sub, (p), (q))
+		#define EV_QUO(p, q) exact_binary_operator_value(Token_Quo, exact_value_as_rational_if_integer(p), exact_value_as_rational_if_integer(q))
 		y = exact_value_to_complex(y);
-		f64 a = x.value_complex->real;
-		f64 b = x.value_complex->imag;
-		f64 c = y.value_complex->real;
-		f64 d = y.value_complex->imag;
-		f64 real = 0;
-		f64 imag = 0;
+		ExactValue a = x.value_complex->real;
+		ExactValue b = x.value_complex->imag;
+		ExactValue c = y.value_complex->real;
+		ExactValue d = y.value_complex->imag;
+		ExactValue real = {};
+		ExactValue imag = {};
 		switch (op) {
 		case Token_Add:
-			real = a + c;
-			imag = b + d;
+			real = EV_ADD(a, c);
+			imag = EV_ADD(b, d);
 			break;
 		case Token_Sub:
-			real = a - c;
-			imag = b - d;
+			real = EV_SUB(a, c);
+			imag = EV_SUB(b, d);
 			break;
 		case Token_Mul:
-			real = (a*c - b*d);
-			imag = (b*c + a*d);
+			real = EV_SUB(EV_MUL(a, c), EV_MUL(b, d)); // a*c - b*d
+			imag = EV_ADD(EV_MUL(b, c), EV_MUL(a, d)); // b*c + a*d
 			break;
 		case Token_Quo: {
-			f64 s = c*c + d*d;
-			real = (a*c + b*d)/s;
-			imag = (b*c - a*d)/s;
+			ExactValue s = EV_ADD(EV_MUL(c, c), EV_MUL(d, d));   // c*c + d*d
+			real = EV_QUO(EV_ADD(EV_MUL(a, c), EV_MUL(b, d)), s); // (a*c + b*d)/s
+			imag = EV_QUO(EV_SUB(EV_MUL(b, c), EV_MUL(a, d)), s); // (b*c - a*d)/s
 			break;
 		}
 		default: goto error;
 		}
-		return exact_value_complex(real, imag);
-		break;
+		return exact_value_complex_ev(real, imag);
+		#undef EV_MUL
+		#undef EV_ADD
+		#undef EV_SUB
+		#undef EV_QUO
 	}
 
 	case ExactValue_Quaternion: {
+		#define EV_MUL(p, q) exact_binary_operator_value(Token_Mul, (p), (q))
+		#define EV_ADD(p, q) exact_binary_operator_value(Token_Add, (p), (q))
+		#define EV_SUB(p, q) exact_binary_operator_value(Token_Sub, (p), (q))
+		#define EV_QUO(p, q) exact_binary_operator_value(Token_Quo, exact_value_as_rational_if_integer(p), exact_value_as_rational_if_integer(q))
+		#define EV_NEG(p)    exact_unary_operator_value(Token_Sub, (p), 0, false)
 		y = exact_value_to_quaternion(y);
-		f64 xr = x.value_quaternion->real;
-		f64 xi = x.value_quaternion->imag;
-		f64 xj = x.value_quaternion->jmag;
-		f64 xk = x.value_quaternion->kmag;
-		f64 yr = y.value_quaternion->real;
-		f64 yi = y.value_quaternion->imag;
-		f64 yj = y.value_quaternion->jmag;
-		f64 yk = y.value_quaternion->kmag;
+		ExactValue xr = x.value_quaternion->real;
+		ExactValue xi = x.value_quaternion->imag;
+		ExactValue xj = x.value_quaternion->jmag;
+		ExactValue xk = x.value_quaternion->kmag;
+		ExactValue yr = y.value_quaternion->real;
+		ExactValue yi = y.value_quaternion->imag;
+		ExactValue yj = y.value_quaternion->jmag;
+		ExactValue yk = y.value_quaternion->kmag;
 
-
-		f64 real = 0;
-		f64 imag = 0;
-		f64 jmag = 0;
-		f64 kmag = 0;
+		ExactValue real = {};
+		ExactValue imag = {};
+		ExactValue jmag = {};
+		ExactValue kmag = {};
 
 		switch (op) {
 		case Token_Add:
-			real = xr + yr;
-			imag = xi + yi;
-			jmag = xj + yj;
-			kmag = xk + yk;
+			real = EV_ADD(xr, yr); imag = EV_ADD(xi, yi); jmag = EV_ADD(xj, yj); kmag = EV_ADD(xk, yk);
 			break;
 		case Token_Sub:
-			real = xr - yr;
-			imag = xi - yi;
-			jmag = xj - yj;
-			kmag = xk - yk;
+			real = EV_SUB(xr, yr); imag = EV_SUB(xi, yi); jmag = EV_SUB(xj, yj); kmag = EV_SUB(xk, yk);
 			break;
 		case Token_Mul:
-			imag = xr * yi + xi * yr + xj * yk - xk * yj;
-			jmag = xr * yj - xi * yk + xj * yr + xk * yi;
-			kmag = xr * yk + xi * yj - xj * yi + xk * yr;
-			real = xr * yr - xi * yi - xj * yj - xk * yk;
+			// Hamilton product (matches the previous f64 formulas term-for-term).
+			imag = EV_SUB(EV_ADD(EV_ADD(EV_MUL(xr, yi), EV_MUL(xi, yr)), EV_MUL(xj, yk)), EV_MUL(xk, yj));
+			jmag = EV_ADD(EV_ADD(EV_SUB(EV_MUL(xr, yj), EV_MUL(xi, yk)), EV_MUL(xj, yr)), EV_MUL(xk, yi));
+			kmag = EV_ADD(EV_SUB(EV_ADD(EV_MUL(xr, yk), EV_MUL(xi, yj)), EV_MUL(xj, yi)), EV_MUL(xk, yr));
+			real = EV_SUB(EV_SUB(EV_SUB(EV_MUL(xr, yr), EV_MUL(xi, yi)), EV_MUL(xj, yj)), EV_MUL(xk, yk));
 			break;
 		case Token_Quo: {
-			f64 invmag2 = 1.0 / (yr*yr + yi*yi + yj*yj + yk*yk);
-			imag = (xr * -yi + xi * +yr + xj * -yk - xk * -yj) * invmag2;
-			jmag = (xr * -yj - xi * -yk + xj * +yr + xk * -yi) * invmag2;
-			kmag = (xr * -yk + xi * -yj - xj * -yi + xk * +yr) * invmag2;
-			real = (xr * +yr - xi * -yi - xj * -yj - xk * -yk) * invmag2;
+			// q1 / q2 = q1 * conj(q2) / |q2|^2
+			ExactValue nyi = EV_NEG(yi), nyj = EV_NEG(yj), nyk = EV_NEG(yk);
+			ExactValue mag2 = EV_ADD(EV_ADD(EV_ADD(EV_MUL(yr, yr), EV_MUL(yi, yi)), EV_MUL(yj, yj)), EV_MUL(yk, yk));
+			imag = EV_SUB(EV_ADD(EV_ADD(EV_MUL(xr, nyi), EV_MUL(xi, yr)), EV_MUL(xj, nyk)), EV_MUL(xk, nyj));
+			jmag = EV_ADD(EV_ADD(EV_SUB(EV_MUL(xr, nyj), EV_MUL(xi, nyk)), EV_MUL(xj, yr)), EV_MUL(xk, nyi));
+			kmag = EV_ADD(EV_SUB(EV_ADD(EV_MUL(xr, nyk), EV_MUL(xi, nyj)), EV_MUL(xj, nyi)), EV_MUL(xk, yr));
+			real = EV_SUB(EV_SUB(EV_SUB(EV_MUL(xr, yr), EV_MUL(xi, nyi)), EV_MUL(xj, nyj)), EV_MUL(xk, nyk));
+			imag = EV_QUO(imag, mag2);
+			jmag = EV_QUO(jmag, mag2);
+			kmag = EV_QUO(kmag, mag2);
+			real = EV_QUO(real, mag2);
 			break;
 		}
 		default: goto error;
 		}
-		return exact_value_quaternion(real, imag, jmag, kmag);
-		break;
+		return exact_value_quaternion_ev(real, imag, jmag, kmag);
+		#undef EV_MUL
+		#undef EV_ADD
+		#undef EV_SUB
+		#undef EV_QUO
+		#undef EV_NEG
 	}
 
 	case ExactValue_String: {
@@ -1175,40 +1215,28 @@ gb_internal bool compare_exact_values(TokenKind op, ExactValue x, ExactValue y)
 	}
 
 	case ExactValue_Complex: {
-		f64 a = x.value_complex->real;
-		f64 b = x.value_complex->imag;
-		f64 c = y.value_complex->real;
-		f64 d = y.value_complex->imag;
-		if (isnan(a) || isnan(b) || isnan(c) || isnan(d)) {
-			return op == Token_NotEq;
-		}
-
+		// Compare component-wise using exact comparisons (each component is a numeric ExactValue).
+		ExactComplex a = *x.value_complex;
+		ExactComplex b = *y.value_complex;
+		bool real_eq = compare_exact_values(Token_CmpEq, a.real, b.real);
+		bool imag_eq = compare_exact_values(Token_CmpEq, a.imag, b.imag);
 		switch (op) {
-		case Token_CmpEq: return cmp_f64(a, c) == 0 && cmp_f64(b, d) == 0;
-		case Token_NotEq: return cmp_f64(a, c) != 0 || cmp_f64(b, d) != 0;
+		case Token_CmpEq: return real_eq && imag_eq;
+		case Token_NotEq: return !real_eq || !imag_eq;
 		}
 		break;
 	}
 
 	case ExactValue_Quaternion: {
-		Quaternion256 a = *x.value_quaternion;
-		Quaternion256 b = *y.value_quaternion;
-		if (isnan(a.real) || isnan(a.imag) || isnan(a.jmag) || isnan(a.kmag) ||
-		    isnan(b.real) || isnan(b.imag) || isnan(b.jmag) || isnan(b.kmag)) {
-			return op == Token_NotEq;
-		}
-
+		ExactQuaternion a = *x.value_quaternion;
+		ExactQuaternion b = *y.value_quaternion;
+		bool real_eq = compare_exact_values(Token_CmpEq, a.real, b.real);
+		bool imag_eq = compare_exact_values(Token_CmpEq, a.imag, b.imag);
+		bool jmag_eq = compare_exact_values(Token_CmpEq, a.jmag, b.jmag);
+		bool kmag_eq = compare_exact_values(Token_CmpEq, a.kmag, b.kmag);
 		switch (op) {
-		case Token_CmpEq:
-			return cmp_f64(a.real, b.real) == 0 &&
-			       cmp_f64(a.imag, b.imag) == 0 &&
-			       cmp_f64(a.jmag, b.jmag) == 0 &&
-			       cmp_f64(a.kmag, b.kmag) == 0;
-		case Token_NotEq:
-			return cmp_f64(a.real, b.real) != 0 ||
-			       cmp_f64(a.imag, b.imag) != 0 ||
-			       cmp_f64(a.jmag, b.jmag) != 0 ||
-			       cmp_f64(a.kmag, b.kmag) != 0;
+		case Token_CmpEq: return real_eq && imag_eq && jmag_eq && kmag_eq;
+		case Token_NotEq: return !real_eq || !imag_eq || !jmag_eq || !kmag_eq;
 		}
 		break;
 	}
@@ -1349,9 +1377,9 @@ gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const
 		}
 		return gb_string_append_fmt(str, "%.17g", big_rat_to_f64(&v.value_rational->num, &v.value_rational->den));
 	case ExactValue_Complex:
-		return gb_string_append_fmt(str, "%.17g+%.17gi", v.value_complex->real, v.value_complex->imag);
+		return gb_string_append_fmt(str, "%.17g+%.17gi", exact_value_to_f64(v.value_complex->real), exact_value_to_f64(v.value_complex->imag));
 	case ExactValue_Quaternion:
-		return gb_string_append_fmt(str, "%.17g+%.17gi+%.17gj+%.17gk", v.value_quaternion->real, v.value_quaternion->imag, v.value_quaternion->jmag, v.value_quaternion->kmag);
+		return gb_string_append_fmt(str, "%.17g+%.17gi+%.17gj+%.17gk", exact_value_to_f64(v.value_quaternion->real), exact_value_to_f64(v.value_quaternion->imag), exact_value_to_f64(v.value_quaternion->jmag), exact_value_to_f64(v.value_quaternion->kmag));
 
 	case ExactValue_Pointer:
 		return str;
diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index f86678727..49d59d62f 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -1353,16 +1353,16 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 			LLVMValueRef values[2] = {};
 			switch (8*type_size_of(type)) {
 			case 32:
-				values[0] = lb_const_f16(m, cast(f32)value.value_complex->real);
-				values[1] = lb_const_f16(m, cast(f32)value.value_complex->imag);
+				values[0] = lb_const_f16(m, cast(f32)exact_value_to_f64(value.value_complex->real));
+				values[1] = lb_const_f16(m, cast(f32)exact_value_to_f64(value.value_complex->imag));
 				break;
 			case 64:
-				values[0] = lb_const_f32(m, cast(f32)value.value_complex->real);
-				values[1] = lb_const_f32(m, cast(f32)value.value_complex->imag);
+				values[0] = lb_const_f32(m, cast(f32)exact_value_to_f64(value.value_complex->real));
+				values[1] = lb_const_f32(m, cast(f32)exact_value_to_f64(value.value_complex->imag));
 				break;
 			case 128:
-				values[0] = LLVMConstReal(lb_type(m, t_f64), value.value_complex->real);
-				values[1] = LLVMConstReal(lb_type(m, t_f64), value.value_complex->imag);
+				values[0] = LLVMConstReal(lb_type(m, t_f64), exact_value_to_f64(value.value_complex->real));
+				values[1] = LLVMConstReal(lb_type(m, t_f64), exact_value_to_f64(value.value_complex->imag));
 				break;
 			}
 
@@ -1376,24 +1376,24 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 			switch (8*type_size_of(type)) {
 			case 64:
 				// @QuaternionLayout
-				values[3] = lb_const_f16(m, cast(f32)value.value_quaternion->real);
-				values[0] = lb_const_f16(m, cast(f32)value.value_quaternion->imag);
-				values[1] = lb_const_f16(m, cast(f32)value.value_quaternion->jmag);
-				values[2] = lb_const_f16(m, cast(f32)value.value_quaternion->kmag);
+				values[3] = lb_const_f16(m, cast(f32)exact_value_to_f64(value.value_quaternion->real));
+				values[0] = lb_const_f16(m, cast(f32)exact_value_to_f64(value.value_quaternion->imag));
+				values[1] = lb_const_f16(m, cast(f32)exact_value_to_f64(value.value_quaternion->jmag));
+				values[2] = lb_const_f16(m, cast(f32)exact_value_to_f64(value.value_quaternion->kmag));
 				break;
 			case 128:
 				// @QuaternionLayout
-				values[3] = lb_const_f32(m, cast(f32)value.value_quaternion->real);
-				values[0] = lb_const_f32(m, cast(f32)value.value_quaternion->imag);
-				values[1] = lb_const_f32(m, cast(f32)value.value_quaternion->jmag);
-				values[2] = lb_const_f32(m, cast(f32)value.value_quaternion->kmag);
+				values[3] = lb_const_f32(m, cast(f32)exact_value_to_f64(value.value_quaternion->real));
+				values[0] = lb_const_f32(m, cast(f32)exact_value_to_f64(value.value_quaternion->imag));
+				values[1] = lb_const_f32(m, cast(f32)exact_value_to_f64(value.value_quaternion->jmag));
+				values[2] = lb_const_f32(m, cast(f32)exact_value_to_f64(value.value_quaternion->kmag));
 				break;
 			case 256:
 				// @QuaternionLayout
-				values[3] = LLVMConstReal(lb_type(m, t_f64), value.value_quaternion->real);
-				values[0] = LLVMConstReal(lb_type(m, t_f64), value.value_quaternion->imag);
-				values[1] = LLVMConstReal(lb_type(m, t_f64), value.value_quaternion->jmag);
-				values[2] = LLVMConstReal(lb_type(m, t_f64), value.value_quaternion->kmag);
+				values[3] = LLVMConstReal(lb_type(m, t_f64), exact_value_to_f64(value.value_quaternion->real));
+				values[0] = LLVMConstReal(lb_type(m, t_f64), exact_value_to_f64(value.value_quaternion->imag));
+				values[1] = LLVMConstReal(lb_type(m, t_f64), exact_value_to_f64(value.value_quaternion->jmag));
+				values[2] = LLVMConstReal(lb_type(m, t_f64), exact_value_to_f64(value.value_quaternion->kmag));
 				break;
 			}
 

From 17e25b0cc465044c0d7f530d3da55405814412b7 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 16:15:13 +0100
Subject: [PATCH 049/215] Check for big rat components

---
 src/big_rat.cpp | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/src/big_rat.cpp b/src/big_rat.cpp
index 0acf64d70..3b6e4378a 100644
--- a/src/big_rat.cpp
+++ b/src/big_rat.cpp
@@ -3,7 +3,14 @@ struct BigRat {
 	mp_int den; // > 0
 };
 
-i64 const BIG_RAT_MAX_DECIMAL_EXP = 65536;
+gb_global i64 const BIG_RAT_MAX_DECIMAL_EXP    = 65536;
+gb_global i32 const BIG_RAT_MAX_COMPONENT_BITS = 65536;
+
+// True if either component's magnitude exceeds BIG_RAT_MAX_COMPONENT_BITS (call after normalizing).
+gb_internal bool big_rat_components_too_large(mp_int const *num, mp_int const *den) {
+	return mp_count_bits(num) > BIG_RAT_MAX_COMPONENT_BITS ||
+	       mp_count_bits(den) > BIG_RAT_MAX_COMPONENT_BITS;
+}
 
 // Reduce num/den to lowest terms with den > 0 (0 becomes 0/1).
 gb_internal void big_rat_normalize(mp_int *num, mp_int *den) {
@@ -15,8 +22,15 @@ gb_internal void big_rat_normalize(mp_int *num, mp_int *den) {
 		mp_neg(num, num);
 		mp_neg(den, den);
 	}
-	mp_int g;   mp_init(&g);   defer (mp_clear(&g));
-	mp_int one; mp_init(&one); defer (mp_clear(&one)); mp_set_u64(&one, 1);
+	mp_int g;
+	mp_int one;
+	mp_init(&g);
+	mp_init(&one);
+	mp_set_u64(&one, 1);
+
+	defer (mp_clear(&g));
+	defer (mp_clear(&one));
+
 	mp_gcd(num, den, &g);
 	if (!mp_iszero(&g) && mp_cmp(&g, &one) != MP_EQ) {
 		mp_int q, r; mp_init(&q); mp_init(&r); defer (mp_clear(&q)); defer (mp_clear(&r));

From bb2745f325edce76de8845a6eba6d30509153b60 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 16:15:40 +0100
Subject: [PATCH 050/215] Add exact rational printing to be like `1.0/3`

---
 src/exact_value.cpp | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index ff7ec97e9..05e9f75c5 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -215,8 +215,14 @@ gb_internal ExactValue exact_value_rational_from_integer(BigInt const *i) {
 	return exact_value_rational_from_ints(i, &one);
 }
 
-// Promote an integer to an exact rational, leaving other kinds untouched. Used so complex/quaternion
-// division does true rational division rather than the integer `Token_Quo` path (which is `fmod`).
+gb_internal ExactValue exact_value_rational_arith_result(mp_int const *num, mp_int const *den) {
+	ExactValue r = exact_value_rational_from_ints(num, den); // normalizes (GCD reduce)
+	if (big_rat_components_too_large(&r.value_rational->num, &r.value_rational->den)) {
+		return exact_value_float(big_rat_to_f64(&r.value_rational->num, &r.value_rational->den));
+	}
+	return r;
+}
+
 gb_internal ExactValue exact_value_as_rational_if_integer(ExactValue v) {
 	if (v.kind == ExactValue_Integer) {
 		return exact_value_rational_from_integer(&v.value_integer);
@@ -978,7 +984,7 @@ gb_internal ExactValue exact_binary_operator_value(TokenKind op, ExactValue x, E
 			big_int_mul(&nn, an, bd); big_int_mul(&nd, ad, bn); break;
 		default: goto error;
 		}
-		return exact_value_rational_from_ints(&nn, &nd);
+		return exact_value_rational_arith_result(&nn, &nd);
 	}
 
 	case ExactValue_Float: {
@@ -1375,7 +1381,19 @@ gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const
 			gb_free(heap_allocator(), s.text);
 			return str;
 		}
-		return gb_string_append_fmt(str, "%.17g", big_rat_to_f64(&v.value_rational->num, &v.value_rational->den));
+		// Non-integer: print the exact fraction as `<num>.0/<den>` (e.g. `1.0/3`). The `.0` on the
+		// numerator marks it as a decimal division, so it reads as the float `1.0/3` rather than the
+		// integer division `1/3` (which would be 0), and it round-trips as valid Odin source.
+		{
+			String ns = big_int_to_string(heap_allocator(), &v.value_rational->num);
+			String ds = big_int_to_string(heap_allocator(), &v.value_rational->den);
+			str = gb_string_append_length(str, ns.text, ns.len);
+			str = gb_string_append_fmt(str, ".0/");
+			str = gb_string_append_length(str, ds.text, ds.len);
+			gb_free(heap_allocator(), ns.text);
+			gb_free(heap_allocator(), ds.text);
+			return str;
+		}
 	case ExactValue_Complex:
 		return gb_string_append_fmt(str, "%.17g+%.17gi", exact_value_to_f64(v.value_complex->real), exact_value_to_f64(v.value_complex->imag));
 	case ExactValue_Quaternion:

From aaa29addf6bf38fc93954787a49f662a04ac6597 Mon Sep 17 00:00:00 2001
From: Jeroen van Rijn <Kelimion@users.noreply.github.com>
Date: Tue, 29 Sep 2026 17:22:52 +0200
Subject: [PATCH 051/215] NetBSD 2026Q1 -> 2026Q3

---
 .github/workflows/ci.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 209dd20cb..0bfcce1bb 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -6,7 +6,7 @@ jobs:
     name: NetBSD Build, Check, and Test
     runs-on: ubuntu-latest
     env:
-      PKGSRC_BRANCH: 2026Q1
+      PKGSRC_BRANCH: 2026Q3
     steps:
     - uses: actions/checkout@v4
     - name: Build, Check, and Test

From 383a2fe1e5625df0cb0f1b68c22a97fc4c46a1f5 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 16:34:06 +0100
Subject: [PATCH 052/215] Reject complex/quaternion component overflow to match
 normal floats

---
 src/check_expr.cpp                       | 22 ++++++
 src/exact_value.cpp                      | 30 +++++++-
 tests/internal/test_number_literals.odin | 41 +++++++++++
 tests/internal/test_quat_cmplx.odin      | 89 ++++++++++++++++++++++++
 4 files changed, 180 insertions(+), 2 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 9689d0812..cce251ddf 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -2367,6 +2367,14 @@ gb_internal void complex_quaternion_element_float_format(Type *type, int *mantis
 	}
 }
 
+gb_internal bool exact_value_component_overflows_float(ExactValue comp, int mantissa_bits, int ebias) {
+	if (comp.kind != ExactValue_Integer && comp.kind != ExactValue_Rational) {
+		return false;
+	}
+	ExactValue r = exact_value_round_component_to_float(comp, mantissa_bits, ebias);
+	return isinf(r.value_float) || isnan(r.value_float);
+}
+
 gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue in_value, Type *type, ExactValue *out_value) {
 	if (in_value.kind == ExactValue_Invalid) {
 		// NOTE(bill): There's already been an error
@@ -2628,6 +2636,12 @@ gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue i
 			    imag.kind != ExactValue_Invalid) {
 				int mantissa_bits, ebias;
 				complex_quaternion_element_float_format(type, &mantissa_bits, &ebias);
+				// A finite component that overflows the element float is not representable (parity with
+				// scalar floats). Leave out_value unset so the diagnostic reports the source value.
+				if (exact_value_component_overflows_float(real, mantissa_bits, ebias) ||
+				    exact_value_component_overflows_float(imag, mantissa_bits, ebias)) {
+					return false;
+				}
 				if (out_value) *out_value = exact_value_complex_ev(
 					exact_value_round_component_to_float(real, mantissa_bits, ebias),
 					exact_value_round_component_to_float(imag, mantissa_bits, ebias));
@@ -2660,6 +2674,14 @@ gb_internal bool check_representable_as_constant(CheckerContext *c, ExactValue i
 			    imag.kind != ExactValue_Invalid) {
 				int mantissa_bits, ebias;
 				complex_quaternion_element_float_format(type, &mantissa_bits, &ebias);
+				// A finite component that overflows the element float is not representable (parity with
+				// scalar floats). Leave out_value unset so the diagnostic reports the source value.
+				if (exact_value_component_overflows_float(real, mantissa_bits, ebias) ||
+				    exact_value_component_overflows_float(imag, mantissa_bits, ebias) ||
+				    exact_value_component_overflows_float(jmag, mantissa_bits, ebias) ||
+				    exact_value_component_overflows_float(kmag, mantissa_bits, ebias)) {
+					return false;
+				}
 				if (out_value) *out_value = exact_value_quaternion_ev(
 					exact_value_round_component_to_float(real, mantissa_bits, ebias),
 					exact_value_round_component_to_float(imag, mantissa_bits, ebias),
diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index 05e9f75c5..e1266ff01 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -1329,6 +1329,22 @@ gb_internal Entity *strip_entity_wrapping(Entity *e);
 
 gb_internal gbString write_expr_to_string(gbString str, Ast *node, bool shorthand);
 
+gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const &v, isize string_limit);
+
+gb_internal gbString write_exact_complex_component_to_string(gbString str, ExactValue comp, isize string_limit) {
+	f64 f = exact_value_to_f64(comp);
+
+	// The float formatter cannot render a magnitude at or beyond 2**63 (it prints 2**63's digits on a
+	// loop), and that also catches Inf/NaN since the range test below is false for them. For an exact
+	// integer/rational component that large, print its exact form (digits, or `num.0/den`) instead.
+	static f64 const LIMIT = 9223372036854775808.0; // 2**63
+	bool formatter_safe = (f >= -LIMIT) && (f <= LIMIT);
+	if (!formatter_safe && (comp.kind == ExactValue_Integer || comp.kind == ExactValue_Rational)) {
+		return write_exact_value_to_string(str, comp, string_limit);
+	}
+	return gb_string_append_fmt(str, "%.17g", f);
+}
+
 gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const &v, isize string_limit=36) {
 	switch (v.kind) {
 	case ExactValue_Invalid:
@@ -1395,9 +1411,19 @@ gb_internal gbString write_exact_value_to_string(gbString str, ExactValue const
 			return str;
 		}
 	case ExactValue_Complex:
-		return gb_string_append_fmt(str, "%.17g+%.17gi", exact_value_to_f64(v.value_complex->real), exact_value_to_f64(v.value_complex->imag));
+		str = write_exact_complex_component_to_string(str, v.value_complex->real, string_limit);
+		str = gb_string_append_fmt(str, "+");
+		str = write_exact_complex_component_to_string(str, v.value_complex->imag, string_limit);
+		return gb_string_append_fmt(str, "i");
 	case ExactValue_Quaternion:
-		return gb_string_append_fmt(str, "%.17g+%.17gi+%.17gj+%.17gk", exact_value_to_f64(v.value_quaternion->real), exact_value_to_f64(v.value_quaternion->imag), exact_value_to_f64(v.value_quaternion->jmag), exact_value_to_f64(v.value_quaternion->kmag));
+		str = write_exact_complex_component_to_string(str, v.value_quaternion->real, string_limit);
+		str = gb_string_append_fmt(str, "+");
+		str = write_exact_complex_component_to_string(str, v.value_quaternion->imag, string_limit);
+		str = gb_string_append_fmt(str, "i+");
+		str = write_exact_complex_component_to_string(str, v.value_quaternion->jmag, string_limit);
+		str = gb_string_append_fmt(str, "j+");
+		str = write_exact_complex_component_to_string(str, v.value_quaternion->kmag, string_limit);
+		return gb_string_append_fmt(str, "k");
 
 	case ExactValue_Pointer:
 		return str;
diff --git a/tests/internal/test_number_literals.odin b/tests/internal/test_number_literals.odin
index 8053fe080..8e2ff5b7f 100644
--- a/tests/internal/test_number_literals.odin
+++ b/tests/internal/test_number_literals.odin
@@ -94,6 +94,47 @@ float_literal_f16_f32_precision :: proc(t: ^testing.T) {
 	testing.expect_value(t, f32(1e38), strconv.parse_f32("1e38") or_else 0)
 }
 
+@(test)
+rational_arithmetic_precision_cap :: proc(t: ^testing.T) {
+	// Exact-rational constant folding is bounded so a pathological expression cannot grow the
+	// numerator/denominator without limit. Repeatedly squaring a non-dyadic fraction doubles the
+	// denominator's bit-length at every step; past the precision cap the fold falls back to a rounded
+	// f64. This whole chain therefore folds in a few kilobytes; without the cap `X32` alone would need a
+	// denominator of ~10**(2**32) (gigabytes) to fold exactly, stalling or OOMing the compiler. The test
+	// passing quickly *is* the regression check — that the guard keeps runaway folding bounded.
+	X0  :: 0.3
+	X1  :: X0*X0
+	X2  :: X1*X1
+	X3  :: X2*X2
+	X4  :: X3*X3
+	X5  :: X4*X4
+	X6  :: X5*X5
+	X7  :: X6*X6
+	X8  :: X7*X7
+	X9  :: X8*X8
+	X10 :: X9*X9
+	X11 :: X10*X10
+	X12 :: X11*X11
+	X13 :: X12*X12
+	X14 :: X13*X13
+	X15 :: X14*X14
+	X16 :: X15*X15
+	X17 :: X16*X16
+	X18 :: X17*X17
+	X19 :: X18*X18
+	X20 :: X19*X19
+	X24 :: (X20*X20)*(X20*X20) // 0.3 ** 2**24
+	X28 :: (X24*X24)*(X24*X24)
+	X32 :: (X28*X28)*(X28*X28) // 0.3 ** 2**32
+
+	// 0.3 ** 2**32 is astronomically small, so once folding falls back to f64 it underflows to 0.
+	testing.expect(t, X32 == 0.0, "rational precision cap: deeply-squared fraction folds to a bounded f64")
+	testing.expect(t, !(X32 != X32), "capped value is a real number, not NaN")
+
+	// A shallow fold is still exact: 0.3 ** 4 == 81/10000 rounds to the same f64 as the literal 0.0081.
+	testing.expect(t, X2 == 0.0081, "shallow rational folding stays exact")
+}
+
 @(test)
 float_constant_builtins :: proc(t: ^testing.T) {
 	// Constant-folded builtins on decimal-float (rational) constants must not crash or mis-fold.
diff --git a/tests/internal/test_quat_cmplx.odin b/tests/internal/test_quat_cmplx.odin
index bf8df6f0d..e7cc5c22d 100644
--- a/tests/internal/test_quat_cmplx.odin
+++ b/tests/internal/test_quat_cmplx.odin
@@ -1,6 +1,7 @@
 package test_internal
 
 import "core:testing"
+import "core:strconv"
 
 // Constant folding of complex and quaternion values, against the answer the backend
 // produces. Every constant case is paired with the same expression on variables: the
@@ -327,3 +328,91 @@ accessors_keep_their_bits_through_transmute :: proc(t: ^testing.T) {
 	testing.expect_value(t, transmute(u64)jmag(q), transmute(u64)j)
 	testing.expect_value(t, transmute(u64)kmag(q), transmute(u64)k)
 }
+
+// Untyped complex/quaternion constant components are now held exactly (as big rationals) and the
+// arithmetic folds exactly, rounding only once when the value is finally given a concrete type. This
+// is the complex/quaternion analogue of `0.1 + 0.2 == 0.3` for untyped floats: before, the components
+// were pre-rounded to f64 and every lane folded in binary floating point, coming out a ULP off.
+
+@(test)
+constant_complex_exact_folding :: proc(t: ^testing.T) {
+	X :: 0.1 + 0.2i
+	Y :: 0.2 + 0.1i
+	testing.expect(t, complex128(X + Y) == complex128(0.3 + 0.3i), "exact complex constant addition")
+
+	// (1/10) * 3 == 3/10 exactly, in the real lane
+	testing.expect(t, complex128((0.1+0i) * 3) == complex128(0.3+0i), "exact complex constant multiplication")
+
+	// (0.3 + 0.6i) / 3 == (0.1 + 0.2i) exactly (true rational division, not fmod)
+	testing.expect(t, complex128((0.3 + 0.6i) / 3) == complex128(0.1 + 0.2i), "exact complex constant division")
+
+	// The same expression on runtime f64 variables still rounds in binary floating point, so the
+	// folded and runtime answers genuinely differ here.
+	xr, xi := 0.1, 0.2
+	yr, yi := 0.2, 0.1
+	runtime_sum := complex(xr, xi) + complex(yr, yi)
+	testing.expect(t, runtime_sum != complex128(0.3 + 0.3i), "runtime complex arithmetic still rounds")
+}
+
+@(test)
+constant_quaternion_exact_folding :: proc(t: ^testing.T) {
+	X :: 0.1 + 0.2i + 0.3j + 0.4k
+	Y :: 0.2 + 0.1i + 0.4j + 0.3k
+	testing.expect(t, quaternion256(X + Y) == quaternion256(0.3 + 0.3i + 0.7j + 0.7k),
+		"exact quaternion constant addition")
+
+	// Multiplying by a real scalar keeps every lane exact.
+	testing.expect(t, quaternion256((0.1 + 0.2i + 0.3j + 0.4k) * 10) == quaternion256(1 + 2i + 3j + 4k),
+		"exact quaternion constant multiplication")
+
+	q64  := quaternion(w=0.1, x=0.2, y=0.3, z=0.4) + quaternion(w=0.2, x=0.1, y=0.4, z=0.3)
+	testing.expect(t, q64 != quaternion256(0.3 + 0.3i + 0.7j + 0.7k), "runtime quaternion arithmetic still rounds")
+}
+
+// A finite component that overflows the element float's range is rejected at compile time (parity with
+// scalar floats), so `complex128(1.0e400)` is an error rather than a silent +Inf. The rejection itself is
+// a compile error and can't be asserted here; these near-max constants guard the other side - that
+// representable components are NOT falsely rejected.
+
+@(test)
+constant_complex_representable_bounds :: proc(t: ^testing.T) {
+	c128 :: complex128(1e308 + 1e308i)          // < f64 max (~1.8e308)
+	testing.expect_value(t, real(c128), 1e308)
+	testing.expect_value(t, imag(c128), 1e308)
+
+	c64 :: complex64(3e38 + 3e38i)              // < f32 max (~3.4e38)
+	testing.expect(t, real(c64) > 0 && imag(c64) > 0, "complex64 near-max components fold")
+
+	c32 :: complex32(60000 + 60000i)            // < f16 max (65504)
+	testing.expect(t, real(c32) > 0 && imag(c32) > 0, "complex32 near-max components fold")
+
+	q256 :: quaternion256(1e308 + 1e308i + 1e308j + 1e308k)
+	testing.expect_value(t, jmag(q256), 1e308)
+	testing.expect_value(t, kmag(q256), 1e308)
+
+	q64 :: quaternion64(60000 + 60000i + 60000j + 60000k)
+	testing.expect(t, jmag(q64) > 0 && kmag(q64) > 0, "quaternion64 near-max lanes fold")
+}
+
+// complex64/complex32 (and quaternion128/quaternion64) components are rounded exactly once, directly
+// from the exact literal to the element format, so a folded constant matches the correctly-rounded
+// runtime parse instead of double-rounding through f64.
+
+@(test)
+constant_complex_f32_rounding :: proc(t: ^testing.T) {
+	c32 :: proc(t: ^testing.T, got: f32, lit: string) {
+		want, _ := strconv.parse_f32(lit)
+		testing.expectf(t, transmute(u32)got == transmute(u32)want,
+			"f32 %s: got %08x, want %08x", lit, transmute(u32)got, transmute(u32)want)
+	}
+	rr : f32 : real(complex64(0.1 + 0.2i))
+	ii : f32 : imag(complex64(0.1 + 0.2i))
+	c32(t, rr, "0.1")
+	c32(t, ii, "0.2")
+	c32(t, real(complex64(3.14159265358979323846 + 2.71828182845904523536i)), "3.14159265358979323846")
+	c32(t, imag(complex64(3.14159265358979323846 + 2.71828182845904523536i)), "2.71828182845904523536")
+
+	// quaternion128 lanes as well
+	q1 : f32 : jmag(quaternion128(0 + 0i + 0.1j + 0k))
+	c32(t, q1, "0.1")
+}

From 6653101e6199f828cb4642d4a517a45cbe92f589 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 16:46:46 +0100
Subject: [PATCH 053/215] Fix race condition with unlocking something too early

---
 src/llvm_backend_general.cpp | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 17b41cfad..81de2e750 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -1994,14 +1994,18 @@ gb_internal LLVMTypeRef lb_type_internal_for_procedures_raw(lbModule *m, Type *t
 
 	mutex_lock(&m->func_raw_types_mutex);
 
+	// NOTE: `map_get` returns an interior pointer into the map's storage, which another codegen thread's
+	// `map_set` (below) can free by growing/rehashing the map. Read the value out *while still holding the
+	// lock*; dereferencing `found` after unlocking is a data race that can return a freed/garbage type.
 	LLVMTypeRef *found = map_get(&m->func_raw_types, type);
-	if (found) {
-		mutex_unlock(&m->func_raw_types_mutex);
-		return *found;
-	}
+	LLVMTypeRef found_type = found ? *found : nullptr;
 
 	mutex_unlock(&m->func_raw_types_mutex);
 
+	if (found_type != nullptr) {
+		return found_type;
+	}
+
 	unsigned param_count = 0;
 
 	if (type->Proc.param_count != 0) {

From 1e183e4490959b1d6edfd7bdb3fa505c22652da4 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 16:57:16 +0100
Subject: [PATCH 054/215] Minor style change

---
 src/big_rat.cpp | 50 ++++++++++++++++++++++++++++++++++---------------
 1 file changed, 35 insertions(+), 15 deletions(-)

diff --git a/src/big_rat.cpp b/src/big_rat.cpp
index 3b6e4378a..2f34c7b3c 100644
--- a/src/big_rat.cpp
+++ b/src/big_rat.cpp
@@ -24,18 +24,22 @@ gb_internal void big_rat_normalize(mp_int *num, mp_int *den) {
 	}
 	mp_int g;
 	mp_int one;
-	mp_init(&g);
-	mp_init(&one);
+	mp_init(&g);   defer (mp_clear(&g));
+	mp_init(&one); defer (mp_clear(&one));
 	mp_set_u64(&one, 1);
 
-	defer (mp_clear(&g));
-	defer (mp_clear(&one));
 
 	mp_gcd(num, den, &g);
 	if (!mp_iszero(&g) && mp_cmp(&g, &one) != MP_EQ) {
-		mp_int q, r; mp_init(&q); mp_init(&r); defer (mp_clear(&q)); defer (mp_clear(&r));
-		mp_div(num, &g, &q, &r); mp_copy(&q, num);
-		mp_div(den, &g, &q, &r); mp_copy(&q, den);
+		mp_int q, r;
+		mp_init(&q); defer (mp_clear(&q));
+		mp_init(&r); defer (mp_clear(&r));
+
+		mp_div(num, &g, &q, &r);
+		mp_copy(&q, num);
+
+		mp_div(den, &g, &q, &r);
+		mp_copy(&q, den);
 	}
 }
 
@@ -59,16 +63,22 @@ gb_internal bool big_rat_from_decimal_string(String const &s, mp_int *num, mp_in
 			continue;
 		}
 		if (c == '.') {
-			if (seen_dot) return false;
+			if (seen_dot) {
+				return false;
+			}
 			seen_dot = true;
 			continue;
 		}
 		if (c == 'e' || c == 'E') {
 			break;
 		}
-		if (!gb_char_is_digit(cast(char)c)) return false;
+		if (!gb_char_is_digit(cast(char)c)) {
+			return false;
+		}
 		digits[dlen++] = cast(char)c;
-		if (seen_dot) frac_digits += 1;
+		if (seen_dot) {
+			frac_digits += 1;
+		}
 	}
 	if (dlen == 0) {
 		digits[dlen++] = '0';
@@ -86,8 +96,12 @@ gb_internal bool big_rat_from_decimal_string(String const &s, mp_int *num, mp_in
 		isize exp_digits = 0;
 		for (; i < s.len; i++) {
 			u8 c = s[i];
-			if (c == '_') continue;
-			if (!gb_char_is_digit(cast(char)c)) return false;
+			if (c == '_') {
+				continue;
+			}
+			if (!gb_char_is_digit(cast(char)c)) {
+				return false;
+			}
 			if (exp <= BIG_RAT_MAX_DECIMAL_EXP) { // clamp so it cannot overflow; rejected below
 				exp = exp*10 + cast(i64)(c - '0');
 			}
@@ -145,8 +159,12 @@ gb_internal f64 big_rat_to_float(mp_int const *a_in, mp_int const *b_in, int man
 	int exp = alen - mp_count_bits(b_in);
 
 	mp_int a2, b2, q, r;
-	mp_init(&a2); mp_init(&b2); mp_init(&q); mp_init(&r);
-	defer (mp_clear(&a2)); defer (mp_clear(&b2)); defer (mp_clear(&q)); defer (mp_clear(&r));
+
+	mp_init(&a2); defer (mp_clear(&a2));
+	mp_init(&b2); defer (mp_clear(&b2));
+	mp_init(&q);  defer (mp_clear(&q));
+	mp_init(&r);  defer (mp_clear(&r));
+
 	mp_abs(a_in, &a2);
 	mp_abs(b_in, &b2);
 
@@ -162,7 +180,9 @@ gb_internal f64 big_rat_to_float(mp_int const *a_in, mp_int const *b_in, int man
 	u64 mantissa = mp_get_mag_u64(&q);
 
 	if ((mantissa >> msize2) == 1) {
-		if (mantissa & 1) has_rem = true;
+		if (mantissa & 1) {
+			has_rem = true;
+		}
 		mantissa >>= 1;
 		exp += 1;
 	}

From 69b0996c61c422f6f81a02d4d7879dc8de8d4a06 Mon Sep 17 00:00:00 2001
From: Wassim Alhajomar <wassimulator@gmail.com>
Date: Tue, 29 Sep 2026 18:50:33 +0200
Subject: [PATCH 055/215] `core:container/xar`: fix chunk slot count capping
 `Array` capacity

---
 core/container/xar/xar.odin | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/core/container/xar/xar.odin b/core/container/xar/xar.odin
index d2a517464..3ba1fe150 100644
--- a/core/container/xar/xar.odin
+++ b/core/container/xar/xar.odin
@@ -70,7 +70,7 @@ MAX_SHIFT :: PLATFORM_BITS>>1
 		}
 */
 Array :: struct($T: typeid, $SHIFT: uint) where 0 < SHIFT, SHIFT <= MAX_SHIFT {
-	chunks:    [(1 << (_LOG2_PLATFORM_BITS - intrinsics.constant_log2(SHIFT))) + 1][^]T,
+	chunks:    [PLATFORM_BITS - SHIFT + 1][^]T,
 	len:       int,
 	allocator: runtime.Allocator,
 }

From 92a3d4411a45bdd80f639c108ea25657bcb8e8b4 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Tue, 29 Sep 2026 17:55:45 +0100
Subject: [PATCH 056/215] Fix #7636

---
 src/check_stmt.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/check_stmt.cpp b/src/check_stmt.cpp
index 713c19239..1ee0e6d27 100644
--- a/src/check_stmt.cpp
+++ b/src/check_stmt.cpp
@@ -1187,7 +1187,7 @@ gb_internal void check_switch_stmt(CheckerContext *ctx, Ast *node, u32 mod_flags
 		}
 	} else {
 		x.mode  = Addressing_Constant;
-		x.type  = t_bool;
+		x.type  = t_untyped_bool;
 		x.value = exact_value_bool(true);
 
 		Token token  = {};

From fedcc0bd5594b14847f6bc07dce77e4e4f8fae1b Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Sun, 27 Sep 2026 18:01:26 +0200
Subject: [PATCH 057/215] Ported SWAR based string parsing from fast_float to
 Odin

---
 core/strconv/fast_float.odin | 346 ++++++++++++++++++++++++++++++++++-
 1 file changed, 344 insertions(+), 2 deletions(-)

diff --git a/core/strconv/fast_float.odin b/core/strconv/fast_float.odin
index 83e63b2a5..ce9ce0470 100644
--- a/core/strconv/fast_float.odin
+++ b/core/strconv/fast_float.odin
@@ -1,9 +1,11 @@
 package strconv
 
+import "base:intrinsics"
 import "core:math/bits"
 
 /*
-	Eisel-Lemire decimal to binary conversion.
+	Decimal to binary float conversion: a fast scanner for decimal floats
+	and the Eisel-Lemire algorithm.
 
 	Ported from ffc.h (https://github.com/kolemannix/ffc.h)
 	Made available under the Boost Software License 1.0,
@@ -76,7 +78,7 @@ fast_float_compute_float :: proc "contextless" ($T: typeid, q: int, w: u64) -> u
 	// the error in the first product could affect them, so we refine the result with
 	// the lower half of the power of five.
 	PRECISION_MASK :: max(u64) >> (MANTISSA_EXPLICIT_BITS + 3)
-	pow5 := &_POWER_OF_FIVE_128[q - _SMALLEST_POWER_OF_FIVE]
+	pow5 := _POWER_OF_FIVE_128[q - _SMALLEST_POWER_OF_FIVE]
 	high, low := bits.mul_u64(w, pow5[0])
 	if high & PRECISION_MASK == PRECISION_MASK {
 		second_high, _ := bits.mul_u64(w, pow5[1])
@@ -127,6 +129,346 @@ fast_float_compute_float :: proc "contextless" ($T: typeid, q: int, w: u64) -> u
 	return mantissa | u64(power2) << MANTISSA_EXPLICIT_BITS
 }
 
+// A fast scanner for the common decimal float syntax, `[+-] digits [. digits] [(e|E) [+-] digits]`.
+// It reads 8 digits at a time with SWAR ("SIMD within a register") integer arithmetic.
+//
+// It skips a `_` between digits, and a second `.` ends the number.
+// It returns `ok = false` for a hex float, "inf", "nan", and a string that is not a number.
+// Then the caller tries `check_special` and `scan_hex_float`.
+
+@(private)
+MAX_SIG_DIGITS :: 19 // 10^19 - 1 < 2^64
+
+/*
+Scans a decimal floating-point number at the start of `s`.
+
+**Returns**
+- mantissa, exp: The value is `mantissa * 10^exp`. If `trunc` is true, the significant digits after the first 19 were dropped, and at least one of them was not zero.
+- neg: The number has a minus sign.
+- nr: The number of bytes in the number.
+- ok: `false` if `s` does not start with a decimal number.
+*/
+parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa: u64, exp: int, neg, trunc: bool, nr: int, ok: bool) #no_bounds_check {
+	n := len(s)
+	if n == 0 {
+		return
+	}
+	// Written without branches, because the sign of the input is often unpredictable.
+	neg = s[0] == '-'
+	i := int(neg || s[0] == '+')
+	if i+2 < n && s[i] == '0' && lower(s[i+1]) == 'x' {
+		return // a hex float
+	}
+
+	// Integer part
+	int_start := i
+	for i < n && s[i] - '0' <= 9 {
+		mantissa = mantissa*10 + u64(s[i] - '0')
+		i += 1
+	}
+	digits := i - int_start
+	if i < n && s[i] == '_' {
+		more: int
+		i, mantissa, more = parse_digits_with_separators(s, i, mantissa)
+		digits += more
+	}
+
+	// Fraction part
+	if i < n && s[i] == '.' {
+		i += 1
+		frac_start := i
+		i, mantissa = loop_parse_if_eight_digits(s, i, mantissa)
+		for i < n && s[i] - '0' <= 9 {
+			mantissa = mantissa*10 + u64(s[i] - '0')
+			i += 1
+		}
+		frac_digits := i - frac_start
+		if i < n && s[i] == '_' {
+			more: int
+			i, mantissa, more = parse_digits_with_separators(s, i, mantissa)
+			frac_digits += more
+		}
+		exp = -frac_digits
+		digits += frac_digits
+	}
+	if digits == 0 {
+		return
+	}
+	if digits > MAX_SIG_DIGITS {
+		// The mantissa may have overflowed (unless most digits are leading zeros).
+		return scan_decimal_exact(s)
+	}
+
+	// Exponent part. The first byte after `e` and the sign must be a digit.
+	if i < n && lower(s[i]) == 'e' {
+		i += 1
+		exp_neg := false
+		if i < n && (s[i] == '+' || s[i] == '-') {
+			exp_neg = s[i] == '-'
+			i += 1
+		}
+		if i >= n || s[i] - '0' > 9 {
+			return // not a valid exponent, so not a number
+		}
+		x := 0
+		for i < n && s[i] - '0' <= 9 {
+			if x < 100_000 { // larger exponents overflow or underflow anyway
+				x = x*10 + int(s[i] - '0')
+			}
+			i += 1
+		}
+		if i < n && s[i] == '_' {
+			i, x = parse_exponent_with_separators(s, i, x)
+		}
+		exp += -x if exp_neg else x
+	}
+
+	if mantissa == 0 {
+		exp = 0
+	}
+	nr, ok = i, true
+	return
+}
+
+
+// Returns the new position, the mantissa and the number of digits.
+@(cold)
+parse_digits_with_separators :: proc "contextless" (s: string, i: int, mantissa: u64) -> (int, u64, int) #no_bounds_check {
+	i, mantissa := i, mantissa
+	digits := 0
+	for i < len(s) {
+		if s[i] - '0' <= 9 {
+			mantissa = mantissa*10 + u64(s[i] - '0')
+			digits += 1
+		} else if s[i] != '_' {
+			break
+		}
+		i += 1
+	}
+	return i, mantissa, digits
+}
+
+@(cold)
+parse_exponent_with_separators :: proc "contextless" (s: string, i: int, x: int) -> (int, int) #no_bounds_check {
+	i, x := i, x
+	for i < len(s) {
+		if s[i] - '0' <= 9 {
+			if x < 100_000 { // larger exponents overflow or underflow anyway
+				x = x*10 + int(s[i] - '0')
+			}
+		} else if s[i] != '_' {
+			break
+		}
+		i += 1
+	}
+	return i, x
+}
+
+// It is only used for numbers with more than 19 digits
+scan_decimal_exact :: proc "contextless" (s: string) -> (mantissa: u64, exp: int, neg, trunc: bool, nr: int, ok: bool) #no_bounds_check {
+	n := len(s)
+	if n == 0 {
+		return
+	}
+	neg = s[0] == '-'
+	i := int(neg || s[0] == '+')
+	if i+2 < n && s[i] == '0' && lower(s[i+1]) == 'x' {
+		return // a hex float
+	}
+
+	m:  u64 // significant digits
+	nd: int // number of significant digits in m
+	e:  int // decimal exponent
+	saw_digits := false
+
+	// Integer part. Leading zeros do not count as significant digits, and `_` is skipped
+	for i+8 <= n && read8_to_u64(s, i) == 0x3030_3030_3030_3030 {
+		i += 8
+		saw_digits = true
+	}
+	for i < n && (s[i] == '0' || s[i] == '_') {
+		saw_digits ||= s[i] == '0'
+		i += 1
+	}
+	for i+8 <= n && nd+8 <= MAX_SIG_DIGITS {
+		v := read8_to_u64(s, i)
+		if !is_made_of_eight_digits_fast(v) {
+			break
+		}
+		m = m*100_000_000 + parse_eight_digits_unrolled(v)
+		nd += 8
+		i += 8
+		saw_digits = true
+	}
+	for i < n {
+		d := s[i] - '0'
+		if d > 9 {
+			if s[i] != '_' {
+				break
+			}
+		} else if nd < MAX_SIG_DIGITS {
+			m = m*10 + u64(d)
+			nd += 1
+			saw_digits = true
+		} else {
+			e += 1 // dropped digit
+			trunc ||= d != 0
+		}
+		i += 1
+	}
+
+	// Fraction part
+	if i < n && s[i] == '.' {
+		i += 1
+		if m == 0 {
+			// Leading zeros of the fraction change only the exponent
+			for i+8 <= n && read8_to_u64(s, i) == 0x3030_3030_3030_3030 {
+				e -= 8
+				i += 8
+				saw_digits = true
+			}
+			for i < n && (s[i] == '0' || s[i] == '_') {
+				if s[i] == '0' {
+					e -= 1
+					saw_digits = true
+				}
+				i += 1
+			}
+		}
+		for i+8 <= n && nd+8 <= MAX_SIG_DIGITS {
+			v := read8_to_u64(s, i)
+			if !is_made_of_eight_digits_fast(v) {
+				break
+			}
+			m = m*100_000_000 + parse_eight_digits_unrolled(v)
+			nd += 8
+			e -= 8
+			i += 8
+			saw_digits = true
+		}
+		if i+4 <= n && nd+4 <= MAX_SIG_DIGITS {
+			v := read4_to_u32(s, i)
+			if is_made_of_four_digits_fast(v) {
+				m = m*10_000 + parse_four_digits_unrolled(v)
+				nd += 4
+				e -= 4
+				i += 4
+				saw_digits = true
+			}
+		}
+		for i < n {
+			d := s[i] - '0'
+			if d > 9 {
+				if s[i] != '_' {
+					break
+				}
+			} else if m == 0 && d == 0 {
+				e -= 1 // a leading zero of the fraction
+				saw_digits = true
+			} else if nd < MAX_SIG_DIGITS {
+				m = m*10 + u64(d)
+				nd += 1
+				e -= 1
+				saw_digits = true
+			} else {
+				trunc ||= d != 0 // dropped digit
+				saw_digits = true
+			}
+			i += 1
+		}
+	}
+	if !saw_digits {
+		return
+	}
+
+	// Exponent part. The first byte after `e` and the sign must be a digit
+	if i < n && lower(s[i]) == 'e' {
+		i += 1
+		exp_neg := false
+		if i < n && (s[i] == '+' || s[i] == '-') {
+			exp_neg = s[i] == '-'
+			i += 1
+		}
+		if i >= n || s[i] - '0' > 9 {
+			return // not a valid exponent, so not a number
+		}
+		x := 0
+		for i < n {
+			d := s[i] - '0'
+			if d > 9 {
+				if s[i] != '_' {
+					break
+				}
+			} else if x < 100_000 { // larger exponents overflow or underflow anyway
+				x = x*10 + int(d)
+			}
+			i += 1
+		}
+		e += -x if exp_neg else x
+	}
+
+	if m == 0 {
+		e = 0
+		trunc = false
+	}
+	return m, e, neg, trunc, i, true
+}
+
+// Loads 8 bytes starting at `s[i]` in little-endian order. The caller checks that `i+8 <= len(s)`.
+read8_to_u64 :: #force_inline proc "contextless" (s: string, i: int) -> u64 {
+	return u64(intrinsics.unaligned_load((^u64le)(&raw_data(s)[i])))
+}
+
+read4_to_u32 :: #force_inline proc "contextless" (s: string, i: int) -> u32 {
+	return u32(intrinsics.unaligned_load((^u32le)(&raw_data(s)[i])))
+}
+
+// Reports if all 8 bytes of `v` are ASCII digits.
+is_made_of_eight_digits_fast :: #force_inline proc "contextless" (v: u64) -> bool {
+	return ((v + 0x4646_4646_4646_4646) | (v - 0x3030_3030_3030_3030)) & 0x8080_8080_8080_8080 == 0
+}
+
+is_made_of_four_digits_fast :: #force_inline proc "contextless" (v: u32) -> bool {
+	return ((v + 0x4646_4646) | (v - 0x3030_3030)) & 0x8080_8080 == 0
+}
+
+// Returns the new position and mantissa.
+loop_parse_if_eight_digits :: #force_inline proc "contextless" (s: string, i: int, m: u64) -> (int, u64) #no_bounds_check {
+	i, m := i, m
+	for i+8 <= len(s) {
+		v := read8_to_u64(s, i)
+		if !is_made_of_eight_digits_fast(v) {
+			break
+		}
+		m = m*100_000_000 + parse_eight_digits_unrolled(v)
+		i += 8
+	}
+	if i+4 <= len(s) {
+		v := read4_to_u32(s, i)
+		if is_made_of_four_digits_fast(v) {
+			m = m*10_000 + parse_four_digits_unrolled(v)
+			i += 4
+		}
+	}
+	return i, m
+}
+
+// Converts 8 ASCII digits (the first digit in the lowest byte) to their value
+parse_eight_digits_unrolled :: #force_inline proc "contextless" (chars: u64) -> u64 {
+	MASK :: 0x0000_00ff_0000_00ff
+	MUL1 :: 0x000f_4240_0000_0064 // 100 + (1000000 << 32)
+	MUL2 :: 0x0000_2710_0000_0001 // 1 + (10000 << 32)
+	v := chars - 0x3030_3030_3030_3030
+	v = v*10 + v>>8
+	return u64(u32(((v & MASK)*MUL1 + ((v>>16) & MASK)*MUL2) >> 32))
+}
+
+parse_four_digits_unrolled :: #force_inline proc "contextless" (chars: u32) -> u64 {
+	v := chars - 0x3030_3030
+	v = v*10 + v>>8
+	return u64(((v & 0x00ff_00ff) * 0x0064_0001) >> 16)
+}
+
 // 128-bit truncated mantissas of 5^-342 to 5^308, with the most significant
 // bit set. Generated by fast_float script/table_generation.py.
 @(rodata)

From 9d12e2af80ef35170ba14c5f97556c902c253fd7 Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Tue, 29 Sep 2026 20:42:58 +0200
Subject: [PATCH 058/215] added SWAR trick for hex floats as well

---
 core/strconv/fast_float.odin |  25 ++--
 core/strconv/hex_float.odin  | 242 ++++++++++++++++++++++++++++++++
 core/strconv/strconv.odin    | 261 ++++++-----------------------------
 3 files changed, 295 insertions(+), 233 deletions(-)
 create mode 100644 core/strconv/hex_float.odin

diff --git a/core/strconv/fast_float.odin b/core/strconv/fast_float.odin
index ce9ce0470..a1e39d61e 100644
--- a/core/strconv/fast_float.odin
+++ b/core/strconv/fast_float.odin
@@ -9,7 +9,7 @@ import "core:math/bits"
 
 	Ported from ffc.h (https://github.com/kolemannix/ffc.h)
 	Made available under the Boost Software License 1.0,
-	see LICENSE_fast_float in this package.
+	see LICENSE at the bottom of the file.
 
 	List of contributors:
 		Daniel Lemire, João Paulo Magalhaes: Original fast_float implementation
@@ -129,24 +129,19 @@ fast_float_compute_float :: proc "contextless" ($T: typeid, q: int, w: u64) -> u
 	return mantissa | u64(power2) << MANTISSA_EXPLICIT_BITS
 }
 
-// A fast scanner for the common decimal float syntax, `[+-] digits [. digits] [(e|E) [+-] digits]`.
-// It reads 8 digits at a time with SWAR ("SIMD within a register") integer arithmetic.
-//
-// It skips a `_` between digits, and a second `.` ends the number.
-// It returns `ok = false` for a hex float, "inf", "nan", and a string that is not a number.
-// Then the caller tries `check_special` and `scan_hex_float`.
-
 @(private)
 MAX_SIG_DIGITS :: 19 // 10^19 - 1 < 2^64
 
 /*
 Scans a decimal floating-point number at the start of `s`.
+A fast scanner for the decimal float syntax: `[+-] digits [. digits] [(e|E) [+-] digits]`
+It skips a `_` between digits
 
 **Returns**
 - mantissa, exp: The value is `mantissa * 10^exp`. If `trunc` is true, the significant digits after the first 19 were dropped, and at least one of them was not zero.
 - neg: The number has a minus sign.
 - nr: The number of bytes in the number.
-- ok: `false` if `s` does not start with a decimal number.
+- ok: `false` if `s` is not a number
 */
 parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa: u64, exp: int, neg, trunc: bool, nr: int, ok: bool) #no_bounds_check {
 	n := len(s)
@@ -168,7 +163,7 @@ parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa
 	}
 	digits := i - int_start
 	if i < n && s[i] == '_' {
-		more: int
+		more: int = ---
 		i, mantissa, more = parse_digits_with_separators(s, i, mantissa)
 		digits += more
 	}
@@ -184,7 +179,7 @@ parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa
 		}
 		frac_digits := i - frac_start
 		if i < n && s[i] == '_' {
-			more: int
+			more: int = ---
 			i, mantissa, more = parse_digits_with_separators(s, i, mantissa)
 			frac_digits += more
 		}
@@ -231,7 +226,7 @@ parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa
 }
 
 
-// Returns the new position, the mantissa and the number of digits.
+// Returns the new position, the mantissa and the number of digits
 @(cold)
 parse_digits_with_separators :: proc "contextless" (s: string, i: int, mantissa: u64) -> (int, u64, int) #no_bounds_check {
 	i, mantissa := i, mantissa
@@ -414,7 +409,7 @@ scan_decimal_exact :: proc "contextless" (s: string) -> (mantissa: u64, exp: int
 	return m, e, neg, trunc, i, true
 }
 
-// Loads 8 bytes starting at `s[i]` in little-endian order. The caller checks that `i+8 <= len(s)`.
+// Loads 8 bytes starting at `s[i]` in little-endian order
 read8_to_u64 :: #force_inline proc "contextless" (s: string, i: int) -> u64 {
 	return u64(intrinsics.unaligned_load((^u64le)(&raw_data(s)[i])))
 }
@@ -423,7 +418,7 @@ read4_to_u32 :: #force_inline proc "contextless" (s: string, i: int) -> u32 {
 	return u32(intrinsics.unaligned_load((^u32le)(&raw_data(s)[i])))
 }
 
-// Reports if all 8 bytes of `v` are ASCII digits.
+// Reports if all 8 bytes of `v` are ASCII digits
 is_made_of_eight_digits_fast :: #force_inline proc "contextless" (v: u64) -> bool {
 	return ((v + 0x4646_4646_4646_4646) | (v - 0x3030_3030_3030_3030)) & 0x8080_8080_8080_8080 == 0
 }
@@ -432,7 +427,7 @@ is_made_of_four_digits_fast :: #force_inline proc "contextless" (v: u32) -> bool
 	return ((v + 0x4646_4646) | (v - 0x3030_3030)) & 0x8080_8080 == 0
 }
 
-// Returns the new position and mantissa.
+// Returns the new position and mantissa
 loop_parse_if_eight_digits :: #force_inline proc "contextless" (s: string, i: int, m: u64) -> (int, u64) #no_bounds_check {
 	i, m := i, m
 	for i+8 <= len(s) {
diff --git a/core/strconv/hex_float.odin b/core/strconv/hex_float.odin
new file mode 100644
index 000000000..a6dffd9a3
--- /dev/null
+++ b/core/strconv/hex_float.odin
@@ -0,0 +1,242 @@
+package strconv
+
+import "base:intrinsics"
+
+/*
+Scans a hexadecimal floating-point number at the start of `s`.
+`[+-] 0x hexdigits [. hexdigits] (p|P) [+-] digits`
+A `_` between digits is skipped
+
+**Returns**
+- mantissa, exp: The value is `mantissa * 2^exp`. If `trunc` is true, the significant hex digits after the first 16 were dropped, and at least one of them was not zero.
+- neg: The number has a minus sign.
+- nr: The number of bytes in the number.
+- ok: `false` if `s` does not start with a hexadecimal float.
+*/
+scan_hex_float :: proc "contextless" (s: string) -> (mantissa: u64, exp: int, neg, trunc: bool, nr: int, ok: bool) #no_bounds_check {
+	MAX_HEX_DIGITS :: 16
+
+	n := len(s)
+	if n == 0 {
+		return
+	}
+	neg = s[0] == '-'
+	i := int(neg || s[0] == '+')
+	// "0x" is a hex prefix only if another byte follows it.
+	if !(i+2 < n && s[i] == '0' && lower(s[i+1]) == 'x') {
+		return
+	}
+	i += 2
+
+	nd := 0 // number of significant hex digits in the mantissa
+	saw_digits := false
+
+	// Integer part. Leading zeros do not count as significant digits.
+	for i < n && (s[i] == '0' || s[i] == '_') {
+		saw_digits ||= s[i] == '0'
+		i += 1
+	}
+	for i+8 <= n && nd+8 <= MAX_HEX_DIGITS {
+		v := read8_to_u64(s, i)
+		if !is_eight_hex_digits(v) {
+			break
+		}
+		mantissa = mantissa<<32 | parse_eight_hex_digits(v)
+		nd += 8
+		i += 8
+		saw_digits = true
+	}
+	for i < n {
+		d := hex_digit_table[s[i]]
+		if d >= 16 {
+			if s[i] != '_' {
+				break
+			}
+		} else if nd < MAX_HEX_DIGITS {
+			mantissa = mantissa<<4 | u64(d)
+			nd += 1
+			saw_digits = true
+		} else {
+			exp += 4 // dropped digit
+			trunc ||= d != 0
+		}
+		i += 1
+	}
+
+	// Fraction part
+	if i < n && s[i] == '.' {
+		i += 1
+		if mantissa == 0 {
+			// Leading zeros of the fraction change only the exponent
+			for i < n && (s[i] == '0' || s[i] == '_') {
+				if s[i] == '0' {
+					exp -= 4
+					saw_digits = true
+				}
+				i += 1
+			}
+		}
+		for i+8 <= n && nd+8 <= MAX_HEX_DIGITS {
+			v := read8_to_u64(s, i)
+			if !is_eight_hex_digits(v) {
+				break
+			}
+			mantissa = mantissa<<32 | parse_eight_hex_digits(v)
+			nd += 8
+			exp -= 32
+			i += 8
+			saw_digits = true
+		}
+		if i+4 <= n && nd+4 <= MAX_HEX_DIGITS {
+			// Four digits: pad them with "0000" and use the 8-digit code.
+			v := u64(read4_to_u32(s, i)) | 0x3030_3030 << 32
+			if is_eight_hex_digits(v) {
+				mantissa = mantissa<<16 | parse_eight_hex_digits(v) >> 16
+				nd += 4
+				exp -= 16
+				i += 4
+				saw_digits = true
+			}
+		}
+		for i < n {
+			d := hex_digit_table[s[i]]
+			if d >= 16 {
+				if s[i] != '_' {
+					break
+				}
+			} else if mantissa == 0 && d == 0 {
+				exp -= 4 // a leading zero of the fraction
+				saw_digits = true
+			} else if nd < MAX_HEX_DIGITS {
+				mantissa = mantissa<<4 | u64(d)
+				nd += 1
+				exp -= 4
+				saw_digits = true
+			} else {
+				trunc ||= d != 0 // dropped digit
+				saw_digits = true
+			}
+			i += 1
+		}
+	}
+	if !saw_digits {
+		return
+	}
+
+	// The binary exponent is required. The first byte after `p` and the sign must be a digit.
+	if !(i < n && lower(s[i]) == 'p') {
+		return
+	}
+	i += 1
+	exp_neg := false
+	if i < n && (s[i] == '+' || s[i] == '-') {
+		exp_neg = s[i] == '-'
+		i += 1
+	}
+	if i >= n || s[i] - '0' > 9 {
+		return
+	}
+	x := 0
+	for i < n && (s[i] - '0' <= 9 || s[i] == '_') {
+		if s[i] != '_' && x < 100_000 { // larger exponents overflow or underflow anyway
+			x = x*10 + int(s[i] - '0')
+		}
+		i += 1
+	}
+	exp += -x if exp_neg else x
+
+	if mantissa == 0 {
+		exp = 0
+		trunc = false
+	}
+	nr, ok = i, true
+	return
+}
+
+/*
+Converts `mantissa * 2^exp` to the bits of the float type that `info` describes, rounded to
+nearest, ties to even. `trunc` means that the exact value is a little larger than
+`mantissa * 2^exp` (nonzero digits were dropped).
+
+**Returns**
+- float_bits: The bits of the float, with the sign.
+- ok: `false` if the value overflows. Then `float_bits` is infinity.
+*/
+hex_float_bits :: proc "contextless" (mantissa: u64, exp: int, neg, trunc: bool, info: ^Float_Info) -> (float_bits: u64, ok: bool) {
+	M := int(info.mantbits)
+	sign := u64(neg) << info.mantbits << info.expbits
+	if mantissa == 0 {
+		return sign, true
+	}
+
+	// Normalize: the top bit of m is set, so the value is in [2^(e+63), 2^(e+64)).
+	lz := intrinsics.count_leading_zeros(mantissa)
+	m := mantissa << lz
+	e := exp - int(lz)
+
+	biased := e + 63 - info.bias // the biased exponent of a normal result
+	shift := 63 - M              // keep M+1 bits for a normal result
+	if biased < 1 {
+		// Subnormal: keep fewer bits.
+		shift += 1 - biased
+		biased = 0
+	}
+
+	// Round to nearest, ties to even. `trunc` is a sticky bit below all bits of m.
+	kept, rest, half: u64
+	switch {
+	case shift < 64:
+		kept = m >> uint(shift)
+		rest = m & (1<<uint(shift) - 1)
+		half = 1 << uint(shift - 1)
+	case shift == 64:
+		rest = m
+		half = 1 << 63
+	case:
+		return sign, true // less than half of the smallest subnormal
+	}
+	if rest > half || (rest == half && (trunc || kept & 1 == 1)) {
+		kept += 1
+	}
+
+	if biased == 0 {
+		// Subnormal
+		return sign | kept, true
+	}
+	if kept == 1 << uint(M+1) {
+		kept >>= 1
+		biased += 1
+	}
+	if biased >= 1<<info.expbits - 1 {
+		return sign | u64(1<<info.expbits - 1) << info.mantbits, false
+	}
+	return sign | u64(biased) << info.mantbits | kept & (1<<info.mantbits - 1), true
+}
+
+// NOTE(MatthiasH): direct lookup was always faster in benchmarks
+@(rodata)
+hex_digit_table := [256]u8{
+	0..<'0' = 0xff, ':'..<'A' = 0xff, 'G'..<'a' = 0xff, 'g'..=255 = 0xff,
+	'0' =  0, '1' =  1, '2' =  2, '3' =  3, '4' =  4,
+	'5' =  5, '6' =  6, '7' =  7, '8' =  8, '9' =  9,
+	'a' = 10, 'b' = 11, 'c' = 12, 'd' = 13, 'e' = 14, 'f' = 15,
+	'A' = 10, 'B' = 11, 'C' = 12, 'D' = 13, 'E' = 14, 'F' = 15,
+}
+
+is_eight_hex_digits :: #force_inline proc "contextless" (v: u64) -> bool {
+	ONES :: 0x0101_0101_0101_0101
+	HIGH :: 0x8080_8080_8080_8080
+	in_range :: #force_inline proc "contextless" (v: u64, $lo, $hi: u64) -> u64 {
+		return (v + (0x80 - lo)*ONES) &~ (v + (0x7f - hi)*ONES)
+	}
+	digit  := in_range(v, '0', '9')
+	letter := in_range(v | 0x20*ONES, 'a', 'f')
+	return (digit | letter) &~ v & HIGH == HIGH
+}
+
+parse_eight_hex_digits :: #force_inline proc "contextless" (v: u64) -> u64 {
+	x := (v & 0x0f0f_0f0f_0f0f_0f0f) + ((v >> 6) & 0x0101_0101_0101_0101) * 9
+	x = ((x << 4) + (x >> 8)) & 0x00ff_00ff_00ff_00ff
+	x = ((x << 8) + (x >> 16)) & 0x0000_ffff_0000_ffff
+	return ((x << 16) + (x >> 32)) & 0xffff_ffff
+}
diff --git a/core/strconv/strconv.odin b/core/strconv/strconv.odin
index f6fe48e8d..232b703ce 100644
--- a/core/strconv/strconv.odin
+++ b/core/strconv/strconv.odin
@@ -915,215 +915,45 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 		}
 		return
 	}
-	parse_components :: proc "contextless" (s: string) -> (mantissa: u64, exp: int, neg, trunc, hex: bool, i: int, ok: bool) {
-		if len(s) == 0 {
-			return
-		}
-		switch s[i] {
-		case '+': i += 1
-		case '-': i += 1; neg = true
-		}
-
-		base := u64(10)
-		MAX_MANT_DIGITS := 19
-		exp_char := byte('e')
-		// support stupid 0x1.ABp100 hex floats even if Odin doesn't
-		if i+2 < len(s) && s[i] == '0' && lower(s[i+1]) == 'x' {
-			base = 16
-			MAX_MANT_DIGITS = 16
-			i += 2
-			exp_char = 'p'
-			hex = true
-		}
-
-		underscores := false
-		saw_dot, saw_digits := false, false
-		nd := 0
-		nd_mant := 0
-		decimal_point := 0
-		trailing_zeroes_nd := -1
-		loop: for ; i < len(s); i += 1 {
-			switch c := s[i]; true {
-			case c == '_':
-				underscores = true
-				continue loop
-			case c == '.':
-				if saw_dot {
-					break loop
-				}
-				saw_dot = true
-				decimal_point = nd
-				continue loop
-
-			case '0' <= c && c <= '9':
-				saw_digits = true
-				if c == '0' {
-					if nd == 0 {
-						decimal_point -= 1
-						continue loop
-					}
-					if trailing_zeroes_nd == -1 {
-						trailing_zeroes_nd = nd
-					}
-				} else {
-					trailing_zeroes_nd = -1
-				}
-				nd += 1
-				if nd_mant < MAX_MANT_DIGITS {
-					mantissa *= base
-					mantissa += u64(c - '0')
-					nd_mant += 1
-				} else if c != '0' {
-					trunc = true
-				}
-				continue loop
-			case base == 16 && 'a' <= lower(c) && lower(c) <= 'f':
-				saw_digits = true
-				trailing_zeroes_nd = -1
-				nd += 1
-				if nd_mant < MAX_MANT_DIGITS {
-					mantissa *= 16
-					mantissa += u64(lower(c) - 'a' + 10)
-					nd_mant += 1
-				} else {
-					trunc = true
-				}
-				continue loop
-			}
-			break loop
-		}
-
-		if !saw_digits {
-			return
-		}
-		if !saw_dot {
-			decimal_point = nd
-		}
-		if trailing_zeroes_nd > 0 {
-			trailing_zeroes_nd = nd_mant - trailing_zeroes_nd
-		}
-		for /**/; trailing_zeroes_nd > 0; trailing_zeroes_nd -= 1 {
-			mantissa /= base
-			nd_mant -= 1
-			nd -= 1
-		}
-		if base == 16 {
-			decimal_point *= 4
-			nd_mant *= 4
-		}
-
-		if i < len(s) && lower(s[i]) == exp_char {
-			i += 1
-			if i >= len(s) { return }
-			exp_sign := 1
-			switch s[i] {
-			case '+': i += 1
-			case '-': i += 1; exp_sign = -1
-			}
-			if i >= len(s) || s[i] < '0' || s[i] > '9' {
-				return
-			}
-			e := 0
-			for ; i < len(s) && ('0' <= s[i] && s[i] <= '9' || s[i] == '_'); i += 1 {
-				if s[i] == '_' {
-					underscores = true
-					continue
-				}
-				if e < 1e5 {
-					e = e*10 + int(s[i]) - '0'
-				}
-			}
-			decimal_point += e * exp_sign
-		} else if base == 16 {
-			return
-		}
-
-		if mantissa != 0 {
-			exp = decimal_point - nd_mant
-		}
-		ok = true
-		return
-	}
-
-	parse_hex :: proc "contextless" (s: string, mantissa: u64, exp: int, neg, trunc: bool) -> (f64, bool) {
-		info := &_f64_info
-
-		mantissa, exp := mantissa, exp
-
-		MAX_EXP := 1<<info.expbits + info.bias - 2
-		MIN_EXP := info.bias + 1
-		exp += int(info.mantbits)
-
-		for mantissa != 0 && mantissa >> (info.mantbits+2) == 0 {
-			mantissa <<= 1
-			exp -= 1
-		}
-		if trunc {
-			mantissa |= 1
-		}
-
-		for mantissa >> (info.mantbits+3) != 0 {
-			mantissa = mantissa>>1 | mantissa&1
-			exp += 1
-		}
-
-		// denormalize
-		for mantissa > 1 && exp < MIN_EXP-2 {
-			mantissa = mantissa>>1 | mantissa&1
-			exp += 1
-		}
-
-		round := mantissa & 3
-		mantissa >>= 2
-		round |= mantissa & 1 // round to even
-		exp += 2
-		if round == 3 {
-			mantissa += 1
-			if mantissa == 1 << (1 + info.mantbits) {
-				mantissa >>= 1
-				exp += 1
-			}
-		}
-		if mantissa>>info.mantbits == 0 {
-			// zero or denormal
-			exp = info.bias
-		}
-
-		ok := true
-		if exp > MAX_EXP {
-			// infinity or invalid
-			mantissa = 1<<info.mantbits
-			exp = MAX_EXP + 1
-			ok = false
-		}
-
-		bits := mantissa & (1<<info.mantbits - 1)
-		bits |= u64((exp-info.bias) & (1<<info.expbits - 1)) << info.mantbits
-		if neg {
-			bits |= 1 << info.mantbits << info.expbits
-		}
-		return transmute(f64)bits, ok
-	}
 
+	// 0h string to float case
 	if len(str) > 2 && str[0] == '0' && str[1] == 'h' {
-		nr = 2
-
 		as_int: u64
 		digits: int
-		for r in str[2:] {
-			if r == '_' {
-				nr += 1
-				continue
-			}
-			v := u64(_digit_value(r))
-			if v >= 16 {
+		i := 2
+		// Read 8 hex digits at a time, then 4 digits at a time (like "0h3c00" or groups
+		// between `_` separators), then single digits and `_` separators.
+		for i+8 <= len(str) {
+			v := read8_to_u64(str, i)
+			if !is_eight_hex_digits(v) {
 				break
 			}
-			as_int *= 16
-			as_int += v
-			digits += 1
+			as_int = as_int<<32 | parse_eight_hex_digits(v)
+			digits += 8
+			i += 8
 		}
-		nr += digits
+		for i < len(str) {
+			if i+4 <= len(str) {
+				// Four digits: pad them with "0000" and use the 8-digit code.
+				v := u64(read4_to_u32(str, i)) | 0x3030_3030 << 32
+				if is_eight_hex_digits(v) {
+					as_int = as_int<<16 | parse_eight_hex_digits(v) >> 16
+					digits += 4
+					i += 4
+					continue
+				}
+			}
+			if str[i] != '_' {
+				v := hex_digit_table[str[i]]
+				if v >= 16 {
+					break
+				}
+				as_int = as_int<<4 | u64(v)
+				digits += 1
+			}
+			i += 1
+		}
+		nr = i
 		ok = len(str) == nr
 
 		switch digits {
@@ -1139,10 +969,6 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 		return
 	}
 
-	if f, n, special := check_special(str); special {
-		return T(f), n, true
-	}
-
 	when T == f64 {
 		Bits :: u64
 		info := &_f64_info
@@ -1153,18 +979,16 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 
 	mantissa: u64
 	exp:      int
-	neg, trunc, hex: bool
-	mantissa, exp, neg, trunc, hex, nr = parse_components(str) or_return
-
-	if hex {
-		f: f64
-		f, ok = parse_hex(str, mantissa, exp, neg, trunc)
-		value = T(f)
-		when T == f32 {
-			// A finite f64 can be too large for f32.
-			ok = ok && transmute(u32)value & 0x7f80_0000 != 0x7f80_0000
+	neg, trunc: bool
+	mantissa, exp, neg, trunc, nr, ok = parse_number_string(str)
+	if !ok {
+		// Not a decimal number: try "inf", "nan" and a hexadecimal float.
+		if f, n, special := check_special(str); special {
+			return T(f), n, true
 		}
-		return
+		mantissa, exp, neg, trunc, nr = scan_hex_float(str) or_return
+		b, in_range := hex_float_bits(mantissa, exp, neg, trunc, info)
+		return transmute(T)Bits(b), nr, in_range
 	}
 
 	// Clinger's fast path algorithm
@@ -1175,7 +999,8 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 			1e20, 1e21, 1e22,
 		}
 
-		if mantissa>>_f64_info.mantbits != 0 {
+		// Every integer up to 2^53 is an exact f64 value.
+		if mantissa > 1<<53 {
 			break clinger_fast_path
 		}
 		f := f64(mantissa)

From dad90e28501c7d2b8e2344cc0a8d41d4a8acd2b3 Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Tue, 29 Sep 2026 20:43:14 +0200
Subject: [PATCH 059/215] added unit tests for string to float conversion

---
 tests/core/strconv/test_core_strconv.odin | 201 ++++++++++++++++++++++
 1 file changed, 201 insertions(+)

diff --git a/tests/core/strconv/test_core_strconv.odin b/tests/core/strconv/test_core_strconv.odin
index cc8946483..5f6c09fbe 100644
--- a/tests/core/strconv/test_core_strconv.odin
+++ b/tests/core/strconv/test_core_strconv.odin
@@ -324,3 +324,204 @@ test_float_overflow :: proc(t: ^testing.T) {
 	testing.expect_value(t, f32v, 0)
 	testing.expect_value(t, ok32, true)
 }
+
+@(test)
+test_float_scanner :: proc(t: ^testing.T) {
+	// Cover the fast scanner's 8-digit steps, the 19-digit limit, skipped leading zeros,
+	Case :: struct { s: string, bits: u64, n: int, ok: bool }
+	cases := []Case{
+		{"12345678", 0x41678c29c0000000, 8, true},
+		{"123456789", 0x419d6f3454000000, 9, true},
+		{"1234567812345678", 0x43118b54df9fbd38, 16, true},
+		{"12345678.12345678", 0x41678c29c3f35ba2, 17, true},
+		{"0.1234567812345678", 0x3fbf9add15df3486, 18, true},
+		{"1234567890123456789", 0x43b12210f47de981, 19, true},
+		{"12345678901234567890", 0x43e56a95319d63e1, 20, true},
+		{"123456789012345678901234567890", 0x45f8ee90ff6c373e, 30, true},
+		{"0.00000000000000000000123456789", 0x3b97520105b1fbe2, 31, true},
+		{"00000000000000001.5", 0x3ff8000000000000, 19, true},
+		{"0000000000000000", 0x0000000000000000, 16, true},
+		{"0.000000000000000000", 0x0000000000000000, 20, true},
+		{"9007199254740993", 0x4340000000000000, 16, true},
+		{"1.00000000000000011102230246251565404236316680908203125", 0x3ff0000000000000, 55, true},
+		{"1_000_000", 0x412e848000000000, 9, true},
+		{"1.000_5", 0x3ff0020c49ba5e35, 7, true},
+		{"1e1_0", 0x4202a05f20000000, 5, true},
+		{"_1", 0x3ff0000000000000, 2, true},
+		{"1_", 0x3ff0000000000000, 2, true},
+		{"1__2.5", 0x4029000000000000, 6, true},
+		{".5", 0x3fe0000000000000, 2, true},
+		{"-.5", 0xbfe0000000000000, 3, true},
+		{"5.", 0x4014000000000000, 2, true},
+		{"+1.5", 0x3ff8000000000000, 4, true},
+		{"1.5 ", 0x3ff8000000000000, 3, false},
+		{"1..5", 0x3ff0000000000000, 2, false},
+		{"1.5.5", 0x3ff8000000000000, 3, false},
+		{".", 0x0000000000000000, 0, false},
+		{"-", 0x0000000000000000, 0, false},
+		{"+", 0x0000000000000000, 0, false},
+		{"", 0x0000000000000000, 0, false},
+		{"e5", 0x0000000000000000, 0, false},
+		{".e5", 0x0000000000000000, 0, false},
+		{"1.5e", 0x0000000000000000, 0, false},
+		{"1.5e+", 0x0000000000000000, 0, false},
+		{"1.5ex", 0x0000000000000000, 0, false},
+		{"1.5E-3", 0x3f589374bc6a7efa, 6, true},
+		{"1e400", 0x7ff0000000000000, 5, false},
+		{"1e-400", 0x0000000000000000, 6, true},
+		{"1e999999999", 0x7ff0000000000000, 11, false},
+		{"-0", 0x8000000000000000, 2, true},
+		{"0x", 0x0000000000000000, 1, false},
+		{"0x1p0", 0x3ff0000000000000, 5, true},
+		{"0xg", 0x0000000000000000, 0, false},
+		{"inf", 0x7ff0000000000000, 3, true},
+		{"-inf", 0xfff0000000000000, 4, true},
+		{"nan", 0x7ff8000000000001, 3, true},
+		{"infinity", 0x7ff0000000000000, 8, true},
+	}
+	for c in cases {
+		n: int
+		f, ok := strconv.parse_f64(c.s, &n)
+		testing.expectf(t, transmute(u64)f == c.bits && n == c.n && ok == c.ok,
+			"%q: got (%016x, n=%d, ok=%v), want (%016x, n=%d, ok=%v)", c.s, transmute(u64)f, n, ok, c.bits, c.n, c.ok)
+	}
+}
+
+@(test)
+test_float_underscore :: proc(t: ^testing.T) {
+	Case :: struct { s: string, bits: u64, n: int, ok: bool }
+	cases := []Case{
+		// Odin literals with the same value.
+		{"1_000_000",                  0x412e848000000000,  9, true},
+		{"1_000.5",                    0x408f440000000000,  7, true},
+		{"1.000_5",                    0x3ff0020c49ba5e35,  7, true},
+		{"1e1_0",                      0x4202a05f20000000,  5, true},
+		{"1_",                         0x3ff0000000000000,  2, true},
+		{"1__2",                       0x4028000000000000,  4, true},
+		{"1_.5",                       0x3ff8000000000000,  4, true},
+		{"1._5",                       0x3ff8000000000000,  4, true},
+		{"1_e5",                       0x40f86a0000000000,  4, true},
+		{"1e5_",                       0x40f86a0000000000,  4, true},
+		{"1.5_",                       0x3ff8000000000000,  4, true},
+		{"0_1.5",                      0x3ff8000000000000,  5, true},
+		{"-1_000.25",                  0xc08f420000000000,  9, true},
+		{"+1_0",                       0x4024000000000000,  4, true},
+		{"1e1_0_0",                    0x54b249ad2594c37d,  7, true},
+		{"1.5e-0_0_3",                 0x3f589374bc6a7efa, 10, true},
+		// Not Odin literals, but strconv accepts them.
+		{"_1",                         0x3ff0000000000000,  2, true},
+		{"-_1.5",                      0xbff8000000000000,  5, true},
+		{"._5",                        0x3fe0000000000000,  3, true},
+		// `_` next to the 8 and 4 digit steps of the fast scanner.
+		{"0.12345678_12345678",        0x3fbf9add15df3486, 19, true},
+		{"1234_5678.8765_4321",        0x41678c29dc0ca459, 19, true},
+		{"0.1_2_3_4_5_6_7_8_9",        0x3fbf9add3739635f, 19, true},
+		// `_` on each conversion path: Eisel-Lemire (17 digits), more than 19 digits
+		// (including leading zeros), and the arbitrary-precision slow path.
+		{"0.123_456_789_012_345_67",   0x3fbf9add3746f65e, 24, true},
+		{"1_234.567_890_123_456e-2_0", 0x3c6c779a3f7ffdf5, 26, true},
+		{"1.797_693_134_862_315_7e3_08", 0x7fefffffffffffff, 28, true},
+		{"9_007_199_254_740_993",      0x4340000000000000, 21, true},
+		{"0_000_000_000_000_000_000_1.5", 0x3ff8000000000000, 29, true},
+		{"0.000_000_000_000_000_000_001_234_567_890_123_456_789", 0x3b97520105bbfffb, 53, true},
+		{"1_234_567_890_123_456_789_012_345",   0x44f056e0f36a6444, 33, true},
+		{"123_456_789_012_345_678_901_234",     0x44ba249b1f10a06d, 31, true},
+		{"0.1_000_000_000_000_000_000_000_001", 0x3fb999999999999a, 35, true},
+		{"9_007_199_254_740_993.000_000_000_000_000_000_1", 0x4340000000000001, 47, true},
+		// The number stops at the first byte that is not a digit, `_`, `.` or an exponent.
+		{"1_000.5x",                   0x408f440000000000,  7, false},
+		{"1_000,5",                    0x408f400000000000,  5, false},
+		{"_",                          0x0000000000000000,  0, false},
+		{"__",                         0x0000000000000000,  0, false},
+	}
+	for c in cases {
+		n: int
+		f, ok := strconv.parse_f64(c.s, &n)
+		testing.expectf(t, transmute(u64)f == c.bits && n == c.n && ok == c.ok,
+			"%q: got (%016x, n=%d, ok=%v), want (%016x, n=%d, ok=%v)", c.s, transmute(u64)f, n, ok, c.bits, c.n, c.ok)
+	}
+
+	Case32 :: struct { s: string, bits: u32 }
+	cases32 := []Case32{
+		{"1_000.5",                      0x447a2000},
+		{"0.123_456_7",                  0x3dfcd6de},
+		{"3.402_823_5e3_8",              0x7f7fffff},
+		{"1.175_494_701_146_903_6e-3_8", 0x00800003}, // parsing as f64 first would give 0x00800002
+	}
+	for c in cases32 {
+		f, ok := strconv.parse_f32(c.s)
+		testing.expectf(t, ok && transmute(u32)f == c.bits, "%q: got %08x (ok=%v), want %08x", c.s, transmute(u32)f, ok, c.bits)
+	}
+}
+
+@(test)
+test_float_hex_scanner :: proc(t: ^testing.T) {
+	// Cover the fast hex scanner
+	Case :: struct { s: string, bits: u64, n: int, ok: bool }
+	cases := []Case{
+		{"0x1.921fb54442d18p+1", 0x400921fb54442d18, 20, true},
+		{"-0x1.921fb54442d18p+1", 0xc00921fb54442d18, 21, true},
+		{"0X1.8P1", 0x4008000000000000, 7, true},
+		{"0x1.8p-1", 0x3fe8000000000000, 8, true},
+		{"0x123456789abcdef0p0", 0x43b23456789abcdf, 20, true},
+		{"0x123456789abcdef08p0", 0x43f23456789abcdf, 21, true},
+		{"0x123456789abcdef01p0", 0x43f23456789abcdf, 21, true},
+		{"0x1.00000000000000001p0", 0x3ff0000000000000, 23, true},
+		{"0x0.000000000000000000000001p0", 0x39f0000000000000, 30, true},
+		{"0x.8p1", 0x3ff0000000000000, 6, true},
+		{"0x1.p1", 0x4000000000000000, 6, true},
+		{"0x00001p4", 0x4030000000000000, 9, true},
+		{"0x1_000p0", 0x40b0000000000000, 9, true},
+		{"0x1.8p1_0", 0x4098000000000000, 9, true},
+		{"0x1.8", 0x0000000000000000, 0, false},
+		{"0x1.8p", 0x0000000000000000, 0, false},
+		{"0x1.8p+", 0x0000000000000000, 0, false},
+		{"0x1..8p1", 0x0000000000000000, 0, false},
+		{"0x", 0x0000000000000000, 1, false},
+		{"0xp1", 0x0000000000000000, 0, false},
+		{"0x.p1", 0x0000000000000000, 0, false},
+		{"0x1.8p1 ", 0x4008000000000000, 7, false},
+		{"0x1p1024", 0x7ff0000000000000, 8, false},
+		{"0x1p-1074", 0x0000000000000001, 9, true},
+		{"0x1p-1076", 0x0000000000000000, 9, true},
+		{"0x1.8p-1075", 0x0000000000000001, 11, true},
+		{"0x1p99999999", 0x7ff0000000000000, 12, false},
+	}
+	for c in cases {
+		n: int
+		f, ok := strconv.parse_f64(c.s, &n)
+		testing.expectf(t, transmute(u64)f == c.bits && n == c.n && ok == c.ok,
+			"%q: got (%016x, n=%d, ok=%v), want (%016x, n=%d, ok=%v)", c.s, transmute(u64)f, n, ok, c.bits, c.n, c.ok)
+	}
+
+	f32v, ok32 := strconv.parse_f32("0x1.000001000000000000001p0")
+	testing.expectf(t, ok32 && transmute(u32)f32v == 0x3f800001, "got %08x (ok=%v), want 3f800001", transmute(u32)f32v, ok32)
+}
+
+@(test)
+test_float_0h :: proc(t: ^testing.T) {
+	// The 0h syntax gives the exact bits of an f16, f32 or f64
+	Case :: struct { s: string, bits: u64, n: int, ok: bool }
+	cases := [?]Case{
+		{"0h9a54fdf3743fd6ab",    0x9a54fdf3743fd6ab, 18, true},
+		{"0h9A54FDF3743FD6AB",    0x9a54fdf3743fd6ab, 18, true},
+		{"0h28e4_8358_c264_335f", 0x28e48358c264335f, 21, true},
+		{"0h3ff0_0000_0000_0000", 0x3ff0000000000000, 21, true},
+		{"0h3f800000",            0x3ff0000000000000, 10, true},
+		{"0h3c00",                0x3ff0000000000000,  6, true},
+		{"0h3c0_0",               0x3ff0000000000000,  7, true},
+		{"0h3ff00000000000001",   0x0000000000000000, 19, false}, // 17 digits
+		{"0h3ff0000000000000g",   0x3ff0000000000000, 18, false},
+		{"0h3ff00000_",           0x3ffe000000000000, 11, true}, // 8 digits: the f32 1.875
+	}
+	for c in cases {
+		n: int
+		f, ok := strconv.parse_f64(c.s, &n)
+		testing.expectf(t, transmute(u64)f == c.bits && n == c.n && ok == c.ok,
+			"%q: got (%016x, n=%d, ok=%v), want (%016x, n=%d, ok=%v)", c.s, transmute(u64)f, n, ok, c.bits, c.n, c.ok)
+	}
+
+	// parse_f32 keeps the exact bits, also for a signaling NaN.
+	f32v, ok32 := strconv.parse_f32("0h7f9a7604")
+	testing.expectf(t, ok32 && transmute(u32)f32v == 0x7f9a7604, "got %08x (ok=%v), want 7f9a7604", transmute(u32)f32v, ok32)
+}

From 2796bf0fd00365ca3ef94e59d7066d587df02d9a Mon Sep 17 00:00:00 2001
From: Ben Botwin <benj@minbot.win>
Date: Tue, 29 Sep 2026 16:58:31 -0400
Subject: [PATCH 060/215] removes private from unmarshal_value for use in user
 unmarshalers

---
 core/encoding/json/unmarshal.odin | 1 -
 1 file changed, 1 deletion(-)

diff --git a/core/encoding/json/unmarshal.odin b/core/encoding/json/unmarshal.odin
index 0f8c19b5d..7919ac9fd 100644
--- a/core/encoding/json/unmarshal.odin
+++ b/core/encoding/json/unmarshal.odin
@@ -358,7 +358,6 @@ unmarshal_string_token :: proc(p: ^Parser, val: any, token: Token, ti: ^reflect.
 	return false, nil
 }
 
-@(private)
 unmarshal_value :: proc(p: ^Parser, v: any) -> (err: Unmarshal_Error) {
 	UNSUPPORTED_TYPE := Unsupported_Type_Error{v.id, p.curr_token}
 	token := p.curr_token

From db46204e388ebc63df20fcb8cb3e4bc835a3f2a1 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Tue, 29 Sep 2026 19:22:01 -0400
Subject: [PATCH 061/215] Catch calls of a deferred out proc in short circuits
 during check

---
 src/check_expr.cpp                     | 21 +++++++++++++++++++
 src/check_stmt.cpp                     |  3 +++
 tests/issues/run.bat                   |  1 +
 tests/issues/run.sh                    |  6 ++++++
 tests/issues/test_issue_5105_5569.odin | 29 ++++++++++++++++++++++++++
 5 files changed, 60 insertions(+)
 create mode 100644 tests/issues/test_issue_5105_5569.odin

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 248e9f146..dc173e8a1 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -9081,6 +9081,17 @@ gb_internal ExprKind check_call_expr(CheckerContext *c, Operand *operand, Ast *c
 	gb_zero_item(operand);
 	operand->expr = call;
 
+	if ((call->viral_state_flags & ViralStateFlag_ContainsDeferredProcedure) == 0) {
+		// NOTE: which procedure of a group is called is only known once its arguments are checked
+		Entity *e = entity_of_node(call->CallExpr.proc);
+		if (e != nullptr && e->kind == Entity_Procedure && e->Procedure.deferred_procedure.entity != nullptr) {
+			call->viral_state_flags |= ViralStateFlag_ContainsDeferredProcedure;
+			if (c->decl) {
+				c->decl->defer_used += 1;
+			}
+		}
+	}
+
 	if (result_type == t_invalid) {
 		operand->mode = Addressing_Invalid;
 		operand->type = t_invalid;
@@ -10110,6 +10121,13 @@ gb_internal ExprKind check_ternary_if_expr(CheckerContext *c, Operand *o, Ast *n
 		return kind;
 	}
 
+	if (te->x->viral_state_flags & ViralStateFlag_ContainsDeferredProcedure) {
+		error(te->x, "Procedure calls that have an associated deferred procedure are not allowed within ternary expressions");
+	}
+	if (te->y->viral_state_flags & ViralStateFlag_ContainsDeferredProcedure) {
+		error(te->y, "Procedure calls that have an associated deferred procedure are not allowed within ternary expressions");
+	}
+
 	if (x.mode == Addressing_Type || y.mode == Addressing_Type) {
 		Ast *type_expr = (x.mode == Addressing_Type) ? x.expr : y.expr;
 		gbString type_string = expr_to_string(type_expr);
@@ -10282,6 +10300,9 @@ gb_internal ExprKind check_or_else_expr(CheckerContext *c, Operand *o, Ast *node
 
 	bool y_is_diverging = false;
 	check_expr_base(c, &y, default_value, left_type);
+	if (default_value->viral_state_flags & ViralStateFlag_ContainsDeferredProcedure) {
+		error(default_value, "Procedure calls that have an associated deferred procedure are not allowed on the right-hand side of 'or_else'");
+	}
 	switch (y.mode) {
 	case Addressing_NoValue:
 		if (is_diverging_expr(y.expr)) {
diff --git a/src/check_stmt.cpp b/src/check_stmt.cpp
index 713c19239..ef7c02a2c 100644
--- a/src/check_stmt.cpp
+++ b/src/check_stmt.cpp
@@ -1315,6 +1315,9 @@ gb_internal void check_switch_stmt(CheckerContext *ctx, Ast *node, u32 mod_flags
 				} else {
 					check_expr_with_type_hint(ctx, &y, expr, x.type);
 				}
+				if (expr->viral_state_flags & ViralStateFlag_ContainsDeferredProcedure) {
+					error(expr, "Procedure calls that have an associated deferred procedure are not allowed within case clauses");
+				}
 
 				if (x.mode == Addressing_Invalid ||
 				    y.mode == Addressing_Invalid) {
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index a672af123..a120d2c93 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -25,6 +25,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin build ..\test_issue_5043.odin %COMMON% || exit /b
 ..\..\..\odin build ..\test_issue_5097.odin %COMMON% || exit /b
 ..\..\..\odin build ..\test_issue_5097-2.odin %COMMON% || exit /b
+..\..\..\odin check ..\test_issue_5105_5569.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "4" || exit /b
 ..\..\..\odin build ..\test_issue_5265.odin %COMMON% || exit /b
 ..\..\..\odin test ..\test_issue_5318.odin %COMMON%  || exit /b
 ..\..\..\odin build ..\test_issue_5573.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 68b10fcdc..9018f9c16 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -32,6 +32,12 @@ fi
 $ODIN build ../test_issue_5043.odin $COMMON
 $ODIN build ../test_issue_5097.odin $COMMON
 $ODIN build ../test_issue_5097-2.odin $COMMON
+if [[ $($ODIN check ../test_issue_5105_5569.odin $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 4 ]]; then
+	echo "SUCCESSFUL 1/1"
+else
+	echo "SUCCESSFUL 0/1"
+	exit 1
+fi
 $ODIN build ../test_issue_5265.odin $COMMON
 $ODIN test ../test_issue_5318.odin $COMMON
 if [[ $($ODIN build ../test_issue_5573.odin $COMMON 2>&1 >/dev/null | grep -c "Error:") -eq 2 ]]; then
diff --git a/tests/issues/test_issue_5105_5569.odin b/tests/issues/test_issue_5105_5569.odin
new file mode 100644
index 000000000..27603183c
--- /dev/null
+++ b/tests/issues/test_issue_5105_5569.odin
@@ -0,0 +1,29 @@
+// Tests issues #5105 https://github.com/odin-lang/Odin/issues/5105
+// and #5569 https://github.com/odin-lang/Odin/issues/5569
+package test_issues
+
+import "core:sync"
+
+// A procedure call with a deferred procedure is not allowed where it may not be evaluated.
+// The associated deferred procedure would be called at the end of the scope regardless.
+
+@(deferred_out = finish)
+start :: proc(x: int) -> int { return x }
+finish :: proc(_: int) {}
+
+maybe :: proc(x: int) -> (int, bool) { return x, x > 0 }
+
+m: sync.Mutex
+
+main :: proc() {
+	flag := true
+
+	_ = start(1) if flag else 2    // Error
+	_ = maybe(1) or_else start(2)  // Error
+	switch {
+	case flag, start(3) > 0:       // Error
+	}
+	if flag && sync.guard(&m) {}   // Error, `sync.guard` is a procedure group
+
+	_ = start(4) + 1
+}

From 92bf89950c6287ace50f749b405d2afcdbeee748 Mon Sep 17 00:00:00 2001
From: Yawning Angel <yawning@schwanenlied.me>
Date: Wed, 30 Sep 2026 11:53:54 +0900
Subject: [PATCH 062/215] examples/all: Add entries for `crypto/x509`

---
 examples/all/all_js.odin   | 1 +
 examples/all/all_main.odin | 1 +
 2 files changed, 2 insertions(+)

diff --git a/examples/all/all_js.odin b/examples/all/all_js.odin
index 10d2595a0..78cc4629f 100644
--- a/examples/all/all_js.odin
+++ b/examples/all/all_js.odin
@@ -57,6 +57,7 @@ package all
 @(require) import "core:crypto/tuplehash"
 @(require) import "core:crypto/x25519"
 @(require) import "core:crypto/x448"
+@(require) import "core:crypto/x509"
 
 @(require) import "core:debug/pe"
 @(require) import "core:debug/trace"
diff --git a/examples/all/all_main.odin b/examples/all/all_main.odin
index 2275f1d7f..a931209d9 100644
--- a/examples/all/all_main.odin
+++ b/examples/all/all_main.odin
@@ -62,6 +62,7 @@ package all
 @(require) import "core:crypto/tuplehash"
 @(require) import "core:crypto/x25519"
 @(require) import "core:crypto/x448"
+@(require) import "core:crypto/x509"
 
 @(require) import "core:debug/pe"
 @(require) import "core:debug/trace"

From c25e7cb3bcd42cf0067182f6e5d2eb8f0e4fc812 Mon Sep 17 00:00:00 2001
From: Yawning Angel <yawning@schwanenlied.me>
Date: Wed, 30 Sep 2026 11:56:30 +0900
Subject: [PATCH 063/215] core/crypto/aegis: AEGIS is RFC 10032 now

---
 core/crypto/aegis/aegis.odin | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/core/crypto/aegis/aegis.odin b/core/crypto/aegis/aegis.odin
index 5aee61767..fec3483f4 100644
--- a/core/crypto/aegis/aegis.odin
+++ b/core/crypto/aegis/aegis.odin
@@ -4,7 +4,7 @@
 Where AEAD stands for Authenticated Encryption with Additional Data.
 
 See:
-- [[ https://www.ietf.org/archive/id/draft-irtf-cfrg-aegis-aead-12.txt ]]
+- [[ https://www.rfc-editor.org/rfc/rfc10032 ]]
 */
 package aegis
 

From a9a4d11ac0eb8b2c6611068553f5dff946d8bd50 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 11:56:24 +0100
Subject: [PATCH 064/215] Add a suggestion for the bit_set backing type

---
 src/check_type.cpp | 95 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 95 insertions(+)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index b48a6c8ae..cec9eb812 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1311,6 +1311,91 @@ gb_internal bool is_type_valid_bit_set_range(Type *t) {
 	return false;
 }
 
+gb_internal Type *narrowest_integer_type_for_bits(Type *like, i64 needed_bits) {
+	if (needed_bits > 128) {
+		return nullptr;
+	}
+
+	bool is_unsigned = is_type_unsigned(like);
+	bool little = false;
+	bool big    = false;
+
+	Type *bt = core_type(like);
+	if (bt != nullptr && bt->kind == Type_Basic) {
+		little = (bt->Basic.flags & BasicFlag_EndianLittle) != 0;
+		big    = (bt->Basic.flags & BasicFlag_EndianBig)    != 0;
+	}
+
+	Type *native_u[] = {t_u8, t_u16,   t_u32,   t_u64,   t_u128};
+	Type *native_i[] = {t_i8, t_i16,   t_i32,   t_i64,   t_i128};
+	Type *little_u[] = {      t_u16le, t_u32le, t_u64le, t_u128le};
+	Type *little_i[] = {      t_i16le, t_i32le, t_i64le, t_i128le};
+	Type *big_u[]    = {      t_u16be, t_u32be, t_u64be, t_u128be};
+	Type *big_i[]    = {      t_i16be, t_i32be, t_i64be, t_i128be};
+
+	Type **candidates = native_u;
+	isize candidate_count = gb_count_of(native_u);
+	if (little) {
+		candidates      = is_unsigned ? little_u : little_i;
+		candidate_count = is_unsigned ? gb_count_of(little_u) : gb_count_of(little_i);
+	} else if (big) {
+		candidates      = is_unsigned ? big_u : big_i;
+		candidate_count = is_unsigned ? gb_count_of(big_u) : gb_count_of(big_i);
+	} else {
+		candidates      = is_unsigned ? native_u : native_i;
+		candidate_count = is_unsigned ? gb_count_of(native_u) : gb_count_of(native_i);
+	}
+
+	for (isize i = 0; i < candidate_count; i++) {
+		if (8*type_size_of(candidates[i]) >= needed_bits) {
+			return candidates[i];
+		}
+	}
+	return nullptr;
+}
+
+gb_internal void suggest_bit_set_backing_type(Ast *elem, Type *underlying, i64 upper, bool note_lower_bound_forced) {
+	i64 const needed_bits = upper + 1;
+
+	Type *unit = t_u64;
+	if (underlying != nullptr) {
+		Type *bt = base_type(underlying);
+		unit = (bt->kind == Type_Array) ? bt->Array.elem : underlying;
+	}
+	i64 const unit_bits = 8*type_size_of(unit);
+	i64 const count = unit_bits > 0 ? (needed_bits + unit_bits - 1) / unit_bits : 1;
+
+	Type *scalar = narrowest_integer_type_for_bits(unit, needed_bits);
+	bool  show_scalar = scalar != nullptr;
+	bool  show_array  = count >= 2;
+
+	gbString es = expr_to_string(elem);
+	gbString us = type_to_string(unit);
+
+	char const *lead = underlying != nullptr
+		? "\tSuggestion: A larger backing type is required, e.g. "
+		: "\tSuggestion: An explicit backing integer or array type may be specified to allow for a larger range, e.g. ";
+
+	if (show_scalar && show_array) {
+		gbString ss = type_to_string(scalar);
+		error_line("%s'bit_set[%s; %s]' or 'bit_set[%s; [%lld]%s]'\n", lead, es, ss, es, cast(long long)count, us);
+		gb_string_free(ss);
+	} else if (show_scalar) {
+		gbString ss = type_to_string(scalar);
+		error_line("%s'bit_set[%s; %s]'\n", lead, es, ss);
+		gb_string_free(ss);
+	} else {
+		error_line("%s'bit_set[%s; [%lld]%s]'\n", lead, es, cast(long long)count, us);
+	}
+
+	if (note_lower_bound_forced) {
+		error_line("\t            Note: an explicit backing type forces the lower bound of the bit_set to be 0\n");
+	}
+
+	gb_string_free(us);
+	gb_string_free(es);
+}
+
 gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_type, Ast *node) {
 	ast_node(bs, BitSetType, node);
 	GB_ASSERT(type->kind == Type_BitSet);
@@ -1450,10 +1535,15 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 			break;
 		}
 		if (!is_valid) {
+			ERROR_BLOCK();
 			if (actual_lower != lower) {
 				error(bs->elem, "bit_set range is greater than %lld bits, %lld bits are required (internally the lower bound was changed to 0 as an underlying type was set)", cast(long long)bits, cast(long long)bits_required);
+				suggest_bit_set_backing_type(bs->elem, type->BitSet.underlying, upper, /*note_lower_bound_forced*/false);
 			} else {
 				error(bs->elem, "bit_set range is greater than %lld bits, %lld bits are required", cast(long long)bits, cast(long long)bits_required);
+				if (lower >= 0) {
+					suggest_bit_set_backing_type(bs->elem, type->BitSet.underlying, upper, /*note_lower_bound_forced*/lower > 0);
+				}
 			}
 		}
 		
@@ -1519,11 +1609,16 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 				}
 
 				if (upper - lower >= bits) {
+					ERROR_BLOCK();
 					i64 bits_required = upper-lower+1;
 					if (lower_changed) {
 						error(bs->elem, "bit_set range is greater than %lld bits, %lld bits are required (internally the lower bound was changed to 0 as an underlying type was set)", cast(long long)bits, cast(long long)bits_required);
+						suggest_bit_set_backing_type(bs->elem, type->BitSet.underlying, upper, /*note_lower_bound_forced*/false);
 					} else {
 						error(bs->elem, "bit_set range is greater than %lld bits, %lld bits are required", cast(long long)bits, cast(long long)bits_required);
+						if (lower >= 0) {
+							suggest_bit_set_backing_type(bs->elem, type->BitSet.underlying, upper, /*note_lower_bound_forced*/lower > 0);
+						}
 					}
 				}
 

From 3f60ed743ef3f1f5577d221a887df85e49c38dd9 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Sat, 26 Sep 2026 22:13:09 -0400
Subject: [PATCH 065/215] Fix casts between nested arrays of the same depth

---
 src/llvm_backend_expr.cpp              |  4 ++--
 src/types.cpp                          |  9 +++++++++
 tests/issues/run.bat                   |  1 +
 tests/issues/run.sh                    |  1 +
 tests/issues/test_issue_7477_7506.odin | 19 +++++++++++++++++++
 5 files changed, 32 insertions(+), 2 deletions(-)
 create mode 100644 tests/issues/test_issue_7477_7506.odin

diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index 23a51d31a..0e90d8d74 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -3052,9 +3052,9 @@ gb_internal lbValue lb_emit_conv(lbProcedure *p, lbValue value, Type *t) {
 	if (is_type_array(dst) && is_type_array(src)) {
 		Type *dst_elem = base_array_type(dst);
 		Type *src_elem = base_array_type(src);
+		// NOTE: only arrays nested equally deep convert element by element, a shallower one is broadcast (See #6642)
 		if (dst->Array.count == src->Array.count &&
-		    !is_type_array_like(dst->Array.elem) &&
-		    !is_type_array_like(src->Array.elem)) {
+		    type_array_depth(dst) == type_array_depth(src)) {
 			if (are_types_identical(dst_elem, src_elem)) {
 				lbValue v = value;
 				v.type = t;
diff --git a/src/types.cpp b/src/types.cpp
index 2d43a07f5..d39fcb901 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -1958,6 +1958,15 @@ gb_internal Type *core_broadcastable_elem_type(Type *t) {
 	return t;
 }
 
+gb_internal i32 type_array_depth(Type *t) {
+	i32 depth = 0;
+	while (is_type_array_like(t)) {
+		t = base_array_type(t);
+		depth += 1;
+	}
+	return depth;
+}
+
 gb_internal i32 type_math_rank(Type *t) {
 	i32 rank = 0;
 	for (;;) {
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index dd101297e..1611bfecf 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -66,6 +66,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_lifetime_markers.odin %COMMON% -o:size -lifetime-markers  || exit /b
 ..\..\..\odin test ..\test_lifetime_markers.odin %COMMON% -o:speed -lifetime-markers  || exit /b
 ..\..\..\odin test ..\test_issue_7547.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_7477_7506.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7482.odin %COMMON% || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local -o:speed || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 5508b07cf..f1ab0d409 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -99,6 +99,7 @@ $ODIN check ../test_issue_6979.odin -no-entry-point $COMMON_CHECK
 $ODIN test ../test_issue_7008.odin $COMMON
 $ODIN check ../test_issue_7012.odin -no-entry-point $COMMON_CHECK
 $ODIN build ../test_issue_7037.odin $COMMON -o:none
+$ODIN test ../test_issue_7477_7506.odin $COMMON
 $ODIN run ../test_issue_7482.odin $COMMON
 $ODIN run ../test_issue_7564.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
diff --git a/tests/issues/test_issue_7477_7506.odin b/tests/issues/test_issue_7477_7506.odin
new file mode 100644
index 000000000..9dd9df3f9
--- /dev/null
+++ b/tests/issues/test_issue_7477_7506.odin
@@ -0,0 +1,19 @@
+// Tests issues #7477 https://github.com/odin-lang/Odin/issues/7477
+// and #7506 https://github.com/odin-lang/Odin/issues/7506
+package test_issues
+
+import "core:testing"
+
+@(test)
+test_issue_7477_7506 :: proc(t: ^testing.T) {
+	a := [2][2]i32{{1, 2}, {3, 4}}
+	testing.expect_value(t, cast([2][2]int)a, [2][2]int{{1, 2}, {3, 4}})
+
+	b := [2][2]u64{{1, 2}, {3, 4}}
+	testing.expect_value(t, cast([2][2]f64)b, [2][2]f64{{1, 2}, {3, 4}})
+
+	// a shallower array is still broadcast to every element (#6642)
+	c := [2]f32{1, 2}
+	d: [2][2]f32 = c
+	testing.expect_value(t, d, [2][2]f32{{1, 2}, {1, 2}})
+}

From 781d9cbd8b4c9556fd0fcc1ad07c7f17703881e9 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 14:39:47 +0100
Subject: [PATCH 066/215] parapoly: fix proc-cache race, record ABBA deadlock,
 and over-eager poly matching

Three fixes to the parametric-polymorphism checker.

src/check_expr.cpp
- find_or_generate_polymorphic_procedure: close a check-then-act race in the
  generated-procedure cache. Both lookups ran under a shared lock that was
  released before the insert, so two threads instantiating the same
  specialization could both miss and each publish a distinct entity. Re-check
  under the exclusive lock, now held across construction and the array_add so
  find-then-publish is atomic. Factor the reuse path into
  reuse_gen_polymorphic_procedure.
- is_polymorphic_type_assignable: require BOTH components to match for maps and
  enumerated arrays (|| -> &&). The old || accepted e.g. map[int]$V against
  map[string]f32 (binding $V and deferring the key mismatch to a confusing
  assignment error); it now fails cleanly at inference. Both sides are still
  evaluated, so modify_type side effects are unchanged.

src/check_type.cpp, src/check_expr.cpp
- check_struct_type: release the originating record's gen_types mutex right after
  the instantiation is published, before checking its fields. Holding it across
  field-checking (which instantiates other records) allowed a cross-record ABBA
  deadlock between mutually-recursive generic structs instantiated concurrently;
  concurrent finders now synchronize via the existing fields_wait_signal.
  Canonicalize the instantiation name before publishing
  (set_polymorphic_record_instantiation_name) so the early release cannot expose
  a torn Named.name. Unions are left unchanged: they lack a variants-ready
  signal, so early release is not yet safe for them.
---
 src/check_expr.cpp | 138 +++++++++++++++++++++++----------------------
 src/check_type.cpp |  64 ++++++++++++++++++++-
 2 files changed, 134 insertions(+), 68 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 13b578084..73c224e2b 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -92,7 +92,8 @@ gb_internal void     check_init_constant            (CheckerContext *c, Entity *
 gb_internal bool     check_representable_as_constant(CheckerContext *c, ExactValue in_value, Type *type, ExactValue *out_value);
 gb_internal bool     check_procedure_type           (CheckerContext *c, Type *type, Ast *proc_type_node, Array<Operand> const *operands = nullptr);
 gb_internal void     check_struct_type              (CheckerContext *c, Type *struct_type, Ast *node, Array<Operand> *poly_operands,
-                                                     Type *named_type = nullptr, Type *original_type_for_poly = nullptr);
+                                                     Type *named_type = nullptr, Type *original_type_for_poly = nullptr,
+                                                     GenTypesData *poly_gen_types_to_unlock = nullptr);
 gb_internal void     check_union_type               (CheckerContext *c, Type *union_type, Ast *node, Array<Operand> *poly_operands,
                                                      Type *named_type = nullptr, Type *original_type_for_poly = nullptr);
 
@@ -387,6 +388,31 @@ gb_internal void check_scope_decls(CheckerContext *c, Slice<Ast *> const &nodes,
 	}
 }
 
+// NOTE(bill): Reuse an already-generated polymorphic procedure specialization `other`.
+// Records it as the result and, if its body has not been checked yet, schedules it.
+// The caller must have released `gen_procs->mutex` before calling this (it queues work).
+gb_internal bool reuse_gen_polymorphic_procedure(Checker *checker, Entity *other, Ast *poly_def_node, PolyProcData *poly_proc_data) {
+	if (poly_proc_data) {
+		poly_proc_data->gen_entity = other;
+	}
+
+	DeclInfo *decl = other->decl_info;
+	if (decl->proc_checked_state != ProcCheckedState_Checked) {
+		ProcInfo *proc_info = permanent_alloc_item<ProcInfo>();
+		proc_info->file  = other->file;
+		proc_info->token = other->token;
+		proc_info->decl  = decl;
+		proc_info->type  = other->type;
+		proc_info->body  = decl->proc_lit->ProcLit.body;
+		proc_info->tags  = other->Procedure.tags;
+		proc_info->generated_from_polymorphic = true;
+		proc_info->poly_def_node = poly_def_node;
+
+		check_procedure_later(checker, proc_info);
+	}
+	return true;
+}
+
 gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, Entity *base_entity, Type *type,
                                                         Array<Operand> const *param_operands, Ast *poly_def_node, PolyProcData *poly_proc_data) {
 	///////////////////////////////////////////////////////////////////////////////
@@ -551,33 +577,28 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 			Type *pt = base_type(other->type);
 			if (are_types_identical(pt, final_proc_type)) {
 				rw_mutex_shared_unlock(&gen_procs->mutex); // @local-mutex
-
-				if (poly_proc_data) {
-					poly_proc_data->gen_entity = other;
-				}
-
-				DeclInfo *decl = other->decl_info;
-				if (decl->proc_checked_state != ProcCheckedState_Checked) {
-					ProcInfo *proc_info = permanent_alloc_item<ProcInfo>();
-					proc_info->file  = other->file;
-					proc_info->token = other->token;
-					proc_info->decl  = decl;
-					proc_info->type  = other->type;
-					proc_info->body  = decl->proc_lit->ProcLit.body;
-					proc_info->tags  = other->Procedure.tags;;
-					proc_info->generated_from_polymorphic = true;
-					proc_info->poly_def_node = poly_def_node;
-
-					check_procedure_later(nctx.checker, proc_info);
-				}
-
-				return true;
+				return reuse_gen_polymorphic_procedure(nctx.checker, other, poly_def_node, poly_proc_data);
 			}
 		}
 		rw_mutex_shared_unlock(&gen_procs->mutex); // @local-mutex
 	}
 
 
+	// NOTE(bill): The two lookups above ran under a shared lock which was then released, so a
+	// concurrent instantiation of this same specialization could have been published in the gap.
+	// Acquire the exclusive lock now and hold it across the re-check below and the array_add at the
+	// end, so that finding-then-publishing is atomic. Without this, two threads racing on the same
+	// specialization could both miss and each build and enqueue a distinct entity for it. The lock
+	// is only released here on an early return (a late-arriving duplicate); the normal path releases
+	// it after publishing. (@local-mutex)
+	rw_mutex_lock(&gen_procs->mutex); // @local-mutex
+	for (Entity *other : gen_procs->procs) {
+		if (are_types_identical(base_type(other->type), final_proc_type)) {
+			rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
+			return reuse_gen_polymorphic_procedure(nctx.checker, other, poly_def_node, poly_proc_data);
+		}
+	}
+
 	Ast *proc_lit = clone_ast(old_decl->proc_lit);
 	ast_node(pl, ProcLit, proc_lit);
 	// NOTE(bill): Associate the scope declared above withinth this procedure declaration's type
@@ -648,8 +669,9 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 		}
 	}
 
-	rw_mutex_lock(&gen_procs->mutex); // @local-mutex
-		array_add(&gen_procs->procs, entity);
+	// NOTE(bill): The exclusive lock has been held since just before construction (see above),
+	// so this publish is atomic with the re-check that preceded it.
+	array_add(&gen_procs->procs, entity);
 	rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
 
 	ProcInfo *proc_info = permanent_alloc_item<ProcInfo>();
@@ -1604,9 +1626,13 @@ gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, T
 				}
 				return is_polymorphic_type_assignable(c, poly->EnumeratedArray.index, source->EnumeratedArray.index, true, modify_type);
 			}
+			// NOTE(bill): Both are evaluated (not short-circuited) so their modify_type side effects
+			// are applied, but both the index and the element must match for the pattern to hold.
+			// A previous `index || elem` here over-accepted (e.g. `[Dir]$T` vs `[Other]f32`), binding
+			// `$T` and leaving the index mismatch to be reported later as a confusing assignment error.
 			bool index = is_polymorphic_type_assignable(c, poly->EnumeratedArray.index, source->EnumeratedArray.index, true, modify_type);
 			bool elem  = is_polymorphic_type_assignable(c, poly->EnumeratedArray.elem, source->EnumeratedArray.elem, true, modify_type);
-			return index || elem;
+			return index && elem;
 		}
 		return false;
 
@@ -1777,9 +1803,14 @@ gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, T
 		return false;
 	case Type_Map:
 		if (source->kind == Type_Map) {
+			// NOTE(bill): Both are evaluated (not short-circuited) so their modify_type side effects
+			// are applied, but both the key and the value must match for the pattern to hold. A
+			// previous `key || value` here over-accepted (e.g. `map[int]$V` vs `map[string]f32`),
+			// binding `$V` and leaving the key mismatch to be reported later as a confusing
+			// assignment error, and would finalize a map that was only partially matched.
 			bool key   = is_polymorphic_type_assignable(c, poly->Map.key, source->Map.key, true, modify_type);
 			bool value = is_polymorphic_type_assignable(c, poly->Map.value, source->Map.value, true, modify_type);
-			if (key || value) {
+			if (key && value) {
 				if (modify_type) {
 					poly->Map.lookup_result_type = nullptr;
 					init_map_internal_types(poly);
@@ -8730,7 +8761,13 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 	{
 		GenTypesData *found_gen_types = ensure_polymorphic_record_entity_has_gen_types(c, original_type);
 		mutex_lock(&found_gen_types->mutex);
-		defer (mutex_unlock(&found_gen_types->mutex));
+		// NOTE(bill): For a struct instantiation, check_struct_type releases this mutex early (right
+		// after publishing the instantiation into gen_types, before checking its fields) to avoid a
+		// cross-record ABBA deadlock between mutually-recursive generic records; it signals that by
+		// leaving `gen_types_locked` cleared below. The union path and the cache-hit path keep the
+		// mutex until the end of this scope.
+		bool gen_types_locked = true;
+		defer (if (gen_types_locked) mutex_unlock(&found_gen_types->mutex));
 
 		Entity *found_entity = find_polymorphic_record_entity(found_gen_types, param_count, ordered_operands);
 		if (found_entity) {
@@ -8756,7 +8793,9 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 			set_base_type(named_type, struct_type);
 
 			check_open_scope(&ctx, node);
-			check_struct_type(&ctx, struct_type, node, &ordered_operands, named_type, original_type);
+			check_struct_type(&ctx, struct_type, node, &ordered_operands, named_type, original_type, found_gen_types);
+			// check_struct_type released found_gen_types->mutex after publishing the instantiation.
+			gen_types_locked = false;
 			check_close_scope(&ctx);
 		} else if (bt->kind == Type_Union) {
 			Ast *node = clone_ast(bt->Union.node);
@@ -8772,45 +8811,10 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 			GB_PANIC("Unsupported parametric polymorphic record type");
 		}
 
-
-		bt = base_type(named_type);
-		if (bt->kind == Type_Struct || bt->kind == Type_Union) {
-			GB_ASSERT(original_type->kind == Type_Named);
-			Entity *e = original_type->Named.type_name;
-			GB_ASSERT(e->kind == Entity_TypeName);
-
-			gbString s = gb_string_make_reserve(heap_allocator(), e->token.string.len+3);
-			s = gb_string_append_fmt(s, "%.*s(", LIT(e->token.string));
-
-			TypeTuple *tuple = get_record_polymorphic_params(bt);
-			if (tuple != nullptr) for_array(i, tuple->variables) {
-				Entity *v = tuple->variables[i];
-				String name = v->token.string;
-				if (i > 0) {
-					s = gb_string_append_fmt(s, ", ");
-				}
-				s = gb_string_append_fmt(s, "$%.*s", LIT(name));
-
-				if (v->kind == Entity_TypeName) {
-					if (v->type != nullptr && v->type->kind != Type_Generic) {
-						s = gb_string_append_fmt(s, "=");
-						s = write_type_to_string(s, v->type, false);
-					}
-				} else if (v->kind == Entity_Constant) {
-					if (v->Constant.value.kind != ExactValue_Invalid) {
-						s = gb_string_append_fmt(s, "=");
-						s = write_exact_value_to_string(s, v->Constant.value);
-					}
-				}
-			}
-			s = gb_string_append_fmt(s, ")");
-
-			String new_name = make_string_c(s);
-			named_type->Named.name = new_name;
-			if (named_type->Named.type_name) {
-				named_type->Named.type_name->token.string = new_name;
-			}
-		}
+		// NOTE(bill): The instantiation's canonical name is now set inside
+		// check_struct_type/check_union_type (before it is published into gen_types), so that a
+		// concurrent thread which finds the in-progress struct instantiation never observes a
+		// torn name.
 
 		operand->mode = Addressing_Type;
 		operand->type = named_type;
diff --git a/src/check_type.cpp b/src/check_type.cpp
index cec9eb812..bdc211a76 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -662,7 +662,54 @@ gb_internal Entity *find_polymorphic_record_entity(GenTypesData *found_gen_types
 };
 
 
-gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *node, Array<Operand> *poly_operands, Type *named_type, Type *original_type_for_poly) {
+// NOTE(bill): Give a freshly-instantiated polymorphic record its canonical name
+// (e.g. `Foo($T=int, $N=4)`). This depends only on the record's polymorphic parameters, so it
+// must be called *before* the instantiation is published into gen_types via
+// add_polymorphic_record_entity: once published, a concurrent thread may read the name, and
+// mutating the `Named.name` String in place afterwards would be a torn read.
+gb_internal void set_polymorphic_record_instantiation_name(Type *named_type, Type *original_type) {
+	Type *bt = base_type(named_type);
+	if (bt->kind != Type_Struct && bt->kind != Type_Union) {
+		return;
+	}
+	GB_ASSERT(original_type->kind == Type_Named);
+	Entity *e = original_type->Named.type_name;
+	GB_ASSERT(e->kind == Entity_TypeName);
+
+	gbString s = gb_string_make_reserve(heap_allocator(), e->token.string.len+3);
+	s = gb_string_append_fmt(s, "%.*s(", LIT(e->token.string));
+
+	TypeTuple *tuple = get_record_polymorphic_params(bt);
+	if (tuple != nullptr) for_array(i, tuple->variables) {
+		Entity *v = tuple->variables[i];
+		String name = v->token.string;
+		if (i > 0) {
+			s = gb_string_append_fmt(s, ", ");
+		}
+		s = gb_string_append_fmt(s, "$%.*s", LIT(name));
+
+		if (v->kind == Entity_TypeName) {
+			if (v->type != nullptr && v->type->kind != Type_Generic) {
+				s = gb_string_append_fmt(s, "=");
+				s = write_type_to_string(s, v->type, false);
+			}
+		} else if (v->kind == Entity_Constant) {
+			if (v->Constant.value.kind != ExactValue_Invalid) {
+				s = gb_string_append_fmt(s, "=");
+				s = write_exact_value_to_string(s, v->Constant.value);
+			}
+		}
+	}
+	s = gb_string_append_fmt(s, ")");
+
+	String new_name = make_string_c(s);
+	named_type->Named.name = new_name;
+	if (named_type->Named.type_name) {
+		named_type->Named.type_name->token.string = new_name;
+	}
+}
+
+gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *node, Array<Operand> *poly_operands, Type *named_type, Type *original_type_for_poly, GenTypesData *poly_gen_types_to_unlock) {
 	GB_ASSERT(is_type_struct(struct_type));
 	ast_node(st, StructType, node);
 
@@ -704,7 +751,20 @@ gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *
 	struct_type->Struct.is_poly_specialized = check_record_poly_operand_specialization(ctx, struct_type, poly_operands, &struct_type->Struct.is_polymorphic);
 	if (original_type_for_poly) {
 		GB_ASSERT(named_type != nullptr);
+		// Finalize the name before publishing so no concurrent reader observes a torn name.
+		set_polymorphic_record_instantiation_name(named_type, original_type_for_poly);
 		add_polymorphic_record_entity(ctx, node, named_type, original_type_for_poly);
+
+		// NOTE(bill): This instantiation is now published in the originating record's gen_types
+		// cache (its polymorphic params are set and signalled above), so a concurrent thread can
+		// find it via find_polymorphic_record_entity and synchronize on the fields_wait_signal
+		// below when it needs the layout. Release the caller-held gen_types mutex here, *before*
+		// checking the fields: field checking can instantiate other polymorphic records (locking
+		// their gen_types mutexes), and holding this one across that is what allows a cross-record
+		// ABBA deadlock between two mutually-recursive generic records instantiated concurrently.
+		if (poly_gen_types_to_unlock != nullptr) {
+			mutex_unlock(&poly_gen_types_to_unlock->mutex);
+		}
 	}
 
 	if (!struct_type->Struct.is_polymorphic) {
@@ -791,6 +851,8 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 	union_type->Union.is_poly_specialized = check_record_poly_operand_specialization(ctx, union_type, poly_operands, &union_type->Union.is_polymorphic);
 	if (original_type_for_poly) {
 		GB_ASSERT(named_type != nullptr);
+		// Finalize the name before publishing (see set_polymorphic_record_instantiation_name).
+		set_polymorphic_record_instantiation_name(named_type, original_type_for_poly);
 		add_polymorphic_record_entity(ctx, node, named_type, original_type_for_poly);
 	}
 

From 98fd36b0e7666065b4c47f4a28133148e5fd37fa Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 14:49:11 +0100
Subject: [PATCH 067/215] Fix `[$E]$T` bug where you need to capture
 polymorphic element node before rewriting the `poly` in place

---
 src/check_expr.cpp | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 73c224e2b..e62e1e689 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -1586,12 +1586,21 @@ gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, T
 						return is_polymorphic_type_assignable(c, poly->Array.elem, source->EnumeratedArray.elem, true, false);
 					}
 
+					// NOTE(bill): Capture the polymorphic element node ($T) before rewriting `poly`
+					// in place. Array.elem and EnumeratedArray.elem share the same union offset, so
+					// assigning EnumeratedArray.elem below would otherwise clobber the pointer to the
+					// shared $T generic node, and the element-binding recursion at the end would
+					// compare concrete-vs-concrete and never bind $T (leaving it unresolved in the
+					// procedure body). Keeping the node lets that recursion mutate it in place, just
+					// like the fixed-array branch above.
+					Type *poly_elem = poly->Array.elem;
+
 					poly->kind = Type_EnumeratedArray;
 					poly->cached_size  = -1;
 					poly->cached_align = -1;
 					poly->flags.exchange(source->flags);
 					poly->failure      = false;
-					poly->EnumeratedArray.elem      = source->EnumeratedArray.elem;
+					poly->EnumeratedArray.elem      = poly_elem;
 					poly->EnumeratedArray.index     = source->EnumeratedArray.index;
 					poly->EnumeratedArray.min_value = source->EnumeratedArray.min_value;
 					poly->EnumeratedArray.max_value = source->EnumeratedArray.max_value;

From 8d745e828880cfd8b5ded24ccacb53195c77a471 Mon Sep 17 00:00:00 2001
From: Mihail Moskov <28909106+corleypc@users.noreply.github.com>
Date: Wed, 30 Sep 2026 17:10:18 +0300
Subject: [PATCH 068/215] fixes the nocapture attribute on llvm >= 21

---
 src/llvm_abi.cpp             | 14 +++++++++-----
 src/llvm_backend_general.cpp |  6 +-----
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/src/llvm_abi.cpp b/src/llvm_abi.cpp
index 02da1c835..f4c91256e 100644
--- a/src/llvm_abi.cpp
+++ b/src/llvm_abi.cpp
@@ -160,6 +160,14 @@ gb_internal lbCallingConventionKind lb_calling_convention_kind(ProcCallingConven
 	return lb_calling_convention_map[cc];
 }
 
+gb_internal LLVMAttributeRef lb_create_nocapture_attribute(LLVMContextRef c) {
+#if LLVM_VERSION_MAJOR >= 21
+	return lb_create_enum_attribute(c, "captures", 0); // 0 == CaptureInfo::none()
+#else
+	return lb_create_enum_attribute(c, "nocapture");
+#endif
+}
+
 gb_internal void lb_add_function_type_attributes(LLVMValueRef fn, lbFunctionType *ft, ProcCallingConvention calling_convention) {
 	if (ft == nullptr) {
 		return;
@@ -173,11 +181,7 @@ gb_internal void lb_add_function_type_attributes(LLVMValueRef fn, lbFunctionType
 	LLVMContextRef c = ft->ctx;
 	LLVMAttributeRef noalias_attr   = lb_create_enum_attribute(c, "noalias");
 	LLVMAttributeRef nonnull_attr   = lb_create_enum_attribute(c, "nonnull");
-#if LLVM_VERSION_MAJOR >= 21
-	LLVMAttributeRef nocapture_attr = lb_create_string_attribute(c, make_string_c("captures"), make_string_c("none"));
-#else
-	LLVMAttributeRef nocapture_attr = lb_create_enum_attribute(c, "nocapture");
-#endif
+	LLVMAttributeRef nocapture_attr = lb_create_nocapture_attribute(c);
 
 	unsigned arg_index = offset;
 	for (unsigned i = 0; i < arg_count; i++) {
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 9a45899d4..31c8070cb 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -3026,11 +3026,7 @@ gb_internal void lb_add_proc_attribute_at_index_with_string(lbProcedure *p, isiz
 }
 
 gb_internal void lb_add_nocapture_proc_attribute_at_index(lbProcedure *p, isize index) {
-	#if LLVM_VERSION_MAJOR >= 21
-		lb_add_proc_attribute_at_index_with_string(p, index, make_string_c("captures"), make_string_c("none"));
-	#else
-		lb_add_proc_attribute_at_index(p, index, "nocapture");
-	#endif
+	LLVMAddAttributeAtIndex(p->value, cast(unsigned)index, lb_create_nocapture_attribute(p->module->ctx));
 }
 
 gb_internal void lb_add_attribute_to_proc(lbModule *m, LLVMValueRef proc_value, char const *name, u64 value=0) {

From 9d248323a4ba81e17de79dfa640610cd757b4860 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 15:19:52 +0100
Subject: [PATCH 069/215] Do not check (or add) the variant type expressions on
 an unspecialized polymorphic union template

---
 src/check_type.cpp | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index bdc211a76..4ef8e2f77 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -869,11 +869,17 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 
 	for_array(i, ut->variants) {
 		Ast *node = ut->variants[i];
-		Type *t = check_type_expr(ctx, node, nullptr);
 		if (union_type->Union.is_polymorphic && poly_operands == nullptr) {
-			// NOTE(bill): don't add any variants if this is this is an unspecialized polymorphic record
+			// NOTE(bill): Do not check (or add) the variant type expressions of an unspecialized
+			// polymorphic union template. A variant can reference other polymorphic records,
+			// including mutually-recursive ones (`UA($T){ ^UB(T) }` / `UB($T){ ^UA(T) }`), and
+			// because unspecialized instantiations are never published into gen_types, checking them
+			// here recurses unboundedly (UA[T] -> UB[T] -> UA[T] -> ...) and overflows the stack.
+			// This mirrors check_struct_type, which skips field checking for a polymorphic record;
+			// concrete instantiations (poly_operands != nullptr) still check their variants below.
 			continue;
 		}
+		Type *t = check_type_expr(ctx, node, nullptr);
 		if (t != nullptr && t != t_invalid) {
 			bool ok = true;
 			t = default_type(t);

From 3b366c9e2966e40d080b1d0bc46ed5eed45feb51 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 15:32:49 +0100
Subject: [PATCH 070/215] Begin work on handling the wait signals correctly for
 union variants throughout

---
 src/check_builtin.cpp |  5 +++++
 src/check_expr.cpp    |  7 +++++--
 src/check_type.cpp    | 18 +++++++++++++++++-
 src/types.cpp         |  1 +
 4 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 60a094408..7f5e759a6 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -7004,6 +7004,9 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 				variants[i] = alloc_type_pointer(bt->Union.variants[i]);
 			}
 			new_type->Union.variants = variants;
+			// This union is built directly (not via check_union_type), so signal that its variants
+			// are ready or a wait_signal_until_available on it would block forever.
+			wait_signal_set(&new_type->Union.variants_wait_signal);
 
 			// NOTE(bill): Is this even correct?
 			new_type->Union.node = operand->expr;
@@ -7181,6 +7184,8 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 
 			}
 			merged_union->Union.variants = slice_from_array(variants);
+			// Built directly (not via check_union_type); signal that variants are ready.
+			wait_signal_set(&merged_union->Union.variants_wait_signal);
 
 			operand->mode = Addressing_Type;
 			operand->type = merged_union;
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index e62e1e689..c913bc38b 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -95,7 +95,8 @@ gb_internal void     check_struct_type              (CheckerContext *c, Type *st
                                                      Type *named_type = nullptr, Type *original_type_for_poly = nullptr,
                                                      GenTypesData *poly_gen_types_to_unlock = nullptr);
 gb_internal void     check_union_type               (CheckerContext *c, Type *union_type, Ast *node, Array<Operand> *poly_operands,
-                                                     Type *named_type = nullptr, Type *original_type_for_poly = nullptr);
+                                                     Type *named_type = nullptr, Type *original_type_for_poly = nullptr,
+                                                     GenTypesData *poly_gen_types_to_unlock = nullptr);
 
 gb_internal Type *   check_init_variable            (CheckerContext *c, Entity *e, Operand *operand, String context_name);
 
@@ -8814,7 +8815,9 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 			set_base_type(named_type, union_type);
 
 			check_open_scope(&ctx, node);
-			check_union_type(&ctx, union_type, node, &ordered_operands, named_type, original_type);
+			check_union_type(&ctx, union_type, node, &ordered_operands, named_type, original_type, found_gen_types);
+			// check_union_type released found_gen_types->mutex after publishing the instantiation.
+			gen_types_locked = false;
 			check_close_scope(&ctx);
 		} else {
 			GB_PANIC("Unsupported parametric polymorphic record type");
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 4ef8e2f77..ea7c7ed27 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -834,7 +834,7 @@ gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *
 
 #undef ST_ALIGN
 }
-gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *node, Array<Operand> *poly_operands, Type *named_type, Type *original_type_for_poly) {
+gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *node, Array<Operand> *poly_operands, Type *named_type, Type *original_type_for_poly, GenTypesData *poly_gen_types_to_unlock) {
 	GB_ASSERT(is_type_union(union_type));
 	ast_node(ut, UnionType, node);
 
@@ -854,6 +854,16 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 		// Finalize the name before publishing (see set_polymorphic_record_instantiation_name).
 		set_polymorphic_record_instantiation_name(named_type, original_type_for_poly);
 		add_polymorphic_record_entity(ctx, node, named_type, original_type_for_poly);
+
+		// NOTE(bill): Release the originating record's gen_types mutex now that this instantiation
+		// is published, before checking its variants (which can instantiate other polymorphic
+		// records). Holding it across variant checking is what allows a cross-record ABBA deadlock
+		// between mutually-recursive generic unions instantiated concurrently. Concurrent requesters
+		// that find this in-progress entity synchronize on variants_wait_signal (set at the end of
+		// this function) before reading its variants. Mirrors check_struct_type.
+		if (poly_gen_types_to_unlock != nullptr) {
+			mutex_unlock(&poly_gen_types_to_unlock->mutex);
+		}
 	}
 
 	if (!union_type->Union.is_polymorphic) {
@@ -951,6 +961,12 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 			}
 		}
 	}
+
+	// NOTE(bill): `variants` is now fully populated; wake any thread that found this (possibly
+	// in-progress, early-released) instantiation and is waiting to read its variants. Mirrors the
+	// struct fields_wait_signal. Set unconditionally: an unspecialized polymorphic template has no
+	// variants and is never published, so no one waits on it, but setting it is harmless.
+	wait_signal_set(&union_type->Union.variants_wait_signal);
 }
 
 gb_internal void check_enum_type(CheckerContext *ctx, Type *enum_type, Type *named_type, Ast *node) {
diff --git a/src/types.cpp b/src/types.cpp
index 2d43a07f5..8ebd60b86 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -180,6 +180,7 @@ struct TypeUnion {
 	Type *           polymorphic_params; // Type_Tuple
 	Type *           polymorphic_parent;
 	Wait_Signal      polymorphic_wait_signal;
+	Wait_Signal      variants_wait_signal; // signalled once `variants` is populated (mirrors TypeStruct.fields_wait_signal)
 
 	std::atomic<i16> tag_size;
 	bool             is_polymorphic;

From 3b9ef40fae26cadac6aa73b012acca7ad1daf4f3 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 15:53:31 +0100
Subject: [PATCH 071/215] Clean up comments and add more wait signal guards for
 union variants

---
 src/check_builtin.cpp |  7 ++----
 src/check_expr.cpp    | 56 ++++++++++++++-----------------------------
 src/check_stmt.cpp    |  3 +++
 src/check_type.cpp    | 37 +++++++---------------------
 src/checker.cpp       |  2 ++
 src/types.cpp         |  2 ++
 6 files changed, 35 insertions(+), 72 deletions(-)

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 7f5e759a6..5dcec083a 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -7004,9 +7004,7 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 				variants[i] = alloc_type_pointer(bt->Union.variants[i]);
 			}
 			new_type->Union.variants = variants;
-			// This union is built directly (not via check_union_type), so signal that its variants
-			// are ready or a wait_signal_until_available on it would block forever.
-			wait_signal_set(&new_type->Union.variants_wait_signal);
+			wait_signal_set(&new_type->Union.variants_wait_signal); // built directly, not via check_union_type
 
 			// NOTE(bill): Is this even correct?
 			new_type->Union.node = operand->expr;
@@ -7184,8 +7182,7 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 
 			}
 			merged_union->Union.variants = slice_from_array(variants);
-			// Built directly (not via check_union_type); signal that variants are ready.
-			wait_signal_set(&merged_union->Union.variants_wait_signal);
+			wait_signal_set(&merged_union->Union.variants_wait_signal); // built directly, not via check_union_type
 
 			operand->mode = Addressing_Type;
 			operand->type = merged_union;
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index c913bc38b..71094ff76 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -389,9 +389,8 @@ gb_internal void check_scope_decls(CheckerContext *c, Slice<Ast *> const &nodes,
 	}
 }
 
-// NOTE(bill): Reuse an already-generated polymorphic procedure specialization `other`.
-// Records it as the result and, if its body has not been checked yet, schedules it.
-// The caller must have released `gen_procs->mutex` before calling this (it queues work).
+// Reuse an existing generated specialization `other`, scheduling its body if unchecked.
+// Caller must have released gen_procs->mutex first.
 gb_internal bool reuse_gen_polymorphic_procedure(Checker *checker, Entity *other, Ast *poly_def_node, PolyProcData *poly_proc_data) {
 	if (poly_proc_data) {
 		poly_proc_data->gen_entity = other;
@@ -585,13 +584,8 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	}
 
 
-	// NOTE(bill): The two lookups above ran under a shared lock which was then released, so a
-	// concurrent instantiation of this same specialization could have been published in the gap.
-	// Acquire the exclusive lock now and hold it across the re-check below and the array_add at the
-	// end, so that finding-then-publishing is atomic. Without this, two threads racing on the same
-	// specialization could both miss and each build and enqueue a distinct entity for it. The lock
-	// is only released here on an early return (a late-arriving duplicate); the normal path releases
-	// it after publishing. (@local-mutex)
+	// Re-check under the exclusive lock (the lookups above ran under a released shared lock) and
+	// hold it across construction + array_add so find-then-publish is atomic. (@local-mutex)
 	rw_mutex_lock(&gen_procs->mutex); // @local-mutex
 	for (Entity *other : gen_procs->procs) {
 		if (are_types_identical(base_type(other->type), final_proc_type)) {
@@ -670,8 +664,6 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 		}
 	}
 
-	// NOTE(bill): The exclusive lock has been held since just before construction (see above),
-	// so this publish is atomic with the re-check that preceded it.
 	array_add(&gen_procs->procs, entity);
 	rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
 
@@ -923,6 +915,7 @@ gb_internal i64 check_distance_between_types(CheckerContext *c, Operand *operand
 	}
 
 	if (is_type_union(dst) && allow_unions) {
+		wait_signal_until_available(&dst->Union.variants_wait_signal);
 		for (Type *vt : dst->Union.variants) {
 			if (are_types_identical(vt, s)) {
 				return 1;
@@ -1587,13 +1580,9 @@ gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, T
 						return is_polymorphic_type_assignable(c, poly->Array.elem, source->EnumeratedArray.elem, true, false);
 					}
 
-					// NOTE(bill): Capture the polymorphic element node ($T) before rewriting `poly`
-					// in place. Array.elem and EnumeratedArray.elem share the same union offset, so
-					// assigning EnumeratedArray.elem below would otherwise clobber the pointer to the
-					// shared $T generic node, and the element-binding recursion at the end would
-					// compare concrete-vs-concrete and never bind $T (leaving it unresolved in the
-					// procedure body). Keeping the node lets that recursion mutate it in place, just
-					// like the fixed-array branch above.
+					// Capture $T before rewriting `poly`: Array.elem and EnumeratedArray.elem share a
+					// union offset, so the assignment below would clobber it and the elem recursion
+					// would never bind $T.
 					Type *poly_elem = poly->Array.elem;
 
 					poly->kind = Type_EnumeratedArray;
@@ -1636,10 +1625,7 @@ gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, T
 				}
 				return is_polymorphic_type_assignable(c, poly->EnumeratedArray.index, source->EnumeratedArray.index, true, modify_type);
 			}
-			// NOTE(bill): Both are evaluated (not short-circuited) so their modify_type side effects
-			// are applied, but both the index and the element must match for the pattern to hold.
-			// A previous `index || elem` here over-accepted (e.g. `[Dir]$T` vs `[Other]f32`), binding
-			// `$T` and leaving the index mismatch to be reported later as a confusing assignment error.
+			// Evaluate both (for modify_type side effects) but require both to match.
 			bool index = is_polymorphic_type_assignable(c, poly->EnumeratedArray.index, source->EnumeratedArray.index, true, modify_type);
 			bool elem  = is_polymorphic_type_assignable(c, poly->EnumeratedArray.elem, source->EnumeratedArray.elem, true, modify_type);
 			return index && elem;
@@ -1813,11 +1799,7 @@ gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, T
 		return false;
 	case Type_Map:
 		if (source->kind == Type_Map) {
-			// NOTE(bill): Both are evaluated (not short-circuited) so their modify_type side effects
-			// are applied, but both the key and the value must match for the pattern to hold. A
-			// previous `key || value` here over-accepted (e.g. `map[int]$V` vs `map[string]f32`),
-			// binding `$V` and leaving the key mismatch to be reported later as a confusing
-			// assignment error, and would finalize a map that was only partially matched.
+			// Evaluate both (for modify_type side effects) but require both to match.
 			bool key   = is_polymorphic_type_assignable(c, poly->Map.key, source->Map.key, true, modify_type);
 			bool value = is_polymorphic_type_assignable(c, poly->Map.value, source->Map.value, true, modify_type);
 			if (key && value) {
@@ -5470,6 +5452,7 @@ gb_internal void convert_to_typed(CheckerContext *c, Operand *operand, Type *tar
 	case Type_Union:
 		if (!is_operand_nil(*operand) && !is_operand_uninit(*operand)) {
 			TEMPORARY_ALLOCATOR_GUARD();
+			wait_signal_until_available(&t->Union.variants_wait_signal);
 
 			isize count = t->Union.variants.count;
 			ValidIndexAndScore *valids = temporary_alloc_array<ValidIndexAndScore>(count);
@@ -8771,11 +8754,9 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 	{
 		GenTypesData *found_gen_types = ensure_polymorphic_record_entity_has_gen_types(c, original_type);
 		mutex_lock(&found_gen_types->mutex);
-		// NOTE(bill): For a struct instantiation, check_struct_type releases this mutex early (right
-		// after publishing the instantiation into gen_types, before checking its fields) to avoid a
-		// cross-record ABBA deadlock between mutually-recursive generic records; it signals that by
-		// leaving `gen_types_locked` cleared below. The union path and the cache-hit path keep the
-		// mutex until the end of this scope.
+		// check_struct_type/check_union_type release this mutex early (after publishing, before
+		// checking members) to avoid a cross-record ABBA, clearing gen_types_locked. The cache-hit
+		// path keeps it until scope end.
 		bool gen_types_locked = true;
 		defer (if (gen_types_locked) mutex_unlock(&found_gen_types->mutex));
 
@@ -8823,11 +8804,6 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 			GB_PANIC("Unsupported parametric polymorphic record type");
 		}
 
-		// NOTE(bill): The instantiation's canonical name is now set inside
-		// check_struct_type/check_union_type (before it is published into gen_types), so that a
-		// concurrent thread which finds the in-progress struct instantiation never observes a
-		// torn name.
-
 		operand->mode = Addressing_Type;
 		operand->type = named_type;
 	}
@@ -9711,6 +9687,7 @@ gb_internal bool attempt_implicit_selector_expr(CheckerContext *c, Operand *o, A
 		TEMPORARY_ALLOCATOR_GUARD();
 
 		Type *union_type = base_type(th);
+		wait_signal_until_available(&union_type->Union.variants_wait_signal);
 		auto operands = array_make<Operand>(temporary_allocator(), 0, union_type->Union.variants.count);
 
 		for (Type *vt : union_type->Union.variants) {
@@ -12016,6 +11993,9 @@ gb_internal ExprKind check_type_assertion(CheckerContext *c, Operand *o, Ast *no
 
 	Type *src = type_deref(o->type);
 	Type *bsrc = base_type(src);
+	if (bsrc->kind == Type_Union) {
+		wait_signal_until_available(&bsrc->Union.variants_wait_signal);
+	}
 
 
 	if (ta->type != nullptr && ta->type->kind == Ast_UnaryExpr && ta->type->UnaryExpr.op.kind == Token_Question) {
diff --git a/src/check_stmt.cpp b/src/check_stmt.cpp
index 0daaeec10..ffc6f4cc0 100644
--- a/src/check_stmt.cpp
+++ b/src/check_stmt.cpp
@@ -1539,6 +1539,9 @@ gb_internal void check_type_switch_stmt(CheckerContext *ctx, Ast *node, u32 mod_
 		bool saw_nil = false;
 		// TODO(bill): Make robust
 		Type *bt = base_type(type_deref(x.type));
+		if (bt->kind == Type_Union) {
+			wait_signal_until_available(&bt->Union.variants_wait_signal);
+		}
 
 		Type *case_type = nullptr;
 		for (Ast *type_expr : cc->list) {
diff --git a/src/check_type.cpp b/src/check_type.cpp
index ea7c7ed27..be617cb7d 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -662,11 +662,8 @@ gb_internal Entity *find_polymorphic_record_entity(GenTypesData *found_gen_types
 };
 
 
-// NOTE(bill): Give a freshly-instantiated polymorphic record its canonical name
-// (e.g. `Foo($T=int, $N=4)`). This depends only on the record's polymorphic parameters, so it
-// must be called *before* the instantiation is published into gen_types via
-// add_polymorphic_record_entity: once published, a concurrent thread may read the name, and
-// mutating the `Named.name` String in place afterwards would be a torn read.
+// Set the instantiation's canonical name (e.g. `Foo($T=int)`) before it is published, so a
+// concurrent finder never observes a torn Named.name.
 gb_internal void set_polymorphic_record_instantiation_name(Type *named_type, Type *original_type) {
 	Type *bt = base_type(named_type);
 	if (bt->kind != Type_Struct && bt->kind != Type_Union) {
@@ -755,13 +752,8 @@ gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *
 		set_polymorphic_record_instantiation_name(named_type, original_type_for_poly);
 		add_polymorphic_record_entity(ctx, node, named_type, original_type_for_poly);
 
-		// NOTE(bill): This instantiation is now published in the originating record's gen_types
-		// cache (its polymorphic params are set and signalled above), so a concurrent thread can
-		// find it via find_polymorphic_record_entity and synchronize on the fields_wait_signal
-		// below when it needs the layout. Release the caller-held gen_types mutex here, *before*
-		// checking the fields: field checking can instantiate other polymorphic records (locking
-		// their gen_types mutexes), and holding this one across that is what allows a cross-record
-		// ABBA deadlock between two mutually-recursive generic records instantiated concurrently.
+		// Release before field checking to avoid a cross-record ABBA; finders wait on
+		// fields_wait_signal (set at the end).
 		if (poly_gen_types_to_unlock != nullptr) {
 			mutex_unlock(&poly_gen_types_to_unlock->mutex);
 		}
@@ -855,12 +847,8 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 		set_polymorphic_record_instantiation_name(named_type, original_type_for_poly);
 		add_polymorphic_record_entity(ctx, node, named_type, original_type_for_poly);
 
-		// NOTE(bill): Release the originating record's gen_types mutex now that this instantiation
-		// is published, before checking its variants (which can instantiate other polymorphic
-		// records). Holding it across variant checking is what allows a cross-record ABBA deadlock
-		// between mutually-recursive generic unions instantiated concurrently. Concurrent requesters
-		// that find this in-progress entity synchronize on variants_wait_signal (set at the end of
-		// this function) before reading its variants. Mirrors check_struct_type.
+		// Release before variant checking to avoid a cross-record ABBA; finders wait on
+		// variants_wait_signal (set at the end). Mirrors check_struct_type.
 		if (poly_gen_types_to_unlock != nullptr) {
 			mutex_unlock(&poly_gen_types_to_unlock->mutex);
 		}
@@ -880,13 +868,8 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 	for_array(i, ut->variants) {
 		Ast *node = ut->variants[i];
 		if (union_type->Union.is_polymorphic && poly_operands == nullptr) {
-			// NOTE(bill): Do not check (or add) the variant type expressions of an unspecialized
-			// polymorphic union template. A variant can reference other polymorphic records,
-			// including mutually-recursive ones (`UA($T){ ^UB(T) }` / `UB($T){ ^UA(T) }`), and
-			// because unspecialized instantiations are never published into gen_types, checking them
-			// here recurses unboundedly (UA[T] -> UB[T] -> UA[T] -> ...) and overflows the stack.
-			// This mirrors check_struct_type, which skips field checking for a polymorphic record;
-			// concrete instantiations (poly_operands != nullptr) still check their variants below.
+			// Skip checking variant types of an unspecialized template: a variant may reference a
+			// mutually-recursive polymorphic union and recurse unboundedly. Mirrors check_struct_type.
 			continue;
 		}
 		Type *t = check_type_expr(ctx, node, nullptr);
@@ -962,10 +945,6 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 		}
 	}
 
-	// NOTE(bill): `variants` is now fully populated; wake any thread that found this (possibly
-	// in-progress, early-released) instantiation and is waiting to read its variants. Mirrors the
-	// struct fields_wait_signal. Set unconditionally: an unspecialized polymorphic template has no
-	// variants and is never published, so no one waits on it, but setting it is harmless.
 	wait_signal_set(&union_type->Union.variants_wait_signal);
 }
 
diff --git a/src/checker.cpp b/src/checker.cpp
index 59f1c9c25..fa95f763d 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -2453,6 +2453,8 @@ gb_internal void add_type_info_type_internal(CheckerContext *c, Type *t) {
 		break;
 
 	case Type_Union:
+		if (bt->Union.variants_wait_signal.futex.load() == 0)
+			return;
 		if (union_tag_size(t) > 0) {
 			add_type_info_type_internal(c, union_tag_type(t));
 		} else {
diff --git a/src/types.cpp b/src/types.cpp
index 8ebd60b86..69112268d 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -3537,6 +3537,7 @@ gb_internal bool union_variant_index_types_equal(Type *v, Type *vt) {
 gb_internal i64 union_variant_index_checked(Type *u, Type *v) {
 	u = base_type(u);
 	GB_ASSERT(u->kind == Type_Union);
+	wait_signal_until_available(&u->Union.variants_wait_signal);
 
 	for_array(i, u->Union.variants) {
 		Type *vt = u->Union.variants[i];
@@ -3555,6 +3556,7 @@ gb_internal i64 union_variant_index_checked(Type *u, Type *v) {
 gb_internal bool union_is_variant_of(Type *u, Type *v) {
 	u = base_type(u);
 	GB_ASSERT(u->kind == Type_Union);
+	wait_signal_until_available(&u->Union.variants_wait_signal);
 
 	for_array(i, u->Union.variants) {
 		Type *vt = u->Union.variants[i];

From c7659bb9c797fc5ee1df5c58e37e917407ef1b9e Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 16:14:52 +0100
Subject: [PATCH 072/215] Resolve the matrix generics slightly better

---
 src/check_type.cpp | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index be617cb7d..76c8a494c 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -3346,24 +3346,24 @@ gb_internal void check_matrix_type(CheckerContext *ctx, Type **type, Ast *node)
 
 
 	Type *elem = check_type_expr(ctx, mt->elem, nullptr);
-	
-	if (!is_type_valid_for_matrix_elems(elem)) {
-		if (elem == t_typeid) {
-			Entity *e = entity_of_node(mt->elem);
-			if (e && e->kind == Entity_TypeName && e->TypeName.is_type_alias) {
-				// HACK TODO(bill): This is to allow polymorphic parameters for matrix elements
-				// proc($T: typeid) -> matrix[2, 2]T
-				//
-				// THIS IS NEEDS TO BE FIXED AND NOT USE THIS HACK
-				goto type_assign;
-			}
+
+	// A `$T: typeid` param referenced by ident (e.g. proc($T: typeid) -> matrix[2,2]T) resolves to
+	// t_typeid; represent it as its Type_Generic so the element is properly polymorphic.
+	if (elem == t_typeid) {
+		Entity *e = entity_of_node(mt->elem);
+		if (e != nullptr && e->kind == Entity_TypeName && e->TypeName.is_type_alias) {
+			Type *gen = alloc_type_generic(ctx->scope, 0, entity_interned_name(e), nullptr);
+			gen->Generic.entity = e;
+			elem = gen;
 		}
+	}
+
+	if (!is_type_valid_for_matrix_elems(elem)) {
 		gbString s = type_to_string(elem);
 		error(column.expr, "Matrix elements types are limited to integers, floats, and complex, got %s", s);
 		gb_string_free(s);
 	}
-type_assign:;
-	
+
 	*type = alloc_type_matrix(elem, row_count, column_count, generic_row, generic_column, mt->is_row_major);
 	
 	return;

From 83bf868688e0d9cc50c1234da3385930e0ed18c2 Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Wed, 30 Sep 2026 17:17:51 +0200
Subject: [PATCH 073/215] cleanup of fast_float and small perf win with @(cold)
 tagging

---
 core/strconv/fast_float.odin | 187 ++++++++---------------------------
 core/strconv/strconv.odin    |  57 +++++++----
 2 files changed, 81 insertions(+), 163 deletions(-)

diff --git a/core/strconv/fast_float.odin b/core/strconv/fast_float.odin
index a1e39d61e..36f3f7558 100644
--- a/core/strconv/fast_float.odin
+++ b/core/strconv/fast_float.odin
@@ -138,7 +138,7 @@ A fast scanner for the decimal float syntax: `[+-] digits [. digits] [(e|E) [+-]
 It skips a `_` between digits
 
 **Returns**
-- mantissa, exp: The value is `mantissa * 10^exp`. If `trunc` is true, the significant digits after the first 19 were dropped, and at least one of them was not zero.
+- mantissa, exp: The value is `mantissa * 10^exp`. If `trunc` is true, the scanner dropped the significant digits after the first 19. Then the exact value is in the range `[mantissa, mantissa + 1) * 10^exp`.
 - neg: The number has a minus sign.
 - nr: The number of bytes in the number.
 - ok: `false` if `s` is not a number
@@ -168,6 +168,9 @@ parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa
 		digits += more
 	}
 
+	int_digits := digits
+	digits_end := i
+
 	// Fraction part
 	if i < n && s[i] == '.' {
 		i += 1
@@ -185,14 +188,11 @@ parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa
 		}
 		exp = -frac_digits
 		digits += frac_digits
+		digits_end = i
 	}
 	if digits == 0 {
 		return
 	}
-	if digits > MAX_SIG_DIGITS {
-		// The mantissa may have overflowed (unless most digits are leading zeros).
-		return scan_decimal_exact(s)
-	}
 
 	// Exponent part. The first byte after `e` and the sign must be a digit.
 	if i < n && lower(s[i]) == 'e' {
@@ -218,6 +218,10 @@ parse_number_string :: #force_inline proc "contextless" (s: string) -> (mantissa
 		exp += -x if exp_neg else x
 	}
 
+	if digits > MAX_SIG_DIGITS {
+		mantissa, exp, trunc = read_significant_digits(s, int_start, digits_end, int_digits, exp + (digits - int_digits))
+	}
+
 	if mantissa == 0 {
 		exp = 0
 	}
@@ -259,154 +263,45 @@ parse_exponent_with_separators :: proc "contextless" (s: string, i: int, x: int)
 	return i, x
 }
 
-// It is only used for numbers with more than 19 digits
-scan_decimal_exact :: proc "contextless" (s: string) -> (mantissa: u64, exp: int, neg, trunc: bool, nr: int, ok: bool) #no_bounds_check {
-	n := len(s)
-	if n == 0 {
-		return
-	}
-	neg = s[0] == '-'
-	i := int(neg || s[0] == '+')
-	if i+2 < n && s[i] == '0' && lower(s[i+1]) == 'x' {
-		return // a hex float
-	}
+/*
+Reads the first 19 significant digits of a decimal number again. The scanner uses it only
+if the number has more than 19 digits, because then the mantissa can overflow.
 
-	m:  u64 // significant digits
-	nd: int // number of significant digits in m
-	e:  int // decimal exponent
-	saw_digits := false
+**Inputs**
+- s, i: The input, and the position of the first digit before the `.`.
+- end: The position after the last digit.
+- int_digits: The number of digits before the `.`.
+- e: The exponent after the `e`, or 0.
 
-	// Integer part. Leading zeros do not count as significant digits, and `_` is skipped
-	for i+8 <= n && read8_to_u64(s, i) == 0x3030_3030_3030_3030 {
-		i += 8
-		saw_digits = true
-	}
-	for i < n && (s[i] == '0' || s[i] == '_') {
-		saw_digits ||= s[i] == '0'
+**Returns**
+- mantissa, exp: The value is `mantissa * 10^exp`, without the digits that were not read again.
+- trunc: `true` if the procedure did not read all the digits again.
+*/
+@(cold)
+read_significant_digits :: proc "contextless" (s: string, i, end, int_digits, e: int) -> (mantissa: u64, exp: int, trunc: bool) #no_bounds_check {
+	i := i
+	exp = e
+	int_left := int_digits
+	nd := 0
+	for i < end && nd < MAX_SIG_DIGITS {
+		c := s[i]
 		i += 1
-	}
-	for i+8 <= n && nd+8 <= MAX_SIG_DIGITS {
-		v := read8_to_u64(s, i)
-		if !is_made_of_eight_digits_fast(v) {
-			break
+		if c - '0' > 9 {
+			continue // a `_` or the `.`
 		}
-		m = m*100_000_000 + parse_eight_digits_unrolled(v)
-		nd += 8
-		i += 8
-		saw_digits = true
-	}
-	for i < n {
-		d := s[i] - '0'
-		if d > 9 {
-			if s[i] != '_' {
-				break
-			}
-		} else if nd < MAX_SIG_DIGITS {
-			m = m*10 + u64(d)
-			nd += 1
-			saw_digits = true
+		if int_left > 0 {
+			int_left -= 1
 		} else {
-			e += 1 // dropped digit
-			trunc ||= d != 0
+			exp -= 1
 		}
-		i += 1
+		if mantissa == 0 && c == '0' {
+			continue
+		}
+		mantissa = mantissa*10 + u64(c - '0')
+		nd += 1
 	}
-
-	// Fraction part
-	if i < n && s[i] == '.' {
-		i += 1
-		if m == 0 {
-			// Leading zeros of the fraction change only the exponent
-			for i+8 <= n && read8_to_u64(s, i) == 0x3030_3030_3030_3030 {
-				e -= 8
-				i += 8
-				saw_digits = true
-			}
-			for i < n && (s[i] == '0' || s[i] == '_') {
-				if s[i] == '0' {
-					e -= 1
-					saw_digits = true
-				}
-				i += 1
-			}
-		}
-		for i+8 <= n && nd+8 <= MAX_SIG_DIGITS {
-			v := read8_to_u64(s, i)
-			if !is_made_of_eight_digits_fast(v) {
-				break
-			}
-			m = m*100_000_000 + parse_eight_digits_unrolled(v)
-			nd += 8
-			e -= 8
-			i += 8
-			saw_digits = true
-		}
-		if i+4 <= n && nd+4 <= MAX_SIG_DIGITS {
-			v := read4_to_u32(s, i)
-			if is_made_of_four_digits_fast(v) {
-				m = m*10_000 + parse_four_digits_unrolled(v)
-				nd += 4
-				e -= 4
-				i += 4
-				saw_digits = true
-			}
-		}
-		for i < n {
-			d := s[i] - '0'
-			if d > 9 {
-				if s[i] != '_' {
-					break
-				}
-			} else if m == 0 && d == 0 {
-				e -= 1 // a leading zero of the fraction
-				saw_digits = true
-			} else if nd < MAX_SIG_DIGITS {
-				m = m*10 + u64(d)
-				nd += 1
-				e -= 1
-				saw_digits = true
-			} else {
-				trunc ||= d != 0 // dropped digit
-				saw_digits = true
-			}
-			i += 1
-		}
-	}
-	if !saw_digits {
-		return
-	}
-
-	// Exponent part. The first byte after `e` and the sign must be a digit
-	if i < n && lower(s[i]) == 'e' {
-		i += 1
-		exp_neg := false
-		if i < n && (s[i] == '+' || s[i] == '-') {
-			exp_neg = s[i] == '-'
-			i += 1
-		}
-		if i >= n || s[i] - '0' > 9 {
-			return // not a valid exponent, so not a number
-		}
-		x := 0
-		for i < n {
-			d := s[i] - '0'
-			if d > 9 {
-				if s[i] != '_' {
-					break
-				}
-			} else if x < 100_000 { // larger exponents overflow or underflow anyway
-				x = x*10 + int(d)
-			}
-			i += 1
-		}
-		e += -x if exp_neg else x
-	}
-
-	if m == 0 {
-		e = 0
-		trunc = false
-	}
-	return m, e, neg, trunc, i, true
+	exp += int_left
+	return mantissa, exp, i < end
 }
 
 // Loads 8 bytes starting at `s[i]` in little-endian order
diff --git a/core/strconv/strconv.odin b/core/strconv/strconv.odin
index 232b703ce..b29b9fd0e 100644
--- a/core/strconv/strconv.odin
+++ b/core/strconv/strconv.odin
@@ -917,7 +917,8 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 	}
 
 	// 0h string to float case
-	if len(str) > 2 && str[0] == '0' && str[1] == 'h' {
+	@(cold)
+	parse_0h :: proc "contextless" ($F: typeid, str: string) -> (value: F, nr: int, ok: bool) {
 		as_int: u64
 		digits: int
 		i := 2
@@ -958,17 +959,50 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 
 		switch digits {
 		case 4:
-			value = cast(T)transmute(f16)cast(u16)as_int
+			value = cast(F)transmute(f16)cast(u16)as_int
 		case 8:
-			value = cast(T)transmute(f32)cast(u32)as_int
+			value = cast(F)transmute(f32)cast(u32)as_int
 		case 16:
-			value = cast(T)transmute(f64)as_int
+			value = cast(F)transmute(f64)as_int
 		case:
 			ok = false
 		}
 		return
 	}
 
+	@(cold)
+	parse_special_or_hex :: proc "contextless" ($F: typeid, str: string) -> (value: F, nr: int, ok: bool) {
+		when F == f64 {
+			Bits :: u64
+			info := &_f64_info
+		} else {
+			Bits :: u32
+			info := &_f32_info
+		}
+		if f, n, special := check_special(str); special {
+			return F(f), n, true
+		}
+		mantissa: u64
+		exp:      int
+		neg, trunc: bool
+		mantissa, exp, neg, trunc, nr = scan_hex_float(str) or_return
+		b, in_range := hex_float_bits(mantissa, exp, neg, trunc, info)
+		return transmute(F)Bits(b), nr, in_range
+	}
+
+	@(cold)
+	parse_slow :: proc($F: typeid, str: string, info: ^Float_Info) -> (value: F, ok: bool) {
+		when F == f64 { Bits :: u64 } else { Bits :: u32 }
+		d: decimal.Decimal
+		decimal.set(&d, str)
+		b, overflow := decimal_to_float_bits(&d, info)
+		return transmute(F)Bits(b), !overflow
+	}
+
+	if len(str) > 2 && str[0] == '0' && str[1] == 'h' {
+		return parse_0h(T, str)
+	}
+
 	when T == f64 {
 		Bits :: u64
 		info := &_f64_info
@@ -982,13 +1016,7 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 	neg, trunc: bool
 	mantissa, exp, neg, trunc, nr, ok = parse_number_string(str)
 	if !ok {
-		// Not a decimal number: try "inf", "nan" and a hexadecimal float.
-		if f, n, special := check_special(str); special {
-			return T(f), n, true
-		}
-		mantissa, exp, neg, trunc, nr = scan_hex_float(str) or_return
-		b, in_range := hex_float_bits(mantissa, exp, neg, trunc, info)
-		return transmute(T)Bits(b), nr, in_range
+		return parse_special_or_hex(T, str)
 	}
 
 	// Clinger's fast path algorithm
@@ -1048,12 +1076,7 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 		return transmute(T)Bits(b), nr, ok
 	}
 
-	// Slow path for arbitrary-precision decimal
-	d: decimal.Decimal
-	decimal.set(&d, str[:nr])
-	b, overflow := decimal_to_float_bits(&d, info)
-	value = transmute(T)Bits(b)
-	ok = !overflow
+	value, ok = parse_slow(T, str[:nr], info)
 	return
 }
 /*

From d8c5c3d69a7d30c8cbadbd8180f03a056a27b2c2 Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Wed, 30 Sep 2026 17:30:15 +0200
Subject: [PATCH 074/215] moved hex out of special case for float parsing

---
 core/strconv/strconv.odin | 29 +++++++++++------------------
 1 file changed, 11 insertions(+), 18 deletions(-)

diff --git a/core/strconv/strconv.odin b/core/strconv/strconv.odin
index b29b9fd0e..abcef0e43 100644
--- a/core/strconv/strconv.odin
+++ b/core/strconv/strconv.odin
@@ -971,23 +971,10 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 	}
 
 	@(cold)
-	parse_special_or_hex :: proc "contextless" ($F: typeid, str: string) -> (value: F, nr: int, ok: bool) {
-		when F == f64 {
-			Bits :: u64
-			info := &_f64_info
-		} else {
-			Bits :: u32
-			info := &_f32_info
-		}
-		if f, n, special := check_special(str); special {
-			return F(f), n, true
-		}
-		mantissa: u64
-		exp:      int
-		neg, trunc: bool
-		mantissa, exp, neg, trunc, nr = scan_hex_float(str) or_return
-		b, in_range := hex_float_bits(mantissa, exp, neg, trunc, info)
-		return transmute(F)Bits(b), nr, in_range
+	parse_special :: proc "contextless" ($F: typeid, str: string) -> (value: F, nr: int, ok: bool) {
+		f: f64
+		f, nr, ok = check_special(str)
+		return F(f), nr, ok
 	}
 
 	@(cold)
@@ -1016,7 +1003,13 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 	neg, trunc: bool
 	mantissa, exp, neg, trunc, nr, ok = parse_number_string(str)
 	if !ok {
-		return parse_special_or_hex(T, str)
+		// Not a decimal number: try a hexadecimal float, then "inf" and "nan".
+		mantissa, exp, neg, trunc, nr, ok = scan_hex_float(str)
+		if !ok {
+			return parse_special(T, str)
+		}
+		b, in_range := hex_float_bits(mantissa, exp, neg, trunc, info)
+		return transmute(T)Bits(b), nr, in_range
 	}
 
 	// Clinger's fast path algorithm

From cd3570eef89096eae413b81857f44295c34444d5 Mon Sep 17 00:00:00 2001
From: Alexander Zhura <nice.zhura@list.ru>
Date: Wed, 30 Sep 2026 19:03:52 +0300
Subject: [PATCH 075/215] Impl simd x86 avx512 evex512

---
 core/simd/x86/avx512bw.odin |  4 ++--
 core/simd/x86/avx512f.odin  | 16 ++++++++--------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/core/simd/x86/avx512bw.odin b/core/simd/x86/avx512bw.odin
index 861b6af6e..a5e88f568 100644
--- a/core/simd/x86/avx512bw.odin
+++ b/core/simd/x86/avx512bw.odin
@@ -29,7 +29,7 @@ _mm256_srlv_epi16 :: #force_inline proc "c" (a: __m256i, count: __m256i) -> __m2
 // the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_srlv_epi16)
-@(require_results, enable_target_feature="avx512bw")
+@(require_results, enable_target_feature="avx512bw,evex512")
 _mm512_srlv_epi16 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
 	b := simd.lanes_lt(transmute(simd.u16x32)count, simd.u16x32(8 * size_of(u16)))
 	c := simd.select(b, transmute(simd.u16x32)count, simd.u16x32(0))
@@ -62,7 +62,7 @@ _mm256_sllv_epi16 :: #force_inline proc "c" (a: __m256i, count: __m256i) -> __m2
 // the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_sllv_epi16)
-@(require_results, enable_target_feature="avx512bw")
+@(require_results, enable_target_feature="avx512bw,evex512")
 _mm512_sllv_epi16 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
 	b := simd.lanes_lt(transmute(simd.u16x32)count, simd.u16x32(8 * size_of(u16)))
 	c := simd.select(b, transmute(simd.u16x32)count, simd.u16x32(0))
diff --git a/core/simd/x86/avx512f.odin b/core/simd/x86/avx512f.odin
index 8053abe87..279273ae0 100644
--- a/core/simd/x86/avx512f.odin
+++ b/core/simd/x86/avx512f.odin
@@ -7,7 +7,7 @@ import "core:simd"
 // the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_srlv_epi32)
-@(require_results, enable_target_feature="avx512f")
+@(require_results, enable_target_feature="avx512f,evex512")
 _mm512_srlv_epi32 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
 	b := simd.lanes_lt(transmute(simd.u32x16)count, simd.u32x16(8 * size_of(u32)))
 	c := simd.select(b, transmute(simd.u32x16)count, simd.u32x16(0))
@@ -18,7 +18,7 @@ _mm512_srlv_epi32 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m5
 // the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_srlv_epi64)
-@(require_results, enable_target_feature="avx512f")
+@(require_results, enable_target_feature="avx512f,evex512")
 _mm512_srlv_epi64 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
 	b := simd.lanes_lt(transmute(simd.u64x8)count, simd.u64x8(8 * size_of(u64)))
 	c := simd.select(b, transmute(simd.u64x8)count, simd.u64x8(0))
@@ -29,7 +29,7 @@ _mm512_srlv_epi64 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m5
 // the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_sllv_epi32)
-@(require_results, enable_target_feature="avx512f")
+@(require_results, enable_target_feature="avx512f,evex512")
 _mm512_sllv_epi32 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
 	b := simd.lanes_lt(transmute(simd.u32x16)count, simd.u32x16(8 * size_of(u32)))
 	c := simd.select(b, transmute(simd.u32x16)count, simd.u32x16(0))
@@ -40,7 +40,7 @@ _mm512_sllv_epi32 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m5
 // the corresponding element in `count` while shifting in zeros, and store the results in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_sllv_epi64)
-@(require_results, enable_target_feature="avx512f")
+@(require_results, enable_target_feature="avx512f,evex512")
 _mm512_sllv_epi64 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m512i {
 	b := simd.lanes_lt(transmute(simd.u64x8)count, simd.u64x8(8 * size_of(u64)))
 	c := simd.select(b, transmute(simd.u64x8)count, simd.u64x8(0))
@@ -50,7 +50,7 @@ _mm512_sllv_epi64 :: #force_inline proc "c" (a: __m512i, count: __m512i) -> __m5
 // Compute the bitwise AND of 512 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_and_si512)
-@(require_results, enable_target_feature="avx512f")
+@(require_results, enable_target_feature="avx512f,evex512")
 _mm512_and_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
 	return simd.bit_and(a, b)
 }
@@ -58,7 +58,7 @@ _mm512_and_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
 // Compute the bitwise NOT of 512 bits (representing integer data) in `a` and then AND with `b`, and store the result in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_andnot_si512)
-@(require_results, enable_target_feature="avx512f")
+@(require_results, enable_target_feature="avx512f,evex512")
 _mm512_andnot_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
 	c := __m512i(-1)
 	return simd.bit_and(simd.bit_xor(a, c), b)
@@ -67,7 +67,7 @@ _mm512_andnot_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
 // Compute the bitwise OR of 512 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_or_si512)
-@(require_results, enable_target_feature="avx512f")
+@(require_results, enable_target_feature="avx512f,evex512")
 _mm512_or_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
 	return simd.bit_or(a, b)
 }
@@ -75,7 +75,7 @@ _mm512_or_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
 // Compute the bitwise XOR of 512 bits (representing integer data) in `a` and `b`, and store the result in `dst`.
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_xor_si512)
-@(require_results, enable_target_feature="avx512f")
+@(require_results, enable_target_feature="avx512f,evex512")
 _mm512_xor_si512 :: #force_inline proc "c" (a, b: __m256i) -> __m256i {
 	return simd.bit_xor(a, b)
 }

From 796fd261a455474353a8846badf3ae4b20b8aa5d Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 17:36:14 +0100
Subject: [PATCH 076/215] Begin work on the improving the parapoly substitution
 engine

---
 src/check_expr.cpp |  23 ++--
 src/check_type.cpp | 297 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 305 insertions(+), 15 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 71094ff76..b55bd5de9 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -1580,22 +1580,15 @@ gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, T
 						return is_polymorphic_type_assignable(c, poly->Array.elem, source->EnumeratedArray.elem, true, false);
 					}
 
-					// Capture $T before rewriting `poly`: Array.elem and EnumeratedArray.elem share a
-					// union offset, so the assignment below would clobber it and the elem recursion
-					// would never bind $T.
+					// Resolve `[$N]$T` to an enumerated array by constructing the concrete node
+					// (keeping the $T element node) and finalizing poly to it, rather than rewriting
+					// poly's kind and fields one at a time.
 					Type *poly_elem = poly->Array.elem;
-
-					poly->kind = Type_EnumeratedArray;
-					poly->cached_size  = -1;
-					poly->cached_align = -1;
-					poly->flags.exchange(source->flags);
-					poly->failure      = false;
-					poly->EnumeratedArray.elem      = poly_elem;
-					poly->EnumeratedArray.index     = source->EnumeratedArray.index;
-					poly->EnumeratedArray.min_value = source->EnumeratedArray.min_value;
-					poly->EnumeratedArray.max_value = source->EnumeratedArray.max_value;
-					poly->EnumeratedArray.count     = source->EnumeratedArray.count;
-					poly->EnumeratedArray.op        = source->EnumeratedArray.op;
+					Type *ea = alloc_type_enumerated_array(poly_elem, index,
+						source->EnumeratedArray.min_value, source->EnumeratedArray.max_value,
+						source->EnumeratedArray.count, source->EnumeratedArray.op);
+					ea->flags.exchange(source->flags);
+					gb_memmove(poly, ea, gb_size_of(Type));
 
 					e->kind = Entity_TypeName;
 					e->TypeName.is_type_alias = true;
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 76c8a494c..df1c8aebc 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1824,6 +1824,277 @@ gb_internal bool check_type_specialization_to(CheckerContext *ctx, Type *special
 }
 
 
+// subst_unify matches a polymorphic pattern against a source PURELY (no node/entity mutation),
+// accumulating bindings; subst_apply reconstructs the instantiated type by CONSTRUCTION. Guarded by
+// PARAPOLY_VERIFY_SUBST, determine_type_from_polymorphic runs these alongside the existing in-place
+// mutation and asserts the two agree, proving the constructive path before anything relies on it.
+// Coverage is a slice (generic/basic/slice/dynamic-array/fixed [$N]$T); other kinds report
+// Subst_Unhandled and are skipped. No behavior change. This is refactor scaffolding: it runs a
+// second (constructive) match per instantiation, so set to 0 (or gate to debug) before release.
+#define PARAPOLY_VERIFY_SUBST 1
+
+enum SubstResult { Subst_Unhandled, Subst_NoMatch, Subst_Matched };
+
+enum PolyBindKind { PolyBind_Type, PolyBind_Value, PolyBind_EnumArray };
+struct PolyBinding {
+	Entity      *key;
+	PolyBindKind kind;
+	Type        *type;  // PolyBind_Type: bound type; PolyBind_EnumArray: source EnumeratedArray
+	i64          value; // PolyBind_Value: array count
+};
+struct PolySubst {
+	PolyBinding items[64];
+	isize       count;
+};
+
+gb_internal Entity *poly_generic_entity(Type *g) {
+	GB_ASSERT(g->kind == Type_Generic);
+	if (g->Generic.scope == nullptr) {
+		return nullptr;
+	}
+	return scope_lookup(g->Generic.scope, g->Generic.interned_name, 0);
+}
+gb_internal PolyBinding *poly_subst_find(PolySubst *s, Entity *key) {
+	for (isize i = 0; i < s->count; i++) {
+		if (s->items[i].key == key) {
+			return &s->items[i];
+		}
+	}
+	return nullptr;
+}
+gb_internal bool poly_subst_add(PolySubst *s, Entity *key, PolyBinding b) {
+	if (key == nullptr) {
+		return false;
+	}
+	PolyBinding *prev = poly_subst_find(s, key);
+	if (prev != nullptr) {
+		if (prev->kind != b.kind) {
+			return false;
+		}
+		switch (b.kind) {
+		case PolyBind_Type:      return are_types_identical(prev->type, b.type);
+		case PolyBind_Value:     return prev->value == b.value;
+		case PolyBind_EnumArray: return are_types_identical(prev->type, b.type);
+		}
+		return false;
+	}
+	if (s->count >= gb_count_of(s->items)) {
+		return false;
+	}
+	b.key = key;
+	s->items[s->count++] = b;
+	return true;
+}
+gb_internal bool poly_subst_bind_type(PolySubst *s, Entity *key, Type *t) {
+	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Type, t, 0});
+}
+gb_internal bool poly_subst_bind_value(PolySubst *s, Entity *key, i64 v) {
+	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Value, nullptr, v});
+}
+gb_internal bool poly_subst_bind_enum_array(PolySubst *s, Entity *key, Type *ea) {
+	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_EnumArray, ea, 0});
+}
+
+gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *source, PolySubst *subst) {
+	if (pattern == nullptr || source == nullptr) {
+		return Subst_Unhandled;
+	}
+	switch (pattern->kind) {
+	case Type_Basic:
+		return are_types_identical(pattern, source) ? Subst_Matched : Subst_NoMatch;
+	case Type_Generic:
+		if (pattern->Generic.specialized != nullptr) {
+			return Subst_Unhandled;
+		}
+		return poly_subst_bind_type(subst, poly_generic_entity(pattern), default_type(source)) ? Subst_Matched : Subst_NoMatch;
+	case Type_Pointer:
+		// old code also allows struct subtyping and Pointer<->MultiPointer; only the plain elem match here
+		if (source->kind != Type_Pointer) {
+			return Subst_Unhandled;
+		}
+		if (base_type(pattern->Pointer.elem)->kind == Type_Struct) {
+			return Subst_Unhandled;
+		}
+		return subst_unify(c, pattern->Pointer.elem, source->Pointer.elem, subst);
+	case Type_MultiPointer:
+		if (source->kind != Type_MultiPointer) {
+			return Subst_Unhandled;
+		}
+		if (base_type(pattern->MultiPointer.elem)->kind == Type_Struct) {
+			return Subst_Unhandled;
+		}
+		return subst_unify(c, pattern->MultiPointer.elem, source->MultiPointer.elem, subst);
+	case Type_Slice:
+		if (source->kind != Type_Slice) {
+			return Subst_NoMatch;
+		}
+		return subst_unify(c, pattern->Slice.elem, source->Slice.elem, subst);
+	case Type_DynamicArray:
+		if (source->kind != Type_DynamicArray) {
+			return Subst_NoMatch;
+		}
+		return subst_unify(c, pattern->DynamicArray.elem, source->DynamicArray.elem, subst);
+	case Type_Map: {
+		if (source->kind != Type_Map) {
+			return Subst_NoMatch;
+		}
+		SubstResult k = subst_unify(c, pattern->Map.key, source->Map.key, subst);
+		if (k != Subst_Matched) {
+			return k;
+		}
+		return subst_unify(c, pattern->Map.value, source->Map.value, subst);
+	}
+	case Type_Array:
+		if (source->kind == Type_Array) {
+			if (pattern->Array.generic_count != nullptr) {
+				if (pattern->Array.generic_count->Generic.specialized != nullptr) {
+					return Subst_Unhandled;
+				}
+				Entity *ne = poly_generic_entity(pattern->Array.generic_count);
+				if (ne == nullptr) {
+					return Subst_Unhandled;
+				}
+				if (!poly_subst_bind_value(subst, ne, source->Array.count)) {
+					return Subst_NoMatch;
+				}
+			} else if (pattern->Array.count != source->Array.count) {
+				return Subst_NoMatch;
+			}
+			return subst_unify(c, pattern->Array.elem, source->Array.elem, subst);
+		} else if (source->kind == Type_EnumeratedArray) {
+			if (pattern->Array.generic_count == nullptr) {
+				return Subst_NoMatch;
+			}
+			if (pattern->Array.generic_count->Generic.specialized != nullptr) {
+				return Subst_Unhandled;
+			}
+			Entity *ne = poly_generic_entity(pattern->Array.generic_count);
+			if (ne == nullptr) {
+				return Subst_Unhandled;
+			}
+			if (ne->kind != Entity_TypeName) { // old only takes the enum branch when $N is unbound
+				return Subst_NoMatch;
+			}
+			if (base_type(source->EnumeratedArray.index)->kind != Type_Enum) {
+				return Subst_NoMatch;
+			}
+			if (!poly_subst_bind_enum_array(subst, ne, source)) {
+				return Subst_NoMatch;
+			}
+			return subst_unify(c, pattern->Array.elem, source->EnumeratedArray.elem, subst);
+		}
+		return Subst_Unhandled;
+	case Type_Matrix: {
+		if (source->kind != Type_Matrix) {
+			return Subst_Unhandled;
+		}
+		if (pattern->Matrix.generic_row_count != nullptr) {
+			if (pattern->Matrix.generic_row_count->Generic.specialized != nullptr) return Subst_Unhandled;
+			Entity *re = poly_generic_entity(pattern->Matrix.generic_row_count);
+			if (re == nullptr) return Subst_Unhandled;
+			if (!poly_subst_bind_value(subst, re, source->Matrix.row_count)) return Subst_NoMatch;
+		} else if (pattern->Matrix.row_count != source->Matrix.row_count) {
+			return Subst_NoMatch;
+		}
+		if (pattern->Matrix.generic_column_count != nullptr) {
+			if (pattern->Matrix.generic_column_count->Generic.specialized != nullptr) return Subst_Unhandled;
+			Entity *ce = poly_generic_entity(pattern->Matrix.generic_column_count);
+			if (ce == nullptr) return Subst_Unhandled;
+			if (!poly_subst_bind_value(subst, ce, source->Matrix.column_count)) return Subst_NoMatch;
+		} else if (pattern->Matrix.column_count != source->Matrix.column_count) {
+			return Subst_NoMatch;
+		}
+		return subst_unify(c, pattern->Matrix.elem, source->Matrix.elem, subst);
+	}
+	case Type_SimdVector:
+		if (source->kind != Type_SimdVector) {
+			return Subst_Unhandled;
+		}
+		if (pattern->SimdVector.generic_count != nullptr) {
+			if (pattern->SimdVector.generic_count->Generic.specialized != nullptr) return Subst_Unhandled;
+			Entity *ne = poly_generic_entity(pattern->SimdVector.generic_count);
+			if (ne == nullptr) return Subst_Unhandled;
+			if (!poly_subst_bind_value(subst, ne, source->SimdVector.count)) return Subst_NoMatch;
+		} else if (pattern->SimdVector.count != source->SimdVector.count) {
+			return Subst_NoMatch;
+		}
+		return subst_unify(c, pattern->SimdVector.elem, source->SimdVector.elem, subst);
+	}
+	return Subst_Unhandled;
+}
+
+gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, PolySubst *subst) {
+	switch (pattern->kind) {
+	case Type_Basic:
+		return pattern;
+	case Type_Generic: {
+		PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern));
+		GB_ASSERT(b != nullptr && b->kind == PolyBind_Type);
+		return b->type;
+	}
+	case Type_Pointer:
+		return alloc_type_pointer(subst_apply(c, pattern->Pointer.elem, subst));
+	case Type_MultiPointer:
+		return alloc_type_multi_pointer(subst_apply(c, pattern->MultiPointer.elem, subst));
+	case Type_Slice:
+		return alloc_type_slice(subst_apply(c, pattern->Slice.elem, subst));
+	case Type_DynamicArray:
+		return alloc_type_dynamic_array(subst_apply(c, pattern->DynamicArray.elem, subst));
+	case Type_Map: {
+		Type *m = alloc_type(Type_Map);
+		m->Map.key   = subst_apply(c, pattern->Map.key, subst);
+		m->Map.value = subst_apply(c, pattern->Map.value, subst);
+		return m;
+	}
+	case Type_Array: {
+		Type *elem = subst_apply(c, pattern->Array.elem, subst);
+		if (pattern->Array.generic_count != nullptr) {
+			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->Array.generic_count));
+			GB_ASSERT(b != nullptr);
+			if (b->kind == PolyBind_EnumArray) {
+				Type *ea = b->type;
+				Type *r = alloc_type_enumerated_array(elem, ea->EnumeratedArray.index,
+					ea->EnumeratedArray.min_value, ea->EnumeratedArray.max_value,
+					ea->EnumeratedArray.count, ea->EnumeratedArray.op);
+				r->flags.exchange(ea->flags);
+				return r;
+			}
+			GB_ASSERT(b->kind == PolyBind_Value);
+			return alloc_type_array(elem, b->value, nullptr);
+		}
+		return alloc_type_array(elem, pattern->Array.count, nullptr);
+	}
+	case Type_Matrix: {
+		Type *elem = subst_apply(c, pattern->Matrix.elem, subst);
+		i64 rc = pattern->Matrix.row_count;
+		i64 cc = pattern->Matrix.column_count;
+		if (pattern->Matrix.generic_row_count != nullptr) {
+			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->Matrix.generic_row_count));
+			GB_ASSERT(b != nullptr && b->kind == PolyBind_Value);
+			rc = b->value;
+		}
+		if (pattern->Matrix.generic_column_count != nullptr) {
+			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->Matrix.generic_column_count));
+			GB_ASSERT(b != nullptr && b->kind == PolyBind_Value);
+			cc = b->value;
+		}
+		return alloc_type_matrix(elem, rc, cc, nullptr, nullptr, pattern->Matrix.is_row_major);
+	}
+	case Type_SimdVector: {
+		Type *elem = subst_apply(c, pattern->SimdVector.elem, subst);
+		i64 count = pattern->SimdVector.count;
+		if (pattern->SimdVector.generic_count != nullptr) {
+			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->SimdVector.generic_count));
+			GB_ASSERT(b != nullptr && b->kind == PolyBind_Value);
+			count = b->value;
+		}
+		return alloc_type_simd_vector(count, elem, nullptr);
+	}
+	}
+	GB_PANIC("subst_apply: unhandled kind");
+	return nullptr;
+}
+
 gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *poly_type, Operand const &operand) {
 	bool modify_type = !ctx->no_polymorphic_errors;
 	bool show_error = modify_type && !ctx->hide_polymorphic_errors;
@@ -1845,9 +2116,35 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 		return t_invalid;
 	}
 
+#if PARAPOLY_VERIFY_SUBST
+	PolySubst verify_subst = {};
+	SubstResult verify_ur = Subst_Unhandled;
+	Type *verify_applied = nullptr;
+	if (modify_type) {
+		verify_ur = subst_unify(ctx, poly_type, operand.type, &verify_subst);
+		if (verify_ur == Subst_Matched) {
+			verify_applied = subst_apply(ctx, poly_type, &verify_subst);
+		}
+	}
+#endif
+
 	if (is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
+	#if PARAPOLY_VERIFY_SUBST
+		if (verify_ur == Subst_Matched) {
+			GB_ASSERT_MSG(are_types_identical(verify_applied, poly_type),
+			              "parapoly subst mismatch: applied '%s' vs mutated '%s'",
+			              type_to_string(verify_applied), type_to_string(poly_type));
+		} else if (verify_ur == Subst_NoMatch) {
+			GB_PANIC("parapoly subst reported NoMatch but in-place match succeeded (result '%s')", type_to_string(poly_type));
+		}
+	#endif
 		return poly_type;
 	}
+#if PARAPOLY_VERIFY_SUBST
+	if (verify_ur == Subst_Matched) {
+		GB_PANIC("parapoly subst matched but in-place match failed");
+	}
+#endif
 	if (show_error) {
 		ERROR_BLOCK();
 		gbString pts = type_to_string(poly_type);

From 98ad032baa6c524e1488df3802070e0488bca50a Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Wed, 30 Sep 2026 18:53:24 +0200
Subject: [PATCH 077/215] changed append to append_elem in rexcode package for
 massive compile time improvements

---
 core/rexcode/isa/arm32/mnemonic_builders.odin | 1408 +--
 .../arm32/tools/gen_mnemonic_builders.odin    |    4 +-
 core/rexcode/isa/arm64/mnemonic_builders.odin | 4612 +++++-----
 .../arm64/tools/gen_mnemonic_builders.odin    |    2 +-
 core/rexcode/isa/mips/mnemonic_builders.odin  | 2056 ++---
 .../isa/mips/tools/gen_mnemonic_builders.odin |    2 +-
 .../isa/mos6502/mnemonic_builders.odin        |  326 +-
 .../mos6502/tools/gen_mnemonic_builders.odin  |    2 +-
 .../isa/mos65816/mnemonic_builders.odin       |  244 +-
 .../mos65816/tools/gen_mnemonic_builders.odin |    2 +-
 core/rexcode/isa/ppc/mnemonic_builders.odin   | 6654 +++++++-------
 .../isa/ppc/tools/gen_mnemonic_builders.odin  |    4 +-
 .../isa/ppc_vle/mnemonic_builders.odin        |  444 +-
 .../ppc_vle/tools/gen_mnemonic_builders.odin  |    2 +-
 core/rexcode/isa/riscv/mnemonic_builders.odin |  736 +-
 .../riscv/tools/gen_mnemonic_builders.odin    |    2 +-
 core/rexcode/isa/rsp/mnemonic_builders.odin   |  232 +-
 .../isa/rsp/tools/gen_mnemonic_builders.odin  |    2 +-
 core/rexcode/isa/x86/mnemonic_builders.odin   | 7782 ++++++++---------
 .../isa/x86/tools/gen_mnemonic_builders.odin  |    4 +-
 20 files changed, 12448 insertions(+), 12072 deletions(-)

diff --git a/core/rexcode/isa/arm32/mnemonic_builders.odin b/core/rexcode/isa/arm32/mnemonic_builders.odin
index 49197bc1b..9984a4b2b 100644
--- a/core/rexcode/isa/arm32/mnemonic_builders.odin
+++ b/core/rexcode/isa/arm32/mnemonic_builders.odin
@@ -30,728 +30,728 @@ inst_and_r_r_immm                   :: #force_inline proc "contextless" (dst: Re
 inst_and_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_and_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
 inst_and_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_and_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_and_r_r_immm(dst, src, imm)) }
-emit_and_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_and_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_and_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_and_r_r_rsr(dst, src, src2, shift, rs)) }
-emit_and_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_and_rlo_rlo(dst, src)) }
+emit_and_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_and_r_r_immm(dst, src, imm)) }
+emit_and_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_and_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_and_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_and_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_and_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_and_rlo_rlo(dst, src)) }
 inst_eor_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_eor_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_eor_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
 inst_eor_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_eor_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_eor_r_r_immm(dst, src, imm)) }
-emit_eor_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_eor_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_eor_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_eor_r_r_rsr(dst, src, src2, shift, rs)) }
-emit_eor_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_eor_rlo_rlo(dst, src)) }
+emit_eor_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_eor_r_r_immm(dst, src, imm)) }
+emit_eor_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_eor_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_eor_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_eor_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_eor_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_eor_rlo_rlo(dst, src)) }
 inst_sub_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_sub_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_sub_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
 inst_sub_rlo_rlo_rlo                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_sub_rlo_imm8                   :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_sub_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sub_r_r_immm(dst, src, imm)) }
-emit_sub_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_sub_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_sub_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_sub_r_r_rsr(dst, src, src2, shift, rs)) }
-emit_sub_rlo_rlo_rlo                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_rlo_rlo_rlo(dst, src, src2)) }
-emit_sub_rlo_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_sub_rlo_imm8(dst, imm)) }
+emit_sub_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sub_r_r_immm(dst, src, imm)) }
+emit_sub_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_sub_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_sub_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_sub_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_sub_rlo_rlo_rlo                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_rlo_rlo_rlo(dst, src, src2)) }
+emit_sub_rlo_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_sub_rlo_imm8(dst, imm)) }
 inst_rsb_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RSB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_rsb_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .RSB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_rsb_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .RSB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
-emit_rsb_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rsb_r_r_immm(dst, src, imm)) }
-emit_rsb_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_rsb_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_rsb_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_rsb_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_rsb_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rsb_r_r_immm(dst, src, imm)) }
+emit_rsb_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_rsb_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_rsb_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_rsb_r_r_rsr(dst, src, src2, shift, rs)) }
 inst_add_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_add_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_add_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
 inst_add_rlo_rlo_rlo                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 3, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_add_rlo_imm8                   :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_add_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_add_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_add_r_r_immm(dst, src, imm)) }
-emit_add_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_add_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_add_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_add_r_r_rsr(dst, src, src2, shift, rs)) }
-emit_add_rlo_rlo_rlo                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_rlo_rlo_rlo(dst, src, src2)) }
-emit_add_rlo_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_add_rlo_imm8(dst, imm)) }
-emit_add_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_add_r_r(dst, src)) }
+emit_add_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_add_r_r_immm(dst, src, imm)) }
+emit_add_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_add_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_add_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_add_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_add_rlo_rlo_rlo                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_rlo_rlo_rlo(dst, src, src2)) }
+emit_add_rlo_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_add_rlo_imm8(dst, imm)) }
+emit_add_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_add_r_r(dst, src)) }
 inst_adc_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ADC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_adc_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .ADC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_adc_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .ADC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
 inst_adc_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADC, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_adc_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_adc_r_r_immm(dst, src, imm)) }
-emit_adc_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_adc_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_adc_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_adc_r_r_rsr(dst, src, src2, shift, rs)) }
-emit_adc_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_adc_rlo_rlo(dst, src)) }
+emit_adc_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_adc_r_r_immm(dst, src, imm)) }
+emit_adc_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_adc_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_adc_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_adc_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_adc_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_adc_rlo_rlo(dst, src)) }
 inst_sbc_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SBC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_sbc_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .SBC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_sbc_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .SBC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
 inst_sbc_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SBC, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_sbc_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sbc_r_r_immm(dst, src, imm)) }
-emit_sbc_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_sbc_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_sbc_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_sbc_r_r_rsr(dst, src, src2, shift, rs)) }
-emit_sbc_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sbc_rlo_rlo(dst, src)) }
+emit_sbc_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sbc_r_r_immm(dst, src, imm)) }
+emit_sbc_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_sbc_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_sbc_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_sbc_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_sbc_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sbc_rlo_rlo(dst, src)) }
 inst_rsc_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RSC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_rsc_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .RSC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_rsc_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .RSC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
-emit_rsc_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rsc_r_r_immm(dst, src, imm)) }
-emit_rsc_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_rsc_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_rsc_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_rsc_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_rsc_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rsc_r_r_immm(dst, src, imm)) }
+emit_rsc_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_rsc_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_rsc_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_rsc_r_r_rsr(dst, src, src2, shift, rs)) }
 inst_tst_r_immm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TST, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_tst_r_rsh                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .TST, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, amount), {}, {}, {}, {}}} }
 inst_tst_r_rsr                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .TST, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, u8(reg_hw(rs))), {}, {}, {}, {}}} }
 inst_tst_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TST, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_tst_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_tst_r_immm(dst, imm)) }
-emit_tst_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_tst_r_rsh(dst, src, shift, amount)) }
-emit_tst_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_tst_r_rsr(dst, src, shift, rs)) }
-emit_tst_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tst_rlo_rlo(dst, src)) }
+emit_tst_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_tst_r_immm(dst, imm)) }
+emit_tst_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_tst_r_rsh(dst, src, shift, amount)) }
+emit_tst_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_tst_r_rsr(dst, src, shift, rs)) }
+emit_tst_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tst_rlo_rlo(dst, src)) }
 inst_teq_r_immm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TEQ, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_teq_r_rsh                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .TEQ, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, amount), {}, {}, {}, {}}} }
 inst_teq_r_rsr                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .TEQ, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, u8(reg_hw(rs))), {}, {}, {}, {}}} }
-emit_teq_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_teq_r_immm(dst, imm)) }
-emit_teq_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_teq_r_rsh(dst, src, shift, amount)) }
-emit_teq_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_teq_r_rsr(dst, src, shift, rs)) }
+emit_teq_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_teq_r_immm(dst, imm)) }
+emit_teq_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_teq_r_rsh(dst, src, shift, amount)) }
+emit_teq_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_teq_r_rsr(dst, src, shift, rs)) }
 inst_cmp_r_immm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CMP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_cmp_r_rsh                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .CMP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, amount), {}, {}, {}, {}}} }
 inst_cmp_r_rsr                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .CMP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, u8(reg_hw(rs))), {}, {}, {}, {}}} }
 inst_cmp_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMP, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_cmp_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_cmp_r_immm(dst, imm)) }
-emit_cmp_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_cmp_r_rsh(dst, src, shift, amount)) }
-emit_cmp_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_cmp_r_rsr(dst, src, shift, rs)) }
-emit_cmp_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmp_rlo_rlo(dst, src)) }
+emit_cmp_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_cmp_r_immm(dst, imm)) }
+emit_cmp_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_cmp_r_rsh(dst, src, shift, amount)) }
+emit_cmp_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_cmp_r_rsr(dst, src, shift, rs)) }
+emit_cmp_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmp_rlo_rlo(dst, src)) }
 inst_cmn_r_immm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CMN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_cmn_r_rsh                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .CMN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, amount), {}, {}, {}, {}}} }
 inst_cmn_r_rsr                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .CMN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, u8(reg_hw(rs))), {}, {}, {}, {}}} }
 inst_cmn_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMN, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_cmn_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_cmn_r_immm(dst, imm)) }
-emit_cmn_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_cmn_r_rsh(dst, src, shift, amount)) }
-emit_cmn_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_cmn_r_rsr(dst, src, shift, rs)) }
-emit_cmn_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmn_rlo_rlo(dst, src)) }
+emit_cmn_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_cmn_r_immm(dst, imm)) }
+emit_cmn_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_cmn_r_rsh(dst, src, shift, amount)) }
+emit_cmn_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_cmn_r_rsr(dst, src, shift, rs)) }
+emit_cmn_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmn_rlo_rlo(dst, src)) }
 inst_orr_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_orr_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_orr_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
 inst_orr_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_orr_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_orr_r_r_immm(dst, src, imm)) }
-emit_orr_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_orr_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_orr_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_orr_r_r_rsr(dst, src, src2, shift, rs)) }
-emit_orr_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_orr_rlo_rlo(dst, src)) }
+emit_orr_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_orr_r_r_immm(dst, src, imm)) }
+emit_orr_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_orr_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_orr_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_orr_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_orr_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_orr_rlo_rlo(dst, src)) }
 inst_mov_r_immm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_mov_r_rsh                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, amount), {}, {}, {}, {}}} }
 inst_mov_r_rsr                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, u8(reg_hw(rs))), {}, {}, {}, {}}} }
 inst_mov_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_mov_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mov_r_immm(dst, imm)) }
-emit_mov_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_mov_r_rsh(dst, src, shift, amount)) }
-emit_mov_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_mov_r_rsr(dst, src, shift, rs)) }
-emit_mov_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mov_r_r(dst, src)) }
+emit_mov_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mov_r_immm(dst, imm)) }
+emit_mov_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_mov_r_rsh(dst, src, shift, amount)) }
+emit_mov_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_mov_r_rsr(dst, src, shift, rs)) }
+emit_mov_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_r_r(dst, src)) }
 inst_bic_r_r_immm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_bic_r_r_rsh                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
 inst_bic_r_r_rsr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, u8(reg_hw(rs))), {}, {}, {}}} }
 inst_bic_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_bic_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_bic_r_r_immm(dst, src, imm)) }
-emit_bic_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_bic_r_r_rsh(dst, src, src2, shift, amount)) }
-emit_bic_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_bic_r_r_rsr(dst, src, src2, shift, rs)) }
-emit_bic_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_bic_rlo_rlo(dst, src)) }
+emit_bic_r_r_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_bic_r_r_immm(dst, src, imm)) }
+emit_bic_r_r_rsh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_bic_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_bic_r_r_rsr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_bic_r_r_rsr(dst, src, src2, shift, rs)) }
+emit_bic_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_bic_rlo_rlo(dst, src)) }
 inst_mvn_r_immm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MVN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_mvn_r_rsh                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .MVN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, amount), {}, {}, {}, {}}} }
 inst_mvn_r_rsr                      :: #force_inline proc "contextless" (dst: Register, src: Register, shift: Shift_Type, rs: Register) -> Instruction { return Instruction{mnemonic = .MVN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_shifted(src, shift, u8(reg_hw(rs))), {}, {}, {}, {}}} }
 inst_mvn_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MVN, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_mvn_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mvn_r_immm(dst, imm)) }
-emit_mvn_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_mvn_r_rsh(dst, src, shift, amount)) }
-emit_mvn_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append(instructions, inst_mvn_r_rsr(dst, src, shift, rs)) }
-emit_mvn_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mvn_rlo_rlo(dst, src)) }
+emit_mvn_r_immm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mvn_r_immm(dst, imm)) }
+emit_mvn_r_rsh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_mvn_r_rsh(dst, src, shift, amount)) }
+emit_mvn_r_rsr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, shift: Shift_Type, rs: Register) { append_elem(instructions, inst_mvn_r_rsr(dst, src, shift, rs)) }
+emit_mvn_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mvn_rlo_rlo(dst, src)) }
 inst_lsl_r_r_imm5                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LSL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_lsl_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LSL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_lsl_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .LSL, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_lsl_r_r_imm5                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_lsl_r_r_imm5(dst, src, imm)) }
-emit_lsl_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lsl_r_r_r(dst, src, src2)) }
-emit_lsl_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_lsl_rlo_rlo(dst, src)) }
+emit_lsl_r_r_imm5                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_lsl_r_r_imm5(dst, src, imm)) }
+emit_lsl_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lsl_r_r_r(dst, src, src2)) }
+emit_lsl_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_lsl_rlo_rlo(dst, src)) }
 inst_lsr_r_r_imm5                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LSR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_lsr_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LSR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_lsr_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .LSR, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_lsr_r_r_imm5                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_lsr_r_r_imm5(dst, src, imm)) }
-emit_lsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lsr_r_r_r(dst, src, src2)) }
-emit_lsr_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_lsr_rlo_rlo(dst, src)) }
+emit_lsr_r_r_imm5                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_lsr_r_r_imm5(dst, src, imm)) }
+emit_lsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lsr_r_r_r(dst, src, src2)) }
+emit_lsr_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_lsr_rlo_rlo(dst, src)) }
 inst_asr_r_r_imm5                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ASR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_asr_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ASR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_asr_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ASR, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_asr_r_r_imm5                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_asr_r_r_imm5(dst, src, imm)) }
-emit_asr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_asr_r_r_r(dst, src, src2)) }
-emit_asr_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_asr_rlo_rlo(dst, src)) }
+emit_asr_r_r_imm5                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_asr_r_r_imm5(dst, src, imm)) }
+emit_asr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_asr_r_r_r(dst, src, src2)) }
+emit_asr_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_asr_rlo_rlo(dst, src)) }
 inst_ror_r_r_imm5                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ROR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
 inst_ror_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ROR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_ror_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ROR, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_ror_r_r_imm5                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ror_r_r_imm5(dst, src, imm)) }
-emit_ror_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ror_r_r_r(dst, src, src2)) }
-emit_ror_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ror_rlo_rlo(dst, src)) }
+emit_ror_r_r_imm5                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ror_r_r_imm5(dst, src, imm)) }
+emit_ror_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ror_r_r_r(dst, src, src2)) }
+emit_ror_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ror_rlo_rlo(dst, src)) }
 inst_rrx_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .RRX, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_rrx_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rrx_r_r(dst, src)) }
+emit_rrx_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rrx_r_r(dst, src)) }
 inst_adr_rlo_rel                    :: #force_inline proc "contextless" (dst: Register, offset: i64) -> Instruction { return Instruction{mnemonic = .ADR, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_rel_offset(offset), {}, {}, {}, {}}} }
-emit_adr_rlo_rel                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append(instructions, inst_adr_rlo_rel(dst, offset)) }
+emit_adr_rlo_rel                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append_elem(instructions, inst_adr_rlo_rel(dst, offset)) }
 inst_neg_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NEG, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_neg_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_rlo_rlo(dst, src)) }
+emit_neg_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_rlo_rlo(dst, src)) }
 inst_movw_r_imm16                   :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVW, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_movw_r_imm16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movw_r_imm16(dst, imm)) }
+emit_movw_r_imm16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movw_r_imm16(dst, imm)) }
 inst_movt_r_imm16                   :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_movt_r_imm16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movt_r_imm16(dst, imm)) }
+emit_movt_r_imm16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movt_r_imm16(dst, imm)) }
 inst_bfc_r_imm5_imm5w               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .BFC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_imm(imm2), {}, {}, {}}} }
-emit_bfc_r_imm5_imm5w               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_bfc_r_imm5_imm5w(dst, imm, imm2)) }
+emit_bfc_r_imm5_imm5w               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_bfc_r_imm5_imm5w(dst, imm, imm2)) }
 inst_bfi_r_r_imm5_imm5w             :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .BFI, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_bfi_r_r_imm5_imm5w             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_bfi_r_r_imm5_imm5w(dst, src, imm, imm2)) }
+emit_bfi_r_r_imm5_imm5w             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_bfi_r_r_imm5_imm5w(dst, src, imm, imm2)) }
 inst_sbfx_r_r_imm5_imm5w            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SBFX, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_sbfx_r_r_imm5_imm5w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sbfx_r_r_imm5_imm5w(dst, src, imm, imm2)) }
+emit_sbfx_r_r_imm5_imm5w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sbfx_r_r_imm5_imm5w(dst, src, imm, imm2)) }
 inst_ubfx_r_r_imm5_imm5w            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UBFX, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_ubfx_r_r_imm5_imm5w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_ubfx_r_r_imm5_imm5w(dst, src, imm, imm2)) }
+emit_ubfx_r_r_imm5_imm5w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_ubfx_r_r_imm5_imm5w(dst, src, imm, imm2)) }
 inst_sxtb_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_sxtb_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtb_r_r(dst, src)) }
+emit_sxtb_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtb_r_r(dst, src)) }
 inst_sxtb16_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTB16, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_sxtb16_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtb16_r_r(dst, src)) }
+emit_sxtb16_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtb16_r_r(dst, src)) }
 inst_sxth_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_sxth_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxth_r_r(dst, src)) }
+emit_sxth_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxth_r_r(dst, src)) }
 inst_uxtb_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_uxtb_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtb_r_r(dst, src)) }
+emit_uxtb_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtb_r_r(dst, src)) }
 inst_uxtb16_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTB16, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_uxtb16_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtb16_r_r(dst, src)) }
+emit_uxtb16_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtb16_r_r(dst, src)) }
 inst_uxth_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_uxth_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxth_r_r(dst, src)) }
+emit_uxth_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxth_r_r(dst, src)) }
 inst_sxtab_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SXTAB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sxtab_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sxtab_r_r_r(dst, src, src2)) }
+emit_sxtab_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sxtab_r_r_r(dst, src, src2)) }
 inst_sxtab16_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SXTAB16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sxtab16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sxtab16_r_r_r(dst, src, src2)) }
+emit_sxtab16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sxtab16_r_r_r(dst, src, src2)) }
 inst_sxtah_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SXTAH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sxtah_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sxtah_r_r_r(dst, src, src2)) }
+emit_sxtah_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sxtah_r_r_r(dst, src, src2)) }
 inst_uxtab_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UXTAB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uxtab_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uxtab_r_r_r(dst, src, src2)) }
+emit_uxtab_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uxtab_r_r_r(dst, src, src2)) }
 inst_uxtab16_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UXTAB16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uxtab16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uxtab16_r_r_r(dst, src, src2)) }
+emit_uxtab16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uxtab16_r_r_r(dst, src, src2)) }
 inst_uxtah_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UXTAH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uxtah_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uxtah_r_r_r(dst, src, src2)) }
+emit_uxtah_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uxtah_r_r_r(dst, src, src2)) }
 inst_clz_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CLZ, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_clz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_clz_r_r(dst, src)) }
+emit_clz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_clz_r_r(dst, src)) }
 inst_rbit_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .RBIT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_rbit_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rbit_r_r(dst, src)) }
+emit_rbit_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rbit_r_r(dst, src)) }
 inst_rev_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_rev_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev_r_r(dst, src)) }
+emit_rev_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev_r_r(dst, src)) }
 inst_rev16_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV16, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_rev16_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev16_r_r(dst, src)) }
+emit_rev16_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev16_r_r(dst, src)) }
 inst_revsh_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REVSH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_revsh_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_revsh_r_r(dst, src)) }
+emit_revsh_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_revsh_r_r(dst, src)) }
 inst_sel_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SEL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sel_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sel_r_r_r(dst, src, src2)) }
+emit_sel_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sel_r_r_r(dst, src, src2)) }
 inst_pkhbt_r_r_rsh                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .PKHBT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
-emit_pkhbt_r_r_rsh                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_pkhbt_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_pkhbt_r_r_rsh                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_pkhbt_r_r_rsh(dst, src, src2, shift, amount)) }
 inst_pkhtb_r_r_rsh                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .PKHTB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg_shifted(src2, shift, amount), {}, {}, {}}} }
-emit_pkhtb_r_r_rsh                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_pkhtb_r_r_rsh(dst, src, src2, shift, amount)) }
+emit_pkhtb_r_r_rsh                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_pkhtb_r_r_rsh(dst, src, src2, shift, amount)) }
 inst_usad8_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USAD8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_usad8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usad8_r_r_r(dst, src, src2)) }
+emit_usad8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usad8_r_r_r(dst, src, src2)) }
 inst_usada8_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .USADA8, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_usada8_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_usada8_r_r_r_r(dst, src, src2, src3)) }
+emit_usada8_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_usada8_r_r_r_r(dst, src, src2, src3)) }
 inst_ssat_r_imm4s_rsh               :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .SSAT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg_shifted(src, shift, amount), {}, {}, {}}} }
-emit_ssat_r_imm4s_rsh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_ssat_r_imm4s_rsh(dst, imm, src, shift, amount)) }
+emit_ssat_r_imm4s_rsh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_ssat_r_imm4s_rsh(dst, imm, src, shift, amount)) }
 inst_usat_r_imm4s_rsh               :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, shift: Shift_Type, amount: u8) -> Instruction { return Instruction{mnemonic = .USAT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg_shifted(src, shift, amount), {}, {}, {}}} }
-emit_usat_r_imm4s_rsh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, shift: Shift_Type, amount: u8) { append(instructions, inst_usat_r_imm4s_rsh(dst, imm, src, shift, amount)) }
+emit_usat_r_imm4s_rsh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, shift: Shift_Type, amount: u8) { append_elem(instructions, inst_usat_r_imm4s_rsh(dst, imm, src, shift, amount)) }
 inst_ssat16_r_imm4s_r               :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .SSAT16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), {}, {}, {}}} }
-emit_ssat16_r_imm4s_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append(instructions, inst_ssat16_r_imm4s_r(dst, imm, src)) }
+emit_ssat16_r_imm4s_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append_elem(instructions, inst_ssat16_r_imm4s_r(dst, imm, src)) }
 inst_usat16_r_imm4s_r               :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .USAT16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), {}, {}, {}}} }
-emit_usat16_r_imm4s_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append(instructions, inst_usat16_r_imm4s_r(dst, imm, src)) }
+emit_usat16_r_imm4s_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append_elem(instructions, inst_usat16_r_imm4s_r(dst, imm, src)) }
 inst_qadd_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qadd_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qadd_r_r_r(dst, src, src2)) }
+emit_qadd_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qadd_r_r_r(dst, src, src2)) }
 inst_qsub_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QSUB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qsub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qsub_r_r_r(dst, src, src2)) }
+emit_qsub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qsub_r_r_r(dst, src, src2)) }
 inst_qdadd_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QDADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qdadd_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qdadd_r_r_r(dst, src, src2)) }
+emit_qdadd_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qdadd_r_r_r(dst, src, src2)) }
 inst_qdsub_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QDSUB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qdsub_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qdsub_r_r_r(dst, src, src2)) }
+emit_qdsub_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qdsub_r_r_r(dst, src, src2)) }
 inst_sadd8_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADD8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sadd8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sadd8_r_r_r(dst, src, src2)) }
+emit_sadd8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sadd8_r_r_r(dst, src, src2)) }
 inst_sadd16_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADD16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sadd16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sadd16_r_r_r(dst, src, src2)) }
+emit_sadd16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sadd16_r_r_r(dst, src, src2)) }
 inst_sasx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SASX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sasx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sasx_r_r_r(dst, src, src2)) }
+emit_sasx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sasx_r_r_r(dst, src, src2)) }
 inst_ssax_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSAX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_ssax_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssax_r_r_r(dst, src, src2)) }
+emit_ssax_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssax_r_r_r(dst, src, src2)) }
 inst_ssub8_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUB8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_ssub8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssub8_r_r_r(dst, src, src2)) }
+emit_ssub8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssub8_r_r_r(dst, src, src2)) }
 inst_ssub16_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUB16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_ssub16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssub16_r_r_r(dst, src, src2)) }
+emit_ssub16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssub16_r_r_r(dst, src, src2)) }
 inst_uadd8_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADD8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uadd8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uadd8_r_r_r(dst, src, src2)) }
+emit_uadd8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uadd8_r_r_r(dst, src, src2)) }
 inst_uadd16_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADD16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uadd16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uadd16_r_r_r(dst, src, src2)) }
+emit_uadd16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uadd16_r_r_r(dst, src, src2)) }
 inst_uasx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UASX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uasx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uasx_r_r_r(dst, src, src2)) }
+emit_uasx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uasx_r_r_r(dst, src, src2)) }
 inst_usax_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USAX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_usax_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usax_r_r_r(dst, src, src2)) }
+emit_usax_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usax_r_r_r(dst, src, src2)) }
 inst_usub8_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUB8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_usub8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usub8_r_r_r(dst, src, src2)) }
+emit_usub8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usub8_r_r_r(dst, src, src2)) }
 inst_usub16_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUB16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_usub16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usub16_r_r_r(dst, src, src2)) }
+emit_usub16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usub16_r_r_r(dst, src, src2)) }
 inst_qadd8_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QADD8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qadd8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qadd8_r_r_r(dst, src, src2)) }
+emit_qadd8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qadd8_r_r_r(dst, src, src2)) }
 inst_qadd16_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QADD16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qadd16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qadd16_r_r_r(dst, src, src2)) }
+emit_qadd16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qadd16_r_r_r(dst, src, src2)) }
 inst_qasx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QASX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qasx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qasx_r_r_r(dst, src, src2)) }
+emit_qasx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qasx_r_r_r(dst, src, src2)) }
 inst_qsax_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QSAX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qsax_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qsax_r_r_r(dst, src, src2)) }
+emit_qsax_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qsax_r_r_r(dst, src, src2)) }
 inst_qsub8_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QSUB8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qsub8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qsub8_r_r_r(dst, src, src2)) }
+emit_qsub8_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qsub8_r_r_r(dst, src, src2)) }
 inst_qsub16_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .QSUB16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_qsub16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_qsub16_r_r_r(dst, src, src2)) }
+emit_qsub16_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_qsub16_r_r_r(dst, src, src2)) }
 inst_uqadd8_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQADD8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uqadd8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd8_r_r_r(dst, src, src2)) }
+emit_uqadd8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd8_r_r_r(dst, src, src2)) }
 inst_uqadd16_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQADD16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uqadd16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd16_r_r_r(dst, src, src2)) }
+emit_uqadd16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd16_r_r_r(dst, src, src2)) }
 inst_uqasx_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQASX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uqasx_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqasx_r_r_r(dst, src, src2)) }
+emit_uqasx_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqasx_r_r_r(dst, src, src2)) }
 inst_uqsax_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQSAX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uqsax_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsax_r_r_r(dst, src, src2)) }
+emit_uqsax_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsax_r_r_r(dst, src, src2)) }
 inst_uqsub8_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQSUB8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uqsub8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub8_r_r_r(dst, src, src2)) }
+emit_uqsub8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub8_r_r_r(dst, src, src2)) }
 inst_uqsub16_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQSUB16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uqsub16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub16_r_r_r(dst, src, src2)) }
+emit_uqsub16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub16_r_r_r(dst, src, src2)) }
 inst_shadd8_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHADD8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_shadd8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shadd8_r_r_r(dst, src, src2)) }
+emit_shadd8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shadd8_r_r_r(dst, src, src2)) }
 inst_shadd16_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHADD16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_shadd16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shadd16_r_r_r(dst, src, src2)) }
+emit_shadd16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shadd16_r_r_r(dst, src, src2)) }
 inst_shasx_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHASX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_shasx_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shasx_r_r_r(dst, src, src2)) }
+emit_shasx_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shasx_r_r_r(dst, src, src2)) }
 inst_shsax_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSAX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_shsax_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsax_r_r_r(dst, src, src2)) }
+emit_shsax_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsax_r_r_r(dst, src, src2)) }
 inst_shsub8_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSUB8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_shsub8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsub8_r_r_r(dst, src, src2)) }
+emit_shsub8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsub8_r_r_r(dst, src, src2)) }
 inst_shsub16_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSUB16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_shsub16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsub16_r_r_r(dst, src, src2)) }
+emit_shsub16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsub16_r_r_r(dst, src, src2)) }
 inst_uhadd8_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHADD8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uhadd8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhadd8_r_r_r(dst, src, src2)) }
+emit_uhadd8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhadd8_r_r_r(dst, src, src2)) }
 inst_uhadd16_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHADD16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uhadd16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhadd16_r_r_r(dst, src, src2)) }
+emit_uhadd16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhadd16_r_r_r(dst, src, src2)) }
 inst_uhasx_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHASX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uhasx_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhasx_r_r_r(dst, src, src2)) }
+emit_uhasx_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhasx_r_r_r(dst, src, src2)) }
 inst_uhsax_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSAX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uhsax_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsax_r_r_r(dst, src, src2)) }
+emit_uhsax_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsax_r_r_r(dst, src, src2)) }
 inst_uhsub8_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSUB8, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uhsub8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsub8_r_r_r(dst, src, src2)) }
+emit_uhsub8_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsub8_r_r_r(dst, src, src2)) }
 inst_uhsub16_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSUB16, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_uhsub16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsub16_r_r_r(dst, src, src2)) }
+emit_uhsub16_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsub16_r_r_r(dst, src, src2)) }
 inst_smuad_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMUAD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smuad_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smuad_r_r_r(dst, src, src2)) }
+emit_smuad_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smuad_r_r_r(dst, src, src2)) }
 inst_smuadx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMUADX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smuadx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smuadx_r_r_r(dst, src, src2)) }
+emit_smuadx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smuadx_r_r_r(dst, src, src2)) }
 inst_smusd_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMUSD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smusd_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smusd_r_r_r(dst, src, src2)) }
+emit_smusd_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smusd_r_r_r(dst, src, src2)) }
 inst_smusdx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMUSDX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smusdx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smusdx_r_r_r(dst, src, src2)) }
+emit_smusdx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smusdx_r_r_r(dst, src, src2)) }
 inst_smlad_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLAD, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlad_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlad_r_r_r_r(dst, src, src2, src3)) }
+emit_smlad_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlad_r_r_r_r(dst, src, src2, src3)) }
 inst_smladx_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLADX, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smladx_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smladx_r_r_r_r(dst, src, src2, src3)) }
+emit_smladx_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smladx_r_r_r_r(dst, src, src2, src3)) }
 inst_smlsd_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLSD, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlsd_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlsd_r_r_r_r(dst, src, src2, src3)) }
+emit_smlsd_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlsd_r_r_r_r(dst, src, src2, src3)) }
 inst_smlsdx_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLSDX, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlsdx_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlsdx_r_r_r_r(dst, src, src2, src3)) }
+emit_smlsdx_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlsdx_r_r_r_r(dst, src, src2, src3)) }
 inst_smlald_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLALD, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlald_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlald_r_r_r_r(dst, src, src2, src3)) }
+emit_smlald_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlald_r_r_r_r(dst, src, src2, src3)) }
 inst_smlaldx_r_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLALDX, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlaldx_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlaldx_r_r_r_r(dst, src, src2, src3)) }
+emit_smlaldx_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlaldx_r_r_r_r(dst, src, src2, src3)) }
 inst_smlsld_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLSLD, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlsld_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlsld_r_r_r_r(dst, src, src2, src3)) }
+emit_smlsld_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlsld_r_r_r_r(dst, src, src2, src3)) }
 inst_smlsldx_r_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLSLDX, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlsldx_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlsldx_r_r_r_r(dst, src, src2, src3)) }
+emit_smlsldx_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlsldx_r_r_r_r(dst, src, src2, src3)) }
 inst_smmul_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMMUL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smmul_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smmul_r_r_r(dst, src, src2)) }
+emit_smmul_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smmul_r_r_r(dst, src, src2)) }
 inst_smmulr_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMMULR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smmulr_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smmulr_r_r_r(dst, src, src2)) }
+emit_smmulr_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smmulr_r_r_r(dst, src, src2)) }
 inst_smmla_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMMLA, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smmla_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smmla_r_r_r_r(dst, src, src2, src3)) }
+emit_smmla_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smmla_r_r_r_r(dst, src, src2, src3)) }
 inst_smmlar_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMMLAR, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smmlar_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smmlar_r_r_r_r(dst, src, src2, src3)) }
+emit_smmlar_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smmlar_r_r_r_r(dst, src, src2, src3)) }
 inst_smmls_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMMLS, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smmls_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smmls_r_r_r_r(dst, src, src2, src3)) }
+emit_smmls_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smmls_r_r_r_r(dst, src, src2, src3)) }
 inst_smmlsr_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMMLSR, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smmlsr_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smmlsr_r_r_r_r(dst, src, src2, src3)) }
+emit_smmlsr_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smmlsr_r_r_r_r(dst, src, src2, src3)) }
 inst_mul_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_mul_rlo_rlo                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_mul_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mul_r_r_r(dst, src, src2)) }
-emit_mul_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mul_rlo_rlo(dst, src)) }
+emit_mul_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mul_r_r_r(dst, src, src2)) }
+emit_mul_rlo_rlo                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mul_rlo_rlo(dst, src)) }
 inst_mla_r_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MLA, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_mla_r_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_mla_r_r_r_r(dst, src, src2, src3)) }
+emit_mla_r_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_mla_r_r_r_r(dst, src, src2, src3)) }
 inst_mls_r_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MLS, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_mls_r_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_mls_r_r_r_r(dst, src, src2, src3)) }
+emit_mls_r_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_mls_r_r_r_r(dst, src, src2, src3)) }
 inst_umull_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .UMULL, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_umull_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_umull_r_r_r_r(dst, src, src2, src3)) }
+emit_umull_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_umull_r_r_r_r(dst, src, src2, src3)) }
 inst_umlal_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .UMLAL, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_umlal_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_umlal_r_r_r_r(dst, src, src2, src3)) }
+emit_umlal_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_umlal_r_r_r_r(dst, src, src2, src3)) }
 inst_smull_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMULL, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smull_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smull_r_r_r_r(dst, src, src2, src3)) }
+emit_smull_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smull_r_r_r_r(dst, src, src2, src3)) }
 inst_smlal_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLAL, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlal_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlal_r_r_r_r(dst, src, src2, src3)) }
+emit_smlal_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlal_r_r_r_r(dst, src, src2, src3)) }
 inst_umaal_r_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .UMAAL, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_umaal_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_umaal_r_r_r_r(dst, src, src2, src3)) }
+emit_umaal_r_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_umaal_r_r_r_r(dst, src, src2, src3)) }
 inst_smlabb_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLABB, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlabb_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlabb_r_r_r_r(dst, src, src2, src3)) }
+emit_smlabb_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlabb_r_r_r_r(dst, src, src2, src3)) }
 inst_smlabt_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLABT, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlabt_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlabt_r_r_r_r(dst, src, src2, src3)) }
+emit_smlabt_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlabt_r_r_r_r(dst, src, src2, src3)) }
 inst_smlatb_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLATB, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlatb_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlatb_r_r_r_r(dst, src, src2, src3)) }
+emit_smlatb_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlatb_r_r_r_r(dst, src, src2, src3)) }
 inst_smlatt_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLATT, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlatt_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlatt_r_r_r_r(dst, src, src2, src3)) }
+emit_smlatt_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlatt_r_r_r_r(dst, src, src2, src3)) }
 inst_smlawb_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLAWB, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlawb_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlawb_r_r_r_r(dst, src, src2, src3)) }
+emit_smlawb_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlawb_r_r_r_r(dst, src, src2, src3)) }
 inst_smlawt_r_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLAWT, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlawt_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlawt_r_r_r_r(dst, src, src2, src3)) }
+emit_smlawt_r_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlawt_r_r_r_r(dst, src, src2, src3)) }
 inst_smulbb_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULBB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smulbb_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smulbb_r_r_r(dst, src, src2)) }
+emit_smulbb_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smulbb_r_r_r(dst, src, src2)) }
 inst_smulbt_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULBT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smulbt_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smulbt_r_r_r(dst, src, src2)) }
+emit_smulbt_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smulbt_r_r_r(dst, src, src2)) }
 inst_smultb_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULTB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smultb_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smultb_r_r_r(dst, src, src2)) }
+emit_smultb_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smultb_r_r_r(dst, src, src2)) }
 inst_smultt_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULTT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smultt_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smultt_r_r_r(dst, src, src2)) }
+emit_smultt_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smultt_r_r_r(dst, src, src2)) }
 inst_smulwb_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULWB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smulwb_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smulwb_r_r_r(dst, src, src2)) }
+emit_smulwb_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smulwb_r_r_r(dst, src, src2)) }
 inst_smulwt_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULWT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_smulwt_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smulwt_r_r_r(dst, src, src2)) }
+emit_smulwt_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smulwt_r_r_r(dst, src, src2)) }
 inst_smlalbb_r_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLALBB, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlalbb_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlalbb_r_r_r_r(dst, src, src2, src3)) }
+emit_smlalbb_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlalbb_r_r_r_r(dst, src, src2, src3)) }
 inst_smlalbt_r_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLALBT, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlalbt_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlalbt_r_r_r_r(dst, src, src2, src3)) }
+emit_smlalbt_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlalbt_r_r_r_r(dst, src, src2, src3)) }
 inst_smlaltb_r_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLALTB, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlaltb_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlaltb_r_r_r_r(dst, src, src2, src3)) }
+emit_smlaltb_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlaltb_r_r_r_r(dst, src, src2, src3)) }
 inst_smlaltt_r_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SMLALTT, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_smlaltt_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smlaltt_r_r_r_r(dst, src, src2, src3)) }
+emit_smlaltt_r_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smlaltt_r_r_r_r(dst, src, src2, src3)) }
 inst_sdiv_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SDIV, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sdiv_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sdiv_r_r_r(dst, src, src2)) }
+emit_sdiv_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sdiv_r_r_r(dst, src, src2)) }
 inst_udiv_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UDIV, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_udiv_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_udiv_r_r_r(dst, src, src2)) }
+emit_udiv_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_udiv_r_r_r(dst, src, src2)) }
 inst_b_rel                          :: #force_inline proc "contextless" (offset: i64) -> Instruction { return Instruction{mnemonic = .B, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_rel_offset(offset), {}, {}, {}, {}, {}}} }
 inst_b_rel_cond                     :: #force_inline proc "contextless" (offset: i64, imm: i64) -> Instruction { return Instruction{mnemonic = .B, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_rel_offset(offset), op_imm(imm), {}, {}, {}, {}}} }
-emit_b_rel                          :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append(instructions, inst_b_rel(offset)) }
-emit_b_rel_cond                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, imm: i64) { append(instructions, inst_b_rel_cond(offset, imm)) }
+emit_b_rel                          :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append_elem(instructions, inst_b_rel(offset)) }
+emit_b_rel_cond                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, imm: i64) { append_elem(instructions, inst_b_rel_cond(offset, imm)) }
 inst_bl_rel                         :: #force_inline proc "contextless" (offset: i64) -> Instruction { return Instruction{mnemonic = .BL, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_rel_offset(offset), {}, {}, {}, {}, {}}} }
-emit_bl_rel                         :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append(instructions, inst_bl_rel(offset)) }
+emit_bl_rel                         :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append_elem(instructions, inst_bl_rel(offset)) }
 inst_bx_r                           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BX, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_bx_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bx_r(dst)) }
+emit_bx_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bx_r(dst)) }
 inst_blx_r                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BLX, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
 inst_blx_rel                        :: #force_inline proc "contextless" (offset: i64) -> Instruction { return Instruction{mnemonic = .BLX, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_rel_offset(offset), {}, {}, {}, {}, {}}} }
-emit_blx_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_blx_r(dst)) }
-emit_blx_rel                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append(instructions, inst_blx_rel(offset)) }
+emit_blx_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_blx_r(dst)) }
+emit_blx_rel                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append_elem(instructions, inst_blx_rel(offset)) }
 inst_bxj_r                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BXJ, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_bxj_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bxj_r(dst)) }
+emit_bxj_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bxj_r(dst)) }
 inst_cbz_rlo_rel                    :: #force_inline proc "contextless" (dst: Register, offset: i64) -> Instruction { return Instruction{mnemonic = .CBZ, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_rel_offset(offset), {}, {}, {}, {}}} }
-emit_cbz_rlo_rel                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append(instructions, inst_cbz_rlo_rel(dst, offset)) }
+emit_cbz_rlo_rel                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append_elem(instructions, inst_cbz_rlo_rel(dst, offset)) }
 inst_cbnz_rlo_rel                   :: #force_inline proc "contextless" (dst: Register, offset: i64) -> Instruction { return Instruction{mnemonic = .CBNZ, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), op_rel_offset(offset), {}, {}, {}, {}}} }
-emit_cbnz_rlo_rel                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append(instructions, inst_cbnz_rlo_rel(dst, offset)) }
+emit_cbnz_rlo_rel                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append_elem(instructions, inst_cbnz_rlo_rel(dst, offset)) }
 inst_tbb_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TBB, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_tbb_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tbb_r_r(dst, src)) }
+emit_tbb_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tbb_r_r(dst, src)) }
 inst_tbh_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TBH, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_tbh_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tbh_r_r(dst, src)) }
+emit_tbh_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tbh_r_r(dst, src)) }
 inst_msr_psr_immm                   :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .MSR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), op_imm(imm2), {}, {}, {}, {}}} }
 inst_msr_psr_r                      :: #force_inline proc "contextless" (imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .MSR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), {}, {}, {}, {}}} }
-emit_msr_psr_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_msr_psr_immm(imm, imm2)) }
-emit_msr_psr_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register) { append(instructions, inst_msr_psr_r(imm, src)) }
+emit_msr_psr_immm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_msr_psr_immm(imm, imm2)) }
+emit_msr_psr_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register) { append_elem(instructions, inst_msr_psr_r(imm, src)) }
 inst_mrs_r_psr                      :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MRS, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_mrs_r_psr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mrs_r_psr(dst, imm)) }
+emit_mrs_r_psr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mrs_r_psr(dst, imm)) }
 inst_cps_ifl                        :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .CPS, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_cps_ifl                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_cps_ifl(imm)) }
+emit_cps_ifl                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_cps_ifl(imm)) }
 inst_setend_end                     :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SETEND, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_setend_end                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_setend_end(imm)) }
+emit_setend_end                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_setend_end(imm)) }
 inst_nop_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NOP, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_nop_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nop_none()) }
+emit_nop_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nop_none()) }
 inst_yield_none                     :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .YIELD, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_yield_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_yield_none()) }
+emit_yield_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_yield_none()) }
 inst_wfe_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .WFE, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_wfe_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wfe_none()) }
+emit_wfe_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wfe_none()) }
 inst_wfi_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .WFI, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_wfi_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wfi_none()) }
+emit_wfi_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wfi_none()) }
 inst_sev_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SEV, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_sev_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sev_none()) }
+emit_sev_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sev_none()) }
 inst_sevl_none                      :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SEVL, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_sevl_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sevl_none()) }
+emit_sevl_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sevl_none()) }
 inst_dbg_hint                       :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .DBG, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_dbg_hint                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_dbg_hint(imm)) }
+emit_dbg_hint                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_dbg_hint(imm)) }
 inst_hint_hint                      :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .HINT, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_hint_hint                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_hint_hint(imm)) }
+emit_hint_hint                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_hint_hint(imm)) }
 inst_dmb_barr                       :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .DMB, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_dmb_barr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_dmb_barr(imm)) }
+emit_dmb_barr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_dmb_barr(imm)) }
 inst_dsb_barr                       :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .DSB, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_dsb_barr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_dsb_barr(imm)) }
+emit_dsb_barr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_dsb_barr(imm)) }
 inst_isb_barr                       :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .ISB, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_isb_barr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_isb_barr(imm)) }
+emit_isb_barr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_isb_barr(imm)) }
 inst_clrex_none                     :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .CLREX, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_clrex_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_clrex_none()) }
+emit_clrex_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_clrex_none()) }
 inst_pld_mem                        :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return Instruction{mnemonic = .PLD, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_mem(dst), {}, {}, {}, {}, {}}} }
-emit_pld_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_pld_mem(dst)) }
+emit_pld_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_pld_mem(dst)) }
 inst_pldw_mem                       :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return Instruction{mnemonic = .PLDW, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_mem(dst), {}, {}, {}, {}, {}}} }
-emit_pldw_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_pldw_mem(dst)) }
+emit_pldw_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_pldw_mem(dst)) }
 inst_pli_mem                        :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return Instruction{mnemonic = .PLI, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_mem(dst), {}, {}, {}, {}, {}}} }
-emit_pli_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_pli_mem(dst)) }
+emit_pli_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_pli_mem(dst)) }
 inst_hlt_imm                        :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .HLT, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_hlt_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_hlt_imm(imm)) }
+emit_hlt_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_hlt_imm(imm)) }
 inst_dcps1_none                     :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DCPS1, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_dcps1_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dcps1_none()) }
+emit_dcps1_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dcps1_none()) }
 inst_dcps2_none                     :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DCPS2, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_dcps2_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dcps2_none()) }
+emit_dcps2_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dcps2_none()) }
 inst_dcps3_none                     :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DCPS3, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_dcps3_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dcps3_none()) }
+emit_dcps3_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dcps3_none()) }
 inst_eret_none                      :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .ERET, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_eret_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_eret_none()) }
+emit_eret_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_eret_none()) }
 inst_esb_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .ESB, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_esb_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_esb_none()) }
+emit_esb_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_esb_none()) }
 inst_psb_csync_none                 :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .PSB_CSYNC, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_psb_csync_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_psb_csync_none()) }
+emit_psb_csync_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_psb_csync_none()) }
 inst_tsb_csync_none                 :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TSB_CSYNC, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_tsb_csync_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tsb_csync_none()) }
+emit_tsb_csync_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tsb_csync_none()) }
 inst_csdb_none                      :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .CSDB, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_csdb_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_csdb_none()) }
+emit_csdb_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_csdb_none()) }
 inst_sb_none                        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SB, operand_count = 0, mode = .A32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_sb_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sb_none()) }
+emit_sb_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sb_none()) }
 inst_setpan_hint                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SETPAN, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_setpan_hint                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_setpan_hint(imm)) }
+emit_setpan_hint                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_setpan_hint(imm)) }
 inst_svc_imm                        :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SVC, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_svc_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_svc_imm(imm)) }
+emit_svc_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_svc_imm(imm)) }
 inst_bkpt_imm                       :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .BKPT, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_bkpt_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_bkpt_imm(imm)) }
+emit_bkpt_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_bkpt_imm(imm)) }
 inst_hvc_imm                        :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .HVC, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_hvc_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_hvc_imm(imm)) }
+emit_hvc_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_hvc_imm(imm)) }
 inst_smc_imm                        :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SMC, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_smc_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_smc_imm(imm)) }
+emit_smc_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_smc_imm(imm)) }
 inst_udf_imm                        :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .UDF, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_udf_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_udf_imm(imm)) }
+emit_udf_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_udf_imm(imm)) }
 inst_ldr_r_mem                      :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldr_r_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldr_r_mem(dst, src)) }
+emit_ldr_r_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldr_r_mem(dst, src)) }
 inst_str_r_mem                      :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_str_r_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_str_r_mem(dst, src)) }
+emit_str_r_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_str_r_mem(dst, src)) }
 inst_ldrb_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrb_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrb_r_mem(dst, src)) }
+emit_ldrb_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrb_r_mem(dst, src)) }
 inst_strb_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STRB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_strb_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_strb_r_mem(dst, src)) }
+emit_strb_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_strb_r_mem(dst, src)) }
 inst_ldrh_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrh_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrh_r_mem(dst, src)) }
+emit_ldrh_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrh_r_mem(dst, src)) }
 inst_strh_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STRH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_strh_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_strh_r_mem(dst, src)) }
+emit_strh_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_strh_r_mem(dst, src)) }
 inst_ldrsb_r_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRSB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrsb_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrsb_r_mem(dst, src)) }
+emit_ldrsb_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrsb_r_mem(dst, src)) }
 inst_ldrsh_r_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRSH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrsh_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrsh_r_mem(dst, src)) }
+emit_ldrsh_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrsh_r_mem(dst, src)) }
 inst_ldrd_r_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .LDRD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_ldrd_r_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_ldrd_r_r_mem(dst, src, src2)) }
+emit_ldrd_r_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_ldrd_r_r_mem(dst, src, src2)) }
 inst_strd_r_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STRD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_strd_r_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_strd_r_r_mem(dst, src, src2)) }
+emit_strd_r_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_strd_r_r_mem(dst, src, src2)) }
 inst_ldrt_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrt_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrt_r_mem(dst, src)) }
+emit_ldrt_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrt_r_mem(dst, src)) }
 inst_strt_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STRT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_strt_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_strt_r_mem(dst, src)) }
+emit_strt_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_strt_r_mem(dst, src)) }
 inst_ldrbt_r_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRBT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrbt_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrbt_r_mem(dst, src)) }
+emit_ldrbt_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrbt_r_mem(dst, src)) }
 inst_strbt_r_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STRBT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_strbt_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_strbt_r_mem(dst, src)) }
+emit_strbt_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_strbt_r_mem(dst, src)) }
 inst_ldrht_r_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRHT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrht_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrht_r_mem(dst, src)) }
+emit_ldrht_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrht_r_mem(dst, src)) }
 inst_strht_r_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STRHT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_strht_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_strht_r_mem(dst, src)) }
+emit_strht_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_strht_r_mem(dst, src)) }
 inst_ldrsbt_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRSBT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrsbt_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrsbt_r_mem(dst, src)) }
+emit_ldrsbt_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrsbt_r_mem(dst, src)) }
 inst_ldrsht_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDRSHT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrsht_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrsht_r_mem(dst, src)) }
+emit_ldrsht_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrsht_r_mem(dst, src)) }
 inst_lda_r_mem                      :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_lda_r_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_lda_r_mem(dst, src)) }
+emit_lda_r_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_lda_r_mem(dst, src)) }
 inst_stl_r_mem                      :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STL, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_stl_r_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_stl_r_mem(dst, src)) }
+emit_stl_r_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_stl_r_mem(dst, src)) }
 inst_ldab_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDAB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldab_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldab_r_mem(dst, src)) }
+emit_ldab_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldab_r_mem(dst, src)) }
 inst_stlb_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STLB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_stlb_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_stlb_r_mem(dst, src)) }
+emit_stlb_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_stlb_r_mem(dst, src)) }
 inst_ldah_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDAH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldah_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldah_r_mem(dst, src)) }
+emit_ldah_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldah_r_mem(dst, src)) }
 inst_stlh_r_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .STLH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_stlh_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_stlh_r_mem(dst, src)) }
+emit_stlh_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_stlh_r_mem(dst, src)) }
 inst_ldrex_r_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDREX, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrex_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrex_r_mem(dst, src)) }
+emit_ldrex_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrex_r_mem(dst, src)) }
 inst_strex_r_r_mem                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STREX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_strex_r_r_mem                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_strex_r_r_mem(dst, src, src2)) }
+emit_strex_r_r_mem                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_strex_r_r_mem(dst, src, src2)) }
 inst_ldrexb_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDREXB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrexb_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrexb_r_mem(dst, src)) }
+emit_ldrexb_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrexb_r_mem(dst, src)) }
 inst_strexb_r_r_mem                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STREXB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_strexb_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_strexb_r_r_mem(dst, src, src2)) }
+emit_strexb_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_strexb_r_r_mem(dst, src, src2)) }
 inst_ldrexh_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDREXH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldrexh_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrexh_r_mem(dst, src)) }
+emit_ldrexh_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrexh_r_mem(dst, src)) }
 inst_strexh_r_r_mem                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STREXH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_strexh_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_strexh_r_r_mem(dst, src, src2)) }
+emit_strexh_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_strexh_r_r_mem(dst, src, src2)) }
 inst_ldrexd_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDREXD, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_ldrexd_r_r_mem                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .LDREXD, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_ldrexd_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldrexd_r_mem(dst, src)) }
-emit_ldrexd_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_ldrexd_r_r_mem(dst, src, src2)) }
+emit_ldrexd_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldrexd_r_mem(dst, src)) }
+emit_ldrexd_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_ldrexd_r_r_mem(dst, src, src2)) }
 inst_strexd_r_r_mem                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STREXD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
 inst_strexd_r_r_r_mem               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Memory) -> Instruction { return Instruction{mnemonic = .STREXD, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_mem(src3), {}, {}}} }
-emit_strexd_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_strexd_r_r_mem(dst, src, src2)) }
-emit_strexd_r_r_r_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Memory) { append(instructions, inst_strexd_r_r_r_mem(dst, src, src2, src3)) }
+emit_strexd_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_strexd_r_r_mem(dst, src, src2)) }
+emit_strexd_r_r_r_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Memory) { append_elem(instructions, inst_strexd_r_r_r_mem(dst, src, src2, src3)) }
 inst_ldaex_r_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDAEX, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldaex_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldaex_r_mem(dst, src)) }
+emit_ldaex_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldaex_r_mem(dst, src)) }
 inst_stlex_r_r_mem                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STLEX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_stlex_r_r_mem                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_stlex_r_r_mem(dst, src, src2)) }
+emit_stlex_r_r_mem                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_stlex_r_r_mem(dst, src, src2)) }
 inst_ldaexb_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDAEXB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldaexb_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldaexb_r_mem(dst, src)) }
+emit_ldaexb_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldaexb_r_mem(dst, src)) }
 inst_stlexb_r_r_mem                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STLEXB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_stlexb_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_stlexb_r_r_mem(dst, src, src2)) }
+emit_stlexb_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_stlexb_r_r_mem(dst, src, src2)) }
 inst_ldaexh_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDAEXH, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldaexh_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldaexh_r_mem(dst, src)) }
+emit_ldaexh_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldaexh_r_mem(dst, src)) }
 inst_stlexh_r_r_mem                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STLEXH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_stlexh_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_stlexh_r_r_mem(dst, src, src2)) }
+emit_stlexh_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_stlexh_r_r_mem(dst, src, src2)) }
 inst_ldaexd_r_mem                   :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .LDAEXD, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_ldaexd_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_ldaexd_r_mem(dst, src)) }
+emit_ldaexd_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_ldaexd_r_mem(dst, src)) }
 inst_stlexd_r_r_mem                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STLEXD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_stlexd_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_stlexd_r_r_mem(dst, src, src2)) }
+emit_stlexd_r_r_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_stlexd_r_r_mem(dst, src, src2)) }
 inst_ldm_r_list                     :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .LDM, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_ldm_r_list                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_ldm_r_list(dst, regs)) }
+emit_ldm_r_list                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_ldm_r_list(dst, regs)) }
 inst_stm_r_list                     :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .STM, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_stm_r_list                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_stm_r_list(dst, regs)) }
+emit_stm_r_list                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_stm_r_list(dst, regs)) }
 inst_ldmib_r_list                   :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .LDMIB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_ldmib_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_ldmib_r_list(dst, regs)) }
+emit_ldmib_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_ldmib_r_list(dst, regs)) }
 inst_ldmda_r_list                   :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .LDMDA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_ldmda_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_ldmda_r_list(dst, regs)) }
+emit_ldmda_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_ldmda_r_list(dst, regs)) }
 inst_ldmdb_r_list                   :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .LDMDB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_ldmdb_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_ldmdb_r_list(dst, regs)) }
+emit_ldmdb_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_ldmdb_r_list(dst, regs)) }
 inst_stmib_r_list                   :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .STMIB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_stmib_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_stmib_r_list(dst, regs)) }
+emit_stmib_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_stmib_r_list(dst, regs)) }
 inst_stmda_r_list                   :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .STMDA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_stmda_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_stmda_r_list(dst, regs)) }
+emit_stmda_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_stmda_r_list(dst, regs)) }
 inst_stmdb_r_list                   :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .STMDB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_stmdb_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_stmdb_r_list(dst, regs)) }
+emit_stmdb_r_list                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_stmdb_r_list(dst, regs)) }
 inst_push_list                      :: #force_inline proc "contextless" (regs: u16) -> Instruction { return Instruction{mnemonic = .PUSH, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), {}, {}, {}, {}, {}}} }
-emit_push_list                      :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16) { append(instructions, inst_push_list(regs)) }
+emit_push_list                      :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16) { append_elem(instructions, inst_push_list(regs)) }
 inst_pop_list                       :: #force_inline proc "contextless" (regs: u16) -> Instruction { return Instruction{mnemonic = .POP, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), {}, {}, {}, {}, {}}} }
-emit_pop_list                       :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16) { append(instructions, inst_pop_list(regs)) }
+emit_pop_list                       :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16) { append_elem(instructions, inst_pop_list(regs)) }
 inst_swp_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SWP, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_swp_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_swp_r_r_r(dst, src, src2)) }
+emit_swp_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_swp_r_r_r(dst, src, src2)) }
 inst_swpb_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SWPB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_swpb_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_swpb_r_r_r(dst, src, src2)) }
+emit_swpb_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_swpb_r_r_r(dst, src, src2)) }
 inst_rfeda_r                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .RFEDA, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_rfeda_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_rfeda_r(dst)) }
+emit_rfeda_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_rfeda_r(dst)) }
 inst_rfedb_r                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .RFEDB, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_rfedb_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_rfedb_r(dst)) }
+emit_rfedb_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_rfedb_r(dst)) }
 inst_rfeia_r                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .RFEIA, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_rfeia_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_rfeia_r(dst)) }
+emit_rfeia_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_rfeia_r(dst)) }
 inst_rfeib_r                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .RFEIB, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_rfeib_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_rfeib_r(dst)) }
+emit_rfeib_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_rfeib_r(dst)) }
 inst_srsda_r_imm                    :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSDA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_srsda_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_srsda_r_imm(dst, imm)) }
+emit_srsda_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_srsda_r_imm(dst, imm)) }
 inst_srsdb_r_imm                    :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSDB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_srsdb_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_srsdb_r_imm(dst, imm)) }
+emit_srsdb_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_srsdb_r_imm(dst, imm)) }
 inst_srsia_r_imm                    :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSIA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_srsia_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_srsia_r_imm(dst, imm)) }
+emit_srsia_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_srsia_r_imm(dst, imm)) }
 inst_srsib_r_imm                    :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSIB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_srsib_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_srsib_r_imm(dst, imm)) }
+emit_srsib_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_srsib_r_imm(dst, imm)) }
 inst_cdp_cpn_cpop_crd_crd_crd_cpop  :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CDP, operand_count = 6, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), op_imm(imm2)}} }
-emit_cdp_cpn_cpop_crd_crd_crd_cpop  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append(instructions, inst_cdp_cpn_cpop_crd_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
+emit_cdp_cpn_cpop_crd_crd_crd_cpop  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append_elem(instructions, inst_cdp_cpn_cpop_crd_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
 inst_cdp2_cpn_cpop_crd_crd_crd_cpop :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CDP2, operand_count = 6, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), op_imm(imm2)}} }
-emit_cdp2_cpn_cpop_crd_crd_crd_cpop :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append(instructions, inst_cdp2_cpn_cpop_crd_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
+emit_cdp2_cpn_cpop_crd_crd_crd_cpop :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append_elem(instructions, inst_cdp2_cpn_cpop_crd_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
 inst_mcr_cpn_cpop_r_crd_crd_cpop    :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .MCR, operand_count = 6, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), op_imm(imm2)}} }
-emit_mcr_cpn_cpop_r_crd_crd_cpop    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append(instructions, inst_mcr_cpn_cpop_r_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
+emit_mcr_cpn_cpop_r_crd_crd_cpop    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append_elem(instructions, inst_mcr_cpn_cpop_r_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
 inst_mcr2_cpn_cpop_r_crd_crd_cpop   :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .MCR2, operand_count = 6, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), op_imm(imm2)}} }
-emit_mcr2_cpn_cpop_r_crd_crd_cpop   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append(instructions, inst_mcr2_cpn_cpop_r_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
+emit_mcr2_cpn_cpop_r_crd_crd_cpop   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append_elem(instructions, inst_mcr2_cpn_cpop_r_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
 inst_mrc_cpn_cpop_r_crd_crd_cpop    :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .MRC, operand_count = 6, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), op_imm(imm2)}} }
-emit_mrc_cpn_cpop_r_crd_crd_cpop    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append(instructions, inst_mrc_cpn_cpop_r_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
+emit_mrc_cpn_cpop_r_crd_crd_cpop    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append_elem(instructions, inst_mrc_cpn_cpop_r_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
 inst_mrc2_cpn_cpop_r_crd_crd_cpop   :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .MRC2, operand_count = 6, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), op_imm(imm2)}} }
-emit_mrc2_cpn_cpop_r_crd_crd_cpop   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append(instructions, inst_mrc2_cpn_cpop_r_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
+emit_mrc2_cpn_cpop_r_crd_crd_cpop   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register, imm2: i64) { append_elem(instructions, inst_mrc2_cpn_cpop_r_crd_crd_cpop(dst, imm, src, src2, src3, imm2)) }
 inst_mcrr_cpn_cpop_r_r_crd          :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MCRR, operand_count = 5, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}}} }
-emit_mcrr_cpn_cpop_r_r_crd          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_mcrr_cpn_cpop_r_r_crd(dst, imm, src, src2, src3)) }
+emit_mcrr_cpn_cpop_r_r_crd          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_mcrr_cpn_cpop_r_r_crd(dst, imm, src, src2, src3)) }
 inst_mcrr2_cpn_cpop_r_r_crd         :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MCRR2, operand_count = 5, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}}} }
-emit_mcrr2_cpn_cpop_r_r_crd         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_mcrr2_cpn_cpop_r_r_crd(dst, imm, src, src2, src3)) }
+emit_mcrr2_cpn_cpop_r_r_crd         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_mcrr2_cpn_cpop_r_r_crd(dst, imm, src, src2, src3)) }
 inst_mrrc_cpn_cpop_r_r_crd          :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MRRC, operand_count = 5, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}}} }
-emit_mrrc_cpn_cpop_r_r_crd          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_mrrc_cpn_cpop_r_r_crd(dst, imm, src, src2, src3)) }
+emit_mrrc_cpn_cpop_r_r_crd          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_mrrc_cpn_cpop_r_r_crd(dst, imm, src, src2, src3)) }
 inst_mrrc2_cpn_cpop_r_r_crd         :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MRRC2, operand_count = 5, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}}} }
-emit_mrrc2_cpn_cpop_r_r_crd         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_mrrc2_cpn_cpop_r_r_crd(dst, imm, src, src2, src3)) }
+emit_mrrc2_cpn_cpop_r_r_crd         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_mrrc2_cpn_cpop_r_r_crd(dst, imm, src, src2, src3)) }
 inst_ldc_cpn_crd_mem                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .LDC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_ldc_cpn_crd_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_ldc_cpn_crd_mem(dst, src, src2)) }
+emit_ldc_cpn_crd_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_ldc_cpn_crd_mem(dst, src, src2)) }
 inst_ldc2_cpn_crd_mem               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .LDC2, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_ldc2_cpn_crd_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_ldc2_cpn_crd_mem(dst, src, src2)) }
+emit_ldc2_cpn_crd_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_ldc2_cpn_crd_mem(dst, src, src2)) }
 inst_stc_cpn_crd_mem                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_stc_cpn_crd_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_stc_cpn_crd_mem(dst, src, src2)) }
+emit_stc_cpn_crd_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_stc_cpn_crd_mem(dst, src, src2)) }
 inst_stc2_cpn_crd_mem               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STC2, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_stc2_cpn_crd_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_stc2_cpn_crd_mem(dst, src, src2)) }
+emit_stc2_cpn_crd_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_stc2_cpn_crd_mem(dst, src, src2)) }
 inst_ldcl_cpn_crd_mem               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .LDCL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_ldcl_cpn_crd_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_ldcl_cpn_crd_mem(dst, src, src2)) }
+emit_ldcl_cpn_crd_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_ldcl_cpn_crd_mem(dst, src, src2)) }
 inst_ldc2l_cpn_crd_mem              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .LDC2L, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_ldc2l_cpn_crd_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_ldc2l_cpn_crd_mem(dst, src, src2)) }
+emit_ldc2l_cpn_crd_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_ldc2l_cpn_crd_mem(dst, src, src2)) }
 inst_stcl_cpn_crd_mem               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STCL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_stcl_cpn_crd_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_stcl_cpn_crd_mem(dst, src, src2)) }
+emit_stcl_cpn_crd_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_stcl_cpn_crd_mem(dst, src, src2)) }
 inst_stc2l_cpn_crd_mem              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Memory) -> Instruction { return Instruction{mnemonic = .STC2L, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_mem(src2), {}, {}, {}}} }
-emit_stc2l_cpn_crd_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append(instructions, inst_stc2l_cpn_crd_mem(dst, src, src2)) }
+emit_stc2l_cpn_crd_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Memory) { append_elem(instructions, inst_stc2l_cpn_crd_mem(dst, src, src2)) }
 inst_crc32b_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRC32B, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_crc32b_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32b_r_r_r(dst, src, src2)) }
+emit_crc32b_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32b_r_r_r(dst, src, src2)) }
 inst_crc32h_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRC32H, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_crc32h_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32h_r_r_r(dst, src, src2)) }
+emit_crc32h_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32h_r_r_r(dst, src, src2)) }
 inst_crc32w_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRC32W, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_crc32w_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32w_r_r_r(dst, src, src2)) }
+emit_crc32w_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32w_r_r_r(dst, src, src2)) }
 inst_crc32cb_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRC32CB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_crc32cb_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32cb_r_r_r(dst, src, src2)) }
+emit_crc32cb_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32cb_r_r_r(dst, src, src2)) }
 inst_crc32ch_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRC32CH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_crc32ch_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32ch_r_r_r(dst, src, src2)) }
+emit_crc32ch_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32ch_r_r_r(dst, src, src2)) }
 inst_crc32cw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRC32CW, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_crc32cw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32cw_r_r_r(dst, src, src2)) }
+emit_crc32cw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32cw_r_r_r(dst, src, src2)) }
 inst_vadd_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vadd_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadd_s_s_s(dst, src, src2)) }
+emit_vadd_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadd_s_s_s(dst, src, src2)) }
 inst_vsub_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vsub_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsub_s_s_s(dst, src, src2)) }
+emit_vsub_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsub_s_s_s(dst, src, src2)) }
 inst_vmul_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMUL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vmul_d_d_dlane                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VMUL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vmul_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmul_s_s_s(dst, src, src2)) }
-emit_vmul_d_d_dlane                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vmul_d_d_dlane(dst, src, src2, lane)) }
+emit_vmul_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmul_s_s_s(dst, src, src2)) }
+emit_vmul_d_d_dlane                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vmul_d_d_dlane(dst, src, src2, lane)) }
 inst_vdiv_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIV, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vdiv_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdiv_s_s_s(dst, src, src2)) }
+emit_vdiv_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdiv_s_s_s(dst, src, src2)) }
 inst_vmla_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vmla_d_d_dlane                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VMLA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vmla_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmla_s_s_s(dst, src, src2)) }
-emit_vmla_d_d_dlane                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vmla_d_d_dlane(dst, src, src2, lane)) }
+emit_vmla_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmla_s_s_s(dst, src, src2)) }
+emit_vmla_d_d_dlane                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vmla_d_d_dlane(dst, src, src2, lane)) }
 inst_vmls_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLS, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vmls_d_d_dlane                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VMLS, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vmls_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmls_s_s_s(dst, src, src2)) }
-emit_vmls_d_d_dlane                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vmls_d_d_dlane(dst, src, src2, lane)) }
+emit_vmls_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmls_s_s_s(dst, src, src2)) }
+emit_vmls_d_d_dlane                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vmls_d_d_dlane(dst, src, src2, lane)) }
 inst_vnmul_s_s_s                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNMUL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vnmul_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vnmul_s_s_s(dst, src, src2)) }
+emit_vnmul_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vnmul_s_s_s(dst, src, src2)) }
 inst_vnmla_s_s_s                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNMLA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vnmla_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vnmla_s_s_s(dst, src, src2)) }
+emit_vnmla_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vnmla_s_s_s(dst, src, src2)) }
 inst_vnmls_s_s_s                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNMLS, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vnmls_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vnmls_s_s_s(dst, src, src2)) }
+emit_vnmls_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vnmls_s_s_s(dst, src, src2)) }
 inst_vfma_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VFMA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vfma_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vfma_s_s_s(dst, src, src2)) }
+emit_vfma_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vfma_s_s_s(dst, src, src2)) }
 inst_vfms_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VFMS, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vfms_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vfms_s_s_s(dst, src, src2)) }
+emit_vfms_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vfms_s_s_s(dst, src, src2)) }
 inst_vfnma_s_s_s                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VFNMA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vfnma_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vfnma_s_s_s(dst, src, src2)) }
+emit_vfnma_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vfnma_s_s_s(dst, src, src2)) }
 inst_vfnms_s_s_s                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VFNMS, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vfnms_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vfnms_s_s_s(dst, src, src2)) }
+emit_vfnms_s_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vfnms_s_s_s(dst, src, src2)) }
 inst_vfmab_q_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VFMAB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vfmab_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vfmab_q_q_q(dst, src, src2)) }
+emit_vfmab_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vfmab_q_q_q(dst, src, src2)) }
 inst_vfmat_q_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VFMAT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vfmat_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vfmat_q_q_q(dst, src, src2)) }
+emit_vfmat_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vfmat_q_q_q(dst, src, src2)) }
 inst_vabs_s_s                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VABS, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vabs_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vabs_s_s(dst, src)) }
+emit_vabs_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vabs_s_s(dst, src)) }
 inst_vneg_s_s                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VNEG, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vneg_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vneg_s_s(dst, src)) }
+emit_vneg_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vneg_s_s(dst, src)) }
 inst_vsqrt_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSQRT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vsqrt_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vsqrt_s_s(dst, src)) }
+emit_vsqrt_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vsqrt_s_s(dst, src)) }
 inst_vcmp_s_s                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCMP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
 inst_vcmp_s                         :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VCMP, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_vcmp_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcmp_s_s(dst, src)) }
-emit_vcmp_s                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vcmp_s(dst)) }
+emit_vcmp_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcmp_s_s(dst, src)) }
+emit_vcmp_s                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vcmp_s(dst)) }
 inst_vcmpe_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCMPE, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
 inst_vcmpe_s                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VCMPE, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_vcmpe_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcmpe_s_s(dst, src)) }
-emit_vcmpe_s                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vcmpe_s(dst)) }
+emit_vcmpe_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcmpe_s_s(dst, src)) }
+emit_vcmpe_s                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vcmpe_s(dst)) }
 inst_vcvt_d_s                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCVT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
 inst_vcvt_s_s_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCVT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vcvt_d_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcvt_d_s(dst, src)) }
-emit_vcvt_s_s_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vcvt_s_s_imm(dst, src, imm)) }
+emit_vcvt_d_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcvt_d_s(dst, src)) }
+emit_vcvt_s_s_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vcvt_s_s_imm(dst, src, imm)) }
 inst_vcvtb_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCVTB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcvtb_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcvtb_s_s(dst, src)) }
+emit_vcvtb_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcvtb_s_s(dst, src)) }
 inst_vcvtt_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCVTT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcvtt_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcvtt_s_s(dst, src)) }
+emit_vcvtt_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcvtt_s_s(dst, src)) }
 inst_vcvta_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCVTA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcvta_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcvta_s_s(dst, src)) }
+emit_vcvta_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcvta_s_s(dst, src)) }
 inst_vcvtn_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCVTN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcvtn_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcvtn_s_s(dst, src)) }
+emit_vcvtn_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcvtn_s_s(dst, src)) }
 inst_vcvtp_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCVTP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcvtp_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcvtp_s_s(dst, src)) }
+emit_vcvtp_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcvtp_s_s(dst, src)) }
 inst_vcvtm_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCVTM, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcvtm_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcvtm_s_s(dst, src)) }
+emit_vcvtm_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcvtm_s_s(dst, src)) }
 inst_vcvtr_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCVTR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcvtr_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcvtr_s_s(dst, src)) }
+emit_vcvtr_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcvtr_s_s(dst, src)) }
 inst_vmov_s_s                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOV, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
 inst_vmov_s_imm8                    :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VMOV, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_vmov_r_r_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMOV, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
@@ -759,681 +759,681 @@ inst_vmov_r_r_s_s                   :: #force_inline proc "contextless" (dst: Re
 inst_vmov_r_dlane                   :: #force_inline proc "contextless" (dst: Register, src: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VMOV, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_dpr_lane(src, lane), {}, {}, {}, {}}} }
 inst_vmov_qlane_r                   :: #force_inline proc "contextless" (dst: Register, lane: u8, src: Register) -> Instruction { return Instruction{mnemonic = .VMOV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_qpr_lane(dst, lane), op_reg(src), {}, {}, {}, {}}} }
 inst_vmov_qlane_qlane_r_r           :: #force_inline proc "contextless" (dst: Register, lane: u8, src: Register, lane2: u8, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMOV, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_qpr_lane(dst, lane), op_qpr_lane(src, lane2), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmov_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmov_s_s(dst, src)) }
-emit_vmov_s_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vmov_s_imm8(dst, imm)) }
-emit_vmov_r_r_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmov_r_r_d(dst, src, src2)) }
-emit_vmov_r_r_s_s                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmov_r_r_s_s(dst, src, src2, src3)) }
-emit_vmov_r_dlane                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, lane: u8) { append(instructions, inst_vmov_r_dlane(dst, src, lane)) }
-emit_vmov_qlane_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, lane: u8, src: Register) { append(instructions, inst_vmov_qlane_r(dst, lane, src)) }
-emit_vmov_qlane_qlane_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, lane: u8, src: Register, lane2: u8, src2: Register, src3: Register) { append(instructions, inst_vmov_qlane_qlane_r_r(dst, lane, src, lane2, src2, src3)) }
+emit_vmov_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmov_s_s(dst, src)) }
+emit_vmov_s_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vmov_s_imm8(dst, imm)) }
+emit_vmov_r_r_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmov_r_r_d(dst, src, src2)) }
+emit_vmov_r_r_s_s                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmov_r_r_s_s(dst, src, src2, src3)) }
+emit_vmov_r_dlane                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, lane: u8) { append_elem(instructions, inst_vmov_r_dlane(dst, src, lane)) }
+emit_vmov_qlane_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, lane: u8, src: Register) { append_elem(instructions, inst_vmov_qlane_r(dst, lane, src)) }
+emit_vmov_qlane_qlane_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, lane: u8, src: Register, lane2: u8, src2: Register, src3: Register) { append_elem(instructions, inst_vmov_qlane_qlane_r_r(dst, lane, src, lane2, src2, src3)) }
 inst_vmrs_r_psr                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VMRS, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_vmrs_r_psr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vmrs_r_psr(dst, imm)) }
+emit_vmrs_r_psr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vmrs_r_psr(dst, imm)) }
 inst_vmsr_psr_r                     :: #force_inline proc "contextless" (imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .VMSR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), {}, {}, {}, {}}} }
-emit_vmsr_psr_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register) { append(instructions, inst_vmsr_psr_r(imm, src)) }
+emit_vmsr_psr_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register) { append_elem(instructions, inst_vmsr_psr_r(imm, src)) }
 inst_vldr_s_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VLDR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_vldr_s_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vldr_s_mem(dst, src)) }
+emit_vldr_s_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vldr_s_mem(dst, src)) }
 inst_vstr_s_mem                     :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VSTR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
-emit_vstr_s_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vstr_s_mem(dst, src)) }
+emit_vstr_s_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vstr_s_mem(dst, src)) }
 inst_vldmia_r_slist                 :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .VLDMIA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_vldmia_r_slist                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_vldmia_r_slist(dst, regs)) }
+emit_vldmia_r_slist                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_vldmia_r_slist(dst, regs)) }
 inst_vldmdb_r_slist                 :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .VLDMDB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_vldmdb_r_slist                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_vldmdb_r_slist(dst, regs)) }
+emit_vldmdb_r_slist                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_vldmdb_r_slist(dst, regs)) }
 inst_vstmia_r_slist                 :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .VSTMIA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_vstmia_r_slist                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_vstmia_r_slist(dst, regs)) }
+emit_vstmia_r_slist                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_vstmia_r_slist(dst, regs)) }
 inst_vstmdb_r_slist                 :: #force_inline proc "contextless" (dst: Register, regs: u16) -> Instruction { return Instruction{mnemonic = .VSTMDB, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), {}, {}, {}, {}}} }
-emit_vstmdb_r_slist                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append(instructions, inst_vstmdb_r_slist(dst, regs)) }
+emit_vstmdb_r_slist                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16) { append_elem(instructions, inst_vstmdb_r_slist(dst, regs)) }
 inst_vpush_slist                    :: #force_inline proc "contextless" (regs: u16) -> Instruction { return Instruction{mnemonic = .VPUSH, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), {}, {}, {}, {}, {}}} }
-emit_vpush_slist                    :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16) { append(instructions, inst_vpush_slist(regs)) }
+emit_vpush_slist                    :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16) { append_elem(instructions, inst_vpush_slist(regs)) }
 inst_vpop_slist                     :: #force_inline proc "contextless" (regs: u16) -> Instruction { return Instruction{mnemonic = .VPOP, operand_count = 1, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), {}, {}, {}, {}, {}}} }
-emit_vpop_slist                     :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16) { append(instructions, inst_vpop_slist(regs)) }
+emit_vpop_slist                     :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16) { append_elem(instructions, inst_vpop_slist(regs)) }
 inst_vsel_s_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSEL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vsel_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsel_s_s_s(dst, src, src2)) }
+emit_vsel_s_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsel_s_s_s(dst, src, src2)) }
 inst_vmaxnm_s_s_s                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXNM, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmaxnm_s_s_s                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxnm_s_s_s(dst, src, src2)) }
+emit_vmaxnm_s_s_s                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxnm_s_s_s(dst, src, src2)) }
 inst_vminnm_s_s_s                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINNM, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vminnm_s_s_s                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminnm_s_s_s(dst, src, src2)) }
+emit_vminnm_s_s_s                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminnm_s_s_s(dst, src, src2)) }
 inst_vrinta_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRINTA, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrinta_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrinta_s_s(dst, src)) }
+emit_vrinta_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrinta_s_s(dst, src)) }
 inst_vrintn_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRINTN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrintn_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrintn_s_s(dst, src)) }
+emit_vrintn_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrintn_s_s(dst, src)) }
 inst_vrintp_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRINTP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrintp_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrintp_s_s(dst, src)) }
+emit_vrintp_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrintp_s_s(dst, src)) }
 inst_vrintm_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRINTM, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrintm_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrintm_s_s(dst, src)) }
+emit_vrintm_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrintm_s_s(dst, src)) }
 inst_vrintr_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRINTR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrintr_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrintr_s_s(dst, src)) }
+emit_vrintr_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrintr_s_s(dst, src)) }
 inst_vrintz_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRINTZ, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrintz_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrintz_s_s(dst, src)) }
+emit_vrintz_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrintz_s_s(dst, src)) }
 inst_vrintx_s_s                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRINTX, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrintx_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrintx_s_s(dst, src)) }
+emit_vrintx_s_s                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrintx_s_s(dst, src)) }
 inst_vaddl_q_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vaddl_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddl_q_d_d(dst, src, src2)) }
+emit_vaddl_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddl_q_d_d(dst, src, src2)) }
 inst_vaddw_q_q_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDW, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vaddw_q_q_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddw_q_q_d(dst, src, src2)) }
+emit_vaddw_q_q_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddw_q_q_d(dst, src, src2)) }
 inst_vsubl_q_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vsubl_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubl_q_d_d(dst, src, src2)) }
+emit_vsubl_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubl_q_d_d(dst, src, src2)) }
 inst_vsubw_q_q_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBW, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vsubw_q_q_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubw_q_q_d(dst, src, src2)) }
+emit_vsubw_q_q_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubw_q_q_d(dst, src, src2)) }
 inst_vhadd_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vhadd_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhadd_d_d_d(dst, src, src2)) }
+emit_vhadd_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhadd_d_d_d(dst, src, src2)) }
 inst_vhsub_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHSUB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vhsub_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhsub_d_d_d(dst, src, src2)) }
+emit_vhsub_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhsub_d_d_d(dst, src, src2)) }
 inst_vrhadd_d_d_d                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRHADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vrhadd_d_d_d                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrhadd_d_d_d(dst, src, src2)) }
+emit_vrhadd_d_d_d                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrhadd_d_d_d(dst, src, src2)) }
 inst_vqadd_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqadd_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqadd_d_d_d(dst, src, src2)) }
+emit_vqadd_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqadd_d_d_d(dst, src, src2)) }
 inst_vqsub_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQSUB, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqsub_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqsub_d_d_d(dst, src, src2)) }
+emit_vqsub_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqsub_d_d_d(dst, src, src2)) }
 inst_vmull_q_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vmull_q_d_dlane                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VMULL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vmull_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmull_q_d_d(dst, src, src2)) }
-emit_vmull_q_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vmull_q_d_dlane(dst, src, src2, lane)) }
+emit_vmull_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmull_q_d_d(dst, src, src2)) }
+emit_vmull_q_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vmull_q_d_dlane(dst, src, src2, lane)) }
 inst_vmlal_q_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLAL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vmlal_q_d_dlane                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VMLAL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vmlal_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlal_q_d_d(dst, src, src2)) }
-emit_vmlal_q_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vmlal_q_d_dlane(dst, src, src2, lane)) }
+emit_vmlal_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlal_q_d_d(dst, src, src2)) }
+emit_vmlal_q_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vmlal_q_d_dlane(dst, src, src2, lane)) }
 inst_vmlsl_q_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vmlsl_q_d_dlane                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VMLSL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vmlsl_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlsl_q_d_d(dst, src, src2)) }
-emit_vmlsl_q_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vmlsl_q_d_dlane(dst, src, src2, lane)) }
+emit_vmlsl_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlsl_q_d_d(dst, src, src2)) }
+emit_vmlsl_q_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vmlsl_q_d_dlane(dst, src, src2, lane)) }
 inst_vqdmull_q_d_d                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQDMULL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vqdmull_q_d_dlane              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VQDMULL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vqdmull_q_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqdmull_q_d_d(dst, src, src2)) }
-emit_vqdmull_q_d_dlane              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vqdmull_q_d_dlane(dst, src, src2, lane)) }
+emit_vqdmull_q_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqdmull_q_d_d(dst, src, src2)) }
+emit_vqdmull_q_d_dlane              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vqdmull_q_d_dlane(dst, src, src2, lane)) }
 inst_vqdmlal_q_d_d                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQDMLAL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vqdmlal_q_d_dlane              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VQDMLAL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vqdmlal_q_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqdmlal_q_d_d(dst, src, src2)) }
-emit_vqdmlal_q_d_dlane              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vqdmlal_q_d_dlane(dst, src, src2, lane)) }
+emit_vqdmlal_q_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqdmlal_q_d_d(dst, src, src2)) }
+emit_vqdmlal_q_d_dlane              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vqdmlal_q_d_dlane(dst, src, src2, lane)) }
 inst_vqdmlsl_q_d_d                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQDMLSL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vqdmlsl_q_d_dlane              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VQDMLSL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vqdmlsl_q_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqdmlsl_q_d_d(dst, src, src2)) }
-emit_vqdmlsl_q_d_dlane              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vqdmlsl_q_d_dlane(dst, src, src2, lane)) }
+emit_vqdmlsl_q_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqdmlsl_q_d_d(dst, src, src2)) }
+emit_vqdmlsl_q_d_dlane              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vqdmlsl_q_d_dlane(dst, src, src2, lane)) }
 inst_vqdmulh_d_d_d                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQDMULH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vqdmulh_d_d_dlane              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VQDMULH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vqdmulh_d_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqdmulh_d_d_d(dst, src, src2)) }
-emit_vqdmulh_d_d_dlane              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vqdmulh_d_d_dlane(dst, src, src2, lane)) }
+emit_vqdmulh_d_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqdmulh_d_d_d(dst, src, src2)) }
+emit_vqdmulh_d_d_dlane              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vqdmulh_d_d_dlane(dst, src, src2, lane)) }
 inst_vqrdmulh_d_d_d                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQRDMULH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vqrdmulh_d_d_dlane             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VQRDMULH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vqrdmulh_d_d_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqrdmulh_d_d_d(dst, src, src2)) }
-emit_vqrdmulh_d_d_dlane             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vqrdmulh_d_d_dlane(dst, src, src2, lane)) }
+emit_vqrdmulh_d_d_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqrdmulh_d_d_d(dst, src, src2)) }
+emit_vqrdmulh_d_d_dlane             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vqrdmulh_d_d_dlane(dst, src, src2, lane)) }
 inst_vqrdmlah_d_d_d                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQRDMLAH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vqrdmlah_d_d_dlane             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VQRDMLAH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vqrdmlah_d_d_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqrdmlah_d_d_d(dst, src, src2)) }
-emit_vqrdmlah_d_d_dlane             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vqrdmlah_d_d_dlane(dst, src, src2, lane)) }
+emit_vqrdmlah_d_d_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqrdmlah_d_d_d(dst, src, src2)) }
+emit_vqrdmlah_d_d_dlane             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vqrdmlah_d_d_dlane(dst, src, src2, lane)) }
 inst_vqrdmlsh_d_d_d                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQRDMLSH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vqrdmlsh_d_d_dlane             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VQRDMLSH, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vqrdmlsh_d_d_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqrdmlsh_d_d_d(dst, src, src2)) }
-emit_vqrdmlsh_d_d_dlane             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vqrdmlsh_d_d_dlane(dst, src, src2, lane)) }
+emit_vqrdmlsh_d_d_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqrdmlsh_d_d_d(dst, src, src2)) }
+emit_vqrdmlsh_d_d_dlane             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vqrdmlsh_d_d_dlane(dst, src, src2, lane)) }
 inst_vaba_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VABA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vaba_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaba_d_d_d(dst, src, src2)) }
+emit_vaba_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaba_d_d_d(dst, src, src2)) }
 inst_vabal_q_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VABAL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vabal_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vabal_q_d_d(dst, src, src2)) }
+emit_vabal_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vabal_q_d_d(dst, src, src2)) }
 inst_vabd_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VABD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vabd_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vabd_d_d_d(dst, src, src2)) }
+emit_vabd_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vabd_d_d_d(dst, src, src2)) }
 inst_vabdl_q_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VABDL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vabdl_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vabdl_q_d_d(dst, src, src2)) }
+emit_vabdl_q_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vabdl_q_d_d(dst, src, src2)) }
 inst_vand_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAND, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vand_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vand_d_d_d(dst, src, src2)) }
+emit_vand_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vand_d_d_d(dst, src, src2)) }
 inst_vbic_d_imm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VBIC, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_vbic_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VBIC, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vbic_d_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vbic_d_imm(dst, imm)) }
-emit_vbic_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vbic_d_d_d(dst, src, src2)) }
+emit_vbic_d_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vbic_d_imm(dst, imm)) }
+emit_vbic_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vbic_d_d_d(dst, src, src2)) }
 inst_vorr_d_imm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VORR, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
 inst_vorr_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VORR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vorr_d_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vorr_d_imm(dst, imm)) }
-emit_vorr_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vorr_d_d_d(dst, src, src2)) }
+emit_vorr_d_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vorr_d_imm(dst, imm)) }
+emit_vorr_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vorr_d_d_d(dst, src, src2)) }
 inst_vorn_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VORN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vorn_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vorn_d_d_d(dst, src, src2)) }
+emit_vorn_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vorn_d_d_d(dst, src, src2)) }
 inst_veor_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VEOR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_veor_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_veor_d_d_d(dst, src, src2)) }
+emit_veor_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_veor_d_d_d(dst, src, src2)) }
 inst_vbsl_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VBSL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vbsl_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vbsl_d_d_d(dst, src, src2)) }
+emit_vbsl_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vbsl_d_d_d(dst, src, src2)) }
 inst_vbit_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VBIT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vbit_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vbit_d_d_d(dst, src, src2)) }
+emit_vbit_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vbit_d_d_d(dst, src, src2)) }
 inst_vbif_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VBIF, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vbif_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vbif_d_d_d(dst, src, src2)) }
+emit_vbif_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vbif_d_d_d(dst, src, src2)) }
 inst_vmvn_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMVN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
 inst_vmvn_d_imm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VMVN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}, {}, {}}} }
-emit_vmvn_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmvn_d_d(dst, src)) }
-emit_vmvn_d_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vmvn_d_imm(dst, imm)) }
+emit_vmvn_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmvn_d_d(dst, src)) }
+emit_vmvn_d_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vmvn_d_imm(dst, imm)) }
 inst_vmovn_d_q                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOVN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmovn_d_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmovn_d_q(dst, src)) }
+emit_vmovn_d_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmovn_d_q(dst, src)) }
 inst_vqmovn_d_q                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VQMOVN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vqmovn_d_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vqmovn_d_q(dst, src)) }
+emit_vqmovn_d_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vqmovn_d_q(dst, src)) }
 inst_vqmovun_d_q                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VQMOVUN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vqmovun_d_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vqmovun_d_q(dst, src)) }
+emit_vqmovun_d_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vqmovun_d_q(dst, src)) }
 inst_vmovl_q_d                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOVL, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmovl_q_d                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmovl_q_d(dst, src)) }
+emit_vmovl_q_d                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmovl_q_d(dst, src)) }
 inst_vtst_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VTST, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vtst_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vtst_d_d_d(dst, src, src2)) }
+emit_vtst_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vtst_d_d_d(dst, src, src2)) }
 inst_vceq_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCEQ, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vceq_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCEQ, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vceq_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vceq_d_d_d(dst, src, src2)) }
-emit_vceq_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vceq_d_d(dst, src)) }
+emit_vceq_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vceq_d_d_d(dst, src, src2)) }
+emit_vceq_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vceq_d_d(dst, src)) }
 inst_vcge_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCGE, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vcge_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCGE, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcge_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcge_d_d_d(dst, src, src2)) }
-emit_vcge_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcge_d_d(dst, src)) }
+emit_vcge_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcge_d_d_d(dst, src, src2)) }
+emit_vcge_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcge_d_d(dst, src)) }
 inst_vcgt_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCGT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vcgt_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCGT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcgt_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcgt_d_d_d(dst, src, src2)) }
-emit_vcgt_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcgt_d_d(dst, src)) }
+emit_vcgt_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcgt_d_d_d(dst, src, src2)) }
+emit_vcgt_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcgt_d_d(dst, src)) }
 inst_vcle_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCLE, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vcle_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCLE, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcle_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcle_d_d_d(dst, src, src2)) }
-emit_vcle_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcle_d_d(dst, src)) }
+emit_vcle_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcle_d_d_d(dst, src, src2)) }
+emit_vcle_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcle_d_d(dst, src)) }
 inst_vclt_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCLT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vclt_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCLT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vclt_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vclt_d_d_d(dst, src, src2)) }
-emit_vclt_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vclt_d_d(dst, src)) }
+emit_vclt_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vclt_d_d_d(dst, src, src2)) }
+emit_vclt_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vclt_d_d(dst, src)) }
 inst_vacge_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VACGE, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vacge_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vacge_d_d_d(dst, src, src2)) }
+emit_vacge_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vacge_d_d_d(dst, src, src2)) }
 inst_vacgt_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VACGT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vacgt_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vacgt_d_d_d(dst, src, src2)) }
+emit_vacgt_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vacgt_d_d_d(dst, src, src2)) }
 inst_vacle_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VACLE, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vacle_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vacle_d_d_d(dst, src, src2)) }
+emit_vacle_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vacle_d_d_d(dst, src, src2)) }
 inst_vaclt_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VACLT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vaclt_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaclt_d_d_d(dst, src, src2)) }
+emit_vaclt_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaclt_d_d_d(dst, src, src2)) }
 inst_vmax_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmax_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmax_d_d_d(dst, src, src2)) }
+emit_vmax_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmax_d_d_d(dst, src, src2)) }
 inst_vmin_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMIN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmin_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmin_d_d_d(dst, src, src2)) }
+emit_vmin_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmin_d_d_d(dst, src, src2)) }
 inst_vpmax_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPMAX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vpmax_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpmax_d_d_d(dst, src, src2)) }
+emit_vpmax_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpmax_d_d_d(dst, src, src2)) }
 inst_vpmin_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPMIN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vpmin_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpmin_d_d_d(dst, src, src2)) }
+emit_vpmin_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpmin_d_d_d(dst, src, src2)) }
 inst_vpadd_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPADD, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vpadd_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpadd_d_d_d(dst, src, src2)) }
+emit_vpadd_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpadd_d_d_d(dst, src, src2)) }
 inst_vpaddl_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPADDL, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vpaddl_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vpaddl_d_d(dst, src)) }
+emit_vpaddl_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vpaddl_d_d(dst, src)) }
 inst_vpadal_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPADAL, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vpadal_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vpadal_d_d(dst, src)) }
+emit_vpadal_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vpadal_d_d(dst, src)) }
 inst_vrecpe_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRECPE, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrecpe_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrecpe_d_d(dst, src)) }
+emit_vrecpe_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrecpe_d_d(dst, src)) }
 inst_vrecps_d_d_d                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRECPS, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vrecps_d_d_d                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrecps_d_d_d(dst, src, src2)) }
+emit_vrecps_d_d_d                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrecps_d_d_d(dst, src, src2)) }
 inst_vrsqrte_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRSQRTE, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrsqrte_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrsqrte_d_d(dst, src)) }
+emit_vrsqrte_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrsqrte_d_d(dst, src)) }
 inst_vrsqrts_d_d_d                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRSQRTS, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vrsqrts_d_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrsqrts_d_d_d(dst, src, src2)) }
+emit_vrsqrts_d_d_d                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrsqrts_d_d_d(dst, src, src2)) }
 inst_vshl_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSHL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vshl_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vshl_d_d_d(dst, src, src2)) }
+emit_vshl_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vshl_d_d_d(dst, src, src2)) }
 inst_vshr_d_d_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSHR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vshr_d_d_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vshr_d_d_imm(dst, src, imm)) }
+emit_vshr_d_d_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vshr_d_d_imm(dst, src, imm)) }
 inst_vsra_d_d_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSRA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vsra_d_d_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vsra_d_d_imm(dst, src, imm)) }
+emit_vsra_d_d_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vsra_d_d_imm(dst, src, imm)) }
 inst_vrshl_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRSHL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vrshl_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrshl_d_d_d(dst, src, src2)) }
+emit_vrshl_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrshl_d_d_d(dst, src, src2)) }
 inst_vrshr_d_d_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VRSHR, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vrshr_d_d_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vrshr_d_d_imm(dst, src, imm)) }
+emit_vrshr_d_d_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vrshr_d_d_imm(dst, src, imm)) }
 inst_vrsra_d_d_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VRSRA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vrsra_d_d_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vrsra_d_d_imm(dst, src, imm)) }
+emit_vrsra_d_d_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vrsra_d_d_imm(dst, src, imm)) }
 inst_vsli_d_d_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSLI, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vsli_d_d_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vsli_d_d_imm(dst, src, imm)) }
+emit_vsli_d_d_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vsli_d_d_imm(dst, src, imm)) }
 inst_vsri_d_d_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSRI, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vsri_d_d_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vsri_d_d_imm(dst, src, imm)) }
+emit_vsri_d_d_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vsri_d_d_imm(dst, src, imm)) }
 inst_vqshl_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQSHL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vqshl_d_d_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQSHL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqshl_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqshl_d_d_d(dst, src, src2)) }
-emit_vqshl_d_d_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqshl_d_d_imm(dst, src, imm)) }
+emit_vqshl_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqshl_d_d_d(dst, src, src2)) }
+emit_vqshl_d_d_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqshl_d_d_imm(dst, src, imm)) }
 inst_vqshrn_d_q_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQSHRN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqshrn_d_q_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqshrn_d_q_imm(dst, src, imm)) }
+emit_vqshrn_d_q_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqshrn_d_q_imm(dst, src, imm)) }
 inst_vqshrun_d_q_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQSHRUN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqshrun_d_q_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqshrun_d_q_imm(dst, src, imm)) }
+emit_vqshrun_d_q_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqshrun_d_q_imm(dst, src, imm)) }
 inst_vqrshl_d_d_d                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQRSHL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqrshl_d_d_d                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqrshl_d_d_d(dst, src, src2)) }
+emit_vqrshl_d_d_d                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqrshl_d_d_d(dst, src, src2)) }
 inst_vqrshrn_d_q_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQRSHRN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqrshrn_d_q_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqrshrn_d_q_imm(dst, src, imm)) }
+emit_vqrshrn_d_q_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqrshrn_d_q_imm(dst, src, imm)) }
 inst_vqrshrun_d_q_imm               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQRSHRUN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqrshrun_d_q_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqrshrun_d_q_imm(dst, src, imm)) }
+emit_vqrshrun_d_q_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqrshrun_d_q_imm(dst, src, imm)) }
 inst_vshrn_d_q_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSHRN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vshrn_d_q_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vshrn_d_q_imm(dst, src, imm)) }
+emit_vshrn_d_q_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vshrn_d_q_imm(dst, src, imm)) }
 inst_vrshrn_d_q_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VRSHRN, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vrshrn_d_q_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vrshrn_d_q_imm(dst, src, imm)) }
+emit_vrshrn_d_q_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vrshrn_d_q_imm(dst, src, imm)) }
 inst_vshll_q_d_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSHLL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vshll_q_d_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vshll_q_d_imm(dst, src, imm)) }
+emit_vshll_q_d_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vshll_q_d_imm(dst, src, imm)) }
 inst_vcls_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCLS, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcls_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcls_d_d(dst, src)) }
+emit_vcls_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcls_d_d(dst, src)) }
 inst_vclz_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCLZ, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vclz_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vclz_d_d(dst, src)) }
+emit_vclz_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vclz_d_d(dst, src)) }
 inst_vcnt_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCNT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vcnt_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcnt_d_d(dst, src)) }
+emit_vcnt_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcnt_d_d(dst, src)) }
 inst_vrev16_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VREV16, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrev16_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrev16_d_d(dst, src)) }
+emit_vrev16_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrev16_d_d(dst, src)) }
 inst_vrev32_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VREV32, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrev32_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrev32_d_d(dst, src)) }
+emit_vrev32_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrev32_d_d(dst, src)) }
 inst_vrev64_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VREV64, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vrev64_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrev64_d_d(dst, src)) }
+emit_vrev64_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrev64_d_d(dst, src)) }
 inst_vext_d_d_d_imm4                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VEXT, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm), {}, {}}} }
-emit_vext_d_d_d_imm4                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vext_d_d_d_imm4(dst, src, src2, imm)) }
+emit_vext_d_d_d_imm4                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vext_d_d_d_imm4(dst, src, src2, imm)) }
 inst_vtbl_d_dlist_d                 :: #force_inline proc "contextless" (dst: Register, regs: u16, src: Register) -> Instruction { return Instruction{mnemonic = .VTBL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), op_reg(src), {}, {}, {}}} }
-emit_vtbl_d_dlist_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16, src: Register) { append(instructions, inst_vtbl_d_dlist_d(dst, regs, src)) }
+emit_vtbl_d_dlist_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16, src: Register) { append_elem(instructions, inst_vtbl_d_dlist_d(dst, regs, src)) }
 inst_vtbx_d_dlist_d                 :: #force_inline proc "contextless" (dst: Register, regs: u16, src: Register) -> Instruction { return Instruction{mnemonic = .VTBX, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg_list(regs), op_reg(src), {}, {}, {}}} }
-emit_vtbx_d_dlist_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16, src: Register) { append(instructions, inst_vtbx_d_dlist_d(dst, regs, src)) }
+emit_vtbx_d_dlist_d                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, regs: u16, src: Register) { append_elem(instructions, inst_vtbx_d_dlist_d(dst, regs, src)) }
 inst_vtrn_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VTRN, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vtrn_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vtrn_d_d(dst, src)) }
+emit_vtrn_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vtrn_d_d(dst, src)) }
 inst_vuzp_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUZP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vuzp_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vuzp_d_d(dst, src)) }
+emit_vuzp_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vuzp_d_d(dst, src)) }
 inst_vzip_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VZIP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vzip_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vzip_d_d(dst, src)) }
+emit_vzip_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vzip_d_d(dst, src)) }
 inst_vdup_d_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VDUP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
 inst_vdup_d_dlane                   :: #force_inline proc "contextless" (dst: Register, src: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VDUP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_dpr_lane(src, lane), {}, {}, {}, {}}} }
-emit_vdup_d_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vdup_d_r(dst, src)) }
-emit_vdup_d_dlane                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, lane: u8) { append(instructions, inst_vdup_d_dlane(dst, src, lane)) }
+emit_vdup_d_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vdup_d_r(dst, src)) }
+emit_vdup_d_dlane                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, lane: u8) { append_elem(instructions, inst_vdup_d_dlane(dst, src, lane)) }
 inst_vswp_d_d                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSWP, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vswp_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vswp_d_d(dst, src)) }
+emit_vswp_d_d                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vswp_d_d(dst, src)) }
 inst_vld1_dlist_mem                 :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD1, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
 inst_vld1_dlane_mem                 :: #force_inline proc "contextless" (dst: Register, lane: u8, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD1, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_dpr_lane(dst, lane), op_mem(src), {}, {}, {}, {}}} }
-emit_vld1_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld1_dlist_mem(regs, src)) }
-emit_vld1_dlane_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, lane: u8, src: Memory) { append(instructions, inst_vld1_dlane_mem(dst, lane, src)) }
+emit_vld1_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld1_dlist_mem(regs, src)) }
+emit_vld1_dlane_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, lane: u8, src: Memory) { append_elem(instructions, inst_vld1_dlane_mem(dst, lane, src)) }
 inst_vld2_dlist_mem                 :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD2, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld2_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld2_dlist_mem(regs, src)) }
+emit_vld2_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld2_dlist_mem(regs, src)) }
 inst_vld3_dlist_mem                 :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD3, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld3_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld3_dlist_mem(regs, src)) }
+emit_vld3_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld3_dlist_mem(regs, src)) }
 inst_vld4_dlist_mem                 :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD4, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld4_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld4_dlist_mem(regs, src)) }
+emit_vld4_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld4_dlist_mem(regs, src)) }
 inst_vst1_dlist_mem                 :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST1, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
 inst_vst1_dlane_mem                 :: #force_inline proc "contextless" (dst: Register, lane: u8, src: Memory) -> Instruction { return Instruction{mnemonic = .VST1, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_dpr_lane(dst, lane), op_mem(src), {}, {}, {}, {}}} }
-emit_vst1_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst1_dlist_mem(regs, src)) }
-emit_vst1_dlane_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, lane: u8, src: Memory) { append(instructions, inst_vst1_dlane_mem(dst, lane, src)) }
+emit_vst1_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst1_dlist_mem(regs, src)) }
+emit_vst1_dlane_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, lane: u8, src: Memory) { append_elem(instructions, inst_vst1_dlane_mem(dst, lane, src)) }
 inst_vst2_dlist_mem                 :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST2, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst2_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst2_dlist_mem(regs, src)) }
+emit_vst2_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst2_dlist_mem(regs, src)) }
 inst_vst3_dlist_mem                 :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST3, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst3_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst3_dlist_mem(regs, src)) }
+emit_vst3_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst3_dlist_mem(regs, src)) }
 inst_vst4_dlist_mem                 :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST4, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst4_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst4_dlist_mem(regs, src)) }
+emit_vst4_dlist_mem                 :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst4_dlist_mem(regs, src)) }
 inst_aese_q_q                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AESE, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_aese_q_q                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_aese_q_q(dst, src)) }
+emit_aese_q_q                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_aese_q_q(dst, src)) }
 inst_aesd_q_q                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AESD, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_aesd_q_q                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_aesd_q_q(dst, src)) }
+emit_aesd_q_q                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_aesd_q_q(dst, src)) }
 inst_aesmc_q_q                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AESMC, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_aesmc_q_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_aesmc_q_q(dst, src)) }
+emit_aesmc_q_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_aesmc_q_q(dst, src)) }
 inst_aesimc_q_q                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AESIMC, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_aesimc_q_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_aesimc_q_q(dst, src)) }
+emit_aesimc_q_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_aesimc_q_q(dst, src)) }
 inst_sha1h_q_q                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SHA1H, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_sha1h_q_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sha1h_q_q(dst, src)) }
+emit_sha1h_q_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sha1h_q_q(dst, src)) }
 inst_sha1su0_q_q_q                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA1SU0, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sha1su0_q_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha1su0_q_q_q(dst, src, src2)) }
+emit_sha1su0_q_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha1su0_q_q_q(dst, src, src2)) }
 inst_sha1su1_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SHA1SU1, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_sha1su1_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sha1su1_q_q(dst, src)) }
+emit_sha1su1_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sha1su1_q_q(dst, src)) }
 inst_sha1c_q_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA1C, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sha1c_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha1c_q_q_q(dst, src, src2)) }
+emit_sha1c_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha1c_q_q_q(dst, src, src2)) }
 inst_sha1m_q_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA1M, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sha1m_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha1m_q_q_q(dst, src, src2)) }
+emit_sha1m_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha1m_q_q_q(dst, src, src2)) }
 inst_sha1p_q_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA1P, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sha1p_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha1p_q_q_q(dst, src, src2)) }
+emit_sha1p_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha1p_q_q_q(dst, src, src2)) }
 inst_sha256h_q_q_q                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA256H, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sha256h_q_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha256h_q_q_q(dst, src, src2)) }
+emit_sha256h_q_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha256h_q_q_q(dst, src, src2)) }
 inst_sha256h2_q_q_q                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA256H2, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sha256h2_q_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha256h2_q_q_q(dst, src, src2)) }
+emit_sha256h2_q_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha256h2_q_q_q(dst, src, src2)) }
 inst_sha256su0_q_q                  :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SHA256SU0, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_sha256su0_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sha256su0_q_q(dst, src)) }
+emit_sha256su0_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sha256su0_q_q(dst, src)) }
 inst_sha256su1_q_q_q                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA256SU1, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_sha256su1_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha256su1_q_q_q(dst, src, src2)) }
+emit_sha256su1_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha256su1_q_q_q(dst, src, src2)) }
 inst_vjcvt_s_d                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VJCVT, operand_count = 2, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vjcvt_s_d                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vjcvt_s_d(dst, src)) }
+emit_vjcvt_s_d                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vjcvt_s_d(dst, src)) }
 inst_vsdot_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSDOT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vsdot_d_d_dlane                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VSDOT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vsdot_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsdot_d_d_d(dst, src, src2)) }
-emit_vsdot_d_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vsdot_d_d_dlane(dst, src, src2, lane)) }
+emit_vsdot_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsdot_d_d_d(dst, src, src2)) }
+emit_vsdot_d_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vsdot_d_d_dlane(dst, src, src2, lane)) }
 inst_vudot_d_d_d                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VUDOT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vudot_d_d_dlane                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VUDOT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vudot_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vudot_d_d_d(dst, src, src2)) }
-emit_vudot_d_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vudot_d_d_dlane(dst, src, src2, lane)) }
+emit_vudot_d_d_d                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vudot_d_d_d(dst, src, src2)) }
+emit_vudot_d_d_dlane                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vudot_d_d_dlane(dst, src, src2, lane)) }
 inst_vdot_d_d_d                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDOT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vdot_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdot_d_d_d(dst, src, src2)) }
+emit_vdot_d_d_d                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdot_d_d_d(dst, src, src2)) }
 inst_vmmla_q_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMMLA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmmla_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmmla_q_q_q(dst, src, src2)) }
+emit_vmmla_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmmla_q_q_q(dst, src, src2)) }
 inst_vfmal_d_s_s                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VFMAL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vfmal_d_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vfmal_d_s_s(dst, src, src2)) }
+emit_vfmal_d_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vfmal_d_s_s(dst, src, src2)) }
 inst_vfmsl_d_s_s                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VFMSL, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vfmsl_d_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vfmsl_d_s_s(dst, src, src2)) }
+emit_vfmsl_d_s_s                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vfmsl_d_s_s(dst, src, src2)) }
 inst_vcmla_d_d_d_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCMLA, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm), {}, {}}} }
 inst_vcmla_d_d_dlane_imm            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .VCMLA, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), op_imm(imm), {}, {}}} }
-emit_vcmla_d_d_d_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vcmla_d_d_d_imm(dst, src, src2, imm)) }
-emit_vcmla_d_d_dlane_imm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8, imm: i64) { append(instructions, inst_vcmla_d_d_dlane_imm(dst, src, src2, lane, imm)) }
+emit_vcmla_d_d_d_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vcmla_d_d_d_imm(dst, src, src2, imm)) }
+emit_vcmla_d_d_dlane_imm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8, imm: i64) { append_elem(instructions, inst_vcmla_d_d_dlane_imm(dst, src, src2, lane, imm)) }
 inst_vcadd_d_d_d_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCADD, operand_count = 4, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm), {}, {}}} }
-emit_vcadd_d_d_d_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vcadd_d_d_d_imm(dst, src, src2, imm)) }
+emit_vcadd_d_d_d_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vcadd_d_d_d_imm(dst, src, src2, imm)) }
 inst_vsmmla_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSMMLA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vsmmla_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsmmla_q_q_q(dst, src, src2)) }
+emit_vsmmla_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsmmla_q_q_q(dst, src, src2)) }
 inst_vummla_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VUMMLA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vummla_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vummla_q_q_q(dst, src, src2)) }
+emit_vummla_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vummla_q_q_q(dst, src, src2)) }
 inst_vusmmla_q_q_q                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VUSMMLA, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vusmmla_q_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vusmmla_q_q_q(dst, src, src2)) }
+emit_vusmmla_q_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vusmmla_q_q_q(dst, src, src2)) }
 inst_vsudot_q_q_dlane               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VSUDOT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vsudot_q_q_dlane               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vsudot_q_q_dlane(dst, src, src2, lane)) }
+emit_vsudot_q_q_dlane               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vsudot_q_q_dlane(dst, src, src2, lane)) }
 inst_vusdot_d_d_d                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VUSDOT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vusdot_d_d_dlane               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, lane: u8) -> Instruction { return Instruction{mnemonic = .VUSDOT, operand_count = 3, mode = .A32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_dpr_lane(src2, lane), {}, {}, {}}} }
-emit_vusdot_d_d_d                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vusdot_d_d_d(dst, src, src2)) }
-emit_vusdot_d_d_dlane               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append(instructions, inst_vusdot_d_d_dlane(dst, src, src2, lane)) }
+emit_vusdot_d_d_d                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vusdot_d_d_d(dst, src, src2)) }
+emit_vusdot_d_d_dlane               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, lane: u8) { append_elem(instructions, inst_vusdot_d_d_dlane(dst, src, src2, lane)) }
 inst_vqabs_q_q                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VQABS, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vqabs_q_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vqabs_q_q(dst, src)) }
+emit_vqabs_q_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vqabs_q_q(dst, src)) }
 inst_vqneg_q_q                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VQNEG, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vqneg_q_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vqneg_q_q(dst, src)) }
+emit_vqneg_q_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vqneg_q_q(dst, src)) }
 inst_vmovx_s_s                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOVX, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmovx_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmovx_s_s(dst, src)) }
+emit_vmovx_s_s                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmovx_s_s(dst, src)) }
 inst_vins_s_s                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VINS, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vins_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vins_s_s(dst, src)) }
+emit_vins_s_s                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vins_s_s(dst, src)) }
 inst_it_cond_imm4                   :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .IT, operand_count = 2, mode = .T32, cond = 14, length = 2, ops = {op_imm(imm), op_imm(imm2), {}, {}, {}, {}}} }
-emit_it_cond_imm4                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_it_cond_imm4(imm, imm2)) }
+emit_it_cond_imm4                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_it_cond_imm4(imm, imm2)) }
 inst_tt_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TT, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_tt_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tt_r_r(dst, src)) }
+emit_tt_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tt_r_r(dst, src)) }
 inst_ttt_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TTT, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_ttt_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ttt_r_r(dst, src)) }
+emit_ttt_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ttt_r_r(dst, src)) }
 inst_tta_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TTA, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_tta_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tta_r_r(dst, src)) }
+emit_tta_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tta_r_r(dst, src)) }
 inst_ttat_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TTAT, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_ttat_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ttat_r_r(dst, src)) }
+emit_ttat_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ttat_r_r(dst, src)) }
 inst_sg_none                        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SG, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_sg_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sg_none()) }
+emit_sg_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sg_none()) }
 inst_bxns_r                         :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BXNS, operand_count = 1, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_bxns_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bxns_r(dst)) }
+emit_bxns_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bxns_r(dst)) }
 inst_blxns_r                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BLXNS, operand_count = 1, mode = .T32, cond = 14, length = 2, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_blxns_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_blxns_r(dst)) }
+emit_blxns_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_blxns_r(dst)) }
 inst_pac_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .PAC, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_pac_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pac_none()) }
+emit_pac_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pac_none()) }
 inst_pacbti_none                    :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .PACBTI, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_pacbti_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pacbti_none()) }
+emit_pacbti_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pacbti_none()) }
 inst_aut_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .AUT, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_aut_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_aut_none()) }
+emit_aut_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_aut_none()) }
 inst_autg_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AUTG, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_autg_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_autg_r_r_r(dst, src, src2)) }
+emit_autg_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_autg_r_r_r(dst, src, src2)) }
 inst_bti_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BTI, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_bti_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bti_none()) }
+emit_bti_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bti_none()) }
 inst_wls_r_rel                      :: #force_inline proc "contextless" (dst: Register, offset: i64) -> Instruction { return Instruction{mnemonic = .WLS, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_rel_offset(offset), {}, {}, {}, {}}} }
-emit_wls_r_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append(instructions, inst_wls_r_rel(dst, offset)) }
+emit_wls_r_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append_elem(instructions, inst_wls_r_rel(dst, offset)) }
 inst_wlstp_r_rel                    :: #force_inline proc "contextless" (dst: Register, offset: i64) -> Instruction { return Instruction{mnemonic = .WLSTP, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_rel_offset(offset), {}, {}, {}, {}}} }
-emit_wlstp_r_rel                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append(instructions, inst_wlstp_r_rel(dst, offset)) }
+emit_wlstp_r_rel                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, offset: i64) { append_elem(instructions, inst_wlstp_r_rel(dst, offset)) }
 inst_dls_r                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .DLS, operand_count = 1, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_dls_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dls_r(dst)) }
+emit_dls_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dls_r(dst)) }
 inst_dlstp_r                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .DLSTP, operand_count = 1, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_dlstp_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dlstp_r(dst)) }
+emit_dlstp_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dlstp_r(dst)) }
 inst_le_rel                         :: #force_inline proc "contextless" (offset: i64) -> Instruction { return Instruction{mnemonic = .LE, operand_count = 1, mode = .T32, cond = 14, length = 4, ops = {op_rel_offset(offset), {}, {}, {}, {}, {}}} }
-emit_le_rel                         :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append(instructions, inst_le_rel(offset)) }
+emit_le_rel                         :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append_elem(instructions, inst_le_rel(offset)) }
 inst_letp_rel                       :: #force_inline proc "contextless" (offset: i64) -> Instruction { return Instruction{mnemonic = .LETP, operand_count = 1, mode = .T32, cond = 14, length = 4, ops = {op_rel_offset(offset), {}, {}, {}, {}, {}}} }
-emit_letp_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append(instructions, inst_letp_rel(offset)) }
+emit_letp_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64) { append_elem(instructions, inst_letp_rel(offset)) }
 inst_lctp_none                      :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .LCTP, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_lctp_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lctp_none()) }
+emit_lctp_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lctp_none()) }
 inst_bf_rel_rel                     :: #force_inline proc "contextless" (offset: i64, offset2: i64) -> Instruction { return Instruction{mnemonic = .BF, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_rel_offset(offset), op_rel_offset(offset2), {}, {}, {}, {}}} }
-emit_bf_rel_rel                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, offset2: i64) { append(instructions, inst_bf_rel_rel(offset, offset2)) }
+emit_bf_rel_rel                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, offset2: i64) { append_elem(instructions, inst_bf_rel_rel(offset, offset2)) }
 inst_bfx_rel_r                      :: #force_inline proc "contextless" (offset: i64, src: Register) -> Instruction { return Instruction{mnemonic = .BFX, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_rel_offset(offset), op_reg(src), {}, {}, {}, {}}} }
-emit_bfx_rel_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, src: Register) { append(instructions, inst_bfx_rel_r(offset, src)) }
+emit_bfx_rel_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, src: Register) { append_elem(instructions, inst_bfx_rel_r(offset, src)) }
 inst_bfl_rel_rel                    :: #force_inline proc "contextless" (offset: i64, offset2: i64) -> Instruction { return Instruction{mnemonic = .BFL, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_rel_offset(offset), op_rel_offset(offset2), {}, {}, {}, {}}} }
-emit_bfl_rel_rel                    :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, offset2: i64) { append(instructions, inst_bfl_rel_rel(offset, offset2)) }
+emit_bfl_rel_rel                    :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, offset2: i64) { append_elem(instructions, inst_bfl_rel_rel(offset, offset2)) }
 inst_bflx_rel_r                     :: #force_inline proc "contextless" (offset: i64, src: Register) -> Instruction { return Instruction{mnemonic = .BFLX, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_rel_offset(offset), op_reg(src), {}, {}, {}, {}}} }
-emit_bflx_rel_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, src: Register) { append(instructions, inst_bflx_rel_r(offset, src)) }
+emit_bflx_rel_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, src: Register) { append_elem(instructions, inst_bflx_rel_r(offset, src)) }
 inst_bfcsel_rel_rel_imm4            :: #force_inline proc "contextless" (offset: i64, offset2: i64, imm: i64) -> Instruction { return Instruction{mnemonic = .BFCSEL, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_rel_offset(offset), op_rel_offset(offset2), op_imm(imm), {}, {}, {}}} }
-emit_bfcsel_rel_rel_imm4            :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, offset2: i64, imm: i64) { append(instructions, inst_bfcsel_rel_rel_imm4(offset, offset2, imm)) }
+emit_bfcsel_rel_rel_imm4            :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i64, offset2: i64, imm: i64) { append_elem(instructions, inst_bfcsel_rel_rel_imm4(offset, offset2, imm)) }
 inst_cx1_cp_r_imm                   :: #force_inline proc "contextless" (imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CX1, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_imm(imm2), {}, {}, {}}} }
-emit_cx1_cp_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append(instructions, inst_cx1_cp_r_imm(imm, src, imm2)) }
+emit_cx1_cp_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_cx1_cp_r_imm(imm, src, imm2)) }
 inst_cx1a_cp_r_imm                  :: #force_inline proc "contextless" (imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CX1A, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_imm(imm2), {}, {}, {}}} }
-emit_cx1a_cp_r_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append(instructions, inst_cx1a_cp_r_imm(imm, src, imm2)) }
+emit_cx1a_cp_r_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_cx1a_cp_r_imm(imm, src, imm2)) }
 inst_cx1d_cp_r_imm                  :: #force_inline proc "contextless" (imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CX1D, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_imm(imm2), {}, {}, {}}} }
-emit_cx1d_cp_r_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append(instructions, inst_cx1d_cp_r_imm(imm, src, imm2)) }
+emit_cx1d_cp_r_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_cx1d_cp_r_imm(imm, src, imm2)) }
 inst_cx1da_cp_r_imm                 :: #force_inline proc "contextless" (imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CX1DA, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_imm(imm2), {}, {}, {}}} }
-emit_cx1da_cp_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append(instructions, inst_cx1da_cp_r_imm(imm, src, imm2)) }
+emit_cx1da_cp_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_cx1da_cp_r_imm(imm, src, imm2)) }
 inst_cx2_cp_r_r_imm                 :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CX2, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_imm(imm2), {}, {}}} }
-emit_cx2_cp_r_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append(instructions, inst_cx2_cp_r_r_imm(imm, src, src2, imm2)) }
+emit_cx2_cp_r_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append_elem(instructions, inst_cx2_cp_r_r_imm(imm, src, src2, imm2)) }
 inst_cx2a_cp_r_r_imm                :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CX2A, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_imm(imm2), {}, {}}} }
-emit_cx2a_cp_r_r_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append(instructions, inst_cx2a_cp_r_r_imm(imm, src, src2, imm2)) }
+emit_cx2a_cp_r_r_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append_elem(instructions, inst_cx2a_cp_r_r_imm(imm, src, src2, imm2)) }
 inst_cx2d_cp_r_r_imm                :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CX2D, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_imm(imm2), {}, {}}} }
-emit_cx2d_cp_r_r_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append(instructions, inst_cx2d_cp_r_r_imm(imm, src, src2, imm2)) }
+emit_cx2d_cp_r_r_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append_elem(instructions, inst_cx2d_cp_r_r_imm(imm, src, src2, imm2)) }
 inst_cx2da_cp_r_r_imm               :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CX2DA, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_imm(imm2), {}, {}}} }
-emit_cx2da_cp_r_r_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append(instructions, inst_cx2da_cp_r_r_imm(imm, src, src2, imm2)) }
+emit_cx2da_cp_r_r_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append_elem(instructions, inst_cx2da_cp_r_r_imm(imm, src, src2, imm2)) }
 inst_cx3_cp_r_r_r                   :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .CX3, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_cx3_cp_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_cx3_cp_r_r_r(imm, src, src2, src3)) }
+emit_cx3_cp_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_cx3_cp_r_r_r(imm, src, src2, src3)) }
 inst_cx3a_cp_r_r_r                  :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .CX3A, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_cx3a_cp_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_cx3a_cp_r_r_r(imm, src, src2, src3)) }
+emit_cx3a_cp_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_cx3a_cp_r_r_r(imm, src, src2, src3)) }
 inst_cx3d_cp_r_r_r                  :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .CX3D, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_cx3d_cp_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_cx3d_cp_r_r_r(imm, src, src2, src3)) }
+emit_cx3d_cp_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_cx3d_cp_r_r_r(imm, src, src2, src3)) }
 inst_cx3da_cp_r_r_r                 :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .CX3DA, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_cx3da_cp_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_cx3da_cp_r_r_r(imm, src, src2, src3)) }
+emit_cx3da_cp_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_cx3da_cp_r_r_r(imm, src, src2, src3)) }
 inst_vcx1_cp_s_imm                  :: #force_inline proc "contextless" (imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .VCX1, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_imm(imm2), {}, {}, {}}} }
-emit_vcx1_cp_s_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append(instructions, inst_vcx1_cp_s_imm(imm, src, imm2)) }
+emit_vcx1_cp_s_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_vcx1_cp_s_imm(imm, src, imm2)) }
 inst_vcx1a_cp_s_imm                 :: #force_inline proc "contextless" (imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .VCX1A, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_imm(imm2), {}, {}, {}}} }
-emit_vcx1a_cp_s_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append(instructions, inst_vcx1a_cp_s_imm(imm, src, imm2)) }
+emit_vcx1a_cp_s_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_vcx1a_cp_s_imm(imm, src, imm2)) }
 inst_vcx2_cp_s_s_imm                :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .VCX2, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_imm(imm2), {}, {}}} }
-emit_vcx2_cp_s_s_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append(instructions, inst_vcx2_cp_s_s_imm(imm, src, src2, imm2)) }
+emit_vcx2_cp_s_s_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append_elem(instructions, inst_vcx2_cp_s_s_imm(imm, src, src2, imm2)) }
 inst_vcx2a_cp_s_s_imm               :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .VCX2A, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_imm(imm2), {}, {}}} }
-emit_vcx2a_cp_s_s_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append(instructions, inst_vcx2a_cp_s_s_imm(imm, src, src2, imm2)) }
+emit_vcx2a_cp_s_s_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, imm2: i64) { append_elem(instructions, inst_vcx2a_cp_s_s_imm(imm, src, src2, imm2)) }
 inst_vcx3_cp_s_s_s                  :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VCX3, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vcx3_cp_s_s_s                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_vcx3_cp_s_s_s(imm, src, src2, src3)) }
+emit_vcx3_cp_s_s_s                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vcx3_cp_s_s_s(imm, src, src2, src3)) }
 inst_vcx3a_cp_s_s_s                 :: #force_inline proc "contextless" (imm: i64, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VCX3A, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vcx3a_cp_s_s_s                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append(instructions, inst_vcx3a_cp_s_s_s(imm, src, src2, src3)) }
+emit_vcx3a_cp_s_s_s                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vcx3a_cp_s_s_s(imm, src, src2, src3)) }
 inst_vpt_vpt_cond_q_q               :: #force_inline proc "contextless" (imm: i64, imm2: i64, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPT, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), op_imm(imm2), op_reg(src), op_reg(src2), {}, {}}} }
-emit_vpt_vpt_cond_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64, src: Register, src2: Register) { append(instructions, inst_vpt_vpt_cond_q_q(imm, imm2, src, src2)) }
+emit_vpt_vpt_cond_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64, src: Register, src2: Register) { append_elem(instructions, inst_vpt_vpt_cond_q_q(imm, imm2, src, src2)) }
 inst_vpst_vpt                       :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .VPST, operand_count = 1, mode = .T32, cond = 14, length = 4, ops = {op_imm(imm), {}, {}, {}, {}, {}}} }
-emit_vpst_vpt                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_vpst_vpt(imm)) }
+emit_vpst_vpt                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_vpst_vpt(imm)) }
 inst_vpsel_q_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPSEL, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vpsel_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpsel_q_q_q(dst, src, src2)) }
+emit_vpsel_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpsel_q_q_q(dst, src, src2)) }
 inst_vpnot_none                     :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .VPNOT, operand_count = 0, mode = .T32, cond = 14, length = 4, ops = {{}, {}, {}, {}, {}, {}}} }
-emit_vpnot_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vpnot_none()) }
+emit_vpnot_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vpnot_none()) }
 inst_vctp_r                         :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VCTP, operand_count = 1, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), {}, {}, {}, {}, {}}} }
-emit_vctp_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vctp_r(dst)) }
+emit_vctp_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vctp_r(dst)) }
 inst_vaddv_r_q                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VADDV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vaddv_r_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vaddv_r_q(dst, src)) }
+emit_vaddv_r_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vaddv_r_q(dst, src)) }
 inst_vaddva_r_q                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VADDVA, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vaddva_r_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vaddva_r_q(dst, src)) }
+emit_vaddva_r_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vaddva_r_q(dst, src)) }
 inst_vaddlv_r_r_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDLV, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vaddlv_r_r_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddlv_r_r_q(dst, src, src2)) }
+emit_vaddlv_r_r_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddlv_r_r_q(dst, src, src2)) }
 inst_vaddlva_r_r_q                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDLVA, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vaddlva_r_r_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddlva_r_r_q(dst, src, src2)) }
+emit_vaddlva_r_r_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddlva_r_r_q(dst, src, src2)) }
 inst_vmaxv_r_q                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMAXV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmaxv_r_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmaxv_r_q(dst, src)) }
+emit_vmaxv_r_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmaxv_r_q(dst, src)) }
 inst_vmaxav_r_q                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMAXAV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmaxav_r_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmaxav_r_q(dst, src)) }
+emit_vmaxav_r_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmaxav_r_q(dst, src)) }
 inst_vminv_r_q                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMINV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vminv_r_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vminv_r_q(dst, src)) }
+emit_vminv_r_q                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vminv_r_q(dst, src)) }
 inst_vminav_r_q                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMINAV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vminav_r_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vminav_r_q(dst, src)) }
+emit_vminav_r_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vminav_r_q(dst, src)) }
 inst_vmaxnmv_r_q                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMAXNMV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmaxnmv_r_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmaxnmv_r_q(dst, src)) }
+emit_vmaxnmv_r_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmaxnmv_r_q(dst, src)) }
 inst_vmaxnmav_r_q                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMAXNMAV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmaxnmav_r_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmaxnmav_r_q(dst, src)) }
+emit_vmaxnmav_r_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmaxnmav_r_q(dst, src)) }
 inst_vminnmv_r_q                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMINNMV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vminnmv_r_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vminnmv_r_q(dst, src)) }
+emit_vminnmv_r_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vminnmv_r_q(dst, src)) }
 inst_vminnmav_r_q                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMINNMAV, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vminnmav_r_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vminnmav_r_q(dst, src)) }
+emit_vminnmav_r_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vminnmav_r_q(dst, src)) }
 inst_vabav_r_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VABAV, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vabav_r_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vabav_r_q_q(dst, src, src2)) }
+emit_vabav_r_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vabav_r_q_q(dst, src, src2)) }
 inst_vmladav_r_q_q                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLADAV, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmladav_r_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmladav_r_q_q(dst, src, src2)) }
+emit_vmladav_r_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmladav_r_q_q(dst, src, src2)) }
 inst_vmladava_r_q_q                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLADAVA, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmladava_r_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmladava_r_q_q(dst, src, src2)) }
+emit_vmladava_r_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmladava_r_q_q(dst, src, src2)) }
 inst_vmladavx_r_q_q                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLADAVX, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmladavx_r_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmladavx_r_q_q(dst, src, src2)) }
+emit_vmladavx_r_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmladavx_r_q_q(dst, src, src2)) }
 inst_vmladavax_r_q_q                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLADAVAX, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmladavax_r_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmladavax_r_q_q(dst, src, src2)) }
+emit_vmladavax_r_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmladavax_r_q_q(dst, src, src2)) }
 inst_vmlaldav_r_r_q_q               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMLALDAV, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmlaldav_r_r_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmlaldav_r_r_q_q(dst, src, src2, src3)) }
+emit_vmlaldav_r_r_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmlaldav_r_r_q_q(dst, src, src2, src3)) }
 inst_vmlaldava_r_r_q_q              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMLALDAVA, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmlaldava_r_r_q_q              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmlaldava_r_r_q_q(dst, src, src2, src3)) }
+emit_vmlaldava_r_r_q_q              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmlaldava_r_r_q_q(dst, src, src2, src3)) }
 inst_vmlaldavx_r_r_q_q              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMLALDAVX, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmlaldavx_r_r_q_q              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmlaldavx_r_r_q_q(dst, src, src2, src3)) }
+emit_vmlaldavx_r_r_q_q              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmlaldavx_r_r_q_q(dst, src, src2, src3)) }
 inst_vmlaldavax_r_r_q_q             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMLALDAVAX, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmlaldavax_r_r_q_q             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmlaldavax_r_r_q_q(dst, src, src2, src3)) }
+emit_vmlaldavax_r_r_q_q             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmlaldavax_r_r_q_q(dst, src, src2, src3)) }
 inst_vmlsdav_r_q_q                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSDAV, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlsdav_r_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlsdav_r_q_q(dst, src, src2)) }
+emit_vmlsdav_r_q_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlsdav_r_q_q(dst, src, src2)) }
 inst_vmlsdava_r_q_q                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSDAVA, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlsdava_r_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlsdava_r_q_q(dst, src, src2)) }
+emit_vmlsdava_r_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlsdava_r_q_q(dst, src, src2)) }
 inst_vmlsdavx_r_q_q                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSDAVX, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlsdavx_r_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlsdavx_r_q_q(dst, src, src2)) }
+emit_vmlsdavx_r_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlsdavx_r_q_q(dst, src, src2)) }
 inst_vmlsdavax_r_q_q                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSDAVAX, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlsdavax_r_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlsdavax_r_q_q(dst, src, src2)) }
+emit_vmlsdavax_r_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlsdavax_r_q_q(dst, src, src2)) }
 inst_vmlsldav_r_r_q_q               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMLSLDAV, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmlsldav_r_r_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmlsldav_r_r_q_q(dst, src, src2, src3)) }
+emit_vmlsldav_r_r_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmlsldav_r_r_q_q(dst, src, src2, src3)) }
 inst_vmlsldava_r_r_q_q              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMLSLDAVA, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmlsldava_r_r_q_q              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmlsldava_r_r_q_q(dst, src, src2, src3)) }
+emit_vmlsldava_r_r_q_q              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmlsldava_r_r_q_q(dst, src, src2, src3)) }
 inst_vmlsldavx_r_r_q_q              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMLSLDAVX, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmlsldavx_r_r_q_q              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmlsldavx_r_r_q_q(dst, src, src2, src3)) }
+emit_vmlsldavx_r_r_q_q              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmlsldavx_r_r_q_q(dst, src, src2, src3)) }
 inst_vmlsldavax_r_r_q_q             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMLSLDAVAX, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vmlsldavax_r_r_q_q             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmlsldavax_r_r_q_q(dst, src, src2, src3)) }
+emit_vmlsldavax_r_r_q_q             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmlsldavax_r_r_q_q(dst, src, src2, src3)) }
 inst_vrmlaldavh_r_r_q_q             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VRMLALDAVH, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vrmlaldavh_r_r_q_q             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vrmlaldavh_r_r_q_q(dst, src, src2, src3)) }
+emit_vrmlaldavh_r_r_q_q             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vrmlaldavh_r_r_q_q(dst, src, src2, src3)) }
 inst_vrmlaldavha_r_r_q_q            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VRMLALDAVHA, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vrmlaldavha_r_r_q_q            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vrmlaldavha_r_r_q_q(dst, src, src2, src3)) }
+emit_vrmlaldavha_r_r_q_q            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vrmlaldavha_r_r_q_q(dst, src, src2, src3)) }
 inst_vrmlaldavhx_r_r_q_q            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VRMLALDAVHX, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vrmlaldavhx_r_r_q_q            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vrmlaldavhx_r_r_q_q(dst, src, src2, src3)) }
+emit_vrmlaldavhx_r_r_q_q            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vrmlaldavhx_r_r_q_q(dst, src, src2, src3)) }
 inst_vrmlaldavhax_r_r_q_q           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VRMLALDAVHAX, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vrmlaldavhax_r_r_q_q           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vrmlaldavhax_r_r_q_q(dst, src, src2, src3)) }
+emit_vrmlaldavhax_r_r_q_q           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vrmlaldavhax_r_r_q_q(dst, src, src2, src3)) }
 inst_vrmlsldavh_r_r_q_q             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VRMLSLDAVH, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vrmlsldavh_r_r_q_q             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vrmlsldavh_r_r_q_q(dst, src, src2, src3)) }
+emit_vrmlsldavh_r_r_q_q             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vrmlsldavh_r_r_q_q(dst, src, src2, src3)) }
 inst_vrmlsldavha_r_r_q_q            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VRMLSLDAVHA, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vrmlsldavha_r_r_q_q            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vrmlsldavha_r_r_q_q(dst, src, src2, src3)) }
+emit_vrmlsldavha_r_r_q_q            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vrmlsldavha_r_r_q_q(dst, src, src2, src3)) }
 inst_vrmlsldavhx_r_r_q_q            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VRMLSLDAVHX, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vrmlsldavhx_r_r_q_q            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vrmlsldavhx_r_r_q_q(dst, src, src2, src3)) }
+emit_vrmlsldavhx_r_r_q_q            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vrmlsldavhx_r_r_q_q(dst, src, src2, src3)) }
 inst_vrmlsldavhax_r_r_q_q           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VRMLSLDAVHAX, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3), {}, {}}} }
-emit_vrmlsldavhax_r_r_q_q           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vrmlsldavhax_r_r_q_q(dst, src, src2, src3)) }
+emit_vrmlsldavhax_r_r_q_q           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vrmlsldavhax_r_r_q_q(dst, src, src2, src3)) }
 inst_vmlav_r_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLAV, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlav_r_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlav_r_q_q(dst, src, src2)) }
+emit_vmlav_r_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlav_r_q_q(dst, src, src2)) }
 inst_vmlava_r_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLAVA, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlava_r_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlava_r_q_q(dst, src, src2)) }
+emit_vmlava_r_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlava_r_q_q(dst, src, src2)) }
 inst_vmlsv_r_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSV, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlsv_r_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlsv_r_q_q(dst, src, src2)) }
+emit_vmlsv_r_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlsv_r_q_q(dst, src, src2)) }
 inst_vmlsva_r_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSVA, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlsva_r_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlsva_r_q_q(dst, src, src2)) }
+emit_vmlsva_r_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlsva_r_q_q(dst, src, src2)) }
 inst_vcmul_q_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMUL, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vcmul_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmul_q_q_q(dst, src, src2)) }
+emit_vcmul_q_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmul_q_q_q(dst, src, src2)) }
 inst_vhcadd_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHCADD, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
 inst_vhcadd_q_q_q_imm               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VHCADD, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm), {}, {}}} }
-emit_vhcadd_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhcadd_q_q_q(dst, src, src2)) }
-emit_vhcadd_q_q_q_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vhcadd_q_q_q_imm(dst, src, src2, imm)) }
+emit_vhcadd_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhcadd_q_q_q(dst, src, src2)) }
+emit_vhcadd_q_q_q_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vhcadd_q_q_q_imm(dst, src, src2, imm)) }
 inst_vbrsr_q_q_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VBRSR, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vbrsr_q_q_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vbrsr_q_q_r(dst, src, src2)) }
+emit_vbrsr_q_q_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vbrsr_q_q_r(dst, src, src2)) }
 inst_vshlc_q_r_imm5                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSHLC, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vshlc_q_r_imm5                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vshlc_q_r_imm5(dst, src, imm)) }
+emit_vshlc_q_r_imm5                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vshlc_q_r_imm5(dst, src, imm)) }
 inst_vddup_q_r_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VDDUP, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vddup_q_r_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vddup_q_r_imm(dst, src, imm)) }
+emit_vddup_q_r_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vddup_q_r_imm(dst, src, imm)) }
 inst_vidup_q_r_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VIDUP, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vidup_q_r_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vidup_q_r_imm(dst, src, imm)) }
+emit_vidup_q_r_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vidup_q_r_imm(dst, src, imm)) }
 inst_vdwdup_q_r_r_imm               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VDWDUP, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm), {}, {}}} }
-emit_vdwdup_q_r_r_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vdwdup_q_r_r_imm(dst, src, src2, imm)) }
+emit_vdwdup_q_r_r_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vdwdup_q_r_r_imm(dst, src, src2, imm)) }
 inst_viwdup_q_r_r_imm               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VIWDUP, operand_count = 4, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm), {}, {}}} }
-emit_viwdup_q_r_r_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_viwdup_q_r_r_imm(dst, src, src2, imm)) }
+emit_viwdup_q_r_r_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_viwdup_q_r_r_imm(dst, src, src2, imm)) }
 inst_vmovnb_q_q                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOVNB, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmovnb_q_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmovnb_q_q(dst, src)) }
+emit_vmovnb_q_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmovnb_q_q(dst, src)) }
 inst_vmovnt_q_q                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOVNT, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vmovnt_q_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmovnt_q_q(dst, src)) }
+emit_vmovnt_q_q                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmovnt_q_q(dst, src)) }
 inst_vqmovnb_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VQMOVNB, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vqmovnb_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vqmovnb_q_q(dst, src)) }
+emit_vqmovnb_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vqmovnb_q_q(dst, src)) }
 inst_vqmovnt_q_q                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VQMOVNT, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vqmovnt_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vqmovnt_q_q(dst, src)) }
+emit_vqmovnt_q_q                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vqmovnt_q_q(dst, src)) }
 inst_vqmovunb_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VQMOVUNB, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vqmovunb_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vqmovunb_q_q(dst, src)) }
+emit_vqmovunb_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vqmovunb_q_q(dst, src)) }
 inst_vqmovunt_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VQMOVUNT, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}, {}, {}}} }
-emit_vqmovunt_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vqmovunt_q_q(dst, src)) }
+emit_vqmovunt_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vqmovunt_q_q(dst, src)) }
 inst_vshllb_q_q_imm5                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSHLLB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vshllb_q_q_imm5                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vshllb_q_q_imm5(dst, src, imm)) }
+emit_vshllb_q_q_imm5                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vshllb_q_q_imm5(dst, src, imm)) }
 inst_vshllt_q_q_imm5                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSHLLT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vshllt_q_q_imm5                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vshllt_q_q_imm5(dst, src, imm)) }
+emit_vshllt_q_q_imm5                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vshllt_q_q_imm5(dst, src, imm)) }
 inst_vmullb_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULLB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmullb_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmullb_q_q_q(dst, src, src2)) }
+emit_vmullb_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmullb_q_q_q(dst, src, src2)) }
 inst_vmullt_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULLT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmullt_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmullt_q_q_q(dst, src, src2)) }
+emit_vmullt_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmullt_q_q_q(dst, src, src2)) }
 inst_vmlalb_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLALB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlalb_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlalb_q_q_q(dst, src, src2)) }
+emit_vmlalb_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlalb_q_q_q(dst, src, src2)) }
 inst_vmlalt_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLALT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlalt_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlalt_q_q_q(dst, src, src2)) }
+emit_vmlalt_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlalt_q_q_q(dst, src, src2)) }
 inst_vmlslb_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSLB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlslb_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlslb_q_q_q(dst, src, src2)) }
+emit_vmlslb_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlslb_q_q_q(dst, src, src2)) }
 inst_vmlslt_q_q_q                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMLSLT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vmlslt_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmlslt_q_q_q(dst, src, src2)) }
+emit_vmlslt_q_q_q                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmlslt_q_q_q(dst, src, src2)) }
 inst_vshrnb_q_q_imm5                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSHRNB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vshrnb_q_q_imm5                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vshrnb_q_q_imm5(dst, src, imm)) }
+emit_vshrnb_q_q_imm5                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vshrnb_q_q_imm5(dst, src, imm)) }
 inst_vshrnt_q_q_imm5                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSHRNT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vshrnt_q_q_imm5                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vshrnt_q_q_imm5(dst, src, imm)) }
+emit_vshrnt_q_q_imm5                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vshrnt_q_q_imm5(dst, src, imm)) }
 inst_vrshrnb_q_q_imm5               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VRSHRNB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vrshrnb_q_q_imm5               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vrshrnb_q_q_imm5(dst, src, imm)) }
+emit_vrshrnb_q_q_imm5               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vrshrnb_q_q_imm5(dst, src, imm)) }
 inst_vrshrnt_q_q_imm5               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VRSHRNT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vrshrnt_q_q_imm5               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vrshrnt_q_q_imm5(dst, src, imm)) }
+emit_vrshrnt_q_q_imm5               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vrshrnt_q_q_imm5(dst, src, imm)) }
 inst_vqshrnb_q_q_imm5               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQSHRNB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqshrnb_q_q_imm5               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqshrnb_q_q_imm5(dst, src, imm)) }
+emit_vqshrnb_q_q_imm5               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqshrnb_q_q_imm5(dst, src, imm)) }
 inst_vqshrnt_q_q_imm5               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQSHRNT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqshrnt_q_q_imm5               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqshrnt_q_q_imm5(dst, src, imm)) }
+emit_vqshrnt_q_q_imm5               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqshrnt_q_q_imm5(dst, src, imm)) }
 inst_vqrshrnb_q_q_imm5              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQRSHRNB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqrshrnb_q_q_imm5              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqrshrnb_q_q_imm5(dst, src, imm)) }
+emit_vqrshrnb_q_q_imm5              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqrshrnb_q_q_imm5(dst, src, imm)) }
 inst_vqrshrnt_q_q_imm5              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQRSHRNT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqrshrnt_q_q_imm5              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqrshrnt_q_q_imm5(dst, src, imm)) }
+emit_vqrshrnt_q_q_imm5              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqrshrnt_q_q_imm5(dst, src, imm)) }
 inst_vqshrunb_q_q_imm5              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQSHRUNB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqshrunb_q_q_imm5              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqshrunb_q_q_imm5(dst, src, imm)) }
+emit_vqshrunb_q_q_imm5              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqshrunb_q_q_imm5(dst, src, imm)) }
 inst_vqshrunt_q_q_imm5              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQSHRUNT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqshrunt_q_q_imm5              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqshrunt_q_q_imm5(dst, src, imm)) }
+emit_vqshrunt_q_q_imm5              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqshrunt_q_q_imm5(dst, src, imm)) }
 inst_vqrshrunb_q_q_imm5             :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQRSHRUNB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqrshrunb_q_q_imm5             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqrshrunb_q_q_imm5(dst, src, imm)) }
+emit_vqrshrunb_q_q_imm5             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqrshrunb_q_q_imm5(dst, src, imm)) }
 inst_vqrshrunt_q_q_imm5             :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VQRSHRUNT, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}, {}, {}}} }
-emit_vqrshrunt_q_q_imm5             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vqrshrunt_q_q_imm5(dst, src, imm)) }
+emit_vqrshrunt_q_q_imm5             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vqrshrunt_q_q_imm5(dst, src, imm)) }
 inst_vqdmladh_q_q_q                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQDMLADH, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqdmladh_q_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqdmladh_q_q_q(dst, src, src2)) }
+emit_vqdmladh_q_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqdmladh_q_q_q(dst, src, src2)) }
 inst_vqdmladhx_q_q_q                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQDMLADHX, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqdmladhx_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqdmladhx_q_q_q(dst, src, src2)) }
+emit_vqdmladhx_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqdmladhx_q_q_q(dst, src, src2)) }
 inst_vqdmlsdh_q_q_q                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQDMLSDH, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqdmlsdh_q_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqdmlsdh_q_q_q(dst, src, src2)) }
+emit_vqdmlsdh_q_q_q                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqdmlsdh_q_q_q(dst, src, src2)) }
 inst_vqdmlsdhx_q_q_q                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQDMLSDHX, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqdmlsdhx_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqdmlsdhx_q_q_q(dst, src, src2)) }
+emit_vqdmlsdhx_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqdmlsdhx_q_q_q(dst, src, src2)) }
 inst_vqrdmladh_q_q_q                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQRDMLADH, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqrdmladh_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqrdmladh_q_q_q(dst, src, src2)) }
+emit_vqrdmladh_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqrdmladh_q_q_q(dst, src, src2)) }
 inst_vqrdmladhx_q_q_q               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQRDMLADHX, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqrdmladhx_q_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqrdmladhx_q_q_q(dst, src, src2)) }
+emit_vqrdmladhx_q_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqrdmladhx_q_q_q(dst, src, src2)) }
 inst_vqrdmlsdh_q_q_q                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQRDMLSDH, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqrdmlsdh_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqrdmlsdh_q_q_q(dst, src, src2)) }
+emit_vqrdmlsdh_q_q_q                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqrdmlsdh_q_q_q(dst, src, src2)) }
 inst_vqrdmlsdhx_q_q_q               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQRDMLSDHX, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}, {}, {}}} }
-emit_vqrdmlsdhx_q_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqrdmlsdhx_q_q_q(dst, src, src2)) }
+emit_vqrdmlsdhx_q_q_q               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqrdmlsdhx_q_q_q(dst, src, src2)) }
 inst_vldrb_q_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VLDRB, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_vldrb_q_mem_q                  :: #force_inline proc "contextless" (dst: Register, src: Memory, src2: Register) -> Instruction { return Instruction{mnemonic = .VLDRB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), op_reg(src2), {}, {}, {}}} }
-emit_vldrb_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vldrb_q_mem(dst, src)) }
-emit_vldrb_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append(instructions, inst_vldrb_q_mem_q(dst, src, src2)) }
+emit_vldrb_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vldrb_q_mem(dst, src)) }
+emit_vldrb_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append_elem(instructions, inst_vldrb_q_mem_q(dst, src, src2)) }
 inst_vldrh_q_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VLDRH, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_vldrh_q_mem_q                  :: #force_inline proc "contextless" (dst: Register, src: Memory, src2: Register) -> Instruction { return Instruction{mnemonic = .VLDRH, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), op_reg(src2), {}, {}, {}}} }
-emit_vldrh_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vldrh_q_mem(dst, src)) }
-emit_vldrh_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append(instructions, inst_vldrh_q_mem_q(dst, src, src2)) }
+emit_vldrh_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vldrh_q_mem(dst, src)) }
+emit_vldrh_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append_elem(instructions, inst_vldrh_q_mem_q(dst, src, src2)) }
 inst_vldrw_q_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VLDRW, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_vldrw_q_mem_q                  :: #force_inline proc "contextless" (dst: Register, src: Memory, src2: Register) -> Instruction { return Instruction{mnemonic = .VLDRW, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), op_reg(src2), {}, {}, {}}} }
-emit_vldrw_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vldrw_q_mem(dst, src)) }
-emit_vldrw_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append(instructions, inst_vldrw_q_mem_q(dst, src, src2)) }
+emit_vldrw_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vldrw_q_mem(dst, src)) }
+emit_vldrw_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append_elem(instructions, inst_vldrw_q_mem_q(dst, src, src2)) }
 inst_vldrd_q_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VLDRD, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_vldrd_q_mem_q                  :: #force_inline proc "contextless" (dst: Register, src: Memory, src2: Register) -> Instruction { return Instruction{mnemonic = .VLDRD, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), op_reg(src2), {}, {}, {}}} }
-emit_vldrd_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vldrd_q_mem(dst, src)) }
-emit_vldrd_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append(instructions, inst_vldrd_q_mem_q(dst, src, src2)) }
+emit_vldrd_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vldrd_q_mem(dst, src)) }
+emit_vldrd_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append_elem(instructions, inst_vldrd_q_mem_q(dst, src, src2)) }
 inst_vstrb_q_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VSTRB, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_vstrb_q_mem_q                  :: #force_inline proc "contextless" (dst: Register, src: Memory, src2: Register) -> Instruction { return Instruction{mnemonic = .VSTRB, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), op_reg(src2), {}, {}, {}}} }
-emit_vstrb_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vstrb_q_mem(dst, src)) }
-emit_vstrb_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append(instructions, inst_vstrb_q_mem_q(dst, src, src2)) }
+emit_vstrb_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vstrb_q_mem(dst, src)) }
+emit_vstrb_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append_elem(instructions, inst_vstrb_q_mem_q(dst, src, src2)) }
 inst_vstrh_q_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VSTRH, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_vstrh_q_mem_q                  :: #force_inline proc "contextless" (dst: Register, src: Memory, src2: Register) -> Instruction { return Instruction{mnemonic = .VSTRH, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), op_reg(src2), {}, {}, {}}} }
-emit_vstrh_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vstrh_q_mem(dst, src)) }
-emit_vstrh_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append(instructions, inst_vstrh_q_mem_q(dst, src, src2)) }
+emit_vstrh_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vstrh_q_mem(dst, src)) }
+emit_vstrh_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append_elem(instructions, inst_vstrh_q_mem_q(dst, src, src2)) }
 inst_vstrw_q_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VSTRW, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_vstrw_q_mem_q                  :: #force_inline proc "contextless" (dst: Register, src: Memory, src2: Register) -> Instruction { return Instruction{mnemonic = .VSTRW, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), op_reg(src2), {}, {}, {}}} }
-emit_vstrw_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vstrw_q_mem(dst, src)) }
-emit_vstrw_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append(instructions, inst_vstrw_q_mem_q(dst, src, src2)) }
+emit_vstrw_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vstrw_q_mem(dst, src)) }
+emit_vstrw_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append_elem(instructions, inst_vstrw_q_mem_q(dst, src, src2)) }
 inst_vstrd_q_mem                    :: #force_inline proc "contextless" (dst: Register, src: Memory) -> Instruction { return Instruction{mnemonic = .VSTRD, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), {}, {}, {}, {}}} }
 inst_vstrd_q_mem_q                  :: #force_inline proc "contextless" (dst: Register, src: Memory, src2: Register) -> Instruction { return Instruction{mnemonic = .VSTRD, operand_count = 3, mode = .T32, cond = 14, length = 4, ops = {op_reg(dst), op_mem(src), op_reg(src2), {}, {}, {}}} }
-emit_vstrd_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append(instructions, inst_vstrd_q_mem(dst, src)) }
-emit_vstrd_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append(instructions, inst_vstrd_q_mem_q(dst, src, src2)) }
+emit_vstrd_q_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory) { append_elem(instructions, inst_vstrd_q_mem(dst, src)) }
+emit_vstrd_q_mem_q                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Memory, src2: Register) { append_elem(instructions, inst_vstrd_q_mem_q(dst, src, src2)) }
 inst_vld20_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD20, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld20_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld20_qlist_mem(regs, src)) }
+emit_vld20_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld20_qlist_mem(regs, src)) }
 inst_vld21_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD21, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld21_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld21_qlist_mem(regs, src)) }
+emit_vld21_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld21_qlist_mem(regs, src)) }
 inst_vld40_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD40, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld40_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld40_qlist_mem(regs, src)) }
+emit_vld40_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld40_qlist_mem(regs, src)) }
 inst_vld41_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD41, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld41_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld41_qlist_mem(regs, src)) }
+emit_vld41_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld41_qlist_mem(regs, src)) }
 inst_vld42_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD42, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld42_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld42_qlist_mem(regs, src)) }
+emit_vld42_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld42_qlist_mem(regs, src)) }
 inst_vld43_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VLD43, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vld43_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vld43_qlist_mem(regs, src)) }
+emit_vld43_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vld43_qlist_mem(regs, src)) }
 inst_vst20_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST20, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst20_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst20_qlist_mem(regs, src)) }
+emit_vst20_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst20_qlist_mem(regs, src)) }
 inst_vst21_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST21, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst21_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst21_qlist_mem(regs, src)) }
+emit_vst21_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst21_qlist_mem(regs, src)) }
 inst_vst40_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST40, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst40_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst40_qlist_mem(regs, src)) }
+emit_vst40_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst40_qlist_mem(regs, src)) }
 inst_vst41_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST41, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst41_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst41_qlist_mem(regs, src)) }
+emit_vst41_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst41_qlist_mem(regs, src)) }
 inst_vst42_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST42, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst42_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst42_qlist_mem(regs, src)) }
+emit_vst42_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst42_qlist_mem(regs, src)) }
 inst_vst43_qlist_mem                :: #force_inline proc "contextless" (regs: u16, src: Memory) -> Instruction { return Instruction{mnemonic = .VST43, operand_count = 2, mode = .T32, cond = 14, length = 4, ops = {op_reg_list(regs), op_mem(src), {}, {}, {}, {}}} }
-emit_vst43_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append(instructions, inst_vst43_qlist_mem(regs, src)) }
+emit_vst43_qlist_mem                :: #force_inline proc(instructions: ^[dynamic]Instruction, regs: u16, src: Memory) { append_elem(instructions, inst_vst43_qlist_mem(regs, src)) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/arm32/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/arm32/tools/gen_mnemonic_builders.odin
index 33b6ed903..beba78b07 100644
--- a/core/rexcode/isa/arm32/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/arm32/tools/gen_mnemonic_builders.odin
@@ -451,7 +451,7 @@ write_inst_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
 	strings.write_string(sb, " }\n")
 }
 
-// emit_ procedure: append(instructions, inst_<...>(args)). Not contextless —
+// emit_ procedure: append_elem(instructions, inst_<...>(args)). Not contextless —
 // append needs context. arm32 has no encoder-level emit_* helpers, so these
 // simply wrap the inst_ builder.
 write_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
@@ -467,7 +467,7 @@ write_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
 	for p in ps {
 		fmt.sbprintf(sb, ", %s: %s", p.name, p.type)
 	}
-	strings.write_string(sb, ") { append(instructions, ")
+	strings.write_string(sb, ") { append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_byte(sb, '(')
 	for p, i in ps {
diff --git a/core/rexcode/isa/arm64/mnemonic_builders.odin b/core/rexcode/isa/arm64/mnemonic_builders.odin
index fda64b34f..35c34fde4 100644
--- a/core/rexcode/isa/arm64/mnemonic_builders.odin
+++ b/core/rexcode/isa/arm64/mnemonic_builders.odin
@@ -39,30 +39,30 @@ inst_add_zb_p_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_add_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_add_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_add_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_add_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_add_r_r_i(dst, src, imm)) }
-emit_add_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_add_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_add_r_r_ex               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) { append(instructions, inst_add_r_r_ex(dst, src, src2, src2_ext, src2_amount)) }
-emit_add_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_v16b_v16b_v16b(dst, src, src2)) }
-emit_add_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_v8h_v8h_v8h(dst, src, src2)) }
-emit_add_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_v4s_v4s_v4s(dst, src, src2)) }
-emit_add_v2d_v2d_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_v2d_v2d_v2d(dst, src, src2)) }
-emit_add_v8b_v8b_v8b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_v8b_v8b_v8b(dst, src, src2)) }
-emit_add_v4h_v4h_v4h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_v4h_v4h_v4h(dst, src, src2)) }
-emit_add_v2s_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_v2s_v2s_v2s(dst, src, src2)) }
-emit_add_zb_zb_zb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_add_zb_zb_zb(rz, rz2, rz3)) }
-emit_add_zh_zh_zh             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_add_zh_zh_zh(rz, rz2, rz3)) }
-emit_add_zs_zs_zs             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_add_zs_zs_zs(rz, rz2, rz3)) }
-emit_add_zd_zd_zd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_add_zd_zd_zd(rz, rz2, rz3)) }
-emit_add_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_add_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_add_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_add_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_add_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_add_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_add_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_add_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_add_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_add_r_r_i(dst, src, imm)) }
+emit_add_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_add_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_add_r_r_ex               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) { append_elem(instructions, inst_add_r_r_ex(dst, src, src2, src2_ext, src2_amount)) }
+emit_add_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_v16b_v16b_v16b(dst, src, src2)) }
+emit_add_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_v8h_v8h_v8h(dst, src, src2)) }
+emit_add_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_v4s_v4s_v4s(dst, src, src2)) }
+emit_add_v2d_v2d_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_v2d_v2d_v2d(dst, src, src2)) }
+emit_add_v8b_v8b_v8b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_v8b_v8b_v8b(dst, src, src2)) }
+emit_add_v4h_v4h_v4h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_v4h_v4h_v4h(dst, src, src2)) }
+emit_add_v2s_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_v2s_v2s_v2s(dst, src, src2)) }
+emit_add_zb_zb_zb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_add_zb_zb_zb(rz, rz2, rz3)) }
+emit_add_zh_zh_zh             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_add_zh_zh_zh(rz, rz2, rz3)) }
+emit_add_zs_zs_zs             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_add_zs_zs_zs(rz, rz2, rz3)) }
+emit_add_zd_zd_zd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_add_zd_zd_zd(rz, rz2, rz3)) }
+emit_add_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_add_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_add_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_add_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_add_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_add_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_add_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_add_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_adds_r_r_i               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.ADDS, dst, src, imm) }
 inst_adds_r_r_sh              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .ADDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_adds_r_r_ex              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .ADDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_extended(src2, src2_ext, src2_amount), {}, {}}} }
-emit_adds_r_r_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_adds_r_r_i(dst, src, imm)) }
-emit_adds_r_r_sh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_adds_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_adds_r_r_ex              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) { append(instructions, inst_adds_r_r_ex(dst, src, src2, src2_ext, src2_amount)) }
+emit_adds_r_r_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_adds_r_r_i(dst, src, imm)) }
+emit_adds_r_r_sh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_adds_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_adds_r_r_ex              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) { append_elem(instructions, inst_adds_r_r_ex(dst, src, src2, src2_ext, src2_amount)) }
 inst_sub_r_r_i                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.SUB, dst, src, imm) }
 inst_sub_r_r_sh               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_sub_r_r_ex               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_extended(src2, src2_ext, src2_amount), {}, {}}} }
@@ -78,37 +78,37 @@ inst_sub_zb_p_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_sub_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_sub_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_sub_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_sub_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sub_r_r_i(dst, src, imm)) }
-emit_sub_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_sub_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_sub_r_r_ex               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) { append(instructions, inst_sub_r_r_ex(dst, src, src2, src2_ext, src2_amount)) }
-emit_sub_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_v16b_v16b_v16b(dst, src, src2)) }
-emit_sub_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_v8h_v8h_v8h(dst, src, src2)) }
-emit_sub_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_v4s_v4s_v4s(dst, src, src2)) }
-emit_sub_v2d_v2d_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_v2d_v2d_v2d(dst, src, src2)) }
-emit_sub_zb_zb_zb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sub_zb_zb_zb(rz, rz2, rz3)) }
-emit_sub_zh_zh_zh             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sub_zh_zh_zh(rz, rz2, rz3)) }
-emit_sub_zs_zs_zs             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sub_zs_zs_zs(rz, rz2, rz3)) }
-emit_sub_zd_zd_zd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sub_zd_zd_zd(rz, rz2, rz3)) }
-emit_sub_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sub_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_sub_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sub_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_sub_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sub_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_sub_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sub_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_sub_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sub_r_r_i(dst, src, imm)) }
+emit_sub_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_sub_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_sub_r_r_ex               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) { append_elem(instructions, inst_sub_r_r_ex(dst, src, src2, src2_ext, src2_amount)) }
+emit_sub_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_v16b_v16b_v16b(dst, src, src2)) }
+emit_sub_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_v8h_v8h_v8h(dst, src, src2)) }
+emit_sub_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_v4s_v4s_v4s(dst, src, src2)) }
+emit_sub_v2d_v2d_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_v2d_v2d_v2d(dst, src, src2)) }
+emit_sub_zb_zb_zb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sub_zb_zb_zb(rz, rz2, rz3)) }
+emit_sub_zh_zh_zh             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sub_zh_zh_zh(rz, rz2, rz3)) }
+emit_sub_zs_zs_zs             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sub_zs_zs_zs(rz, rz2, rz3)) }
+emit_sub_zd_zd_zd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sub_zd_zd_zd(rz, rz2, rz3)) }
+emit_sub_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sub_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_sub_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sub_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_sub_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sub_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_sub_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sub_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_subs_r_r_i               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.SUBS, dst, src, imm) }
 inst_subs_r_r_sh              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .SUBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_subs_r_r_ex              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .SUBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_extended(src2, src2_ext, src2_amount), {}, {}}} }
-emit_subs_r_r_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_subs_r_r_i(dst, src, imm)) }
-emit_subs_r_r_sh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_subs_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_subs_r_r_ex              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) { append(instructions, inst_subs_r_r_ex(dst, src, src2, src2_ext, src2_amount)) }
+emit_subs_r_r_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_subs_r_r_i(dst, src, imm)) }
+emit_subs_r_r_sh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_subs_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_subs_r_r_ex              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) { append_elem(instructions, inst_subs_r_r_ex(dst, src, src2, src2_ext, src2_amount)) }
 inst_movz_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .MOVZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 2), op_imm(imm2, 1), {}, {}}} }
-emit_movz_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_movz_r_i_i(dst, imm, imm2)) }
+emit_movz_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_movz_r_i_i(dst, imm, imm2)) }
 inst_movn_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .MOVN, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 2), op_imm(imm2, 1), {}, {}}} }
-emit_movn_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_movn_r_i_i(dst, imm, imm2)) }
+emit_movn_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_movn_r_i_i(dst, imm, imm2)) }
 inst_movk_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .MOVK, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 2), op_imm(imm2, 1), {}, {}}} }
-emit_movk_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_movk_r_i_i(dst, imm, imm2)) }
+emit_movk_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_movk_r_i_i(dst, imm, imm2)) }
 inst_adr_r_l                  :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .ADR, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label, 4), {}, {}, {}}} }
-emit_adr_r_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_adr_r_l(dst, label)) }
+emit_adr_r_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_adr_r_l(dst, label)) }
 inst_adrp_r_l                 :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .ADRP, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label, 4), {}, {}, {}}} }
-emit_adrp_r_l                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_adrp_r_l(dst, label)) }
+emit_adrp_r_l                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_adrp_r_l(dst, label)) }
 inst_and_r_r_sh               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_and_r_r_i                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.AND, dst, src, imm) }
 inst_and_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
@@ -117,20 +117,20 @@ inst_and_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_and_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_and_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
 inst_and_pb_p_pb_pb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_and_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_and_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_and_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_and_r_r_i(dst, src, imm)) }
-emit_and_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_and_v16b_v16b_v16b(dst, src, src2)) }
-emit_and_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_and_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_and_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_and_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_and_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_and_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_and_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_and_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_and_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_and_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_and_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_and_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_and_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_and_r_r_i(dst, src, imm)) }
+emit_and_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_and_v16b_v16b_v16b(dst, src, src2)) }
+emit_and_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_and_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_and_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_and_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_and_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_and_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_and_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_and_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_and_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_and_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_ands_r_r_sh              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .ANDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_ands_r_r_i               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.ANDS, dst, src, imm) }
 inst_ands_pb_p_pb_pb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ANDS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_ands_r_r_sh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_ands_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_ands_r_r_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ands_r_r_i(dst, src, imm)) }
-emit_ands_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_ands_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_ands_r_r_sh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_ands_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_ands_r_r_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ands_r_r_i(dst, src, imm)) }
+emit_ands_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_ands_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_orr_r_r_sh               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_orr_r_r_i                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.ORR, dst, src, imm) }
 inst_orr_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
@@ -139,14 +139,14 @@ inst_orr_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_orr_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_orr_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
 inst_orr_pb_p_pb_pb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ORR, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_orr_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_orr_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_orr_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_orr_r_r_i(dst, src, imm)) }
-emit_orr_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_orr_v16b_v16b_v16b(dst, src, src2)) }
-emit_orr_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_orr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_orr_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_orr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_orr_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_orr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_orr_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_orr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_orr_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_orr_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_orr_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_orr_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_orr_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_orr_r_r_i(dst, src, imm)) }
+emit_orr_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_orr_v16b_v16b_v16b(dst, src, src2)) }
+emit_orr_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_orr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_orr_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_orr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_orr_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_orr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_orr_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_orr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_orr_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_orr_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_eor_r_r_sh               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_eor_r_r_i                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.EOR, dst, src, imm) }
 inst_eor_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
@@ -155,14 +155,14 @@ inst_eor_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_eor_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_eor_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
 inst_eor_pb_p_pb_pb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .EOR, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_eor_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_eor_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_eor_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_eor_r_r_i(dst, src, imm)) }
-emit_eor_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eor_v16b_v16b_v16b(dst, src, src2)) }
-emit_eor_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_eor_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_eor_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_eor_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_eor_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_eor_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_eor_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_eor_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_eor_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_eor_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_eor_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_eor_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_eor_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_eor_r_r_i(dst, src, imm)) }
+emit_eor_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eor_v16b_v16b_v16b(dst, src, src2)) }
+emit_eor_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_eor_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_eor_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_eor_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_eor_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_eor_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_eor_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_eor_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_eor_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_eor_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_bic_r_r_sh               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_bic_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_bic_zb_p_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
@@ -170,109 +170,109 @@ inst_bic_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_bic_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_bic_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
 inst_bic_pb_p_pb_pb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BIC, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_bic_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_bic_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_bic_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bic_v16b_v16b_v16b(dst, src, src2)) }
-emit_bic_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bic_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_bic_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bic_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_bic_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bic_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_bic_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bic_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_bic_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bic_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_bic_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_bic_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_bic_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bic_v16b_v16b_v16b(dst, src, src2)) }
+emit_bic_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bic_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_bic_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bic_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_bic_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bic_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_bic_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bic_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_bic_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bic_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_bics_r_r_sh              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .BICS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_bics_pb_p_pb_pb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BICS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_bics_r_r_sh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_bics_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_bics_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bics_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_bics_r_r_sh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_bics_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_bics_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bics_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_orn_r_r_sh               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .ORN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
 inst_orn_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ORN, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_orn_pb_p_pb_pb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ORN, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_orn_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_orn_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
-emit_orn_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_orn_v16b_v16b_v16b(dst, src, src2)) }
-emit_orn_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_orn_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_orn_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_orn_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_orn_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_orn_v16b_v16b_v16b(dst, src, src2)) }
+emit_orn_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_orn_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_eon_r_r_sh               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction { return Instruction{mnemonic = .EON, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_shifted(src2, src2_shift, src2_amount), {}, {}}} }
-emit_eon_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append(instructions, inst_eon_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
+emit_eon_r_r_sh               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) { append_elem(instructions, inst_eon_r_r_sh(dst, src, src2, src2_shift, src2_amount)) }
 inst_lsl_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.LSL, dst, src, src2) }
 inst_lsl_zb_p_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSL, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_lsl_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSL, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_lsl_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSL, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_lsl_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSL, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
 inst_lsl_r_r_i                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.LSL, dst, src, imm) }
-emit_lsl_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lsl_r_r_r(dst, src, src2)) }
-emit_lsl_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsl_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_lsl_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsl_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_lsl_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsl_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_lsl_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsl_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_lsl_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_lsl_r_r_i(dst, src, imm)) }
+emit_lsl_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lsl_r_r_r(dst, src, src2)) }
+emit_lsl_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsl_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_lsl_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsl_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_lsl_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsl_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_lsl_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsl_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_lsl_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_lsl_r_r_i(dst, src, imm)) }
 inst_lsr_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.LSR, dst, src, src2) }
 inst_lsr_zb_p_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSR, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_lsr_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_lsr_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_lsr_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
 inst_lsr_r_r_i                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.LSR, dst, src, imm) }
-emit_lsr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lsr_r_r_r(dst, src, src2)) }
-emit_lsr_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_lsr_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_lsr_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_lsr_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_lsr_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_lsr_r_r_i(dst, src, imm)) }
+emit_lsr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lsr_r_r_r(dst, src, src2)) }
+emit_lsr_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_lsr_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_lsr_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_lsr_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_lsr_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_lsr_r_r_i(dst, src, imm)) }
 inst_asr_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.ASR, dst, src, src2) }
 inst_asr_zb_p_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ASR, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_asr_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ASR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_asr_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ASR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_asr_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ASR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
 inst_asr_r_r_i                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.ASR, dst, src, imm) }
-emit_asr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_asr_r_r_r(dst, src, src2)) }
-emit_asr_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_asr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_asr_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_asr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_asr_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_asr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_asr_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_asr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_asr_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_asr_r_r_i(dst, src, imm)) }
+emit_asr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_asr_r_r_r(dst, src, src2)) }
+emit_asr_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_asr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_asr_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_asr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_asr_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_asr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_asr_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_asr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_asr_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_asr_r_r_i(dst, src, imm)) }
 inst_ror_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.ROR, dst, src, src2) }
 inst_ror_r_r_i                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return inst_r_r_i(.ROR, dst, src, imm) }
-emit_ror_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ror_r_r_r(dst, src, src2)) }
-emit_ror_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ror_r_r_i(dst, src, imm)) }
+emit_ror_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ror_r_r_r(dst, src, src2)) }
+emit_ror_r_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ror_r_r_i(dst, src, imm)) }
 inst_udiv_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.UDIV, dst, src, src2) }
 inst_udiv_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UDIV, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_udiv_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UDIV, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_udiv_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_udiv_r_r_r(dst, src, src2)) }
-emit_udiv_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_udiv_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_udiv_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_udiv_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_udiv_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_udiv_r_r_r(dst, src, src2)) }
+emit_udiv_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_udiv_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_udiv_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_udiv_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_sdiv_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SDIV, dst, src, src2) }
 inst_sdiv_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SDIV, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_sdiv_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SDIV, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_sdiv_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sdiv_r_r_r(dst, src, src2)) }
-emit_sdiv_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sdiv_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_sdiv_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sdiv_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_sdiv_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sdiv_r_r_r(dst, src, src2)) }
+emit_sdiv_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sdiv_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_sdiv_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sdiv_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_madd_r_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.MADD, dst, src, src2, src3) }
-emit_madd_r_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_madd_r_r_r_r(dst, src, src2, src3)) }
+emit_madd_r_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_madd_r_r_r_r(dst, src, src2, src3)) }
 inst_msub_r_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.MSUB, dst, src, src2, src3) }
-emit_msub_r_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_msub_r_r_r_r(dst, src, src2, src3)) }
+emit_msub_r_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_msub_r_r_r_r(dst, src, src2, src3)) }
 inst_smaddl_r_r_r_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.SMADDL, dst, src, src2, src3) }
-emit_smaddl_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smaddl_r_r_r_r(dst, src, src2, src3)) }
+emit_smaddl_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smaddl_r_r_r_r(dst, src, src2, src3)) }
 inst_smsubl_r_r_r_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.SMSUBL, dst, src, src2, src3) }
-emit_smsubl_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_smsubl_r_r_r_r(dst, src, src2, src3)) }
+emit_smsubl_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_smsubl_r_r_r_r(dst, src, src2, src3)) }
 inst_umaddl_r_r_r_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.UMADDL, dst, src, src2, src3) }
-emit_umaddl_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_umaddl_r_r_r_r(dst, src, src2, src3)) }
+emit_umaddl_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_umaddl_r_r_r_r(dst, src, src2, src3)) }
 inst_umsubl_r_r_r_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.UMSUBL, dst, src, src2, src3) }
-emit_umsubl_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_umsubl_r_r_r_r(dst, src, src2, src3)) }
+emit_umsubl_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_umsubl_r_r_r_r(dst, src, src2, src3)) }
 inst_smulh_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SMULH, dst, src, src2) }
 inst_smulh_zb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMULH, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_smulh_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMULH, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_smulh_zs_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMULH, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_smulh_zd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMULH, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_smulh_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smulh_r_r_r(dst, src, src2)) }
-emit_smulh_zb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smulh_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_smulh_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smulh_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_smulh_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smulh_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_smulh_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smulh_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_smulh_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smulh_r_r_r(dst, src, src2)) }
+emit_smulh_zb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smulh_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_smulh_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smulh_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_smulh_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smulh_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_smulh_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smulh_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_umulh_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.UMULH, dst, src, src2) }
 inst_umulh_zb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMULH, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_umulh_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMULH, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_umulh_zs_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMULH, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_umulh_zd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMULH, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_umulh_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umulh_r_r_r(dst, src, src2)) }
-emit_umulh_zb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umulh_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_umulh_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umulh_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_umulh_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umulh_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_umulh_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umulh_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_umulh_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umulh_r_r_r(dst, src, src2)) }
+emit_umulh_zb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umulh_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_umulh_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umulh_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_umulh_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umulh_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_umulh_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umulh_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_clz_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.CLZ, dst, src) }
 inst_clz_v8b_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CLZ, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_clz_v16b_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CLZ, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
@@ -284,17 +284,17 @@ inst_clz_zb_p_zb              :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_clz_zh_p_zh              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CLZ, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_clz_zs_p_zs              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CLZ, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_clz_zd_p_zd              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CLZ, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_clz_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_clz_r_r(dst, src)) }
-emit_clz_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_clz_v8b_v8b(dst, src)) }
-emit_clz_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_clz_v16b_v16b(dst, src)) }
-emit_clz_v4h_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_clz_v4h_v4h(dst, src)) }
-emit_clz_v8h_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_clz_v8h_v8h(dst, src)) }
-emit_clz_v2s_v2s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_clz_v2s_v2s(dst, src)) }
-emit_clz_v4s_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_clz_v4s_v4s(dst, src)) }
-emit_clz_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_clz_zb_p_zb(rz, rz2, rz3)) }
-emit_clz_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_clz_zh_p_zh(rz, rz2, rz3)) }
-emit_clz_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_clz_zs_p_zs(rz, rz2, rz3)) }
-emit_clz_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_clz_zd_p_zd(rz, rz2, rz3)) }
+emit_clz_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_clz_r_r(dst, src)) }
+emit_clz_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_clz_v8b_v8b(dst, src)) }
+emit_clz_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_clz_v16b_v16b(dst, src)) }
+emit_clz_v4h_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_clz_v4h_v4h(dst, src)) }
+emit_clz_v8h_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_clz_v8h_v8h(dst, src)) }
+emit_clz_v2s_v2s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_clz_v2s_v2s(dst, src)) }
+emit_clz_v4s_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_clz_v4s_v4s(dst, src)) }
+emit_clz_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_clz_zb_p_zb(rz, rz2, rz3)) }
+emit_clz_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_clz_zh_p_zh(rz, rz2, rz3)) }
+emit_clz_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_clz_zs_p_zs(rz, rz2, rz3)) }
+emit_clz_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_clz_zd_p_zd(rz, rz2, rz3)) }
 inst_cls_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.CLS, dst, src) }
 inst_cls_v8b_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CLS, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_cls_v16b_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CLS, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
@@ -306,227 +306,227 @@ inst_cls_zb_p_zb              :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_cls_zh_p_zh              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CLS, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_cls_zs_p_zs              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CLS, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_cls_zd_p_zd              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CLS, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_cls_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cls_r_r(dst, src)) }
-emit_cls_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cls_v8b_v8b(dst, src)) }
-emit_cls_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cls_v16b_v16b(dst, src)) }
-emit_cls_v4h_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cls_v4h_v4h(dst, src)) }
-emit_cls_v8h_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cls_v8h_v8h(dst, src)) }
-emit_cls_v2s_v2s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cls_v2s_v2s(dst, src)) }
-emit_cls_v4s_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cls_v4s_v4s(dst, src)) }
-emit_cls_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_cls_zb_p_zb(rz, rz2, rz3)) }
-emit_cls_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_cls_zh_p_zh(rz, rz2, rz3)) }
-emit_cls_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_cls_zs_p_zs(rz, rz2, rz3)) }
-emit_cls_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_cls_zd_p_zd(rz, rz2, rz3)) }
+emit_cls_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cls_r_r(dst, src)) }
+emit_cls_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cls_v8b_v8b(dst, src)) }
+emit_cls_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cls_v16b_v16b(dst, src)) }
+emit_cls_v4h_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cls_v4h_v4h(dst, src)) }
+emit_cls_v8h_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cls_v8h_v8h(dst, src)) }
+emit_cls_v2s_v2s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cls_v2s_v2s(dst, src)) }
+emit_cls_v4s_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cls_v4s_v4s(dst, src)) }
+emit_cls_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_cls_zb_p_zb(rz, rz2, rz3)) }
+emit_cls_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_cls_zh_p_zh(rz, rz2, rz3)) }
+emit_cls_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_cls_zs_p_zs(rz, rz2, rz3)) }
+emit_cls_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_cls_zd_p_zd(rz, rz2, rz3)) }
 inst_rbit_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.RBIT, dst, src) }
 inst_rbit_v8b_v8b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .RBIT, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_rbit_v16b_v16b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .RBIT, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
-emit_rbit_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rbit_r_r(dst, src)) }
-emit_rbit_v8b_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rbit_v8b_v8b(dst, src)) }
-emit_rbit_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rbit_v16b_v16b(dst, src)) }
+emit_rbit_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rbit_r_r(dst, src)) }
+emit_rbit_v8b_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rbit_v8b_v8b(dst, src)) }
+emit_rbit_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rbit_v16b_v16b(dst, src)) }
 inst_rev_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.REV, dst, src) }
 inst_rev_zb_zb                :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .REV, operand_count = 2, length = 4, ops = {op_z_b(rz), op_z_b(rz2), {}, {}, {}}} }
 inst_rev_zh_zh                :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .REV, operand_count = 2, length = 4, ops = {op_z_h(rz), op_z_h(rz2), {}, {}, {}}} }
 inst_rev_zs_zs                :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .REV, operand_count = 2, length = 4, ops = {op_z_s(rz), op_z_s(rz2), {}, {}, {}}} }
 inst_rev_zd_zd                :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .REV, operand_count = 2, length = 4, ops = {op_z_d(rz), op_z_d(rz2), {}, {}, {}}} }
 inst_rev_pb_pb                :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .REV, operand_count = 2, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
-emit_rev_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev_r_r(dst, src)) }
-emit_rev_zb_zb                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_rev_zb_zb(rz, rz2)) }
-emit_rev_zh_zh                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_rev_zh_zh(rz, rz2)) }
-emit_rev_zs_zs                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_rev_zs_zs(rz, rz2)) }
-emit_rev_zd_zd                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_rev_zd_zd(rz, rz2)) }
-emit_rev_pb_pb                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_rev_pb_pb(rz, rz2)) }
+emit_rev_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev_r_r(dst, src)) }
+emit_rev_zb_zb                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_rev_zb_zb(rz, rz2)) }
+emit_rev_zh_zh                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_rev_zh_zh(rz, rz2)) }
+emit_rev_zs_zs                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_rev_zs_zs(rz, rz2)) }
+emit_rev_zd_zd                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_rev_zd_zd(rz, rz2)) }
+emit_rev_pb_pb                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_rev_pb_pb(rz, rz2)) }
 inst_rev16_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.REV16, dst, src) }
 inst_rev16_v8b_v8b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV16, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_rev16_v16b_v16b          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV16, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
-emit_rev16_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev16_r_r(dst, src)) }
-emit_rev16_v8b_v8b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev16_v8b_v8b(dst, src)) }
-emit_rev16_v16b_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev16_v16b_v16b(dst, src)) }
+emit_rev16_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev16_r_r(dst, src)) }
+emit_rev16_v8b_v8b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev16_v8b_v8b(dst, src)) }
+emit_rev16_v16b_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev16_v16b_v16b(dst, src)) }
 inst_rev32_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.REV32, dst, src) }
 inst_rev32_v8b_v8b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV32, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_rev32_v16b_v16b          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV32, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_rev32_v4h_v4h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV32, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_rev32_v8h_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV32, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_rev32_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev32_r_r(dst, src)) }
-emit_rev32_v8b_v8b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev32_v8b_v8b(dst, src)) }
-emit_rev32_v16b_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev32_v16b_v16b(dst, src)) }
-emit_rev32_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev32_v4h_v4h(dst, src)) }
-emit_rev32_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev32_v8h_v8h(dst, src)) }
+emit_rev32_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev32_r_r(dst, src)) }
+emit_rev32_v8b_v8b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev32_v8b_v8b(dst, src)) }
+emit_rev32_v16b_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev32_v16b_v16b(dst, src)) }
+emit_rev32_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev32_v4h_v4h(dst, src)) }
+emit_rev32_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev32_v8h_v8h(dst, src)) }
 inst_csel_r_r_r_c             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CSEL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_cond(cond), {}}} }
-emit_csel_r_r_r_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append(instructions, inst_csel_r_r_r_c(dst, src, src2, cond)) }
+emit_csel_r_r_r_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append_elem(instructions, inst_csel_r_r_r_c(dst, src, src2, cond)) }
 inst_csinc_r_r_r_c            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CSINC, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_cond(cond), {}}} }
-emit_csinc_r_r_r_c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append(instructions, inst_csinc_r_r_r_c(dst, src, src2, cond)) }
+emit_csinc_r_r_r_c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append_elem(instructions, inst_csinc_r_r_r_c(dst, src, src2, cond)) }
 inst_csinv_r_r_r_c            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CSINV, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_cond(cond), {}}} }
-emit_csinv_r_r_r_c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append(instructions, inst_csinv_r_r_r_c(dst, src, src2, cond)) }
+emit_csinv_r_r_r_c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append_elem(instructions, inst_csinv_r_r_r_c(dst, src, src2, cond)) }
 inst_csneg_r_r_r_c            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CSNEG, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_cond(cond), {}}} }
-emit_csneg_r_r_r_c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append(instructions, inst_csneg_r_r_r_c(dst, src, src2, cond)) }
+emit_csneg_r_r_r_c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append_elem(instructions, inst_csneg_r_r_r_c(dst, src, src2, cond)) }
 inst_ccmp_r_r_i_c             :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, cond: Cond) -> Instruction { return Instruction{mnemonic = .CCMP, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), op_cond(cond), {}}} }
 inst_ccmp_r_i_i_c             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64, cond: Cond) -> Instruction { return Instruction{mnemonic = .CCMP, operand_count = 4, length = 4, ops = {op_reg(dst), op_imm(imm, 1), op_imm(imm2, 1), op_cond(cond), {}}} }
-emit_ccmp_r_r_i_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, cond: Cond) { append(instructions, inst_ccmp_r_r_i_c(dst, src, imm, cond)) }
-emit_ccmp_r_i_i_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64, cond: Cond) { append(instructions, inst_ccmp_r_i_i_c(dst, imm, imm2, cond)) }
+emit_ccmp_r_r_i_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, cond: Cond) { append_elem(instructions, inst_ccmp_r_r_i_c(dst, src, imm, cond)) }
+emit_ccmp_r_i_i_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64, cond: Cond) { append_elem(instructions, inst_ccmp_r_i_i_c(dst, imm, imm2, cond)) }
 inst_ccmn_r_r_i_c             :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, cond: Cond) -> Instruction { return Instruction{mnemonic = .CCMN, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), op_cond(cond), {}}} }
 inst_ccmn_r_i_i_c             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64, cond: Cond) -> Instruction { return Instruction{mnemonic = .CCMN, operand_count = 4, length = 4, ops = {op_reg(dst), op_imm(imm, 1), op_imm(imm2, 1), op_cond(cond), {}}} }
-emit_ccmn_r_r_i_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, cond: Cond) { append(instructions, inst_ccmn_r_r_i_c(dst, src, imm, cond)) }
-emit_ccmn_r_i_i_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64, cond: Cond) { append(instructions, inst_ccmn_r_i_i_c(dst, imm, imm2, cond)) }
+emit_ccmn_r_r_i_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, cond: Cond) { append_elem(instructions, inst_ccmn_r_r_i_c(dst, src, imm, cond)) }
+emit_ccmn_r_i_i_c             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64, cond: Cond) { append_elem(instructions, inst_ccmn_r_i_i_c(dst, imm, imm2, cond)) }
 inst_cset_r_c                 :: #force_inline proc "contextless" (dst: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CSET, operand_count = 2, length = 4, ops = {op_reg(dst), op_cond(cond), {}, {}, {}}} }
-emit_cset_r_c                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, cond: Cond) { append(instructions, inst_cset_r_c(dst, cond)) }
+emit_cset_r_c                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, cond: Cond) { append_elem(instructions, inst_cset_r_c(dst, cond)) }
 inst_csetm_r_c                :: #force_inline proc "contextless" (dst: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CSETM, operand_count = 2, length = 4, ops = {op_reg(dst), op_cond(cond), {}, {}, {}}} }
-emit_csetm_r_c                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, cond: Cond) { append(instructions, inst_csetm_r_c(dst, cond)) }
+emit_csetm_r_c                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, cond: Cond) { append_elem(instructions, inst_csetm_r_c(dst, cond)) }
 inst_cinc_r_r_c               :: #force_inline proc "contextless" (dst: Register, src: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CINC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_cond(cond), {}, {}}} }
-emit_cinc_r_r_c               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) { append(instructions, inst_cinc_r_r_c(dst, src, cond)) }
+emit_cinc_r_r_c               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) { append_elem(instructions, inst_cinc_r_r_c(dst, src, cond)) }
 inst_cinv_r_r_c               :: #force_inline proc "contextless" (dst: Register, src: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CINV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_cond(cond), {}, {}}} }
-emit_cinv_r_r_c               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) { append(instructions, inst_cinv_r_r_c(dst, src, cond)) }
+emit_cinv_r_r_c               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) { append_elem(instructions, inst_cinv_r_r_c(dst, src, cond)) }
 inst_cneg_r_r_c               :: #force_inline proc "contextless" (dst: Register, src: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CNEG, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_cond(cond), {}, {}}} }
-emit_cneg_r_r_c               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) { append(instructions, inst_cneg_r_r_c(dst, src, cond)) }
+emit_cneg_r_r_c               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) { append_elem(instructions, inst_cneg_r_r_c(dst, src, cond)) }
 inst_extr_r_r_r_i             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EXTR, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm, 1), {}}} }
-emit_extr_r_r_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_extr_r_r_r_i(dst, src, src2, imm)) }
+emit_extr_r_r_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_extr_r_r_r_i(dst, src, src2, imm)) }
 inst_b_l                      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B, label) }
-emit_b_l                      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_l(label)) }
+emit_b_l                      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_l(label)) }
 inst_bl_l                     :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BL, label) }
-emit_bl_l                     :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bl_l(label)) }
+emit_bl_l                     :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bl_l(label)) }
 inst_br_r                     :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.BR, dst) }
-emit_br_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_br_r(dst)) }
+emit_br_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_br_r(dst)) }
 inst_blr_r                    :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.BLR, dst) }
-emit_blr_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_blr_r(dst)) }
+emit_blr_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_blr_r(dst)) }
 inst_ret_r                    :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.RET, dst) }
 inst_ret_none                 :: #force_inline proc "contextless" () -> Instruction { return inst_none(.RET) }
-emit_ret_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_ret_r(dst)) }
-emit_ret_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ret_none()) }
+emit_ret_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_ret_r(dst)) }
+emit_ret_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ret_none()) }
 inst_b_eq_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_EQ, label) }
-emit_b_eq_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_eq_l(label)) }
+emit_b_eq_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_eq_l(label)) }
 inst_b_ne_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_NE, label) }
-emit_b_ne_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_ne_l(label)) }
+emit_b_ne_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_ne_l(label)) }
 inst_b_cs_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_CS, label) }
-emit_b_cs_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_cs_l(label)) }
+emit_b_cs_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_cs_l(label)) }
 inst_b_cc_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_CC, label) }
-emit_b_cc_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_cc_l(label)) }
+emit_b_cc_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_cc_l(label)) }
 inst_b_mi_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_MI, label) }
-emit_b_mi_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_mi_l(label)) }
+emit_b_mi_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_mi_l(label)) }
 inst_b_pl_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_PL, label) }
-emit_b_pl_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_pl_l(label)) }
+emit_b_pl_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_pl_l(label)) }
 inst_b_vs_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_VS, label) }
-emit_b_vs_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_vs_l(label)) }
+emit_b_vs_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_vs_l(label)) }
 inst_b_vc_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_VC, label) }
-emit_b_vc_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_vc_l(label)) }
+emit_b_vc_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_vc_l(label)) }
 inst_b_hi_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_HI, label) }
-emit_b_hi_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_hi_l(label)) }
+emit_b_hi_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_hi_l(label)) }
 inst_b_ls_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_LS, label) }
-emit_b_ls_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_ls_l(label)) }
+emit_b_ls_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_ls_l(label)) }
 inst_b_ge_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_GE, label) }
-emit_b_ge_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_ge_l(label)) }
+emit_b_ge_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_ge_l(label)) }
 inst_b_lt_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_LT, label) }
-emit_b_lt_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_lt_l(label)) }
+emit_b_lt_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_lt_l(label)) }
 inst_b_gt_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_GT, label) }
-emit_b_gt_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_gt_l(label)) }
+emit_b_gt_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_gt_l(label)) }
 inst_b_le_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_LE, label) }
-emit_b_le_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_le_l(label)) }
+emit_b_le_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_le_l(label)) }
 inst_b_al_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_AL, label) }
-emit_b_al_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_al_l(label)) }
+emit_b_al_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_al_l(label)) }
 inst_b_nv_l                   :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B_NV, label) }
-emit_b_nv_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_nv_l(label)) }
+emit_b_nv_l                   :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_nv_l(label)) }
 inst_cbz_r_l                  :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .CBZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label, 4), {}, {}, {}}} }
-emit_cbz_r_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_cbz_r_l(dst, label)) }
+emit_cbz_r_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_cbz_r_l(dst, label)) }
 inst_cbnz_r_l                 :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .CBNZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label, 4), {}, {}, {}}} }
-emit_cbnz_r_l                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_cbnz_r_l(dst, label)) }
+emit_cbnz_r_l                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_cbnz_r_l(dst, label)) }
 inst_tbz_r_i_l                :: #force_inline proc "contextless" (dst: Register, imm: i64, label: u32) -> Instruction { return Instruction{mnemonic = .TBZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 1), op_label(label, 4), {}, {}}} }
-emit_tbz_r_i_l                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, label: u32) { append(instructions, inst_tbz_r_i_l(dst, imm, label)) }
+emit_tbz_r_i_l                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, label: u32) { append_elem(instructions, inst_tbz_r_i_l(dst, imm, label)) }
 inst_tbnz_r_i_l               :: #force_inline proc "contextless" (dst: Register, imm: i64, label: u32) -> Instruction { return Instruction{mnemonic = .TBNZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 1), op_label(label, 4), {}, {}}} }
-emit_tbnz_r_i_l               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, label: u32) { append(instructions, inst_tbnz_r_i_l(dst, imm, label)) }
+emit_tbnz_r_i_l               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, label: u32) { append_elem(instructions, inst_tbnz_r_i_l(dst, imm, label)) }
 inst_ldr_r_m                  :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDR, dst, mem) }
 inst_ldr_r_l                  :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .LDR, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label, 4), {}, {}, {}}} }
 inst_ldr_z_m                  :: #force_inline proc "contextless" (rz: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDR, operand_count = 2, length = 4, ops = {op_reg(Register(REG_Z | (u16(rz) & 0x1F))), op_mem(mem), {}, {}, {}}} }
 inst_ldr_p_m                  :: #force_inline proc "contextless" (rz: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDR, operand_count = 2, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_mem(mem), {}, {}, {}}} }
 inst_ldr_i_m                  :: #force_inline proc "contextless" (imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDR, operand_count = 2, length = 4, ops = {op_imm(imm, 4), op_mem(mem), {}, {}, {}}} }
-emit_ldr_r_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldr_r_m(dst, mem)) }
-emit_ldr_r_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_ldr_r_l(dst, label)) }
-emit_ldr_z_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) { append(instructions, inst_ldr_z_m(rz, mem)) }
-emit_ldr_p_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) { append(instructions, inst_ldr_p_m(rz, mem)) }
-emit_ldr_i_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append(instructions, inst_ldr_i_m(imm, mem)) }
+emit_ldr_r_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldr_r_m(dst, mem)) }
+emit_ldr_r_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_ldr_r_l(dst, label)) }
+emit_ldr_z_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) { append_elem(instructions, inst_ldr_z_m(rz, mem)) }
+emit_ldr_p_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) { append_elem(instructions, inst_ldr_p_m(rz, mem)) }
+emit_ldr_i_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append_elem(instructions, inst_ldr_i_m(imm, mem)) }
 inst_str_r_m                  :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STR, dst, mem) }
 inst_str_z_m                  :: #force_inline proc "contextless" (rz: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .STR, operand_count = 2, length = 4, ops = {op_reg(Register(REG_Z | (u16(rz) & 0x1F))), op_mem(mem), {}, {}, {}}} }
 inst_str_p_m                  :: #force_inline proc "contextless" (rz: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .STR, operand_count = 2, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_mem(mem), {}, {}, {}}} }
 inst_str_i_m                  :: #force_inline proc "contextless" (imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .STR, operand_count = 2, length = 4, ops = {op_imm(imm, 4), op_mem(mem), {}, {}, {}}} }
-emit_str_r_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_str_r_m(dst, mem)) }
-emit_str_z_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) { append(instructions, inst_str_z_m(rz, mem)) }
-emit_str_p_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) { append(instructions, inst_str_p_m(rz, mem)) }
-emit_str_i_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append(instructions, inst_str_i_m(imm, mem)) }
+emit_str_r_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_str_r_m(dst, mem)) }
+emit_str_z_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) { append_elem(instructions, inst_str_z_m(rz, mem)) }
+emit_str_p_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) { append_elem(instructions, inst_str_p_m(rz, mem)) }
+emit_str_i_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append_elem(instructions, inst_str_i_m(imm, mem)) }
 inst_ldrb_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDRB, dst, mem) }
-emit_ldrb_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldrb_r_m(dst, mem)) }
+emit_ldrb_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldrb_r_m(dst, mem)) }
 inst_strb_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STRB, dst, mem) }
-emit_strb_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_strb_r_m(dst, mem)) }
+emit_strb_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_strb_r_m(dst, mem)) }
 inst_ldrsb_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDRSB, dst, mem) }
-emit_ldrsb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldrsb_r_m(dst, mem)) }
+emit_ldrsb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldrsb_r_m(dst, mem)) }
 inst_ldrh_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDRH, dst, mem) }
-emit_ldrh_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldrh_r_m(dst, mem)) }
+emit_ldrh_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldrh_r_m(dst, mem)) }
 inst_strh_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STRH, dst, mem) }
-emit_strh_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_strh_r_m(dst, mem)) }
+emit_strh_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_strh_r_m(dst, mem)) }
 inst_ldrsh_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDRSH, dst, mem) }
-emit_ldrsh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldrsh_r_m(dst, mem)) }
+emit_ldrsh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldrsh_r_m(dst, mem)) }
 inst_ldrsw_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDRSW, dst, mem) }
-emit_ldrsw_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldrsw_r_m(dst, mem)) }
+emit_ldrsw_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldrsw_r_m(dst, mem)) }
 inst_ldp_r_r_m                :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDP, dst, src, mem) }
-emit_ldp_r_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldp_r_r_m(dst, src, mem)) }
+emit_ldp_r_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldp_r_r_m(dst, src, mem)) }
 inst_stp_r_r_m                :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STP, dst, src, mem) }
-emit_stp_r_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stp_r_r_m(dst, src, mem)) }
+emit_stp_r_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stp_r_r_m(dst, src, mem)) }
 inst_ldpsw_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDPSW, dst, src, mem) }
-emit_ldpsw_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldpsw_r_r_m(dst, src, mem)) }
+emit_ldpsw_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldpsw_r_r_m(dst, src, mem)) }
 inst_ldar_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAR, dst, mem) }
-emit_ldar_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldar_r_m(dst, mem)) }
+emit_ldar_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldar_r_m(dst, mem)) }
 inst_stlr_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STLR, dst, mem) }
-emit_stlr_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stlr_r_m(dst, mem)) }
+emit_stlr_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stlr_r_m(dst, mem)) }
 inst_ldarb_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDARB, dst, mem) }
-emit_ldarb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldarb_r_m(dst, mem)) }
+emit_ldarb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldarb_r_m(dst, mem)) }
 inst_stlrb_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STLRB, dst, mem) }
-emit_stlrb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stlrb_r_m(dst, mem)) }
+emit_stlrb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stlrb_r_m(dst, mem)) }
 inst_ldarh_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDARH, dst, mem) }
-emit_ldarh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldarh_r_m(dst, mem)) }
+emit_ldarh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldarh_r_m(dst, mem)) }
 inst_stlrh_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STLRH, dst, mem) }
-emit_stlrh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stlrh_r_m(dst, mem)) }
+emit_stlrh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stlrh_r_m(dst, mem)) }
 inst_ldxr_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDXR, dst, mem) }
-emit_ldxr_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldxr_r_m(dst, mem)) }
+emit_ldxr_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldxr_r_m(dst, mem)) }
 inst_stxr_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STXR, dst, src, mem) }
-emit_stxr_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stxr_r_r_m(dst, src, mem)) }
+emit_stxr_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stxr_r_r_m(dst, src, mem)) }
 inst_ldaxr_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAXR, dst, mem) }
-emit_ldaxr_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldaxr_r_m(dst, mem)) }
+emit_ldaxr_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldaxr_r_m(dst, mem)) }
 inst_stlxr_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STLXR, dst, src, mem) }
-emit_stlxr_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stlxr_r_r_m(dst, src, mem)) }
+emit_stlxr_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stlxr_r_r_m(dst, src, mem)) }
 inst_nop_none                 :: #force_inline proc "contextless" () -> Instruction { return inst_none(.NOP) }
-emit_nop_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nop_none()) }
+emit_nop_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nop_none()) }
 inst_yield_none               :: #force_inline proc "contextless" () -> Instruction { return inst_none(.YIELD) }
-emit_yield_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_yield_none()) }
+emit_yield_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_yield_none()) }
 inst_wfe_none                 :: #force_inline proc "contextless" () -> Instruction { return inst_none(.WFE) }
-emit_wfe_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wfe_none()) }
+emit_wfe_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wfe_none()) }
 inst_wfi_none                 :: #force_inline proc "contextless" () -> Instruction { return inst_none(.WFI) }
-emit_wfi_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wfi_none()) }
+emit_wfi_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wfi_none()) }
 inst_sev_none                 :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SEV) }
-emit_sev_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sev_none()) }
+emit_sev_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sev_none()) }
 inst_sevl_none                :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SEVL) }
-emit_sevl_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sevl_none()) }
+emit_sevl_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sevl_none()) }
 inst_hint_i                   :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .HINT, operand_count = 1, length = 4, ops = {op_imm(imm, 1), {}, {}, {}, {}}} }
-emit_hint_i                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_hint_i(imm)) }
+emit_hint_i                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_hint_i(imm)) }
 inst_mrs_r_s                  :: #force_inline proc "contextless" (dst: Register, sysreg: Register) -> Instruction { return Instruction{mnemonic = .MRS, operand_count = 2, length = 4, ops = {op_reg(dst), op_sysreg(sysreg), {}, {}, {}}} }
-emit_mrs_r_s                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, sysreg: Register) { append(instructions, inst_mrs_r_s(dst, sysreg)) }
+emit_mrs_r_s                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, sysreg: Register) { append_elem(instructions, inst_mrs_r_s(dst, sysreg)) }
 inst_msr_i_i                  :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .MSR, operand_count = 2, length = 4, ops = {op_imm(imm, 4), op_imm(imm2, 1), {}, {}, {}}} }
 inst_msr_s_r                  :: #force_inline proc "contextless" (sysreg: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MSR, operand_count = 2, length = 4, ops = {op_sysreg(sysreg), op_reg(src), {}, {}, {}}} }
-emit_msr_i_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_msr_i_i(imm, imm2)) }
-emit_msr_s_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, sysreg: Register, src: Register) { append(instructions, inst_msr_s_r(sysreg, src)) }
+emit_msr_i_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_msr_i_i(imm, imm2)) }
+emit_msr_s_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, sysreg: Register, src: Register) { append_elem(instructions, inst_msr_s_r(sysreg, src)) }
 inst_isb_i                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .ISB, operand_count = 1, length = 4, ops = {op_imm(imm, 1), {}, {}, {}, {}}} }
-emit_isb_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_isb_i(imm)) }
+emit_isb_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_isb_i(imm)) }
 inst_dsb_i                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .DSB, operand_count = 1, length = 4, ops = {op_imm(imm, 1), {}, {}, {}, {}}} }
-emit_dsb_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_dsb_i(imm)) }
+emit_dsb_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_dsb_i(imm)) }
 inst_dmb_i                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .DMB, operand_count = 1, length = 4, ops = {op_imm(imm, 1), {}, {}, {}, {}}} }
-emit_dmb_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_dmb_i(imm)) }
+emit_dmb_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_dmb_i(imm)) }
 inst_svc_i                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SVC, operand_count = 1, length = 4, ops = {op_imm(imm, 2), {}, {}, {}, {}}} }
-emit_svc_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_svc_i(imm)) }
+emit_svc_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_svc_i(imm)) }
 inst_hvc_i                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .HVC, operand_count = 1, length = 4, ops = {op_imm(imm, 2), {}, {}, {}, {}}} }
-emit_hvc_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_hvc_i(imm)) }
+emit_hvc_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_hvc_i(imm)) }
 inst_smc_i                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SMC, operand_count = 1, length = 4, ops = {op_imm(imm, 2), {}, {}, {}, {}}} }
-emit_smc_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_smc_i(imm)) }
+emit_smc_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_smc_i(imm)) }
 inst_brk_i                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .BRK, operand_count = 1, length = 4, ops = {op_imm(imm, 2), {}, {}, {}, {}}} }
-emit_brk_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_brk_i(imm)) }
+emit_brk_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_brk_i(imm)) }
 inst_hlt_i                    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .HLT, operand_count = 1, length = 4, ops = {op_imm(imm, 2), {}, {}, {}, {}}} }
-emit_hlt_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_hlt_i(imm)) }
+emit_hlt_i                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_hlt_i(imm)) }
 inst_eret_none                :: #force_inline proc "contextless" () -> Instruction { return inst_none(.ERET) }
-emit_eret_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_eret_none()) }
+emit_eret_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_eret_none()) }
 inst_fmov_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FMOV, dst, src) }
 inst_fmov_r_i                 :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return inst_r_i(.FMOV, dst, imm) }
 inst_fmov_v2s_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FMOV, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_imm(imm, 1), {}, {}, {}}} }
@@ -534,13 +534,17 @@ inst_fmov_v4s_i               :: #force_inline proc "contextless" (dst: Register
 inst_fmov_v2d_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FMOV, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_fmov_v4h_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FMOV, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_fmov_v8h_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FMOV, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_imm(imm, 1), {}, {}, {}}} }
-emit_fmov_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmov_r_r(dst, src)) }
-emit_fmov_r_i                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_fmov_r_i(dst, imm)) }
-emit_fmov_v2s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_fmov_v2s_i(dst, imm)) }
-emit_fmov_v4s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_fmov_v4s_i(dst, imm)) }
-emit_fmov_v2d_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_fmov_v2d_i(dst, imm)) }
-emit_fmov_v4h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_fmov_v4h_i(dst, imm)) }
-emit_fmov_v8h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_fmov_v8h_i(dst, imm)) }
+inst_fmov_r_ved               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMOV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_elem_d(src), {}, {}, {}}} }
+inst_fmov_ved_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMOV, operand_count = 2, length = 4, ops = {op_v_elem_d(dst), op_reg(src), {}, {}, {}}} }
+emit_fmov_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmov_r_r(dst, src)) }
+emit_fmov_r_i                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_fmov_r_i(dst, imm)) }
+emit_fmov_v2s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_fmov_v2s_i(dst, imm)) }
+emit_fmov_v4s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_fmov_v4s_i(dst, imm)) }
+emit_fmov_v2d_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_fmov_v2d_i(dst, imm)) }
+emit_fmov_v4h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_fmov_v4h_i(dst, imm)) }
+emit_fmov_v8h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_fmov_v8h_i(dst, imm)) }
+emit_fmov_r_ved               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmov_r_ved(dst, src)) }
+emit_fmov_ved_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmov_ved_r(dst, src)) }
 inst_fabs_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FABS, dst, src) }
 inst_fabs_v2s_v2s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FABS, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fabs_v4s_v4s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FABS, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -550,15 +554,15 @@ inst_fabs_v8h_v8h             :: #force_inline proc "contextless" (dst: Register
 inst_fabs_zh_p_zh             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FABS, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_fabs_zs_p_zs             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FABS, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_fabs_zd_p_zd             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FABS, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_fabs_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fabs_r_r(dst, src)) }
-emit_fabs_v2s_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fabs_v2s_v2s(dst, src)) }
-emit_fabs_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fabs_v4s_v4s(dst, src)) }
-emit_fabs_v2d_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fabs_v2d_v2d(dst, src)) }
-emit_fabs_v4h_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fabs_v4h_v4h(dst, src)) }
-emit_fabs_v8h_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fabs_v8h_v8h(dst, src)) }
-emit_fabs_zh_p_zh             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fabs_zh_p_zh(rz, rz2, rz3)) }
-emit_fabs_zs_p_zs             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fabs_zs_p_zs(rz, rz2, rz3)) }
-emit_fabs_zd_p_zd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fabs_zd_p_zd(rz, rz2, rz3)) }
+emit_fabs_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fabs_r_r(dst, src)) }
+emit_fabs_v2s_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fabs_v2s_v2s(dst, src)) }
+emit_fabs_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fabs_v4s_v4s(dst, src)) }
+emit_fabs_v2d_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fabs_v2d_v2d(dst, src)) }
+emit_fabs_v4h_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fabs_v4h_v4h(dst, src)) }
+emit_fabs_v8h_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fabs_v8h_v8h(dst, src)) }
+emit_fabs_zh_p_zh             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fabs_zh_p_zh(rz, rz2, rz3)) }
+emit_fabs_zs_p_zs             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fabs_zs_p_zs(rz, rz2, rz3)) }
+emit_fabs_zd_p_zd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fabs_zd_p_zd(rz, rz2, rz3)) }
 inst_fneg_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FNEG, dst, src) }
 inst_fneg_v2s_v2s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FNEG, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fneg_v4s_v4s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FNEG, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -568,15 +572,15 @@ inst_fneg_v8h_v8h             :: #force_inline proc "contextless" (dst: Register
 inst_fneg_zh_p_zh             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FNEG, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_fneg_zs_p_zs             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FNEG, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_fneg_zd_p_zd             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FNEG, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_fneg_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fneg_r_r(dst, src)) }
-emit_fneg_v2s_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fneg_v2s_v2s(dst, src)) }
-emit_fneg_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fneg_v4s_v4s(dst, src)) }
-emit_fneg_v2d_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fneg_v2d_v2d(dst, src)) }
-emit_fneg_v4h_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fneg_v4h_v4h(dst, src)) }
-emit_fneg_v8h_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fneg_v8h_v8h(dst, src)) }
-emit_fneg_zh_p_zh             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fneg_zh_p_zh(rz, rz2, rz3)) }
-emit_fneg_zs_p_zs             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fneg_zs_p_zs(rz, rz2, rz3)) }
-emit_fneg_zd_p_zd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fneg_zd_p_zd(rz, rz2, rz3)) }
+emit_fneg_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fneg_r_r(dst, src)) }
+emit_fneg_v2s_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fneg_v2s_v2s(dst, src)) }
+emit_fneg_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fneg_v4s_v4s(dst, src)) }
+emit_fneg_v2d_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fneg_v2d_v2d(dst, src)) }
+emit_fneg_v4h_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fneg_v4h_v4h(dst, src)) }
+emit_fneg_v8h_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fneg_v8h_v8h(dst, src)) }
+emit_fneg_zh_p_zh             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fneg_zh_p_zh(rz, rz2, rz3)) }
+emit_fneg_zs_p_zs             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fneg_zs_p_zs(rz, rz2, rz3)) }
+emit_fneg_zd_p_zd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fneg_zd_p_zd(rz, rz2, rz3)) }
 inst_fsqrt_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FSQRT, dst, src) }
 inst_fsqrt_v2s_v2s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FSQRT, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fsqrt_v4s_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FSQRT, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -586,15 +590,15 @@ inst_fsqrt_v8h_v8h            :: #force_inline proc "contextless" (dst: Register
 inst_fsqrt_zh_p_zh            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FSQRT, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_fsqrt_zs_p_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FSQRT, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_fsqrt_zd_p_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FSQRT, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_fsqrt_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_r_r(dst, src)) }
-emit_fsqrt_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_v2s_v2s(dst, src)) }
-emit_fsqrt_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_v4s_v4s(dst, src)) }
-emit_fsqrt_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_v2d_v2d(dst, src)) }
-emit_fsqrt_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_v4h_v4h(dst, src)) }
-emit_fsqrt_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_v8h_v8h(dst, src)) }
-emit_fsqrt_zh_p_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fsqrt_zh_p_zh(rz, rz2, rz3)) }
-emit_fsqrt_zs_p_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fsqrt_zs_p_zs(rz, rz2, rz3)) }
-emit_fsqrt_zd_p_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fsqrt_zd_p_zd(rz, rz2, rz3)) }
+emit_fsqrt_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_r_r(dst, src)) }
+emit_fsqrt_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_v2s_v2s(dst, src)) }
+emit_fsqrt_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_v4s_v4s(dst, src)) }
+emit_fsqrt_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_v2d_v2d(dst, src)) }
+emit_fsqrt_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_v4h_v4h(dst, src)) }
+emit_fsqrt_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_v8h_v8h(dst, src)) }
+emit_fsqrt_zh_p_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fsqrt_zh_p_zh(rz, rz2, rz3)) }
+emit_fsqrt_zs_p_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fsqrt_zs_p_zs(rz, rz2, rz3)) }
+emit_fsqrt_zd_p_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fsqrt_zd_p_zd(rz, rz2, rz3)) }
 inst_fadd_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FADD, dst, src, src2) }
 inst_fadd_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADD, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fadd_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADD, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -605,16 +609,16 @@ inst_fadd_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_fadd_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FADD, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fadd_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FADD, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fadd_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FADD, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fadd_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadd_r_r_r(dst, src, src2)) }
-emit_fadd_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadd_v2s_v2s_v2s(dst, src, src2)) }
-emit_fadd_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadd_v4s_v4s_v4s(dst, src, src2)) }
-emit_fadd_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadd_v2d_v2d_v2d(dst, src, src2)) }
-emit_fadd_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fadd_zh_zh_zh(rz, rz2, rz3)) }
-emit_fadd_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fadd_zs_zs_zs(rz, rz2, rz3)) }
-emit_fadd_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fadd_zd_zd_zd(rz, rz2, rz3)) }
-emit_fadd_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fadd_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fadd_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fadd_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fadd_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fadd_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fadd_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadd_r_r_r(dst, src, src2)) }
+emit_fadd_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadd_v2s_v2s_v2s(dst, src, src2)) }
+emit_fadd_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadd_v4s_v4s_v4s(dst, src, src2)) }
+emit_fadd_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadd_v2d_v2d_v2d(dst, src, src2)) }
+emit_fadd_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fadd_zh_zh_zh(rz, rz2, rz3)) }
+emit_fadd_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fadd_zs_zs_zs(rz, rz2, rz3)) }
+emit_fadd_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fadd_zd_zd_zd(rz, rz2, rz3)) }
+emit_fadd_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fadd_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fadd_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fadd_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fadd_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fadd_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fsub_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FSUB, dst, src, src2) }
 inst_fsub_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FSUB, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fsub_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FSUB, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -625,16 +629,16 @@ inst_fsub_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_fsub_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FSUB, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fsub_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FSUB, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fsub_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FSUB, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fsub_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsub_r_r_r(dst, src, src2)) }
-emit_fsub_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsub_v2s_v2s_v2s(dst, src, src2)) }
-emit_fsub_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsub_v4s_v4s_v4s(dst, src, src2)) }
-emit_fsub_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsub_v2d_v2d_v2d(dst, src, src2)) }
-emit_fsub_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fsub_zh_zh_zh(rz, rz2, rz3)) }
-emit_fsub_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fsub_zs_zs_zs(rz, rz2, rz3)) }
-emit_fsub_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fsub_zd_zd_zd(rz, rz2, rz3)) }
-emit_fsub_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fsub_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fsub_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fsub_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fsub_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fsub_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fsub_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsub_r_r_r(dst, src, src2)) }
+emit_fsub_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsub_v2s_v2s_v2s(dst, src, src2)) }
+emit_fsub_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsub_v4s_v4s_v4s(dst, src, src2)) }
+emit_fsub_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsub_v2d_v2d_v2d(dst, src, src2)) }
+emit_fsub_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fsub_zh_zh_zh(rz, rz2, rz3)) }
+emit_fsub_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fsub_zs_zs_zs(rz, rz2, rz3)) }
+emit_fsub_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fsub_zd_zd_zd(rz, rz2, rz3)) }
+emit_fsub_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fsub_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fsub_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fsub_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fsub_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fsub_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fmul_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FMUL, dst, src, src2) }
 inst_fmul_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMUL, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fmul_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMUL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -645,16 +649,16 @@ inst_fmul_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_fmul_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMUL, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fmul_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMUL, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fmul_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMUL, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fmul_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmul_r_r_r(dst, src, src2)) }
-emit_fmul_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmul_v2s_v2s_v2s(dst, src, src2)) }
-emit_fmul_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmul_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmul_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmul_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmul_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fmul_zh_zh_zh(rz, rz2, rz3)) }
-emit_fmul_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fmul_zs_zs_zs(rz, rz2, rz3)) }
-emit_fmul_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fmul_zd_zd_zd(rz, rz2, rz3)) }
-emit_fmul_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmul_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fmul_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmul_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fmul_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmul_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fmul_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmul_r_r_r(dst, src, src2)) }
+emit_fmul_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmul_v2s_v2s_v2s(dst, src, src2)) }
+emit_fmul_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmul_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmul_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmul_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmul_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fmul_zh_zh_zh(rz, rz2, rz3)) }
+emit_fmul_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fmul_zs_zs_zs(rz, rz2, rz3)) }
+emit_fmul_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fmul_zd_zd_zd(rz, rz2, rz3)) }
+emit_fmul_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmul_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fmul_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmul_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fmul_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmul_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fdiv_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FDIV, dst, src, src2) }
 inst_fdiv_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FDIV, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fdiv_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FDIV, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -662,29 +666,29 @@ inst_fdiv_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register
 inst_fdiv_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FDIV, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fdiv_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FDIV, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fdiv_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FDIV, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fdiv_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdiv_r_r_r(dst, src, src2)) }
-emit_fdiv_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdiv_v2s_v2s_v2s(dst, src, src2)) }
-emit_fdiv_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdiv_v4s_v4s_v4s(dst, src, src2)) }
-emit_fdiv_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdiv_v2d_v2d_v2d(dst, src, src2)) }
-emit_fdiv_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fdiv_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fdiv_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fdiv_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fdiv_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fdiv_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fdiv_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdiv_r_r_r(dst, src, src2)) }
+emit_fdiv_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdiv_v2s_v2s_v2s(dst, src, src2)) }
+emit_fdiv_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdiv_v4s_v4s_v4s(dst, src, src2)) }
+emit_fdiv_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdiv_v2d_v2d_v2d(dst, src, src2)) }
+emit_fdiv_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fdiv_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fdiv_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fdiv_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fdiv_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fdiv_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fnmul_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FNMUL, dst, src, src2) }
-emit_fnmul_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fnmul_r_r_r(dst, src, src2)) }
+emit_fnmul_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fnmul_r_r_r(dst, src, src2)) }
 inst_fmadd_r_r_r_r            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.FMADD, dst, src, src2, src3) }
-emit_fmadd_r_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmadd_r_r_r_r(dst, src, src2, src3)) }
+emit_fmadd_r_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmadd_r_r_r_r(dst, src, src2, src3)) }
 inst_fmsub_r_r_r_r            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.FMSUB, dst, src, src2, src3) }
-emit_fmsub_r_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmsub_r_r_r_r(dst, src, src2, src3)) }
+emit_fmsub_r_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmsub_r_r_r_r(dst, src, src2, src3)) }
 inst_fnmadd_r_r_r_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.FNMADD, dst, src, src2, src3) }
-emit_fnmadd_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmadd_r_r_r_r(dst, src, src2, src3)) }
+emit_fnmadd_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmadd_r_r_r_r(dst, src, src2, src3)) }
 inst_fnmsub_r_r_r_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return inst_r_r_r_r(.FNMSUB, dst, src, src2, src3) }
-emit_fnmsub_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmsub_r_r_r_r(dst, src, src2, src3)) }
+emit_fnmsub_r_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmsub_r_r_r_r(dst, src, src2, src3)) }
 inst_fcmp_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCMP, dst, src) }
-emit_fcmp_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmp_r_r(dst, src)) }
+emit_fcmp_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmp_r_r(dst, src)) }
 inst_fcmpe_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCMPE, dst, src) }
-emit_fcmpe_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmpe_r_r(dst, src)) }
+emit_fcmpe_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmpe_r_r(dst, src)) }
 inst_fcsel_r_r_r_c            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .FCSEL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_cond(cond), {}}} }
-emit_fcsel_r_r_r_c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append(instructions, inst_fcsel_r_r_r_c(dst, src, src2, cond)) }
+emit_fcsel_r_r_r_c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append_elem(instructions, inst_fcsel_r_r_r_c(dst, src, src2, cond)) }
 inst_fmax_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FMAX, dst, src, src2) }
 inst_fmax_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAX, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fmax_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAX, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -694,15 +698,15 @@ inst_fmax_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register
 inst_fmax_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMAX, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fmax_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMAX, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fmax_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMAX, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fmax_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmax_r_r_r(dst, src, src2)) }
-emit_fmax_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmax_v2s_v2s_v2s(dst, src, src2)) }
-emit_fmax_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmax_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmax_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmax_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmax_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmax_v4h_v4h_v4h(dst, src, src2)) }
-emit_fmax_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmax_v8h_v8h_v8h(dst, src, src2)) }
-emit_fmax_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmax_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fmax_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmax_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fmax_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmax_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fmax_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmax_r_r_r(dst, src, src2)) }
+emit_fmax_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmax_v2s_v2s_v2s(dst, src, src2)) }
+emit_fmax_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmax_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmax_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmax_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmax_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmax_v4h_v4h_v4h(dst, src, src2)) }
+emit_fmax_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmax_v8h_v8h_v8h(dst, src, src2)) }
+emit_fmax_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmax_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fmax_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmax_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fmax_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmax_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fmin_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FMIN, dst, src, src2) }
 inst_fmin_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMIN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fmin_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMIN, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -712,15 +716,15 @@ inst_fmin_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register
 inst_fmin_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMIN, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fmin_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMIN, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fmin_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMIN, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fmin_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmin_r_r_r(dst, src, src2)) }
-emit_fmin_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmin_v2s_v2s_v2s(dst, src, src2)) }
-emit_fmin_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmin_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmin_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmin_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmin_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmin_v4h_v4h_v4h(dst, src, src2)) }
-emit_fmin_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmin_v8h_v8h_v8h(dst, src, src2)) }
-emit_fmin_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmin_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fmin_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmin_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fmin_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmin_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fmin_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmin_r_r_r(dst, src, src2)) }
+emit_fmin_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmin_v2s_v2s_v2s(dst, src, src2)) }
+emit_fmin_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmin_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmin_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmin_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmin_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmin_v4h_v4h_v4h(dst, src, src2)) }
+emit_fmin_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmin_v8h_v8h_v8h(dst, src, src2)) }
+emit_fmin_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmin_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fmin_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmin_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fmin_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmin_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fmaxnm_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FMAXNM, dst, src, src2) }
 inst_fmaxnm_v2s_v2s_v2s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXNM, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fmaxnm_v4s_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXNM, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -730,15 +734,15 @@ inst_fmaxnm_v8h_v8h_v8h       :: #force_inline proc "contextless" (dst: Register
 inst_fmaxnm_zh_p_zh_zh        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMAXNM, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fmaxnm_zs_p_zs_zs        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMAXNM, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fmaxnm_zd_p_zd_zd        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMAXNM, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fmaxnm_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnm_r_r_r(dst, src, src2)) }
-emit_fmaxnm_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnm_v2s_v2s_v2s(dst, src, src2)) }
-emit_fmaxnm_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnm_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmaxnm_v2d_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnm_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmaxnm_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnm_v4h_v4h_v4h(dst, src, src2)) }
-emit_fmaxnm_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnm_v8h_v8h_v8h(dst, src, src2)) }
-emit_fmaxnm_zh_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmaxnm_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fmaxnm_zs_p_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmaxnm_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fmaxnm_zd_p_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmaxnm_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fmaxnm_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnm_r_r_r(dst, src, src2)) }
+emit_fmaxnm_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnm_v2s_v2s_v2s(dst, src, src2)) }
+emit_fmaxnm_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnm_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmaxnm_v2d_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnm_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmaxnm_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnm_v4h_v4h_v4h(dst, src, src2)) }
+emit_fmaxnm_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnm_v8h_v8h_v8h(dst, src, src2)) }
+emit_fmaxnm_zh_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmaxnm_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fmaxnm_zs_p_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmaxnm_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fmaxnm_zd_p_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmaxnm_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fminnm_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.FMINNM, dst, src, src2) }
 inst_fminnm_v2s_v2s_v2s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINNM, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fminnm_v4s_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINNM, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -748,161 +752,161 @@ inst_fminnm_v8h_v8h_v8h       :: #force_inline proc "contextless" (dst: Register
 inst_fminnm_zh_p_zh_zh        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMINNM, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fminnm_zs_p_zs_zs        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMINNM, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fminnm_zd_p_zd_zd        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMINNM, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fminnm_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnm_r_r_r(dst, src, src2)) }
-emit_fminnm_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnm_v2s_v2s_v2s(dst, src, src2)) }
-emit_fminnm_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnm_v4s_v4s_v4s(dst, src, src2)) }
-emit_fminnm_v2d_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnm_v2d_v2d_v2d(dst, src, src2)) }
-emit_fminnm_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnm_v4h_v4h_v4h(dst, src, src2)) }
-emit_fminnm_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnm_v8h_v8h_v8h(dst, src, src2)) }
-emit_fminnm_zh_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fminnm_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fminnm_zs_p_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fminnm_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fminnm_zd_p_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fminnm_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fminnm_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnm_r_r_r(dst, src, src2)) }
+emit_fminnm_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnm_v2s_v2s_v2s(dst, src, src2)) }
+emit_fminnm_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnm_v4s_v4s_v4s(dst, src, src2)) }
+emit_fminnm_v2d_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnm_v2d_v2d_v2d(dst, src, src2)) }
+emit_fminnm_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnm_v4h_v4h_v4h(dst, src, src2)) }
+emit_fminnm_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnm_v8h_v8h_v8h(dst, src, src2)) }
+emit_fminnm_zh_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fminnm_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fminnm_zs_p_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fminnm_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fminnm_zd_p_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fminnm_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fcvt_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVT, dst, src) }
-emit_fcvt_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvt_r_r(dst, src)) }
+emit_fcvt_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvt_r_r(dst, src)) }
 inst_scvtf_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.SCVTF, dst, src) }
 inst_scvtf_v2s_v2s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SCVTF, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_scvtf_v4s_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SCVTF, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_scvtf_v2d_v2d            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SCVTF, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_scvtf_v4h_v4h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SCVTF, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_scvtf_v8h_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SCVTF, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_scvtf_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_scvtf_r_r(dst, src)) }
-emit_scvtf_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_scvtf_v2s_v2s(dst, src)) }
-emit_scvtf_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_scvtf_v4s_v4s(dst, src)) }
-emit_scvtf_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_scvtf_v2d_v2d(dst, src)) }
-emit_scvtf_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_scvtf_v4h_v4h(dst, src)) }
-emit_scvtf_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_scvtf_v8h_v8h(dst, src)) }
+emit_scvtf_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_scvtf_r_r(dst, src)) }
+emit_scvtf_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_scvtf_v2s_v2s(dst, src)) }
+emit_scvtf_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_scvtf_v4s_v4s(dst, src)) }
+emit_scvtf_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_scvtf_v2d_v2d(dst, src)) }
+emit_scvtf_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_scvtf_v4h_v4h(dst, src)) }
+emit_scvtf_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_scvtf_v8h_v8h(dst, src)) }
 inst_ucvtf_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.UCVTF, dst, src) }
 inst_ucvtf_v2s_v2s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UCVTF, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_ucvtf_v4s_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UCVTF, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_ucvtf_v2d_v2d            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UCVTF, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_ucvtf_v4h_v4h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UCVTF, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_ucvtf_v8h_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UCVTF, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_ucvtf_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ucvtf_r_r(dst, src)) }
-emit_ucvtf_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ucvtf_v2s_v2s(dst, src)) }
-emit_ucvtf_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ucvtf_v4s_v4s(dst, src)) }
-emit_ucvtf_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ucvtf_v2d_v2d(dst, src)) }
-emit_ucvtf_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ucvtf_v4h_v4h(dst, src)) }
-emit_ucvtf_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ucvtf_v8h_v8h(dst, src)) }
+emit_ucvtf_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ucvtf_r_r(dst, src)) }
+emit_ucvtf_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ucvtf_v2s_v2s(dst, src)) }
+emit_ucvtf_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ucvtf_v4s_v4s(dst, src)) }
+emit_ucvtf_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ucvtf_v2d_v2d(dst, src)) }
+emit_ucvtf_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ucvtf_v4h_v4h(dst, src)) }
+emit_ucvtf_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ucvtf_v8h_v8h(dst, src)) }
 inst_fcvtzs_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTZS, dst, src) }
 inst_fcvtzs_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZS, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtzs_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZS, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtzs_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZS, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtzs_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZS, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtzs_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZS, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtzs_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzs_r_r(dst, src)) }
-emit_fcvtzs_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzs_v2s_v2s(dst, src)) }
-emit_fcvtzs_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzs_v4s_v4s(dst, src)) }
-emit_fcvtzs_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzs_v2d_v2d(dst, src)) }
-emit_fcvtzs_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzs_v4h_v4h(dst, src)) }
-emit_fcvtzs_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzs_v8h_v8h(dst, src)) }
+emit_fcvtzs_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzs_r_r(dst, src)) }
+emit_fcvtzs_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzs_v2s_v2s(dst, src)) }
+emit_fcvtzs_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzs_v4s_v4s(dst, src)) }
+emit_fcvtzs_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzs_v2d_v2d(dst, src)) }
+emit_fcvtzs_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzs_v4h_v4h(dst, src)) }
+emit_fcvtzs_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzs_v8h_v8h(dst, src)) }
 inst_fcvtzu_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTZU, dst, src) }
 inst_fcvtzu_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZU, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtzu_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZU, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtzu_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZU, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtzu_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZU, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtzu_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTZU, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtzu_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzu_r_r(dst, src)) }
-emit_fcvtzu_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzu_v2s_v2s(dst, src)) }
-emit_fcvtzu_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzu_v4s_v4s(dst, src)) }
-emit_fcvtzu_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzu_v2d_v2d(dst, src)) }
-emit_fcvtzu_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzu_v4h_v4h(dst, src)) }
-emit_fcvtzu_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtzu_v8h_v8h(dst, src)) }
+emit_fcvtzu_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzu_r_r(dst, src)) }
+emit_fcvtzu_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzu_v2s_v2s(dst, src)) }
+emit_fcvtzu_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzu_v4s_v4s(dst, src)) }
+emit_fcvtzu_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzu_v2d_v2d(dst, src)) }
+emit_fcvtzu_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzu_v4h_v4h(dst, src)) }
+emit_fcvtzu_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtzu_v8h_v8h(dst, src)) }
 inst_fcvtas_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTAS, dst, src) }
 inst_fcvtas_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAS, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtas_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAS, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtas_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAS, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtas_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAS, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtas_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAS, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtas_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtas_r_r(dst, src)) }
-emit_fcvtas_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtas_v2s_v2s(dst, src)) }
-emit_fcvtas_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtas_v4s_v4s(dst, src)) }
-emit_fcvtas_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtas_v2d_v2d(dst, src)) }
-emit_fcvtas_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtas_v4h_v4h(dst, src)) }
-emit_fcvtas_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtas_v8h_v8h(dst, src)) }
+emit_fcvtas_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtas_r_r(dst, src)) }
+emit_fcvtas_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtas_v2s_v2s(dst, src)) }
+emit_fcvtas_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtas_v4s_v4s(dst, src)) }
+emit_fcvtas_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtas_v2d_v2d(dst, src)) }
+emit_fcvtas_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtas_v4h_v4h(dst, src)) }
+emit_fcvtas_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtas_v8h_v8h(dst, src)) }
 inst_fcvtau_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTAU, dst, src) }
 inst_fcvtau_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAU, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtau_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAU, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtau_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAU, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtau_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAU, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtau_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTAU, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtau_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtau_r_r(dst, src)) }
-emit_fcvtau_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtau_v2s_v2s(dst, src)) }
-emit_fcvtau_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtau_v4s_v4s(dst, src)) }
-emit_fcvtau_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtau_v2d_v2d(dst, src)) }
-emit_fcvtau_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtau_v4h_v4h(dst, src)) }
-emit_fcvtau_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtau_v8h_v8h(dst, src)) }
+emit_fcvtau_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtau_r_r(dst, src)) }
+emit_fcvtau_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtau_v2s_v2s(dst, src)) }
+emit_fcvtau_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtau_v4s_v4s(dst, src)) }
+emit_fcvtau_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtau_v2d_v2d(dst, src)) }
+emit_fcvtau_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtau_v4h_v4h(dst, src)) }
+emit_fcvtau_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtau_v8h_v8h(dst, src)) }
 inst_fcvtns_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTNS, dst, src) }
 inst_fcvtns_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNS, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtns_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNS, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtns_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNS, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtns_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNS, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtns_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNS, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtns_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtns_r_r(dst, src)) }
-emit_fcvtns_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtns_v2s_v2s(dst, src)) }
-emit_fcvtns_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtns_v4s_v4s(dst, src)) }
-emit_fcvtns_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtns_v2d_v2d(dst, src)) }
-emit_fcvtns_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtns_v4h_v4h(dst, src)) }
-emit_fcvtns_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtns_v8h_v8h(dst, src)) }
+emit_fcvtns_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtns_r_r(dst, src)) }
+emit_fcvtns_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtns_v2s_v2s(dst, src)) }
+emit_fcvtns_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtns_v4s_v4s(dst, src)) }
+emit_fcvtns_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtns_v2d_v2d(dst, src)) }
+emit_fcvtns_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtns_v4h_v4h(dst, src)) }
+emit_fcvtns_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtns_v8h_v8h(dst, src)) }
 inst_fcvtnu_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTNU, dst, src) }
 inst_fcvtnu_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNU, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtnu_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNU, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtnu_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNU, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtnu_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNU, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtnu_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTNU, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtnu_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtnu_r_r(dst, src)) }
-emit_fcvtnu_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtnu_v2s_v2s(dst, src)) }
-emit_fcvtnu_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtnu_v4s_v4s(dst, src)) }
-emit_fcvtnu_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtnu_v2d_v2d(dst, src)) }
-emit_fcvtnu_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtnu_v4h_v4h(dst, src)) }
-emit_fcvtnu_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtnu_v8h_v8h(dst, src)) }
+emit_fcvtnu_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtnu_r_r(dst, src)) }
+emit_fcvtnu_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtnu_v2s_v2s(dst, src)) }
+emit_fcvtnu_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtnu_v4s_v4s(dst, src)) }
+emit_fcvtnu_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtnu_v2d_v2d(dst, src)) }
+emit_fcvtnu_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtnu_v4h_v4h(dst, src)) }
+emit_fcvtnu_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtnu_v8h_v8h(dst, src)) }
 inst_fcvtps_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTPS, dst, src) }
 inst_fcvtps_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPS, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtps_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPS, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtps_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPS, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtps_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPS, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtps_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPS, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtps_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtps_r_r(dst, src)) }
-emit_fcvtps_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtps_v2s_v2s(dst, src)) }
-emit_fcvtps_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtps_v4s_v4s(dst, src)) }
-emit_fcvtps_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtps_v2d_v2d(dst, src)) }
-emit_fcvtps_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtps_v4h_v4h(dst, src)) }
-emit_fcvtps_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtps_v8h_v8h(dst, src)) }
+emit_fcvtps_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtps_r_r(dst, src)) }
+emit_fcvtps_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtps_v2s_v2s(dst, src)) }
+emit_fcvtps_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtps_v4s_v4s(dst, src)) }
+emit_fcvtps_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtps_v2d_v2d(dst, src)) }
+emit_fcvtps_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtps_v4h_v4h(dst, src)) }
+emit_fcvtps_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtps_v8h_v8h(dst, src)) }
 inst_fcvtpu_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTPU, dst, src) }
 inst_fcvtpu_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPU, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtpu_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPU, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtpu_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPU, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtpu_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPU, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtpu_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTPU, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtpu_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtpu_r_r(dst, src)) }
-emit_fcvtpu_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtpu_v2s_v2s(dst, src)) }
-emit_fcvtpu_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtpu_v4s_v4s(dst, src)) }
-emit_fcvtpu_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtpu_v2d_v2d(dst, src)) }
-emit_fcvtpu_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtpu_v4h_v4h(dst, src)) }
-emit_fcvtpu_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtpu_v8h_v8h(dst, src)) }
+emit_fcvtpu_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtpu_r_r(dst, src)) }
+emit_fcvtpu_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtpu_v2s_v2s(dst, src)) }
+emit_fcvtpu_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtpu_v4s_v4s(dst, src)) }
+emit_fcvtpu_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtpu_v2d_v2d(dst, src)) }
+emit_fcvtpu_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtpu_v4h_v4h(dst, src)) }
+emit_fcvtpu_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtpu_v8h_v8h(dst, src)) }
 inst_fcvtms_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTMS, dst, src) }
 inst_fcvtms_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMS, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtms_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMS, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtms_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMS, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtms_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMS, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtms_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMS, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtms_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtms_r_r(dst, src)) }
-emit_fcvtms_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtms_v2s_v2s(dst, src)) }
-emit_fcvtms_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtms_v4s_v4s(dst, src)) }
-emit_fcvtms_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtms_v2d_v2d(dst, src)) }
-emit_fcvtms_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtms_v4h_v4h(dst, src)) }
-emit_fcvtms_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtms_v8h_v8h(dst, src)) }
+emit_fcvtms_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtms_r_r(dst, src)) }
+emit_fcvtms_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtms_v2s_v2s(dst, src)) }
+emit_fcvtms_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtms_v4s_v4s(dst, src)) }
+emit_fcvtms_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtms_v2d_v2d(dst, src)) }
+emit_fcvtms_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtms_v4h_v4h(dst, src)) }
+emit_fcvtms_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtms_v8h_v8h(dst, src)) }
 inst_fcvtmu_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FCVTMU, dst, src) }
 inst_fcvtmu_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMU, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcvtmu_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMU, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtmu_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMU, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_fcvtmu_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMU, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtmu_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTMU, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fcvtmu_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtmu_r_r(dst, src)) }
-emit_fcvtmu_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtmu_v2s_v2s(dst, src)) }
-emit_fcvtmu_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtmu_v4s_v4s(dst, src)) }
-emit_fcvtmu_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtmu_v2d_v2d(dst, src)) }
-emit_fcvtmu_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtmu_v4h_v4h(dst, src)) }
-emit_fcvtmu_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtmu_v8h_v8h(dst, src)) }
+emit_fcvtmu_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtmu_r_r(dst, src)) }
+emit_fcvtmu_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtmu_v2s_v2s(dst, src)) }
+emit_fcvtmu_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtmu_v4s_v4s(dst, src)) }
+emit_fcvtmu_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtmu_v2d_v2d(dst, src)) }
+emit_fcvtmu_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtmu_v4h_v4h(dst, src)) }
+emit_fcvtmu_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtmu_v8h_v8h(dst, src)) }
 inst_frinta_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FRINTA, dst, src) }
 inst_frinta_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTA, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frinta_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTA, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -912,15 +916,15 @@ inst_frinta_v8h_v8h           :: #force_inline proc "contextless" (dst: Register
 inst_frinta_zh_p_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTA, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_frinta_zs_p_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTA, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_frinta_zd_p_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTA, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_frinta_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinta_r_r(dst, src)) }
-emit_frinta_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinta_v2s_v2s(dst, src)) }
-emit_frinta_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinta_v4s_v4s(dst, src)) }
-emit_frinta_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinta_v2d_v2d(dst, src)) }
-emit_frinta_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinta_v4h_v4h(dst, src)) }
-emit_frinta_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinta_v8h_v8h(dst, src)) }
-emit_frinta_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frinta_zh_p_zh(rz, rz2, rz3)) }
-emit_frinta_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frinta_zs_p_zs(rz, rz2, rz3)) }
-emit_frinta_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frinta_zd_p_zd(rz, rz2, rz3)) }
+emit_frinta_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinta_r_r(dst, src)) }
+emit_frinta_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinta_v2s_v2s(dst, src)) }
+emit_frinta_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinta_v4s_v4s(dst, src)) }
+emit_frinta_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinta_v2d_v2d(dst, src)) }
+emit_frinta_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinta_v4h_v4h(dst, src)) }
+emit_frinta_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinta_v8h_v8h(dst, src)) }
+emit_frinta_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frinta_zh_p_zh(rz, rz2, rz3)) }
+emit_frinta_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frinta_zs_p_zs(rz, rz2, rz3)) }
+emit_frinta_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frinta_zd_p_zd(rz, rz2, rz3)) }
 inst_frinti_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FRINTI, dst, src) }
 inst_frinti_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTI, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frinti_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTI, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -930,15 +934,15 @@ inst_frinti_v8h_v8h           :: #force_inline proc "contextless" (dst: Register
 inst_frinti_zh_p_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTI, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_frinti_zs_p_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTI, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_frinti_zd_p_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTI, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_frinti_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinti_r_r(dst, src)) }
-emit_frinti_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinti_v2s_v2s(dst, src)) }
-emit_frinti_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinti_v4s_v4s(dst, src)) }
-emit_frinti_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinti_v2d_v2d(dst, src)) }
-emit_frinti_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinti_v4h_v4h(dst, src)) }
-emit_frinti_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frinti_v8h_v8h(dst, src)) }
-emit_frinti_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frinti_zh_p_zh(rz, rz2, rz3)) }
-emit_frinti_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frinti_zs_p_zs(rz, rz2, rz3)) }
-emit_frinti_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frinti_zd_p_zd(rz, rz2, rz3)) }
+emit_frinti_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinti_r_r(dst, src)) }
+emit_frinti_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinti_v2s_v2s(dst, src)) }
+emit_frinti_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinti_v4s_v4s(dst, src)) }
+emit_frinti_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinti_v2d_v2d(dst, src)) }
+emit_frinti_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinti_v4h_v4h(dst, src)) }
+emit_frinti_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frinti_v8h_v8h(dst, src)) }
+emit_frinti_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frinti_zh_p_zh(rz, rz2, rz3)) }
+emit_frinti_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frinti_zs_p_zs(rz, rz2, rz3)) }
+emit_frinti_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frinti_zd_p_zd(rz, rz2, rz3)) }
 inst_frintm_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FRINTM, dst, src) }
 inst_frintm_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTM, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frintm_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTM, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -948,15 +952,15 @@ inst_frintm_v8h_v8h           :: #force_inline proc "contextless" (dst: Register
 inst_frintm_zh_p_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTM, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_frintm_zs_p_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTM, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_frintm_zd_p_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTM, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_frintm_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintm_r_r(dst, src)) }
-emit_frintm_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintm_v2s_v2s(dst, src)) }
-emit_frintm_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintm_v4s_v4s(dst, src)) }
-emit_frintm_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintm_v2d_v2d(dst, src)) }
-emit_frintm_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintm_v4h_v4h(dst, src)) }
-emit_frintm_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintm_v8h_v8h(dst, src)) }
-emit_frintm_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintm_zh_p_zh(rz, rz2, rz3)) }
-emit_frintm_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintm_zs_p_zs(rz, rz2, rz3)) }
-emit_frintm_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintm_zd_p_zd(rz, rz2, rz3)) }
+emit_frintm_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintm_r_r(dst, src)) }
+emit_frintm_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintm_v2s_v2s(dst, src)) }
+emit_frintm_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintm_v4s_v4s(dst, src)) }
+emit_frintm_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintm_v2d_v2d(dst, src)) }
+emit_frintm_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintm_v4h_v4h(dst, src)) }
+emit_frintm_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintm_v8h_v8h(dst, src)) }
+emit_frintm_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintm_zh_p_zh(rz, rz2, rz3)) }
+emit_frintm_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintm_zs_p_zs(rz, rz2, rz3)) }
+emit_frintm_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintm_zd_p_zd(rz, rz2, rz3)) }
 inst_frintn_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FRINTN, dst, src) }
 inst_frintn_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTN, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frintn_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTN, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -966,15 +970,15 @@ inst_frintn_v8h_v8h           :: #force_inline proc "contextless" (dst: Register
 inst_frintn_zh_p_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTN, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_frintn_zs_p_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTN, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_frintn_zd_p_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTN, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_frintn_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintn_r_r(dst, src)) }
-emit_frintn_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintn_v2s_v2s(dst, src)) }
-emit_frintn_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintn_v4s_v4s(dst, src)) }
-emit_frintn_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintn_v2d_v2d(dst, src)) }
-emit_frintn_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintn_v4h_v4h(dst, src)) }
-emit_frintn_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintn_v8h_v8h(dst, src)) }
-emit_frintn_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintn_zh_p_zh(rz, rz2, rz3)) }
-emit_frintn_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintn_zs_p_zs(rz, rz2, rz3)) }
-emit_frintn_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintn_zd_p_zd(rz, rz2, rz3)) }
+emit_frintn_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintn_r_r(dst, src)) }
+emit_frintn_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintn_v2s_v2s(dst, src)) }
+emit_frintn_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintn_v4s_v4s(dst, src)) }
+emit_frintn_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintn_v2d_v2d(dst, src)) }
+emit_frintn_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintn_v4h_v4h(dst, src)) }
+emit_frintn_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintn_v8h_v8h(dst, src)) }
+emit_frintn_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintn_zh_p_zh(rz, rz2, rz3)) }
+emit_frintn_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintn_zs_p_zs(rz, rz2, rz3)) }
+emit_frintn_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintn_zd_p_zd(rz, rz2, rz3)) }
 inst_frintp_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FRINTP, dst, src) }
 inst_frintp_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTP, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frintp_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTP, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -984,15 +988,15 @@ inst_frintp_v8h_v8h           :: #force_inline proc "contextless" (dst: Register
 inst_frintp_zh_p_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTP, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_frintp_zs_p_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTP, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_frintp_zd_p_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTP, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_frintp_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintp_r_r(dst, src)) }
-emit_frintp_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintp_v2s_v2s(dst, src)) }
-emit_frintp_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintp_v4s_v4s(dst, src)) }
-emit_frintp_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintp_v2d_v2d(dst, src)) }
-emit_frintp_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintp_v4h_v4h(dst, src)) }
-emit_frintp_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintp_v8h_v8h(dst, src)) }
-emit_frintp_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintp_zh_p_zh(rz, rz2, rz3)) }
-emit_frintp_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintp_zs_p_zs(rz, rz2, rz3)) }
-emit_frintp_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintp_zd_p_zd(rz, rz2, rz3)) }
+emit_frintp_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintp_r_r(dst, src)) }
+emit_frintp_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintp_v2s_v2s(dst, src)) }
+emit_frintp_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintp_v4s_v4s(dst, src)) }
+emit_frintp_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintp_v2d_v2d(dst, src)) }
+emit_frintp_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintp_v4h_v4h(dst, src)) }
+emit_frintp_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintp_v8h_v8h(dst, src)) }
+emit_frintp_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintp_zh_p_zh(rz, rz2, rz3)) }
+emit_frintp_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintp_zs_p_zs(rz, rz2, rz3)) }
+emit_frintp_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintp_zd_p_zd(rz, rz2, rz3)) }
 inst_frintx_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FRINTX, dst, src) }
 inst_frintx_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTX, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frintx_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTX, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -1002,15 +1006,15 @@ inst_frintx_v8h_v8h           :: #force_inline proc "contextless" (dst: Register
 inst_frintx_zh_p_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTX, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_frintx_zs_p_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTX, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_frintx_zd_p_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTX, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_frintx_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintx_r_r(dst, src)) }
-emit_frintx_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintx_v2s_v2s(dst, src)) }
-emit_frintx_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintx_v4s_v4s(dst, src)) }
-emit_frintx_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintx_v2d_v2d(dst, src)) }
-emit_frintx_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintx_v4h_v4h(dst, src)) }
-emit_frintx_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintx_v8h_v8h(dst, src)) }
-emit_frintx_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintx_zh_p_zh(rz, rz2, rz3)) }
-emit_frintx_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintx_zs_p_zs(rz, rz2, rz3)) }
-emit_frintx_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintx_zd_p_zd(rz, rz2, rz3)) }
+emit_frintx_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintx_r_r(dst, src)) }
+emit_frintx_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintx_v2s_v2s(dst, src)) }
+emit_frintx_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintx_v4s_v4s(dst, src)) }
+emit_frintx_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintx_v2d_v2d(dst, src)) }
+emit_frintx_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintx_v4h_v4h(dst, src)) }
+emit_frintx_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintx_v8h_v8h(dst, src)) }
+emit_frintx_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintx_zh_p_zh(rz, rz2, rz3)) }
+emit_frintx_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintx_zs_p_zs(rz, rz2, rz3)) }
+emit_frintx_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintx_zd_p_zd(rz, rz2, rz3)) }
 inst_frintz_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FRINTZ, dst, src) }
 inst_frintz_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTZ, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frintz_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINTZ, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
@@ -1020,409 +1024,409 @@ inst_frintz_v8h_v8h           :: #force_inline proc "contextless" (dst: Register
 inst_frintz_zh_p_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTZ, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_frintz_zs_p_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTZ, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_frintz_zd_p_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRINTZ, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_frintz_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintz_r_r(dst, src)) }
-emit_frintz_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintz_v2s_v2s(dst, src)) }
-emit_frintz_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintz_v4s_v4s(dst, src)) }
-emit_frintz_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintz_v2d_v2d(dst, src)) }
-emit_frintz_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintz_v4h_v4h(dst, src)) }
-emit_frintz_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frintz_v8h_v8h(dst, src)) }
-emit_frintz_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintz_zh_p_zh(rz, rz2, rz3)) }
-emit_frintz_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintz_zs_p_zs(rz, rz2, rz3)) }
-emit_frintz_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frintz_zd_p_zd(rz, rz2, rz3)) }
+emit_frintz_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintz_r_r(dst, src)) }
+emit_frintz_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintz_v2s_v2s(dst, src)) }
+emit_frintz_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintz_v4s_v4s(dst, src)) }
+emit_frintz_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintz_v2d_v2d(dst, src)) }
+emit_frintz_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintz_v4h_v4h(dst, src)) }
+emit_frintz_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frintz_v8h_v8h(dst, src)) }
+emit_frintz_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintz_zh_p_zh(rz, rz2, rz3)) }
+emit_frintz_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintz_zs_p_zs(rz, rz2, rz3)) }
+emit_frintz_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frintz_zd_p_zd(rz, rz2, rz3)) }
 inst_tst_r_i                  :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return inst_r_i(.TST, dst, imm) }
 inst_tst_r_sh                 :: #force_inline proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction { return Instruction{mnemonic = .TST, operand_count = 2, length = 4, ops = {op_reg(dst), op_shifted(src, src_shift, src_amount), {}, {}, {}}} }
-emit_tst_r_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_tst_r_i(dst, imm)) }
-emit_tst_r_sh                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append(instructions, inst_tst_r_sh(dst, src, src_shift, src_amount)) }
+emit_tst_r_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_tst_r_i(dst, imm)) }
+emit_tst_r_sh                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append_elem(instructions, inst_tst_r_sh(dst, src, src_shift, src_amount)) }
 inst_ldur_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDUR, dst, mem) }
-emit_ldur_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldur_r_m(dst, mem)) }
+emit_ldur_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldur_r_m(dst, mem)) }
 inst_stur_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STUR, dst, mem) }
-emit_stur_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stur_r_m(dst, mem)) }
+emit_stur_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stur_r_m(dst, mem)) }
 inst_ldurb_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDURB, dst, mem) }
-emit_ldurb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldurb_r_m(dst, mem)) }
+emit_ldurb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldurb_r_m(dst, mem)) }
 inst_sturb_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STURB, dst, mem) }
-emit_sturb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_sturb_r_m(dst, mem)) }
+emit_sturb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_sturb_r_m(dst, mem)) }
 inst_ldursb_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDURSB, dst, mem) }
-emit_ldursb_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldursb_r_m(dst, mem)) }
+emit_ldursb_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldursb_r_m(dst, mem)) }
 inst_ldurh_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDURH, dst, mem) }
-emit_ldurh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldurh_r_m(dst, mem)) }
+emit_ldurh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldurh_r_m(dst, mem)) }
 inst_sturh_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STURH, dst, mem) }
-emit_sturh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_sturh_r_m(dst, mem)) }
+emit_sturh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_sturh_r_m(dst, mem)) }
 inst_ldursh_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDURSH, dst, mem) }
-emit_ldursh_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldursh_r_m(dst, mem)) }
+emit_ldursh_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldursh_r_m(dst, mem)) }
 inst_ldursw_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDURSW, dst, mem) }
-emit_ldursw_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldursw_r_m(dst, mem)) }
+emit_ldursw_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldursw_r_m(dst, mem)) }
 inst_ldnp_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDNP, dst, src, mem) }
-emit_ldnp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldnp_r_r_m(dst, src, mem)) }
+emit_ldnp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldnp_r_r_m(dst, src, mem)) }
 inst_stnp_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STNP, dst, src, mem) }
-emit_stnp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stnp_r_r_m(dst, src, mem)) }
+emit_stnp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stnp_r_r_m(dst, src, mem)) }
 inst_ldxp_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDXP, dst, src, mem) }
-emit_ldxp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldxp_r_r_m(dst, src, mem)) }
+emit_ldxp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldxp_r_r_m(dst, src, mem)) }
 inst_stxp_r_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .STXP, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_mem(mem), {}}} }
-emit_stxp_r_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, mem: Memory) { append(instructions, inst_stxp_r_r_r_m(dst, src, src2, mem)) }
+emit_stxp_r_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, mem: Memory) { append_elem(instructions, inst_stxp_r_r_r_m(dst, src, src2, mem)) }
 inst_ldaxp_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDAXP, dst, src, mem) }
-emit_ldaxp_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldaxp_r_r_m(dst, src, mem)) }
+emit_ldaxp_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldaxp_r_r_m(dst, src, mem)) }
 inst_stlxp_r_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .STLXP, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_mem(mem), {}}} }
-emit_stlxp_r_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, mem: Memory) { append(instructions, inst_stlxp_r_r_r_m(dst, src, src2, mem)) }
+emit_stlxp_r_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, mem: Memory) { append_elem(instructions, inst_stlxp_r_r_r_m(dst, src, src2, mem)) }
 inst_ldxrb_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDXRB, dst, mem) }
-emit_ldxrb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldxrb_r_m(dst, mem)) }
+emit_ldxrb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldxrb_r_m(dst, mem)) }
 inst_stxrb_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STXRB, dst, src, mem) }
-emit_stxrb_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stxrb_r_r_m(dst, src, mem)) }
+emit_stxrb_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stxrb_r_r_m(dst, src, mem)) }
 inst_ldaxrb_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAXRB, dst, mem) }
-emit_ldaxrb_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldaxrb_r_m(dst, mem)) }
+emit_ldaxrb_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldaxrb_r_m(dst, mem)) }
 inst_stlxrb_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STLXRB, dst, src, mem) }
-emit_stlxrb_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stlxrb_r_r_m(dst, src, mem)) }
+emit_stlxrb_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stlxrb_r_r_m(dst, src, mem)) }
 inst_ldxrh_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDXRH, dst, mem) }
-emit_ldxrh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldxrh_r_m(dst, mem)) }
+emit_ldxrh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldxrh_r_m(dst, mem)) }
 inst_stxrh_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STXRH, dst, src, mem) }
-emit_stxrh_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stxrh_r_r_m(dst, src, mem)) }
+emit_stxrh_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stxrh_r_r_m(dst, src, mem)) }
 inst_ldaxrh_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAXRH, dst, mem) }
-emit_ldaxrh_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldaxrh_r_m(dst, mem)) }
+emit_ldaxrh_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldaxrh_r_m(dst, mem)) }
 inst_stlxrh_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STLXRH, dst, src, mem) }
-emit_stlxrh_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stlxrh_r_r_m(dst, src, mem)) }
+emit_stlxrh_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stlxrh_r_r_m(dst, src, mem)) }
 inst_ldapr_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPR, dst, mem) }
-emit_ldapr_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldapr_r_m(dst, mem)) }
+emit_ldapr_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldapr_r_m(dst, mem)) }
 inst_ldaprb_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPRB, dst, mem) }
-emit_ldaprb_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldaprb_r_m(dst, mem)) }
+emit_ldaprb_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldaprb_r_m(dst, mem)) }
 inst_ldaprh_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPRH, dst, mem) }
-emit_ldaprh_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldaprh_r_m(dst, mem)) }
+emit_ldaprh_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldaprh_r_m(dst, mem)) }
 inst_ldadd_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDADD, dst, src, mem) }
-emit_ldadd_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldadd_r_r_m(dst, src, mem)) }
+emit_ldadd_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldadd_r_r_m(dst, src, mem)) }
 inst_ldadda_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDADDA, dst, src, mem) }
-emit_ldadda_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldadda_r_r_m(dst, src, mem)) }
+emit_ldadda_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldadda_r_r_m(dst, src, mem)) }
 inst_ldaddl_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDADDL, dst, src, mem) }
-emit_ldaddl_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldaddl_r_r_m(dst, src, mem)) }
+emit_ldaddl_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldaddl_r_r_m(dst, src, mem)) }
 inst_ldaddal_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDADDAL, dst, src, mem) }
-emit_ldaddal_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldaddal_r_r_m(dst, src, mem)) }
+emit_ldaddal_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldaddal_r_r_m(dst, src, mem)) }
 inst_ldclr_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDCLR, dst, src, mem) }
-emit_ldclr_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldclr_r_r_m(dst, src, mem)) }
+emit_ldclr_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldclr_r_r_m(dst, src, mem)) }
 inst_ldclra_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDCLRA, dst, src, mem) }
-emit_ldclra_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldclra_r_r_m(dst, src, mem)) }
+emit_ldclra_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldclra_r_r_m(dst, src, mem)) }
 inst_ldclrl_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDCLRL, dst, src, mem) }
-emit_ldclrl_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldclrl_r_r_m(dst, src, mem)) }
+emit_ldclrl_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldclrl_r_r_m(dst, src, mem)) }
 inst_ldclral_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDCLRAL, dst, src, mem) }
-emit_ldclral_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldclral_r_r_m(dst, src, mem)) }
+emit_ldclral_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldclral_r_r_m(dst, src, mem)) }
 inst_ldeor_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDEOR, dst, src, mem) }
-emit_ldeor_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldeor_r_r_m(dst, src, mem)) }
+emit_ldeor_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldeor_r_r_m(dst, src, mem)) }
 inst_ldeora_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDEORA, dst, src, mem) }
-emit_ldeora_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldeora_r_r_m(dst, src, mem)) }
+emit_ldeora_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldeora_r_r_m(dst, src, mem)) }
 inst_ldeorl_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDEORL, dst, src, mem) }
-emit_ldeorl_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldeorl_r_r_m(dst, src, mem)) }
+emit_ldeorl_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldeorl_r_r_m(dst, src, mem)) }
 inst_ldeoral_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDEORAL, dst, src, mem) }
-emit_ldeoral_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldeoral_r_r_m(dst, src, mem)) }
+emit_ldeoral_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldeoral_r_r_m(dst, src, mem)) }
 inst_ldset_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSET, dst, src, mem) }
-emit_ldset_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldset_r_r_m(dst, src, mem)) }
+emit_ldset_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldset_r_r_m(dst, src, mem)) }
 inst_ldseta_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSETA, dst, src, mem) }
-emit_ldseta_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldseta_r_r_m(dst, src, mem)) }
+emit_ldseta_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldseta_r_r_m(dst, src, mem)) }
 inst_ldsetl_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSETL, dst, src, mem) }
-emit_ldsetl_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsetl_r_r_m(dst, src, mem)) }
+emit_ldsetl_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsetl_r_r_m(dst, src, mem)) }
 inst_ldsetal_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSETAL, dst, src, mem) }
-emit_ldsetal_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsetal_r_r_m(dst, src, mem)) }
+emit_ldsetal_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsetal_r_r_m(dst, src, mem)) }
 inst_ldsmax_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSMAX, dst, src, mem) }
-emit_ldsmax_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsmax_r_r_m(dst, src, mem)) }
+emit_ldsmax_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsmax_r_r_m(dst, src, mem)) }
 inst_ldsmaxa_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSMAXA, dst, src, mem) }
-emit_ldsmaxa_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsmaxa_r_r_m(dst, src, mem)) }
+emit_ldsmaxa_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsmaxa_r_r_m(dst, src, mem)) }
 inst_ldsmaxl_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSMAXL, dst, src, mem) }
-emit_ldsmaxl_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsmaxl_r_r_m(dst, src, mem)) }
+emit_ldsmaxl_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsmaxl_r_r_m(dst, src, mem)) }
 inst_ldsmaxal_r_r_m           :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSMAXAL, dst, src, mem) }
-emit_ldsmaxal_r_r_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsmaxal_r_r_m(dst, src, mem)) }
+emit_ldsmaxal_r_r_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsmaxal_r_r_m(dst, src, mem)) }
 inst_ldsmin_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSMIN, dst, src, mem) }
-emit_ldsmin_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsmin_r_r_m(dst, src, mem)) }
+emit_ldsmin_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsmin_r_r_m(dst, src, mem)) }
 inst_ldsmina_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSMINA, dst, src, mem) }
-emit_ldsmina_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsmina_r_r_m(dst, src, mem)) }
+emit_ldsmina_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsmina_r_r_m(dst, src, mem)) }
 inst_ldsminl_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSMINL, dst, src, mem) }
-emit_ldsminl_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsminl_r_r_m(dst, src, mem)) }
+emit_ldsminl_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsminl_r_r_m(dst, src, mem)) }
 inst_ldsminal_r_r_m           :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDSMINAL, dst, src, mem) }
-emit_ldsminal_r_r_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldsminal_r_r_m(dst, src, mem)) }
+emit_ldsminal_r_r_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldsminal_r_r_m(dst, src, mem)) }
 inst_ldumax_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDUMAX, dst, src, mem) }
-emit_ldumax_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldumax_r_r_m(dst, src, mem)) }
+emit_ldumax_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldumax_r_r_m(dst, src, mem)) }
 inst_ldumaxa_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDUMAXA, dst, src, mem) }
-emit_ldumaxa_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldumaxa_r_r_m(dst, src, mem)) }
+emit_ldumaxa_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldumaxa_r_r_m(dst, src, mem)) }
 inst_ldumaxl_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDUMAXL, dst, src, mem) }
-emit_ldumaxl_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldumaxl_r_r_m(dst, src, mem)) }
+emit_ldumaxl_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldumaxl_r_r_m(dst, src, mem)) }
 inst_ldumaxal_r_r_m           :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDUMAXAL, dst, src, mem) }
-emit_ldumaxal_r_r_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldumaxal_r_r_m(dst, src, mem)) }
+emit_ldumaxal_r_r_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldumaxal_r_r_m(dst, src, mem)) }
 inst_ldumin_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDUMIN, dst, src, mem) }
-emit_ldumin_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldumin_r_r_m(dst, src, mem)) }
+emit_ldumin_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldumin_r_r_m(dst, src, mem)) }
 inst_ldumina_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDUMINA, dst, src, mem) }
-emit_ldumina_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_ldumina_r_r_m(dst, src, mem)) }
+emit_ldumina_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_ldumina_r_r_m(dst, src, mem)) }
 inst_lduminl_r_r_m            :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDUMINL, dst, src, mem) }
-emit_lduminl_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_lduminl_r_r_m(dst, src, mem)) }
+emit_lduminl_r_r_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_lduminl_r_r_m(dst, src, mem)) }
 inst_lduminal_r_r_m           :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.LDUMINAL, dst, src, mem) }
-emit_lduminal_r_r_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_lduminal_r_r_m(dst, src, mem)) }
+emit_lduminal_r_r_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_lduminal_r_r_m(dst, src, mem)) }
 inst_swp_r_r_m                :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.SWP, dst, src, mem) }
-emit_swp_r_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_swp_r_r_m(dst, src, mem)) }
+emit_swp_r_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_swp_r_r_m(dst, src, mem)) }
 inst_swpa_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.SWPA, dst, src, mem) }
-emit_swpa_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_swpa_r_r_m(dst, src, mem)) }
+emit_swpa_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_swpa_r_r_m(dst, src, mem)) }
 inst_swpl_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.SWPL, dst, src, mem) }
-emit_swpl_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_swpl_r_r_m(dst, src, mem)) }
+emit_swpl_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_swpl_r_r_m(dst, src, mem)) }
 inst_swpal_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.SWPAL, dst, src, mem) }
-emit_swpal_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_swpal_r_r_m(dst, src, mem)) }
+emit_swpal_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_swpal_r_r_m(dst, src, mem)) }
 inst_cas_r_r_m                :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CAS, dst, src, mem) }
-emit_cas_r_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_cas_r_r_m(dst, src, mem)) }
+emit_cas_r_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_cas_r_r_m(dst, src, mem)) }
 inst_casa_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASA, dst, src, mem) }
-emit_casa_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casa_r_r_m(dst, src, mem)) }
+emit_casa_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casa_r_r_m(dst, src, mem)) }
 inst_casl_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASL, dst, src, mem) }
-emit_casl_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casl_r_r_m(dst, src, mem)) }
+emit_casl_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casl_r_r_m(dst, src, mem)) }
 inst_casal_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASAL, dst, src, mem) }
-emit_casal_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casal_r_r_m(dst, src, mem)) }
+emit_casal_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casal_r_r_m(dst, src, mem)) }
 inst_casb_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASB, dst, src, mem) }
-emit_casb_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casb_r_r_m(dst, src, mem)) }
+emit_casb_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casb_r_r_m(dst, src, mem)) }
 inst_casab_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASAB, dst, src, mem) }
-emit_casab_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casab_r_r_m(dst, src, mem)) }
+emit_casab_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casab_r_r_m(dst, src, mem)) }
 inst_caslb_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASLB, dst, src, mem) }
-emit_caslb_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_caslb_r_r_m(dst, src, mem)) }
+emit_caslb_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_caslb_r_r_m(dst, src, mem)) }
 inst_casalb_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASALB, dst, src, mem) }
-emit_casalb_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casalb_r_r_m(dst, src, mem)) }
+emit_casalb_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casalb_r_r_m(dst, src, mem)) }
 inst_cash_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASH, dst, src, mem) }
-emit_cash_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_cash_r_r_m(dst, src, mem)) }
+emit_cash_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_cash_r_r_m(dst, src, mem)) }
 inst_casah_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASAH, dst, src, mem) }
-emit_casah_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casah_r_r_m(dst, src, mem)) }
+emit_casah_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casah_r_r_m(dst, src, mem)) }
 inst_caslh_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASLH, dst, src, mem) }
-emit_caslh_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_caslh_r_r_m(dst, src, mem)) }
+emit_caslh_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_caslh_r_r_m(dst, src, mem)) }
 inst_casalh_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASALH, dst, src, mem) }
-emit_casalh_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casalh_r_r_m(dst, src, mem)) }
+emit_casalh_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casalh_r_r_m(dst, src, mem)) }
 inst_casp_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASP, dst, src, mem) }
-emit_casp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_casp_r_r_m(dst, src, mem)) }
+emit_casp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_casp_r_r_m(dst, src, mem)) }
 inst_caspa_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASPA, dst, src, mem) }
-emit_caspa_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_caspa_r_r_m(dst, src, mem)) }
+emit_caspa_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_caspa_r_r_m(dst, src, mem)) }
 inst_caspl_r_r_m              :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASPL, dst, src, mem) }
-emit_caspl_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_caspl_r_r_m(dst, src, mem)) }
+emit_caspl_r_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_caspl_r_r_m(dst, src, mem)) }
 inst_caspal_r_r_m             :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.CASPAL, dst, src, mem) }
-emit_caspal_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_caspal_r_r_m(dst, src, mem)) }
+emit_caspal_r_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_caspal_r_r_m(dst, src, mem)) }
 inst_pacia_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.PACIA, dst, src) }
-emit_pacia_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_pacia_r_r(dst, src)) }
+emit_pacia_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_pacia_r_r(dst, src)) }
 inst_pacib_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.PACIB, dst, src) }
-emit_pacib_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_pacib_r_r(dst, src)) }
+emit_pacib_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_pacib_r_r(dst, src)) }
 inst_pacda_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.PACDA, dst, src) }
-emit_pacda_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_pacda_r_r(dst, src)) }
+emit_pacda_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_pacda_r_r(dst, src)) }
 inst_pacdb_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.PACDB, dst, src) }
-emit_pacdb_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_pacdb_r_r(dst, src)) }
+emit_pacdb_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_pacdb_r_r(dst, src)) }
 inst_paciza_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.PACIZA, dst) }
-emit_paciza_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_paciza_r(dst)) }
+emit_paciza_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_paciza_r(dst)) }
 inst_pacizb_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.PACIZB, dst) }
-emit_pacizb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_pacizb_r(dst)) }
+emit_pacizb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_pacizb_r(dst)) }
 inst_pacdza_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.PACDZA, dst) }
-emit_pacdza_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_pacdza_r(dst)) }
+emit_pacdza_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_pacdza_r(dst)) }
 inst_pacdzb_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.PACDZB, dst) }
-emit_pacdzb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_pacdzb_r(dst)) }
+emit_pacdzb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_pacdzb_r(dst)) }
 inst_autia_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.AUTIA, dst, src) }
-emit_autia_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_autia_r_r(dst, src)) }
+emit_autia_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_autia_r_r(dst, src)) }
 inst_autib_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.AUTIB, dst, src) }
-emit_autib_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_autib_r_r(dst, src)) }
+emit_autib_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_autib_r_r(dst, src)) }
 inst_autda_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.AUTDA, dst, src) }
-emit_autda_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_autda_r_r(dst, src)) }
+emit_autda_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_autda_r_r(dst, src)) }
 inst_autdb_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.AUTDB, dst, src) }
-emit_autdb_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_autdb_r_r(dst, src)) }
+emit_autdb_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_autdb_r_r(dst, src)) }
 inst_autiza_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AUTIZA, dst) }
-emit_autiza_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_autiza_r(dst)) }
+emit_autiza_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_autiza_r(dst)) }
 inst_autizb_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AUTIZB, dst) }
-emit_autizb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_autizb_r(dst)) }
+emit_autizb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_autizb_r(dst)) }
 inst_autdza_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AUTDZA, dst) }
-emit_autdza_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_autdza_r(dst)) }
+emit_autdza_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_autdza_r(dst)) }
 inst_autdzb_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AUTDZB, dst) }
-emit_autdzb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_autdzb_r(dst)) }
+emit_autdzb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_autdzb_r(dst)) }
 inst_paciasp_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PACIASP) }
-emit_paciasp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_paciasp_none()) }
+emit_paciasp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_paciasp_none()) }
 inst_pacibsp_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PACIBSP) }
-emit_pacibsp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pacibsp_none()) }
+emit_pacibsp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pacibsp_none()) }
 inst_autiasp_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.AUTIASP) }
-emit_autiasp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_autiasp_none()) }
+emit_autiasp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_autiasp_none()) }
 inst_autibsp_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.AUTIBSP) }
-emit_autibsp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_autibsp_none()) }
+emit_autibsp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_autibsp_none()) }
 inst_pacia1716_none           :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PACIA1716) }
-emit_pacia1716_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pacia1716_none()) }
+emit_pacia1716_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pacia1716_none()) }
 inst_pacib1716_none           :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PACIB1716) }
-emit_pacib1716_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pacib1716_none()) }
+emit_pacib1716_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pacib1716_none()) }
 inst_autia1716_none           :: #force_inline proc "contextless" () -> Instruction { return inst_none(.AUTIA1716) }
-emit_autia1716_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_autia1716_none()) }
+emit_autia1716_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_autia1716_none()) }
 inst_autib1716_none           :: #force_inline proc "contextless" () -> Instruction { return inst_none(.AUTIB1716) }
-emit_autib1716_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_autib1716_none()) }
+emit_autib1716_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_autib1716_none()) }
 inst_pacga_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.PACGA, dst, src, src2) }
-emit_pacga_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_pacga_r_r_r(dst, src, src2)) }
+emit_pacga_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_pacga_r_r_r(dst, src, src2)) }
 inst_xpaci_r                  :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.XPACI, dst) }
-emit_xpaci_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_xpaci_r(dst)) }
+emit_xpaci_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_xpaci_r(dst)) }
 inst_xpacd_r                  :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.XPACD, dst) }
-emit_xpacd_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_xpacd_r(dst)) }
+emit_xpacd_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_xpacd_r(dst)) }
 inst_xpaclri_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.XPACLRI) }
-emit_xpaclri_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xpaclri_none()) }
+emit_xpaclri_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xpaclri_none()) }
 inst_retaa_none               :: #force_inline proc "contextless" () -> Instruction { return inst_none(.RETAA) }
-emit_retaa_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_retaa_none()) }
+emit_retaa_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_retaa_none()) }
 inst_retab_none               :: #force_inline proc "contextless" () -> Instruction { return inst_none(.RETAB) }
-emit_retab_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_retab_none()) }
+emit_retab_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_retab_none()) }
 inst_braa_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.BRAA, dst, src) }
-emit_braa_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_braa_r_r(dst, src)) }
+emit_braa_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_braa_r_r(dst, src)) }
 inst_brab_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.BRAB, dst, src) }
-emit_brab_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_brab_r_r(dst, src)) }
+emit_brab_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_brab_r_r(dst, src)) }
 inst_braaz_r                  :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.BRAAZ, dst) }
-emit_braaz_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_braaz_r(dst)) }
+emit_braaz_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_braaz_r(dst)) }
 inst_brabz_r                  :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.BRABZ, dst) }
-emit_brabz_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_brabz_r(dst)) }
+emit_brabz_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_brabz_r(dst)) }
 inst_blraa_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.BLRAA, dst, src) }
-emit_blraa_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_blraa_r_r(dst, src)) }
+emit_blraa_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_blraa_r_r(dst, src)) }
 inst_blrab_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.BLRAB, dst, src) }
-emit_blrab_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_blrab_r_r(dst, src)) }
+emit_blrab_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_blrab_r_r(dst, src)) }
 inst_blraaz_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.BLRAAZ, dst) }
-emit_blraaz_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_blraaz_r(dst)) }
+emit_blraaz_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_blraaz_r(dst)) }
 inst_blrabz_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.BLRABZ, dst) }
-emit_blrabz_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_blrabz_r(dst)) }
+emit_blrabz_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_blrabz_r(dst)) }
 inst_eretaa_none              :: #force_inline proc "contextless" () -> Instruction { return inst_none(.ERETAA) }
-emit_eretaa_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_eretaa_none()) }
+emit_eretaa_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_eretaa_none()) }
 inst_eretab_none              :: #force_inline proc "contextless" () -> Instruction { return inst_none(.ERETAB) }
-emit_eretab_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_eretab_none()) }
+emit_eretab_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_eretab_none()) }
 inst_bti_none                 :: #force_inline proc "contextless" () -> Instruction { return inst_none(.BTI) }
-emit_bti_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bti_none()) }
+emit_bti_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bti_none()) }
 inst_irg_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.IRG, dst, src, src2) }
-emit_irg_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_irg_r_r_r(dst, src, src2)) }
+emit_irg_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_irg_r_r_r(dst, src, src2)) }
 inst_addg_r_r_i_i             :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .ADDG, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), op_imm(imm2, 1), {}}} }
-emit_addg_r_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_addg_r_r_i_i(dst, src, imm, imm2)) }
+emit_addg_r_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_addg_r_r_i_i(dst, src, imm, imm2)) }
 inst_subg_r_r_i_i             :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SUBG, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), op_imm(imm2, 1), {}}} }
-emit_subg_r_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_subg_r_r_i_i(dst, src, imm, imm2)) }
+emit_subg_r_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_subg_r_r_i_i(dst, src, imm, imm2)) }
 inst_gmi_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.GMI, dst, src, src2) }
-emit_gmi_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_gmi_r_r_r(dst, src, src2)) }
+emit_gmi_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_gmi_r_r_r(dst, src, src2)) }
 inst_subp_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SUBP, dst, src, src2) }
-emit_subp_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subp_r_r_r(dst, src, src2)) }
+emit_subp_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subp_r_r_r(dst, src, src2)) }
 inst_subps_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SUBPS, dst, src, src2) }
-emit_subps_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subps_r_r_r(dst, src, src2)) }
+emit_subps_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subps_r_r_r(dst, src, src2)) }
 inst_ldg_r_m                  :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDG, dst, mem) }
-emit_ldg_r_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldg_r_m(dst, mem)) }
+emit_ldg_r_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldg_r_m(dst, mem)) }
 inst_stg_r_m                  :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STG, dst, mem) }
-emit_stg_r_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stg_r_m(dst, mem)) }
+emit_stg_r_m                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stg_r_m(dst, mem)) }
 inst_st2g_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.ST2G, dst, mem) }
-emit_st2g_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st2g_r_m(dst, mem)) }
+emit_st2g_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st2g_r_m(dst, mem)) }
 inst_stzg_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STZG, dst, mem) }
-emit_stzg_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stzg_r_m(dst, mem)) }
+emit_stzg_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stzg_r_m(dst, mem)) }
 inst_stz2g_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STZ2G, dst, mem) }
-emit_stz2g_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stz2g_r_m(dst, mem)) }
+emit_stz2g_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stz2g_r_m(dst, mem)) }
 inst_stgp_r_r_m               :: #force_inline proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction { return inst_ldp_stp(.STGP, dst, src, mem) }
-emit_stgp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append(instructions, inst_stgp_r_r_m(dst, src, mem)) }
+emit_stgp_r_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) { append_elem(instructions, inst_stgp_r_r_m(dst, src, mem)) }
 inst_ldgm_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDGM, dst, mem) }
-emit_ldgm_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldgm_r_m(dst, mem)) }
+emit_ldgm_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldgm_r_m(dst, mem)) }
 inst_stgm_r_m                 :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STGM, dst, mem) }
-emit_stgm_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stgm_r_m(dst, mem)) }
+emit_stgm_r_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stgm_r_m(dst, mem)) }
 inst_stzgm_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STZGM, dst, mem) }
-emit_stzgm_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stzgm_r_m(dst, mem)) }
+emit_stzgm_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stzgm_r_m(dst, mem)) }
 inst_crc32b_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CRC32B, dst, src, src2) }
-emit_crc32b_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32b_r_r_r(dst, src, src2)) }
+emit_crc32b_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32b_r_r_r(dst, src, src2)) }
 inst_crc32h_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CRC32H, dst, src, src2) }
-emit_crc32h_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32h_r_r_r(dst, src, src2)) }
+emit_crc32h_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32h_r_r_r(dst, src, src2)) }
 inst_crc32w_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CRC32W, dst, src, src2) }
-emit_crc32w_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32w_r_r_r(dst, src, src2)) }
+emit_crc32w_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32w_r_r_r(dst, src, src2)) }
 inst_crc32x_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CRC32X, dst, src, src2) }
-emit_crc32x_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32x_r_r_r(dst, src, src2)) }
+emit_crc32x_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32x_r_r_r(dst, src, src2)) }
 inst_crc32cb_r_r_r            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CRC32CB, dst, src, src2) }
-emit_crc32cb_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32cb_r_r_r(dst, src, src2)) }
+emit_crc32cb_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32cb_r_r_r(dst, src, src2)) }
 inst_crc32ch_r_r_r            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CRC32CH, dst, src, src2) }
-emit_crc32ch_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32ch_r_r_r(dst, src, src2)) }
+emit_crc32ch_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32ch_r_r_r(dst, src, src2)) }
 inst_crc32cw_r_r_r            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CRC32CW, dst, src, src2) }
-emit_crc32cw_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32cw_r_r_r(dst, src, src2)) }
+emit_crc32cw_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32cw_r_r_r(dst, src, src2)) }
 inst_crc32cx_r_r_r            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CRC32CX, dst, src, src2) }
-emit_crc32cx_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crc32cx_r_r_r(dst, src, src2)) }
+emit_crc32cx_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crc32cx_r_r_r(dst, src, src2)) }
 inst_aese_v16b_v16b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AESE, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_aese_zb_zb_zb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .AESE, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
-emit_aese_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_aese_v16b_v16b(dst, src)) }
-emit_aese_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_aese_zb_zb_zb(rz, rz2, rz3)) }
+emit_aese_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_aese_v16b_v16b(dst, src)) }
+emit_aese_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_aese_zb_zb_zb(rz, rz2, rz3)) }
 inst_aesd_v16b_v16b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AESD, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_aesd_zb_zb_zb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .AESD, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
-emit_aesd_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_aesd_v16b_v16b(dst, src)) }
-emit_aesd_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_aesd_zb_zb_zb(rz, rz2, rz3)) }
+emit_aesd_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_aesd_v16b_v16b(dst, src)) }
+emit_aesd_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_aesd_zb_zb_zb(rz, rz2, rz3)) }
 inst_aesmc_v16b_v16b          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AESMC, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_aesmc_zb_zb              :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .AESMC, operand_count = 2, length = 4, ops = {op_z_b(rz), op_z_b(rz2), {}, {}, {}}} }
-emit_aesmc_v16b_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_aesmc_v16b_v16b(dst, src)) }
-emit_aesmc_zb_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_aesmc_zb_zb(rz, rz2)) }
+emit_aesmc_v16b_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_aesmc_v16b_v16b(dst, src)) }
+emit_aesmc_zb_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_aesmc_zb_zb(rz, rz2)) }
 inst_aesimc_v16b_v16b         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .AESIMC, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_aesimc_zb_zb             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .AESIMC, operand_count = 2, length = 4, ops = {op_z_b(rz), op_z_b(rz2), {}, {}, {}}} }
-emit_aesimc_v16b_v16b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_aesimc_v16b_v16b(dst, src)) }
-emit_aesimc_zb_zb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_aesimc_zb_zb(rz, rz2)) }
+emit_aesimc_v16b_v16b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_aesimc_v16b_v16b(dst, src)) }
+emit_aesimc_zb_zb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_aesimc_zb_zb(rz, rz2)) }
 inst_sha1h_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.SHA1H, dst, src) }
-emit_sha1h_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sha1h_r_r(dst, src)) }
+emit_sha1h_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sha1h_r_r(dst, src)) }
 inst_sha1c_r_r_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA1C, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_v_4s(src2), {}, {}}} }
-emit_sha1c_r_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha1c_r_r_v4s(dst, src, src2)) }
+emit_sha1c_r_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha1c_r_r_v4s(dst, src, src2)) }
 inst_sha1p_r_r_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA1P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_v_4s(src2), {}, {}}} }
-emit_sha1p_r_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha1p_r_r_v4s(dst, src, src2)) }
+emit_sha1p_r_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha1p_r_r_v4s(dst, src, src2)) }
 inst_sha1m_r_r_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA1M, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_v_4s(src2), {}, {}}} }
-emit_sha1m_r_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha1m_r_r_v4s(dst, src, src2)) }
+emit_sha1m_r_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha1m_r_r_v4s(dst, src, src2)) }
 inst_sha1su0_v4s_v4s_v4s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA1SU0, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sha1su0_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha1su0_v4s_v4s_v4s(dst, src, src2)) }
+emit_sha1su0_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha1su0_v4s_v4s_v4s(dst, src, src2)) }
 inst_sha1su1_v4s_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SHA1SU1, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
-emit_sha1su1_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sha1su1_v4s_v4s(dst, src)) }
+emit_sha1su1_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sha1su1_v4s_v4s(dst, src)) }
 inst_sha256h_r_r_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA256H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_v_4s(src2), {}, {}}} }
-emit_sha256h_r_r_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha256h_r_r_v4s(dst, src, src2)) }
+emit_sha256h_r_r_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha256h_r_r_v4s(dst, src, src2)) }
 inst_sha256h2_r_r_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA256H2, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_v_4s(src2), {}, {}}} }
-emit_sha256h2_r_r_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha256h2_r_r_v4s(dst, src, src2)) }
+emit_sha256h2_r_r_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha256h2_r_r_v4s(dst, src, src2)) }
 inst_sha256su0_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SHA256SU0, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
-emit_sha256su0_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sha256su0_v4s_v4s(dst, src)) }
+emit_sha256su0_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sha256su0_v4s_v4s(dst, src)) }
 inst_sha256su1_v4s_v4s_v4s    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA256SU1, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sha256su1_v4s_v4s_v4s    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha256su1_v4s_v4s_v4s(dst, src, src2)) }
+emit_sha256su1_v4s_v4s_v4s    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha256su1_v4s_v4s_v4s(dst, src, src2)) }
 inst_sha512h_r_r_v2d          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA512H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_v_2d(src2), {}, {}}} }
-emit_sha512h_r_r_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha512h_r_r_v2d(dst, src, src2)) }
+emit_sha512h_r_r_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha512h_r_r_v2d(dst, src, src2)) }
 inst_sha512h2_r_r_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA512H2, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_v_2d(src2), {}, {}}} }
-emit_sha512h2_r_r_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha512h2_r_r_v2d(dst, src, src2)) }
+emit_sha512h2_r_r_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha512h2_r_r_v2d(dst, src, src2)) }
 inst_sha512su0_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SHA512SU0, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
-emit_sha512su0_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sha512su0_v2d_v2d(dst, src)) }
+emit_sha512su0_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sha512su0_v2d_v2d(dst, src)) }
 inst_sha512su1_v2d_v2d_v2d    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHA512SU1, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_sha512su1_v2d_v2d_v2d    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sha512su1_v2d_v2d_v2d(dst, src, src2)) }
+emit_sha512su1_v2d_v2d_v2d    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sha512su1_v2d_v2d_v2d(dst, src, src2)) }
 inst_eor3_v16b_v16b_v16b_v16b :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .EOR3, operand_count = 4, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), op_v_16b(src3), {}}} }
 inst_eor3_zd_zd_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .EOR3, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_eor3_v16b_v16b_v16b_v16b :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_eor3_v16b_v16b_v16b_v16b(dst, src, src2, src3)) }
-emit_eor3_zd_zd_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_eor3_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
+emit_eor3_v16b_v16b_v16b_v16b :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_eor3_v16b_v16b_v16b_v16b(dst, src, src2, src3)) }
+emit_eor3_zd_zd_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_eor3_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
 inst_bcax_v16b_v16b_v16b_v16b :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .BCAX, operand_count = 4, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), op_v_16b(src3), {}}} }
 inst_bcax_zd_zd_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BCAX, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_bcax_v16b_v16b_v16b_v16b :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_bcax_v16b_v16b_v16b_v16b(dst, src, src2, src3)) }
-emit_bcax_zd_zd_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bcax_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
+emit_bcax_v16b_v16b_v16b_v16b :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_bcax_v16b_v16b_v16b_v16b(dst, src, src2, src3)) }
+emit_bcax_zd_zd_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bcax_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
 inst_rax1_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RAX1, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_rax1_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rax1_v2d_v2d_v2d(dst, src, src2)) }
+emit_rax1_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rax1_v2d_v2d_v2d(dst, src, src2)) }
 inst_xar_v2d_v2d_v2d_i        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XAR, operand_count = 4, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), op_imm(imm, 1), {}}} }
 inst_xar_zd_zd_zd_i           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .XAR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_imm(imm, 4), {}}} }
 inst_xar_zs_zs_zs_i           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .XAR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), op_imm(imm, 4), {}}} }
 inst_xar_zh_zh_zh_i           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .XAR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), op_imm(imm, 4), {}}} }
 inst_xar_zb_zb_zb_i           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .XAR, operand_count = 4, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), op_imm(imm, 4), {}}} }
-emit_xar_v2d_v2d_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_xar_v2d_v2d_v2d_i(dst, src, src2, imm)) }
-emit_xar_zd_zd_zd_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_xar_zd_zd_zd_i(rz, rz2, rz3, imm)) }
-emit_xar_zs_zs_zs_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_xar_zs_zs_zs_i(rz, rz2, rz3, imm)) }
-emit_xar_zh_zh_zh_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_xar_zh_zh_zh_i(rz, rz2, rz3, imm)) }
-emit_xar_zb_zb_zb_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_xar_zb_zb_zb_i(rz, rz2, rz3, imm)) }
+emit_xar_v2d_v2d_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_xar_v2d_v2d_v2d_i(dst, src, src2, imm)) }
+emit_xar_zd_zd_zd_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_xar_zd_zd_zd_i(rz, rz2, rz3, imm)) }
+emit_xar_zs_zs_zs_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_xar_zs_zs_zs_i(rz, rz2, rz3, imm)) }
+emit_xar_zh_zh_zh_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_xar_zh_zh_zh_i(rz, rz2, rz3, imm)) }
+emit_xar_zb_zb_zb_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_xar_zb_zb_zb_i(rz, rz2, rz3, imm)) }
 inst_sm3partw1_v4s_v4s_v4s    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SM3PARTW1, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sm3partw1_v4s_v4s_v4s    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sm3partw1_v4s_v4s_v4s(dst, src, src2)) }
+emit_sm3partw1_v4s_v4s_v4s    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sm3partw1_v4s_v4s_v4s(dst, src, src2)) }
 inst_sm3partw2_v4s_v4s_v4s    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SM3PARTW2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sm3partw2_v4s_v4s_v4s    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sm3partw2_v4s_v4s_v4s(dst, src, src2)) }
+emit_sm3partw2_v4s_v4s_v4s    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sm3partw2_v4s_v4s_v4s(dst, src, src2)) }
 inst_sm3ss1_v4s_v4s_v4s_v4s   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .SM3SS1, operand_count = 4, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), op_v_4s(src3), {}}} }
-emit_sm3ss1_v4s_v4s_v4s_v4s   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_sm3ss1_v4s_v4s_v4s_v4s(dst, src, src2, src3)) }
+emit_sm3ss1_v4s_v4s_v4s_v4s   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_sm3ss1_v4s_v4s_v4s_v4s(dst, src, src2, src3)) }
 inst_sm3tt1a_v4s_v4s_ves_i    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SM3TT1A, operand_count = 4, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_elem_s(src2), op_lane_index(imm), {}}} }
-emit_sm3tt1a_v4s_v4s_ves_i    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_sm3tt1a_v4s_v4s_ves_i(dst, src, src2, imm)) }
+emit_sm3tt1a_v4s_v4s_ves_i    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_sm3tt1a_v4s_v4s_ves_i(dst, src, src2, imm)) }
 inst_sm3tt1b_v4s_v4s_ves_i    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SM3TT1B, operand_count = 4, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_elem_s(src2), op_lane_index(imm), {}}} }
-emit_sm3tt1b_v4s_v4s_ves_i    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_sm3tt1b_v4s_v4s_ves_i(dst, src, src2, imm)) }
+emit_sm3tt1b_v4s_v4s_ves_i    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_sm3tt1b_v4s_v4s_ves_i(dst, src, src2, imm)) }
 inst_sm3tt2a_v4s_v4s_ves_i    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SM3TT2A, operand_count = 4, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_elem_s(src2), op_lane_index(imm), {}}} }
-emit_sm3tt2a_v4s_v4s_ves_i    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_sm3tt2a_v4s_v4s_ves_i(dst, src, src2, imm)) }
+emit_sm3tt2a_v4s_v4s_ves_i    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_sm3tt2a_v4s_v4s_ves_i(dst, src, src2, imm)) }
 inst_sm3tt2b_v4s_v4s_ves_i    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SM3TT2B, operand_count = 4, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_elem_s(src2), op_lane_index(imm), {}}} }
-emit_sm3tt2b_v4s_v4s_ves_i    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_sm3tt2b_v4s_v4s_ves_i(dst, src, src2, imm)) }
+emit_sm3tt2b_v4s_v4s_ves_i    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_sm3tt2b_v4s_v4s_ves_i(dst, src, src2, imm)) }
 inst_sm4e_v4s_v4s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SM4E, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
-emit_sm4e_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sm4e_v4s_v4s(dst, src)) }
+emit_sm4e_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sm4e_v4s_v4s(dst, src)) }
 inst_sm4ekey_v4s_v4s_v4s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SM4EKEY, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sm4ekey_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sm4ekey_v4s_v4s_v4s(dst, src, src2)) }
+emit_sm4ekey_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sm4ekey_v4s_v4s_v4s(dst, src, src2)) }
 inst_pmull_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PMULL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_pmull_v1q_v1d_v1d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PMULL, operand_count = 3, length = 4, ops = {op_v_1q(dst), op_v_1d(src), op_v_1d(src2), {}, {}}} }
-emit_pmull_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_pmull_v8h_v8b_v8b(dst, src, src2)) }
-emit_pmull_v1q_v1d_v1d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_pmull_v1q_v1d_v1d(dst, src, src2)) }
+emit_pmull_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_pmull_v8h_v8b_v8b(dst, src, src2)) }
+emit_pmull_v1q_v1d_v1d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_pmull_v1q_v1d_v1d(dst, src, src2)) }
 inst_pmull2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PMULL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_pmull2_v1q_v2d_v2d       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PMULL2, operand_count = 3, length = 4, ops = {op_v_1q(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_pmull2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_pmull2_v8h_v16b_v16b(dst, src, src2)) }
-emit_pmull2_v1q_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_pmull2_v1q_v2d_v2d(dst, src, src2)) }
+emit_pmull2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_pmull2_v8h_v16b_v16b(dst, src, src2)) }
+emit_pmull2_v1q_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_pmull2_v1q_v2d_v2d(dst, src, src2)) }
 inst_bfcvt_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.BFCVT, dst, src) }
 inst_bfcvt_zh_p_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BFCVT, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
-emit_bfcvt_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_bfcvt_r_r(dst, src)) }
-emit_bfcvt_zh_p_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_bfcvt_zh_p_zs(rz, rz2, rz3)) }
+emit_bfcvt_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_bfcvt_r_r(dst, src)) }
+emit_bfcvt_zh_p_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_bfcvt_zh_p_zs(rz, rz2, rz3)) }
 inst_bfdot_v4s_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BFDOT, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_bfdot_v4s_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bfdot_v4s_v8h_v8h(dst, src, src2)) }
+emit_bfdot_v4s_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bfdot_v4s_v8h_v8h(dst, src, src2)) }
 inst_bfmmla_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BFMMLA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_bfmmla_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bfmmla_v4s_v8h_v8h(dst, src, src2)) }
+emit_bfmmla_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bfmmla_v4s_v8h_v8h(dst, src, src2)) }
 inst_bfmlalb_v4s_v8h_v8h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BFMLALB, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_bfmlalb_v4s_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bfmlalb_v4s_v8h_v8h(dst, src, src2)) }
+emit_bfmlalb_v4s_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bfmlalb_v4s_v8h_v8h(dst, src, src2)) }
 inst_bfmlalt_v4s_v8h_v8h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BFMLALT, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_bfmlalt_v4s_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bfmlalt_v4s_v8h_v8h(dst, src, src2)) }
+emit_bfmlalt_v4s_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bfmlalt_v4s_v8h_v8h(dst, src, src2)) }
 inst_bfcvtn_v4h_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .BFCVTN, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4s(src), {}, {}, {}}} }
-emit_bfcvtn_v4h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_bfcvtn_v4h_v4s(dst, src)) }
+emit_bfcvtn_v4h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_bfcvtn_v4h_v4s(dst, src)) }
 inst_bfcvtn2_v8h_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .BFCVTN2, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_4s(src), {}, {}, {}}} }
-emit_bfcvtn2_v8h_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_bfcvtn2_v8h_v4s(dst, src)) }
+emit_bfcvtn2_v8h_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_bfcvtn2_v8h_v4s(dst, src)) }
 inst_mul_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_mul_v8h_v8h_v8h          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_mul_v4s_v4s_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
@@ -1430,37 +1434,37 @@ inst_mul_zb_p_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_mul_zh_p_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_mul_zs_p_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_mul_zd_p_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_mul_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mul_v16b_v16b_v16b(dst, src, src2)) }
-emit_mul_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mul_v8h_v8h_v8h(dst, src, src2)) }
-emit_mul_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mul_v4s_v4s_v4s(dst, src, src2)) }
-emit_mul_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_mul_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_mul_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_mul_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_mul_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_mul_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_mul_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_mul_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_mul_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mul_v16b_v16b_v16b(dst, src, src2)) }
+emit_mul_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mul_v8h_v8h_v8h(dst, src, src2)) }
+emit_mul_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mul_v4s_v4s_v4s(dst, src, src2)) }
+emit_mul_zb_p_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_mul_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_mul_zh_p_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_mul_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_mul_zs_p_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_mul_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_mul_zd_p_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_mul_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_mla_v8b_v8b_v8b          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLA, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_mla_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLA, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_mla_v4h_v4h_v4h          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLA, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_mla_v8h_v8h_v8h          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLA, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_mla_v2s_v2s_v2s          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLA, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_mla_v4s_v4s_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_mla_v8b_v8b_v8b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mla_v8b_v8b_v8b(dst, src, src2)) }
-emit_mla_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mla_v16b_v16b_v16b(dst, src, src2)) }
-emit_mla_v4h_v4h_v4h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mla_v4h_v4h_v4h(dst, src, src2)) }
-emit_mla_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mla_v8h_v8h_v8h(dst, src, src2)) }
-emit_mla_v2s_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mla_v2s_v2s_v2s(dst, src, src2)) }
-emit_mla_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mla_v4s_v4s_v4s(dst, src, src2)) }
+emit_mla_v8b_v8b_v8b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mla_v8b_v8b_v8b(dst, src, src2)) }
+emit_mla_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mla_v16b_v16b_v16b(dst, src, src2)) }
+emit_mla_v4h_v4h_v4h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mla_v4h_v4h_v4h(dst, src, src2)) }
+emit_mla_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mla_v8h_v8h_v8h(dst, src, src2)) }
+emit_mla_v2s_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mla_v2s_v2s_v2s(dst, src, src2)) }
+emit_mla_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mla_v4s_v4s_v4s(dst, src, src2)) }
 inst_mls_v8b_v8b_v8b          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLS, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_mls_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLS, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_mls_v4h_v4h_v4h          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLS, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_mls_v8h_v8h_v8h          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLS, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_mls_v2s_v2s_v2s          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLS, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_mls_v4s_v4s_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MLS, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_mls_v8b_v8b_v8b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mls_v8b_v8b_v8b(dst, src, src2)) }
-emit_mls_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mls_v16b_v16b_v16b(dst, src, src2)) }
-emit_mls_v4h_v4h_v4h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mls_v4h_v4h_v4h(dst, src, src2)) }
-emit_mls_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mls_v8h_v8h_v8h(dst, src, src2)) }
-emit_mls_v2s_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mls_v2s_v2s_v2s(dst, src, src2)) }
-emit_mls_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mls_v4s_v4s_v4s(dst, src, src2)) }
+emit_mls_v8b_v8b_v8b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mls_v8b_v8b_v8b(dst, src, src2)) }
+emit_mls_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mls_v16b_v16b_v16b(dst, src, src2)) }
+emit_mls_v4h_v4h_v4h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mls_v4h_v4h_v4h(dst, src, src2)) }
+emit_mls_v8h_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mls_v8h_v8h_v8h(dst, src, src2)) }
+emit_mls_v2s_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mls_v2s_v2s_v2s(dst, src, src2)) }
+emit_mls_v4s_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mls_v4s_v4s_v4s(dst, src, src2)) }
 inst_neg_v8b_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NEG, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_neg_v16b_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NEG, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_neg_v4h_v4h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NEG, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
@@ -1473,18 +1477,18 @@ inst_neg_zh_p_zh              :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_neg_zs_p_zs              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .NEG, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_neg_zd_p_zd              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .NEG, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
 inst_neg_r_sh                 :: #force_inline proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction { return Instruction{mnemonic = .NEG, operand_count = 2, length = 4, ops = {op_reg(dst), op_shifted(src, src_shift, src_amount), {}, {}, {}}} }
-emit_neg_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_v8b_v8b(dst, src)) }
-emit_neg_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_v16b_v16b(dst, src)) }
-emit_neg_v4h_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_v4h_v4h(dst, src)) }
-emit_neg_v8h_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_v8h_v8h(dst, src)) }
-emit_neg_v2s_v2s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_v2s_v2s(dst, src)) }
-emit_neg_v4s_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_v4s_v4s(dst, src)) }
-emit_neg_v2d_v2d              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_v2d_v2d(dst, src)) }
-emit_neg_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_neg_zb_p_zb(rz, rz2, rz3)) }
-emit_neg_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_neg_zh_p_zh(rz, rz2, rz3)) }
-emit_neg_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_neg_zs_p_zs(rz, rz2, rz3)) }
-emit_neg_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_neg_zd_p_zd(rz, rz2, rz3)) }
-emit_neg_r_sh                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append(instructions, inst_neg_r_sh(dst, src, src_shift, src_amount)) }
+emit_neg_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_v8b_v8b(dst, src)) }
+emit_neg_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_v16b_v16b(dst, src)) }
+emit_neg_v4h_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_v4h_v4h(dst, src)) }
+emit_neg_v8h_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_v8h_v8h(dst, src)) }
+emit_neg_v2s_v2s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_v2s_v2s(dst, src)) }
+emit_neg_v4s_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_v4s_v4s(dst, src)) }
+emit_neg_v2d_v2d              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_v2d_v2d(dst, src)) }
+emit_neg_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_neg_zb_p_zb(rz, rz2, rz3)) }
+emit_neg_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_neg_zh_p_zh(rz, rz2, rz3)) }
+emit_neg_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_neg_zs_p_zs(rz, rz2, rz3)) }
+emit_neg_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_neg_zd_p_zd(rz, rz2, rz3)) }
+emit_neg_r_sh                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append_elem(instructions, inst_neg_r_sh(dst, src, src_shift, src_amount)) }
 inst_abs_v8b_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ABS, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_abs_v16b_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ABS, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_abs_v4h_v4h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ABS, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
@@ -1496,89 +1500,89 @@ inst_abs_zb_p_zb              :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_abs_zh_p_zh              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ABS, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_abs_zs_p_zs              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ABS, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_abs_zd_p_zd              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ABS, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_abs_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_abs_v8b_v8b(dst, src)) }
-emit_abs_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_abs_v16b_v16b(dst, src)) }
-emit_abs_v4h_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_abs_v4h_v4h(dst, src)) }
-emit_abs_v8h_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_abs_v8h_v8h(dst, src)) }
-emit_abs_v2s_v2s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_abs_v2s_v2s(dst, src)) }
-emit_abs_v4s_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_abs_v4s_v4s(dst, src)) }
-emit_abs_v2d_v2d              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_abs_v2d_v2d(dst, src)) }
-emit_abs_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_abs_zb_p_zb(rz, rz2, rz3)) }
-emit_abs_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_abs_zh_p_zh(rz, rz2, rz3)) }
-emit_abs_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_abs_zs_p_zs(rz, rz2, rz3)) }
-emit_abs_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_abs_zd_p_zd(rz, rz2, rz3)) }
+emit_abs_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_abs_v8b_v8b(dst, src)) }
+emit_abs_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_abs_v16b_v16b(dst, src)) }
+emit_abs_v4h_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_abs_v4h_v4h(dst, src)) }
+emit_abs_v8h_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_abs_v8h_v8h(dst, src)) }
+emit_abs_v2s_v2s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_abs_v2s_v2s(dst, src)) }
+emit_abs_v4s_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_abs_v4s_v4s(dst, src)) }
+emit_abs_v2d_v2d              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_abs_v2d_v2d(dst, src)) }
+emit_abs_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_abs_zb_p_zb(rz, rz2, rz3)) }
+emit_abs_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_abs_zh_p_zh(rz, rz2, rz3)) }
+emit_abs_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_abs_zs_p_zs(rz, rz2, rz3)) }
+emit_abs_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_abs_zd_p_zd(rz, rz2, rz3)) }
 inst_shadd_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHADD, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_shadd_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHADD, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_shadd_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHADD, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_shadd_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHADD, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_shadd_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHADD, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_shadd_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHADD, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_shadd_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shadd_v8b_v8b_v8b(dst, src, src2)) }
-emit_shadd_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shadd_v16b_v16b_v16b(dst, src, src2)) }
-emit_shadd_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shadd_v4h_v4h_v4h(dst, src, src2)) }
-emit_shadd_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shadd_v8h_v8h_v8h(dst, src, src2)) }
-emit_shadd_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shadd_v2s_v2s_v2s(dst, src, src2)) }
-emit_shadd_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shadd_v4s_v4s_v4s(dst, src, src2)) }
+emit_shadd_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shadd_v8b_v8b_v8b(dst, src, src2)) }
+emit_shadd_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shadd_v16b_v16b_v16b(dst, src, src2)) }
+emit_shadd_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shadd_v4h_v4h_v4h(dst, src, src2)) }
+emit_shadd_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shadd_v8h_v8h_v8h(dst, src, src2)) }
+emit_shadd_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shadd_v2s_v2s_v2s(dst, src, src2)) }
+emit_shadd_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shadd_v4s_v4s_v4s(dst, src, src2)) }
 inst_uhadd_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHADD, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uhadd_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHADD, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uhadd_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHADD, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_uhadd_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHADD, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_uhadd_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHADD, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_uhadd_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHADD, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_uhadd_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhadd_v8b_v8b_v8b(dst, src, src2)) }
-emit_uhadd_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhadd_v16b_v16b_v16b(dst, src, src2)) }
-emit_uhadd_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhadd_v4h_v4h_v4h(dst, src, src2)) }
-emit_uhadd_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhadd_v8h_v8h_v8h(dst, src, src2)) }
-emit_uhadd_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhadd_v2s_v2s_v2s(dst, src, src2)) }
-emit_uhadd_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhadd_v4s_v4s_v4s(dst, src, src2)) }
+emit_uhadd_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhadd_v8b_v8b_v8b(dst, src, src2)) }
+emit_uhadd_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhadd_v16b_v16b_v16b(dst, src, src2)) }
+emit_uhadd_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhadd_v4h_v4h_v4h(dst, src, src2)) }
+emit_uhadd_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhadd_v8h_v8h_v8h(dst, src, src2)) }
+emit_uhadd_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhadd_v2s_v2s_v2s(dst, src, src2)) }
+emit_uhadd_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhadd_v4s_v4s_v4s(dst, src, src2)) }
 inst_shsub_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSUB, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_shsub_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSUB, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_shsub_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSUB, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_shsub_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSUB, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_shsub_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSUB, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_shsub_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SHSUB, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_shsub_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsub_v8b_v8b_v8b(dst, src, src2)) }
-emit_shsub_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsub_v16b_v16b_v16b(dst, src, src2)) }
-emit_shsub_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsub_v4h_v4h_v4h(dst, src, src2)) }
-emit_shsub_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsub_v8h_v8h_v8h(dst, src, src2)) }
-emit_shsub_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsub_v2s_v2s_v2s(dst, src, src2)) }
-emit_shsub_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_shsub_v4s_v4s_v4s(dst, src, src2)) }
+emit_shsub_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsub_v8b_v8b_v8b(dst, src, src2)) }
+emit_shsub_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsub_v16b_v16b_v16b(dst, src, src2)) }
+emit_shsub_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsub_v4h_v4h_v4h(dst, src, src2)) }
+emit_shsub_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsub_v8h_v8h_v8h(dst, src, src2)) }
+emit_shsub_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsub_v2s_v2s_v2s(dst, src, src2)) }
+emit_shsub_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_shsub_v4s_v4s_v4s(dst, src, src2)) }
 inst_uhsub_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSUB, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uhsub_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSUB, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uhsub_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSUB, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_uhsub_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSUB, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_uhsub_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSUB, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_uhsub_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UHSUB, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_uhsub_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsub_v8b_v8b_v8b(dst, src, src2)) }
-emit_uhsub_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsub_v16b_v16b_v16b(dst, src, src2)) }
-emit_uhsub_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsub_v4h_v4h_v4h(dst, src, src2)) }
-emit_uhsub_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsub_v8h_v8h_v8h(dst, src, src2)) }
-emit_uhsub_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsub_v2s_v2s_v2s(dst, src, src2)) }
-emit_uhsub_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uhsub_v4s_v4s_v4s(dst, src, src2)) }
+emit_uhsub_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsub_v8b_v8b_v8b(dst, src, src2)) }
+emit_uhsub_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsub_v16b_v16b_v16b(dst, src, src2)) }
+emit_uhsub_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsub_v4h_v4h_v4h(dst, src, src2)) }
+emit_uhsub_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsub_v8h_v8h_v8h(dst, src, src2)) }
+emit_uhsub_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsub_v2s_v2s_v2s(dst, src, src2)) }
+emit_uhsub_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uhsub_v4s_v4s_v4s(dst, src, src2)) }
 inst_srhadd_v8b_v8b_v8b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRHADD, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_srhadd_v16b_v16b_v16b    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRHADD, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_srhadd_v4h_v4h_v4h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRHADD, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_srhadd_v8h_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRHADD, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_srhadd_v2s_v2s_v2s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRHADD, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_srhadd_v4s_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRHADD, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_srhadd_v8b_v8b_v8b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srhadd_v8b_v8b_v8b(dst, src, src2)) }
-emit_srhadd_v16b_v16b_v16b    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srhadd_v16b_v16b_v16b(dst, src, src2)) }
-emit_srhadd_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srhadd_v4h_v4h_v4h(dst, src, src2)) }
-emit_srhadd_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srhadd_v8h_v8h_v8h(dst, src, src2)) }
-emit_srhadd_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srhadd_v2s_v2s_v2s(dst, src, src2)) }
-emit_srhadd_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srhadd_v4s_v4s_v4s(dst, src, src2)) }
+emit_srhadd_v8b_v8b_v8b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srhadd_v8b_v8b_v8b(dst, src, src2)) }
+emit_srhadd_v16b_v16b_v16b    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srhadd_v16b_v16b_v16b(dst, src, src2)) }
+emit_srhadd_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srhadd_v4h_v4h_v4h(dst, src, src2)) }
+emit_srhadd_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srhadd_v8h_v8h_v8h(dst, src, src2)) }
+emit_srhadd_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srhadd_v2s_v2s_v2s(dst, src, src2)) }
+emit_srhadd_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srhadd_v4s_v4s_v4s(dst, src, src2)) }
 inst_urhadd_v8b_v8b_v8b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URHADD, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_urhadd_v16b_v16b_v16b    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URHADD, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_urhadd_v4h_v4h_v4h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URHADD, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_urhadd_v8h_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URHADD, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_urhadd_v2s_v2s_v2s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URHADD, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_urhadd_v4s_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URHADD, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_urhadd_v8b_v8b_v8b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urhadd_v8b_v8b_v8b(dst, src, src2)) }
-emit_urhadd_v16b_v16b_v16b    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urhadd_v16b_v16b_v16b(dst, src, src2)) }
-emit_urhadd_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urhadd_v4h_v4h_v4h(dst, src, src2)) }
-emit_urhadd_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urhadd_v8h_v8h_v8h(dst, src, src2)) }
-emit_urhadd_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urhadd_v2s_v2s_v2s(dst, src, src2)) }
-emit_urhadd_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urhadd_v4s_v4s_v4s(dst, src, src2)) }
+emit_urhadd_v8b_v8b_v8b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urhadd_v8b_v8b_v8b(dst, src, src2)) }
+emit_urhadd_v16b_v16b_v16b    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urhadd_v16b_v16b_v16b(dst, src, src2)) }
+emit_urhadd_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urhadd_v4h_v4h_v4h(dst, src, src2)) }
+emit_urhadd_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urhadd_v8h_v8h_v8h(dst, src, src2)) }
+emit_urhadd_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urhadd_v2s_v2s_v2s(dst, src, src2)) }
+emit_urhadd_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urhadd_v4s_v4s_v4s(dst, src, src2)) }
 inst_sqadd_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQADD, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_sqadd_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQADD, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_sqadd_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQADD, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1590,17 +1594,17 @@ inst_sqadd_zb_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_sqadd_zh_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQADD, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_sqadd_zs_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQADD, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_sqadd_zd_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQADD, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_sqadd_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqadd_v8b_v8b_v8b(dst, src, src2)) }
-emit_sqadd_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqadd_v16b_v16b_v16b(dst, src, src2)) }
-emit_sqadd_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqadd_v4h_v4h_v4h(dst, src, src2)) }
-emit_sqadd_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqadd_v8h_v8h_v8h(dst, src, src2)) }
-emit_sqadd_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqadd_v2s_v2s_v2s(dst, src, src2)) }
-emit_sqadd_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqadd_v4s_v4s_v4s(dst, src, src2)) }
-emit_sqadd_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqadd_v2d_v2d_v2d(dst, src, src2)) }
-emit_sqadd_zb_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqadd_zb_zb_zb(rz, rz2, rz3)) }
-emit_sqadd_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqadd_zh_zh_zh(rz, rz2, rz3)) }
-emit_sqadd_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqadd_zs_zs_zs(rz, rz2, rz3)) }
-emit_sqadd_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqadd_zd_zd_zd(rz, rz2, rz3)) }
+emit_sqadd_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqadd_v8b_v8b_v8b(dst, src, src2)) }
+emit_sqadd_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqadd_v16b_v16b_v16b(dst, src, src2)) }
+emit_sqadd_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqadd_v4h_v4h_v4h(dst, src, src2)) }
+emit_sqadd_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqadd_v8h_v8h_v8h(dst, src, src2)) }
+emit_sqadd_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqadd_v2s_v2s_v2s(dst, src, src2)) }
+emit_sqadd_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqadd_v4s_v4s_v4s(dst, src, src2)) }
+emit_sqadd_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqadd_v2d_v2d_v2d(dst, src, src2)) }
+emit_sqadd_zb_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqadd_zb_zb_zb(rz, rz2, rz3)) }
+emit_sqadd_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqadd_zh_zh_zh(rz, rz2, rz3)) }
+emit_sqadd_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqadd_zs_zs_zs(rz, rz2, rz3)) }
+emit_sqadd_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqadd_zd_zd_zd(rz, rz2, rz3)) }
 inst_uqadd_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQADD, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uqadd_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQADD, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uqadd_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQADD, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1612,17 +1616,17 @@ inst_uqadd_zb_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_uqadd_zh_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UQADD, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_uqadd_zs_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UQADD, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_uqadd_zd_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UQADD, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_uqadd_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd_v8b_v8b_v8b(dst, src, src2)) }
-emit_uqadd_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd_v16b_v16b_v16b(dst, src, src2)) }
-emit_uqadd_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd_v4h_v4h_v4h(dst, src, src2)) }
-emit_uqadd_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd_v8h_v8h_v8h(dst, src, src2)) }
-emit_uqadd_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd_v2s_v2s_v2s(dst, src, src2)) }
-emit_uqadd_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd_v4s_v4s_v4s(dst, src, src2)) }
-emit_uqadd_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqadd_v2d_v2d_v2d(dst, src, src2)) }
-emit_uqadd_zb_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uqadd_zb_zb_zb(rz, rz2, rz3)) }
-emit_uqadd_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uqadd_zh_zh_zh(rz, rz2, rz3)) }
-emit_uqadd_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uqadd_zs_zs_zs(rz, rz2, rz3)) }
-emit_uqadd_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uqadd_zd_zd_zd(rz, rz2, rz3)) }
+emit_uqadd_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd_v8b_v8b_v8b(dst, src, src2)) }
+emit_uqadd_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd_v16b_v16b_v16b(dst, src, src2)) }
+emit_uqadd_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd_v4h_v4h_v4h(dst, src, src2)) }
+emit_uqadd_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd_v8h_v8h_v8h(dst, src, src2)) }
+emit_uqadd_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd_v2s_v2s_v2s(dst, src, src2)) }
+emit_uqadd_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd_v4s_v4s_v4s(dst, src, src2)) }
+emit_uqadd_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqadd_v2d_v2d_v2d(dst, src, src2)) }
+emit_uqadd_zb_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uqadd_zb_zb_zb(rz, rz2, rz3)) }
+emit_uqadd_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uqadd_zh_zh_zh(rz, rz2, rz3)) }
+emit_uqadd_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uqadd_zs_zs_zs(rz, rz2, rz3)) }
+emit_uqadd_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uqadd_zd_zd_zd(rz, rz2, rz3)) }
 inst_sqsub_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQSUB, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_sqsub_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQSUB, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_sqsub_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQSUB, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1634,17 +1638,17 @@ inst_sqsub_zb_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_sqsub_zh_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQSUB, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_sqsub_zs_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQSUB, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_sqsub_zd_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQSUB, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_sqsub_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqsub_v8b_v8b_v8b(dst, src, src2)) }
-emit_sqsub_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqsub_v16b_v16b_v16b(dst, src, src2)) }
-emit_sqsub_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqsub_v4h_v4h_v4h(dst, src, src2)) }
-emit_sqsub_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqsub_v8h_v8h_v8h(dst, src, src2)) }
-emit_sqsub_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqsub_v2s_v2s_v2s(dst, src, src2)) }
-emit_sqsub_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqsub_v4s_v4s_v4s(dst, src, src2)) }
-emit_sqsub_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqsub_v2d_v2d_v2d(dst, src, src2)) }
-emit_sqsub_zb_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqsub_zb_zb_zb(rz, rz2, rz3)) }
-emit_sqsub_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqsub_zh_zh_zh(rz, rz2, rz3)) }
-emit_sqsub_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqsub_zs_zs_zs(rz, rz2, rz3)) }
-emit_sqsub_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqsub_zd_zd_zd(rz, rz2, rz3)) }
+emit_sqsub_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqsub_v8b_v8b_v8b(dst, src, src2)) }
+emit_sqsub_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqsub_v16b_v16b_v16b(dst, src, src2)) }
+emit_sqsub_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqsub_v4h_v4h_v4h(dst, src, src2)) }
+emit_sqsub_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqsub_v8h_v8h_v8h(dst, src, src2)) }
+emit_sqsub_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqsub_v2s_v2s_v2s(dst, src, src2)) }
+emit_sqsub_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqsub_v4s_v4s_v4s(dst, src, src2)) }
+emit_sqsub_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqsub_v2d_v2d_v2d(dst, src, src2)) }
+emit_sqsub_zb_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqsub_zb_zb_zb(rz, rz2, rz3)) }
+emit_sqsub_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqsub_zh_zh_zh(rz, rz2, rz3)) }
+emit_sqsub_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqsub_zs_zs_zs(rz, rz2, rz3)) }
+emit_sqsub_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqsub_zd_zd_zd(rz, rz2, rz3)) }
 inst_uqsub_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQSUB, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uqsub_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQSUB, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uqsub_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UQSUB, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1656,17 +1660,17 @@ inst_uqsub_zb_zb_zb           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_uqsub_zh_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UQSUB, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_uqsub_zs_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UQSUB, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_uqsub_zd_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UQSUB, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_uqsub_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub_v8b_v8b_v8b(dst, src, src2)) }
-emit_uqsub_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub_v16b_v16b_v16b(dst, src, src2)) }
-emit_uqsub_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub_v4h_v4h_v4h(dst, src, src2)) }
-emit_uqsub_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub_v8h_v8h_v8h(dst, src, src2)) }
-emit_uqsub_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub_v2s_v2s_v2s(dst, src, src2)) }
-emit_uqsub_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub_v4s_v4s_v4s(dst, src, src2)) }
-emit_uqsub_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uqsub_v2d_v2d_v2d(dst, src, src2)) }
-emit_uqsub_zb_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uqsub_zb_zb_zb(rz, rz2, rz3)) }
-emit_uqsub_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uqsub_zh_zh_zh(rz, rz2, rz3)) }
-emit_uqsub_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uqsub_zs_zs_zs(rz, rz2, rz3)) }
-emit_uqsub_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uqsub_zd_zd_zd(rz, rz2, rz3)) }
+emit_uqsub_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub_v8b_v8b_v8b(dst, src, src2)) }
+emit_uqsub_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub_v16b_v16b_v16b(dst, src, src2)) }
+emit_uqsub_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub_v4h_v4h_v4h(dst, src, src2)) }
+emit_uqsub_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub_v8h_v8h_v8h(dst, src, src2)) }
+emit_uqsub_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub_v2s_v2s_v2s(dst, src, src2)) }
+emit_uqsub_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub_v4s_v4s_v4s(dst, src, src2)) }
+emit_uqsub_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uqsub_v2d_v2d_v2d(dst, src, src2)) }
+emit_uqsub_zb_zb_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uqsub_zb_zb_zb(rz, rz2, rz3)) }
+emit_uqsub_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uqsub_zh_zh_zh(rz, rz2, rz3)) }
+emit_uqsub_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uqsub_zs_zs_zs(rz, rz2, rz3)) }
+emit_uqsub_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uqsub_zd_zd_zd(rz, rz2, rz3)) }
 inst_smax_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAX, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_smax_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAX, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_smax_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAX, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1677,16 +1681,16 @@ inst_smax_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_smax_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMAX, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_smax_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMAX, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_smax_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMAX, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_smax_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smax_v8b_v8b_v8b(dst, src, src2)) }
-emit_smax_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smax_v16b_v16b_v16b(dst, src, src2)) }
-emit_smax_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smax_v4h_v4h_v4h(dst, src, src2)) }
-emit_smax_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smax_v8h_v8h_v8h(dst, src, src2)) }
-emit_smax_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smax_v2s_v2s_v2s(dst, src, src2)) }
-emit_smax_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smax_v4s_v4s_v4s(dst, src, src2)) }
-emit_smax_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smax_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_smax_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smax_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_smax_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smax_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_smax_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smax_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_smax_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smax_v8b_v8b_v8b(dst, src, src2)) }
+emit_smax_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smax_v16b_v16b_v16b(dst, src, src2)) }
+emit_smax_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smax_v4h_v4h_v4h(dst, src, src2)) }
+emit_smax_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smax_v8h_v8h_v8h(dst, src, src2)) }
+emit_smax_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smax_v2s_v2s_v2s(dst, src, src2)) }
+emit_smax_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smax_v4s_v4s_v4s(dst, src, src2)) }
+emit_smax_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smax_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_smax_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smax_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_smax_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smax_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_smax_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smax_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_umax_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAX, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_umax_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAX, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_umax_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAX, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1697,16 +1701,16 @@ inst_umax_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_umax_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMAX, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_umax_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMAX, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_umax_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMAX, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_umax_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umax_v8b_v8b_v8b(dst, src, src2)) }
-emit_umax_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umax_v16b_v16b_v16b(dst, src, src2)) }
-emit_umax_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umax_v4h_v4h_v4h(dst, src, src2)) }
-emit_umax_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umax_v8h_v8h_v8h(dst, src, src2)) }
-emit_umax_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umax_v2s_v2s_v2s(dst, src, src2)) }
-emit_umax_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umax_v4s_v4s_v4s(dst, src, src2)) }
-emit_umax_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umax_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_umax_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umax_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_umax_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umax_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_umax_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umax_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_umax_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umax_v8b_v8b_v8b(dst, src, src2)) }
+emit_umax_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umax_v16b_v16b_v16b(dst, src, src2)) }
+emit_umax_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umax_v4h_v4h_v4h(dst, src, src2)) }
+emit_umax_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umax_v8h_v8h_v8h(dst, src, src2)) }
+emit_umax_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umax_v2s_v2s_v2s(dst, src, src2)) }
+emit_umax_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umax_v4s_v4s_v4s(dst, src, src2)) }
+emit_umax_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umax_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_umax_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umax_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_umax_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umax_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_umax_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umax_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_smin_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMIN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_smin_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMIN, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_smin_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMIN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1717,16 +1721,16 @@ inst_smin_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_smin_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMIN, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_smin_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMIN, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_smin_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMIN, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_smin_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smin_v8b_v8b_v8b(dst, src, src2)) }
-emit_smin_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smin_v16b_v16b_v16b(dst, src, src2)) }
-emit_smin_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smin_v4h_v4h_v4h(dst, src, src2)) }
-emit_smin_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smin_v8h_v8h_v8h(dst, src, src2)) }
-emit_smin_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smin_v2s_v2s_v2s(dst, src, src2)) }
-emit_smin_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smin_v4s_v4s_v4s(dst, src, src2)) }
-emit_smin_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smin_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_smin_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smin_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_smin_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smin_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_smin_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smin_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_smin_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smin_v8b_v8b_v8b(dst, src, src2)) }
+emit_smin_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smin_v16b_v16b_v16b(dst, src, src2)) }
+emit_smin_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smin_v4h_v4h_v4h(dst, src, src2)) }
+emit_smin_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smin_v8h_v8h_v8h(dst, src, src2)) }
+emit_smin_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smin_v2s_v2s_v2s(dst, src, src2)) }
+emit_smin_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smin_v4s_v4s_v4s(dst, src, src2)) }
+emit_smin_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smin_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_smin_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smin_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_smin_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smin_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_smin_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smin_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_umin_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMIN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_umin_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMIN, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_umin_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMIN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1737,16 +1741,16 @@ inst_umin_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_umin_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMIN, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_umin_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMIN, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_umin_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMIN, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_umin_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umin_v8b_v8b_v8b(dst, src, src2)) }
-emit_umin_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umin_v16b_v16b_v16b(dst, src, src2)) }
-emit_umin_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umin_v4h_v4h_v4h(dst, src, src2)) }
-emit_umin_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umin_v8h_v8h_v8h(dst, src, src2)) }
-emit_umin_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umin_v2s_v2s_v2s(dst, src, src2)) }
-emit_umin_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umin_v4s_v4s_v4s(dst, src, src2)) }
-emit_umin_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umin_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_umin_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umin_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_umin_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umin_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_umin_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umin_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_umin_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umin_v8b_v8b_v8b(dst, src, src2)) }
+emit_umin_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umin_v16b_v16b_v16b(dst, src, src2)) }
+emit_umin_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umin_v4h_v4h_v4h(dst, src, src2)) }
+emit_umin_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umin_v8h_v8h_v8h(dst, src, src2)) }
+emit_umin_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umin_v2s_v2s_v2s(dst, src, src2)) }
+emit_umin_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umin_v4s_v4s_v4s(dst, src, src2)) }
+emit_umin_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umin_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_umin_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umin_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_umin_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umin_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_umin_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umin_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_sabd_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABD, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_sabd_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABD, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_sabd_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABD, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1757,16 +1761,16 @@ inst_sabd_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_sabd_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SABD, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_sabd_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SABD, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_sabd_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SABD, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_sabd_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sabd_v8b_v8b_v8b(dst, src, src2)) }
-emit_sabd_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sabd_v16b_v16b_v16b(dst, src, src2)) }
-emit_sabd_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sabd_v4h_v4h_v4h(dst, src, src2)) }
-emit_sabd_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sabd_v8h_v8h_v8h(dst, src, src2)) }
-emit_sabd_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sabd_v2s_v2s_v2s(dst, src, src2)) }
-emit_sabd_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sabd_v4s_v4s_v4s(dst, src, src2)) }
-emit_sabd_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sabd_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_sabd_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sabd_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_sabd_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sabd_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_sabd_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sabd_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_sabd_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sabd_v8b_v8b_v8b(dst, src, src2)) }
+emit_sabd_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sabd_v16b_v16b_v16b(dst, src, src2)) }
+emit_sabd_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sabd_v4h_v4h_v4h(dst, src, src2)) }
+emit_sabd_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sabd_v8h_v8h_v8h(dst, src, src2)) }
+emit_sabd_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sabd_v2s_v2s_v2s(dst, src, src2)) }
+emit_sabd_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sabd_v4s_v4s_v4s(dst, src, src2)) }
+emit_sabd_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sabd_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_sabd_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sabd_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_sabd_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sabd_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_sabd_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sabd_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_uabd_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABD, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uabd_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABD, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uabd_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABD, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1777,40 +1781,40 @@ inst_uabd_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_uabd_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UABD, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_uabd_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UABD, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_uabd_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UABD, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_uabd_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uabd_v8b_v8b_v8b(dst, src, src2)) }
-emit_uabd_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uabd_v16b_v16b_v16b(dst, src, src2)) }
-emit_uabd_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uabd_v4h_v4h_v4h(dst, src, src2)) }
-emit_uabd_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uabd_v8h_v8h_v8h(dst, src, src2)) }
-emit_uabd_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uabd_v2s_v2s_v2s(dst, src, src2)) }
-emit_uabd_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uabd_v4s_v4s_v4s(dst, src, src2)) }
-emit_uabd_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_uabd_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_uabd_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_uabd_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_uabd_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_uabd_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_uabd_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_uabd_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_uabd_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uabd_v8b_v8b_v8b(dst, src, src2)) }
+emit_uabd_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uabd_v16b_v16b_v16b(dst, src, src2)) }
+emit_uabd_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uabd_v4h_v4h_v4h(dst, src, src2)) }
+emit_uabd_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uabd_v8h_v8h_v8h(dst, src, src2)) }
+emit_uabd_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uabd_v2s_v2s_v2s(dst, src, src2)) }
+emit_uabd_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uabd_v4s_v4s_v4s(dst, src, src2)) }
+emit_uabd_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_uabd_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_uabd_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_uabd_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_uabd_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_uabd_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_uabd_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_uabd_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_saba_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABA, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_saba_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABA, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_saba_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABA, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_saba_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABA, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_saba_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABA, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_saba_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SABA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_saba_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saba_v8b_v8b_v8b(dst, src, src2)) }
-emit_saba_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saba_v16b_v16b_v16b(dst, src, src2)) }
-emit_saba_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saba_v4h_v4h_v4h(dst, src, src2)) }
-emit_saba_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saba_v8h_v8h_v8h(dst, src, src2)) }
-emit_saba_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saba_v2s_v2s_v2s(dst, src, src2)) }
-emit_saba_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saba_v4s_v4s_v4s(dst, src, src2)) }
+emit_saba_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saba_v8b_v8b_v8b(dst, src, src2)) }
+emit_saba_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saba_v16b_v16b_v16b(dst, src, src2)) }
+emit_saba_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saba_v4h_v4h_v4h(dst, src, src2)) }
+emit_saba_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saba_v8h_v8h_v8h(dst, src, src2)) }
+emit_saba_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saba_v2s_v2s_v2s(dst, src, src2)) }
+emit_saba_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saba_v4s_v4s_v4s(dst, src, src2)) }
 inst_uaba_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABA, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uaba_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABA, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uaba_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABA, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_uaba_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABA, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_uaba_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABA, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_uaba_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UABA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_uaba_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaba_v8b_v8b_v8b(dst, src, src2)) }
-emit_uaba_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaba_v16b_v16b_v16b(dst, src, src2)) }
-emit_uaba_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaba_v4h_v4h_v4h(dst, src, src2)) }
-emit_uaba_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaba_v8h_v8h_v8h(dst, src, src2)) }
-emit_uaba_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaba_v2s_v2s_v2s(dst, src, src2)) }
-emit_uaba_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaba_v4s_v4s_v4s(dst, src, src2)) }
+emit_uaba_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaba_v8b_v8b_v8b(dst, src, src2)) }
+emit_uaba_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaba_v16b_v16b_v16b(dst, src, src2)) }
+emit_uaba_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaba_v4h_v4h_v4h(dst, src, src2)) }
+emit_uaba_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaba_v8h_v8h_v8h(dst, src, src2)) }
+emit_uaba_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaba_v2s_v2s_v2s(dst, src, src2)) }
+emit_uaba_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaba_v4s_v4s_v4s(dst, src, src2)) }
 inst_addp_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDP, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_addp_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDP, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_addp_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -1818,495 +1822,495 @@ inst_addp_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register
 inst_addp_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_addp_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_addp_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDP, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_addp_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addp_v8b_v8b_v8b(dst, src, src2)) }
-emit_addp_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addp_v16b_v16b_v16b(dst, src, src2)) }
-emit_addp_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addp_v4h_v4h_v4h(dst, src, src2)) }
-emit_addp_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addp_v8h_v8h_v8h(dst, src, src2)) }
-emit_addp_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addp_v2s_v2s_v2s(dst, src, src2)) }
-emit_addp_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addp_v4s_v4s_v4s(dst, src, src2)) }
-emit_addp_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addp_v2d_v2d_v2d(dst, src, src2)) }
+emit_addp_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addp_v8b_v8b_v8b(dst, src, src2)) }
+emit_addp_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addp_v16b_v16b_v16b(dst, src, src2)) }
+emit_addp_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addp_v4h_v4h_v4h(dst, src, src2)) }
+emit_addp_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addp_v8h_v8h_v8h(dst, src, src2)) }
+emit_addp_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addp_v2s_v2s_v2s(dst, src, src2)) }
+emit_addp_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addp_v4s_v4s_v4s(dst, src, src2)) }
+emit_addp_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addp_v2d_v2d_v2d(dst, src, src2)) }
 inst_addv_r_v8b               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8b(src), {}, {}, {}}} }
 inst_addv_r_v16b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_16b(src), {}, {}, {}}} }
 inst_addv_r_v4h               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_addv_r_v8h               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
 inst_addv_r_v4s               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
-emit_addv_r_v8b               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addv_r_v8b(dst, src)) }
-emit_addv_r_v16b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addv_r_v16b(dst, src)) }
-emit_addv_r_v4h               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addv_r_v4h(dst, src)) }
-emit_addv_r_v8h               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addv_r_v8h(dst, src)) }
-emit_addv_r_v4s               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addv_r_v4s(dst, src)) }
+emit_addv_r_v8b               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addv_r_v8b(dst, src)) }
+emit_addv_r_v16b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addv_r_v16b(dst, src)) }
+emit_addv_r_v4h               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addv_r_v4h(dst, src)) }
+emit_addv_r_v8h               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addv_r_v8h(dst, src)) }
+emit_addv_r_v4s               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addv_r_v4s(dst, src)) }
 inst_saddlp_v4h_v8b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLP, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_8b(src), {}, {}, {}}} }
 inst_saddlp_v8h_v16b          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLP, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_16b(src), {}, {}, {}}} }
 inst_saddlp_v2s_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLP, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_4h(src), {}, {}, {}}} }
 inst_saddlp_v4s_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLP, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_8h(src), {}, {}, {}}} }
 inst_saddlp_v1d_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLP, operand_count = 2, length = 4, ops = {op_v_1d(dst), op_v_2s(src), {}, {}, {}}} }
 inst_saddlp_v2d_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLP, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_4s(src), {}, {}, {}}} }
-emit_saddlp_v4h_v8b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlp_v4h_v8b(dst, src)) }
-emit_saddlp_v8h_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlp_v8h_v16b(dst, src)) }
-emit_saddlp_v2s_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlp_v2s_v4h(dst, src)) }
-emit_saddlp_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlp_v4s_v8h(dst, src)) }
-emit_saddlp_v1d_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlp_v1d_v2s(dst, src)) }
-emit_saddlp_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlp_v2d_v4s(dst, src)) }
+emit_saddlp_v4h_v8b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlp_v4h_v8b(dst, src)) }
+emit_saddlp_v8h_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlp_v8h_v16b(dst, src)) }
+emit_saddlp_v2s_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlp_v2s_v4h(dst, src)) }
+emit_saddlp_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlp_v4s_v8h(dst, src)) }
+emit_saddlp_v1d_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlp_v1d_v2s(dst, src)) }
+emit_saddlp_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlp_v2d_v4s(dst, src)) }
 inst_uaddlp_v4h_v8b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLP, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_8b(src), {}, {}, {}}} }
 inst_uaddlp_v8h_v16b          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLP, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_16b(src), {}, {}, {}}} }
 inst_uaddlp_v2s_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLP, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_4h(src), {}, {}, {}}} }
 inst_uaddlp_v4s_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLP, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_8h(src), {}, {}, {}}} }
 inst_uaddlp_v1d_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLP, operand_count = 2, length = 4, ops = {op_v_1d(dst), op_v_2s(src), {}, {}, {}}} }
 inst_uaddlp_v2d_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLP, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_4s(src), {}, {}, {}}} }
-emit_uaddlp_v4h_v8b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlp_v4h_v8b(dst, src)) }
-emit_uaddlp_v8h_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlp_v8h_v16b(dst, src)) }
-emit_uaddlp_v2s_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlp_v2s_v4h(dst, src)) }
-emit_uaddlp_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlp_v4s_v8h(dst, src)) }
-emit_uaddlp_v1d_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlp_v1d_v2s(dst, src)) }
-emit_uaddlp_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlp_v2d_v4s(dst, src)) }
+emit_uaddlp_v4h_v8b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlp_v4h_v8b(dst, src)) }
+emit_uaddlp_v8h_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlp_v8h_v16b(dst, src)) }
+emit_uaddlp_v2s_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlp_v2s_v4h(dst, src)) }
+emit_uaddlp_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlp_v4s_v8h(dst, src)) }
+emit_uaddlp_v1d_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlp_v1d_v2s(dst, src)) }
+emit_uaddlp_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlp_v2d_v4s(dst, src)) }
 inst_sadalp_v4h_v8b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADALP, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_8b(src), {}, {}, {}}} }
 inst_sadalp_v8h_v16b          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADALP, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_16b(src), {}, {}, {}}} }
 inst_sadalp_v2s_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADALP, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_4h(src), {}, {}, {}}} }
 inst_sadalp_v4s_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADALP, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_8h(src), {}, {}, {}}} }
 inst_sadalp_v1d_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADALP, operand_count = 2, length = 4, ops = {op_v_1d(dst), op_v_2s(src), {}, {}, {}}} }
 inst_sadalp_v2d_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADALP, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_4s(src), {}, {}, {}}} }
-emit_sadalp_v4h_v8b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sadalp_v4h_v8b(dst, src)) }
-emit_sadalp_v8h_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sadalp_v8h_v16b(dst, src)) }
-emit_sadalp_v2s_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sadalp_v2s_v4h(dst, src)) }
-emit_sadalp_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sadalp_v4s_v8h(dst, src)) }
-emit_sadalp_v1d_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sadalp_v1d_v2s(dst, src)) }
-emit_sadalp_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sadalp_v2d_v4s(dst, src)) }
+emit_sadalp_v4h_v8b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sadalp_v4h_v8b(dst, src)) }
+emit_sadalp_v8h_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sadalp_v8h_v16b(dst, src)) }
+emit_sadalp_v2s_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sadalp_v2s_v4h(dst, src)) }
+emit_sadalp_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sadalp_v4s_v8h(dst, src)) }
+emit_sadalp_v1d_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sadalp_v1d_v2s(dst, src)) }
+emit_sadalp_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sadalp_v2d_v4s(dst, src)) }
 inst_uadalp_v4h_v8b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADALP, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_8b(src), {}, {}, {}}} }
 inst_uadalp_v8h_v16b          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADALP, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_16b(src), {}, {}, {}}} }
 inst_uadalp_v2s_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADALP, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_4h(src), {}, {}, {}}} }
 inst_uadalp_v4s_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADALP, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_8h(src), {}, {}, {}}} }
 inst_uadalp_v1d_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADALP, operand_count = 2, length = 4, ops = {op_v_1d(dst), op_v_2s(src), {}, {}, {}}} }
 inst_uadalp_v2d_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADALP, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_4s(src), {}, {}, {}}} }
-emit_uadalp_v4h_v8b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uadalp_v4h_v8b(dst, src)) }
-emit_uadalp_v8h_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uadalp_v8h_v16b(dst, src)) }
-emit_uadalp_v2s_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uadalp_v2s_v4h(dst, src)) }
-emit_uadalp_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uadalp_v4s_v8h(dst, src)) }
-emit_uadalp_v1d_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uadalp_v1d_v2s(dst, src)) }
-emit_uadalp_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uadalp_v2d_v4s(dst, src)) }
+emit_uadalp_v4h_v8b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uadalp_v4h_v8b(dst, src)) }
+emit_uadalp_v8h_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uadalp_v8h_v16b(dst, src)) }
+emit_uadalp_v2s_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uadalp_v2s_v4h(dst, src)) }
+emit_uadalp_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uadalp_v4s_v8h(dst, src)) }
+emit_uadalp_v1d_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uadalp_v1d_v2s(dst, src)) }
+emit_uadalp_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uadalp_v2d_v4s(dst, src)) }
 inst_saddlv_r_v8b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8b(src), {}, {}, {}}} }
 inst_saddlv_r_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_16b(src), {}, {}, {}}} }
 inst_saddlv_r_v4h             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_saddlv_r_v8h             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
 inst_saddlv_r_v4s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
-emit_saddlv_r_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlv_r_v8b(dst, src)) }
-emit_saddlv_r_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlv_r_v16b(dst, src)) }
-emit_saddlv_r_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlv_r_v4h(dst, src)) }
-emit_saddlv_r_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlv_r_v8h(dst, src)) }
-emit_saddlv_r_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_saddlv_r_v4s(dst, src)) }
+emit_saddlv_r_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlv_r_v8b(dst, src)) }
+emit_saddlv_r_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlv_r_v16b(dst, src)) }
+emit_saddlv_r_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlv_r_v4h(dst, src)) }
+emit_saddlv_r_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlv_r_v8h(dst, src)) }
+emit_saddlv_r_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_saddlv_r_v4s(dst, src)) }
 inst_uaddlv_r_v8b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8b(src), {}, {}, {}}} }
 inst_uaddlv_r_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_16b(src), {}, {}, {}}} }
 inst_uaddlv_r_v4h             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_uaddlv_r_v8h             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
 inst_uaddlv_r_v4s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UADDLV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
-emit_uaddlv_r_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlv_r_v8b(dst, src)) }
-emit_uaddlv_r_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlv_r_v16b(dst, src)) }
-emit_uaddlv_r_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlv_r_v4h(dst, src)) }
-emit_uaddlv_r_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlv_r_v8h(dst, src)) }
-emit_uaddlv_r_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uaddlv_r_v4s(dst, src)) }
+emit_uaddlv_r_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlv_r_v8b(dst, src)) }
+emit_uaddlv_r_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlv_r_v16b(dst, src)) }
+emit_uaddlv_r_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlv_r_v4h(dst, src)) }
+emit_uaddlv_r_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlv_r_v8h(dst, src)) }
+emit_uaddlv_r_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uaddlv_r_v4s(dst, src)) }
 inst_smaxv_r_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8b(src), {}, {}, {}}} }
 inst_smaxv_r_v16b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_16b(src), {}, {}, {}}} }
 inst_smaxv_r_v4h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_smaxv_r_v8h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
 inst_smaxv_r_v4s              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
-emit_smaxv_r_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_smaxv_r_v8b(dst, src)) }
-emit_smaxv_r_v16b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_smaxv_r_v16b(dst, src)) }
-emit_smaxv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_smaxv_r_v4h(dst, src)) }
-emit_smaxv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_smaxv_r_v8h(dst, src)) }
-emit_smaxv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_smaxv_r_v4s(dst, src)) }
+emit_smaxv_r_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_smaxv_r_v8b(dst, src)) }
+emit_smaxv_r_v16b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_smaxv_r_v16b(dst, src)) }
+emit_smaxv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_smaxv_r_v4h(dst, src)) }
+emit_smaxv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_smaxv_r_v8h(dst, src)) }
+emit_smaxv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_smaxv_r_v4s(dst, src)) }
 inst_umaxv_r_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8b(src), {}, {}, {}}} }
 inst_umaxv_r_v16b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_16b(src), {}, {}, {}}} }
 inst_umaxv_r_v4h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_umaxv_r_v8h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
 inst_umaxv_r_v4s              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
-emit_umaxv_r_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_umaxv_r_v8b(dst, src)) }
-emit_umaxv_r_v16b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_umaxv_r_v16b(dst, src)) }
-emit_umaxv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_umaxv_r_v4h(dst, src)) }
-emit_umaxv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_umaxv_r_v8h(dst, src)) }
-emit_umaxv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_umaxv_r_v4s(dst, src)) }
+emit_umaxv_r_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_umaxv_r_v8b(dst, src)) }
+emit_umaxv_r_v16b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_umaxv_r_v16b(dst, src)) }
+emit_umaxv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_umaxv_r_v4h(dst, src)) }
+emit_umaxv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_umaxv_r_v8h(dst, src)) }
+emit_umaxv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_umaxv_r_v4s(dst, src)) }
 inst_sminv_r_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8b(src), {}, {}, {}}} }
 inst_sminv_r_v16b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_16b(src), {}, {}, {}}} }
 inst_sminv_r_v4h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_sminv_r_v8h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
 inst_sminv_r_v4s              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
-emit_sminv_r_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sminv_r_v8b(dst, src)) }
-emit_sminv_r_v16b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sminv_r_v16b(dst, src)) }
-emit_sminv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sminv_r_v4h(dst, src)) }
-emit_sminv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sminv_r_v8h(dst, src)) }
-emit_sminv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sminv_r_v4s(dst, src)) }
+emit_sminv_r_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sminv_r_v8b(dst, src)) }
+emit_sminv_r_v16b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sminv_r_v16b(dst, src)) }
+emit_sminv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sminv_r_v4h(dst, src)) }
+emit_sminv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sminv_r_v8h(dst, src)) }
+emit_sminv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sminv_r_v4s(dst, src)) }
 inst_uminv_r_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8b(src), {}, {}, {}}} }
 inst_uminv_r_v16b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_16b(src), {}, {}, {}}} }
 inst_uminv_r_v4h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_uminv_r_v8h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
 inst_uminv_r_v4s              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
-emit_uminv_r_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uminv_r_v8b(dst, src)) }
-emit_uminv_r_v16b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uminv_r_v16b(dst, src)) }
-emit_uminv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uminv_r_v4h(dst, src)) }
-emit_uminv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uminv_r_v8h(dst, src)) }
-emit_uminv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uminv_r_v4s(dst, src)) }
+emit_uminv_r_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uminv_r_v8b(dst, src)) }
+emit_uminv_r_v16b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uminv_r_v16b(dst, src)) }
+emit_uminv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uminv_r_v4h(dst, src)) }
+emit_uminv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uminv_r_v8h(dst, src)) }
+emit_uminv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uminv_r_v4s(dst, src)) }
 inst_smaxp_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAXP, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_smaxp_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAXP, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_smaxp_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAXP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_smaxp_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAXP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_smaxp_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAXP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_smaxp_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMAXP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_smaxp_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smaxp_v8b_v8b_v8b(dst, src, src2)) }
-emit_smaxp_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smaxp_v16b_v16b_v16b(dst, src, src2)) }
-emit_smaxp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smaxp_v4h_v4h_v4h(dst, src, src2)) }
-emit_smaxp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smaxp_v8h_v8h_v8h(dst, src, src2)) }
-emit_smaxp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smaxp_v2s_v2s_v2s(dst, src, src2)) }
-emit_smaxp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smaxp_v4s_v4s_v4s(dst, src, src2)) }
+emit_smaxp_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smaxp_v8b_v8b_v8b(dst, src, src2)) }
+emit_smaxp_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smaxp_v16b_v16b_v16b(dst, src, src2)) }
+emit_smaxp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smaxp_v4h_v4h_v4h(dst, src, src2)) }
+emit_smaxp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smaxp_v8h_v8h_v8h(dst, src, src2)) }
+emit_smaxp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smaxp_v2s_v2s_v2s(dst, src, src2)) }
+emit_smaxp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smaxp_v4s_v4s_v4s(dst, src, src2)) }
 inst_umaxp_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAXP, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_umaxp_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAXP, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_umaxp_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAXP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_umaxp_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAXP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_umaxp_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAXP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_umaxp_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMAXP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_umaxp_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umaxp_v8b_v8b_v8b(dst, src, src2)) }
-emit_umaxp_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umaxp_v16b_v16b_v16b(dst, src, src2)) }
-emit_umaxp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umaxp_v4h_v4h_v4h(dst, src, src2)) }
-emit_umaxp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umaxp_v8h_v8h_v8h(dst, src, src2)) }
-emit_umaxp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umaxp_v2s_v2s_v2s(dst, src, src2)) }
-emit_umaxp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umaxp_v4s_v4s_v4s(dst, src, src2)) }
+emit_umaxp_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umaxp_v8b_v8b_v8b(dst, src, src2)) }
+emit_umaxp_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umaxp_v16b_v16b_v16b(dst, src, src2)) }
+emit_umaxp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umaxp_v4h_v4h_v4h(dst, src, src2)) }
+emit_umaxp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umaxp_v8h_v8h_v8h(dst, src, src2)) }
+emit_umaxp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umaxp_v2s_v2s_v2s(dst, src, src2)) }
+emit_umaxp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umaxp_v4s_v4s_v4s(dst, src, src2)) }
 inst_sminp_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMINP, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_sminp_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMINP, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_sminp_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMINP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_sminp_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMINP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_sminp_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMINP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_sminp_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMINP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sminp_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sminp_v8b_v8b_v8b(dst, src, src2)) }
-emit_sminp_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sminp_v16b_v16b_v16b(dst, src, src2)) }
-emit_sminp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sminp_v4h_v4h_v4h(dst, src, src2)) }
-emit_sminp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sminp_v8h_v8h_v8h(dst, src, src2)) }
-emit_sminp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sminp_v2s_v2s_v2s(dst, src, src2)) }
-emit_sminp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sminp_v4s_v4s_v4s(dst, src, src2)) }
+emit_sminp_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sminp_v8b_v8b_v8b(dst, src, src2)) }
+emit_sminp_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sminp_v16b_v16b_v16b(dst, src, src2)) }
+emit_sminp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sminp_v4h_v4h_v4h(dst, src, src2)) }
+emit_sminp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sminp_v8h_v8h_v8h(dst, src, src2)) }
+emit_sminp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sminp_v2s_v2s_v2s(dst, src, src2)) }
+emit_sminp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sminp_v4s_v4s_v4s(dst, src, src2)) }
 inst_uminp_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMINP, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uminp_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMINP, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uminp_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMINP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_uminp_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMINP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_uminp_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMINP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_uminp_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMINP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_uminp_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uminp_v8b_v8b_v8b(dst, src, src2)) }
-emit_uminp_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uminp_v16b_v16b_v16b(dst, src, src2)) }
-emit_uminp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uminp_v4h_v4h_v4h(dst, src, src2)) }
-emit_uminp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uminp_v8h_v8h_v8h(dst, src, src2)) }
-emit_uminp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uminp_v2s_v2s_v2s(dst, src, src2)) }
-emit_uminp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uminp_v4s_v4s_v4s(dst, src, src2)) }
+emit_uminp_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uminp_v8b_v8b_v8b(dst, src, src2)) }
+emit_uminp_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uminp_v16b_v16b_v16b(dst, src, src2)) }
+emit_uminp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uminp_v4h_v4h_v4h(dst, src, src2)) }
+emit_uminp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uminp_v8h_v8h_v8h(dst, src, src2)) }
+emit_uminp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uminp_v2s_v2s_v2s(dst, src, src2)) }
+emit_uminp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uminp_v4s_v4s_v4s(dst, src, src2)) }
 inst_saddl_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_saddl_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_saddl_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_saddl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddl_v8h_v8b_v8b(dst, src, src2)) }
-emit_saddl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddl_v4s_v4h_v4h(dst, src, src2)) }
-emit_saddl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddl_v2d_v2s_v2s(dst, src, src2)) }
+emit_saddl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddl_v8h_v8b_v8b(dst, src, src2)) }
+emit_saddl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddl_v4s_v4h_v4h(dst, src, src2)) }
+emit_saddl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddl_v2d_v2s_v2s(dst, src, src2)) }
 inst_saddl2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_saddl2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_saddl2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_saddl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddl2_v8h_v16b_v16b(dst, src, src2)) }
-emit_saddl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddl2_v4s_v8h_v8h(dst, src, src2)) }
-emit_saddl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddl2_v2d_v4s_v4s(dst, src, src2)) }
+emit_saddl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddl2_v8h_v16b_v16b(dst, src, src2)) }
+emit_saddl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddl2_v4s_v8h_v8h(dst, src, src2)) }
+emit_saddl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddl2_v2d_v4s_v4s(dst, src, src2)) }
 inst_uaddl_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uaddl_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_uaddl_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_uaddl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddl_v8h_v8b_v8b(dst, src, src2)) }
-emit_uaddl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddl_v4s_v4h_v4h(dst, src, src2)) }
-emit_uaddl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddl_v2d_v2s_v2s(dst, src, src2)) }
+emit_uaddl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddl_v8h_v8b_v8b(dst, src, src2)) }
+emit_uaddl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddl_v4s_v4h_v4h(dst, src, src2)) }
+emit_uaddl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddl_v2d_v2s_v2s(dst, src, src2)) }
 inst_uaddl2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uaddl2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_uaddl2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_uaddl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddl2_v8h_v16b_v16b(dst, src, src2)) }
-emit_uaddl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddl2_v4s_v8h_v8h(dst, src, src2)) }
-emit_uaddl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddl2_v2d_v4s_v4s(dst, src, src2)) }
+emit_uaddl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddl2_v8h_v16b_v16b(dst, src, src2)) }
+emit_uaddl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddl2_v4s_v8h_v8h(dst, src, src2)) }
+emit_uaddl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddl2_v2d_v4s_v4s(dst, src, src2)) }
 inst_ssubl_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_ssubl_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_ssubl_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_ssubl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubl_v8h_v8b_v8b(dst, src, src2)) }
-emit_ssubl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubl_v4s_v4h_v4h(dst, src, src2)) }
-emit_ssubl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubl_v2d_v2s_v2s(dst, src, src2)) }
+emit_ssubl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubl_v8h_v8b_v8b(dst, src, src2)) }
+emit_ssubl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubl_v4s_v4h_v4h(dst, src, src2)) }
+emit_ssubl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubl_v2d_v2s_v2s(dst, src, src2)) }
 inst_ssubl2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_ssubl2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_ssubl2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_ssubl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubl2_v8h_v16b_v16b(dst, src, src2)) }
-emit_ssubl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubl2_v4s_v8h_v8h(dst, src, src2)) }
-emit_ssubl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubl2_v2d_v4s_v4s(dst, src, src2)) }
+emit_ssubl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubl2_v8h_v16b_v16b(dst, src, src2)) }
+emit_ssubl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubl2_v4s_v8h_v8h(dst, src, src2)) }
+emit_ssubl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubl2_v2d_v4s_v4s(dst, src, src2)) }
 inst_usubl_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_usubl_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_usubl_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_usubl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubl_v8h_v8b_v8b(dst, src, src2)) }
-emit_usubl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubl_v4s_v4h_v4h(dst, src, src2)) }
-emit_usubl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubl_v2d_v2s_v2s(dst, src, src2)) }
+emit_usubl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubl_v8h_v8b_v8b(dst, src, src2)) }
+emit_usubl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubl_v4s_v4h_v4h(dst, src, src2)) }
+emit_usubl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubl_v2d_v2s_v2s(dst, src, src2)) }
 inst_usubl2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_usubl2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_usubl2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_usubl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubl2_v8h_v16b_v16b(dst, src, src2)) }
-emit_usubl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubl2_v4s_v8h_v8h(dst, src, src2)) }
-emit_usubl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubl2_v2d_v4s_v4s(dst, src, src2)) }
+emit_usubl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubl2_v8h_v16b_v16b(dst, src, src2)) }
+emit_usubl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubl2_v4s_v8h_v8h(dst, src, src2)) }
+emit_usubl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubl2_v2d_v4s_v4s(dst, src, src2)) }
 inst_saddw_v8h_v8h_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDW, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8b(src2), {}, {}}} }
 inst_saddw_v4s_v4s_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDW, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4h(src2), {}, {}}} }
 inst_saddw_v2d_v2d_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDW, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2s(src2), {}, {}}} }
-emit_saddw_v8h_v8h_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddw_v8h_v8h_v8b(dst, src, src2)) }
-emit_saddw_v4s_v4s_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddw_v4s_v4s_v4h(dst, src, src2)) }
-emit_saddw_v2d_v2d_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddw_v2d_v2d_v2s(dst, src, src2)) }
+emit_saddw_v8h_v8h_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddw_v8h_v8h_v8b(dst, src, src2)) }
+emit_saddw_v4s_v4s_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddw_v4s_v4s_v4h(dst, src, src2)) }
+emit_saddw_v2d_v2d_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddw_v2d_v2d_v2s(dst, src, src2)) }
 inst_saddw2_v8h_v8h_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDW2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_16b(src2), {}, {}}} }
 inst_saddw2_v4s_v4s_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDW2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_8h(src2), {}, {}}} }
 inst_saddw2_v2d_v2d_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SADDW2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_4s(src2), {}, {}}} }
-emit_saddw2_v8h_v8h_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddw2_v8h_v8h_v16b(dst, src, src2)) }
-emit_saddw2_v4s_v4s_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddw2_v4s_v4s_v8h(dst, src, src2)) }
-emit_saddw2_v2d_v2d_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_saddw2_v2d_v2d_v4s(dst, src, src2)) }
+emit_saddw2_v8h_v8h_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddw2_v8h_v8h_v16b(dst, src, src2)) }
+emit_saddw2_v4s_v4s_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddw2_v4s_v4s_v8h(dst, src, src2)) }
+emit_saddw2_v2d_v2d_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_saddw2_v2d_v2d_v4s(dst, src, src2)) }
 inst_uaddw_v8h_v8h_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDW, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8b(src2), {}, {}}} }
 inst_uaddw_v4s_v4s_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDW, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4h(src2), {}, {}}} }
 inst_uaddw_v2d_v2d_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDW, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2s(src2), {}, {}}} }
-emit_uaddw_v8h_v8h_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddw_v8h_v8h_v8b(dst, src, src2)) }
-emit_uaddw_v4s_v4s_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddw_v4s_v4s_v4h(dst, src, src2)) }
-emit_uaddw_v2d_v2d_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddw_v2d_v2d_v2s(dst, src, src2)) }
+emit_uaddw_v8h_v8h_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddw_v8h_v8h_v8b(dst, src, src2)) }
+emit_uaddw_v4s_v4s_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddw_v4s_v4s_v4h(dst, src, src2)) }
+emit_uaddw_v2d_v2d_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddw_v2d_v2d_v2s(dst, src, src2)) }
 inst_uaddw2_v8h_v8h_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDW2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_16b(src2), {}, {}}} }
 inst_uaddw2_v4s_v4s_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDW2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_8h(src2), {}, {}}} }
 inst_uaddw2_v2d_v2d_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UADDW2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_4s(src2), {}, {}}} }
-emit_uaddw2_v8h_v8h_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddw2_v8h_v8h_v16b(dst, src, src2)) }
-emit_uaddw2_v4s_v4s_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddw2_v4s_v4s_v8h(dst, src, src2)) }
-emit_uaddw2_v2d_v2d_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uaddw2_v2d_v2d_v4s(dst, src, src2)) }
+emit_uaddw2_v8h_v8h_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddw2_v8h_v8h_v16b(dst, src, src2)) }
+emit_uaddw2_v4s_v4s_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddw2_v4s_v4s_v8h(dst, src, src2)) }
+emit_uaddw2_v2d_v2d_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uaddw2_v2d_v2d_v4s(dst, src, src2)) }
 inst_ssubw_v8h_v8h_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBW, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8b(src2), {}, {}}} }
 inst_ssubw_v4s_v4s_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBW, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4h(src2), {}, {}}} }
 inst_ssubw_v2d_v2d_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBW, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2s(src2), {}, {}}} }
-emit_ssubw_v8h_v8h_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubw_v8h_v8h_v8b(dst, src, src2)) }
-emit_ssubw_v4s_v4s_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubw_v4s_v4s_v4h(dst, src, src2)) }
-emit_ssubw_v2d_v2d_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubw_v2d_v2d_v2s(dst, src, src2)) }
+emit_ssubw_v8h_v8h_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubw_v8h_v8h_v8b(dst, src, src2)) }
+emit_ssubw_v4s_v4s_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubw_v4s_v4s_v4h(dst, src, src2)) }
+emit_ssubw_v2d_v2d_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubw_v2d_v2d_v2s(dst, src, src2)) }
 inst_ssubw2_v8h_v8h_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBW2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_16b(src2), {}, {}}} }
 inst_ssubw2_v4s_v4s_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBW2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_8h(src2), {}, {}}} }
 inst_ssubw2_v2d_v2d_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSUBW2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_4s(src2), {}, {}}} }
-emit_ssubw2_v8h_v8h_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubw2_v8h_v8h_v16b(dst, src, src2)) }
-emit_ssubw2_v4s_v4s_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubw2_v4s_v4s_v8h(dst, src, src2)) }
-emit_ssubw2_v2d_v2d_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ssubw2_v2d_v2d_v4s(dst, src, src2)) }
+emit_ssubw2_v8h_v8h_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubw2_v8h_v8h_v16b(dst, src, src2)) }
+emit_ssubw2_v4s_v4s_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubw2_v4s_v4s_v8h(dst, src, src2)) }
+emit_ssubw2_v2d_v2d_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ssubw2_v2d_v2d_v4s(dst, src, src2)) }
 inst_usubw_v8h_v8h_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBW, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8b(src2), {}, {}}} }
 inst_usubw_v4s_v4s_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBW, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4h(src2), {}, {}}} }
 inst_usubw_v2d_v2d_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBW, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2s(src2), {}, {}}} }
-emit_usubw_v8h_v8h_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubw_v8h_v8h_v8b(dst, src, src2)) }
-emit_usubw_v4s_v4s_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubw_v4s_v4s_v4h(dst, src, src2)) }
-emit_usubw_v2d_v2d_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubw_v2d_v2d_v2s(dst, src, src2)) }
+emit_usubw_v8h_v8h_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubw_v8h_v8h_v8b(dst, src, src2)) }
+emit_usubw_v4s_v4s_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubw_v4s_v4s_v4h(dst, src, src2)) }
+emit_usubw_v2d_v2d_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubw_v2d_v2d_v2s(dst, src, src2)) }
 inst_usubw2_v8h_v8h_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBW2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_16b(src2), {}, {}}} }
 inst_usubw2_v4s_v4s_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBW2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_8h(src2), {}, {}}} }
 inst_usubw2_v2d_v2d_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USUBW2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_4s(src2), {}, {}}} }
-emit_usubw2_v8h_v8h_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubw2_v8h_v8h_v16b(dst, src, src2)) }
-emit_usubw2_v4s_v4s_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubw2_v4s_v4s_v8h(dst, src, src2)) }
-emit_usubw2_v2d_v2d_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usubw2_v2d_v2d_v4s(dst, src, src2)) }
+emit_usubw2_v8h_v8h_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubw2_v8h_v8h_v16b(dst, src, src2)) }
+emit_usubw2_v4s_v4s_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubw2_v4s_v4s_v8h(dst, src, src2)) }
+emit_usubw2_v2d_v2d_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usubw2_v2d_v2d_v4s(dst, src, src2)) }
 inst_raddhn_v8b_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RADDHN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_raddhn_v4h_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RADDHN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_raddhn_v2s_v2d_v2d       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RADDHN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_raddhn_v8b_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_raddhn_v8b_v8h_v8h(dst, src, src2)) }
-emit_raddhn_v4h_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_raddhn_v4h_v4s_v4s(dst, src, src2)) }
-emit_raddhn_v2s_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_raddhn_v2s_v2d_v2d(dst, src, src2)) }
+emit_raddhn_v8b_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_raddhn_v8b_v8h_v8h(dst, src, src2)) }
+emit_raddhn_v4h_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_raddhn_v4h_v4s_v4s(dst, src, src2)) }
+emit_raddhn_v2s_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_raddhn_v2s_v2d_v2d(dst, src, src2)) }
 inst_raddhn2_v16b_v8h_v8h     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RADDHN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_raddhn2_v8h_v4s_v4s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RADDHN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_raddhn2_v4s_v2d_v2d      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RADDHN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_raddhn2_v16b_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_raddhn2_v16b_v8h_v8h(dst, src, src2)) }
-emit_raddhn2_v8h_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_raddhn2_v8h_v4s_v4s(dst, src, src2)) }
-emit_raddhn2_v4s_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_raddhn2_v4s_v2d_v2d(dst, src, src2)) }
+emit_raddhn2_v16b_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_raddhn2_v16b_v8h_v8h(dst, src, src2)) }
+emit_raddhn2_v8h_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_raddhn2_v8h_v4s_v4s(dst, src, src2)) }
+emit_raddhn2_v4s_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_raddhn2_v4s_v2d_v2d(dst, src, src2)) }
 inst_rsubhn_v8b_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RSUBHN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_rsubhn_v4h_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RSUBHN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_rsubhn_v2s_v2d_v2d       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RSUBHN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_rsubhn_v8b_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rsubhn_v8b_v8h_v8h(dst, src, src2)) }
-emit_rsubhn_v4h_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rsubhn_v4h_v4s_v4s(dst, src, src2)) }
-emit_rsubhn_v2s_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rsubhn_v2s_v2d_v2d(dst, src, src2)) }
+emit_rsubhn_v8b_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rsubhn_v8b_v8h_v8h(dst, src, src2)) }
+emit_rsubhn_v4h_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rsubhn_v4h_v4s_v4s(dst, src, src2)) }
+emit_rsubhn_v2s_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rsubhn_v2s_v2d_v2d(dst, src, src2)) }
 inst_rsubhn2_v16b_v8h_v8h     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RSUBHN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_rsubhn2_v8h_v4s_v4s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RSUBHN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_rsubhn2_v4s_v2d_v2d      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RSUBHN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_rsubhn2_v16b_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rsubhn2_v16b_v8h_v8h(dst, src, src2)) }
-emit_rsubhn2_v8h_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rsubhn2_v8h_v4s_v4s(dst, src, src2)) }
-emit_rsubhn2_v4s_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rsubhn2_v4s_v2d_v2d(dst, src, src2)) }
+emit_rsubhn2_v16b_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rsubhn2_v16b_v8h_v8h(dst, src, src2)) }
+emit_rsubhn2_v8h_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rsubhn2_v8h_v4s_v4s(dst, src, src2)) }
+emit_rsubhn2_v4s_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rsubhn2_v4s_v2d_v2d(dst, src, src2)) }
 inst_addhn_v8b_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDHN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_addhn_v4h_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDHN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_addhn_v2s_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDHN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_addhn_v8b_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addhn_v8b_v8h_v8h(dst, src, src2)) }
-emit_addhn_v4h_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addhn_v4h_v4s_v4s(dst, src, src2)) }
-emit_addhn_v2s_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addhn_v2s_v2d_v2d(dst, src, src2)) }
+emit_addhn_v8b_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addhn_v8b_v8h_v8h(dst, src, src2)) }
+emit_addhn_v4h_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addhn_v4h_v4s_v4s(dst, src, src2)) }
+emit_addhn_v2s_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addhn_v2s_v2d_v2d(dst, src, src2)) }
 inst_addhn2_v16b_v8h_v8h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDHN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_addhn2_v8h_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDHN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_addhn2_v4s_v2d_v2d       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDHN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_addhn2_v16b_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addhn2_v16b_v8h_v8h(dst, src, src2)) }
-emit_addhn2_v8h_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addhn2_v8h_v4s_v4s(dst, src, src2)) }
-emit_addhn2_v4s_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addhn2_v4s_v2d_v2d(dst, src, src2)) }
+emit_addhn2_v16b_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addhn2_v16b_v8h_v8h(dst, src, src2)) }
+emit_addhn2_v8h_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addhn2_v8h_v4s_v4s(dst, src, src2)) }
+emit_addhn2_v4s_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addhn2_v4s_v2d_v2d(dst, src, src2)) }
 inst_subhn_v8b_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBHN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_subhn_v4h_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBHN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_subhn_v2s_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBHN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_subhn_v8b_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subhn_v8b_v8h_v8h(dst, src, src2)) }
-emit_subhn_v4h_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subhn_v4h_v4s_v4s(dst, src, src2)) }
-emit_subhn_v2s_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subhn_v2s_v2d_v2d(dst, src, src2)) }
+emit_subhn_v8b_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subhn_v8b_v8h_v8h(dst, src, src2)) }
+emit_subhn_v4h_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subhn_v4h_v4s_v4s(dst, src, src2)) }
+emit_subhn_v2s_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subhn_v2s_v2d_v2d(dst, src, src2)) }
 inst_subhn2_v16b_v8h_v8h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBHN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_subhn2_v8h_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBHN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_subhn2_v4s_v2d_v2d       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBHN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_subhn2_v16b_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subhn2_v16b_v8h_v8h(dst, src, src2)) }
-emit_subhn2_v8h_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subhn2_v8h_v4s_v4s(dst, src, src2)) }
-emit_subhn2_v4s_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subhn2_v4s_v2d_v2d(dst, src, src2)) }
+emit_subhn2_v16b_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subhn2_v16b_v8h_v8h(dst, src, src2)) }
+emit_subhn2_v8h_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subhn2_v8h_v4s_v4s(dst, src, src2)) }
+emit_subhn2_v4s_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subhn2_v4s_v2d_v2d(dst, src, src2)) }
 inst_xtn_v8b_v8h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XTN, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8h(src), {}, {}, {}}} }
 inst_xtn_v4h_v4s              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XTN, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_xtn_v2s_v2d              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XTN, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_xtn_v8b_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xtn_v8b_v8h(dst, src)) }
-emit_xtn_v4h_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xtn_v4h_v4s(dst, src)) }
-emit_xtn_v2s_v2d              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xtn_v2s_v2d(dst, src)) }
+emit_xtn_v8b_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xtn_v8b_v8h(dst, src)) }
+emit_xtn_v4h_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xtn_v4h_v4s(dst, src)) }
+emit_xtn_v2s_v2d              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xtn_v2s_v2d(dst, src)) }
 inst_xtn2_v16b_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XTN2, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_8h(src), {}, {}, {}}} }
 inst_xtn2_v8h_v4s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XTN2, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_xtn2_v4s_v2d             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XTN2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_xtn2_v16b_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xtn2_v16b_v8h(dst, src)) }
-emit_xtn2_v8h_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xtn2_v8h_v4s(dst, src)) }
-emit_xtn2_v4s_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xtn2_v4s_v2d(dst, src)) }
+emit_xtn2_v16b_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xtn2_v16b_v8h(dst, src)) }
+emit_xtn2_v8h_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xtn2_v8h_v4s(dst, src)) }
+emit_xtn2_v4s_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xtn2_v4s_v2d(dst, src)) }
 inst_sqxtn_v8b_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTN, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8h(src), {}, {}, {}}} }
 inst_sqxtn_v4h_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTN, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_sqxtn_v2s_v2d            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTN, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_sqxtn_v8b_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtn_v8b_v8h(dst, src)) }
-emit_sqxtn_v4h_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtn_v4h_v4s(dst, src)) }
-emit_sqxtn_v2s_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtn_v2s_v2d(dst, src)) }
+emit_sqxtn_v8b_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtn_v8b_v8h(dst, src)) }
+emit_sqxtn_v4h_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtn_v4h_v4s(dst, src)) }
+emit_sqxtn_v2s_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtn_v2s_v2d(dst, src)) }
 inst_sqxtn2_v16b_v8h          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTN2, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_8h(src), {}, {}, {}}} }
 inst_sqxtn2_v8h_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTN2, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_sqxtn2_v4s_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTN2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_sqxtn2_v16b_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtn2_v16b_v8h(dst, src)) }
-emit_sqxtn2_v8h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtn2_v8h_v4s(dst, src)) }
-emit_sqxtn2_v4s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtn2_v4s_v2d(dst, src)) }
+emit_sqxtn2_v16b_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtn2_v16b_v8h(dst, src)) }
+emit_sqxtn2_v8h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtn2_v8h_v4s(dst, src)) }
+emit_sqxtn2_v4s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtn2_v4s_v2d(dst, src)) }
 inst_uqxtn_v8b_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UQXTN, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8h(src), {}, {}, {}}} }
 inst_uqxtn_v4h_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UQXTN, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_uqxtn_v2s_v2d            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UQXTN, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_uqxtn_v8b_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uqxtn_v8b_v8h(dst, src)) }
-emit_uqxtn_v4h_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uqxtn_v4h_v4s(dst, src)) }
-emit_uqxtn_v2s_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uqxtn_v2s_v2d(dst, src)) }
+emit_uqxtn_v8b_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uqxtn_v8b_v8h(dst, src)) }
+emit_uqxtn_v4h_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uqxtn_v4h_v4s(dst, src)) }
+emit_uqxtn_v2s_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uqxtn_v2s_v2d(dst, src)) }
 inst_uqxtn2_v16b_v8h          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UQXTN2, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_8h(src), {}, {}, {}}} }
 inst_uqxtn2_v8h_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UQXTN2, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_uqxtn2_v4s_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UQXTN2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_uqxtn2_v16b_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uqxtn2_v16b_v8h(dst, src)) }
-emit_uqxtn2_v8h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uqxtn2_v8h_v4s(dst, src)) }
-emit_uqxtn2_v4s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uqxtn2_v4s_v2d(dst, src)) }
+emit_uqxtn2_v16b_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uqxtn2_v16b_v8h(dst, src)) }
+emit_uqxtn2_v8h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uqxtn2_v8h_v4s(dst, src)) }
+emit_uqxtn2_v4s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uqxtn2_v4s_v2d(dst, src)) }
 inst_sqxtun_v8b_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTUN, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8h(src), {}, {}, {}}} }
 inst_sqxtun_v4h_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTUN, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_sqxtun_v2s_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTUN, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_sqxtun_v8b_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtun_v8b_v8h(dst, src)) }
-emit_sqxtun_v4h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtun_v4h_v4s(dst, src)) }
-emit_sqxtun_v2s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtun_v2s_v2d(dst, src)) }
+emit_sqxtun_v8b_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtun_v8b_v8h(dst, src)) }
+emit_sqxtun_v4h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtun_v4h_v4s(dst, src)) }
+emit_sqxtun_v2s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtun_v2s_v2d(dst, src)) }
 inst_sqxtun2_v16b_v8h         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTUN2, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_8h(src), {}, {}, {}}} }
 inst_sqxtun2_v8h_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTUN2, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_sqxtun2_v4s_v2d          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SQXTUN2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_sqxtun2_v16b_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtun2_v16b_v8h(dst, src)) }
-emit_sqxtun2_v8h_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtun2_v8h_v4s(dst, src)) }
-emit_sqxtun2_v4s_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sqxtun2_v4s_v2d(dst, src)) }
+emit_sqxtun2_v16b_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtun2_v16b_v8h(dst, src)) }
+emit_sqxtun2_v8h_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtun2_v8h_v4s(dst, src)) }
+emit_sqxtun2_v4s_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sqxtun2_v4s_v2d(dst, src)) }
 inst_smull_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_smull_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_smull_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_smull_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smull_v8h_v8b_v8b(dst, src, src2)) }
-emit_smull_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smull_v4s_v4h_v4h(dst, src, src2)) }
-emit_smull_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smull_v2d_v2s_v2s(dst, src, src2)) }
+emit_smull_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smull_v8h_v8b_v8b(dst, src, src2)) }
+emit_smull_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smull_v4s_v4h_v4h(dst, src, src2)) }
+emit_smull_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smull_v2d_v2s_v2s(dst, src, src2)) }
 inst_smull2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_smull2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_smull2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMULL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_smull2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smull2_v8h_v16b_v16b(dst, src, src2)) }
-emit_smull2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smull2_v4s_v8h_v8h(dst, src, src2)) }
-emit_smull2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smull2_v2d_v4s_v4s(dst, src, src2)) }
+emit_smull2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smull2_v8h_v16b_v16b(dst, src, src2)) }
+emit_smull2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smull2_v4s_v8h_v8h(dst, src, src2)) }
+emit_smull2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smull2_v2d_v4s_v4s(dst, src, src2)) }
 inst_umull_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMULL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_umull_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMULL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_umull_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMULL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_umull_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umull_v8h_v8b_v8b(dst, src, src2)) }
-emit_umull_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umull_v4s_v4h_v4h(dst, src, src2)) }
-emit_umull_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umull_v2d_v2s_v2s(dst, src, src2)) }
+emit_umull_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umull_v8h_v8b_v8b(dst, src, src2)) }
+emit_umull_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umull_v4s_v4h_v4h(dst, src, src2)) }
+emit_umull_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umull_v2d_v2s_v2s(dst, src, src2)) }
 inst_umull2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMULL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_umull2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMULL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_umull2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMULL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_umull2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umull2_v8h_v16b_v16b(dst, src, src2)) }
-emit_umull2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umull2_v4s_v8h_v8h(dst, src, src2)) }
-emit_umull2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umull2_v2d_v4s_v4s(dst, src, src2)) }
+emit_umull2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umull2_v8h_v16b_v16b(dst, src, src2)) }
+emit_umull2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umull2_v4s_v8h_v8h(dst, src, src2)) }
+emit_umull2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umull2_v2d_v4s_v4s(dst, src, src2)) }
 inst_smlal_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLAL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_smlal_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLAL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_smlal_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLAL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_smlal_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlal_v8h_v8b_v8b(dst, src, src2)) }
-emit_smlal_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlal_v4s_v4h_v4h(dst, src, src2)) }
-emit_smlal_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlal_v2d_v2s_v2s(dst, src, src2)) }
+emit_smlal_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlal_v8h_v8b_v8b(dst, src, src2)) }
+emit_smlal_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlal_v4s_v4h_v4h(dst, src, src2)) }
+emit_smlal_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlal_v2d_v2s_v2s(dst, src, src2)) }
 inst_smlal2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLAL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_smlal2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLAL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_smlal2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLAL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_smlal2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlal2_v8h_v16b_v16b(dst, src, src2)) }
-emit_smlal2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlal2_v4s_v8h_v8h(dst, src, src2)) }
-emit_smlal2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlal2_v2d_v4s_v4s(dst, src, src2)) }
+emit_smlal2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlal2_v8h_v16b_v16b(dst, src, src2)) }
+emit_smlal2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlal2_v4s_v8h_v8h(dst, src, src2)) }
+emit_smlal2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlal2_v2d_v4s_v4s(dst, src, src2)) }
 inst_umlal_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLAL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_umlal_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLAL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_umlal_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLAL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_umlal_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlal_v8h_v8b_v8b(dst, src, src2)) }
-emit_umlal_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlal_v4s_v4h_v4h(dst, src, src2)) }
-emit_umlal_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlal_v2d_v2s_v2s(dst, src, src2)) }
+emit_umlal_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlal_v8h_v8b_v8b(dst, src, src2)) }
+emit_umlal_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlal_v4s_v4h_v4h(dst, src, src2)) }
+emit_umlal_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlal_v2d_v2s_v2s(dst, src, src2)) }
 inst_umlal2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLAL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_umlal2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLAL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_umlal2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLAL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_umlal2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlal2_v8h_v16b_v16b(dst, src, src2)) }
-emit_umlal2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlal2_v4s_v8h_v8h(dst, src, src2)) }
-emit_umlal2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlal2_v2d_v4s_v4s(dst, src, src2)) }
+emit_umlal2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlal2_v8h_v16b_v16b(dst, src, src2)) }
+emit_umlal2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlal2_v4s_v8h_v8h(dst, src, src2)) }
+emit_umlal2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlal2_v2d_v4s_v4s(dst, src, src2)) }
 inst_smlsl_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLSL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_smlsl_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLSL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_smlsl_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLSL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_smlsl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlsl_v8h_v8b_v8b(dst, src, src2)) }
-emit_smlsl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlsl_v4s_v4h_v4h(dst, src, src2)) }
-emit_smlsl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlsl_v2d_v2s_v2s(dst, src, src2)) }
+emit_smlsl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlsl_v8h_v8b_v8b(dst, src, src2)) }
+emit_smlsl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlsl_v4s_v4h_v4h(dst, src, src2)) }
+emit_smlsl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlsl_v2d_v2s_v2s(dst, src, src2)) }
 inst_smlsl2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLSL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_smlsl2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLSL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_smlsl2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SMLSL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_smlsl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlsl2_v8h_v16b_v16b(dst, src, src2)) }
-emit_smlsl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlsl2_v4s_v8h_v8h(dst, src, src2)) }
-emit_smlsl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_smlsl2_v2d_v4s_v4s(dst, src, src2)) }
+emit_smlsl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlsl2_v8h_v16b_v16b(dst, src, src2)) }
+emit_smlsl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlsl2_v4s_v8h_v8h(dst, src, src2)) }
+emit_smlsl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_smlsl2_v2d_v4s_v4s(dst, src, src2)) }
 inst_umlsl_v8h_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLSL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_umlsl_v4s_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLSL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_umlsl_v2d_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLSL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_umlsl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlsl_v8h_v8b_v8b(dst, src, src2)) }
-emit_umlsl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlsl_v4s_v4h_v4h(dst, src, src2)) }
-emit_umlsl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlsl_v2d_v2s_v2s(dst, src, src2)) }
+emit_umlsl_v8h_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlsl_v8h_v8b_v8b(dst, src, src2)) }
+emit_umlsl_v4s_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlsl_v4s_v4h_v4h(dst, src, src2)) }
+emit_umlsl_v2d_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlsl_v2d_v2s_v2s(dst, src, src2)) }
 inst_umlsl2_v8h_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLSL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_umlsl2_v4s_v8h_v8h       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLSL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_umlsl2_v2d_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UMLSL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_umlsl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlsl2_v8h_v16b_v16b(dst, src, src2)) }
-emit_umlsl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlsl2_v4s_v8h_v8h(dst, src, src2)) }
-emit_umlsl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_umlsl2_v2d_v4s_v4s(dst, src, src2)) }
+emit_umlsl2_v8h_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlsl2_v8h_v16b_v16b(dst, src, src2)) }
+emit_umlsl2_v4s_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlsl2_v4s_v8h_v8h(dst, src, src2)) }
+emit_umlsl2_v2d_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_umlsl2_v2d_v4s_v4s(dst, src, src2)) }
 inst_sqdmull_v4s_v4h_v4h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMULL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_sqdmull_v2d_v2s_v2s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMULL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_sqdmull_v4s_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmull_v4s_v4h_v4h(dst, src, src2)) }
-emit_sqdmull_v2d_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmull_v2d_v2s_v2s(dst, src, src2)) }
+emit_sqdmull_v4s_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmull_v4s_v4h_v4h(dst, src, src2)) }
+emit_sqdmull_v2d_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmull_v2d_v2s_v2s(dst, src, src2)) }
 inst_sqdmull2_v4s_v8h_v8h     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMULL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_sqdmull2_v2d_v4s_v4s     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMULL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sqdmull2_v4s_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmull2_v4s_v8h_v8h(dst, src, src2)) }
-emit_sqdmull2_v2d_v4s_v4s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmull2_v2d_v4s_v4s(dst, src, src2)) }
+emit_sqdmull2_v4s_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmull2_v4s_v8h_v8h(dst, src, src2)) }
+emit_sqdmull2_v2d_v4s_v4s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmull2_v2d_v4s_v4s(dst, src, src2)) }
 inst_sqdmlal_v4s_v4h_v4h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMLAL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_sqdmlal_v2d_v2s_v2s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMLAL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_sqdmlal_v4s_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmlal_v4s_v4h_v4h(dst, src, src2)) }
-emit_sqdmlal_v2d_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmlal_v2d_v2s_v2s(dst, src, src2)) }
+emit_sqdmlal_v4s_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmlal_v4s_v4h_v4h(dst, src, src2)) }
+emit_sqdmlal_v2d_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmlal_v2d_v2s_v2s(dst, src, src2)) }
 inst_sqdmlal2_v4s_v8h_v8h     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMLAL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_sqdmlal2_v2d_v4s_v4s     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMLAL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sqdmlal2_v4s_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmlal2_v4s_v8h_v8h(dst, src, src2)) }
-emit_sqdmlal2_v2d_v4s_v4s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmlal2_v2d_v4s_v4s(dst, src, src2)) }
+emit_sqdmlal2_v4s_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmlal2_v4s_v8h_v8h(dst, src, src2)) }
+emit_sqdmlal2_v2d_v4s_v4s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmlal2_v2d_v4s_v4s(dst, src, src2)) }
 inst_sqdmlsl_v4s_v4h_v4h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMLSL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_sqdmlsl_v2d_v2s_v2s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMLSL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
-emit_sqdmlsl_v4s_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmlsl_v4s_v4h_v4h(dst, src, src2)) }
-emit_sqdmlsl_v2d_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmlsl_v2d_v2s_v2s(dst, src, src2)) }
+emit_sqdmlsl_v4s_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmlsl_v4s_v4h_v4h(dst, src, src2)) }
+emit_sqdmlsl_v2d_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmlsl_v2d_v2s_v2s(dst, src, src2)) }
 inst_sqdmlsl2_v4s_v8h_v8h     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMLSL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_sqdmlsl2_v2d_v4s_v4s     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMLSL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sqdmlsl2_v4s_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmlsl2_v4s_v8h_v8h(dst, src, src2)) }
-emit_sqdmlsl2_v2d_v4s_v4s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmlsl2_v2d_v4s_v4s(dst, src, src2)) }
+emit_sqdmlsl2_v4s_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmlsl2_v4s_v8h_v8h(dst, src, src2)) }
+emit_sqdmlsl2_v2d_v4s_v4s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmlsl2_v2d_v4s_v4s(dst, src, src2)) }
 inst_sqdmulh_v4h_v4h_v4h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMULH, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_sqdmulh_v8h_v8h_v8h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMULH, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_sqdmulh_v2s_v2s_v2s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMULH, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_sqdmulh_v4s_v4s_v4s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQDMULH, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sqdmulh_v4h_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmulh_v4h_v4h_v4h(dst, src, src2)) }
-emit_sqdmulh_v8h_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmulh_v8h_v8h_v8h(dst, src, src2)) }
-emit_sqdmulh_v2s_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmulh_v2s_v2s_v2s(dst, src, src2)) }
-emit_sqdmulh_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqdmulh_v4s_v4s_v4s(dst, src, src2)) }
+emit_sqdmulh_v4h_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmulh_v4h_v4h_v4h(dst, src, src2)) }
+emit_sqdmulh_v8h_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmulh_v8h_v8h_v8h(dst, src, src2)) }
+emit_sqdmulh_v2s_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmulh_v2s_v2s_v2s(dst, src, src2)) }
+emit_sqdmulh_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqdmulh_v4s_v4s_v4s(dst, src, src2)) }
 inst_sqrdmulh_v4h_v4h_v4h     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQRDMULH, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_sqrdmulh_v8h_v8h_v8h     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQRDMULH, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_sqrdmulh_v2s_v2s_v2s     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQRDMULH, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_sqrdmulh_v4s_v4s_v4s     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SQRDMULH, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
-emit_sqrdmulh_v4h_v4h_v4h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqrdmulh_v4h_v4h_v4h(dst, src, src2)) }
-emit_sqrdmulh_v8h_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqrdmulh_v8h_v8h_v8h(dst, src, src2)) }
-emit_sqrdmulh_v2s_v2s_v2s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqrdmulh_v2s_v2s_v2s(dst, src, src2)) }
-emit_sqrdmulh_v4s_v4s_v4s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sqrdmulh_v4s_v4s_v4s(dst, src, src2)) }
+emit_sqrdmulh_v4h_v4h_v4h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqrdmulh_v4h_v4h_v4h(dst, src, src2)) }
+emit_sqrdmulh_v8h_v8h_v8h     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqrdmulh_v8h_v8h_v8h(dst, src, src2)) }
+emit_sqrdmulh_v2s_v2s_v2s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqrdmulh_v2s_v2s_v2s(dst, src, src2)) }
+emit_sqrdmulh_v4s_v4s_v4s     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sqrdmulh_v4s_v4s_v4s(dst, src, src2)) }
 inst_sdot_v2s_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SDOT, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_sdot_v4s_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SDOT, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
-emit_sdot_v2s_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sdot_v2s_v8b_v8b(dst, src, src2)) }
-emit_sdot_v4s_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sdot_v4s_v16b_v16b(dst, src, src2)) }
+emit_sdot_v2s_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sdot_v2s_v8b_v8b(dst, src, src2)) }
+emit_sdot_v4s_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sdot_v4s_v16b_v16b(dst, src, src2)) }
 inst_udot_v2s_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UDOT, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_udot_v4s_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UDOT, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
-emit_udot_v2s_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_udot_v2s_v8b_v8b(dst, src, src2)) }
-emit_udot_v4s_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_udot_v4s_v16b_v16b(dst, src, src2)) }
+emit_udot_v2s_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_udot_v2s_v8b_v8b(dst, src, src2)) }
+emit_udot_v4s_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_udot_v4s_v16b_v16b(dst, src, src2)) }
 inst_usdot_v2s_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USDOT, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_usdot_v4s_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USDOT, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
-emit_usdot_v2s_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usdot_v2s_v8b_v8b(dst, src, src2)) }
-emit_usdot_v4s_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_usdot_v4s_v16b_v16b(dst, src, src2)) }
+emit_usdot_v2s_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usdot_v2s_v8b_v8b(dst, src, src2)) }
+emit_usdot_v4s_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_usdot_v4s_v16b_v16b(dst, src, src2)) }
 inst_fmla_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMLA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fmla_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMLA, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_fmla_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMLA, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
@@ -2315,14 +2319,14 @@ inst_fmla_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_fmla_zh_zh_zh_i          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .FMLA, operand_count = 4, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), op_lane_index(imm), {}}} }
 inst_fmla_zs_zs_zs_i          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .FMLA, operand_count = 4, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), op_lane_index(imm), {}}} }
 inst_fmla_zd_zd_zd_i          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .FMLA, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_lane_index(imm), {}}} }
-emit_fmla_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmla_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmla_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmla_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmla_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmla_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fmla_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmla_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fmla_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmla_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_fmla_zh_zh_zh_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_fmla_zh_zh_zh_i(rz, rz2, rz3, imm)) }
-emit_fmla_zs_zs_zs_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_fmla_zs_zs_zs_i(rz, rz2, rz3, imm)) }
-emit_fmla_zd_zd_zd_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_fmla_zd_zd_zd_i(rz, rz2, rz3, imm)) }
+emit_fmla_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmla_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmla_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmla_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmla_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmla_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fmla_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmla_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fmla_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmla_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fmla_zh_zh_zh_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_fmla_zh_zh_zh_i(rz, rz2, rz3, imm)) }
+emit_fmla_zs_zs_zs_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_fmla_zs_zs_zs_i(rz, rz2, rz3, imm)) }
+emit_fmla_zd_zd_zd_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_fmla_zd_zd_zd_i(rz, rz2, rz3, imm)) }
 inst_fmls_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMLS, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fmls_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMLS, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_fmls_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMLS, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
@@ -2331,108 +2335,108 @@ inst_fmls_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_fmls_zh_zh_zh_i          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .FMLS, operand_count = 4, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), op_lane_index(imm), {}}} }
 inst_fmls_zs_zs_zs_i          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .FMLS, operand_count = 4, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), op_lane_index(imm), {}}} }
 inst_fmls_zd_zd_zd_i          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .FMLS, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_lane_index(imm), {}}} }
-emit_fmls_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmls_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmls_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmls_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmls_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmls_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fmls_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmls_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fmls_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmls_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
-emit_fmls_zh_zh_zh_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_fmls_zh_zh_zh_i(rz, rz2, rz3, imm)) }
-emit_fmls_zs_zs_zs_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_fmls_zs_zs_zs_i(rz, rz2, rz3, imm)) }
-emit_fmls_zd_zd_zd_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_fmls_zd_zd_zd_i(rz, rz2, rz3, imm)) }
+emit_fmls_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmls_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmls_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmls_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmls_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmls_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fmls_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmls_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fmls_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmls_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fmls_zh_zh_zh_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_fmls_zh_zh_zh_i(rz, rz2, rz3, imm)) }
+emit_fmls_zs_zs_zs_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_fmls_zs_zs_zs_i(rz, rz2, rz3, imm)) }
+emit_fmls_zd_zd_zd_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_fmls_zd_zd_zd_i(rz, rz2, rz3, imm)) }
 inst_fmulx_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMULX, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fmulx_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMULX, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fmulx_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMULX, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_fmulx_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMULX, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_fmulx_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMULX, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_fmulx_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmulx_v2s_v2s_v2s(dst, src, src2)) }
-emit_fmulx_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmulx_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmulx_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmulx_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmulx_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmulx_v4h_v4h_v4h(dst, src, src2)) }
-emit_fmulx_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmulx_v8h_v8h_v8h(dst, src, src2)) }
+emit_fmulx_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmulx_v2s_v2s_v2s(dst, src, src2)) }
+emit_fmulx_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmulx_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmulx_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmulx_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmulx_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmulx_v4h_v4h_v4h(dst, src, src2)) }
+emit_fmulx_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmulx_v8h_v8h_v8h(dst, src, src2)) }
 inst_fmaxp_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fmaxp_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fmaxp_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXP, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_fmaxp_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_fmaxp_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_fmaxp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxp_v2s_v2s_v2s(dst, src, src2)) }
-emit_fmaxp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxp_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmaxp_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxp_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmaxp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxp_v4h_v4h_v4h(dst, src, src2)) }
-emit_fmaxp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxp_v8h_v8h_v8h(dst, src, src2)) }
+emit_fmaxp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxp_v2s_v2s_v2s(dst, src, src2)) }
+emit_fmaxp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxp_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmaxp_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxp_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmaxp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxp_v4h_v4h_v4h(dst, src, src2)) }
+emit_fmaxp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxp_v8h_v8h_v8h(dst, src, src2)) }
 inst_fminp_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fminp_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fminp_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINP, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_fminp_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_fminp_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_fminp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminp_v2s_v2s_v2s(dst, src, src2)) }
-emit_fminp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminp_v4s_v4s_v4s(dst, src, src2)) }
-emit_fminp_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminp_v2d_v2d_v2d(dst, src, src2)) }
-emit_fminp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminp_v4h_v4h_v4h(dst, src, src2)) }
-emit_fminp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminp_v8h_v8h_v8h(dst, src, src2)) }
+emit_fminp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminp_v2s_v2s_v2s(dst, src, src2)) }
+emit_fminp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminp_v4s_v4s_v4s(dst, src, src2)) }
+emit_fminp_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminp_v2d_v2d_v2d(dst, src, src2)) }
+emit_fminp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminp_v4h_v4h_v4h(dst, src, src2)) }
+emit_fminp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminp_v8h_v8h_v8h(dst, src, src2)) }
 inst_fmaxnmp_v2s_v2s_v2s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXNMP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fmaxnmp_v4s_v4s_v4s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXNMP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fmaxnmp_v2d_v2d_v2d      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXNMP, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_fmaxnmp_v4h_v4h_v4h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXNMP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_fmaxnmp_v8h_v8h_v8h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAXNMP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_fmaxnmp_v2s_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnmp_v2s_v2s_v2s(dst, src, src2)) }
-emit_fmaxnmp_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnmp_v4s_v4s_v4s(dst, src, src2)) }
-emit_fmaxnmp_v2d_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnmp_v2d_v2d_v2d(dst, src, src2)) }
-emit_fmaxnmp_v4h_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnmp_v4h_v4h_v4h(dst, src, src2)) }
-emit_fmaxnmp_v8h_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmaxnmp_v8h_v8h_v8h(dst, src, src2)) }
+emit_fmaxnmp_v2s_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnmp_v2s_v2s_v2s(dst, src, src2)) }
+emit_fmaxnmp_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnmp_v4s_v4s_v4s(dst, src, src2)) }
+emit_fmaxnmp_v2d_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnmp_v2d_v2d_v2d(dst, src, src2)) }
+emit_fmaxnmp_v4h_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnmp_v4h_v4h_v4h(dst, src, src2)) }
+emit_fmaxnmp_v8h_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmaxnmp_v8h_v8h_v8h(dst, src, src2)) }
 inst_fminnmp_v2s_v2s_v2s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINNMP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fminnmp_v4s_v4s_v4s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINNMP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fminnmp_v2d_v2d_v2d      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINNMP, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_fminnmp_v4h_v4h_v4h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINNMP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_fminnmp_v8h_v8h_v8h      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMINNMP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_fminnmp_v2s_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnmp_v2s_v2s_v2s(dst, src, src2)) }
-emit_fminnmp_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnmp_v4s_v4s_v4s(dst, src, src2)) }
-emit_fminnmp_v2d_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnmp_v2d_v2d_v2d(dst, src, src2)) }
-emit_fminnmp_v4h_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnmp_v4h_v4h_v4h(dst, src, src2)) }
-emit_fminnmp_v8h_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fminnmp_v8h_v8h_v8h(dst, src, src2)) }
+emit_fminnmp_v2s_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnmp_v2s_v2s_v2s(dst, src, src2)) }
+emit_fminnmp_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnmp_v4s_v4s_v4s(dst, src, src2)) }
+emit_fminnmp_v2d_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnmp_v2d_v2d_v2d(dst, src, src2)) }
+emit_fminnmp_v4h_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnmp_v4h_v4h_v4h(dst, src, src2)) }
+emit_fminnmp_v8h_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fminnmp_v8h_v8h_v8h(dst, src, src2)) }
 inst_fmaxv_r_v4s              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fmaxv_r_v4h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fmaxv_r_v8h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMAXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fmaxv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmaxv_r_v4s(dst, src)) }
-emit_fmaxv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmaxv_r_v4h(dst, src)) }
-emit_fmaxv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmaxv_r_v8h(dst, src)) }
+emit_fmaxv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmaxv_r_v4s(dst, src)) }
+emit_fmaxv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmaxv_r_v4h(dst, src)) }
+emit_fmaxv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmaxv_r_v8h(dst, src)) }
 inst_fminv_r_v4s              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fminv_r_v4h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fminv_r_v8h              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMINV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fminv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fminv_r_v4s(dst, src)) }
-emit_fminv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fminv_r_v4h(dst, src)) }
-emit_fminv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fminv_r_v8h(dst, src)) }
+emit_fminv_r_v4s              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fminv_r_v4s(dst, src)) }
+emit_fminv_r_v4h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fminv_r_v4h(dst, src)) }
+emit_fminv_r_v8h              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fminv_r_v8h(dst, src)) }
 inst_fmaxnmv_r_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMAXNMV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fmaxnmv_r_v4h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMAXNMV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fmaxnmv_r_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMAXNMV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fmaxnmv_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmaxnmv_r_v4s(dst, src)) }
-emit_fmaxnmv_r_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmaxnmv_r_v4h(dst, src)) }
-emit_fmaxnmv_r_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmaxnmv_r_v8h(dst, src)) }
+emit_fmaxnmv_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmaxnmv_r_v4s(dst, src)) }
+emit_fmaxnmv_r_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmaxnmv_r_v4h(dst, src)) }
+emit_fmaxnmv_r_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmaxnmv_r_v8h(dst, src)) }
 inst_fminnmv_r_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMINNMV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fminnmv_r_v4h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMINNMV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fminnmv_r_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMINNMV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_8h(src), {}, {}, {}}} }
-emit_fminnmv_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fminnmv_r_v4s(dst, src)) }
-emit_fminnmv_r_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fminnmv_r_v4h(dst, src)) }
-emit_fminnmv_r_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fminnmv_r_v8h(dst, src)) }
+emit_fminnmv_r_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fminnmv_r_v4s(dst, src)) }
+emit_fminnmv_r_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fminnmv_r_v4h(dst, src)) }
+emit_fminnmv_r_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fminnmv_r_v8h(dst, src)) }
 inst_frecpe_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRECPE, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frecpe_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRECPE, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_frecpe_v2d_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRECPE, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_frecpe_v4h_v4h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRECPE, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_frecpe_v8h_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRECPE, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_frecpe_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frecpe_v2s_v2s(dst, src)) }
-emit_frecpe_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frecpe_v4s_v4s(dst, src)) }
-emit_frecpe_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frecpe_v2d_v2d(dst, src)) }
-emit_frecpe_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frecpe_v4h_v4h(dst, src)) }
-emit_frecpe_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frecpe_v8h_v8h(dst, src)) }
+emit_frecpe_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frecpe_v2s_v2s(dst, src)) }
+emit_frecpe_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frecpe_v4s_v4s(dst, src)) }
+emit_frecpe_v2d_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frecpe_v2d_v2d(dst, src)) }
+emit_frecpe_v4h_v4h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frecpe_v4h_v4h(dst, src)) }
+emit_frecpe_v8h_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frecpe_v8h_v8h(dst, src)) }
 inst_frsqrte_v2s_v2s          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTE, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_frsqrte_v4s_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTE, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_frsqrte_v2d_v2d          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTE, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
 inst_frsqrte_v4h_v4h          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTE, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_frsqrte_v8h_v8h          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTE, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
-emit_frsqrte_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrte_v2s_v2s(dst, src)) }
-emit_frsqrte_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrte_v4s_v4s(dst, src)) }
-emit_frsqrte_v2d_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrte_v2d_v2d(dst, src)) }
-emit_frsqrte_v4h_v4h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrte_v4h_v4h(dst, src)) }
-emit_frsqrte_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrte_v8h_v8h(dst, src)) }
+emit_frsqrte_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrte_v2s_v2s(dst, src)) }
+emit_frsqrte_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrte_v4s_v4s(dst, src)) }
+emit_frsqrte_v2d_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrte_v2d_v2d(dst, src)) }
+emit_frsqrte_v4h_v4h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrte_v4h_v4h(dst, src)) }
+emit_frsqrte_v8h_v8h          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrte_v8h_v8h(dst, src)) }
 inst_frecps_v2s_v2s_v2s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FRECPS, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_frecps_v4s_v4s_v4s       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FRECPS, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_frecps_v2d_v2d_v2d       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FRECPS, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
@@ -2441,14 +2445,14 @@ inst_frecps_v8h_v8h_v8h       :: #force_inline proc "contextless" (dst: Register
 inst_frecps_zh_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRECPS, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_frecps_zs_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRECPS, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_frecps_zd_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRECPS, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_frecps_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frecps_v2s_v2s_v2s(dst, src, src2)) }
-emit_frecps_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frecps_v4s_v4s_v4s(dst, src, src2)) }
-emit_frecps_v2d_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frecps_v2d_v2d_v2d(dst, src, src2)) }
-emit_frecps_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frecps_v4h_v4h_v4h(dst, src, src2)) }
-emit_frecps_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frecps_v8h_v8h_v8h(dst, src, src2)) }
-emit_frecps_zh_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frecps_zh_zh_zh(rz, rz2, rz3)) }
-emit_frecps_zs_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frecps_zs_zs_zs(rz, rz2, rz3)) }
-emit_frecps_zd_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frecps_zd_zd_zd(rz, rz2, rz3)) }
+emit_frecps_v2s_v2s_v2s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frecps_v2s_v2s_v2s(dst, src, src2)) }
+emit_frecps_v4s_v4s_v4s       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frecps_v4s_v4s_v4s(dst, src, src2)) }
+emit_frecps_v2d_v2d_v2d       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frecps_v2d_v2d_v2d(dst, src, src2)) }
+emit_frecps_v4h_v4h_v4h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frecps_v4h_v4h_v4h(dst, src, src2)) }
+emit_frecps_v8h_v8h_v8h       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frecps_v8h_v8h_v8h(dst, src, src2)) }
+emit_frecps_zh_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frecps_zh_zh_zh(rz, rz2, rz3)) }
+emit_frecps_zs_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frecps_zs_zs_zs(rz, rz2, rz3)) }
+emit_frecps_zd_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frecps_zd_zd_zd(rz, rz2, rz3)) }
 inst_frsqrts_v2s_v2s_v2s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTS, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_frsqrts_v4s_v4s_v4s      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTS, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_frsqrts_v2d_v2d_v2d      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTS, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
@@ -2457,52 +2461,52 @@ inst_frsqrts_v8h_v8h_v8h      :: #force_inline proc "contextless" (dst: Register
 inst_frsqrts_zh_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRSQRTS, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_frsqrts_zs_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRSQRTS, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_frsqrts_zd_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRSQRTS, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_frsqrts_v2s_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frsqrts_v2s_v2s_v2s(dst, src, src2)) }
-emit_frsqrts_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frsqrts_v4s_v4s_v4s(dst, src, src2)) }
-emit_frsqrts_v2d_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frsqrts_v2d_v2d_v2d(dst, src, src2)) }
-emit_frsqrts_v4h_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frsqrts_v4h_v4h_v4h(dst, src, src2)) }
-emit_frsqrts_v8h_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_frsqrts_v8h_v8h_v8h(dst, src, src2)) }
-emit_frsqrts_zh_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frsqrts_zh_zh_zh(rz, rz2, rz3)) }
-emit_frsqrts_zs_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frsqrts_zs_zs_zs(rz, rz2, rz3)) }
-emit_frsqrts_zd_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frsqrts_zd_zd_zd(rz, rz2, rz3)) }
+emit_frsqrts_v2s_v2s_v2s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frsqrts_v2s_v2s_v2s(dst, src, src2)) }
+emit_frsqrts_v4s_v4s_v4s      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frsqrts_v4s_v4s_v4s(dst, src, src2)) }
+emit_frsqrts_v2d_v2d_v2d      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frsqrts_v2d_v2d_v2d(dst, src, src2)) }
+emit_frsqrts_v4h_v4h_v4h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frsqrts_v4h_v4h_v4h(dst, src, src2)) }
+emit_frsqrts_v8h_v8h_v8h      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_frsqrts_v8h_v8h_v8h(dst, src, src2)) }
+emit_frsqrts_zh_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frsqrts_zh_zh_zh(rz, rz2, rz3)) }
+emit_frsqrts_zs_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frsqrts_zs_zs_zs(rz, rz2, rz3)) }
+emit_frsqrts_zd_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frsqrts_zd_zd_zd(rz, rz2, rz3)) }
 inst_frecpx_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.FRECPX, dst, src) }
 inst_frecpx_zh_p_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRECPX, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_frecpx_zs_p_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRECPX, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_frecpx_zd_p_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FRECPX, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_frecpx_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frecpx_r_r(dst, src)) }
-emit_frecpx_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frecpx_zh_p_zh(rz, rz2, rz3)) }
-emit_frecpx_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frecpx_zs_p_zs(rz, rz2, rz3)) }
-emit_frecpx_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_frecpx_zd_p_zd(rz, rz2, rz3)) }
+emit_frecpx_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frecpx_r_r(dst, src)) }
+emit_frecpx_zh_p_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frecpx_zh_p_zh(rz, rz2, rz3)) }
+emit_frecpx_zs_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frecpx_zs_p_zs(rz, rz2, rz3)) }
+emit_frecpx_zd_p_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_frecpx_zd_p_zd(rz, rz2, rz3)) }
 inst_faddp_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADDP, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_faddp_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADDP, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_faddp_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADDP, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_faddp_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADDP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_faddp_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADDP, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_faddp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_faddp_v2s_v2s_v2s(dst, src, src2)) }
-emit_faddp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_faddp_v4s_v4s_v4s(dst, src, src2)) }
-emit_faddp_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_faddp_v2d_v2d_v2d(dst, src, src2)) }
-emit_faddp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_faddp_v4h_v4h_v4h(dst, src, src2)) }
-emit_faddp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_faddp_v8h_v8h_v8h(dst, src, src2)) }
+emit_faddp_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_faddp_v2s_v2s_v2s(dst, src, src2)) }
+emit_faddp_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_faddp_v4s_v4s_v4s(dst, src, src2)) }
+emit_faddp_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_faddp_v2d_v2d_v2d(dst, src, src2)) }
+emit_faddp_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_faddp_v4h_v4h_v4h(dst, src, src2)) }
+emit_faddp_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_faddp_v8h_v8h_v8h(dst, src, src2)) }
 inst_fcvtl_v4s_v4h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTL, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4h(src), {}, {}, {}}} }
 inst_fcvtl_v2d_v2s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTL, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2s(src), {}, {}, {}}} }
-emit_fcvtl_v4s_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtl_v4s_v4h(dst, src)) }
-emit_fcvtl_v2d_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtl_v2d_v2s(dst, src)) }
+emit_fcvtl_v4s_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtl_v4s_v4h(dst, src)) }
+emit_fcvtl_v2d_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtl_v2d_v2s(dst, src)) }
 inst_fcvtl2_v4s_v8h           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTL2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_8h(src), {}, {}, {}}} }
 inst_fcvtl2_v2d_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTL2, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_4s(src), {}, {}, {}}} }
-emit_fcvtl2_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtl2_v4s_v8h(dst, src)) }
-emit_fcvtl2_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtl2_v2d_v4s(dst, src)) }
+emit_fcvtl2_v4s_v8h           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtl2_v4s_v8h(dst, src)) }
+emit_fcvtl2_v2d_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtl2_v2d_v4s(dst, src)) }
 inst_fcvtn_v4h_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTN, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtn_v2s_v2d            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTN, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_fcvtn_v4h_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtn_v4h_v4s(dst, src)) }
-emit_fcvtn_v2s_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtn_v2s_v2d(dst, src)) }
+emit_fcvtn_v4h_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtn_v4h_v4s(dst, src)) }
+emit_fcvtn_v2s_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtn_v2s_v2d(dst, src)) }
 inst_fcvtn2_v8h_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTN2, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcvtn2_v4s_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTN2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_fcvtn2_v8h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtn2_v8h_v4s(dst, src)) }
-emit_fcvtn2_v4s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtn2_v4s_v2d(dst, src)) }
+emit_fcvtn2_v8h_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtn2_v8h_v4s(dst, src)) }
+emit_fcvtn2_v4s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtn2_v4s_v2d(dst, src)) }
 inst_fcvtxn_v2s_v2d           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTXN, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_fcvtxn_v2s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtxn_v2s_v2d(dst, src)) }
+emit_fcvtxn_v2s_v2d           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtxn_v2s_v2d(dst, src)) }
 inst_fcvtxn2_v4s_v2d          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCVTXN2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_2d(src), {}, {}, {}}} }
-emit_fcvtxn2_v4s_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcvtxn2_v4s_v2d(dst, src)) }
+emit_fcvtxn2_v4s_v2d          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcvtxn2_v4s_v2d(dst, src)) }
 inst_fcmeq_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMEQ, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fcmeq_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMEQ, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fcmeq_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMEQ, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
@@ -2511,14 +2515,14 @@ inst_fcmeq_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register
 inst_fcmeq_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMEQ, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fcmeq_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMEQ, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fcmeq_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMEQ, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fcmeq_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmeq_v2s_v2s_v2s(dst, src, src2)) }
-emit_fcmeq_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmeq_v4s_v4s_v4s(dst, src, src2)) }
-emit_fcmeq_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmeq_v2d_v2d_v2d(dst, src, src2)) }
-emit_fcmeq_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmeq_v4h_v4h_v4h(dst, src, src2)) }
-emit_fcmeq_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmeq_v8h_v8h_v8h(dst, src, src2)) }
-emit_fcmeq_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmeq_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fcmeq_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmeq_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fcmeq_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmeq_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fcmeq_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmeq_v2s_v2s_v2s(dst, src, src2)) }
+emit_fcmeq_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmeq_v4s_v4s_v4s(dst, src, src2)) }
+emit_fcmeq_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmeq_v2d_v2d_v2d(dst, src, src2)) }
+emit_fcmeq_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmeq_v4h_v4h_v4h(dst, src, src2)) }
+emit_fcmeq_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmeq_v8h_v8h_v8h(dst, src, src2)) }
+emit_fcmeq_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmeq_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fcmeq_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmeq_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fcmeq_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmeq_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fcmge_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMGE, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fcmge_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMGE, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fcmge_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMGE, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
@@ -2527,14 +2531,14 @@ inst_fcmge_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register
 inst_fcmge_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMGE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fcmge_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMGE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fcmge_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMGE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fcmge_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmge_v2s_v2s_v2s(dst, src, src2)) }
-emit_fcmge_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmge_v4s_v4s_v4s(dst, src, src2)) }
-emit_fcmge_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmge_v2d_v2d_v2d(dst, src, src2)) }
-emit_fcmge_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmge_v4h_v4h_v4h(dst, src, src2)) }
-emit_fcmge_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmge_v8h_v8h_v8h(dst, src, src2)) }
-emit_fcmge_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmge_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fcmge_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmge_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fcmge_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmge_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fcmge_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmge_v2s_v2s_v2s(dst, src, src2)) }
+emit_fcmge_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmge_v4s_v4s_v4s(dst, src, src2)) }
+emit_fcmge_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmge_v2d_v2d_v2d(dst, src, src2)) }
+emit_fcmge_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmge_v4h_v4h_v4h(dst, src, src2)) }
+emit_fcmge_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmge_v8h_v8h_v8h(dst, src, src2)) }
+emit_fcmge_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmge_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fcmge_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmge_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fcmge_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmge_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fcmgt_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMGT, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_fcmgt_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMGT, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_fcmgt_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMGT, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
@@ -2543,14 +2547,14 @@ inst_fcmgt_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register
 inst_fcmgt_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMGT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fcmgt_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMGT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fcmgt_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMGT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fcmgt_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmgt_v2s_v2s_v2s(dst, src, src2)) }
-emit_fcmgt_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmgt_v4s_v4s_v4s(dst, src, src2)) }
-emit_fcmgt_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmgt_v2d_v2d_v2d(dst, src, src2)) }
-emit_fcmgt_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmgt_v4h_v4h_v4h(dst, src, src2)) }
-emit_fcmgt_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmgt_v8h_v8h_v8h(dst, src, src2)) }
-emit_fcmgt_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmgt_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fcmgt_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmgt_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fcmgt_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmgt_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fcmgt_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmgt_v2s_v2s_v2s(dst, src, src2)) }
+emit_fcmgt_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmgt_v4s_v4s_v4s(dst, src, src2)) }
+emit_fcmgt_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmgt_v2d_v2d_v2d(dst, src, src2)) }
+emit_fcmgt_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmgt_v4h_v4h_v4h(dst, src, src2)) }
+emit_fcmgt_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmgt_v8h_v8h_v8h(dst, src, src2)) }
+emit_fcmgt_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmgt_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fcmgt_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmgt_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fcmgt_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmgt_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fcmle_v2s_v2s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCMLE, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcmle_v4s_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCMLE, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcmle_v2d_v2d            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCMLE, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
@@ -2559,14 +2563,14 @@ inst_fcmle_v8h_v8h            :: #force_inline proc "contextless" (dst: Register
 inst_fcmle_ph_p_zh            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FCMLE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_fcmle_ps_p_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FCMLE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_fcmle_pd_p_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FCMLE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_fcmle_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmle_v2s_v2s(dst, src)) }
-emit_fcmle_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmle_v4s_v4s(dst, src)) }
-emit_fcmle_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmle_v2d_v2d(dst, src)) }
-emit_fcmle_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmle_v4h_v4h(dst, src)) }
-emit_fcmle_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmle_v8h_v8h(dst, src)) }
-emit_fcmle_ph_p_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fcmle_ph_p_zh(rz, rz2, rz3)) }
-emit_fcmle_ps_p_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fcmle_ps_p_zs(rz, rz2, rz3)) }
-emit_fcmle_pd_p_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fcmle_pd_p_zd(rz, rz2, rz3)) }
+emit_fcmle_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmle_v2s_v2s(dst, src)) }
+emit_fcmle_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmle_v4s_v4s(dst, src)) }
+emit_fcmle_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmle_v2d_v2d(dst, src)) }
+emit_fcmle_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmle_v4h_v4h(dst, src)) }
+emit_fcmle_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmle_v8h_v8h(dst, src)) }
+emit_fcmle_ph_p_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fcmle_ph_p_zh(rz, rz2, rz3)) }
+emit_fcmle_ps_p_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fcmle_ps_p_zs(rz, rz2, rz3)) }
+emit_fcmle_pd_p_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fcmle_pd_p_zd(rz, rz2, rz3)) }
 inst_fcmlt_v2s_v2s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCMLT, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_fcmlt_v4s_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCMLT, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_fcmlt_v2d_v2d            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCMLT, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
@@ -2575,42 +2579,42 @@ inst_fcmlt_v8h_v8h            :: #force_inline proc "contextless" (dst: Register
 inst_fcmlt_ph_p_zh            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FCMLT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_fcmlt_ps_p_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FCMLT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_fcmlt_pd_p_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FCMLT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_fcmlt_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmlt_v2s_v2s(dst, src)) }
-emit_fcmlt_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmlt_v4s_v4s(dst, src)) }
-emit_fcmlt_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmlt_v2d_v2d(dst, src)) }
-emit_fcmlt_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmlt_v4h_v4h(dst, src)) }
-emit_fcmlt_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcmlt_v8h_v8h(dst, src)) }
-emit_fcmlt_ph_p_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fcmlt_ph_p_zh(rz, rz2, rz3)) }
-emit_fcmlt_ps_p_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fcmlt_ps_p_zs(rz, rz2, rz3)) }
-emit_fcmlt_pd_p_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_fcmlt_pd_p_zd(rz, rz2, rz3)) }
+emit_fcmlt_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmlt_v2s_v2s(dst, src)) }
+emit_fcmlt_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmlt_v4s_v4s(dst, src)) }
+emit_fcmlt_v2d_v2d            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmlt_v2d_v2d(dst, src)) }
+emit_fcmlt_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmlt_v4h_v4h(dst, src)) }
+emit_fcmlt_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcmlt_v8h_v8h(dst, src)) }
+emit_fcmlt_ph_p_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fcmlt_ph_p_zh(rz, rz2, rz3)) }
+emit_fcmlt_ps_p_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fcmlt_ps_p_zs(rz, rz2, rz3)) }
+emit_fcmlt_pd_p_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_fcmlt_pd_p_zd(rz, rz2, rz3)) }
 inst_facge_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGE, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_facge_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGE, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_facge_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGE, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_facge_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGE, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_facge_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGE, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_facge_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facge_v2s_v2s_v2s(dst, src, src2)) }
-emit_facge_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facge_v4s_v4s_v4s(dst, src, src2)) }
-emit_facge_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facge_v2d_v2d_v2d(dst, src, src2)) }
-emit_facge_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facge_v4h_v4h_v4h(dst, src, src2)) }
-emit_facge_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facge_v8h_v8h_v8h(dst, src, src2)) }
+emit_facge_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facge_v2s_v2s_v2s(dst, src, src2)) }
+emit_facge_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facge_v4s_v4s_v4s(dst, src, src2)) }
+emit_facge_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facge_v2d_v2d_v2d(dst, src, src2)) }
+emit_facge_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facge_v4h_v4h_v4h(dst, src, src2)) }
+emit_facge_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facge_v8h_v8h_v8h(dst, src, src2)) }
 inst_facgt_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGT, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_facgt_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGT, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_facgt_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGT, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
 inst_facgt_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGT, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
 inst_facgt_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FACGT, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
-emit_facgt_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facgt_v2s_v2s_v2s(dst, src, src2)) }
-emit_facgt_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facgt_v4s_v4s_v4s(dst, src, src2)) }
-emit_facgt_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facgt_v2d_v2d_v2d(dst, src, src2)) }
-emit_facgt_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facgt_v4h_v4h_v4h(dst, src, src2)) }
-emit_facgt_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_facgt_v8h_v8h_v8h(dst, src, src2)) }
+emit_facgt_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facgt_v2s_v2s_v2s(dst, src, src2)) }
+emit_facgt_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facgt_v4s_v4s_v4s(dst, src, src2)) }
+emit_facgt_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facgt_v2d_v2d_v2d(dst, src, src2)) }
+emit_facgt_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facgt_v4h_v4h_v4h(dst, src, src2)) }
+emit_facgt_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_facgt_v8h_v8h_v8h(dst, src, src2)) }
 inst_cmeq_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMEQ, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_cmeq_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMEQ, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), {}, {}}} }
 inst_cmeq_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMEQ, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_cmeq_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMEQ, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_cmeq_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmeq_v16b_v16b_v16b(dst, src, src2)) }
-emit_cmeq_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmeq_v8h_v8h_v8h(dst, src, src2)) }
-emit_cmeq_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmeq_v4s_v4s_v4s(dst, src, src2)) }
-emit_cmeq_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmeq_v2d_v2d_v2d(dst, src, src2)) }
+emit_cmeq_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmeq_v16b_v16b_v16b(dst, src, src2)) }
+emit_cmeq_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmeq_v8h_v8h_v8h(dst, src, src2)) }
+emit_cmeq_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmeq_v4s_v4s_v4s(dst, src, src2)) }
+emit_cmeq_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmeq_v2d_v2d_v2d(dst, src, src2)) }
 inst_cmge_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMGE, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_cmge_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMGE, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_cmge_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMGE, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -2618,21 +2622,21 @@ inst_cmge_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register
 inst_cmge_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMGE, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_cmge_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMGE, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_cmge_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMGE, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_cmge_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmge_v8b_v8b_v8b(dst, src, src2)) }
-emit_cmge_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmge_v16b_v16b_v16b(dst, src, src2)) }
-emit_cmge_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmge_v4h_v4h_v4h(dst, src, src2)) }
-emit_cmge_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmge_v8h_v8h_v8h(dst, src, src2)) }
-emit_cmge_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmge_v2s_v2s_v2s(dst, src, src2)) }
-emit_cmge_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmge_v4s_v4s_v4s(dst, src, src2)) }
-emit_cmge_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmge_v2d_v2d_v2d(dst, src, src2)) }
+emit_cmge_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmge_v8b_v8b_v8b(dst, src, src2)) }
+emit_cmge_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmge_v16b_v16b_v16b(dst, src, src2)) }
+emit_cmge_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmge_v4h_v4h_v4h(dst, src, src2)) }
+emit_cmge_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmge_v8h_v8h_v8h(dst, src, src2)) }
+emit_cmge_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmge_v2s_v2s_v2s(dst, src, src2)) }
+emit_cmge_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmge_v4s_v4s_v4s(dst, src, src2)) }
+emit_cmge_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmge_v2d_v2d_v2d(dst, src, src2)) }
 inst_cmgt_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMGT, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_cmgt_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMGT, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_cmgt_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmgt_v16b_v16b_v16b(dst, src, src2)) }
-emit_cmgt_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmgt_v2d_v2d_v2d(dst, src, src2)) }
+emit_cmgt_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmgt_v16b_v16b_v16b(dst, src, src2)) }
+emit_cmgt_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmgt_v2d_v2d_v2d(dst, src, src2)) }
 inst_cmhi_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMHI, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_cmhi_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMHI, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_cmhi_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhi_v16b_v16b_v16b(dst, src, src2)) }
-emit_cmhi_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhi_v2d_v2d_v2d(dst, src, src2)) }
+emit_cmhi_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhi_v16b_v16b_v16b(dst, src, src2)) }
+emit_cmhi_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhi_v2d_v2d_v2d(dst, src, src2)) }
 inst_cmhs_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMHS, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_cmhs_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMHS, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_cmhs_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMHS, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -2640,13 +2644,13 @@ inst_cmhs_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register
 inst_cmhs_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMHS, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_cmhs_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMHS, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_cmhs_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMHS, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_cmhs_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhs_v8b_v8b_v8b(dst, src, src2)) }
-emit_cmhs_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhs_v16b_v16b_v16b(dst, src, src2)) }
-emit_cmhs_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhs_v4h_v4h_v4h(dst, src, src2)) }
-emit_cmhs_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhs_v8h_v8h_v8h(dst, src, src2)) }
-emit_cmhs_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhs_v2s_v2s_v2s(dst, src, src2)) }
-emit_cmhs_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhs_v4s_v4s_v4s(dst, src, src2)) }
-emit_cmhs_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmhs_v2d_v2d_v2d(dst, src, src2)) }
+emit_cmhs_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhs_v8b_v8b_v8b(dst, src, src2)) }
+emit_cmhs_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhs_v16b_v16b_v16b(dst, src, src2)) }
+emit_cmhs_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhs_v4h_v4h_v4h(dst, src, src2)) }
+emit_cmhs_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhs_v8h_v8h_v8h(dst, src, src2)) }
+emit_cmhs_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhs_v2s_v2s_v2s(dst, src, src2)) }
+emit_cmhs_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhs_v4s_v4s_v4s(dst, src, src2)) }
+emit_cmhs_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmhs_v2d_v2d_v2d(dst, src, src2)) }
 inst_cmle_v8b_v8b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLE, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_cmle_v16b_v16b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLE, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_cmle_v4h_v4h             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLE, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
@@ -2654,13 +2658,13 @@ inst_cmle_v8h_v8h             :: #force_inline proc "contextless" (dst: Register
 inst_cmle_v2s_v2s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLE, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_cmle_v4s_v4s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLE, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_cmle_v2d_v2d             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLE, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
-emit_cmle_v8b_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmle_v8b_v8b(dst, src)) }
-emit_cmle_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmle_v16b_v16b(dst, src)) }
-emit_cmle_v4h_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmle_v4h_v4h(dst, src)) }
-emit_cmle_v8h_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmle_v8h_v8h(dst, src)) }
-emit_cmle_v2s_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmle_v2s_v2s(dst, src)) }
-emit_cmle_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmle_v4s_v4s(dst, src)) }
-emit_cmle_v2d_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmle_v2d_v2d(dst, src)) }
+emit_cmle_v8b_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmle_v8b_v8b(dst, src)) }
+emit_cmle_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmle_v16b_v16b(dst, src)) }
+emit_cmle_v4h_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmle_v4h_v4h(dst, src)) }
+emit_cmle_v8h_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmle_v8h_v8h(dst, src)) }
+emit_cmle_v2s_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmle_v2s_v2s(dst, src)) }
+emit_cmle_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmle_v4s_v4s(dst, src)) }
+emit_cmle_v2d_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmle_v2d_v2d(dst, src)) }
 inst_cmlt_v8b_v8b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLT, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_cmlt_v16b_v16b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLT, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_cmlt_v4h_v4h             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLT, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
@@ -2668,13 +2672,13 @@ inst_cmlt_v8h_v8h             :: #force_inline proc "contextless" (dst: Register
 inst_cmlt_v2s_v2s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLT, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_cmlt_v4s_v4s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLT, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
 inst_cmlt_v2d_v2d             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CMLT, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2d(src), {}, {}, {}}} }
-emit_cmlt_v8b_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmlt_v8b_v8b(dst, src)) }
-emit_cmlt_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmlt_v16b_v16b(dst, src)) }
-emit_cmlt_v4h_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmlt_v4h_v4h(dst, src)) }
-emit_cmlt_v8h_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmlt_v8h_v8h(dst, src)) }
-emit_cmlt_v2s_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmlt_v2s_v2s(dst, src)) }
-emit_cmlt_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmlt_v4s_v4s(dst, src)) }
-emit_cmlt_v2d_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cmlt_v2d_v2d(dst, src)) }
+emit_cmlt_v8b_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmlt_v8b_v8b(dst, src)) }
+emit_cmlt_v16b_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmlt_v16b_v16b(dst, src)) }
+emit_cmlt_v4h_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmlt_v4h_v4h(dst, src)) }
+emit_cmlt_v8h_v8h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmlt_v8h_v8h(dst, src)) }
+emit_cmlt_v2s_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmlt_v2s_v2s(dst, src)) }
+emit_cmlt_v4s_v4s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmlt_v4s_v4s(dst, src)) }
+emit_cmlt_v2d_v2d             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cmlt_v2d_v2d(dst, src)) }
 inst_cmtst_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMTST, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_cmtst_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMTST, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_cmtst_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMTST, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -2682,27 +2686,27 @@ inst_cmtst_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register
 inst_cmtst_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMTST, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_cmtst_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMTST, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_cmtst_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMTST, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_cmtst_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmtst_v8b_v8b_v8b(dst, src, src2)) }
-emit_cmtst_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmtst_v16b_v16b_v16b(dst, src, src2)) }
-emit_cmtst_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmtst_v4h_v4h_v4h(dst, src, src2)) }
-emit_cmtst_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmtst_v8h_v8h_v8h(dst, src, src2)) }
-emit_cmtst_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmtst_v2s_v2s_v2s(dst, src, src2)) }
-emit_cmtst_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmtst_v4s_v4s_v4s(dst, src, src2)) }
-emit_cmtst_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmtst_v2d_v2d_v2d(dst, src, src2)) }
+emit_cmtst_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmtst_v8b_v8b_v8b(dst, src, src2)) }
+emit_cmtst_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmtst_v16b_v16b_v16b(dst, src, src2)) }
+emit_cmtst_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmtst_v4h_v4h_v4h(dst, src, src2)) }
+emit_cmtst_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmtst_v8h_v8h_v8h(dst, src, src2)) }
+emit_cmtst_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmtst_v2s_v2s_v2s(dst, src, src2)) }
+emit_cmtst_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmtst_v4s_v4s_v4s(dst, src, src2)) }
+emit_cmtst_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmtst_v2d_v2d_v2d(dst, src, src2)) }
 inst_mvn_v8b_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MVN, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_mvn_v16b_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MVN, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_mvn_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.MVN, dst, src) }
-emit_mvn_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mvn_v8b_v8b(dst, src)) }
-emit_mvn_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mvn_v16b_v16b(dst, src)) }
-emit_mvn_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mvn_r_r(dst, src)) }
+emit_mvn_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mvn_v8b_v8b(dst, src)) }
+emit_mvn_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mvn_v16b_v16b(dst, src)) }
+emit_mvn_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mvn_r_r(dst, src)) }
 inst_bit_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BIT, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
-emit_bit_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bit_v16b_v16b_v16b(dst, src, src2)) }
+emit_bit_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bit_v16b_v16b_v16b(dst, src, src2)) }
 inst_bif_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BIF, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
-emit_bif_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bif_v16b_v16b_v16b(dst, src, src2)) }
+emit_bif_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bif_v16b_v16b_v16b(dst, src, src2)) }
 inst_bsl_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BSL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_bsl_zd_zd_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BSL, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_bsl_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bsl_v16b_v16b_v16b(dst, src, src2)) }
-emit_bsl_zd_zd_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bsl_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
+emit_bsl_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bsl_v16b_v16b_v16b(dst, src, src2)) }
+emit_bsl_zd_zd_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bsl_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
 inst_shl_v8b_v8b_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHL, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_shl_v16b_v16b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_shl_v4h_v4h_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHL, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2710,13 +2714,13 @@ inst_shl_v8h_v8h_i            :: #force_inline proc "contextless" (dst: Register
 inst_shl_v2s_v2s_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHL, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_shl_v4s_v4s_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_shl_v2d_v2d_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_shl_v8b_v8b_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shl_v8b_v8b_i(dst, src, imm)) }
-emit_shl_v16b_v16b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shl_v16b_v16b_i(dst, src, imm)) }
-emit_shl_v4h_v4h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shl_v4h_v4h_i(dst, src, imm)) }
-emit_shl_v8h_v8h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shl_v8h_v8h_i(dst, src, imm)) }
-emit_shl_v2s_v2s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shl_v2s_v2s_i(dst, src, imm)) }
-emit_shl_v4s_v4s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shl_v4s_v4s_i(dst, src, imm)) }
-emit_shl_v2d_v2d_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shl_v2d_v2d_i(dst, src, imm)) }
+emit_shl_v8b_v8b_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shl_v8b_v8b_i(dst, src, imm)) }
+emit_shl_v16b_v16b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shl_v16b_v16b_i(dst, src, imm)) }
+emit_shl_v4h_v4h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shl_v4h_v4h_i(dst, src, imm)) }
+emit_shl_v8h_v8h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shl_v8h_v8h_i(dst, src, imm)) }
+emit_shl_v2s_v2s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shl_v2s_v2s_i(dst, src, imm)) }
+emit_shl_v4s_v4s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shl_v4s_v4s_i(dst, src, imm)) }
+emit_shl_v2d_v2d_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shl_v2d_v2d_i(dst, src, imm)) }
 inst_sqshl_v8b_v8b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHL, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshl_v16b_v16b_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshl_v4h_v4h_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHL, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2724,13 +2728,13 @@ inst_sqshl_v8h_v8h_i          :: #force_inline proc "contextless" (dst: Register
 inst_sqshl_v2s_v2s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHL, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshl_v4s_v4s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshl_v2d_v2d_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqshl_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshl_v8b_v8b_i(dst, src, imm)) }
-emit_sqshl_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshl_v16b_v16b_i(dst, src, imm)) }
-emit_sqshl_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshl_v4h_v4h_i(dst, src, imm)) }
-emit_sqshl_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshl_v8h_v8h_i(dst, src, imm)) }
-emit_sqshl_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshl_v2s_v2s_i(dst, src, imm)) }
-emit_sqshl_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshl_v4s_v4s_i(dst, src, imm)) }
-emit_sqshl_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshl_v2d_v2d_i(dst, src, imm)) }
+emit_sqshl_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshl_v8b_v8b_i(dst, src, imm)) }
+emit_sqshl_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshl_v16b_v16b_i(dst, src, imm)) }
+emit_sqshl_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshl_v4h_v4h_i(dst, src, imm)) }
+emit_sqshl_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshl_v8h_v8h_i(dst, src, imm)) }
+emit_sqshl_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshl_v2s_v2s_i(dst, src, imm)) }
+emit_sqshl_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshl_v4s_v4s_i(dst, src, imm)) }
+emit_sqshl_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshl_v2d_v2d_i(dst, src, imm)) }
 inst_sqshlu_v8b_v8b_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHLU, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshlu_v16b_v16b_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHLU, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshlu_v4h_v4h_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHLU, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2738,13 +2742,13 @@ inst_sqshlu_v8h_v8h_i         :: #force_inline proc "contextless" (dst: Register
 inst_sqshlu_v2s_v2s_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHLU, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshlu_v4s_v4s_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHLU, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshlu_v2d_v2d_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHLU, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqshlu_v8b_v8b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshlu_v8b_v8b_i(dst, src, imm)) }
-emit_sqshlu_v16b_v16b_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshlu_v16b_v16b_i(dst, src, imm)) }
-emit_sqshlu_v4h_v4h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshlu_v4h_v4h_i(dst, src, imm)) }
-emit_sqshlu_v8h_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshlu_v8h_v8h_i(dst, src, imm)) }
-emit_sqshlu_v2s_v2s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshlu_v2s_v2s_i(dst, src, imm)) }
-emit_sqshlu_v4s_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshlu_v4s_v4s_i(dst, src, imm)) }
-emit_sqshlu_v2d_v2d_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshlu_v2d_v2d_i(dst, src, imm)) }
+emit_sqshlu_v8b_v8b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshlu_v8b_v8b_i(dst, src, imm)) }
+emit_sqshlu_v16b_v16b_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshlu_v16b_v16b_i(dst, src, imm)) }
+emit_sqshlu_v4h_v4h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshlu_v4h_v4h_i(dst, src, imm)) }
+emit_sqshlu_v8h_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshlu_v8h_v8h_i(dst, src, imm)) }
+emit_sqshlu_v2s_v2s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshlu_v2s_v2s_i(dst, src, imm)) }
+emit_sqshlu_v4s_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshlu_v4s_v4s_i(dst, src, imm)) }
+emit_sqshlu_v2d_v2d_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshlu_v2d_v2d_i(dst, src, imm)) }
 inst_srshl_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRSHL, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_srshl_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRSHL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_srshl_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRSHL, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -2752,13 +2756,13 @@ inst_srshl_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register
 inst_srshl_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRSHL, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_srshl_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRSHL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_srshl_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRSHL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_srshl_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srshl_v8b_v8b_v8b(dst, src, src2)) }
-emit_srshl_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srshl_v16b_v16b_v16b(dst, src, src2)) }
-emit_srshl_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srshl_v4h_v4h_v4h(dst, src, src2)) }
-emit_srshl_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srshl_v8h_v8h_v8h(dst, src, src2)) }
-emit_srshl_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srshl_v2s_v2s_v2s(dst, src, src2)) }
-emit_srshl_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srshl_v4s_v4s_v4s(dst, src, src2)) }
-emit_srshl_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srshl_v2d_v2d_v2d(dst, src, src2)) }
+emit_srshl_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srshl_v8b_v8b_v8b(dst, src, src2)) }
+emit_srshl_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srshl_v16b_v16b_v16b(dst, src, src2)) }
+emit_srshl_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srshl_v4h_v4h_v4h(dst, src, src2)) }
+emit_srshl_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srshl_v8h_v8h_v8h(dst, src, src2)) }
+emit_srshl_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srshl_v2s_v2s_v2s(dst, src, src2)) }
+emit_srshl_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srshl_v4s_v4s_v4s(dst, src, src2)) }
+emit_srshl_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srshl_v2d_v2d_v2d(dst, src, src2)) }
 inst_urshl_v8b_v8b_v8b        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URSHL, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_urshl_v16b_v16b_v16b     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URSHL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_urshl_v4h_v4h_v4h        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URSHL, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -2766,13 +2770,13 @@ inst_urshl_v8h_v8h_v8h        :: #force_inline proc "contextless" (dst: Register
 inst_urshl_v2s_v2s_v2s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URSHL, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_urshl_v4s_v4s_v4s        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URSHL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_urshl_v2d_v2d_v2d        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .URSHL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_urshl_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urshl_v8b_v8b_v8b(dst, src, src2)) }
-emit_urshl_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urshl_v16b_v16b_v16b(dst, src, src2)) }
-emit_urshl_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urshl_v4h_v4h_v4h(dst, src, src2)) }
-emit_urshl_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urshl_v8h_v8h_v8h(dst, src, src2)) }
-emit_urshl_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urshl_v2s_v2s_v2s(dst, src, src2)) }
-emit_urshl_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urshl_v4s_v4s_v4s(dst, src, src2)) }
-emit_urshl_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_urshl_v2d_v2d_v2d(dst, src, src2)) }
+emit_urshl_v8b_v8b_v8b        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urshl_v8b_v8b_v8b(dst, src, src2)) }
+emit_urshl_v16b_v16b_v16b     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urshl_v16b_v16b_v16b(dst, src, src2)) }
+emit_urshl_v4h_v4h_v4h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urshl_v4h_v4h_v4h(dst, src, src2)) }
+emit_urshl_v8h_v8h_v8h        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urshl_v8h_v8h_v8h(dst, src, src2)) }
+emit_urshl_v2s_v2s_v2s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urshl_v2s_v2s_v2s(dst, src, src2)) }
+emit_urshl_v4s_v4s_v4s        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urshl_v4s_v4s_v4s(dst, src, src2)) }
+emit_urshl_v2d_v2d_v2d        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_urshl_v2d_v2d_v2d(dst, src, src2)) }
 inst_sshr_v8b_v8b_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHR, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_sshr_v16b_v16b_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHR, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_sshr_v4h_v4h_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHR, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2780,13 +2784,13 @@ inst_sshr_v8h_v8h_i           :: #force_inline proc "contextless" (dst: Register
 inst_sshr_v2s_v2s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHR, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_sshr_v4s_v4s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHR, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sshr_v2d_v2d_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHR, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sshr_v8b_v8b_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshr_v8b_v8b_i(dst, src, imm)) }
-emit_sshr_v16b_v16b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshr_v16b_v16b_i(dst, src, imm)) }
-emit_sshr_v4h_v4h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshr_v4h_v4h_i(dst, src, imm)) }
-emit_sshr_v8h_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshr_v8h_v8h_i(dst, src, imm)) }
-emit_sshr_v2s_v2s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshr_v2s_v2s_i(dst, src, imm)) }
-emit_sshr_v4s_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshr_v4s_v4s_i(dst, src, imm)) }
-emit_sshr_v2d_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshr_v2d_v2d_i(dst, src, imm)) }
+emit_sshr_v8b_v8b_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshr_v8b_v8b_i(dst, src, imm)) }
+emit_sshr_v16b_v16b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshr_v16b_v16b_i(dst, src, imm)) }
+emit_sshr_v4h_v4h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshr_v4h_v4h_i(dst, src, imm)) }
+emit_sshr_v8h_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshr_v8h_v8h_i(dst, src, imm)) }
+emit_sshr_v2s_v2s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshr_v2s_v2s_i(dst, src, imm)) }
+emit_sshr_v4s_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshr_v4s_v4s_i(dst, src, imm)) }
+emit_sshr_v2d_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshr_v2d_v2d_i(dst, src, imm)) }
 inst_ushr_v8b_v8b_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHR, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_ushr_v16b_v16b_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHR, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_ushr_v4h_v4h_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHR, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2794,13 +2798,13 @@ inst_ushr_v8h_v8h_i           :: #force_inline proc "contextless" (dst: Register
 inst_ushr_v2s_v2s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHR, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_ushr_v4s_v4s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHR, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_ushr_v2d_v2d_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHR, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_ushr_v8b_v8b_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushr_v8b_v8b_i(dst, src, imm)) }
-emit_ushr_v16b_v16b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushr_v16b_v16b_i(dst, src, imm)) }
-emit_ushr_v4h_v4h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushr_v4h_v4h_i(dst, src, imm)) }
-emit_ushr_v8h_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushr_v8h_v8h_i(dst, src, imm)) }
-emit_ushr_v2s_v2s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushr_v2s_v2s_i(dst, src, imm)) }
-emit_ushr_v4s_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushr_v4s_v4s_i(dst, src, imm)) }
-emit_ushr_v2d_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushr_v2d_v2d_i(dst, src, imm)) }
+emit_ushr_v8b_v8b_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushr_v8b_v8b_i(dst, src, imm)) }
+emit_ushr_v16b_v16b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushr_v16b_v16b_i(dst, src, imm)) }
+emit_ushr_v4h_v4h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushr_v4h_v4h_i(dst, src, imm)) }
+emit_ushr_v8h_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushr_v8h_v8h_i(dst, src, imm)) }
+emit_ushr_v2s_v2s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushr_v2s_v2s_i(dst, src, imm)) }
+emit_ushr_v4s_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushr_v4s_v4s_i(dst, src, imm)) }
+emit_ushr_v2d_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushr_v2d_v2d_i(dst, src, imm)) }
 inst_ssra_v8b_v8b_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSRA, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_ssra_v16b_v16b_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSRA, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_ssra_v4h_v4h_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSRA, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2808,13 +2812,13 @@ inst_ssra_v8h_v8h_i           :: #force_inline proc "contextless" (dst: Register
 inst_ssra_v2s_v2s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSRA, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_ssra_v4s_v4s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSRA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_ssra_v2d_v2d_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSRA, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_ssra_v8b_v8b_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ssra_v8b_v8b_i(dst, src, imm)) }
-emit_ssra_v16b_v16b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ssra_v16b_v16b_i(dst, src, imm)) }
-emit_ssra_v4h_v4h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ssra_v4h_v4h_i(dst, src, imm)) }
-emit_ssra_v8h_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ssra_v8h_v8h_i(dst, src, imm)) }
-emit_ssra_v2s_v2s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ssra_v2s_v2s_i(dst, src, imm)) }
-emit_ssra_v4s_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ssra_v4s_v4s_i(dst, src, imm)) }
-emit_ssra_v2d_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ssra_v2d_v2d_i(dst, src, imm)) }
+emit_ssra_v8b_v8b_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ssra_v8b_v8b_i(dst, src, imm)) }
+emit_ssra_v16b_v16b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ssra_v16b_v16b_i(dst, src, imm)) }
+emit_ssra_v4h_v4h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ssra_v4h_v4h_i(dst, src, imm)) }
+emit_ssra_v8h_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ssra_v8h_v8h_i(dst, src, imm)) }
+emit_ssra_v2s_v2s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ssra_v2s_v2s_i(dst, src, imm)) }
+emit_ssra_v4s_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ssra_v4s_v4s_i(dst, src, imm)) }
+emit_ssra_v2d_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ssra_v2d_v2d_i(dst, src, imm)) }
 inst_usra_v8b_v8b_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USRA, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_usra_v16b_v16b_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USRA, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_usra_v4h_v4h_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USRA, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2822,13 +2826,13 @@ inst_usra_v8h_v8h_i           :: #force_inline proc "contextless" (dst: Register
 inst_usra_v2s_v2s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USRA, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_usra_v4s_v4s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USRA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_usra_v2d_v2d_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USRA, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_usra_v8b_v8b_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_usra_v8b_v8b_i(dst, src, imm)) }
-emit_usra_v16b_v16b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_usra_v16b_v16b_i(dst, src, imm)) }
-emit_usra_v4h_v4h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_usra_v4h_v4h_i(dst, src, imm)) }
-emit_usra_v8h_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_usra_v8h_v8h_i(dst, src, imm)) }
-emit_usra_v2s_v2s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_usra_v2s_v2s_i(dst, src, imm)) }
-emit_usra_v4s_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_usra_v4s_v4s_i(dst, src, imm)) }
-emit_usra_v2d_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_usra_v2d_v2d_i(dst, src, imm)) }
+emit_usra_v8b_v8b_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_usra_v8b_v8b_i(dst, src, imm)) }
+emit_usra_v16b_v16b_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_usra_v16b_v16b_i(dst, src, imm)) }
+emit_usra_v4h_v4h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_usra_v4h_v4h_i(dst, src, imm)) }
+emit_usra_v8h_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_usra_v8h_v8h_i(dst, src, imm)) }
+emit_usra_v2s_v2s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_usra_v2s_v2s_i(dst, src, imm)) }
+emit_usra_v4s_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_usra_v4s_v4s_i(dst, src, imm)) }
+emit_usra_v2d_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_usra_v2d_v2d_i(dst, src, imm)) }
 inst_srshr_v8b_v8b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSHR, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_srshr_v16b_v16b_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSHR, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_srshr_v4h_v4h_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSHR, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2836,13 +2840,13 @@ inst_srshr_v8h_v8h_i          :: #force_inline proc "contextless" (dst: Register
 inst_srshr_v2s_v2s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSHR, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_srshr_v4s_v4s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSHR, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_srshr_v2d_v2d_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSHR, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_srshr_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srshr_v8b_v8b_i(dst, src, imm)) }
-emit_srshr_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srshr_v16b_v16b_i(dst, src, imm)) }
-emit_srshr_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srshr_v4h_v4h_i(dst, src, imm)) }
-emit_srshr_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srshr_v8h_v8h_i(dst, src, imm)) }
-emit_srshr_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srshr_v2s_v2s_i(dst, src, imm)) }
-emit_srshr_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srshr_v4s_v4s_i(dst, src, imm)) }
-emit_srshr_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srshr_v2d_v2d_i(dst, src, imm)) }
+emit_srshr_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srshr_v8b_v8b_i(dst, src, imm)) }
+emit_srshr_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srshr_v16b_v16b_i(dst, src, imm)) }
+emit_srshr_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srshr_v4h_v4h_i(dst, src, imm)) }
+emit_srshr_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srshr_v8h_v8h_i(dst, src, imm)) }
+emit_srshr_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srshr_v2s_v2s_i(dst, src, imm)) }
+emit_srshr_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srshr_v4s_v4s_i(dst, src, imm)) }
+emit_srshr_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srshr_v2d_v2d_i(dst, src, imm)) }
 inst_urshr_v8b_v8b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSHR, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_urshr_v16b_v16b_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSHR, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_urshr_v4h_v4h_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSHR, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2850,13 +2854,13 @@ inst_urshr_v8h_v8h_i          :: #force_inline proc "contextless" (dst: Register
 inst_urshr_v2s_v2s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSHR, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_urshr_v4s_v4s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSHR, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_urshr_v2d_v2d_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSHR, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_urshr_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_urshr_v8b_v8b_i(dst, src, imm)) }
-emit_urshr_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_urshr_v16b_v16b_i(dst, src, imm)) }
-emit_urshr_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_urshr_v4h_v4h_i(dst, src, imm)) }
-emit_urshr_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_urshr_v8h_v8h_i(dst, src, imm)) }
-emit_urshr_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_urshr_v2s_v2s_i(dst, src, imm)) }
-emit_urshr_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_urshr_v4s_v4s_i(dst, src, imm)) }
-emit_urshr_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_urshr_v2d_v2d_i(dst, src, imm)) }
+emit_urshr_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_urshr_v8b_v8b_i(dst, src, imm)) }
+emit_urshr_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_urshr_v16b_v16b_i(dst, src, imm)) }
+emit_urshr_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_urshr_v4h_v4h_i(dst, src, imm)) }
+emit_urshr_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_urshr_v8h_v8h_i(dst, src, imm)) }
+emit_urshr_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_urshr_v2s_v2s_i(dst, src, imm)) }
+emit_urshr_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_urshr_v4s_v4s_i(dst, src, imm)) }
+emit_urshr_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_urshr_v2d_v2d_i(dst, src, imm)) }
 inst_srsra_v8b_v8b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSRA, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_srsra_v16b_v16b_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSRA, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_srsra_v4h_v4h_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSRA, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2864,13 +2868,13 @@ inst_srsra_v8h_v8h_i          :: #force_inline proc "contextless" (dst: Register
 inst_srsra_v2s_v2s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSRA, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_srsra_v4s_v4s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSRA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_srsra_v2d_v2d_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRSRA, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_srsra_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srsra_v8b_v8b_i(dst, src, imm)) }
-emit_srsra_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srsra_v16b_v16b_i(dst, src, imm)) }
-emit_srsra_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srsra_v4h_v4h_i(dst, src, imm)) }
-emit_srsra_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srsra_v8h_v8h_i(dst, src, imm)) }
-emit_srsra_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srsra_v2s_v2s_i(dst, src, imm)) }
-emit_srsra_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srsra_v4s_v4s_i(dst, src, imm)) }
-emit_srsra_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srsra_v2d_v2d_i(dst, src, imm)) }
+emit_srsra_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srsra_v8b_v8b_i(dst, src, imm)) }
+emit_srsra_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srsra_v16b_v16b_i(dst, src, imm)) }
+emit_srsra_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srsra_v4h_v4h_i(dst, src, imm)) }
+emit_srsra_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srsra_v8h_v8h_i(dst, src, imm)) }
+emit_srsra_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srsra_v2s_v2s_i(dst, src, imm)) }
+emit_srsra_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srsra_v4s_v4s_i(dst, src, imm)) }
+emit_srsra_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srsra_v2d_v2d_i(dst, src, imm)) }
 inst_ursra_v8b_v8b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSRA, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_ursra_v16b_v16b_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSRA, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_ursra_v4h_v4h_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSRA, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2878,13 +2882,13 @@ inst_ursra_v8h_v8h_i          :: #force_inline proc "contextless" (dst: Register
 inst_ursra_v2s_v2s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSRA, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_ursra_v4s_v4s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSRA, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_ursra_v2d_v2d_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URSRA, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_ursra_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ursra_v8b_v8b_i(dst, src, imm)) }
-emit_ursra_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ursra_v16b_v16b_i(dst, src, imm)) }
-emit_ursra_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ursra_v4h_v4h_i(dst, src, imm)) }
-emit_ursra_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ursra_v8h_v8h_i(dst, src, imm)) }
-emit_ursra_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ursra_v2s_v2s_i(dst, src, imm)) }
-emit_ursra_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ursra_v4s_v4s_i(dst, src, imm)) }
-emit_ursra_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ursra_v2d_v2d_i(dst, src, imm)) }
+emit_ursra_v8b_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ursra_v8b_v8b_i(dst, src, imm)) }
+emit_ursra_v16b_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ursra_v16b_v16b_i(dst, src, imm)) }
+emit_ursra_v4h_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ursra_v4h_v4h_i(dst, src, imm)) }
+emit_ursra_v8h_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ursra_v8h_v8h_i(dst, src, imm)) }
+emit_ursra_v2s_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ursra_v2s_v2s_i(dst, src, imm)) }
+emit_ursra_v4s_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ursra_v4s_v4s_i(dst, src, imm)) }
+emit_ursra_v2d_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ursra_v2d_v2d_i(dst, src, imm)) }
 inst_sshl_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSHL, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_sshl_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSHL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_sshl_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSHL, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -2892,13 +2896,13 @@ inst_sshl_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register
 inst_sshl_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSHL, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_sshl_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSHL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_sshl_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SSHL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_sshl_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sshl_v8b_v8b_v8b(dst, src, src2)) }
-emit_sshl_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sshl_v16b_v16b_v16b(dst, src, src2)) }
-emit_sshl_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sshl_v4h_v4h_v4h(dst, src, src2)) }
-emit_sshl_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sshl_v8h_v8h_v8h(dst, src, src2)) }
-emit_sshl_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sshl_v2s_v2s_v2s(dst, src, src2)) }
-emit_sshl_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sshl_v4s_v4s_v4s(dst, src, src2)) }
-emit_sshl_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sshl_v2d_v2d_v2d(dst, src, src2)) }
+emit_sshl_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sshl_v8b_v8b_v8b(dst, src, src2)) }
+emit_sshl_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sshl_v16b_v16b_v16b(dst, src, src2)) }
+emit_sshl_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sshl_v4h_v4h_v4h(dst, src, src2)) }
+emit_sshl_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sshl_v8h_v8h_v8h(dst, src, src2)) }
+emit_sshl_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sshl_v2s_v2s_v2s(dst, src, src2)) }
+emit_sshl_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sshl_v4s_v4s_v4s(dst, src, src2)) }
+emit_sshl_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sshl_v2d_v2d_v2d(dst, src, src2)) }
 inst_ushl_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USHL, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_ushl_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USHL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_ushl_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USHL, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -2906,13 +2910,13 @@ inst_ushl_v8h_v8h_v8h         :: #force_inline proc "contextless" (dst: Register
 inst_ushl_v2s_v2s_v2s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USHL, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_v_2s(src2), {}, {}}} }
 inst_ushl_v4s_v4s_v4s         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USHL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), {}, {}}} }
 inst_ushl_v2d_v2d_v2d         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .USHL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), {}, {}}} }
-emit_ushl_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ushl_v8b_v8b_v8b(dst, src, src2)) }
-emit_ushl_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ushl_v16b_v16b_v16b(dst, src, src2)) }
-emit_ushl_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ushl_v4h_v4h_v4h(dst, src, src2)) }
-emit_ushl_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ushl_v8h_v8h_v8h(dst, src, src2)) }
-emit_ushl_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ushl_v2s_v2s_v2s(dst, src, src2)) }
-emit_ushl_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ushl_v4s_v4s_v4s(dst, src, src2)) }
-emit_ushl_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ushl_v2d_v2d_v2d(dst, src, src2)) }
+emit_ushl_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ushl_v8b_v8b_v8b(dst, src, src2)) }
+emit_ushl_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ushl_v16b_v16b_v16b(dst, src, src2)) }
+emit_ushl_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ushl_v4h_v4h_v4h(dst, src, src2)) }
+emit_ushl_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ushl_v8h_v8h_v8h(dst, src, src2)) }
+emit_ushl_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ushl_v2s_v2s_v2s(dst, src, src2)) }
+emit_ushl_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ushl_v4s_v4s_v4s(dst, src, src2)) }
+emit_ushl_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ushl_v2d_v2d_v2d(dst, src, src2)) }
 inst_sli_v8b_v8b_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLI, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_sli_v16b_v16b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLI, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_sli_v4h_v4h_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLI, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2920,13 +2924,13 @@ inst_sli_v8h_v8h_i            :: #force_inline proc "contextless" (dst: Register
 inst_sli_v2s_v2s_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLI, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_sli_v4s_v4s_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLI, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sli_v2d_v2d_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLI, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sli_v8b_v8b_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sli_v8b_v8b_i(dst, src, imm)) }
-emit_sli_v16b_v16b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sli_v16b_v16b_i(dst, src, imm)) }
-emit_sli_v4h_v4h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sli_v4h_v4h_i(dst, src, imm)) }
-emit_sli_v8h_v8h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sli_v8h_v8h_i(dst, src, imm)) }
-emit_sli_v2s_v2s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sli_v2s_v2s_i(dst, src, imm)) }
-emit_sli_v4s_v4s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sli_v4s_v4s_i(dst, src, imm)) }
-emit_sli_v2d_v2d_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sli_v2d_v2d_i(dst, src, imm)) }
+emit_sli_v8b_v8b_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sli_v8b_v8b_i(dst, src, imm)) }
+emit_sli_v16b_v16b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sli_v16b_v16b_i(dst, src, imm)) }
+emit_sli_v4h_v4h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sli_v4h_v4h_i(dst, src, imm)) }
+emit_sli_v8h_v8h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sli_v8h_v8h_i(dst, src, imm)) }
+emit_sli_v2s_v2s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sli_v2s_v2s_i(dst, src, imm)) }
+emit_sli_v4s_v4s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sli_v4s_v4s_i(dst, src, imm)) }
+emit_sli_v2d_v2d_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sli_v2d_v2d_i(dst, src, imm)) }
 inst_sri_v8b_v8b_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRI, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_sri_v16b_v16b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRI, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_sri_v4h_v4h_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRI, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
@@ -2934,157 +2938,157 @@ inst_sri_v8h_v8h_i            :: #force_inline proc "contextless" (dst: Register
 inst_sri_v2s_v2s_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRI, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
 inst_sri_v4s_v4s_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRI, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sri_v2d_v2d_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRI, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sri_v8b_v8b_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sri_v8b_v8b_i(dst, src, imm)) }
-emit_sri_v16b_v16b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sri_v16b_v16b_i(dst, src, imm)) }
-emit_sri_v4h_v4h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sri_v4h_v4h_i(dst, src, imm)) }
-emit_sri_v8h_v8h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sri_v8h_v8h_i(dst, src, imm)) }
-emit_sri_v2s_v2s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sri_v2s_v2s_i(dst, src, imm)) }
-emit_sri_v4s_v4s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sri_v4s_v4s_i(dst, src, imm)) }
-emit_sri_v2d_v2d_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sri_v2d_v2d_i(dst, src, imm)) }
+emit_sri_v8b_v8b_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sri_v8b_v8b_i(dst, src, imm)) }
+emit_sri_v16b_v16b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sri_v16b_v16b_i(dst, src, imm)) }
+emit_sri_v4h_v4h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sri_v4h_v4h_i(dst, src, imm)) }
+emit_sri_v8h_v8h_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sri_v8h_v8h_i(dst, src, imm)) }
+emit_sri_v2s_v2s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sri_v2s_v2s_i(dst, src, imm)) }
+emit_sri_v4s_v4s_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sri_v4s_v4s_i(dst, src, imm)) }
+emit_sri_v2d_v2d_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sri_v2d_v2d_i(dst, src, imm)) }
 inst_sshll_v8h_v8b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHLL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_sshll_v4s_v4h_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHLL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
 inst_sshll_v2d_v2s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHLL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
-emit_sshll_v8h_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshll_v8h_v8b_i(dst, src, imm)) }
-emit_sshll_v4s_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshll_v4s_v4h_i(dst, src, imm)) }
-emit_sshll_v2d_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshll_v2d_v2s_i(dst, src, imm)) }
+emit_sshll_v8h_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshll_v8h_v8b_i(dst, src, imm)) }
+emit_sshll_v4s_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshll_v4s_v4h_i(dst, src, imm)) }
+emit_sshll_v2d_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshll_v2d_v2s_i(dst, src, imm)) }
 inst_sshll2_v8h_v16b_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHLL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_sshll2_v4s_v8h_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHLL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sshll2_v2d_v4s_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SSHLL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
-emit_sshll2_v8h_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshll2_v8h_v16b_i(dst, src, imm)) }
-emit_sshll2_v4s_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshll2_v4s_v8h_i(dst, src, imm)) }
-emit_sshll2_v2d_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sshll2_v2d_v4s_i(dst, src, imm)) }
+emit_sshll2_v8h_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshll2_v8h_v16b_i(dst, src, imm)) }
+emit_sshll2_v4s_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshll2_v4s_v8h_i(dst, src, imm)) }
+emit_sshll2_v2d_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sshll2_v2d_v4s_i(dst, src, imm)) }
 inst_ushll_v8h_v8b_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHLL, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_8b(src), op_imm(imm, 4), {}, {}}} }
 inst_ushll_v4s_v4h_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHLL, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_4h(src), op_imm(imm, 4), {}, {}}} }
 inst_ushll_v2d_v2s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHLL, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_2s(src), op_imm(imm, 4), {}, {}}} }
-emit_ushll_v8h_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushll_v8h_v8b_i(dst, src, imm)) }
-emit_ushll_v4s_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushll_v4s_v4h_i(dst, src, imm)) }
-emit_ushll_v2d_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushll_v2d_v2s_i(dst, src, imm)) }
+emit_ushll_v8h_v8b_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushll_v8h_v8b_i(dst, src, imm)) }
+emit_ushll_v4s_v4h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushll_v4s_v4h_i(dst, src, imm)) }
+emit_ushll_v2d_v2s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushll_v2d_v2s_i(dst, src, imm)) }
 inst_ushll2_v8h_v16b_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHLL2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_16b(src), op_imm(imm, 4), {}, {}}} }
 inst_ushll2_v4s_v8h_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHLL2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_ushll2_v2d_v4s_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .USHLL2, operand_count = 3, length = 4, ops = {op_v_2d(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
-emit_ushll2_v8h_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushll2_v8h_v16b_i(dst, src, imm)) }
-emit_ushll2_v4s_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushll2_v4s_v8h_i(dst, src, imm)) }
-emit_ushll2_v2d_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ushll2_v2d_v4s_i(dst, src, imm)) }
+emit_ushll2_v8h_v16b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushll2_v8h_v16b_i(dst, src, imm)) }
+emit_ushll2_v4s_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushll2_v4s_v8h_i(dst, src, imm)) }
+emit_ushll2_v2d_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ushll2_v2d_v4s_i(dst, src, imm)) }
 inst_sxtl_v8h_v8b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTL, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8b(src), {}, {}, {}}} }
 inst_sxtl_v4s_v4h             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTL, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4h(src), {}, {}, {}}} }
 inst_sxtl_v2d_v2s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTL, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2s(src), {}, {}, {}}} }
-emit_sxtl_v8h_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtl_v8h_v8b(dst, src)) }
-emit_sxtl_v4s_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtl_v4s_v4h(dst, src)) }
-emit_sxtl_v2d_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtl_v2d_v2s(dst, src)) }
+emit_sxtl_v8h_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtl_v8h_v8b(dst, src)) }
+emit_sxtl_v4s_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtl_v4s_v4h(dst, src)) }
+emit_sxtl_v2d_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtl_v2d_v2s(dst, src)) }
 inst_sxtl2_v8h_v16b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTL2, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_16b(src), {}, {}, {}}} }
 inst_sxtl2_v4s_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTL2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_8h(src), {}, {}, {}}} }
 inst_sxtl2_v2d_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SXTL2, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_4s(src), {}, {}, {}}} }
-emit_sxtl2_v8h_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtl2_v8h_v16b(dst, src)) }
-emit_sxtl2_v4s_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtl2_v4s_v8h(dst, src)) }
-emit_sxtl2_v2d_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtl2_v2d_v4s(dst, src)) }
+emit_sxtl2_v8h_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtl2_v8h_v16b(dst, src)) }
+emit_sxtl2_v4s_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtl2_v4s_v8h(dst, src)) }
+emit_sxtl2_v2d_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtl2_v2d_v4s(dst, src)) }
 inst_uxtl_v8h_v8b             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTL, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8b(src), {}, {}, {}}} }
 inst_uxtl_v4s_v4h             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTL, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4h(src), {}, {}, {}}} }
 inst_uxtl_v2d_v2s             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTL, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_2s(src), {}, {}, {}}} }
-emit_uxtl_v8h_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtl_v8h_v8b(dst, src)) }
-emit_uxtl_v4s_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtl_v4s_v4h(dst, src)) }
-emit_uxtl_v2d_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtl_v2d_v2s(dst, src)) }
+emit_uxtl_v8h_v8b             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtl_v8h_v8b(dst, src)) }
+emit_uxtl_v4s_v4h             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtl_v4s_v4h(dst, src)) }
+emit_uxtl_v2d_v2s             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtl_v2d_v2s(dst, src)) }
 inst_uxtl2_v8h_v16b           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTL2, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_16b(src), {}, {}, {}}} }
 inst_uxtl2_v4s_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTL2, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_8h(src), {}, {}, {}}} }
 inst_uxtl2_v2d_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .UXTL2, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_v_4s(src), {}, {}, {}}} }
-emit_uxtl2_v8h_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtl2_v8h_v16b(dst, src)) }
-emit_uxtl2_v4s_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtl2_v4s_v8h(dst, src)) }
-emit_uxtl2_v2d_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtl2_v2d_v4s(dst, src)) }
+emit_uxtl2_v8h_v16b           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtl2_v8h_v16b(dst, src)) }
+emit_uxtl2_v4s_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtl2_v4s_v8h(dst, src)) }
+emit_uxtl2_v2d_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtl2_v2d_v4s(dst, src)) }
 inst_shrn_v8b_v8h_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_shrn_v4h_v4s_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_shrn_v2s_v2d_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_shrn_v8b_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shrn_v8b_v8h_i(dst, src, imm)) }
-emit_shrn_v4h_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shrn_v4h_v4s_i(dst, src, imm)) }
-emit_shrn_v2s_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shrn_v2s_v2d_i(dst, src, imm)) }
+emit_shrn_v8b_v8h_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shrn_v8b_v8h_i(dst, src, imm)) }
+emit_shrn_v4h_v4s_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shrn_v4h_v4s_i(dst, src, imm)) }
+emit_shrn_v2s_v2d_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shrn_v2s_v2d_i(dst, src, imm)) }
 inst_shrn2_v16b_v8h_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_shrn2_v8h_v4s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_shrn2_v4s_v2d_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_shrn2_v16b_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shrn2_v16b_v8h_i(dst, src, imm)) }
-emit_shrn2_v8h_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shrn2_v8h_v4s_i(dst, src, imm)) }
-emit_shrn2_v4s_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shrn2_v4s_v2d_i(dst, src, imm)) }
+emit_shrn2_v16b_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shrn2_v16b_v8h_i(dst, src, imm)) }
+emit_shrn2_v8h_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shrn2_v8h_v4s_i(dst, src, imm)) }
+emit_shrn2_v4s_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shrn2_v4s_v2d_i(dst, src, imm)) }
 inst_rshrn_v8b_v8h_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RSHRN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_rshrn_v4h_v4s_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RSHRN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_rshrn_v2s_v2d_i          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RSHRN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_rshrn_v8b_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rshrn_v8b_v8h_i(dst, src, imm)) }
-emit_rshrn_v4h_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rshrn_v4h_v4s_i(dst, src, imm)) }
-emit_rshrn_v2s_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rshrn_v2s_v2d_i(dst, src, imm)) }
+emit_rshrn_v8b_v8h_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rshrn_v8b_v8h_i(dst, src, imm)) }
+emit_rshrn_v4h_v4s_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rshrn_v4h_v4s_i(dst, src, imm)) }
+emit_rshrn_v2s_v2d_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rshrn_v2s_v2d_i(dst, src, imm)) }
 inst_rshrn2_v16b_v8h_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RSHRN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_rshrn2_v8h_v4s_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RSHRN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_rshrn2_v4s_v2d_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RSHRN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_rshrn2_v16b_v8h_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rshrn2_v16b_v8h_i(dst, src, imm)) }
-emit_rshrn2_v8h_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rshrn2_v8h_v4s_i(dst, src, imm)) }
-emit_rshrn2_v4s_v2d_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rshrn2_v4s_v2d_i(dst, src, imm)) }
+emit_rshrn2_v16b_v8h_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rshrn2_v16b_v8h_i(dst, src, imm)) }
+emit_rshrn2_v8h_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rshrn2_v8h_v4s_i(dst, src, imm)) }
+emit_rshrn2_v4s_v2d_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rshrn2_v4s_v2d_i(dst, src, imm)) }
 inst_sqshrn_v8b_v8h_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshrn_v4h_v4s_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshrn_v2s_v2d_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqshrn_v8b_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrn_v8b_v8h_i(dst, src, imm)) }
-emit_sqshrn_v4h_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrn_v4h_v4s_i(dst, src, imm)) }
-emit_sqshrn_v2s_v2d_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrn_v2s_v2d_i(dst, src, imm)) }
+emit_sqshrn_v8b_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrn_v8b_v8h_i(dst, src, imm)) }
+emit_sqshrn_v4h_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrn_v4h_v4s_i(dst, src, imm)) }
+emit_sqshrn_v2s_v2d_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrn_v2s_v2d_i(dst, src, imm)) }
 inst_sqshrn2_v16b_v8h_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshrn2_v8h_v4s_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshrn2_v4s_v2d_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqshrn2_v16b_v8h_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrn2_v16b_v8h_i(dst, src, imm)) }
-emit_sqshrn2_v8h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrn2_v8h_v4s_i(dst, src, imm)) }
-emit_sqshrn2_v4s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrn2_v4s_v2d_i(dst, src, imm)) }
+emit_sqshrn2_v16b_v8h_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrn2_v16b_v8h_i(dst, src, imm)) }
+emit_sqshrn2_v8h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrn2_v8h_v4s_i(dst, src, imm)) }
+emit_sqshrn2_v4s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrn2_v4s_v2d_i(dst, src, imm)) }
 inst_uqshrn_v8b_v8h_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQSHRN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_uqshrn_v4h_v4s_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQSHRN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_uqshrn_v2s_v2d_i         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQSHRN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_uqshrn_v8b_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqshrn_v8b_v8h_i(dst, src, imm)) }
-emit_uqshrn_v4h_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqshrn_v4h_v4s_i(dst, src, imm)) }
-emit_uqshrn_v2s_v2d_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqshrn_v2s_v2d_i(dst, src, imm)) }
+emit_uqshrn_v8b_v8h_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqshrn_v8b_v8h_i(dst, src, imm)) }
+emit_uqshrn_v4h_v4s_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqshrn_v4h_v4s_i(dst, src, imm)) }
+emit_uqshrn_v2s_v2d_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqshrn_v2s_v2d_i(dst, src, imm)) }
 inst_uqshrn2_v16b_v8h_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQSHRN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_uqshrn2_v8h_v4s_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQSHRN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_uqshrn2_v4s_v2d_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQSHRN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_uqshrn2_v16b_v8h_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqshrn2_v16b_v8h_i(dst, src, imm)) }
-emit_uqshrn2_v8h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqshrn2_v8h_v4s_i(dst, src, imm)) }
-emit_uqshrn2_v4s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqshrn2_v4s_v2d_i(dst, src, imm)) }
+emit_uqshrn2_v16b_v8h_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqshrn2_v16b_v8h_i(dst, src, imm)) }
+emit_uqshrn2_v8h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqshrn2_v8h_v4s_i(dst, src, imm)) }
+emit_uqshrn2_v4s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqshrn2_v4s_v2d_i(dst, src, imm)) }
 inst_sqrshrn_v8b_v8h_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sqrshrn_v4h_v4s_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqrshrn_v2s_v2d_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqrshrn_v8b_v8h_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrn_v8b_v8h_i(dst, src, imm)) }
-emit_sqrshrn_v4h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrn_v4h_v4s_i(dst, src, imm)) }
-emit_sqrshrn_v2s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrn_v2s_v2d_i(dst, src, imm)) }
+emit_sqrshrn_v8b_v8h_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrn_v8b_v8h_i(dst, src, imm)) }
+emit_sqrshrn_v4h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrn_v4h_v4s_i(dst, src, imm)) }
+emit_sqrshrn_v2s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrn_v2s_v2d_i(dst, src, imm)) }
 inst_sqrshrn2_v16b_v8h_i      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sqrshrn2_v8h_v4s_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqrshrn2_v4s_v2d_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqrshrn2_v16b_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrn2_v16b_v8h_i(dst, src, imm)) }
-emit_sqrshrn2_v8h_v4s_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrn2_v8h_v4s_i(dst, src, imm)) }
-emit_sqrshrn2_v4s_v2d_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrn2_v4s_v2d_i(dst, src, imm)) }
+emit_sqrshrn2_v16b_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrn2_v16b_v8h_i(dst, src, imm)) }
+emit_sqrshrn2_v8h_v4s_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrn2_v8h_v4s_i(dst, src, imm)) }
+emit_sqrshrn2_v4s_v2d_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrn2_v4s_v2d_i(dst, src, imm)) }
 inst_uqrshrn_v8b_v8h_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQRSHRN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_uqrshrn_v4h_v4s_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQRSHRN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_uqrshrn_v2s_v2d_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQRSHRN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_uqrshrn_v8b_v8h_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqrshrn_v8b_v8h_i(dst, src, imm)) }
-emit_uqrshrn_v4h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqrshrn_v4h_v4s_i(dst, src, imm)) }
-emit_uqrshrn_v2s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqrshrn_v2s_v2d_i(dst, src, imm)) }
+emit_uqrshrn_v8b_v8h_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqrshrn_v8b_v8h_i(dst, src, imm)) }
+emit_uqrshrn_v4h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqrshrn_v4h_v4s_i(dst, src, imm)) }
+emit_uqrshrn_v2s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqrshrn_v2s_v2d_i(dst, src, imm)) }
 inst_uqrshrn2_v16b_v8h_i      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQRSHRN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_uqrshrn2_v8h_v4s_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQRSHRN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_uqrshrn2_v4s_v2d_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .UQRSHRN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_uqrshrn2_v16b_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqrshrn2_v16b_v8h_i(dst, src, imm)) }
-emit_uqrshrn2_v8h_v4s_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqrshrn2_v8h_v4s_i(dst, src, imm)) }
-emit_uqrshrn2_v4s_v2d_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_uqrshrn2_v4s_v2d_i(dst, src, imm)) }
+emit_uqrshrn2_v16b_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqrshrn2_v16b_v8h_i(dst, src, imm)) }
+emit_uqrshrn2_v8h_v4s_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqrshrn2_v8h_v4s_i(dst, src, imm)) }
+emit_uqrshrn2_v4s_v2d_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_uqrshrn2_v4s_v2d_i(dst, src, imm)) }
 inst_sqshrun_v8b_v8h_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRUN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshrun_v4h_v4s_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRUN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshrun_v2s_v2d_i        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRUN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqshrun_v8b_v8h_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrun_v8b_v8h_i(dst, src, imm)) }
-emit_sqshrun_v4h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrun_v4h_v4s_i(dst, src, imm)) }
-emit_sqshrun_v2s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrun_v2s_v2d_i(dst, src, imm)) }
+emit_sqshrun_v8b_v8h_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrun_v8b_v8h_i(dst, src, imm)) }
+emit_sqshrun_v4h_v4s_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrun_v4h_v4s_i(dst, src, imm)) }
+emit_sqshrun_v2s_v2d_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrun_v2s_v2d_i(dst, src, imm)) }
 inst_sqshrun2_v16b_v8h_i      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRUN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshrun2_v8h_v4s_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRUN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqshrun2_v4s_v2d_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQSHRUN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqshrun2_v16b_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrun2_v16b_v8h_i(dst, src, imm)) }
-emit_sqshrun2_v8h_v4s_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrun2_v8h_v4s_i(dst, src, imm)) }
-emit_sqshrun2_v4s_v2d_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqshrun2_v4s_v2d_i(dst, src, imm)) }
+emit_sqshrun2_v16b_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrun2_v16b_v8h_i(dst, src, imm)) }
+emit_sqshrun2_v8h_v4s_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrun2_v8h_v4s_i(dst, src, imm)) }
+emit_sqshrun2_v4s_v2d_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqshrun2_v4s_v2d_i(dst, src, imm)) }
 inst_sqrshrun_v8b_v8h_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRUN, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sqrshrun_v4h_v4s_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRUN, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqrshrun_v2s_v2d_i       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRUN, operand_count = 3, length = 4, ops = {op_v_2s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqrshrun_v8b_v8h_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrun_v8b_v8h_i(dst, src, imm)) }
-emit_sqrshrun_v4h_v4s_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrun_v4h_v4s_i(dst, src, imm)) }
-emit_sqrshrun_v2s_v2d_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrun_v2s_v2d_i(dst, src, imm)) }
+emit_sqrshrun_v8b_v8h_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrun_v8b_v8h_i(dst, src, imm)) }
+emit_sqrshrun_v4h_v4s_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrun_v4h_v4s_i(dst, src, imm)) }
+emit_sqrshrun_v2s_v2d_i       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrun_v2s_v2d_i(dst, src, imm)) }
 inst_sqrshrun2_v16b_v8h_i     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRUN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_8h(src), op_imm(imm, 4), {}, {}}} }
 inst_sqrshrun2_v8h_v4s_i      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRUN2, operand_count = 3, length = 4, ops = {op_v_8h(dst), op_v_4s(src), op_imm(imm, 4), {}, {}}} }
 inst_sqrshrun2_v4s_v2d_i      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SQRSHRUN2, operand_count = 3, length = 4, ops = {op_v_4s(dst), op_v_2d(src), op_imm(imm, 4), {}, {}}} }
-emit_sqrshrun2_v16b_v8h_i     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrun2_v16b_v8h_i(dst, src, imm)) }
-emit_sqrshrun2_v8h_v4s_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrun2_v8h_v4s_i(dst, src, imm)) }
-emit_sqrshrun2_v4s_v2d_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sqrshrun2_v4s_v2d_i(dst, src, imm)) }
+emit_sqrshrun2_v16b_v8h_i     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrun2_v16b_v8h_i(dst, src, imm)) }
+emit_sqrshrun2_v8h_v4s_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrun2_v8h_v4s_i(dst, src, imm)) }
+emit_sqrshrun2_v4s_v2d_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sqrshrun2_v4s_v2d_i(dst, src, imm)) }
 inst_dup_v8b_veb_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DUP, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_elem_b(src), op_lane_index(imm), {}, {}}} }
 inst_dup_v16b_veb_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DUP, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_elem_b(src), op_lane_index(imm), {}, {}}} }
 inst_dup_v4h_veh_i            :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DUP, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_elem_h(src), op_lane_index(imm), {}, {}}} }
@@ -3103,24 +3107,24 @@ inst_dup_zb_r                 :: #force_inline proc "contextless" (rz: u8, src:
 inst_dup_zh_r                 :: #force_inline proc "contextless" (rz: u8, src: Register) -> Instruction { return Instruction{mnemonic = .DUP, operand_count = 2, length = 4, ops = {op_z_h(rz), op_reg(src), {}, {}, {}}} }
 inst_dup_zs_r                 :: #force_inline proc "contextless" (rz: u8, src: Register) -> Instruction { return Instruction{mnemonic = .DUP, operand_count = 2, length = 4, ops = {op_z_s(rz), op_reg(src), {}, {}, {}}} }
 inst_dup_zd_r                 :: #force_inline proc "contextless" (rz: u8, src: Register) -> Instruction { return Instruction{mnemonic = .DUP, operand_count = 2, length = 4, ops = {op_z_d(rz), op_reg(src), {}, {}, {}}} }
-emit_dup_v8b_veb_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dup_v8b_veb_i(dst, src, imm)) }
-emit_dup_v16b_veb_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dup_v16b_veb_i(dst, src, imm)) }
-emit_dup_v4h_veh_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dup_v4h_veh_i(dst, src, imm)) }
-emit_dup_v8h_veh_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dup_v8h_veh_i(dst, src, imm)) }
-emit_dup_v2s_ves_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dup_v2s_ves_i(dst, src, imm)) }
-emit_dup_v4s_ves_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dup_v4s_ves_i(dst, src, imm)) }
-emit_dup_v2d_ved_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dup_v2d_ved_i(dst, src, imm)) }
-emit_dup_v8b_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dup_v8b_r(dst, src)) }
-emit_dup_v16b_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dup_v16b_r(dst, src)) }
-emit_dup_v4h_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dup_v4h_r(dst, src)) }
-emit_dup_v8h_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dup_v8h_r(dst, src)) }
-emit_dup_v2s_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dup_v2s_r(dst, src)) }
-emit_dup_v4s_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dup_v4s_r(dst, src)) }
-emit_dup_v2d_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dup_v2d_r(dst, src)) }
-emit_dup_zb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append(instructions, inst_dup_zb_r(rz, src)) }
-emit_dup_zh_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append(instructions, inst_dup_zh_r(rz, src)) }
-emit_dup_zs_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append(instructions, inst_dup_zs_r(rz, src)) }
-emit_dup_zd_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append(instructions, inst_dup_zd_r(rz, src)) }
+emit_dup_v8b_veb_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dup_v8b_veb_i(dst, src, imm)) }
+emit_dup_v16b_veb_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dup_v16b_veb_i(dst, src, imm)) }
+emit_dup_v4h_veh_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dup_v4h_veh_i(dst, src, imm)) }
+emit_dup_v8h_veh_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dup_v8h_veh_i(dst, src, imm)) }
+emit_dup_v2s_ves_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dup_v2s_ves_i(dst, src, imm)) }
+emit_dup_v4s_ves_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dup_v4s_ves_i(dst, src, imm)) }
+emit_dup_v2d_ved_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dup_v2d_ved_i(dst, src, imm)) }
+emit_dup_v8b_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dup_v8b_r(dst, src)) }
+emit_dup_v16b_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dup_v16b_r(dst, src)) }
+emit_dup_v4h_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dup_v4h_r(dst, src)) }
+emit_dup_v8h_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dup_v8h_r(dst, src)) }
+emit_dup_v2s_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dup_v2s_r(dst, src)) }
+emit_dup_v4s_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dup_v4s_r(dst, src)) }
+emit_dup_v2d_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dup_v2d_r(dst, src)) }
+emit_dup_zb_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append_elem(instructions, inst_dup_zb_r(rz, src)) }
+emit_dup_zh_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append_elem(instructions, inst_dup_zh_r(rz, src)) }
+emit_dup_zs_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append_elem(instructions, inst_dup_zs_r(rz, src)) }
+emit_dup_zd_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append_elem(instructions, inst_dup_zd_r(rz, src)) }
 inst_ins_veb_i_veb_i          :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .INS, operand_count = 4, length = 4, ops = {op_v_elem_b(dst), op_lane_index(imm), op_v_elem_b(src), op_lane_index(imm2), {}}} }
 inst_ins_veh_i_veh_i          :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .INS, operand_count = 4, length = 4, ops = {op_v_elem_h(dst), op_lane_index(imm), op_v_elem_h(src), op_lane_index(imm2), {}}} }
 inst_ins_ves_i_ves_i          :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .INS, operand_count = 4, length = 4, ops = {op_v_elem_s(dst), op_lane_index(imm), op_v_elem_s(src), op_lane_index(imm2), {}}} }
@@ -3129,14 +3133,14 @@ inst_ins_veb_i_r              :: #force_inline proc "contextless" (dst: Register
 inst_ins_veh_i_r              :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .INS, operand_count = 3, length = 4, ops = {op_v_elem_h(dst), op_lane_index(imm), op_reg(src), {}, {}}} }
 inst_ins_ves_i_r              :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .INS, operand_count = 3, length = 4, ops = {op_v_elem_s(dst), op_lane_index(imm), op_reg(src), {}, {}}} }
 inst_ins_ved_i_r              :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .INS, operand_count = 3, length = 4, ops = {op_v_elem_d(dst), op_lane_index(imm), op_reg(src), {}, {}}} }
-emit_ins_veb_i_veb_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append(instructions, inst_ins_veb_i_veb_i(dst, imm, src, imm2)) }
-emit_ins_veh_i_veh_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append(instructions, inst_ins_veh_i_veh_i(dst, imm, src, imm2)) }
-emit_ins_ves_i_ves_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append(instructions, inst_ins_ves_i_ves_i(dst, imm, src, imm2)) }
-emit_ins_ved_i_ved_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append(instructions, inst_ins_ved_i_ved_i(dst, imm, src, imm2)) }
-emit_ins_veb_i_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append(instructions, inst_ins_veb_i_r(dst, imm, src)) }
-emit_ins_veh_i_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append(instructions, inst_ins_veh_i_r(dst, imm, src)) }
-emit_ins_ves_i_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append(instructions, inst_ins_ves_i_r(dst, imm, src)) }
-emit_ins_ved_i_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append(instructions, inst_ins_ved_i_r(dst, imm, src)) }
+emit_ins_veb_i_veb_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_ins_veb_i_veb_i(dst, imm, src, imm2)) }
+emit_ins_veh_i_veh_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_ins_veh_i_veh_i(dst, imm, src, imm2)) }
+emit_ins_ves_i_ves_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_ins_ves_i_ves_i(dst, imm, src, imm2)) }
+emit_ins_ved_i_ved_i          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_ins_ved_i_ved_i(dst, imm, src, imm2)) }
+emit_ins_veb_i_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append_elem(instructions, inst_ins_veb_i_r(dst, imm, src)) }
+emit_ins_veh_i_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append_elem(instructions, inst_ins_veh_i_r(dst, imm, src)) }
+emit_ins_ves_i_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append_elem(instructions, inst_ins_ves_i_r(dst, imm, src)) }
+emit_ins_ved_i_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) { append_elem(instructions, inst_ins_ved_i_r(dst, imm, src)) }
 inst_mov_v8b_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_mov_v16b_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_mov_zb_p_zb              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), {}, {}}} }
@@ -3147,22 +3151,46 @@ inst_mov_pb_p_p               :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_mov_pb_p                 :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_mov_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.MOV, dst, src) }
 inst_mov_r_i                  :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return inst_r_i(.MOV, dst, imm) }
-emit_mov_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mov_v8b_v8b(dst, src)) }
-emit_mov_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mov_v16b_v16b(dst, src)) }
-emit_mov_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_mov_zb_p_zb(rz, rz2, rz3)) }
-emit_mov_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_mov_zh_p_zh(rz, rz2, rz3)) }
-emit_mov_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_mov_zs_p_zs(rz, rz2, rz3)) }
-emit_mov_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_mov_zd_p_zd(rz, rz2, rz3)) }
-emit_mov_pb_p_p               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_mov_pb_p_p(rz, rz2, rz3)) }
-emit_mov_pb_p                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_mov_pb_p(rz, rz2)) }
-emit_mov_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mov_r_r(dst, src)) }
-emit_mov_r_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mov_r_i(dst, imm)) }
+inst_mov_r_veb                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_elem_b(src), {}, {}, {}}} }
+inst_mov_r_veh                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_elem_h(src), {}, {}, {}}} }
+inst_mov_r_ves                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_elem_s(src), {}, {}, {}}} }
+inst_mov_r_ved                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_reg(dst), op_v_elem_d(src), {}, {}, {}}} }
+inst_mov_veb_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_elem_b(dst), op_reg(src), {}, {}, {}}} }
+inst_mov_veh_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_elem_h(dst), op_reg(src), {}, {}, {}}} }
+inst_mov_ves_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_elem_s(dst), op_reg(src), {}, {}, {}}} }
+inst_mov_ved_r                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_elem_d(dst), op_reg(src), {}, {}, {}}} }
+inst_mov_veb_veb              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_elem_b(dst), op_v_elem_b(src), {}, {}, {}}} }
+inst_mov_veh_veh              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_elem_h(dst), op_v_elem_h(src), {}, {}, {}}} }
+inst_mov_ves_ves              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_elem_s(dst), op_v_elem_s(src), {}, {}, {}}} }
+inst_mov_ved_ved              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MOV, operand_count = 2, length = 4, ops = {op_v_elem_d(dst), op_v_elem_d(src), {}, {}, {}}} }
+emit_mov_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_v8b_v8b(dst, src)) }
+emit_mov_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_v16b_v16b(dst, src)) }
+emit_mov_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_mov_zb_p_zb(rz, rz2, rz3)) }
+emit_mov_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_mov_zh_p_zh(rz, rz2, rz3)) }
+emit_mov_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_mov_zs_p_zs(rz, rz2, rz3)) }
+emit_mov_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_mov_zd_p_zd(rz, rz2, rz3)) }
+emit_mov_pb_p_p               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_mov_pb_p_p(rz, rz2, rz3)) }
+emit_mov_pb_p                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_mov_pb_p(rz, rz2)) }
+emit_mov_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_r_r(dst, src)) }
+emit_mov_r_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mov_r_i(dst, imm)) }
+emit_mov_r_veb                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_r_veb(dst, src)) }
+emit_mov_r_veh                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_r_veh(dst, src)) }
+emit_mov_r_ves                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_r_ves(dst, src)) }
+emit_mov_r_ved                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_r_ved(dst, src)) }
+emit_mov_veb_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_veb_r(dst, src)) }
+emit_mov_veh_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_veh_r(dst, src)) }
+emit_mov_ves_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_ves_r(dst, src)) }
+emit_mov_ved_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_ved_r(dst, src)) }
+emit_mov_veb_veb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_veb_veb(dst, src)) }
+emit_mov_veh_veh              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_veh_veh(dst, src)) }
+emit_mov_ves_ves              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_ves_ves(dst, src)) }
+emit_mov_ved_ved              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mov_ved_ved(dst, src)) }
 inst_ext_v8b_v8b_v8b_i        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EXT, operand_count = 4, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), op_imm(imm, 4), {}}} }
 inst_ext_v16b_v16b_v16b_i     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EXT, operand_count = 4, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), op_imm(imm, 4), {}}} }
 inst_ext_zb_zb_zb_i           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .EXT, operand_count = 4, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), op_imm(imm, 4), {}}} }
-emit_ext_v8b_v8b_v8b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_ext_v8b_v8b_v8b_i(dst, src, src2, imm)) }
-emit_ext_v16b_v16b_v16b_i     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_ext_v16b_v16b_v16b_i(dst, src, src2, imm)) }
-emit_ext_zb_zb_zb_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append(instructions, inst_ext_zb_zb_zb_i(rz, rz2, rz3, imm)) }
+emit_ext_v8b_v8b_v8b_i        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_ext_v8b_v8b_v8b_i(dst, src, src2, imm)) }
+emit_ext_v16b_v16b_v16b_i     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_ext_v16b_v16b_v16b_i(dst, src, src2, imm)) }
+emit_ext_zb_zb_zb_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) { append_elem(instructions, inst_ext_zb_zb_zb_i(rz, rz2, rz3, imm)) }
 inst_tbl_v8b_v16b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TBL, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_list(src, VSHAPE_16B, 1), op_v_8b(src2), {}, {}}} }
 inst_tbl_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TBL, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_list(src, VSHAPE_16B, 1), op_v_16b(src2), {}, {}}} }
 inst_tbl_zb_zl1b_zb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TBL, operand_count = 3, length = 4, ops = {op_z_b(rz), op_v_list(Register(REG_Z | (u16(rz2) & 0x1F)), ZSHAPE_B, 1), op_z_b(rz3), {}, {}}} }
@@ -3170,19 +3198,19 @@ inst_tbl_zh_zl1h_zh           :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_tbl_zs_zl1s_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TBL, operand_count = 3, length = 4, ops = {op_z_s(rz), op_v_list(Register(REG_Z | (u16(rz2) & 0x1F)), ZSHAPE_S, 1), op_z_s(rz3), {}, {}}} }
 inst_tbl_zd_zl1d_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TBL, operand_count = 3, length = 4, ops = {op_z_d(rz), op_v_list(Register(REG_Z | (u16(rz2) & 0x1F)), ZSHAPE_D, 1), op_z_d(rz3), {}, {}}} }
 inst_tbl_zb_zl2b_zb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TBL, operand_count = 3, length = 4, ops = {op_z_b(rz), op_v_list(Register(REG_Z | (u16(rz2) & 0x1F)), ZSHAPE_B, 2), op_z_b(rz3), {}, {}}} }
-emit_tbl_v8b_v16b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tbl_v8b_v16b_v8b(dst, src, src2)) }
-emit_tbl_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tbl_v16b_v16b_v16b(dst, src, src2)) }
-emit_tbl_zb_zl1b_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_tbl_zb_zl1b_zb(rz, rz2, rz3)) }
-emit_tbl_zh_zl1h_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_tbl_zh_zl1h_zh(rz, rz2, rz3)) }
-emit_tbl_zs_zl1s_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_tbl_zs_zl1s_zs(rz, rz2, rz3)) }
-emit_tbl_zd_zl1d_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_tbl_zd_zl1d_zd(rz, rz2, rz3)) }
-emit_tbl_zb_zl2b_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_tbl_zb_zl2b_zb(rz, rz2, rz3)) }
+emit_tbl_v8b_v16b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tbl_v8b_v16b_v8b(dst, src, src2)) }
+emit_tbl_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tbl_v16b_v16b_v16b(dst, src, src2)) }
+emit_tbl_zb_zl1b_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_tbl_zb_zl1b_zb(rz, rz2, rz3)) }
+emit_tbl_zh_zl1h_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_tbl_zh_zl1h_zh(rz, rz2, rz3)) }
+emit_tbl_zs_zl1s_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_tbl_zs_zl1s_zs(rz, rz2, rz3)) }
+emit_tbl_zd_zl1d_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_tbl_zd_zl1d_zd(rz, rz2, rz3)) }
+emit_tbl_zb_zl2b_zb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_tbl_zb_zl2b_zb(rz, rz2, rz3)) }
 inst_tbx_v8b_v16b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TBX, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_list(src, VSHAPE_16B, 1), op_v_8b(src2), {}, {}}} }
 inst_tbx_v16b_v16b_v16b       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TBX, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_list(src, VSHAPE_16B, 1), op_v_16b(src2), {}, {}}} }
 inst_tbx_zb_zb_zb             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TBX, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
-emit_tbx_v8b_v16b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tbx_v8b_v16b_v8b(dst, src, src2)) }
-emit_tbx_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tbx_v16b_v16b_v16b(dst, src, src2)) }
-emit_tbx_zb_zb_zb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_tbx_zb_zb_zb(rz, rz2, rz3)) }
+emit_tbx_v8b_v16b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tbx_v8b_v16b_v8b(dst, src, src2)) }
+emit_tbx_v16b_v16b_v16b       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tbx_v16b_v16b_v16b(dst, src, src2)) }
+emit_tbx_zb_zb_zb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_tbx_zb_zb_zb(rz, rz2, rz3)) }
 inst_zip1_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ZIP1, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_zip1_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ZIP1, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_zip1_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ZIP1, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -3195,18 +3223,18 @@ inst_zip1_zh_zh_zh            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_zip1_zs_zs_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ZIP1, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_zip1_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ZIP1, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
 inst_zip1_pb_pb_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ZIP1, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_zip1_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip1_v8b_v8b_v8b(dst, src, src2)) }
-emit_zip1_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip1_v16b_v16b_v16b(dst, src, src2)) }
-emit_zip1_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip1_v4h_v4h_v4h(dst, src, src2)) }
-emit_zip1_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip1_v8h_v8h_v8h(dst, src, src2)) }
-emit_zip1_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip1_v2s_v2s_v2s(dst, src, src2)) }
-emit_zip1_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip1_v4s_v4s_v4s(dst, src, src2)) }
-emit_zip1_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip1_v2d_v2d_v2d(dst, src, src2)) }
-emit_zip1_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip1_zb_zb_zb(rz, rz2, rz3)) }
-emit_zip1_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip1_zh_zh_zh(rz, rz2, rz3)) }
-emit_zip1_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip1_zs_zs_zs(rz, rz2, rz3)) }
-emit_zip1_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip1_zd_zd_zd(rz, rz2, rz3)) }
-emit_zip1_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip1_pb_pb_pb(rz, rz2, rz3)) }
+emit_zip1_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip1_v8b_v8b_v8b(dst, src, src2)) }
+emit_zip1_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip1_v16b_v16b_v16b(dst, src, src2)) }
+emit_zip1_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip1_v4h_v4h_v4h(dst, src, src2)) }
+emit_zip1_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip1_v8h_v8h_v8h(dst, src, src2)) }
+emit_zip1_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip1_v2s_v2s_v2s(dst, src, src2)) }
+emit_zip1_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip1_v4s_v4s_v4s(dst, src, src2)) }
+emit_zip1_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip1_v2d_v2d_v2d(dst, src, src2)) }
+emit_zip1_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip1_zb_zb_zb(rz, rz2, rz3)) }
+emit_zip1_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip1_zh_zh_zh(rz, rz2, rz3)) }
+emit_zip1_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip1_zs_zs_zs(rz, rz2, rz3)) }
+emit_zip1_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip1_zd_zd_zd(rz, rz2, rz3)) }
+emit_zip1_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip1_pb_pb_pb(rz, rz2, rz3)) }
 inst_zip2_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ZIP2, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_zip2_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ZIP2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_zip2_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ZIP2, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -3219,18 +3247,18 @@ inst_zip2_zh_zh_zh            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_zip2_zs_zs_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ZIP2, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_zip2_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ZIP2, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
 inst_zip2_pb_pb_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ZIP2, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_zip2_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip2_v8b_v8b_v8b(dst, src, src2)) }
-emit_zip2_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip2_v16b_v16b_v16b(dst, src, src2)) }
-emit_zip2_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip2_v4h_v4h_v4h(dst, src, src2)) }
-emit_zip2_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip2_v8h_v8h_v8h(dst, src, src2)) }
-emit_zip2_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip2_v2s_v2s_v2s(dst, src, src2)) }
-emit_zip2_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip2_v4s_v4s_v4s(dst, src, src2)) }
-emit_zip2_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_zip2_v2d_v2d_v2d(dst, src, src2)) }
-emit_zip2_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip2_zb_zb_zb(rz, rz2, rz3)) }
-emit_zip2_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip2_zh_zh_zh(rz, rz2, rz3)) }
-emit_zip2_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip2_zs_zs_zs(rz, rz2, rz3)) }
-emit_zip2_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip2_zd_zd_zd(rz, rz2, rz3)) }
-emit_zip2_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip2_pb_pb_pb(rz, rz2, rz3)) }
+emit_zip2_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip2_v8b_v8b_v8b(dst, src, src2)) }
+emit_zip2_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip2_v16b_v16b_v16b(dst, src, src2)) }
+emit_zip2_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip2_v4h_v4h_v4h(dst, src, src2)) }
+emit_zip2_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip2_v8h_v8h_v8h(dst, src, src2)) }
+emit_zip2_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip2_v2s_v2s_v2s(dst, src, src2)) }
+emit_zip2_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip2_v4s_v4s_v4s(dst, src, src2)) }
+emit_zip2_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_zip2_v2d_v2d_v2d(dst, src, src2)) }
+emit_zip2_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip2_zb_zb_zb(rz, rz2, rz3)) }
+emit_zip2_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip2_zh_zh_zh(rz, rz2, rz3)) }
+emit_zip2_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip2_zs_zs_zs(rz, rz2, rz3)) }
+emit_zip2_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip2_zd_zd_zd(rz, rz2, rz3)) }
+emit_zip2_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip2_pb_pb_pb(rz, rz2, rz3)) }
 inst_uzp1_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UZP1, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uzp1_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UZP1, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uzp1_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UZP1, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -3243,18 +3271,18 @@ inst_uzp1_zh_zh_zh            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_uzp1_zs_zs_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UZP1, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_uzp1_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UZP1, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
 inst_uzp1_pb_pb_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UZP1, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_uzp1_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp1_v8b_v8b_v8b(dst, src, src2)) }
-emit_uzp1_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp1_v16b_v16b_v16b(dst, src, src2)) }
-emit_uzp1_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp1_v4h_v4h_v4h(dst, src, src2)) }
-emit_uzp1_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp1_v8h_v8h_v8h(dst, src, src2)) }
-emit_uzp1_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp1_v2s_v2s_v2s(dst, src, src2)) }
-emit_uzp1_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp1_v4s_v4s_v4s(dst, src, src2)) }
-emit_uzp1_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp1_v2d_v2d_v2d(dst, src, src2)) }
-emit_uzp1_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp1_zb_zb_zb(rz, rz2, rz3)) }
-emit_uzp1_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp1_zh_zh_zh(rz, rz2, rz3)) }
-emit_uzp1_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp1_zs_zs_zs(rz, rz2, rz3)) }
-emit_uzp1_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp1_zd_zd_zd(rz, rz2, rz3)) }
-emit_uzp1_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp1_pb_pb_pb(rz, rz2, rz3)) }
+emit_uzp1_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp1_v8b_v8b_v8b(dst, src, src2)) }
+emit_uzp1_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp1_v16b_v16b_v16b(dst, src, src2)) }
+emit_uzp1_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp1_v4h_v4h_v4h(dst, src, src2)) }
+emit_uzp1_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp1_v8h_v8h_v8h(dst, src, src2)) }
+emit_uzp1_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp1_v2s_v2s_v2s(dst, src, src2)) }
+emit_uzp1_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp1_v4s_v4s_v4s(dst, src, src2)) }
+emit_uzp1_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp1_v2d_v2d_v2d(dst, src, src2)) }
+emit_uzp1_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp1_zb_zb_zb(rz, rz2, rz3)) }
+emit_uzp1_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp1_zh_zh_zh(rz, rz2, rz3)) }
+emit_uzp1_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp1_zs_zs_zs(rz, rz2, rz3)) }
+emit_uzp1_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp1_zd_zd_zd(rz, rz2, rz3)) }
+emit_uzp1_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp1_pb_pb_pb(rz, rz2, rz3)) }
 inst_uzp2_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UZP2, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_uzp2_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UZP2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_uzp2_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .UZP2, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -3267,18 +3295,18 @@ inst_uzp2_zh_zh_zh            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_uzp2_zs_zs_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UZP2, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_uzp2_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UZP2, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
 inst_uzp2_pb_pb_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UZP2, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_uzp2_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp2_v8b_v8b_v8b(dst, src, src2)) }
-emit_uzp2_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp2_v16b_v16b_v16b(dst, src, src2)) }
-emit_uzp2_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp2_v4h_v4h_v4h(dst, src, src2)) }
-emit_uzp2_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp2_v8h_v8h_v8h(dst, src, src2)) }
-emit_uzp2_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp2_v2s_v2s_v2s(dst, src, src2)) }
-emit_uzp2_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp2_v4s_v4s_v4s(dst, src, src2)) }
-emit_uzp2_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_uzp2_v2d_v2d_v2d(dst, src, src2)) }
-emit_uzp2_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp2_zb_zb_zb(rz, rz2, rz3)) }
-emit_uzp2_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp2_zh_zh_zh(rz, rz2, rz3)) }
-emit_uzp2_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp2_zs_zs_zs(rz, rz2, rz3)) }
-emit_uzp2_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp2_zd_zd_zd(rz, rz2, rz3)) }
-emit_uzp2_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp2_pb_pb_pb(rz, rz2, rz3)) }
+emit_uzp2_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp2_v8b_v8b_v8b(dst, src, src2)) }
+emit_uzp2_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp2_v16b_v16b_v16b(dst, src, src2)) }
+emit_uzp2_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp2_v4h_v4h_v4h(dst, src, src2)) }
+emit_uzp2_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp2_v8h_v8h_v8h(dst, src, src2)) }
+emit_uzp2_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp2_v2s_v2s_v2s(dst, src, src2)) }
+emit_uzp2_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp2_v4s_v4s_v4s(dst, src, src2)) }
+emit_uzp2_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_uzp2_v2d_v2d_v2d(dst, src, src2)) }
+emit_uzp2_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp2_zb_zb_zb(rz, rz2, rz3)) }
+emit_uzp2_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp2_zh_zh_zh(rz, rz2, rz3)) }
+emit_uzp2_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp2_zs_zs_zs(rz, rz2, rz3)) }
+emit_uzp2_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp2_zd_zd_zd(rz, rz2, rz3)) }
+emit_uzp2_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp2_pb_pb_pb(rz, rz2, rz3)) }
 inst_trn1_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TRN1, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_trn1_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TRN1, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_trn1_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TRN1, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -3291,18 +3319,18 @@ inst_trn1_zh_zh_zh            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_trn1_zs_zs_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TRN1, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_trn1_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TRN1, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
 inst_trn1_pb_pb_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TRN1, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_trn1_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn1_v8b_v8b_v8b(dst, src, src2)) }
-emit_trn1_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn1_v16b_v16b_v16b(dst, src, src2)) }
-emit_trn1_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn1_v4h_v4h_v4h(dst, src, src2)) }
-emit_trn1_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn1_v8h_v8h_v8h(dst, src, src2)) }
-emit_trn1_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn1_v2s_v2s_v2s(dst, src, src2)) }
-emit_trn1_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn1_v4s_v4s_v4s(dst, src, src2)) }
-emit_trn1_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn1_v2d_v2d_v2d(dst, src, src2)) }
-emit_trn1_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn1_zb_zb_zb(rz, rz2, rz3)) }
-emit_trn1_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn1_zh_zh_zh(rz, rz2, rz3)) }
-emit_trn1_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn1_zs_zs_zs(rz, rz2, rz3)) }
-emit_trn1_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn1_zd_zd_zd(rz, rz2, rz3)) }
-emit_trn1_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn1_pb_pb_pb(rz, rz2, rz3)) }
+emit_trn1_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn1_v8b_v8b_v8b(dst, src, src2)) }
+emit_trn1_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn1_v16b_v16b_v16b(dst, src, src2)) }
+emit_trn1_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn1_v4h_v4h_v4h(dst, src, src2)) }
+emit_trn1_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn1_v8h_v8h_v8h(dst, src, src2)) }
+emit_trn1_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn1_v2s_v2s_v2s(dst, src, src2)) }
+emit_trn1_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn1_v4s_v4s_v4s(dst, src, src2)) }
+emit_trn1_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn1_v2d_v2d_v2d(dst, src, src2)) }
+emit_trn1_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn1_zb_zb_zb(rz, rz2, rz3)) }
+emit_trn1_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn1_zh_zh_zh(rz, rz2, rz3)) }
+emit_trn1_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn1_zs_zs_zs(rz, rz2, rz3)) }
+emit_trn1_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn1_zd_zd_zd(rz, rz2, rz3)) }
+emit_trn1_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn1_pb_pb_pb(rz, rz2, rz3)) }
 inst_trn2_v8b_v8b_v8b         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TRN2, operand_count = 3, length = 4, ops = {op_v_8b(dst), op_v_8b(src), op_v_8b(src2), {}, {}}} }
 inst_trn2_v16b_v16b_v16b      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TRN2, operand_count = 3, length = 4, ops = {op_v_16b(dst), op_v_16b(src), op_v_16b(src2), {}, {}}} }
 inst_trn2_v4h_v4h_v4h         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TRN2, operand_count = 3, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), {}, {}}} }
@@ -3315,56 +3343,56 @@ inst_trn2_zh_zh_zh            :: #force_inline proc "contextless" (rz: u8, rz2:
 inst_trn2_zs_zs_zs            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TRN2, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_trn2_zd_zd_zd            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TRN2, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
 inst_trn2_pb_pb_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .TRN2, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_trn2_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn2_v8b_v8b_v8b(dst, src, src2)) }
-emit_trn2_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn2_v16b_v16b_v16b(dst, src, src2)) }
-emit_trn2_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn2_v4h_v4h_v4h(dst, src, src2)) }
-emit_trn2_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn2_v8h_v8h_v8h(dst, src, src2)) }
-emit_trn2_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn2_v2s_v2s_v2s(dst, src, src2)) }
-emit_trn2_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn2_v4s_v4s_v4s(dst, src, src2)) }
-emit_trn2_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_trn2_v2d_v2d_v2d(dst, src, src2)) }
-emit_trn2_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn2_zb_zb_zb(rz, rz2, rz3)) }
-emit_trn2_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn2_zh_zh_zh(rz, rz2, rz3)) }
-emit_trn2_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn2_zs_zs_zs(rz, rz2, rz3)) }
-emit_trn2_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn2_zd_zd_zd(rz, rz2, rz3)) }
-emit_trn2_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_trn2_pb_pb_pb(rz, rz2, rz3)) }
+emit_trn2_v8b_v8b_v8b         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn2_v8b_v8b_v8b(dst, src, src2)) }
+emit_trn2_v16b_v16b_v16b      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn2_v16b_v16b_v16b(dst, src, src2)) }
+emit_trn2_v4h_v4h_v4h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn2_v4h_v4h_v4h(dst, src, src2)) }
+emit_trn2_v8h_v8h_v8h         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn2_v8h_v8h_v8h(dst, src, src2)) }
+emit_trn2_v2s_v2s_v2s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn2_v2s_v2s_v2s(dst, src, src2)) }
+emit_trn2_v4s_v4s_v4s         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn2_v4s_v4s_v4s(dst, src, src2)) }
+emit_trn2_v2d_v2d_v2d         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_trn2_v2d_v2d_v2d(dst, src, src2)) }
+emit_trn2_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn2_zb_zb_zb(rz, rz2, rz3)) }
+emit_trn2_zh_zh_zh            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn2_zh_zh_zh(rz, rz2, rz3)) }
+emit_trn2_zs_zs_zs            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn2_zs_zs_zs(rz, rz2, rz3)) }
+emit_trn2_zd_zd_zd            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn2_zd_zd_zd(rz, rz2, rz3)) }
+emit_trn2_pb_pb_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_trn2_pb_pb_pb(rz, rz2, rz3)) }
 inst_not_v8b_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NOT, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_not_v16b_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NOT, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_not_pb_p_pb              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .NOT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_not_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_not_v8b_v8b(dst, src)) }
-emit_not_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_not_v16b_v16b(dst, src)) }
-emit_not_pb_p_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_not_pb_p_pb(rz, rz2, rz3)) }
+emit_not_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_not_v8b_v8b(dst, src)) }
+emit_not_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_not_v16b_v16b(dst, src)) }
+emit_not_pb_p_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_not_pb_p_pb(rz, rz2, rz3)) }
 inst_rev64_v8b_v8b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV64, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_rev64_v16b_v16b          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV64, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_rev64_v4h_v4h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV64, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_v_4h(src), {}, {}, {}}} }
 inst_rev64_v8h_v8h            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV64, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_v_8h(src), {}, {}, {}}} }
 inst_rev64_v2s_v2s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV64, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_rev64_v4s_v4s            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .REV64, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
-emit_rev64_v8b_v8b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev64_v8b_v8b(dst, src)) }
-emit_rev64_v16b_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev64_v16b_v16b(dst, src)) }
-emit_rev64_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev64_v4h_v4h(dst, src)) }
-emit_rev64_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev64_v8h_v8h(dst, src)) }
-emit_rev64_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev64_v2s_v2s(dst, src)) }
-emit_rev64_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_rev64_v4s_v4s(dst, src)) }
+emit_rev64_v8b_v8b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev64_v8b_v8b(dst, src)) }
+emit_rev64_v16b_v16b          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev64_v16b_v16b(dst, src)) }
+emit_rev64_v4h_v4h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev64_v4h_v4h(dst, src)) }
+emit_rev64_v8h_v8h            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev64_v8h_v8h(dst, src)) }
+emit_rev64_v2s_v2s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev64_v2s_v2s(dst, src)) }
+emit_rev64_v4s_v4s            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_rev64_v4s_v4s(dst, src)) }
 inst_cnt_v8b_v8b              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNT, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_v_8b(src), {}, {}, {}}} }
 inst_cnt_v16b_v16b            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNT, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_v_16b(src), {}, {}, {}}} }
 inst_cnt_zb_p_zb              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CNT, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), {}, {}}} }
 inst_cnt_zh_p_zh              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CNT, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), {}, {}}} }
 inst_cnt_zs_p_zs              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CNT, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_cnt_zd_p_zd              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .CNT, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_cnt_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cnt_v8b_v8b(dst, src)) }
-emit_cnt_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cnt_v16b_v16b(dst, src)) }
-emit_cnt_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_cnt_zb_p_zb(rz, rz2, rz3)) }
-emit_cnt_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_cnt_zh_p_zh(rz, rz2, rz3)) }
-emit_cnt_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_cnt_zs_p_zs(rz, rz2, rz3)) }
-emit_cnt_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_cnt_zd_p_zd(rz, rz2, rz3)) }
+emit_cnt_v8b_v8b              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cnt_v8b_v8b(dst, src)) }
+emit_cnt_v16b_v16b            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cnt_v16b_v16b(dst, src)) }
+emit_cnt_zb_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_cnt_zb_p_zb(rz, rz2, rz3)) }
+emit_cnt_zh_p_zh              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_cnt_zh_p_zh(rz, rz2, rz3)) }
+emit_cnt_zs_p_zs              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_cnt_zs_p_zs(rz, rz2, rz3)) }
+emit_cnt_zd_p_zd              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_cnt_zd_p_zd(rz, rz2, rz3)) }
 inst_urecpe_v2s_v2s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .URECPE, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_urecpe_v4s_v4s           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .URECPE, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
-emit_urecpe_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_urecpe_v2s_v2s(dst, src)) }
-emit_urecpe_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_urecpe_v4s_v4s(dst, src)) }
+emit_urecpe_v2s_v2s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_urecpe_v2s_v2s(dst, src)) }
+emit_urecpe_v4s_v4s           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_urecpe_v4s_v4s(dst, src)) }
 inst_ursqrte_v2s_v2s          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .URSQRTE, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_v_2s(src), {}, {}, {}}} }
 inst_ursqrte_v4s_v4s          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .URSQRTE, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_v_4s(src), {}, {}, {}}} }
-emit_ursqrte_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ursqrte_v2s_v2s(dst, src)) }
-emit_ursqrte_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ursqrte_v4s_v4s(dst, src)) }
+emit_ursqrte_v2s_v2s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ursqrte_v2s_v2s(dst, src)) }
+emit_ursqrte_v4s_v4s          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ursqrte_v4s_v4s(dst, src)) }
 inst_movi_v8b_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVI, operand_count = 2, length = 4, ops = {op_v_8b(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_movi_v16b_i              :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVI, operand_count = 2, length = 4, ops = {op_v_16b(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_movi_v4h_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVI, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_imm(imm, 1), {}, {}, {}}} }
@@ -3372,21 +3400,21 @@ inst_movi_v8h_i               :: #force_inline proc "contextless" (dst: Register
 inst_movi_v2s_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVI, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_movi_v4s_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVI, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_movi_v2d_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVI, operand_count = 2, length = 4, ops = {op_v_2d(dst), op_imm(imm, 1), {}, {}, {}}} }
-emit_movi_v8b_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movi_v8b_i(dst, imm)) }
-emit_movi_v16b_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movi_v16b_i(dst, imm)) }
-emit_movi_v4h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movi_v4h_i(dst, imm)) }
-emit_movi_v8h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movi_v8h_i(dst, imm)) }
-emit_movi_v2s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movi_v2s_i(dst, imm)) }
-emit_movi_v4s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movi_v4s_i(dst, imm)) }
-emit_movi_v2d_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_movi_v2d_i(dst, imm)) }
+emit_movi_v8b_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movi_v8b_i(dst, imm)) }
+emit_movi_v16b_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movi_v16b_i(dst, imm)) }
+emit_movi_v4h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movi_v4h_i(dst, imm)) }
+emit_movi_v8h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movi_v8h_i(dst, imm)) }
+emit_movi_v2s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movi_v2s_i(dst, imm)) }
+emit_movi_v4s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movi_v4s_i(dst, imm)) }
+emit_movi_v2d_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_movi_v2d_i(dst, imm)) }
 inst_mvni_v4h_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MVNI, operand_count = 2, length = 4, ops = {op_v_4h(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_mvni_v8h_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MVNI, operand_count = 2, length = 4, ops = {op_v_8h(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_mvni_v2s_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MVNI, operand_count = 2, length = 4, ops = {op_v_2s(dst), op_imm(imm, 1), {}, {}, {}}} }
 inst_mvni_v4s_i               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MVNI, operand_count = 2, length = 4, ops = {op_v_4s(dst), op_imm(imm, 1), {}, {}, {}}} }
-emit_mvni_v4h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mvni_v4h_i(dst, imm)) }
-emit_mvni_v8h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mvni_v8h_i(dst, imm)) }
-emit_mvni_v2s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mvni_v2s_i(dst, imm)) }
-emit_mvni_v4s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mvni_v4s_i(dst, imm)) }
+emit_mvni_v4h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mvni_v4h_i(dst, imm)) }
+emit_mvni_v8h_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mvni_v8h_i(dst, imm)) }
+emit_mvni_v2s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mvni_v2s_i(dst, imm)) }
+emit_mvni_v4s_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mvni_v4s_i(dst, imm)) }
 inst_ld1_v16b_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 1), op_mem(mem), {}, {}, {}}} }
 inst_ld1_v8h_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_8H, 1), op_mem(mem), {}, {}, {}}} }
 inst_ld1_v4s_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_4S, 1), op_mem(mem), {}, {}, {}}} }
@@ -3395,44 +3423,44 @@ inst_ld1_veb_i_m              :: #force_inline proc "contextless" (dst: Register
 inst_ld1_veh_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_H, 1), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld1_ves_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_S, 1), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld1_ved_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_D, 1), op_lane_index(imm), op_mem(mem), {}, {}}} }
-emit_ld1_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld1_v16b_m(dst, mem)) }
-emit_ld1_v8h_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld1_v8h_m(dst, mem)) }
-emit_ld1_v4s_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld1_v4s_m(dst, mem)) }
-emit_ld1_v2d_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld1_v2d_m(dst, mem)) }
-emit_ld1_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld1_veb_i_m(dst, imm, mem)) }
-emit_ld1_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld1_veh_i_m(dst, imm, mem)) }
-emit_ld1_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld1_ves_i_m(dst, imm, mem)) }
-emit_ld1_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld1_ved_i_m(dst, imm, mem)) }
+emit_ld1_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld1_v16b_m(dst, mem)) }
+emit_ld1_v8h_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld1_v8h_m(dst, mem)) }
+emit_ld1_v4s_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld1_v4s_m(dst, mem)) }
+emit_ld1_v2d_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld1_v2d_m(dst, mem)) }
+emit_ld1_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld1_veb_i_m(dst, imm, mem)) }
+emit_ld1_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld1_veh_i_m(dst, imm, mem)) }
+emit_ld1_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld1_ves_i_m(dst, imm, mem)) }
+emit_ld1_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld1_ved_i_m(dst, imm, mem)) }
 inst_ld2_v16b_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD2, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 2), op_mem(mem), {}, {}, {}}} }
 inst_ld2_veb_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD2, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_B, 2), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld2_veh_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD2, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_H, 2), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld2_ves_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD2, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_S, 2), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld2_ved_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD2, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_D, 2), op_lane_index(imm), op_mem(mem), {}, {}}} }
-emit_ld2_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld2_v16b_m(dst, mem)) }
-emit_ld2_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld2_veb_i_m(dst, imm, mem)) }
-emit_ld2_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld2_veh_i_m(dst, imm, mem)) }
-emit_ld2_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld2_ves_i_m(dst, imm, mem)) }
-emit_ld2_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld2_ved_i_m(dst, imm, mem)) }
+emit_ld2_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld2_v16b_m(dst, mem)) }
+emit_ld2_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld2_veb_i_m(dst, imm, mem)) }
+emit_ld2_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld2_veh_i_m(dst, imm, mem)) }
+emit_ld2_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld2_ves_i_m(dst, imm, mem)) }
+emit_ld2_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld2_ved_i_m(dst, imm, mem)) }
 inst_ld3_v16b_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD3, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 3), op_mem(mem), {}, {}, {}}} }
 inst_ld3_veb_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD3, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_B, 3), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld3_veh_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD3, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_H, 3), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld3_ves_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD3, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_S, 3), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld3_ved_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD3, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_D, 3), op_lane_index(imm), op_mem(mem), {}, {}}} }
-emit_ld3_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld3_v16b_m(dst, mem)) }
-emit_ld3_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld3_veb_i_m(dst, imm, mem)) }
-emit_ld3_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld3_veh_i_m(dst, imm, mem)) }
-emit_ld3_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld3_ves_i_m(dst, imm, mem)) }
-emit_ld3_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld3_ved_i_m(dst, imm, mem)) }
+emit_ld3_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld3_v16b_m(dst, mem)) }
+emit_ld3_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld3_veb_i_m(dst, imm, mem)) }
+emit_ld3_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld3_veh_i_m(dst, imm, mem)) }
+emit_ld3_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld3_ves_i_m(dst, imm, mem)) }
+emit_ld3_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld3_ved_i_m(dst, imm, mem)) }
 inst_ld4_v16b_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD4, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 4), op_mem(mem), {}, {}, {}}} }
 inst_ld4_veb_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD4, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_B, 4), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld4_veh_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD4, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_H, 4), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld4_ves_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD4, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_S, 4), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_ld4_ved_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD4, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_D, 4), op_lane_index(imm), op_mem(mem), {}, {}}} }
-emit_ld4_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld4_v16b_m(dst, mem)) }
-emit_ld4_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld4_veb_i_m(dst, imm, mem)) }
-emit_ld4_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld4_veh_i_m(dst, imm, mem)) }
-emit_ld4_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld4_ves_i_m(dst, imm, mem)) }
-emit_ld4_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_ld4_ved_i_m(dst, imm, mem)) }
+emit_ld4_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld4_v16b_m(dst, mem)) }
+emit_ld4_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld4_veb_i_m(dst, imm, mem)) }
+emit_ld4_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld4_veh_i_m(dst, imm, mem)) }
+emit_ld4_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld4_ves_i_m(dst, imm, mem)) }
+emit_ld4_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_ld4_ved_i_m(dst, imm, mem)) }
 inst_st1_v16b_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 1), op_mem(mem), {}, {}, {}}} }
 inst_st1_v8h_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_8H, 1), op_mem(mem), {}, {}, {}}} }
 inst_st1_v4s_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_4S, 1), op_mem(mem), {}, {}, {}}} }
@@ -3441,644 +3469,644 @@ inst_st1_veb_i_m              :: #force_inline proc "contextless" (dst: Register
 inst_st1_veh_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_H, 1), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st1_ves_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_S, 1), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st1_ved_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_D, 1), op_lane_index(imm), op_mem(mem), {}, {}}} }
-emit_st1_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st1_v16b_m(dst, mem)) }
-emit_st1_v8h_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st1_v8h_m(dst, mem)) }
-emit_st1_v4s_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st1_v4s_m(dst, mem)) }
-emit_st1_v2d_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st1_v2d_m(dst, mem)) }
-emit_st1_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st1_veb_i_m(dst, imm, mem)) }
-emit_st1_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st1_veh_i_m(dst, imm, mem)) }
-emit_st1_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st1_ves_i_m(dst, imm, mem)) }
-emit_st1_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st1_ved_i_m(dst, imm, mem)) }
+emit_st1_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st1_v16b_m(dst, mem)) }
+emit_st1_v8h_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st1_v8h_m(dst, mem)) }
+emit_st1_v4s_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st1_v4s_m(dst, mem)) }
+emit_st1_v2d_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st1_v2d_m(dst, mem)) }
+emit_st1_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st1_veb_i_m(dst, imm, mem)) }
+emit_st1_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st1_veh_i_m(dst, imm, mem)) }
+emit_st1_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st1_ves_i_m(dst, imm, mem)) }
+emit_st1_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st1_ved_i_m(dst, imm, mem)) }
 inst_st2_v16b_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST2, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 2), op_mem(mem), {}, {}, {}}} }
 inst_st2_veb_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST2, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_B, 2), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st2_veh_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST2, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_H, 2), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st2_ves_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST2, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_S, 2), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st2_ved_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST2, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_D, 2), op_lane_index(imm), op_mem(mem), {}, {}}} }
-emit_st2_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st2_v16b_m(dst, mem)) }
-emit_st2_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st2_veb_i_m(dst, imm, mem)) }
-emit_st2_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st2_veh_i_m(dst, imm, mem)) }
-emit_st2_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st2_ves_i_m(dst, imm, mem)) }
-emit_st2_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st2_ved_i_m(dst, imm, mem)) }
+emit_st2_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st2_v16b_m(dst, mem)) }
+emit_st2_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st2_veb_i_m(dst, imm, mem)) }
+emit_st2_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st2_veh_i_m(dst, imm, mem)) }
+emit_st2_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st2_ves_i_m(dst, imm, mem)) }
+emit_st2_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st2_ved_i_m(dst, imm, mem)) }
 inst_st3_v16b_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST3, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 3), op_mem(mem), {}, {}, {}}} }
 inst_st3_veb_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST3, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_B, 3), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st3_veh_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST3, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_H, 3), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st3_ves_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST3, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_S, 3), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st3_ved_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST3, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_D, 3), op_lane_index(imm), op_mem(mem), {}, {}}} }
-emit_st3_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st3_v16b_m(dst, mem)) }
-emit_st3_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st3_veb_i_m(dst, imm, mem)) }
-emit_st3_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st3_veh_i_m(dst, imm, mem)) }
-emit_st3_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st3_ves_i_m(dst, imm, mem)) }
-emit_st3_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st3_ved_i_m(dst, imm, mem)) }
+emit_st3_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st3_v16b_m(dst, mem)) }
+emit_st3_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st3_veb_i_m(dst, imm, mem)) }
+emit_st3_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st3_veh_i_m(dst, imm, mem)) }
+emit_st3_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st3_ves_i_m(dst, imm, mem)) }
+emit_st3_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st3_ved_i_m(dst, imm, mem)) }
 inst_st4_v16b_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST4, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 4), op_mem(mem), {}, {}, {}}} }
 inst_st4_veb_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST4, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_B, 4), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st4_veh_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST4, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_H, 4), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st4_ves_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST4, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_S, 4), op_lane_index(imm), op_mem(mem), {}, {}}} }
 inst_st4_ved_i_m              :: #force_inline proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST4, operand_count = 3, length = 4, ops = {op_v_list(dst, VSHAPE_ELEM_D, 4), op_lane_index(imm), op_mem(mem), {}, {}}} }
-emit_st4_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st4_v16b_m(dst, mem)) }
-emit_st4_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st4_veb_i_m(dst, imm, mem)) }
-emit_st4_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st4_veh_i_m(dst, imm, mem)) }
-emit_st4_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st4_ves_i_m(dst, imm, mem)) }
-emit_st4_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append(instructions, inst_st4_ved_i_m(dst, imm, mem)) }
+emit_st4_v16b_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st4_v16b_m(dst, mem)) }
+emit_st4_veb_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st4_veb_i_m(dst, imm, mem)) }
+emit_st4_veh_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st4_veh_i_m(dst, imm, mem)) }
+emit_st4_ves_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st4_ves_i_m(dst, imm, mem)) }
+emit_st4_ved_i_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) { append_elem(instructions, inst_st4_ved_i_m(dst, imm, mem)) }
 inst_ld1r_v16b_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1R, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 1), op_mem(mem), {}, {}, {}}} }
-emit_ld1r_v16b_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld1r_v16b_m(dst, mem)) }
+emit_ld1r_v16b_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld1r_v16b_m(dst, mem)) }
 inst_ld2r_v16b_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD2R, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 2), op_mem(mem), {}, {}, {}}} }
-emit_ld2r_v16b_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld2r_v16b_m(dst, mem)) }
+emit_ld2r_v16b_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld2r_v16b_m(dst, mem)) }
 inst_ld3r_v16b_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD3R, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 3), op_mem(mem), {}, {}, {}}} }
-emit_ld3r_v16b_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld3r_v16b_m(dst, mem)) }
+emit_ld3r_v16b_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld3r_v16b_m(dst, mem)) }
 inst_ld4r_v16b_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD4R, operand_count = 2, length = 4, ops = {op_v_list(dst, VSHAPE_16B, 4), op_mem(mem), {}, {}, {}}} }
-emit_ld4r_v16b_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld4r_v16b_m(dst, mem)) }
+emit_ld4r_v16b_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld4r_v16b_m(dst, mem)) }
 inst_subr_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SUBR, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_subr_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SUBR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_subr_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SUBR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_subr_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SUBR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_subr_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_subr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_subr_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_subr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_subr_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_subr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_subr_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_subr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_subr_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_subr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_subr_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_subr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_subr_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_subr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_subr_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_subr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_asrr_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ASRR, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_asrr_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ASRR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_asrr_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ASRR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_asrr_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ASRR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_asrr_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_asrr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_asrr_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_asrr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_asrr_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_asrr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_asrr_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_asrr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_asrr_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_asrr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_asrr_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_asrr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_asrr_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_asrr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_asrr_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_asrr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_lslr_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSLR, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_lslr_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSLR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_lslr_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSLR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_lslr_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSLR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_lslr_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lslr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_lslr_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lslr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_lslr_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lslr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_lslr_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lslr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_lslr_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lslr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_lslr_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lslr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_lslr_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lslr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_lslr_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lslr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_lsrr_zb_p_zb_zb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSRR, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_lsrr_zh_p_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSRR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_lsrr_zs_p_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSRR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_lsrr_zd_p_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .LSRR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_lsrr_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsrr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_lsrr_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsrr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_lsrr_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsrr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_lsrr_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_lsrr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_lsrr_zb_p_zb_zb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsrr_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_lsrr_zh_p_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsrr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_lsrr_zs_p_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsrr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_lsrr_zd_p_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_lsrr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_ftsmul_zh_zh_zh          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FTSMUL, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_ftsmul_zs_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FTSMUL, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_ftsmul_zd_zd_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .FTSMUL, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_ftsmul_zh_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_ftsmul_zh_zh_zh(rz, rz2, rz3)) }
-emit_ftsmul_zs_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_ftsmul_zs_zs_zs(rz, rz2, rz3)) }
-emit_ftsmul_zd_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_ftsmul_zd_zd_zd(rz, rz2, rz3)) }
+emit_ftsmul_zh_zh_zh          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_ftsmul_zh_zh_zh(rz, rz2, rz3)) }
+emit_ftsmul_zs_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_ftsmul_zs_zs_zs(rz, rz2, rz3)) }
+emit_ftsmul_zd_zd_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_ftsmul_zd_zd_zd(rz, rz2, rz3)) }
 inst_fsubr_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FSUBR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fsubr_zs_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FSUBR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fsubr_zd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FSUBR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fsubr_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fsubr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fsubr_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fsubr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fsubr_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fsubr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fsubr_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fsubr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fsubr_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fsubr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fsubr_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fsubr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fdivr_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FDIVR, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fdivr_zs_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FDIVR, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fdivr_zd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FDIVR, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fdivr_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fdivr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fdivr_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fdivr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fdivr_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fdivr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fdivr_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fdivr_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fdivr_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fdivr_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fdivr_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fdivr_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fnmla_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FNMLA, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fnmla_zs_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FNMLA, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fnmla_zd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FNMLA, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fnmla_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fnmla_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fnmla_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fnmla_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fnmla_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fnmla_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fnmla_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fnmla_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fnmla_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fnmla_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fnmla_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fnmla_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fnmls_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FNMLS, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fnmls_zs_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FNMLS, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fnmls_zd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FNMLS, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fnmls_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fnmls_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fnmls_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fnmls_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fnmls_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fnmls_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fnmls_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fnmls_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fnmls_zs_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fnmls_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fnmls_zd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fnmls_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_nand_pb_p_pb_pb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .NAND, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_nand_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_nand_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_nand_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_nand_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_nor_pb_p_pb_pb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .NOR, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_nor_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_nor_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_nor_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_nor_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_sel_pb_p_pb_pb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SEL, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_sel_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sel_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_sel_pb_p_pb_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sel_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_orrs_pb_p_pb_pb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ORRS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_orrs_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_orrs_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_orrs_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_orrs_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_eors_pb_p_pb_pb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .EORS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_eors_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_eors_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_eors_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_eors_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_nands_pb_p_pb_pb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .NANDS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_nands_pb_p_pb_pb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_nands_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_nands_pb_p_pb_pb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_nands_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_nors_pb_p_pb_pb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .NORS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_nors_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_nors_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_nors_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_nors_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_orns_pb_p_pb_pb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .ORNS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_orns_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_orns_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_orns_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_orns_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_movs_pb_p_p              :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .MOVS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_movs_pb_p_p              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_movs_pb_p_p(rz, rz2, rz3)) }
+emit_movs_pb_p_p              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_movs_pb_p_p(rz, rz2, rz3)) }
 inst_ptrue_pb_i               :: #force_inline proc "contextless" (rz: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .PTRUE, operand_count = 2, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_imm(imm, 4), {}, {}, {}}} }
-emit_ptrue_pb_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64) { append(instructions, inst_ptrue_pb_i(rz, imm)) }
+emit_ptrue_pb_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64) { append_elem(instructions, inst_ptrue_pb_i(rz, imm)) }
 inst_ptrues_pb_i              :: #force_inline proc "contextless" (rz: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .PTRUES, operand_count = 2, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_imm(imm, 4), {}, {}, {}}} }
-emit_ptrues_pb_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64) { append(instructions, inst_ptrues_pb_i(rz, imm)) }
+emit_ptrues_pb_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64) { append_elem(instructions, inst_ptrues_pb_i(rz, imm)) }
 inst_pfalse_pb                :: #force_inline proc "contextless" (rz: u8) -> Instruction { return Instruction{mnemonic = .PFALSE, operand_count = 1, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), {}, {}, {}, {}}} }
-emit_pfalse_pb                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8) { append(instructions, inst_pfalse_pb(rz)) }
+emit_pfalse_pb                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8) { append_elem(instructions, inst_pfalse_pb(rz)) }
 inst_pfirst_pb_p_pb           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .PFIRST, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_pfirst_pb_p_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_pfirst_pb_p_pb(rz, rz2, rz3)) }
+emit_pfirst_pb_p_pb           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_pfirst_pb_p_pb(rz, rz2, rz3)) }
 inst_pnext_pb_p_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .PNEXT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_pnext_pb_p_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_pnext_pb_p_pb(rz, rz2, rz3)) }
+emit_pnext_pb_p_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_pnext_pb_p_pb(rz, rz2, rz3)) }
 inst_brka_pb_p_pb             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BRKA, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_brka_pb_p_pb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_brka_pb_p_pb(rz, rz2, rz3)) }
+emit_brka_pb_p_pb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_brka_pb_p_pb(rz, rz2, rz3)) }
 inst_brkb_pb_p_pb             :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BRKB, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_brkb_pb_p_pb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_brkb_pb_p_pb(rz, rz2, rz3)) }
+emit_brkb_pb_p_pb             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_brkb_pb_p_pb(rz, rz2, rz3)) }
 inst_brkas_pb_p_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BRKAS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_brkas_pb_p_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_brkas_pb_p_pb(rz, rz2, rz3)) }
+emit_brkas_pb_p_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_brkas_pb_p_pb(rz, rz2, rz3)) }
 inst_brkbs_pb_p_pb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BRKBS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), {}, {}}} }
-emit_brkbs_pb_p_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_brkbs_pb_p_pb(rz, rz2, rz3)) }
+emit_brkbs_pb_p_pb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_brkbs_pb_p_pb(rz, rz2, rz3)) }
 inst_brkpa_pb_p_pb_pb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BRKPA, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_brkpa_pb_p_pb_pb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_brkpa_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_brkpa_pb_p_pb_pb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_brkpa_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_brkpb_pb_p_pb_pb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BRKPB, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_brkpb_pb_p_pb_pb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_brkpb_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_brkpb_pb_p_pb_pb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_brkpb_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_brkn_pb_p_pb_pb          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BRKN, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(Register(REG_P | (u16(rz3) & 0xF))), op_reg(Register(REG_P | (u16(rz4) & 0xF))), {}}} }
-emit_brkn_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_brkn_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
+emit_brkn_pb_p_pb_pb          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_brkn_pb_p_pb_pb(rz, rz2, rz3, rz4)) }
 inst_rdffr_pb                 :: #force_inline proc "contextless" (rz: u8) -> Instruction { return Instruction{mnemonic = .RDFFR, operand_count = 1, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), {}, {}, {}, {}}} }
-emit_rdffr_pb                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8) { append(instructions, inst_rdffr_pb(rz)) }
+emit_rdffr_pb                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8) { append_elem(instructions, inst_rdffr_pb(rz)) }
 inst_wrffr_pb                 :: #force_inline proc "contextless" (rz: u8) -> Instruction { return Instruction{mnemonic = .WRFFR, operand_count = 1, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), {}, {}, {}, {}}} }
-emit_wrffr_pb                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8) { append(instructions, inst_wrffr_pb(rz)) }
+emit_wrffr_pb                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8) { append_elem(instructions, inst_wrffr_pb(rz)) }
 inst_setffr_none              :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SETFFR) }
-emit_setffr_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_setffr_none()) }
+emit_setffr_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_setffr_none()) }
 inst_cmpeq_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPEQ, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmpeq_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPEQ, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmpeq_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPEQ, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmpeq_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPEQ, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmpeq_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpeq_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmpeq_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpeq_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmpeq_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpeq_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmpeq_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpeq_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmpeq_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpeq_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmpeq_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpeq_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmpeq_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpeq_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmpeq_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpeq_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmpne_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPNE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmpne_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPNE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmpne_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPNE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmpne_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPNE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmpne_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpne_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmpne_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpne_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmpne_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpne_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmpne_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpne_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmpne_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpne_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmpne_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpne_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmpne_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpne_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmpne_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpne_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmpge_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPGE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmpge_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPGE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmpge_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPGE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmpge_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPGE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmpge_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpge_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmpge_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpge_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmpge_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpge_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmpge_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpge_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmpge_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpge_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmpge_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpge_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmpge_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpge_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmpge_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpge_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmpgt_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPGT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmpgt_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPGT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmpgt_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPGT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmpgt_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPGT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmpgt_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpgt_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmpgt_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpgt_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmpgt_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpgt_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmpgt_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpgt_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmpgt_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpgt_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmpgt_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpgt_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmpgt_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpgt_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmpgt_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpgt_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmple_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmple_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmple_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmple_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmple_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmple_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmple_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmple_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmple_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmple_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmple_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmple_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmple_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmple_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmple_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmple_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmple_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmple_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmple_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmple_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmplt_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmplt_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmplt_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmplt_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLT, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmplt_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmplt_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmplt_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmplt_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmplt_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmplt_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmplt_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmplt_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmplt_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmplt_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmplt_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmplt_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmplt_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmplt_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmplt_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmplt_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmphi_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPHI, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmphi_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPHI, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmphi_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPHI, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmphi_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPHI, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmphi_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmphi_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmphi_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmphi_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmphi_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmphi_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmphi_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmphi_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmphi_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmphi_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmphi_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmphi_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmphi_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmphi_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmphi_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmphi_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmphs_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPHS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmphs_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPHS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmphs_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPHS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmphs_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPHS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmphs_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmphs_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmphs_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmphs_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmphs_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmphs_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmphs_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmphs_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmphs_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmphs_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmphs_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmphs_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmphs_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmphs_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmphs_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmphs_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmplo_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLO, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmplo_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLO, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmplo_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLO, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmplo_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLO, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmplo_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmplo_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmplo_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmplo_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmplo_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmplo_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmplo_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmplo_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmplo_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmplo_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmplo_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmplo_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmplo_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmplo_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmplo_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmplo_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_cmpls_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_cmpls_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_cmpls_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_cmpls_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .CMPLS, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_cmpls_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpls_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_cmpls_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpls_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_cmpls_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpls_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_cmpls_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_cmpls_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_cmpls_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpls_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_cmpls_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpls_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_cmpls_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpls_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_cmpls_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_cmpls_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fcmne_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMNE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fcmne_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMNE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fcmne_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMNE, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fcmne_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmne_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fcmne_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmne_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fcmne_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmne_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fcmne_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmne_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fcmne_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmne_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fcmne_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmne_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_fcmuo_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMUO, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_fcmuo_ps_p_zs_zs         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMUO, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_fcmuo_pd_p_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FCMUO, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_fcmuo_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmuo_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_fcmuo_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmuo_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_fcmuo_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fcmuo_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_fcmuo_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmuo_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_fcmuo_ps_p_zs_zs         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmuo_ps_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_fcmuo_pd_p_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fcmuo_pd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_insr_zb_r                :: #force_inline proc "contextless" (rz: u8, src: Register) -> Instruction { return Instruction{mnemonic = .INSR, operand_count = 2, length = 4, ops = {op_z_b(rz), op_reg(src), {}, {}, {}}} }
 inst_insr_zh_r                :: #force_inline proc "contextless" (rz: u8, src: Register) -> Instruction { return Instruction{mnemonic = .INSR, operand_count = 2, length = 4, ops = {op_z_h(rz), op_reg(src), {}, {}, {}}} }
 inst_insr_zs_r                :: #force_inline proc "contextless" (rz: u8, src: Register) -> Instruction { return Instruction{mnemonic = .INSR, operand_count = 2, length = 4, ops = {op_z_s(rz), op_reg(src), {}, {}, {}}} }
 inst_insr_zd_r                :: #force_inline proc "contextless" (rz: u8, src: Register) -> Instruction { return Instruction{mnemonic = .INSR, operand_count = 2, length = 4, ops = {op_z_d(rz), op_reg(src), {}, {}, {}}} }
-emit_insr_zb_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append(instructions, inst_insr_zb_r(rz, src)) }
-emit_insr_zh_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append(instructions, inst_insr_zh_r(rz, src)) }
-emit_insr_zs_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append(instructions, inst_insr_zs_r(rz, src)) }
-emit_insr_zd_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append(instructions, inst_insr_zd_r(rz, src)) }
+emit_insr_zb_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append_elem(instructions, inst_insr_zb_r(rz, src)) }
+emit_insr_zh_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append_elem(instructions, inst_insr_zh_r(rz, src)) }
+emit_insr_zs_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append_elem(instructions, inst_insr_zs_r(rz, src)) }
+emit_insr_zd_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) { append_elem(instructions, inst_insr_zd_r(rz, src)) }
 inst_cpy_zb_p_r               :: #force_inline proc "contextless" (rz: u8, rz2: u8, src: Register) -> Instruction { return Instruction{mnemonic = .CPY, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(src), {}, {}}} }
 inst_cpy_zh_p_r               :: #force_inline proc "contextless" (rz: u8, rz2: u8, src: Register) -> Instruction { return Instruction{mnemonic = .CPY, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(src), {}, {}}} }
 inst_cpy_zs_p_r               :: #force_inline proc "contextless" (rz: u8, rz2: u8, src: Register) -> Instruction { return Instruction{mnemonic = .CPY, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(src), {}, {}}} }
 inst_cpy_zd_p_r               :: #force_inline proc "contextless" (rz: u8, rz2: u8, src: Register) -> Instruction { return Instruction{mnemonic = .CPY, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_reg(src), {}, {}}} }
-emit_cpy_zb_p_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) { append(instructions, inst_cpy_zb_p_r(rz, rz2, src)) }
-emit_cpy_zh_p_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) { append(instructions, inst_cpy_zh_p_r(rz, rz2, src)) }
-emit_cpy_zs_p_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) { append(instructions, inst_cpy_zs_p_r(rz, rz2, src)) }
-emit_cpy_zd_p_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) { append(instructions, inst_cpy_zd_p_r(rz, rz2, src)) }
+emit_cpy_zb_p_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) { append_elem(instructions, inst_cpy_zb_p_r(rz, rz2, src)) }
+emit_cpy_zh_p_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) { append_elem(instructions, inst_cpy_zh_p_r(rz, rz2, src)) }
+emit_cpy_zs_p_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) { append_elem(instructions, inst_cpy_zs_p_r(rz, rz2, src)) }
+emit_cpy_zd_p_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) { append_elem(instructions, inst_cpy_zd_p_r(rz, rz2, src)) }
 inst_compact_zs_p_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .COMPACT, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
 inst_compact_zd_p_zd          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .COMPACT, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), {}, {}}} }
-emit_compact_zs_p_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_compact_zs_p_zs(rz, rz2, rz3)) }
-emit_compact_zd_p_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_compact_zd_p_zd(rz, rz2, rz3)) }
+emit_compact_zs_p_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_compact_zs_p_zs(rz, rz2, rz3)) }
+emit_compact_zd_p_zd          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_compact_zd_p_zd(rz, rz2, rz3)) }
 inst_ld1b_zb_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_B, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1b_zs_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1b_zd_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1b_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1B, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1b_zpb_pnz_m           :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1B, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_ld1b_zqb_pnz_m           :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1B, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
-emit_ld1b_zb_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1b_zb_p_m(rz, rz2, mem)) }
-emit_ld1b_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1b_zs_p_m(rz, rz2, mem)) }
-emit_ld1b_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1b_zd_p_m(rz, rz2, mem)) }
-emit_ld1b_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_ld1b_i_p_m(imm, rz1, mem)) }
-emit_ld1b_zpb_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1b_zpb_pnz_m(rz, rz2, mem)) }
-emit_ld1b_zqb_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1b_zqb_pnz_m(rz, rz2, mem)) }
+emit_ld1b_zb_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1b_zb_p_m(rz, rz2, mem)) }
+emit_ld1b_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1b_zs_p_m(rz, rz2, mem)) }
+emit_ld1b_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1b_zd_p_m(rz, rz2, mem)) }
+emit_ld1b_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_ld1b_i_p_m(imm, rz1, mem)) }
+emit_ld1b_zpb_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1b_zpb_pnz_m(rz, rz2, mem)) }
+emit_ld1b_zqb_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1b_zqb_pnz_m(rz, rz2, mem)) }
 inst_ld1h_zh_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_H, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1h_zs_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1h_zd_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1h_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1H, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1h_zph_pnz_m           :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1H, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_ld1h_zqh_pnz_m           :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1H, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
-emit_ld1h_zh_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1h_zh_p_m(rz, rz2, mem)) }
-emit_ld1h_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1h_zs_p_m(rz, rz2, mem)) }
-emit_ld1h_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1h_zd_p_m(rz, rz2, mem)) }
-emit_ld1h_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_ld1h_i_p_m(imm, rz1, mem)) }
-emit_ld1h_zph_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1h_zph_pnz_m(rz, rz2, mem)) }
-emit_ld1h_zqh_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1h_zqh_pnz_m(rz, rz2, mem)) }
+emit_ld1h_zh_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1h_zh_p_m(rz, rz2, mem)) }
+emit_ld1h_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1h_zs_p_m(rz, rz2, mem)) }
+emit_ld1h_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1h_zd_p_m(rz, rz2, mem)) }
+emit_ld1h_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_ld1h_i_p_m(imm, rz1, mem)) }
+emit_ld1h_zph_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1h_zph_pnz_m(rz, rz2, mem)) }
+emit_ld1h_zqh_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1h_zqh_pnz_m(rz, rz2, mem)) }
 inst_ld1w_zs_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1W, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1w_zd_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1W, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1w_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1W, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1w_zps_pnz_m           :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1W, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_ld1w_zqs_pnz_m           :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1W, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
-emit_ld1w_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1w_zs_p_m(rz, rz2, mem)) }
-emit_ld1w_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1w_zd_p_m(rz, rz2, mem)) }
-emit_ld1w_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_ld1w_i_p_m(imm, rz1, mem)) }
-emit_ld1w_zps_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1w_zps_pnz_m(rz, rz2, mem)) }
-emit_ld1w_zqs_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1w_zqs_pnz_m(rz, rz2, mem)) }
+emit_ld1w_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1w_zs_p_m(rz, rz2, mem)) }
+emit_ld1w_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1w_zd_p_m(rz, rz2, mem)) }
+emit_ld1w_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_ld1w_i_p_m(imm, rz1, mem)) }
+emit_ld1w_zps_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1w_zps_pnz_m(rz, rz2, mem)) }
+emit_ld1w_zqs_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1w_zqs_pnz_m(rz, rz2, mem)) }
 inst_ld1d_zd_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1D, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1d_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1D, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1d_zpd_pnz_m           :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1D, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_ld1d_zqd_pnz_m           :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1D, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
-emit_ld1d_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1d_zd_p_m(rz, rz2, mem)) }
-emit_ld1d_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_ld1d_i_p_m(imm, rz1, mem)) }
-emit_ld1d_zpd_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1d_zpd_pnz_m(rz, rz2, mem)) }
-emit_ld1d_zqd_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1d_zqd_pnz_m(rz, rz2, mem)) }
+emit_ld1d_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1d_zd_p_m(rz, rz2, mem)) }
+emit_ld1d_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_ld1d_i_p_m(imm, rz1, mem)) }
+emit_ld1d_zpd_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1d_zpd_pnz_m(rz, rz2, mem)) }
+emit_ld1d_zqd_pnz_m           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1d_zqd_pnz_m(rz, rz2, mem)) }
 inst_ld1sb_zh_p_m             :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1SB, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_H, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1sb_zs_p_m             :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1SB, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1sb_zd_p_m             :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1SB, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ld1sb_zh_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1sb_zh_p_m(rz, rz2, mem)) }
-emit_ld1sb_zs_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1sb_zs_p_m(rz, rz2, mem)) }
-emit_ld1sb_zd_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1sb_zd_p_m(rz, rz2, mem)) }
+emit_ld1sb_zh_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1sb_zh_p_m(rz, rz2, mem)) }
+emit_ld1sb_zs_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1sb_zs_p_m(rz, rz2, mem)) }
+emit_ld1sb_zd_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1sb_zd_p_m(rz, rz2, mem)) }
 inst_ld1sh_zd_p_m             :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1SH, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_ld1sh_zs_p_m             :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1SH, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ld1sh_zd_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1sh_zd_p_m(rz, rz2, mem)) }
-emit_ld1sh_zs_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1sh_zs_p_m(rz, rz2, mem)) }
+emit_ld1sh_zd_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1sh_zd_p_m(rz, rz2, mem)) }
+emit_ld1sh_zs_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1sh_zs_p_m(rz, rz2, mem)) }
 inst_ld1sw_zd_p_m             :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1SW, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ld1sw_zd_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ld1sw_zd_p_m(rz, rz2, mem)) }
+emit_ld1sw_zd_p_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ld1sw_zd_p_m(rz, rz2, mem)) }
 inst_st1b_zb_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_B, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1b_zs_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1b_zd_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1b_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1B, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1b_zpb_pn_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1B, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_st1b_zqb_pn_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1B, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
-emit_st1b_zb_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1b_zb_p_m(rz, rz2, mem)) }
-emit_st1b_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1b_zs_p_m(rz, rz2, mem)) }
-emit_st1b_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1b_zd_p_m(rz, rz2, mem)) }
-emit_st1b_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_st1b_i_p_m(imm, rz1, mem)) }
-emit_st1b_zpb_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1b_zpb_pn_m(rz, rz2, mem)) }
-emit_st1b_zqb_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1b_zqb_pn_m(rz, rz2, mem)) }
+emit_st1b_zb_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1b_zb_p_m(rz, rz2, mem)) }
+emit_st1b_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1b_zs_p_m(rz, rz2, mem)) }
+emit_st1b_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1b_zd_p_m(rz, rz2, mem)) }
+emit_st1b_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_st1b_i_p_m(imm, rz1, mem)) }
+emit_st1b_zpb_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1b_zpb_pn_m(rz, rz2, mem)) }
+emit_st1b_zqb_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1b_zqb_pn_m(rz, rz2, mem)) }
 inst_st1h_zh_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_H, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1h_zd_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1h_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1H, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1h_zph_pn_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1H, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_st1h_zqh_pn_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1H, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_st1h_zs_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_st1h_zh_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1h_zh_p_m(rz, rz2, mem)) }
-emit_st1h_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1h_zd_p_m(rz, rz2, mem)) }
-emit_st1h_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_st1h_i_p_m(imm, rz1, mem)) }
-emit_st1h_zph_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1h_zph_pn_m(rz, rz2, mem)) }
-emit_st1h_zqh_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1h_zqh_pn_m(rz, rz2, mem)) }
-emit_st1h_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1h_zs_p_m(rz, rz2, mem)) }
+emit_st1h_zh_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1h_zh_p_m(rz, rz2, mem)) }
+emit_st1h_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1h_zd_p_m(rz, rz2, mem)) }
+emit_st1h_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_st1h_i_p_m(imm, rz1, mem)) }
+emit_st1h_zph_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1h_zph_pn_m(rz, rz2, mem)) }
+emit_st1h_zqh_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1h_zqh_pn_m(rz, rz2, mem)) }
+emit_st1h_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1h_zs_p_m(rz, rz2, mem)) }
 inst_st1w_zs_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1W, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1w_zd_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1W, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1w_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1W, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1w_zps_pn_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1W, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_st1w_zqs_pn_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1W, operand_count = 3, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
-emit_st1w_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1w_zs_p_m(rz, rz2, mem)) }
-emit_st1w_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1w_zd_p_m(rz, rz2, mem)) }
-emit_st1w_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_st1w_i_p_m(imm, rz1, mem)) }
-emit_st1w_zps_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1w_zps_pn_m(rz, rz2, mem)) }
-emit_st1w_zqs_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1w_zqs_pn_m(rz, rz2, mem)) }
+emit_st1w_zs_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1w_zs_p_m(rz, rz2, mem)) }
+emit_st1w_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1w_zd_p_m(rz, rz2, mem)) }
+emit_st1w_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_st1w_i_p_m(imm, rz1, mem)) }
+emit_st1w_zps_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1w_zps_pn_m(rz, rz2, mem)) }
+emit_st1w_zqs_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1w_zqs_pn_m(rz, rz2, mem)) }
 inst_st1d_zd_p_m              :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1D, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1d_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1D, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
 inst_st1d_zpd_pn_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1D, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
 inst_st1d_zqd_pn_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1D, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_PN | (8 + (u16(rz2) & 0x7)))), op_mem(mem), {}, {}}} }
-emit_st1d_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1d_zd_p_m(rz, rz2, mem)) }
-emit_st1d_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_st1d_i_p_m(imm, rz1, mem)) }
-emit_st1d_zpd_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1d_zpd_pn_m(rz, rz2, mem)) }
-emit_st1d_zqd_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_st1d_zqd_pn_m(rz, rz2, mem)) }
+emit_st1d_zd_p_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1d_zd_p_m(rz, rz2, mem)) }
+emit_st1d_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_st1d_i_p_m(imm, rz1, mem)) }
+emit_st1d_zpd_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1d_zpd_pn_m(rz, rz2, mem)) }
+emit_st1d_zqd_pn_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_st1d_zqd_pn_m(rz, rz2, mem)) }
 inst_ldff1b_zb_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDFF1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_B, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ldff1b_zb_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ldff1b_zb_p_m(rz, rz2, mem)) }
+emit_ldff1b_zb_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ldff1b_zb_p_m(rz, rz2, mem)) }
 inst_ldff1h_zh_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDFF1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_H, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ldff1h_zh_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ldff1h_zh_p_m(rz, rz2, mem)) }
+emit_ldff1h_zh_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ldff1h_zh_p_m(rz, rz2, mem)) }
 inst_ldff1w_zs_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDFF1W, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ldff1w_zs_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ldff1w_zs_p_m(rz, rz2, mem)) }
+emit_ldff1w_zs_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ldff1w_zs_p_m(rz, rz2, mem)) }
 inst_ldff1d_zd_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDFF1D, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ldff1d_zd_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ldff1d_zd_p_m(rz, rz2, mem)) }
+emit_ldff1d_zd_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ldff1d_zd_p_m(rz, rz2, mem)) }
 inst_whilege_pb_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEGE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilege_ph_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEGE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilege_ps_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEGE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilege_pd_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEGE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
-emit_whilege_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilege_pb_r_r(rz, src, src2)) }
-emit_whilege_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilege_ph_r_r(rz, src, src2)) }
-emit_whilege_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilege_ps_r_r(rz, src, src2)) }
-emit_whilege_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilege_pd_r_r(rz, src, src2)) }
+emit_whilege_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilege_pb_r_r(rz, src, src2)) }
+emit_whilege_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilege_ph_r_r(rz, src, src2)) }
+emit_whilege_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilege_ps_r_r(rz, src, src2)) }
+emit_whilege_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilege_pd_r_r(rz, src, src2)) }
 inst_whilegt_pb_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEGT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilegt_ph_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEGT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilegt_ps_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEGT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilegt_pd_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEGT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
-emit_whilegt_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilegt_pb_r_r(rz, src, src2)) }
-emit_whilegt_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilegt_ph_r_r(rz, src, src2)) }
-emit_whilegt_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilegt_ps_r_r(rz, src, src2)) }
-emit_whilegt_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilegt_pd_r_r(rz, src, src2)) }
+emit_whilegt_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilegt_pb_r_r(rz, src, src2)) }
+emit_whilegt_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilegt_ph_r_r(rz, src, src2)) }
+emit_whilegt_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilegt_ps_r_r(rz, src, src2)) }
+emit_whilegt_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilegt_pd_r_r(rz, src, src2)) }
 inst_whilele_pb_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilele_ph_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilele_ps_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilele_pd_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELE, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
-emit_whilele_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilele_pb_r_r(rz, src, src2)) }
-emit_whilele_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilele_ph_r_r(rz, src, src2)) }
-emit_whilele_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilele_ps_r_r(rz, src, src2)) }
-emit_whilele_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilele_pd_r_r(rz, src, src2)) }
+emit_whilele_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilele_pb_r_r(rz, src, src2)) }
+emit_whilele_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilele_ph_r_r(rz, src, src2)) }
+emit_whilele_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilele_ps_r_r(rz, src, src2)) }
+emit_whilele_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilele_pd_r_r(rz, src, src2)) }
 inst_whilelt_pb_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilelt_ph_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilelt_ps_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilelt_pd_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELT, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
-emit_whilelt_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilelt_pb_r_r(rz, src, src2)) }
-emit_whilelt_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilelt_ph_r_r(rz, src, src2)) }
-emit_whilelt_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilelt_ps_r_r(rz, src, src2)) }
-emit_whilelt_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilelt_pd_r_r(rz, src, src2)) }
+emit_whilelt_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilelt_pb_r_r(rz, src, src2)) }
+emit_whilelt_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilelt_ph_r_r(rz, src, src2)) }
+emit_whilelt_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilelt_ps_r_r(rz, src, src2)) }
+emit_whilelt_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilelt_pd_r_r(rz, src, src2)) }
 inst_whilehi_pb_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEHI, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilehi_ph_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEHI, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilehi_ps_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEHI, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilehi_pd_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEHI, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
-emit_whilehi_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilehi_pb_r_r(rz, src, src2)) }
-emit_whilehi_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilehi_ph_r_r(rz, src, src2)) }
-emit_whilehi_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilehi_ps_r_r(rz, src, src2)) }
-emit_whilehi_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilehi_pd_r_r(rz, src, src2)) }
+emit_whilehi_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilehi_pb_r_r(rz, src, src2)) }
+emit_whilehi_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilehi_ph_r_r(rz, src, src2)) }
+emit_whilehi_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilehi_ps_r_r(rz, src, src2)) }
+emit_whilehi_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilehi_pd_r_r(rz, src, src2)) }
 inst_whilehs_pb_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEHS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilehs_ph_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEHS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilehs_ps_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEHS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilehs_pd_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILEHS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
-emit_whilehs_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilehs_pb_r_r(rz, src, src2)) }
-emit_whilehs_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilehs_ph_r_r(rz, src, src2)) }
-emit_whilehs_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilehs_ps_r_r(rz, src, src2)) }
-emit_whilehs_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilehs_pd_r_r(rz, src, src2)) }
+emit_whilehs_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilehs_pb_r_r(rz, src, src2)) }
+emit_whilehs_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilehs_ph_r_r(rz, src, src2)) }
+emit_whilehs_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilehs_ps_r_r(rz, src, src2)) }
+emit_whilehs_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilehs_pd_r_r(rz, src, src2)) }
 inst_whilelo_pb_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELO, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilelo_ph_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELO, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilelo_ps_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELO, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilelo_pd_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELO, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
-emit_whilelo_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilelo_pb_r_r(rz, src, src2)) }
-emit_whilelo_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilelo_ph_r_r(rz, src, src2)) }
-emit_whilelo_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilelo_ps_r_r(rz, src, src2)) }
-emit_whilelo_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilelo_pd_r_r(rz, src, src2)) }
+emit_whilelo_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilelo_pb_r_r(rz, src, src2)) }
+emit_whilelo_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilelo_ph_r_r(rz, src, src2)) }
+emit_whilelo_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilelo_ps_r_r(rz, src, src2)) }
+emit_whilelo_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilelo_pd_r_r(rz, src, src2)) }
 inst_whilels_pb_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilels_ph_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilels_ps_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
 inst_whilels_pd_r_r           :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WHILELS, operand_count = 3, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(src), op_reg(src2), {}, {}}} }
-emit_whilels_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilels_pb_r_r(rz, src, src2)) }
-emit_whilels_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilels_ph_r_r(rz, src, src2)) }
-emit_whilels_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilels_ps_r_r(rz, src, src2)) }
-emit_whilels_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_whilels_pd_r_r(rz, src, src2)) }
+emit_whilels_pb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilels_pb_r_r(rz, src, src2)) }
+emit_whilels_ph_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilels_ph_r_r(rz, src, src2)) }
+emit_whilels_ps_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilels_ps_r_r(rz, src, src2)) }
+emit_whilels_pd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_whilels_pd_r_r(rz, src, src2)) }
 inst_sqrdmlah_zb_zb_zb        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQRDMLAH, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
 inst_sqrdmlah_zh_zh_zh        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQRDMLAH, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_sqrdmlah_zs_zs_zs        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQRDMLAH, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_sqrdmlah_zd_zd_zd        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQRDMLAH, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_sqrdmlah_zb_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqrdmlah_zb_zb_zb(rz, rz2, rz3)) }
-emit_sqrdmlah_zh_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqrdmlah_zh_zh_zh(rz, rz2, rz3)) }
-emit_sqrdmlah_zs_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqrdmlah_zs_zs_zs(rz, rz2, rz3)) }
-emit_sqrdmlah_zd_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqrdmlah_zd_zd_zd(rz, rz2, rz3)) }
+emit_sqrdmlah_zb_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqrdmlah_zb_zb_zb(rz, rz2, rz3)) }
+emit_sqrdmlah_zh_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqrdmlah_zh_zh_zh(rz, rz2, rz3)) }
+emit_sqrdmlah_zs_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqrdmlah_zs_zs_zs(rz, rz2, rz3)) }
+emit_sqrdmlah_zd_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqrdmlah_zd_zd_zd(rz, rz2, rz3)) }
 inst_sqrdmlsh_zb_zb_zb        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQRDMLSH, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
 inst_sqrdmlsh_zh_zh_zh        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQRDMLSH, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
 inst_sqrdmlsh_zs_zs_zs        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQRDMLSH, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_sqrdmlsh_zd_zd_zd        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SQRDMLSH, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_sqrdmlsh_zb_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqrdmlsh_zb_zb_zb(rz, rz2, rz3)) }
-emit_sqrdmlsh_zh_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqrdmlsh_zh_zh_zh(rz, rz2, rz3)) }
-emit_sqrdmlsh_zs_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqrdmlsh_zs_zs_zs(rz, rz2, rz3)) }
-emit_sqrdmlsh_zd_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sqrdmlsh_zd_zd_zd(rz, rz2, rz3)) }
+emit_sqrdmlsh_zb_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqrdmlsh_zb_zb_zb(rz, rz2, rz3)) }
+emit_sqrdmlsh_zh_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqrdmlsh_zh_zh_zh(rz, rz2, rz3)) }
+emit_sqrdmlsh_zs_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqrdmlsh_zs_zs_zs(rz, rz2, rz3)) }
+emit_sqrdmlsh_zd_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sqrdmlsh_zd_zd_zd(rz, rz2, rz3)) }
 inst_adclb_zs_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ADCLB, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_adclb_zd_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ADCLB, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_adclb_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_adclb_zs_zs_zs(rz, rz2, rz3)) }
-emit_adclb_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_adclb_zd_zd_zd(rz, rz2, rz3)) }
+emit_adclb_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_adclb_zs_zs_zs(rz, rz2, rz3)) }
+emit_adclb_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_adclb_zd_zd_zd(rz, rz2, rz3)) }
 inst_adclt_zs_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ADCLT, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_adclt_zd_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ADCLT, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_adclt_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_adclt_zs_zs_zs(rz, rz2, rz3)) }
-emit_adclt_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_adclt_zd_zd_zd(rz, rz2, rz3)) }
+emit_adclt_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_adclt_zs_zs_zs(rz, rz2, rz3)) }
+emit_adclt_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_adclt_zd_zd_zd(rz, rz2, rz3)) }
 inst_sbclb_zs_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SBCLB, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_sbclb_zd_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SBCLB, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_sbclb_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sbclb_zs_zs_zs(rz, rz2, rz3)) }
-emit_sbclb_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sbclb_zd_zd_zd(rz, rz2, rz3)) }
+emit_sbclb_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sbclb_zs_zs_zs(rz, rz2, rz3)) }
+emit_sbclb_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sbclb_zd_zd_zd(rz, rz2, rz3)) }
 inst_sbclt_zs_zs_zs           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SBCLT, operand_count = 3, length = 4, ops = {op_z_s(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
 inst_sbclt_zd_zd_zd           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .SBCLT, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), {}, {}}} }
-emit_sbclt_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sbclt_zs_zs_zs(rz, rz2, rz3)) }
-emit_sbclt_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_sbclt_zd_zd_zd(rz, rz2, rz3)) }
+emit_sbclt_zs_zs_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sbclt_zs_zs_zs(rz, rz2, rz3)) }
+emit_sbclt_zd_zd_zd           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_sbclt_zd_zd_zd(rz, rz2, rz3)) }
 inst_match_pb_p_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .MATCH, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_match_ph_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .MATCH, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
-emit_match_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_match_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_match_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_match_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_match_pb_p_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_match_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_match_ph_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_match_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
 inst_nmatch_pb_p_zb_zb        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .NMATCH, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
 inst_nmatch_ph_p_zh_zh        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .NMATCH, operand_count = 4, length = 4, ops = {op_reg(Register(REG_P | (u16(rz) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
-emit_nmatch_pb_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_nmatch_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
-emit_nmatch_ph_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_nmatch_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_nmatch_pb_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_nmatch_pb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_nmatch_ph_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_nmatch_ph_p_zh_zh(rz, rz2, rz3, rz4)) }
 inst_histcnt_zs_p_zs_zs       :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .HISTCNT, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4), {}}} }
 inst_histcnt_zd_p_zd_zd       :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .HISTCNT, operand_count = 4, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_histcnt_zs_p_zs_zs       :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_histcnt_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
-emit_histcnt_zd_p_zd_zd       :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_histcnt_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
+emit_histcnt_zs_p_zs_zs       :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_histcnt_zs_p_zs_zs(rz, rz2, rz3, rz4)) }
+emit_histcnt_zd_p_zd_zd       :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_histcnt_zd_p_zd_zd(rz, rz2, rz3, rz4)) }
 inst_histseg_zb_zb_zb         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .HISTSEG, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
-emit_histseg_zb_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_histseg_zb_zb_zb(rz, rz2, rz3)) }
+emit_histseg_zb_zb_zb         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_histseg_zb_zb_zb(rz, rz2, rz3)) }
 inst_smstart_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SMSTART) }
-emit_smstart_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_smstart_none()) }
+emit_smstart_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_smstart_none()) }
 inst_smstop_none              :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SMSTOP) }
-emit_smstop_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_smstop_none()) }
+emit_smstop_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_smstop_none()) }
 inst_rdsvl_r_i                :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return inst_r_i(.RDSVL, dst, imm) }
-emit_rdsvl_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_rdsvl_r_i(dst, imm)) }
+emit_rdsvl_r_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_rdsvl_r_i(dst, imm)) }
 inst_addha_i_p_p_zs           :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ADDHA, operand_count = 4, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}}} }
-emit_addha_i_p_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8) { append(instructions, inst_addha_i_p_p_zs(imm, rz1, rz2, rz3)) }
+emit_addha_i_p_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_addha_i_p_p_zs(imm, rz1, rz2, rz3)) }
 inst_addva_i_p_p_zs           :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ADDVA, operand_count = 4, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}}} }
-emit_addva_i_p_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8) { append(instructions, inst_addva_i_p_p_zs(imm, rz1, rz2, rz3)) }
+emit_addva_i_p_p_zs           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_addva_i_p_p_zs(imm, rz1, rz2, rz3)) }
 inst_zero_i                   :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .ZERO, operand_count = 1, length = 4, ops = {op_imm(imm, 4), {}, {}, {}, {}}} }
-emit_zero_i                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_zero_i(imm)) }
+emit_zero_i                   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_zero_i(imm)) }
 inst_fmopa_i_p_p_zs_zs        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMOPA, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4)}} }
-emit_fmopa_i_p_p_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmopa_i_p_p_zs_zs(imm, rz1, rz2, rz3, rz4)) }
+emit_fmopa_i_p_p_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmopa_i_p_p_zs_zs(imm, rz1, rz2, rz3, rz4)) }
 inst_fmops_i_p_p_zs_zs        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .FMOPS, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), op_z_s(rz4)}} }
-emit_fmops_i_p_p_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_fmops_i_p_p_zs_zs(imm, rz1, rz2, rz3, rz4)) }
+emit_fmops_i_p_p_zs_zs        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_fmops_i_p_p_zs_zs(imm, rz1, rz2, rz3, rz4)) }
 inst_bfmopa_i_p_p_zh_zh       :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFMOPA, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4)}} }
-emit_bfmopa_i_p_p_zh_zh       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfmopa_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
+emit_bfmopa_i_p_p_zh_zh       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfmopa_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
 inst_bfmops_i_p_p_zh_zh       :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFMOPS, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4)}} }
-emit_bfmops_i_p_p_zh_zh       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfmops_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
+emit_bfmops_i_p_p_zh_zh       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfmops_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
 inst_smopa_i_p_p_zb_zb        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMOPA, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4)}} }
 inst_smopa_i_p_p_zh_zh        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMOPA, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4)}} }
-emit_smopa_i_p_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smopa_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
-emit_smopa_i_p_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smopa_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
+emit_smopa_i_p_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smopa_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
+emit_smopa_i_p_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smopa_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
 inst_smops_i_p_p_zb_zb        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMOPS, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4)}} }
 inst_smops_i_p_p_zh_zh        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SMOPS, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4)}} }
-emit_smops_i_p_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smops_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
-emit_smops_i_p_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_smops_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
+emit_smops_i_p_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smops_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
+emit_smops_i_p_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_smops_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
 inst_umopa_i_p_p_zb_zb        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMOPA, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4)}} }
 inst_umopa_i_p_p_zh_zh        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMOPA, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4)}} }
-emit_umopa_i_p_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umopa_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
-emit_umopa_i_p_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umopa_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
+emit_umopa_i_p_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umopa_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
+emit_umopa_i_p_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umopa_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
 inst_umops_i_p_p_zb_zb        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMOPS, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4)}} }
 inst_umops_i_p_p_zh_zh        :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .UMOPS, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4)}} }
-emit_umops_i_p_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umops_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
-emit_umops_i_p_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_umops_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
+emit_umops_i_p_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umops_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
+emit_umops_i_p_p_zh_zh        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_umops_i_p_p_zh_zh(imm, rz1, rz2, rz3, rz4)) }
 inst_usmopa_i_p_p_zb_zb       :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .USMOPA, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4)}} }
-emit_usmopa_i_p_p_zb_zb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_usmopa_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
+emit_usmopa_i_p_p_zb_zb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_usmopa_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
 inst_sumopa_i_p_p_zb_zb       :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SUMOPA, operand_count = 5, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4)}} }
-emit_sumopa_i_p_p_zb_zb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_sumopa_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
+emit_sumopa_i_p_p_zb_zb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_sumopa_i_p_p_zb_zb(imm, rz1, rz2, rz3, rz4)) }
 inst_cntb_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .CNTB, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_cntb_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_cntb_r_i_i(dst, imm, imm2)) }
+emit_cntb_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_cntb_r_i_i(dst, imm, imm2)) }
 inst_cnth_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .CNTH, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_cnth_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_cnth_r_i_i(dst, imm, imm2)) }
+emit_cnth_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_cnth_r_i_i(dst, imm, imm2)) }
 inst_cntw_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .CNTW, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_cntw_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_cntw_r_i_i(dst, imm, imm2)) }
+emit_cntw_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_cntw_r_i_i(dst, imm, imm2)) }
 inst_cntd_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .CNTD, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_cntd_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_cntd_r_i_i(dst, imm, imm2)) }
+emit_cntd_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_cntd_r_i_i(dst, imm, imm2)) }
 inst_incb_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INCB, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_incb_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_incb_r_i_i(dst, imm, imm2)) }
+emit_incb_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_incb_r_i_i(dst, imm, imm2)) }
 inst_inch_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INCH, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_inch_zh_i_i              :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INCH, operand_count = 3, length = 4, ops = {op_z_h(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_inch_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_inch_r_i_i(dst, imm, imm2)) }
-emit_inch_zh_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_inch_zh_i_i(rz, imm, imm2)) }
+emit_inch_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_inch_r_i_i(dst, imm, imm2)) }
+emit_inch_zh_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_inch_zh_i_i(rz, imm, imm2)) }
 inst_incw_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INCW, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_incw_zs_i_i              :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INCW, operand_count = 3, length = 4, ops = {op_z_s(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_incw_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_incw_r_i_i(dst, imm, imm2)) }
-emit_incw_zs_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_incw_zs_i_i(rz, imm, imm2)) }
+emit_incw_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_incw_r_i_i(dst, imm, imm2)) }
+emit_incw_zs_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_incw_zs_i_i(rz, imm, imm2)) }
 inst_incd_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INCD, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_incd_zd_i_i              :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INCD, operand_count = 3, length = 4, ops = {op_z_d(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_incd_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_incd_r_i_i(dst, imm, imm2)) }
-emit_incd_zd_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_incd_zd_i_i(rz, imm, imm2)) }
+emit_incd_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_incd_r_i_i(dst, imm, imm2)) }
+emit_incd_zd_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_incd_zd_i_i(rz, imm, imm2)) }
 inst_decb_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DECB, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_decb_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_decb_r_i_i(dst, imm, imm2)) }
+emit_decb_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_decb_r_i_i(dst, imm, imm2)) }
 inst_dech_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DECH, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_dech_zh_i_i              :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DECH, operand_count = 3, length = 4, ops = {op_z_h(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_dech_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_dech_r_i_i(dst, imm, imm2)) }
-emit_dech_zh_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_dech_zh_i_i(rz, imm, imm2)) }
+emit_dech_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_dech_r_i_i(dst, imm, imm2)) }
+emit_dech_zh_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_dech_zh_i_i(rz, imm, imm2)) }
 inst_decw_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DECW, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_decw_zs_i_i              :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DECW, operand_count = 3, length = 4, ops = {op_z_s(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_decw_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_decw_r_i_i(dst, imm, imm2)) }
-emit_decw_zs_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_decw_zs_i_i(rz, imm, imm2)) }
+emit_decw_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_decw_r_i_i(dst, imm, imm2)) }
+emit_decw_zs_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_decw_zs_i_i(rz, imm, imm2)) }
 inst_decd_r_i_i               :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DECD, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_decd_zd_i_i              :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DECD, operand_count = 3, length = 4, ops = {op_z_d(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_decd_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_decd_r_i_i(dst, imm, imm2)) }
-emit_decd_zd_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_decd_zd_i_i(rz, imm, imm2)) }
+emit_decd_r_i_i               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_decd_r_i_i(dst, imm, imm2)) }
+emit_decd_zd_i_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_decd_zd_i_i(rz, imm, imm2)) }
 inst_sqincb_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCB, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_sqincb_r_r_i_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCB, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 4), op_imm(imm2, 4), {}}} }
-emit_sqincb_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_sqincb_r_i_i(dst, imm, imm2)) }
-emit_sqincb_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sqincb_r_r_i_i(dst, src, imm, imm2)) }
+emit_sqincb_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqincb_r_i_i(dst, imm, imm2)) }
+emit_sqincb_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqincb_r_r_i_i(dst, src, imm, imm2)) }
 inst_sqinch_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCH, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_sqinch_r_r_i_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCH, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 4), op_imm(imm2, 4), {}}} }
 inst_sqinch_zh_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCH, operand_count = 3, length = 4, ops = {op_z_h(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_sqinch_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_sqinch_r_i_i(dst, imm, imm2)) }
-emit_sqinch_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sqinch_r_r_i_i(dst, src, imm, imm2)) }
-emit_sqinch_zh_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_sqinch_zh_i_i(rz, imm, imm2)) }
+emit_sqinch_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqinch_r_i_i(dst, imm, imm2)) }
+emit_sqinch_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqinch_r_r_i_i(dst, src, imm, imm2)) }
+emit_sqinch_zh_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_sqinch_zh_i_i(rz, imm, imm2)) }
 inst_sqincw_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCW, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_sqincw_r_r_i_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCW, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 4), op_imm(imm2, 4), {}}} }
 inst_sqincw_zs_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCW, operand_count = 3, length = 4, ops = {op_z_s(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_sqincw_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_sqincw_r_i_i(dst, imm, imm2)) }
-emit_sqincw_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sqincw_r_r_i_i(dst, src, imm, imm2)) }
-emit_sqincw_zs_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_sqincw_zs_i_i(rz, imm, imm2)) }
+emit_sqincw_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqincw_r_i_i(dst, imm, imm2)) }
+emit_sqincw_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqincw_r_r_i_i(dst, src, imm, imm2)) }
+emit_sqincw_zs_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_sqincw_zs_i_i(rz, imm, imm2)) }
 inst_sqincd_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCD, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_sqincd_r_r_i_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 4), op_imm(imm2, 4), {}}} }
 inst_sqincd_zd_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQINCD, operand_count = 3, length = 4, ops = {op_z_d(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_sqincd_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_sqincd_r_i_i(dst, imm, imm2)) }
-emit_sqincd_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sqincd_r_r_i_i(dst, src, imm, imm2)) }
-emit_sqincd_zd_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_sqincd_zd_i_i(rz, imm, imm2)) }
+emit_sqincd_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqincd_r_i_i(dst, imm, imm2)) }
+emit_sqincd_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqincd_r_r_i_i(dst, src, imm, imm2)) }
+emit_sqincd_zd_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_sqincd_zd_i_i(rz, imm, imm2)) }
 inst_sqdecb_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECB, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_sqdecb_r_r_i_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECB, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 4), op_imm(imm2, 4), {}}} }
-emit_sqdecb_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_sqdecb_r_i_i(dst, imm, imm2)) }
-emit_sqdecb_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sqdecb_r_r_i_i(dst, src, imm, imm2)) }
+emit_sqdecb_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdecb_r_i_i(dst, imm, imm2)) }
+emit_sqdecb_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdecb_r_r_i_i(dst, src, imm, imm2)) }
 inst_sqdech_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECH, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_sqdech_r_r_i_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECH, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 4), op_imm(imm2, 4), {}}} }
 inst_sqdech_zh_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECH, operand_count = 3, length = 4, ops = {op_z_h(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_sqdech_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_sqdech_r_i_i(dst, imm, imm2)) }
-emit_sqdech_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sqdech_r_r_i_i(dst, src, imm, imm2)) }
-emit_sqdech_zh_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_sqdech_zh_i_i(rz, imm, imm2)) }
+emit_sqdech_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdech_r_i_i(dst, imm, imm2)) }
+emit_sqdech_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdech_r_r_i_i(dst, src, imm, imm2)) }
+emit_sqdech_zh_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdech_zh_i_i(rz, imm, imm2)) }
 inst_sqdecw_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECW, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_sqdecw_r_r_i_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECW, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 4), op_imm(imm2, 4), {}}} }
 inst_sqdecw_zs_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECW, operand_count = 3, length = 4, ops = {op_z_s(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_sqdecw_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_sqdecw_r_i_i(dst, imm, imm2)) }
-emit_sqdecw_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sqdecw_r_r_i_i(dst, src, imm, imm2)) }
-emit_sqdecw_zs_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_sqdecw_zs_i_i(rz, imm, imm2)) }
+emit_sqdecw_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdecw_r_i_i(dst, imm, imm2)) }
+emit_sqdecw_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdecw_r_r_i_i(dst, src, imm, imm2)) }
+emit_sqdecw_zs_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdecw_zs_i_i(rz, imm, imm2)) }
 inst_sqdecd_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECD, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_sqdecd_r_r_i_i           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 4), op_imm(imm2, 4), {}}} }
 inst_sqdecd_zd_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SQDECD, operand_count = 3, length = 4, ops = {op_z_d(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_sqdecd_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_sqdecd_r_i_i(dst, imm, imm2)) }
-emit_sqdecd_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_sqdecd_r_r_i_i(dst, src, imm, imm2)) }
-emit_sqdecd_zd_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_sqdecd_zd_i_i(rz, imm, imm2)) }
+emit_sqdecd_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdecd_r_i_i(dst, imm, imm2)) }
+emit_sqdecd_r_r_i_i           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdecd_r_r_i_i(dst, src, imm, imm2)) }
+emit_sqdecd_zd_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_sqdecd_zd_i_i(rz, imm, imm2)) }
 inst_uqincb_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQINCB, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_uqincb_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_uqincb_r_i_i(dst, imm, imm2)) }
+emit_uqincb_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_uqincb_r_i_i(dst, imm, imm2)) }
 inst_uqinch_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQINCH, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_uqinch_zh_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQINCH, operand_count = 3, length = 4, ops = {op_z_h(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_uqinch_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_uqinch_r_i_i(dst, imm, imm2)) }
-emit_uqinch_zh_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_uqinch_zh_i_i(rz, imm, imm2)) }
+emit_uqinch_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_uqinch_r_i_i(dst, imm, imm2)) }
+emit_uqinch_zh_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_uqinch_zh_i_i(rz, imm, imm2)) }
 inst_uqincw_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQINCW, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_uqincw_zs_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQINCW, operand_count = 3, length = 4, ops = {op_z_s(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_uqincw_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_uqincw_r_i_i(dst, imm, imm2)) }
-emit_uqincw_zs_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_uqincw_zs_i_i(rz, imm, imm2)) }
+emit_uqincw_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_uqincw_r_i_i(dst, imm, imm2)) }
+emit_uqincw_zs_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_uqincw_zs_i_i(rz, imm, imm2)) }
 inst_uqincd_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQINCD, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_uqincd_zd_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQINCD, operand_count = 3, length = 4, ops = {op_z_d(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_uqincd_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_uqincd_r_i_i(dst, imm, imm2)) }
-emit_uqincd_zd_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_uqincd_zd_i_i(rz, imm, imm2)) }
+emit_uqincd_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_uqincd_r_i_i(dst, imm, imm2)) }
+emit_uqincd_zd_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_uqincd_zd_i_i(rz, imm, imm2)) }
 inst_uqdecb_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQDECB, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_uqdecb_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_uqdecb_r_i_i(dst, imm, imm2)) }
+emit_uqdecb_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_uqdecb_r_i_i(dst, imm, imm2)) }
 inst_uqdech_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQDECH, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_uqdech_zh_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQDECH, operand_count = 3, length = 4, ops = {op_z_h(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_uqdech_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_uqdech_r_i_i(dst, imm, imm2)) }
-emit_uqdech_zh_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_uqdech_zh_i_i(rz, imm, imm2)) }
+emit_uqdech_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_uqdech_r_i_i(dst, imm, imm2)) }
+emit_uqdech_zh_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_uqdech_zh_i_i(rz, imm, imm2)) }
 inst_uqdecw_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQDECW, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_uqdecw_zs_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQDECW, operand_count = 3, length = 4, ops = {op_z_s(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_uqdecw_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_uqdecw_r_i_i(dst, imm, imm2)) }
-emit_uqdecw_zs_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_uqdecw_zs_i_i(rz, imm, imm2)) }
+emit_uqdecw_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_uqdecw_r_i_i(dst, imm, imm2)) }
+emit_uqdecw_zs_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_uqdecw_zs_i_i(rz, imm, imm2)) }
 inst_uqdecd_r_i_i             :: #force_inline proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQDECD, operand_count = 3, length = 4, ops = {op_reg(dst), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
 inst_uqdecd_zd_i_i            :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .UQDECD, operand_count = 3, length = 4, ops = {op_z_d(rz), op_imm(imm, 4), op_imm(imm2, 4), {}, {}}} }
-emit_uqdecd_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append(instructions, inst_uqdecd_r_i_i(dst, imm, imm2)) }
-emit_uqdecd_zd_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_uqdecd_zd_i_i(rz, imm, imm2)) }
+emit_uqdecd_r_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_uqdecd_r_i_i(dst, imm, imm2)) }
+emit_uqdecd_zd_i_i            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_uqdecd_zd_i_i(rz, imm, imm2)) }
 inst_cntp_r_p_pb              :: #force_inline proc "contextless" (dst: Register, rz1: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .CNTP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}}} }
 inst_cntp_r_p_ph              :: #force_inline proc "contextless" (dst: Register, rz1: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .CNTP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}}} }
 inst_cntp_r_p_ps              :: #force_inline proc "contextless" (dst: Register, rz1: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .CNTP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}}} }
 inst_cntp_r_p_pd              :: #force_inline proc "contextless" (dst: Register, rz1: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .CNTP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}}} }
-emit_cntp_r_p_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) { append(instructions, inst_cntp_r_p_pb(dst, rz1, rz2)) }
-emit_cntp_r_p_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) { append(instructions, inst_cntp_r_p_ph(dst, rz1, rz2)) }
-emit_cntp_r_p_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) { append(instructions, inst_cntp_r_p_ps(dst, rz1, rz2)) }
-emit_cntp_r_p_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) { append(instructions, inst_cntp_r_p_pd(dst, rz1, rz2)) }
+emit_cntp_r_p_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) { append_elem(instructions, inst_cntp_r_p_pb(dst, rz1, rz2)) }
+emit_cntp_r_p_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) { append_elem(instructions, inst_cntp_r_p_ph(dst, rz1, rz2)) }
+emit_cntp_r_p_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) { append_elem(instructions, inst_cntp_r_p_ps(dst, rz1, rz2)) }
+emit_cntp_r_p_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) { append_elem(instructions, inst_cntp_r_p_pd(dst, rz1, rz2)) }
 inst_incp_r_pb                :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .INCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_incp_r_ph                :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .INCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_incp_r_ps                :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .INCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
@@ -4086,13 +4114,13 @@ inst_incp_r_pd                :: #force_inline proc "contextless" (dst: Register
 inst_incp_zh_ph               :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .INCP, operand_count = 2, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_incp_zs_ps               :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .INCP, operand_count = 2, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_incp_zd_pd               :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .INCP, operand_count = 2, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
-emit_incp_r_pb                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_incp_r_pb(dst, rz1)) }
-emit_incp_r_ph                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_incp_r_ph(dst, rz1)) }
-emit_incp_r_ps                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_incp_r_ps(dst, rz1)) }
-emit_incp_r_pd                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_incp_r_pd(dst, rz1)) }
-emit_incp_zh_ph               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_incp_zh_ph(rz, rz2)) }
-emit_incp_zs_ps               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_incp_zs_ps(rz, rz2)) }
-emit_incp_zd_pd               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_incp_zd_pd(rz, rz2)) }
+emit_incp_r_pb                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_incp_r_pb(dst, rz1)) }
+emit_incp_r_ph                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_incp_r_ph(dst, rz1)) }
+emit_incp_r_ps                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_incp_r_ps(dst, rz1)) }
+emit_incp_r_pd                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_incp_r_pd(dst, rz1)) }
+emit_incp_zh_ph               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_incp_zh_ph(rz, rz2)) }
+emit_incp_zs_ps               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_incp_zs_ps(rz, rz2)) }
+emit_incp_zd_pd               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_incp_zd_pd(rz, rz2)) }
 inst_decp_r_pb                :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .DECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_decp_r_ph                :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .DECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_decp_r_ps                :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .DECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
@@ -4100,13 +4128,13 @@ inst_decp_r_pd                :: #force_inline proc "contextless" (dst: Register
 inst_decp_zh_ph               :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .DECP, operand_count = 2, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_decp_zs_ps               :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .DECP, operand_count = 2, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_decp_zd_pd               :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .DECP, operand_count = 2, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
-emit_decp_r_pb                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_decp_r_pb(dst, rz1)) }
-emit_decp_r_ph                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_decp_r_ph(dst, rz1)) }
-emit_decp_r_ps                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_decp_r_ps(dst, rz1)) }
-emit_decp_r_pd                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_decp_r_pd(dst, rz1)) }
-emit_decp_zh_ph               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_decp_zh_ph(rz, rz2)) }
-emit_decp_zs_ps               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_decp_zs_ps(rz, rz2)) }
-emit_decp_zd_pd               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_decp_zd_pd(rz, rz2)) }
+emit_decp_r_pb                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_decp_r_pb(dst, rz1)) }
+emit_decp_r_ph                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_decp_r_ph(dst, rz1)) }
+emit_decp_r_ps                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_decp_r_ps(dst, rz1)) }
+emit_decp_r_pd                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_decp_r_pd(dst, rz1)) }
+emit_decp_zh_ph               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_decp_zh_ph(rz, rz2)) }
+emit_decp_zs_ps               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_decp_zs_ps(rz, rz2)) }
+emit_decp_zd_pd               :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_decp_zd_pd(rz, rz2)) }
 inst_sqincp_r_pb              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .SQINCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_sqincp_r_ph              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .SQINCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_sqincp_r_ps              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .SQINCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
@@ -4118,17 +4146,17 @@ inst_sqincp_r_pd_r            :: #force_inline proc "contextless" (dst: Register
 inst_sqincp_zh_ph             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .SQINCP, operand_count = 2, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_sqincp_zs_ps             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .SQINCP, operand_count = 2, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_sqincp_zd_pd             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .SQINCP, operand_count = 2, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
-emit_sqincp_r_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_sqincp_r_pb(dst, rz1)) }
-emit_sqincp_r_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_sqincp_r_ph(dst, rz1)) }
-emit_sqincp_r_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_sqincp_r_ps(dst, rz1)) }
-emit_sqincp_r_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_sqincp_r_pd(dst, rz1)) }
-emit_sqincp_r_pb_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append(instructions, inst_sqincp_r_pb_r(dst, rz1, src)) }
-emit_sqincp_r_ph_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append(instructions, inst_sqincp_r_ph_r(dst, rz1, src)) }
-emit_sqincp_r_ps_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append(instructions, inst_sqincp_r_ps_r(dst, rz1, src)) }
-emit_sqincp_r_pd_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append(instructions, inst_sqincp_r_pd_r(dst, rz1, src)) }
-emit_sqincp_zh_ph             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_sqincp_zh_ph(rz, rz2)) }
-emit_sqincp_zs_ps             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_sqincp_zs_ps(rz, rz2)) }
-emit_sqincp_zd_pd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_sqincp_zd_pd(rz, rz2)) }
+emit_sqincp_r_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_sqincp_r_pb(dst, rz1)) }
+emit_sqincp_r_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_sqincp_r_ph(dst, rz1)) }
+emit_sqincp_r_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_sqincp_r_ps(dst, rz1)) }
+emit_sqincp_r_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_sqincp_r_pd(dst, rz1)) }
+emit_sqincp_r_pb_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append_elem(instructions, inst_sqincp_r_pb_r(dst, rz1, src)) }
+emit_sqincp_r_ph_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append_elem(instructions, inst_sqincp_r_ph_r(dst, rz1, src)) }
+emit_sqincp_r_ps_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append_elem(instructions, inst_sqincp_r_ps_r(dst, rz1, src)) }
+emit_sqincp_r_pd_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append_elem(instructions, inst_sqincp_r_pd_r(dst, rz1, src)) }
+emit_sqincp_zh_ph             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_sqincp_zh_ph(rz, rz2)) }
+emit_sqincp_zs_ps             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_sqincp_zs_ps(rz, rz2)) }
+emit_sqincp_zd_pd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_sqincp_zd_pd(rz, rz2)) }
 inst_sqdecp_r_pb              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .SQDECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_sqdecp_r_ph              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .SQDECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_sqdecp_r_ps              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .SQDECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
@@ -4140,17 +4168,17 @@ inst_sqdecp_r_pd_r            :: #force_inline proc "contextless" (dst: Register
 inst_sqdecp_zh_ph             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .SQDECP, operand_count = 2, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_sqdecp_zs_ps             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .SQDECP, operand_count = 2, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_sqdecp_zd_pd             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .SQDECP, operand_count = 2, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
-emit_sqdecp_r_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_sqdecp_r_pb(dst, rz1)) }
-emit_sqdecp_r_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_sqdecp_r_ph(dst, rz1)) }
-emit_sqdecp_r_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_sqdecp_r_ps(dst, rz1)) }
-emit_sqdecp_r_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_sqdecp_r_pd(dst, rz1)) }
-emit_sqdecp_r_pb_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append(instructions, inst_sqdecp_r_pb_r(dst, rz1, src)) }
-emit_sqdecp_r_ph_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append(instructions, inst_sqdecp_r_ph_r(dst, rz1, src)) }
-emit_sqdecp_r_ps_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append(instructions, inst_sqdecp_r_ps_r(dst, rz1, src)) }
-emit_sqdecp_r_pd_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append(instructions, inst_sqdecp_r_pd_r(dst, rz1, src)) }
-emit_sqdecp_zh_ph             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_sqdecp_zh_ph(rz, rz2)) }
-emit_sqdecp_zs_ps             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_sqdecp_zs_ps(rz, rz2)) }
-emit_sqdecp_zd_pd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_sqdecp_zd_pd(rz, rz2)) }
+emit_sqdecp_r_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_sqdecp_r_pb(dst, rz1)) }
+emit_sqdecp_r_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_sqdecp_r_ph(dst, rz1)) }
+emit_sqdecp_r_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_sqdecp_r_ps(dst, rz1)) }
+emit_sqdecp_r_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_sqdecp_r_pd(dst, rz1)) }
+emit_sqdecp_r_pb_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append_elem(instructions, inst_sqdecp_r_pb_r(dst, rz1, src)) }
+emit_sqdecp_r_ph_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append_elem(instructions, inst_sqdecp_r_ph_r(dst, rz1, src)) }
+emit_sqdecp_r_ps_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append_elem(instructions, inst_sqdecp_r_ps_r(dst, rz1, src)) }
+emit_sqdecp_r_pd_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) { append_elem(instructions, inst_sqdecp_r_pd_r(dst, rz1, src)) }
+emit_sqdecp_zh_ph             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_sqdecp_zh_ph(rz, rz2)) }
+emit_sqdecp_zs_ps             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_sqdecp_zs_ps(rz, rz2)) }
+emit_sqdecp_zd_pd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_sqdecp_zd_pd(rz, rz2)) }
 inst_uqincp_r_pb              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .UQINCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_uqincp_r_ph              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .UQINCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_uqincp_r_ps              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .UQINCP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
@@ -4158,13 +4186,13 @@ inst_uqincp_r_pd              :: #force_inline proc "contextless" (dst: Register
 inst_uqincp_zh_ph             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .UQINCP, operand_count = 2, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_uqincp_zs_ps             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .UQINCP, operand_count = 2, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_uqincp_zd_pd             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .UQINCP, operand_count = 2, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
-emit_uqincp_r_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_uqincp_r_pb(dst, rz1)) }
-emit_uqincp_r_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_uqincp_r_ph(dst, rz1)) }
-emit_uqincp_r_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_uqincp_r_ps(dst, rz1)) }
-emit_uqincp_r_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_uqincp_r_pd(dst, rz1)) }
-emit_uqincp_zh_ph             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_uqincp_zh_ph(rz, rz2)) }
-emit_uqincp_zs_ps             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_uqincp_zs_ps(rz, rz2)) }
-emit_uqincp_zd_pd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_uqincp_zd_pd(rz, rz2)) }
+emit_uqincp_r_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_uqincp_r_pb(dst, rz1)) }
+emit_uqincp_r_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_uqincp_r_ph(dst, rz1)) }
+emit_uqincp_r_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_uqincp_r_ps(dst, rz1)) }
+emit_uqincp_r_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_uqincp_r_pd(dst, rz1)) }
+emit_uqincp_zh_ph             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_uqincp_zh_ph(rz, rz2)) }
+emit_uqincp_zs_ps             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_uqincp_zs_ps(rz, rz2)) }
+emit_uqincp_zd_pd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_uqincp_zd_pd(rz, rz2)) }
 inst_uqdecp_r_pb              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .UQDECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_uqdecp_r_ph              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .UQDECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
 inst_uqdecp_r_ps              :: #force_inline proc "contextless" (dst: Register, rz1: u8) -> Instruction { return Instruction{mnemonic = .UQDECP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(Register(REG_P | (u16(rz1) & 0xF))), {}, {}, {}}} }
@@ -4172,63 +4200,63 @@ inst_uqdecp_r_pd              :: #force_inline proc "contextless" (dst: Register
 inst_uqdecp_zh_ph             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .UQDECP, operand_count = 2, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_uqdecp_zs_ps             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .UQDECP, operand_count = 2, length = 4, ops = {op_z_s(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
 inst_uqdecp_zd_pd             :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .UQDECP, operand_count = 2, length = 4, ops = {op_z_d(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), {}, {}, {}}} }
-emit_uqdecp_r_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_uqdecp_r_pb(dst, rz1)) }
-emit_uqdecp_r_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_uqdecp_r_ph(dst, rz1)) }
-emit_uqdecp_r_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_uqdecp_r_ps(dst, rz1)) }
-emit_uqdecp_r_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append(instructions, inst_uqdecp_r_pd(dst, rz1)) }
-emit_uqdecp_zh_ph             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_uqdecp_zh_ph(rz, rz2)) }
-emit_uqdecp_zs_ps             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_uqdecp_zs_ps(rz, rz2)) }
-emit_uqdecp_zd_pd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_uqdecp_zd_pd(rz, rz2)) }
+emit_uqdecp_r_pb              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_uqdecp_r_pb(dst, rz1)) }
+emit_uqdecp_r_ph              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_uqdecp_r_ph(dst, rz1)) }
+emit_uqdecp_r_ps              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_uqdecp_r_ps(dst, rz1)) }
+emit_uqdecp_r_pd              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) { append_elem(instructions, inst_uqdecp_r_pd(dst, rz1)) }
+emit_uqdecp_zh_ph             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_uqdecp_zh_ph(rz, rz2)) }
+emit_uqdecp_zs_ps             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_uqdecp_zs_ps(rz, rz2)) }
+emit_uqdecp_zd_pd             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_uqdecp_zd_pd(rz, rz2)) }
 inst_ld1q_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD1Q, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ld1q_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_ld1q_i_p_m(imm, rz1, mem)) }
+emit_ld1q_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_ld1q_i_p_m(imm, rz1, mem)) }
 inst_st1q_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST1Q, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
-emit_st1q_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_st1q_i_p_m(imm, rz1, mem)) }
+emit_st1q_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_st1q_i_p_m(imm, rz1, mem)) }
 inst_mova_zb_p_i              :: #force_inline proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVA, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_imm(imm, 4), {}, {}}} }
 inst_mova_i_p_zb              :: #force_inline proc "contextless" (imm: i64, rz1: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .MOVA, operand_count = 3, length = 4, ops = {op_imm(imm, 4), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_z_b(rz2), {}, {}}} }
-emit_mova_zb_p_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append(instructions, inst_mova_zb_p_i(rz, rz2, imm)) }
-emit_mova_i_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8) { append(instructions, inst_mova_i_p_zb(imm, rz1, rz2)) }
+emit_mova_zb_p_i              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append_elem(instructions, inst_mova_zb_p_i(rz, rz2, imm)) }
+emit_mova_i_p_zb              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8) { append_elem(instructions, inst_mova_i_p_zb(imm, rz1, rz2)) }
 inst_fcmla_v4h_v4h_v4h_i      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FCMLA, operand_count = 4, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), op_imm(imm, 1), {}}} }
 inst_fcmla_v8h_v8h_v8h_i      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FCMLA, operand_count = 4, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), op_imm(imm, 1), {}}} }
 inst_fcmla_v4s_v4s_v4s_i      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FCMLA, operand_count = 4, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), op_imm(imm, 1), {}}} }
 inst_fcmla_v2d_v2d_v2d_i      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FCMLA, operand_count = 4, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), op_imm(imm, 1), {}}} }
-emit_fcmla_v4h_v4h_v4h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_fcmla_v4h_v4h_v4h_i(dst, src, src2, imm)) }
-emit_fcmla_v8h_v8h_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_fcmla_v8h_v8h_v8h_i(dst, src, src2, imm)) }
-emit_fcmla_v4s_v4s_v4s_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_fcmla_v4s_v4s_v4s_i(dst, src, src2, imm)) }
-emit_fcmla_v2d_v2d_v2d_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_fcmla_v2d_v2d_v2d_i(dst, src, src2, imm)) }
+emit_fcmla_v4h_v4h_v4h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_fcmla_v4h_v4h_v4h_i(dst, src, src2, imm)) }
+emit_fcmla_v8h_v8h_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_fcmla_v8h_v8h_v8h_i(dst, src, src2, imm)) }
+emit_fcmla_v4s_v4s_v4s_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_fcmla_v4s_v4s_v4s_i(dst, src, src2, imm)) }
+emit_fcmla_v2d_v2d_v2d_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_fcmla_v2d_v2d_v2d_i(dst, src, src2, imm)) }
 inst_fcadd_v4h_v4h_v4h_i      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FCADD, operand_count = 4, length = 4, ops = {op_v_4h(dst), op_v_4h(src), op_v_4h(src2), op_imm(imm, 1), {}}} }
 inst_fcadd_v8h_v8h_v8h_i      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FCADD, operand_count = 4, length = 4, ops = {op_v_8h(dst), op_v_8h(src), op_v_8h(src2), op_imm(imm, 1), {}}} }
 inst_fcadd_v4s_v4s_v4s_i      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FCADD, operand_count = 4, length = 4, ops = {op_v_4s(dst), op_v_4s(src), op_v_4s(src2), op_imm(imm, 1), {}}} }
 inst_fcadd_v2d_v2d_v2d_i      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .FCADD, operand_count = 4, length = 4, ops = {op_v_2d(dst), op_v_2d(src), op_v_2d(src2), op_imm(imm, 1), {}}} }
-emit_fcadd_v4h_v4h_v4h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_fcadd_v4h_v4h_v4h_i(dst, src, src2, imm)) }
-emit_fcadd_v8h_v8h_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_fcadd_v8h_v8h_v8h_i(dst, src, src2, imm)) }
-emit_fcadd_v4s_v4s_v4s_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_fcadd_v4s_v4s_v4s_i(dst, src, src2, imm)) }
-emit_fcadd_v2d_v2d_v2d_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_fcadd_v2d_v2d_v2d_i(dst, src, src2, imm)) }
+emit_fcadd_v4h_v4h_v4h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_fcadd_v4h_v4h_v4h_i(dst, src, src2, imm)) }
+emit_fcadd_v8h_v8h_v8h_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_fcadd_v8h_v8h_v8h_i(dst, src, src2, imm)) }
+emit_fcadd_v4s_v4s_v4s_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_fcadd_v4s_v4s_v4s_i(dst, src, src2, imm)) }
+emit_fcadd_v2d_v2d_v2d_i      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_fcadd_v2d_v2d_v2d_i(dst, src, src2, imm)) }
 inst_prfb_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .PRFB, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
-emit_prfb_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_prfb_i_p_m(imm, rz1, mem)) }
+emit_prfb_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_prfb_i_p_m(imm, rz1, mem)) }
 inst_prfh_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .PRFH, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
-emit_prfh_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_prfh_i_p_m(imm, rz1, mem)) }
+emit_prfh_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_prfh_i_p_m(imm, rz1, mem)) }
 inst_prfw_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .PRFW, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
-emit_prfw_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_prfw_i_p_m(imm, rz1, mem)) }
+emit_prfw_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_prfw_i_p_m(imm, rz1, mem)) }
 inst_prfd_i_p_m               :: #force_inline proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .PRFD, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_reg(Register(REG_P | (u16(rz1) & 0xF))), op_mem(mem), {}, {}}} }
-emit_prfd_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append(instructions, inst_prfd_i_p_m(imm, rz1, mem)) }
+emit_prfd_i_p_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) { append_elem(instructions, inst_prfd_i_p_m(imm, rz1, mem)) }
 inst_ldnt1b_zb_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDNT1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_B, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ldnt1b_zb_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ldnt1b_zb_p_m(rz, rz2, mem)) }
+emit_ldnt1b_zb_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ldnt1b_zb_p_m(rz, rz2, mem)) }
 inst_ldnt1h_zh_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDNT1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_H, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ldnt1h_zh_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ldnt1h_zh_p_m(rz, rz2, mem)) }
+emit_ldnt1h_zh_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ldnt1h_zh_p_m(rz, rz2, mem)) }
 inst_ldnt1w_zs_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDNT1W, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ldnt1w_zs_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ldnt1w_zs_p_m(rz, rz2, mem)) }
+emit_ldnt1w_zs_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ldnt1w_zs_p_m(rz, rz2, mem)) }
 inst_ldnt1d_zd_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDNT1D, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_ldnt1d_zd_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_ldnt1d_zd_p_m(rz, rz2, mem)) }
+emit_ldnt1d_zd_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_ldnt1d_zd_p_m(rz, rz2, mem)) }
 inst_stnt1b_zb_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .STNT1B, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_B, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_stnt1b_zb_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_stnt1b_zb_p_m(rz, rz2, mem)) }
+emit_stnt1b_zb_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_stnt1b_zb_p_m(rz, rz2, mem)) }
 inst_stnt1h_zh_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .STNT1H, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_H, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_stnt1h_zh_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_stnt1h_zh_p_m(rz, rz2, mem)) }
+emit_stnt1h_zh_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_stnt1h_zh_p_m(rz, rz2, mem)) }
 inst_stnt1w_zs_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .STNT1W, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_S, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_stnt1w_zs_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_stnt1w_zs_p_m(rz, rz2, mem)) }
+emit_stnt1w_zs_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_stnt1w_zs_p_m(rz, rz2, mem)) }
 inst_stnt1d_zd_p_m            :: #force_inline proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction { return Instruction{mnemonic = .STNT1D, operand_count = 3, length = 4, ops = {op_v_list(Register(REG_Z | (u16(rz) & 0x1F)), ZSHAPE_D, 1), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_mem(mem), {}, {}}} }
-emit_stnt1d_zd_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append(instructions, inst_stnt1d_zd_p_m(rz, rz2, mem)) }
+emit_stnt1d_zd_p_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) { append_elem(instructions, inst_stnt1d_zd_p_m(rz, rz2, mem)) }
 inst_splice_zb_p_zb_zb        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .SPLICE, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_b(rz3), op_z_b(rz4), {}}} }
-emit_splice_zb_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_splice_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
+emit_splice_zb_p_zb_zb        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_splice_zb_p_zb_zb(rz, rz2, rz3, rz4)) }
 inst_index_zb_i_i             :: #force_inline proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INDEX, operand_count = 3, length = 4, ops = {op_z_b(rz), op_imm(imm, 1), op_imm(imm2, 1), {}, {}}} }
 inst_index_zb_i_r             :: #force_inline proc "contextless" (rz: u8, imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .INDEX, operand_count = 3, length = 4, ops = {op_z_b(rz), op_imm(imm, 1), op_reg(src), {}, {}}} }
 inst_index_zb_r_i             :: #force_inline proc "contextless" (rz: u8, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .INDEX, operand_count = 3, length = 4, ops = {op_z_b(rz), op_reg(src), op_imm(imm, 1), {}, {}}} }
@@ -4245,366 +4273,366 @@ inst_index_zd_i_i             :: #force_inline proc "contextless" (rz: u8, imm:
 inst_index_zd_i_r             :: #force_inline proc "contextless" (rz: u8, imm: i64, src: Register) -> Instruction { return Instruction{mnemonic = .INDEX, operand_count = 3, length = 4, ops = {op_z_d(rz), op_imm(imm, 1), op_reg(src), {}, {}}} }
 inst_index_zd_r_i             :: #force_inline proc "contextless" (rz: u8, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .INDEX, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(src), op_imm(imm, 1), {}, {}}} }
 inst_index_zd_r_r             :: #force_inline proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .INDEX, operand_count = 3, length = 4, ops = {op_z_d(rz), op_reg(src), op_reg(src2), {}, {}}} }
-emit_index_zb_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_index_zb_i_i(rz, imm, imm2)) }
-emit_index_zb_i_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) { append(instructions, inst_index_zb_i_r(rz, imm, src)) }
-emit_index_zb_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) { append(instructions, inst_index_zb_r_i(rz, src, imm)) }
-emit_index_zb_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_index_zb_r_r(rz, src, src2)) }
-emit_index_zh_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_index_zh_i_i(rz, imm, imm2)) }
-emit_index_zh_i_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) { append(instructions, inst_index_zh_i_r(rz, imm, src)) }
-emit_index_zh_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) { append(instructions, inst_index_zh_r_i(rz, src, imm)) }
-emit_index_zh_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_index_zh_r_r(rz, src, src2)) }
-emit_index_zs_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_index_zs_i_i(rz, imm, imm2)) }
-emit_index_zs_i_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) { append(instructions, inst_index_zs_i_r(rz, imm, src)) }
-emit_index_zs_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) { append(instructions, inst_index_zs_r_i(rz, src, imm)) }
-emit_index_zs_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_index_zs_r_r(rz, src, src2)) }
-emit_index_zd_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append(instructions, inst_index_zd_i_i(rz, imm, imm2)) }
-emit_index_zd_i_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) { append(instructions, inst_index_zd_i_r(rz, imm, src)) }
-emit_index_zd_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) { append(instructions, inst_index_zd_r_i(rz, src, imm)) }
-emit_index_zd_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append(instructions, inst_index_zd_r_r(rz, src, src2)) }
+emit_index_zb_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_index_zb_i_i(rz, imm, imm2)) }
+emit_index_zb_i_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) { append_elem(instructions, inst_index_zb_i_r(rz, imm, src)) }
+emit_index_zb_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) { append_elem(instructions, inst_index_zb_r_i(rz, src, imm)) }
+emit_index_zb_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_index_zb_r_r(rz, src, src2)) }
+emit_index_zh_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_index_zh_i_i(rz, imm, imm2)) }
+emit_index_zh_i_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) { append_elem(instructions, inst_index_zh_i_r(rz, imm, src)) }
+emit_index_zh_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) { append_elem(instructions, inst_index_zh_r_i(rz, src, imm)) }
+emit_index_zh_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_index_zh_r_r(rz, src, src2)) }
+emit_index_zs_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_index_zs_i_i(rz, imm, imm2)) }
+emit_index_zs_i_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) { append_elem(instructions, inst_index_zs_i_r(rz, imm, src)) }
+emit_index_zs_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) { append_elem(instructions, inst_index_zs_r_i(rz, src, imm)) }
+emit_index_zs_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_index_zs_r_r(rz, src, src2)) }
+emit_index_zd_i_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) { append_elem(instructions, inst_index_zd_i_i(rz, imm, imm2)) }
+emit_index_zd_i_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) { append_elem(instructions, inst_index_zd_i_r(rz, imm, src)) }
+emit_index_zd_r_i             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) { append_elem(instructions, inst_index_zd_r_i(rz, src, imm)) }
+emit_index_zd_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) { append_elem(instructions, inst_index_zd_r_r(rz, src, src2)) }
 inst_bsl1n_zd_zd_zd_zd        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BSL1N, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_bsl1n_zd_zd_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bsl1n_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
+emit_bsl1n_zd_zd_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bsl1n_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
 inst_bsl2n_zd_zd_zd_zd        :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BSL2N, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_bsl2n_zd_zd_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bsl2n_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
+emit_bsl2n_zd_zd_zd_zd        :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bsl2n_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
 inst_nbsl_zd_zd_zd_zd         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .NBSL, operand_count = 4, length = 4, ops = {op_z_d(rz), op_z_d(rz2), op_z_d(rz3), op_z_d(rz4), {}}} }
-emit_nbsl_zd_zd_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_nbsl_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
+emit_nbsl_zd_zd_zd_zd         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_nbsl_zd_zd_zd_zd(rz, rz2, rz3, rz4)) }
 inst_pmul_zb_zb_zb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .PMUL, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
-emit_pmul_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_pmul_zb_zb_zb(rz, rz2, rz3)) }
+emit_pmul_zb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_pmul_zb_zb_zb(rz, rz2, rz3)) }
 inst_pmullb_zd_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .PMULLB, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
-emit_pmullb_zd_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_pmullb_zd_zs_zs(rz, rz2, rz3)) }
+emit_pmullb_zd_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_pmullb_zd_zs_zs(rz, rz2, rz3)) }
 inst_pmullt_zd_zs_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .PMULLT, operand_count = 3, length = 4, ops = {op_z_d(rz), op_z_s(rz2), op_z_s(rz3), {}, {}}} }
-emit_pmullt_zd_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_pmullt_zd_zs_zs(rz, rz2, rz3)) }
+emit_pmullt_zd_zs_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_pmullt_zd_zs_zs(rz, rz2, rz3)) }
 inst_bfcvtnt_zh_p_zs          :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BFCVTNT, operand_count = 3, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_s(rz3), {}, {}}} }
-emit_bfcvtnt_zh_p_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_bfcvtnt_zh_p_zs(rz, rz2, rz3)) }
+emit_bfcvtnt_zh_p_zs          :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_bfcvtnt_zh_p_zs(rz, rz2, rz3)) }
 inst_ldraa_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDRAA, dst, mem) }
-emit_ldraa_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldraa_r_m(dst, mem)) }
+emit_ldraa_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldraa_r_m(dst, mem)) }
 inst_ldrab_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDRAB, dst, mem) }
-emit_ldrab_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldrab_r_m(dst, mem)) }
+emit_ldrab_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldrab_r_m(dst, mem)) }
 inst_tstart_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TSTART, dst) }
-emit_tstart_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tstart_r(dst)) }
+emit_tstart_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tstart_r(dst)) }
 inst_tcommit_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TCOMMIT) }
-emit_tcommit_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tcommit_none()) }
+emit_tcommit_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tcommit_none()) }
 inst_tcancel_i                :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .TCANCEL, operand_count = 1, length = 4, ops = {op_imm(imm, 2), {}, {}, {}, {}}} }
-emit_tcancel_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_tcancel_i(imm)) }
+emit_tcancel_i                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_tcancel_i(imm)) }
 inst_ttest_r                  :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TTEST, dst) }
-emit_ttest_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_ttest_r(dst)) }
+emit_ttest_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_ttest_r(dst)) }
 inst_wfet_r                   :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.WFET, dst) }
-emit_wfet_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_wfet_r(dst)) }
+emit_wfet_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_wfet_r(dst)) }
 inst_wfit_r                   :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.WFIT, dst) }
-emit_wfit_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_wfit_r(dst)) }
+emit_wfit_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_wfit_r(dst)) }
 inst_bc_eq_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_EQ, label) }
-emit_bc_eq_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_eq_l(label)) }
+emit_bc_eq_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_eq_l(label)) }
 inst_bc_ne_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_NE, label) }
-emit_bc_ne_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_ne_l(label)) }
+emit_bc_ne_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_ne_l(label)) }
 inst_bc_cs_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_CS, label) }
-emit_bc_cs_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_cs_l(label)) }
+emit_bc_cs_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_cs_l(label)) }
 inst_bc_cc_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_CC, label) }
-emit_bc_cc_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_cc_l(label)) }
+emit_bc_cc_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_cc_l(label)) }
 inst_bc_mi_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_MI, label) }
-emit_bc_mi_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_mi_l(label)) }
+emit_bc_mi_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_mi_l(label)) }
 inst_bc_pl_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_PL, label) }
-emit_bc_pl_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_pl_l(label)) }
+emit_bc_pl_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_pl_l(label)) }
 inst_bc_vs_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_VS, label) }
-emit_bc_vs_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_vs_l(label)) }
+emit_bc_vs_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_vs_l(label)) }
 inst_bc_vc_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_VC, label) }
-emit_bc_vc_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_vc_l(label)) }
+emit_bc_vc_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_vc_l(label)) }
 inst_bc_hi_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_HI, label) }
-emit_bc_hi_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_hi_l(label)) }
+emit_bc_hi_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_hi_l(label)) }
 inst_bc_ls_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_LS, label) }
-emit_bc_ls_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_ls_l(label)) }
+emit_bc_ls_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_ls_l(label)) }
 inst_bc_ge_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_GE, label) }
-emit_bc_ge_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_ge_l(label)) }
+emit_bc_ge_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_ge_l(label)) }
 inst_bc_lt_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_LT, label) }
-emit_bc_lt_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_lt_l(label)) }
+emit_bc_lt_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_lt_l(label)) }
 inst_bc_gt_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_GT, label) }
-emit_bc_gt_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_gt_l(label)) }
+emit_bc_gt_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_gt_l(label)) }
 inst_bc_le_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_LE, label) }
-emit_bc_le_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_le_l(label)) }
+emit_bc_le_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_le_l(label)) }
 inst_bc_al_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_AL, label) }
-emit_bc_al_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_al_l(label)) }
+emit_bc_al_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_al_l(label)) }
 inst_bc_nv_l                  :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.BC_NV, label) }
-emit_bc_nv_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bc_nv_l(label)) }
+emit_bc_nv_l                  :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bc_nv_l(label)) }
 inst_uxtb_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.UXTB, dst, src) }
-emit_uxtb_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtb_r_r(dst, src)) }
+emit_uxtb_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtb_r_r(dst, src)) }
 inst_uxth_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.UXTH, dst, src) }
-emit_uxth_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxth_r_r(dst, src)) }
+emit_uxth_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxth_r_r(dst, src)) }
 inst_uxtw_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.UXTW, dst, src) }
-emit_uxtw_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_uxtw_r_r(dst, src)) }
+emit_uxtw_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_uxtw_r_r(dst, src)) }
 inst_sxtb_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.SXTB, dst, src) }
-emit_sxtb_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtb_r_r(dst, src)) }
+emit_sxtb_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtb_r_r(dst, src)) }
 inst_sxth_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.SXTH, dst, src) }
-emit_sxth_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxth_r_r(dst, src)) }
+emit_sxth_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxth_r_r(dst, src)) }
 inst_sxtw_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.SXTW, dst, src) }
-emit_sxtw_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_sxtw_r_r(dst, src)) }
+emit_sxtw_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_sxtw_r_r(dst, src)) }
 inst_adc_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.ADC, dst, src, src2) }
-emit_adc_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adc_r_r_r(dst, src, src2)) }
+emit_adc_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adc_r_r_r(dst, src, src2)) }
 inst_adcs_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.ADCS, dst, src, src2) }
-emit_adcs_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adcs_r_r_r(dst, src, src2)) }
+emit_adcs_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adcs_r_r_r(dst, src, src2)) }
 inst_sbc_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SBC, dst, src, src2) }
-emit_sbc_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sbc_r_r_r(dst, src, src2)) }
+emit_sbc_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sbc_r_r_r(dst, src, src2)) }
 inst_sbcs_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SBCS, dst, src, src2) }
-emit_sbcs_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sbcs_r_r_r(dst, src, src2)) }
+emit_sbcs_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sbcs_r_r_r(dst, src, src2)) }
 inst_ngc_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.NGC, dst, src) }
-emit_ngc_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ngc_r_r(dst, src)) }
+emit_ngc_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ngc_r_r(dst, src)) }
 inst_ngcs_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return inst_r_r(.NGCS, dst, src) }
-emit_ngcs_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ngcs_r_r(dst, src)) }
+emit_ngcs_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ngcs_r_r(dst, src)) }
 inst_ldapur_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPUR, dst, mem) }
-emit_ldapur_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldapur_r_m(dst, mem)) }
+emit_ldapur_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldapur_r_m(dst, mem)) }
 inst_stlur_r_m                :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STLUR, dst, mem) }
-emit_stlur_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stlur_r_m(dst, mem)) }
+emit_stlur_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stlur_r_m(dst, mem)) }
 inst_ldapurb_r_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPURB, dst, mem) }
-emit_ldapurb_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldapurb_r_m(dst, mem)) }
+emit_ldapurb_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldapurb_r_m(dst, mem)) }
 inst_stlurb_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STLURB, dst, mem) }
-emit_stlurb_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stlurb_r_m(dst, mem)) }
+emit_stlurb_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stlurb_r_m(dst, mem)) }
 inst_ldapurh_r_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPURH, dst, mem) }
-emit_ldapurh_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldapurh_r_m(dst, mem)) }
+emit_ldapurh_r_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldapurh_r_m(dst, mem)) }
 inst_stlurh_r_m               :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.STLURH, dst, mem) }
-emit_stlurh_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_stlurh_r_m(dst, mem)) }
+emit_stlurh_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_stlurh_r_m(dst, mem)) }
 inst_ldapursb_r_m             :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPURSB, dst, mem) }
-emit_ldapursb_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldapursb_r_m(dst, mem)) }
+emit_ldapursb_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldapursb_r_m(dst, mem)) }
 inst_ldapursh_r_m             :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPURSH, dst, mem) }
-emit_ldapursh_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldapursh_r_m(dst, mem)) }
+emit_ldapursh_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldapursh_r_m(dst, mem)) }
 inst_ldapursw_r_m             :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return inst_ldst(.LDAPURSW, dst, mem) }
-emit_ldapursw_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ldapursw_r_m(dst, mem)) }
+emit_ldapursw_r_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ldapursw_r_m(dst, mem)) }
 inst_bfadd_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFADD, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_bfadd_zh_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BFADD, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
-emit_bfadd_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfadd_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_bfadd_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_bfadd_zh_zh_zh(rz, rz2, rz3)) }
+emit_bfadd_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfadd_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_bfadd_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_bfadd_zh_zh_zh(rz, rz2, rz3)) }
 inst_bfsub_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFSUB, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_bfsub_zh_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BFSUB, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
-emit_bfsub_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfsub_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_bfsub_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_bfsub_zh_zh_zh(rz, rz2, rz3)) }
+emit_bfsub_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfsub_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_bfsub_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_bfsub_zh_zh_zh(rz, rz2, rz3)) }
 inst_bfmul_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFMUL, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
 inst_bfmul_zh_zh_zh           :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BFMUL, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
-emit_bfmul_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfmul_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
-emit_bfmul_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_bfmul_zh_zh_zh(rz, rz2, rz3)) }
+emit_bfmul_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfmul_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_bfmul_zh_zh_zh           :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_bfmul_zh_zh_zh(rz, rz2, rz3)) }
 inst_bfmla_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFMLA, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
-emit_bfmla_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfmla_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_bfmla_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfmla_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
 inst_bfmls_zh_p_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFMLS, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
-emit_bfmls_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfmls_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_bfmls_zh_p_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfmls_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
 inst_sb_none                  :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SB) }
-emit_sb_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sb_none()) }
+emit_sb_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sb_none()) }
 inst_csdb_none                :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CSDB) }
-emit_csdb_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_csdb_none()) }
+emit_csdb_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_csdb_none()) }
 inst_dgh_none                 :: #force_inline proc "contextless" () -> Instruction { return inst_none(.DGH) }
-emit_dgh_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dgh_none()) }
+emit_dgh_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dgh_none()) }
 inst_psb_csync_none           :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PSB_CSYNC) }
-emit_psb_csync_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_psb_csync_none()) }
+emit_psb_csync_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_psb_csync_none()) }
 inst_tsb_csync_none           :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TSB_CSYNC) }
-emit_tsb_csync_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tsb_csync_none()) }
+emit_tsb_csync_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tsb_csync_none()) }
 inst_bti_j_none               :: #force_inline proc "contextless" () -> Instruction { return inst_none(.BTI_J) }
-emit_bti_j_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bti_j_none()) }
+emit_bti_j_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bti_j_none()) }
 inst_bti_c_none               :: #force_inline proc "contextless" () -> Instruction { return inst_none(.BTI_C) }
-emit_bti_c_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bti_c_none()) }
+emit_bti_c_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bti_c_none()) }
 inst_bti_jc_none              :: #force_inline proc "contextless" () -> Instruction { return inst_none(.BTI_JC) }
-emit_bti_jc_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bti_jc_none()) }
+emit_bti_jc_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bti_jc_none()) }
 inst_bfclamp_zh_zh_zh         :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .BFCLAMP, operand_count = 3, length = 4, ops = {op_z_h(rz), op_z_h(rz2), op_z_h(rz3), {}, {}}} }
-emit_bfclamp_zh_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_bfclamp_zh_zh_zh(rz, rz2, rz3)) }
+emit_bfclamp_zh_zh_zh         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_bfclamp_zh_zh_zh(rz, rz2, rz3)) }
 inst_bfmaxnm_zh_p_zh_zh       :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFMAXNM, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
-emit_bfmaxnm_zh_p_zh_zh       :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfmaxnm_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_bfmaxnm_zh_p_zh_zh       :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfmaxnm_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
 inst_bfminnm_zh_p_zh_zh       :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction { return Instruction{mnemonic = .BFMINNM, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(Register(REG_P | (u16(rz2) & 0xF))), op_z_h(rz3), op_z_h(rz4), {}}} }
-emit_bfminnm_zh_p_zh_zh       :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append(instructions, inst_bfminnm_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
+emit_bfminnm_zh_p_zh_zh       :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) { append_elem(instructions, inst_bfminnm_zh_p_zh_zh(rz, rz2, rz3, rz4)) }
 inst_luti2_zpb_zt_z_i         :: #force_inline proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .LUTI2, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(ZT0), op_reg(Register(REG_Z | (u16(rz2) & 0x1F))), op_lane_index(imm), {}}} }
 inst_luti2_zph_zt_z_i         :: #force_inline proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .LUTI2, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(ZT0), op_reg(Register(REG_Z | (u16(rz2) & 0x1F))), op_lane_index(imm), {}}} }
 inst_luti2_zps_zt_z_i         :: #force_inline proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .LUTI2, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(ZT0), op_reg(Register(REG_Z | (u16(rz2) & 0x1F))), op_lane_index(imm), {}}} }
-emit_luti2_zpb_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append(instructions, inst_luti2_zpb_zt_z_i(rz, rz2, imm)) }
-emit_luti2_zph_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append(instructions, inst_luti2_zph_zt_z_i(rz, rz2, imm)) }
-emit_luti2_zps_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append(instructions, inst_luti2_zps_zt_z_i(rz, rz2, imm)) }
+emit_luti2_zpb_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append_elem(instructions, inst_luti2_zpb_zt_z_i(rz, rz2, imm)) }
+emit_luti2_zph_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append_elem(instructions, inst_luti2_zph_zt_z_i(rz, rz2, imm)) }
+emit_luti2_zps_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append_elem(instructions, inst_luti2_zps_zt_z_i(rz, rz2, imm)) }
 inst_luti4_zpb_zt_z_i         :: #force_inline proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .LUTI4, operand_count = 4, length = 4, ops = {op_z_b(rz), op_reg(ZT0), op_reg(Register(REG_Z | (u16(rz2) & 0x1F))), op_lane_index(imm), {}}} }
 inst_luti4_zph_zt_z_i         :: #force_inline proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .LUTI4, operand_count = 4, length = 4, ops = {op_z_h(rz), op_reg(ZT0), op_reg(Register(REG_Z | (u16(rz2) & 0x1F))), op_lane_index(imm), {}}} }
 inst_luti4_zps_zt_z_i         :: #force_inline proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction { return Instruction{mnemonic = .LUTI4, operand_count = 4, length = 4, ops = {op_z_s(rz), op_reg(ZT0), op_reg(Register(REG_Z | (u16(rz2) & 0x1F))), op_lane_index(imm), {}}} }
-emit_luti4_zpb_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append(instructions, inst_luti4_zpb_zt_z_i(rz, rz2, imm)) }
-emit_luti4_zph_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append(instructions, inst_luti4_zph_zt_z_i(rz, rz2, imm)) }
-emit_luti4_zps_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append(instructions, inst_luti4_zps_zt_z_i(rz, rz2, imm)) }
+emit_luti4_zpb_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append_elem(instructions, inst_luti4_zpb_zt_z_i(rz, rz2, imm)) }
+emit_luti4_zph_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append_elem(instructions, inst_luti4_zph_zt_z_i(rz, rz2, imm)) }
+emit_luti4_zps_zt_z_i         :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) { append_elem(instructions, inst_luti4_zps_zt_z_i(rz, rz2, imm)) }
 inst_zip_zpb_zb_zb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .ZIP, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
 inst_zip_zqb_zqb              :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .ZIP, operand_count = 2, length = 4, ops = {op_z_b(rz), op_z_b(rz2), {}, {}, {}}} }
-emit_zip_zpb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_zip_zpb_zb_zb(rz, rz2, rz3)) }
-emit_zip_zqb_zqb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_zip_zqb_zqb(rz, rz2)) }
+emit_zip_zpb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_zip_zpb_zb_zb(rz, rz2, rz3)) }
+emit_zip_zqb_zqb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_zip_zqb_zqb(rz, rz2)) }
 inst_uzp_zpb_zb_zb            :: #force_inline proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction { return Instruction{mnemonic = .UZP, operand_count = 3, length = 4, ops = {op_z_b(rz), op_z_b(rz2), op_z_b(rz3), {}, {}}} }
 inst_uzp_zqb_zqb              :: #force_inline proc "contextless" (rz: u8, rz2: u8) -> Instruction { return Instruction{mnemonic = .UZP, operand_count = 2, length = 4, ops = {op_z_b(rz), op_z_b(rz2), {}, {}, {}}} }
-emit_uzp_zpb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append(instructions, inst_uzp_zpb_zb_zb(rz, rz2, rz3)) }
-emit_uzp_zqb_zqb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append(instructions, inst_uzp_zqb_zqb(rz, rz2)) }
+emit_uzp_zpb_zb_zb            :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) { append_elem(instructions, inst_uzp_zpb_zb_zb(rz, rz2, rz3)) }
+emit_uzp_zqb_zqb              :: #force_inline proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) { append_elem(instructions, inst_uzp_zqb_zqb(rz, rz2)) }
 inst_tlbi_rpalos_r            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_RPALOS, dst) }
-emit_tlbi_rpalos_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_rpalos_r(dst)) }
+emit_tlbi_rpalos_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_rpalos_r(dst)) }
 inst_tlbi_rpaos_r             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_RPAOS, dst) }
-emit_tlbi_rpaos_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_rpaos_r(dst)) }
+emit_tlbi_rpaos_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_rpaos_r(dst)) }
 inst_at_s1e1a_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E1A, dst) }
-emit_at_s1e1a_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e1a_r(dst)) }
+emit_at_s1e1a_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e1a_r(dst)) }
 inst_dc_cipapa_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_CIPAPA, dst) }
-emit_dc_cipapa_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_cipapa_r(dst)) }
+emit_dc_cipapa_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_cipapa_r(dst)) }
 inst_dc_cigdpapa_r            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_CIGDPAPA, dst) }
-emit_dc_cigdpapa_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_cigdpapa_r(dst)) }
+emit_dc_cigdpapa_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_cigdpapa_r(dst)) }
 inst_tlbi_paall_none          :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_PAALL) }
-emit_tlbi_paall_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_paall_none()) }
+emit_tlbi_paall_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_paall_none()) }
 inst_tlbi_paallos_none        :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_PAALLOS) }
-emit_tlbi_paallos_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_paallos_none()) }
+emit_tlbi_paallos_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_paallos_none()) }
 inst_amx_ldx_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_LDX, dst) }
-emit_amx_ldx_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_ldx_r(dst)) }
+emit_amx_ldx_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_ldx_r(dst)) }
 inst_amx_ldy_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_LDY, dst) }
-emit_amx_ldy_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_ldy_r(dst)) }
+emit_amx_ldy_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_ldy_r(dst)) }
 inst_amx_stx_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_STX, dst) }
-emit_amx_stx_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_stx_r(dst)) }
+emit_amx_stx_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_stx_r(dst)) }
 inst_amx_sty_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_STY, dst) }
-emit_amx_sty_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_sty_r(dst)) }
+emit_amx_sty_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_sty_r(dst)) }
 inst_amx_ldz_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_LDZ, dst) }
-emit_amx_ldz_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_ldz_r(dst)) }
+emit_amx_ldz_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_ldz_r(dst)) }
 inst_amx_stz_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_STZ, dst) }
-emit_amx_stz_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_stz_r(dst)) }
+emit_amx_stz_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_stz_r(dst)) }
 inst_amx_ldzi_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_LDZI, dst) }
-emit_amx_ldzi_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_ldzi_r(dst)) }
+emit_amx_ldzi_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_ldzi_r(dst)) }
 inst_amx_stzi_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_STZI, dst) }
-emit_amx_stzi_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_stzi_r(dst)) }
+emit_amx_stzi_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_stzi_r(dst)) }
 inst_amx_extrx_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_EXTRX, dst) }
-emit_amx_extrx_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_extrx_r(dst)) }
+emit_amx_extrx_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_extrx_r(dst)) }
 inst_amx_extry_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_EXTRY, dst) }
-emit_amx_extry_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_extry_r(dst)) }
+emit_amx_extry_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_extry_r(dst)) }
 inst_amx_fma64_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_FMA64, dst) }
-emit_amx_fma64_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_fma64_r(dst)) }
+emit_amx_fma64_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_fma64_r(dst)) }
 inst_amx_fms64_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_FMS64, dst) }
-emit_amx_fms64_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_fms64_r(dst)) }
+emit_amx_fms64_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_fms64_r(dst)) }
 inst_amx_fma32_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_FMA32, dst) }
-emit_amx_fma32_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_fma32_r(dst)) }
+emit_amx_fma32_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_fma32_r(dst)) }
 inst_amx_fms32_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_FMS32, dst) }
-emit_amx_fms32_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_fms32_r(dst)) }
+emit_amx_fms32_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_fms32_r(dst)) }
 inst_amx_mac16_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_MAC16, dst) }
-emit_amx_mac16_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_mac16_r(dst)) }
+emit_amx_mac16_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_mac16_r(dst)) }
 inst_amx_fma16_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_FMA16, dst) }
-emit_amx_fma16_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_fma16_r(dst)) }
+emit_amx_fma16_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_fma16_r(dst)) }
 inst_amx_fms16_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_FMS16, dst) }
-emit_amx_fms16_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_fms16_r(dst)) }
+emit_amx_fms16_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_fms16_r(dst)) }
 inst_amx_set_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.AMX_SET) }
-emit_amx_set_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_amx_set_none()) }
+emit_amx_set_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_amx_set_none()) }
 inst_amx_clr_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.AMX_CLR) }
-emit_amx_clr_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_amx_clr_none()) }
+emit_amx_clr_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_amx_clr_none()) }
 inst_amx_vecint_r             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_VECINT, dst) }
-emit_amx_vecint_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_vecint_r(dst)) }
+emit_amx_vecint_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_vecint_r(dst)) }
 inst_amx_vecfp_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_VECFP, dst) }
-emit_amx_vecfp_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_vecfp_r(dst)) }
+emit_amx_vecfp_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_vecfp_r(dst)) }
 inst_amx_matint_r             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_MATINT, dst) }
-emit_amx_matint_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_matint_r(dst)) }
+emit_amx_matint_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_matint_r(dst)) }
 inst_amx_matfp_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_MATFP, dst) }
-emit_amx_matfp_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_matfp_r(dst)) }
+emit_amx_matfp_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_matfp_r(dst)) }
 inst_amx_genlut_r             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AMX_GENLUT, dst) }
-emit_amx_genlut_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_amx_genlut_r(dst)) }
+emit_amx_genlut_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_amx_genlut_r(dst)) }
 inst_cpyp_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CPYP, dst, src, src2) }
-emit_cpyp_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cpyp_r_r_r(dst, src, src2)) }
+emit_cpyp_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cpyp_r_r_r(dst, src, src2)) }
 inst_cpym_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CPYM, dst, src, src2) }
-emit_cpym_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cpym_r_r_r(dst, src, src2)) }
+emit_cpym_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cpym_r_r_r(dst, src, src2)) }
 inst_cpye_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CPYE, dst, src, src2) }
-emit_cpye_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cpye_r_r_r(dst, src, src2)) }
+emit_cpye_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cpye_r_r_r(dst, src, src2)) }
 inst_cpyfp_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CPYFP, dst, src, src2) }
-emit_cpyfp_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cpyfp_r_r_r(dst, src, src2)) }
+emit_cpyfp_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cpyfp_r_r_r(dst, src, src2)) }
 inst_cpyfm_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CPYFM, dst, src, src2) }
-emit_cpyfm_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cpyfm_r_r_r(dst, src, src2)) }
+emit_cpyfm_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cpyfm_r_r_r(dst, src, src2)) }
 inst_cpyfe_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.CPYFE, dst, src, src2) }
-emit_cpyfe_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cpyfe_r_r_r(dst, src, src2)) }
+emit_cpyfe_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cpyfe_r_r_r(dst, src, src2)) }
 inst_setp_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SETP, dst, src, src2) }
-emit_setp_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_setp_r_r_r(dst, src, src2)) }
+emit_setp_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_setp_r_r_r(dst, src, src2)) }
 inst_setm_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SETM, dst, src, src2) }
-emit_setm_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_setm_r_r_r(dst, src, src2)) }
+emit_setm_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_setm_r_r_r(dst, src, src2)) }
 inst_sete_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return inst_r_r_r(.SETE, dst, src, src2) }
-emit_sete_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sete_r_r_r(dst, src, src2)) }
+emit_sete_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sete_r_r_r(dst, src, src2)) }
 inst_dc_ivac_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_IVAC, dst) }
-emit_dc_ivac_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_ivac_r(dst)) }
+emit_dc_ivac_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_ivac_r(dst)) }
 inst_dc_isw_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_ISW, dst) }
-emit_dc_isw_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_isw_r(dst)) }
+emit_dc_isw_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_isw_r(dst)) }
 inst_dc_csw_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_CSW, dst) }
-emit_dc_csw_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_csw_r(dst)) }
+emit_dc_csw_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_csw_r(dst)) }
 inst_dc_cisw_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_CISW, dst) }
-emit_dc_cisw_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_cisw_r(dst)) }
+emit_dc_cisw_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_cisw_r(dst)) }
 inst_dc_zva_r                 :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_ZVA, dst) }
-emit_dc_zva_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_zva_r(dst)) }
+emit_dc_zva_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_zva_r(dst)) }
 inst_dc_cvac_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_CVAC, dst) }
-emit_dc_cvac_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_cvac_r(dst)) }
+emit_dc_cvac_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_cvac_r(dst)) }
 inst_dc_cvau_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_CVAU, dst) }
-emit_dc_cvau_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_cvau_r(dst)) }
+emit_dc_cvau_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_cvau_r(dst)) }
 inst_dc_civac_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.DC_CIVAC, dst) }
-emit_dc_civac_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_dc_civac_r(dst)) }
+emit_dc_civac_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_dc_civac_r(dst)) }
 inst_ic_ialluis_none          :: #force_inline proc "contextless" () -> Instruction { return inst_none(.IC_IALLUIS) }
-emit_ic_ialluis_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ic_ialluis_none()) }
+emit_ic_ialluis_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ic_ialluis_none()) }
 inst_ic_iallu_none            :: #force_inline proc "contextless" () -> Instruction { return inst_none(.IC_IALLU) }
-emit_ic_iallu_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ic_iallu_none()) }
+emit_ic_iallu_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ic_iallu_none()) }
 inst_ic_ivau_r                :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.IC_IVAU, dst) }
-emit_ic_ivau_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_ic_ivau_r(dst)) }
+emit_ic_ivau_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_ic_ivau_r(dst)) }
 inst_at_s1e1r_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E1R, dst) }
-emit_at_s1e1r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e1r_r(dst)) }
+emit_at_s1e1r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e1r_r(dst)) }
 inst_at_s1e1w_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E1W, dst) }
-emit_at_s1e1w_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e1w_r(dst)) }
+emit_at_s1e1w_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e1w_r(dst)) }
 inst_at_s1e0r_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E0R, dst) }
-emit_at_s1e0r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e0r_r(dst)) }
+emit_at_s1e0r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e0r_r(dst)) }
 inst_at_s1e0w_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E0W, dst) }
-emit_at_s1e0w_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e0w_r(dst)) }
+emit_at_s1e0w_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e0w_r(dst)) }
 inst_at_s1e2r_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E2R, dst) }
-emit_at_s1e2r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e2r_r(dst)) }
+emit_at_s1e2r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e2r_r(dst)) }
 inst_at_s1e2w_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E2W, dst) }
-emit_at_s1e2w_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e2w_r(dst)) }
+emit_at_s1e2w_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e2w_r(dst)) }
 inst_at_s1e3r_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E3R, dst) }
-emit_at_s1e3r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e3r_r(dst)) }
+emit_at_s1e3r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e3r_r(dst)) }
 inst_at_s1e3w_r               :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S1E3W, dst) }
-emit_at_s1e3w_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s1e3w_r(dst)) }
+emit_at_s1e3w_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s1e3w_r(dst)) }
 inst_at_s12e1r_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S12E1R, dst) }
-emit_at_s12e1r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s12e1r_r(dst)) }
+emit_at_s12e1r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s12e1r_r(dst)) }
 inst_at_s12e1w_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S12E1W, dst) }
-emit_at_s12e1w_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s12e1w_r(dst)) }
+emit_at_s12e1w_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s12e1w_r(dst)) }
 inst_at_s12e0r_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S12E0R, dst) }
-emit_at_s12e0r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s12e0r_r(dst)) }
+emit_at_s12e0r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s12e0r_r(dst)) }
 inst_at_s12e0w_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.AT_S12E0W, dst) }
-emit_at_s12e0w_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_at_s12e0w_r(dst)) }
+emit_at_s12e0w_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_at_s12e0w_r(dst)) }
 inst_tlbi_vmalle1_none        :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_VMALLE1) }
-emit_tlbi_vmalle1_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_vmalle1_none()) }
+emit_tlbi_vmalle1_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_vmalle1_none()) }
 inst_tlbi_vmalle1is_none      :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_VMALLE1IS) }
-emit_tlbi_vmalle1is_none      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_vmalle1is_none()) }
+emit_tlbi_vmalle1is_none      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_vmalle1is_none()) }
 inst_tlbi_vae1_r              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_VAE1, dst) }
-emit_tlbi_vae1_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_vae1_r(dst)) }
+emit_tlbi_vae1_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_vae1_r(dst)) }
 inst_tlbi_vae1is_r            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_VAE1IS, dst) }
-emit_tlbi_vae1is_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_vae1is_r(dst)) }
+emit_tlbi_vae1is_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_vae1is_r(dst)) }
 inst_tlbi_aside1_r            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_ASIDE1, dst) }
-emit_tlbi_aside1_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_aside1_r(dst)) }
+emit_tlbi_aside1_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_aside1_r(dst)) }
 inst_tlbi_aside1is_r          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_ASIDE1IS, dst) }
-emit_tlbi_aside1is_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_aside1is_r(dst)) }
+emit_tlbi_aside1is_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_aside1is_r(dst)) }
 inst_tlbi_vaae1_r             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_VAAE1, dst) }
-emit_tlbi_vaae1_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_vaae1_r(dst)) }
+emit_tlbi_vaae1_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_vaae1_r(dst)) }
 inst_tlbi_vaae1is_r           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_VAAE1IS, dst) }
-emit_tlbi_vaae1is_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_vaae1is_r(dst)) }
+emit_tlbi_vaae1is_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_vaae1is_r(dst)) }
 inst_tlbi_vale1_r             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_VALE1, dst) }
-emit_tlbi_vale1_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_vale1_r(dst)) }
+emit_tlbi_vale1_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_vale1_r(dst)) }
 inst_tlbi_vale1is_r           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_VALE1IS, dst) }
-emit_tlbi_vale1is_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_vale1is_r(dst)) }
+emit_tlbi_vale1is_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_vale1is_r(dst)) }
 inst_tlbi_vaale1_r            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_VAALE1, dst) }
-emit_tlbi_vaale1_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_vaale1_r(dst)) }
+emit_tlbi_vaale1_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_vaale1_r(dst)) }
 inst_tlbi_vaale1is_r          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return inst_r(.TLBI_VAALE1IS, dst) }
-emit_tlbi_vaale1is_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbi_vaale1is_r(dst)) }
+emit_tlbi_vaale1is_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbi_vaale1is_r(dst)) }
 inst_tlbi_alle1_none          :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_ALLE1) }
-emit_tlbi_alle1_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_alle1_none()) }
+emit_tlbi_alle1_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_alle1_none()) }
 inst_tlbi_alle1is_none        :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_ALLE1IS) }
-emit_tlbi_alle1is_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_alle1is_none()) }
+emit_tlbi_alle1is_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_alle1is_none()) }
 inst_tlbi_alle2_none          :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_ALLE2) }
-emit_tlbi_alle2_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_alle2_none()) }
+emit_tlbi_alle2_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_alle2_none()) }
 inst_tlbi_alle2is_none        :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_ALLE2IS) }
-emit_tlbi_alle2is_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_alle2is_none()) }
+emit_tlbi_alle2is_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_alle2is_none()) }
 inst_tlbi_alle3_none          :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_ALLE3) }
-emit_tlbi_alle3_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_alle3_none()) }
+emit_tlbi_alle3_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_alle3_none()) }
 inst_tlbi_alle3is_none        :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TLBI_ALLE3IS) }
-emit_tlbi_alle3is_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbi_alle3is_none()) }
+emit_tlbi_alle3is_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbi_alle3is_none()) }
 inst_prfm_i_m                 :: #force_inline proc "contextless" (imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .PRFM, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_mem(mem), {}, {}, {}}} }
 inst_prfm_i_l                 :: #force_inline proc "contextless" (imm: i64, label: u32) -> Instruction { return Instruction{mnemonic = .PRFM, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(label, 4), {}, {}, {}}} }
-emit_prfm_i_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append(instructions, inst_prfm_i_m(imm, mem)) }
-emit_prfm_i_l                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, label: u32) { append(instructions, inst_prfm_i_l(imm, label)) }
+emit_prfm_i_m                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append_elem(instructions, inst_prfm_i_m(imm, mem)) }
+emit_prfm_i_l                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, label: u32) { append_elem(instructions, inst_prfm_i_l(imm, label)) }
 inst_prfum_i_m                :: #force_inline proc "contextless" (imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .PRFUM, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_mem(mem), {}, {}, {}}} }
-emit_prfum_i_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append(instructions, inst_prfum_i_m(imm, mem)) }
+emit_prfum_i_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append_elem(instructions, inst_prfum_i_m(imm, mem)) }
 inst_negs_r_sh                :: #force_inline proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction { return Instruction{mnemonic = .NEGS, operand_count = 2, length = 4, ops = {op_reg(dst), op_shifted(src, src_shift, src_amount), {}, {}, {}}} }
-emit_negs_r_sh                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append(instructions, inst_negs_r_sh(dst, src, src_shift, src_amount)) }
+emit_negs_r_sh                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append_elem(instructions, inst_negs_r_sh(dst, src, src_shift, src_amount)) }
 inst_cmp_r_sh                 :: #force_inline proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction { return Instruction{mnemonic = .CMP, operand_count = 2, length = 4, ops = {op_reg(dst), op_shifted(src, src_shift, src_amount), {}, {}, {}}} }
 inst_cmp_r_ex                 :: #force_inline proc "contextless" (dst: Register, src: Register, src_ext: Extend, src_amount: u8) -> Instruction { return Instruction{mnemonic = .CMP, operand_count = 2, length = 4, ops = {op_reg(dst), op_extended(src, src_ext, src_amount), {}, {}, {}}} }
 inst_cmp_r_i                  :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return inst_r_i(.CMP, dst, imm) }
-emit_cmp_r_sh                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append(instructions, inst_cmp_r_sh(dst, src, src_shift, src_amount)) }
-emit_cmp_r_ex                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_ext: Extend, src_amount: u8) { append(instructions, inst_cmp_r_ex(dst, src, src_ext, src_amount)) }
-emit_cmp_r_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_cmp_r_i(dst, imm)) }
+emit_cmp_r_sh                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append_elem(instructions, inst_cmp_r_sh(dst, src, src_shift, src_amount)) }
+emit_cmp_r_ex                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_ext: Extend, src_amount: u8) { append_elem(instructions, inst_cmp_r_ex(dst, src, src_ext, src_amount)) }
+emit_cmp_r_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_cmp_r_i(dst, imm)) }
 inst_cmn_r_sh                 :: #force_inline proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction { return Instruction{mnemonic = .CMN, operand_count = 2, length = 4, ops = {op_reg(dst), op_shifted(src, src_shift, src_amount), {}, {}, {}}} }
 inst_cmn_r_ex                 :: #force_inline proc "contextless" (dst: Register, src: Register, src_ext: Extend, src_amount: u8) -> Instruction { return Instruction{mnemonic = .CMN, operand_count = 2, length = 4, ops = {op_reg(dst), op_extended(src, src_ext, src_amount), {}, {}, {}}} }
 inst_cmn_r_i                  :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return inst_r_i(.CMN, dst, imm) }
-emit_cmn_r_sh                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append(instructions, inst_cmn_r_sh(dst, src, src_shift, src_amount)) }
-emit_cmn_r_ex                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_ext: Extend, src_amount: u8) { append(instructions, inst_cmn_r_ex(dst, src, src_ext, src_amount)) }
-emit_cmn_r_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_cmn_r_i(dst, imm)) }
+emit_cmn_r_sh                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) { append_elem(instructions, inst_cmn_r_sh(dst, src, src_shift, src_amount)) }
+emit_cmn_r_ex                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_ext: Extend, src_amount: u8) { append_elem(instructions, inst_cmn_r_ex(dst, src, src_ext, src_amount)) }
+emit_cmn_r_i                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_cmn_r_i(dst, imm)) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/arm64/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/arm64/tools/gen_mnemonic_builders.odin
index 17943cd22..c97c3e37c 100644
--- a/core/rexcode/isa/arm64/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/arm64/tools/gen_mnemonic_builders.odin
@@ -686,7 +686,7 @@ write_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
 	for n := pad - len(entry.proc_name); n > 0; n -= 1 { strings.write_byte(sb, ' ') }
 	strings.write_string(sb, " :: #force_inline proc(")
 	strings.write_string(sb, strings.to_string(pstr))
-	strings.write_string(sb, ") { append(instructions, ")
+	strings.write_string(sb, ") { append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_byte(sb, '(')
 	strings.write_string(sb, strings.to_string(astr))
diff --git a/core/rexcode/isa/mips/mnemonic_builders.odin b/core/rexcode/isa/mips/mnemonic_builders.odin
index 530a901f9..ed24a2ed9 100644
--- a/core/rexcode/isa/mips/mnemonic_builders.odin
+++ b/core/rexcode/isa/mips/mnemonic_builders.odin
@@ -29,2061 +29,2061 @@ package rexcode_mips
 // =============================================================================
 
 inst_add_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_add_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_add_r_r_r(dst, src, src2)) }
+emit_add_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_add_r_r_r(dst, src, src2)) }
 inst_addu_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addu_r_r_r(dst, src, src2)) }
+emit_addu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addu_r_r_r(dst, src, src2)) }
 inst_sub_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_sub_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_sub_r_r_r(dst, src, src2)) }
+emit_sub_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_sub_r_r_r(dst, src, src2)) }
 inst_subu_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUBU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_subu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_subu_r_r_r(dst, src, src2)) }
+emit_subu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_subu_r_r_r(dst, src, src2)) }
 inst_mult_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MULT, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_mult_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_mult_r_r(dst, src)) }
+emit_mult_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_mult_r_r(dst, src)) }
 inst_multu_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MULTU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_multu_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_multu_r_r(dst, src)) }
+emit_multu_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_multu_r_r(dst, src)) }
 inst_div_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DIV, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
 inst_div_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DIV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_div_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_div_r_r(dst, src)) }
-emit_div_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_div_r_r_r(dst, src, src2)) }
+emit_div_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_div_r_r(dst, src)) }
+emit_div_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_div_r_r_r(dst, src, src2)) }
 inst_divu_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DIVU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
 inst_divu_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DIVU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_divu_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_divu_r_r(dst, src)) }
-emit_divu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_divu_r_r_r(dst, src, src2)) }
+emit_divu_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_divu_r_r(dst, src)) }
+emit_divu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_divu_r_r_r(dst, src, src2)) }
 inst_mfhi_r                :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MFHI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mfhi_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mfhi_r(dst)) }
+emit_mfhi_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mfhi_r(dst)) }
 inst_mflo_r                :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MFLO, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mflo_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mflo_r(dst)) }
+emit_mflo_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mflo_r(dst)) }
 inst_mthi_r                :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MTHI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mthi_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mthi_r(dst)) }
+emit_mthi_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mthi_r(dst)) }
 inst_mtlo_r                :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MTLO, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mtlo_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mtlo_r(dst)) }
+emit_mtlo_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mtlo_r(dst)) }
 inst_and_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_and_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_and_r_r_r(dst, src, src2)) }
+emit_and_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_and_r_r_r(dst, src, src2)) }
 inst_or_r_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .OR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_or_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_or_r_r_r(dst, src, src2)) }
+emit_or_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_or_r_r_r(dst, src, src2)) }
 inst_xor_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .XOR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_xor_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_xor_r_r_r(dst, src, src2)) }
+emit_xor_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_xor_r_r_r(dst, src, src2)) }
 inst_nor_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .NOR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_nor_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_nor_r_r_r(dst, src, src2)) }
+emit_nor_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_nor_r_r_r(dst, src, src2)) }
 inst_slt_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SLT, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_slt_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_slt_r_r_r(dst, src, src2)) }
+emit_slt_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_slt_r_r_r(dst, src, src2)) }
 inst_sltu_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SLTU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_sltu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_sltu_r_r_r(dst, src, src2)) }
+emit_sltu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_sltu_r_r_r(dst, src, src2)) }
 inst_sll_r_r_i5            :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SLL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_sll_r_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_sll_r_r_i5(dst, src, imm)) }
+emit_sll_r_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_sll_r_r_i5(dst, src, imm)) }
 inst_srl_r_r_i5            :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SRL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_srl_r_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_srl_r_r_i5(dst, src, imm)) }
+emit_srl_r_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_srl_r_r_i5(dst, src, imm)) }
 inst_sra_r_r_i5            :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SRA, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_sra_r_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_sra_r_r_i5(dst, src, imm)) }
+emit_sra_r_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_sra_r_r_i5(dst, src, imm)) }
 inst_sllv_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SLLV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_sllv_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_sllv_r_r_r(dst, src, src2)) }
+emit_sllv_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_sllv_r_r_r(dst, src, src2)) }
 inst_srlv_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SRLV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_srlv_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_srlv_r_r_r(dst, src, src2)) }
+emit_srlv_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_srlv_r_r_r(dst, src, src2)) }
 inst_srav_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SRAV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_srav_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_srav_r_r_r(dst, src, src2)) }
+emit_srav_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_srav_r_r_r(dst, src, src2)) }
 inst_addi_r_r_i16          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDI, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_addi_r_r_i16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_addi_r_r_i16(dst, src, imm)) }
+emit_addi_r_r_i16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_addi_r_r_i16(dst, src, imm)) }
 inst_addiu_r_r_i16         :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDIU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_addiu_r_r_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_addiu_r_r_i16(dst, src, imm)) }
+emit_addiu_r_r_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_addiu_r_r_i16(dst, src, imm)) }
 inst_slti_r_r_i16          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SLTI, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_slti_r_r_i16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_slti_r_r_i16(dst, src, imm)) }
+emit_slti_r_r_i16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_slti_r_r_i16(dst, src, imm)) }
 inst_sltiu_r_r_i16         :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SLTIU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_sltiu_r_r_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_sltiu_r_r_i16(dst, src, imm)) }
+emit_sltiu_r_r_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_sltiu_r_r_i16(dst, src, imm)) }
 inst_andi_r_r_u16          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ANDI, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_andi_r_r_u16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_andi_r_r_u16(dst, src, imm)) }
+emit_andi_r_r_u16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_andi_r_r_u16(dst, src, imm)) }
 inst_ori_r_r_u16           :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ORI, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_ori_r_r_u16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_ori_r_r_u16(dst, src, imm)) }
+emit_ori_r_r_u16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_ori_r_r_u16(dst, src, imm)) }
 inst_xori_r_r_u16          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .XORI, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_xori_r_r_u16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_xori_r_r_u16(dst, src, imm)) }
+emit_xori_r_r_u16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_xori_r_r_u16(dst, src, imm)) }
 inst_lui_r_u16             :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .LUI, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_lui_r_u16             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_lui_r_u16(dst, imm)) }
+emit_lui_r_u16             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_lui_r_u16(dst, imm)) }
 inst_beq_r_r_rel           :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BEQ, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_beq_r_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_beq_r_r_rel(dst, src, target)) }
+emit_beq_r_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_beq_r_r_rel(dst, src, target)) }
 inst_bne_r_r_rel           :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BNE, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_bne_r_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bne_r_r_rel(dst, src, target)) }
+emit_bne_r_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_bne_r_r_rel(dst, src, target)) }
 inst_blez_r_rel            :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLEZ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_blez_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_blez_r_rel(dst, target)) }
+emit_blez_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_blez_r_rel(dst, target)) }
 inst_bgtz_r_rel            :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGTZ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bgtz_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgtz_r_rel(dst, target)) }
+emit_bgtz_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bgtz_r_rel(dst, target)) }
 inst_bltz_r_rel            :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTZ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bltz_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bltz_r_rel(dst, target)) }
+emit_bltz_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bltz_r_rel(dst, target)) }
 inst_bgez_r_rel            :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEZ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bgez_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgez_r_rel(dst, target)) }
+emit_bgez_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bgez_r_rel(dst, target)) }
 inst_bltzal_r_rel          :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTZAL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bltzal_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bltzal_r_rel(dst, target)) }
+emit_bltzal_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bltzal_r_rel(dst, target)) }
 inst_bgezal_r_rel          :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEZAL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bgezal_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgezal_r_rel(dst, target)) }
+emit_bgezal_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bgezal_r_rel(dst, target)) }
 inst_j_j                   :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .J, operand_count = 1, length = 4, ops = {op_label(target), {}, {}, {}}} }
-emit_j_j                   :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_j_j(target)) }
+emit_j_j                   :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_j_j(target)) }
 inst_jal_j                 :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .JAL, operand_count = 1, length = 4, ops = {op_label(target), {}, {}, {}}} }
-emit_jal_j                 :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_jal_j(target)) }
+emit_jal_j                 :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_jal_j(target)) }
 inst_jr_r                  :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .JR, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_jr_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_jr_r(dst)) }
+emit_jr_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_jr_r(dst)) }
 inst_jalr_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .JALR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_jalr_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_jalr_r_r(dst, src)) }
+emit_jalr_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_jalr_r_r(dst, src)) }
 inst_lb_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lb_r_m(dst, mem)) }
+emit_lb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lb_r_m(dst, mem)) }
 inst_lh_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lh_r_m(dst, mem)) }
+emit_lh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lh_r_m(dst, mem)) }
 inst_lw_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lw_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lw_r_m(dst, mem)) }
+emit_lw_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lw_r_m(dst, mem)) }
 inst_lbu_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LBU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lbu_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lbu_r_m(dst, mem)) }
+emit_lbu_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lbu_r_m(dst, mem)) }
 inst_lhu_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LHU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lhu_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lhu_r_m(dst, mem)) }
+emit_lhu_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lhu_r_m(dst, mem)) }
 inst_lwl_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LWL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lwl_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lwl_r_m(dst, mem)) }
+emit_lwl_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lwl_r_m(dst, mem)) }
 inst_lwr_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LWR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lwr_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lwr_r_m(dst, mem)) }
+emit_lwr_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lwr_r_m(dst, mem)) }
 inst_sb_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_sb_r_m(dst, mem)) }
+emit_sb_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_sb_r_m(dst, mem)) }
 inst_sh_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_sh_r_m(dst, mem)) }
+emit_sh_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_sh_r_m(dst, mem)) }
 inst_sw_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sw_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_sw_r_m(dst, mem)) }
+emit_sw_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_sw_r_m(dst, mem)) }
 inst_swl_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SWL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_swl_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_swl_r_m(dst, mem)) }
+emit_swl_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_swl_r_m(dst, mem)) }
 inst_swr_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SWR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_swr_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_swr_r_m(dst, mem)) }
+emit_swr_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_swr_r_m(dst, mem)) }
 inst_syscall_i20           :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SYSCALL, operand_count = 1, length = 4, ops = {op_imm(imm, 4), {}, {}, {}}} }
-emit_syscall_i20           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_syscall_i20(imm)) }
+emit_syscall_i20           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_syscall_i20(imm)) }
 inst_break_i20             :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .BREAK, operand_count = 1, length = 4, ops = {op_imm(imm, 4), {}, {}, {}}} }
-emit_break_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_break_i20(imm)) }
+emit_break_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_break_i20(imm)) }
 inst_nop_none              :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NOP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_nop_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nop_none()) }
+emit_nop_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nop_none()) }
 inst_ll_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_ll_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_ll_r_m(dst, mem)) }
+emit_ll_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_ll_r_m(dst, mem)) }
 inst_sc_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sc_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_sc_r_m(dst, mem)) }
+emit_sc_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_sc_r_m(dst, mem)) }
 inst_sync_i5               :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SYNC, operand_count = 1, length = 4, ops = {op_imm(imm, 1), {}, {}, {}}} }
-emit_sync_i5               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_sync_i5(imm)) }
+emit_sync_i5               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_sync_i5(imm)) }
 inst_tgei_r_i16            :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .TGEI, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_tgei_r_i16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_tgei_r_i16(dst, imm)) }
+emit_tgei_r_i16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_tgei_r_i16(dst, imm)) }
 inst_tgeiu_r_i16           :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .TGEIU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_tgeiu_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_tgeiu_r_i16(dst, imm)) }
+emit_tgeiu_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_tgeiu_r_i16(dst, imm)) }
 inst_tlti_r_i16            :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .TLTI, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_tlti_r_i16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_tlti_r_i16(dst, imm)) }
+emit_tlti_r_i16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_tlti_r_i16(dst, imm)) }
 inst_tltiu_r_i16           :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .TLTIU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_tltiu_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_tltiu_r_i16(dst, imm)) }
+emit_tltiu_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_tltiu_r_i16(dst, imm)) }
 inst_teqi_r_i16            :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .TEQI, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_teqi_r_i16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_teqi_r_i16(dst, imm)) }
+emit_teqi_r_i16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_teqi_r_i16(dst, imm)) }
 inst_tnei_r_i16            :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .TNEI, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_tnei_r_i16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_tnei_r_i16(dst, imm)) }
+emit_tnei_r_i16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_tnei_r_i16(dst, imm)) }
 inst_tge_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .TGE, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_tge_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_tge_r_r(dst, src)) }
+emit_tge_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_tge_r_r(dst, src)) }
 inst_tgeu_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .TGEU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_tgeu_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_tgeu_r_r(dst, src)) }
+emit_tgeu_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_tgeu_r_r(dst, src)) }
 inst_tlt_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .TLT, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_tlt_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_tlt_r_r(dst, src)) }
+emit_tlt_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_tlt_r_r(dst, src)) }
 inst_tltu_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .TLTU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_tltu_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_tltu_r_r(dst, src)) }
+emit_tltu_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_tltu_r_r(dst, src)) }
 inst_teq_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .TEQ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_teq_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_teq_r_r(dst, src)) }
+emit_teq_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_teq_r_r(dst, src)) }
 inst_tne_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .TNE, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_tne_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_tne_r_r(dst, src)) }
+emit_tne_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_tne_r_r(dst, src)) }
 inst_beql_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BEQL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_beql_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_beql_r_r_rel(dst, src, target)) }
+emit_beql_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_beql_r_r_rel(dst, src, target)) }
 inst_bnel_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BNEL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_bnel_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bnel_r_r_rel(dst, src, target)) }
+emit_bnel_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_bnel_r_r_rel(dst, src, target)) }
 inst_blezl_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLEZL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_blezl_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_blezl_r_rel(dst, target)) }
+emit_blezl_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_blezl_r_rel(dst, target)) }
 inst_bgtzl_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGTZL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bgtzl_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgtzl_r_rel(dst, target)) }
+emit_bgtzl_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bgtzl_r_rel(dst, target)) }
 inst_bltzl_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTZL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bltzl_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bltzl_r_rel(dst, target)) }
+emit_bltzl_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bltzl_r_rel(dst, target)) }
 inst_bgezl_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEZL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bgezl_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgezl_r_rel(dst, target)) }
+emit_bgezl_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bgezl_r_rel(dst, target)) }
 inst_bltzall_r_rel         :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTZALL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bltzall_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bltzall_r_rel(dst, target)) }
+emit_bltzall_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bltzall_r_rel(dst, target)) }
 inst_bgezall_r_rel         :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEZALL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bgezall_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgezall_r_rel(dst, target)) }
+emit_bgezall_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bgezall_r_rel(dst, target)) }
 inst_dadd_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DADD, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dadd_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dadd_r_r_r(dst, src, src2)) }
+emit_dadd_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dadd_r_r_r(dst, src, src2)) }
 inst_daddu_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DADDU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_daddu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_daddu_r_r_r(dst, src, src2)) }
+emit_daddu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_daddu_r_r_r(dst, src, src2)) }
 inst_dsub_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DSUB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dsub_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dsub_r_r_r(dst, src, src2)) }
+emit_dsub_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dsub_r_r_r(dst, src, src2)) }
 inst_dsubu_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DSUBU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dsubu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dsubu_r_r_r(dst, src, src2)) }
+emit_dsubu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dsubu_r_r_r(dst, src, src2)) }
 inst_daddi_r_r_i16         :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DADDI, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_daddi_r_r_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_daddi_r_r_i16(dst, src, imm)) }
+emit_daddi_r_r_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_daddi_r_r_i16(dst, src, imm)) }
 inst_daddiu_r_r_i16        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DADDIU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_daddiu_r_r_i16        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_daddiu_r_r_i16(dst, src, imm)) }
+emit_daddiu_r_r_i16        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_daddiu_r_r_i16(dst, src, imm)) }
 inst_dmult_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DMULT, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_dmult_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_dmult_r_r(dst, src)) }
+emit_dmult_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_dmult_r_r(dst, src)) }
 inst_dmultu_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DMULTU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_dmultu_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_dmultu_r_r(dst, src)) }
+emit_dmultu_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_dmultu_r_r(dst, src)) }
 inst_ddiv_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DDIV, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
 inst_ddiv_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DDIV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_ddiv_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_ddiv_r_r(dst, src)) }
-emit_ddiv_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_ddiv_r_r_r(dst, src, src2)) }
+emit_ddiv_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_ddiv_r_r(dst, src)) }
+emit_ddiv_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_ddiv_r_r_r(dst, src, src2)) }
 inst_ddivu_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DDIVU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
 inst_ddivu_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DDIVU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_ddivu_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_ddivu_r_r(dst, src)) }
-emit_ddivu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_ddivu_r_r_r(dst, src, src2)) }
+emit_ddivu_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_ddivu_r_r(dst, src)) }
+emit_ddivu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_ddivu_r_r_r(dst, src, src2)) }
 inst_dsll_r_r_i5           :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DSLL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_dsll_r_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_dsll_r_r_i5(dst, src, imm)) }
+emit_dsll_r_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_dsll_r_r_i5(dst, src, imm)) }
 inst_dsrl_r_r_i5           :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DSRL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_dsrl_r_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_dsrl_r_r_i5(dst, src, imm)) }
+emit_dsrl_r_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_dsrl_r_r_i5(dst, src, imm)) }
 inst_dsra_r_r_i5           :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DSRA, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_dsra_r_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_dsra_r_r_i5(dst, src, imm)) }
+emit_dsra_r_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_dsra_r_r_i5(dst, src, imm)) }
 inst_dsllv_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DSLLV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dsllv_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dsllv_r_r_r(dst, src, src2)) }
+emit_dsllv_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dsllv_r_r_r(dst, src, src2)) }
 inst_dsrlv_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DSRLV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dsrlv_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dsrlv_r_r_r(dst, src, src2)) }
+emit_dsrlv_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dsrlv_r_r_r(dst, src, src2)) }
 inst_dsrav_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DSRAV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dsrav_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dsrav_r_r_r(dst, src, src2)) }
+emit_dsrav_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dsrav_r_r_r(dst, src, src2)) }
 inst_dsll32_r_r_i5         :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DSLL32, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_dsll32_r_r_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_dsll32_r_r_i5(dst, src, imm)) }
+emit_dsll32_r_r_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_dsll32_r_r_i5(dst, src, imm)) }
 inst_dsrl32_r_r_i5         :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DSRL32, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_dsrl32_r_r_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_dsrl32_r_r_i5(dst, src, imm)) }
+emit_dsrl32_r_r_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_dsrl32_r_r_i5(dst, src, imm)) }
 inst_dsra32_r_r_i5         :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DSRA32, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_dsra32_r_r_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_dsra32_r_r_i5(dst, src, imm)) }
+emit_dsra32_r_r_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_dsra32_r_r_i5(dst, src, imm)) }
 inst_ld_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_ld_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_ld_r_m(dst, mem)) }
+emit_ld_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_ld_r_m(dst, mem)) }
 inst_ldl_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_ldl_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_ldl_r_m(dst, mem)) }
+emit_ldl_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_ldl_r_m(dst, mem)) }
 inst_ldr_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_ldr_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_ldr_r_m(dst, mem)) }
+emit_ldr_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_ldr_r_m(dst, mem)) }
 inst_lwu_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LWU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lwu_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lwu_r_m(dst, mem)) }
+emit_lwu_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lwu_r_m(dst, mem)) }
 inst_sd_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SD, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sd_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_sd_r_m(dst, mem)) }
+emit_sd_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_sd_r_m(dst, mem)) }
 inst_sdl_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SDL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sdl_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_sdl_r_m(dst, mem)) }
+emit_sdl_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_sdl_r_m(dst, mem)) }
 inst_sdr_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SDR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sdr_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_sdr_r_m(dst, mem)) }
+emit_sdr_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_sdr_r_m(dst, mem)) }
 inst_lld_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LLD, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lld_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lld_r_m(dst, mem)) }
+emit_lld_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lld_r_m(dst, mem)) }
 inst_scd_r_m               :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SCD, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_scd_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_scd_r_m(dst, mem)) }
+emit_scd_r_m               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_scd_r_m(dst, mem)) }
 inst_movn_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_movn_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_movn_r_r_r(dst, src, src2)) }
+emit_movn_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_movn_r_r_r(dst, src, src2)) }
 inst_movz_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVZ, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_movz_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_movz_r_r_r(dst, src, src2)) }
+emit_movz_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_movz_r_r_r(dst, src, src2)) }
 inst_movf_r_r_cc           :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVF, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_movf_r_r_cc           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_movf_r_r_cc(dst, src, imm)) }
+emit_movf_r_r_cc           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_movf_r_r_cc(dst, src, imm)) }
 inst_movt_r_r_cc           :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVT, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_movt_r_r_cc           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_movt_r_r_cc(dst, src, imm)) }
+emit_movt_r_r_cc           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_movt_r_r_cc(dst, src, imm)) }
 inst_pref_i5_m             :: #force_inline proc "contextless" (imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .PREF, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_mem(mem, 4), {}, {}}} }
-emit_pref_i5_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append(instructions, inst_pref_i5_m(imm, mem)) }
+emit_pref_i5_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append_elem(instructions, inst_pref_i5_m(imm, mem)) }
 inst_prefx_i5_r_r          :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PREFX, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_prefx_i5_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_prefx_i5_r_r(imm, dst, src)) }
+emit_prefx_i5_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_prefx_i5_r_r(imm, dst, src)) }
 inst_lwxc1_f_r_r           :: #force_inline proc "contextless" (dst: FPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .LWXC1, operand_count = 3, length = 4, ops = {op_fpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_lwxc1_f_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: GPR, src2: GPR) { append(instructions, inst_lwxc1_f_r_r(dst, src, src2)) }
+emit_lwxc1_f_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: GPR, src2: GPR) { append_elem(instructions, inst_lwxc1_f_r_r(dst, src, src2)) }
 inst_swxc1_f_r_r           :: #force_inline proc "contextless" (dst: FPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SWXC1, operand_count = 3, length = 4, ops = {op_fpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_swxc1_f_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: GPR, src2: GPR) { append(instructions, inst_swxc1_f_r_r(dst, src, src2)) }
+emit_swxc1_f_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: GPR, src2: GPR) { append_elem(instructions, inst_swxc1_f_r_r(dst, src, src2)) }
 inst_ldxc1_f_r_r           :: #force_inline proc "contextless" (dst: FPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .LDXC1, operand_count = 3, length = 4, ops = {op_fpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_ldxc1_f_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: GPR, src2: GPR) { append(instructions, inst_ldxc1_f_r_r(dst, src, src2)) }
+emit_ldxc1_f_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: GPR, src2: GPR) { append_elem(instructions, inst_ldxc1_f_r_r(dst, src, src2)) }
 inst_sdxc1_f_r_r           :: #force_inline proc "contextless" (dst: FPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SDXC1, operand_count = 3, length = 4, ops = {op_fpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_sdxc1_f_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: GPR, src2: GPR) { append(instructions, inst_sdxc1_f_r_r(dst, src, src2)) }
+emit_sdxc1_f_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: GPR, src2: GPR) { append_elem(instructions, inst_sdxc1_f_r_r(dst, src, src2)) }
 inst_clz_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CLZ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_clz_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_clz_r_r(dst, src)) }
+emit_clz_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_clz_r_r(dst, src)) }
 inst_clo_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CLO, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_clo_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_clo_r_r(dst, src)) }
+emit_clo_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_clo_r_r(dst, src)) }
 inst_dclz_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DCLZ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_dclz_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_dclz_r_r(dst, src)) }
+emit_dclz_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_dclz_r_r(dst, src)) }
 inst_dclo_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DCLO, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_dclo_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_dclo_r_r(dst, src)) }
+emit_dclo_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_dclo_r_r(dst, src)) }
 inst_mul_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_mul_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_mul_r_r_r(dst, src, src2)) }
+emit_mul_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_mul_r_r_r(dst, src, src2)) }
 inst_madd_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MADD, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
 inst_madd_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MADD, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_madd_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_madd_r_r(dst, src)) }
-emit_madd_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_madd_r_r_r(dst, src, src2)) }
+emit_madd_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_madd_r_r(dst, src)) }
+emit_madd_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_madd_r_r_r(dst, src, src2)) }
 inst_maddu_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MADDU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
 inst_maddu_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MADDU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_maddu_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_maddu_r_r(dst, src)) }
-emit_maddu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_maddu_r_r_r(dst, src, src2)) }
+emit_maddu_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_maddu_r_r(dst, src)) }
+emit_maddu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_maddu_r_r_r(dst, src, src2)) }
 inst_msub_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MSUB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
 inst_msub_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MSUB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_msub_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_msub_r_r(dst, src)) }
-emit_msub_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_msub_r_r_r(dst, src, src2)) }
+emit_msub_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_msub_r_r(dst, src)) }
+emit_msub_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_msub_r_r_r(dst, src, src2)) }
 inst_msubu_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MSUBU, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
 inst_msubu_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MSUBU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_msubu_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_msubu_r_r(dst, src)) }
-emit_msubu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_msubu_r_r_r(dst, src, src2)) }
+emit_msubu_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_msubu_r_r(dst, src)) }
+emit_msubu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_msubu_r_r_r(dst, src, src2)) }
 inst_sdbbp_i20             :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SDBBP, operand_count = 1, length = 4, ops = {op_imm(imm, 4), {}, {}, {}}} }
-emit_sdbbp_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_sdbbp_i20(imm)) }
+emit_sdbbp_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_sdbbp_i20(imm)) }
 inst_ssnop_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SSNOP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_ssnop_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ssnop_none()) }
+emit_ssnop_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ssnop_none()) }
 inst_ehb_none              :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .EHB, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_ehb_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ehb_none()) }
+emit_ehb_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ehb_none()) }
 inst_pause_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .PAUSE, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_pause_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pause_none()) }
+emit_pause_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pause_none()) }
 inst_ext_r_r_i5_i5         :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXT, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), op_imm(imm2, 1)}} }
-emit_ext_r_r_i5_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append(instructions, inst_ext_r_r_i5_i5(dst, src, imm, imm2)) }
+emit_ext_r_r_i5_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_ext_r_r_i5_i5(dst, src, imm, imm2)) }
 inst_ins_r_r_i5_i5         :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INS, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), op_imm(imm2, 1)}} }
-emit_ins_r_r_i5_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append(instructions, inst_ins_r_r_i5_i5(dst, src, imm, imm2)) }
+emit_ins_r_r_i5_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_ins_r_r_i5_i5(dst, src, imm, imm2)) }
 inst_dext_r_r_i5_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DEXT, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), op_imm(imm2, 1)}} }
-emit_dext_r_r_i5_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append(instructions, inst_dext_r_r_i5_i5(dst, src, imm, imm2)) }
+emit_dext_r_r_i5_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_dext_r_r_i5_i5(dst, src, imm, imm2)) }
 inst_dextm_r_r_i5_i5       :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DEXTM, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), op_imm(imm2, 1)}} }
-emit_dextm_r_r_i5_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append(instructions, inst_dextm_r_r_i5_i5(dst, src, imm, imm2)) }
+emit_dextm_r_r_i5_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_dextm_r_r_i5_i5(dst, src, imm, imm2)) }
 inst_dextu_r_r_i5_i5       :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DEXTU, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), op_imm(imm2, 1)}} }
-emit_dextu_r_r_i5_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append(instructions, inst_dextu_r_r_i5_i5(dst, src, imm, imm2)) }
+emit_dextu_r_r_i5_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_dextu_r_r_i5_i5(dst, src, imm, imm2)) }
 inst_dins_r_r_i5_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DINS, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), op_imm(imm2, 1)}} }
-emit_dins_r_r_i5_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append(instructions, inst_dins_r_r_i5_i5(dst, src, imm, imm2)) }
+emit_dins_r_r_i5_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_dins_r_r_i5_i5(dst, src, imm, imm2)) }
 inst_dinsm_r_r_i5_i5       :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DINSM, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), op_imm(imm2, 1)}} }
-emit_dinsm_r_r_i5_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append(instructions, inst_dinsm_r_r_i5_i5(dst, src, imm, imm2)) }
+emit_dinsm_r_r_i5_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_dinsm_r_r_i5_i5(dst, src, imm, imm2)) }
 inst_dinsu_r_r_i5_i5       :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .DINSU, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), op_imm(imm2, 1)}} }
-emit_dinsu_r_r_i5_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append(instructions, inst_dinsu_r_r_i5_i5(dst, src, imm, imm2)) }
+emit_dinsu_r_r_i5_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_dinsu_r_r_i5_i5(dst, src, imm, imm2)) }
 inst_rotr_r_r_i5           :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ROTR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_rotr_r_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_rotr_r_r_i5(dst, src, imm)) }
+emit_rotr_r_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_rotr_r_r_i5(dst, src, imm)) }
 inst_rotrv_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ROTRV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_rotrv_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_rotrv_r_r_r(dst, src, src2)) }
+emit_rotrv_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_rotrv_r_r_r(dst, src, src2)) }
 inst_drotr_r_r_i5          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DROTR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_drotr_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_drotr_r_r_i5(dst, src, imm)) }
+emit_drotr_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_drotr_r_r_i5(dst, src, imm)) }
 inst_drotrv_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DROTRV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_drotrv_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_drotrv_r_r_r(dst, src, src2)) }
+emit_drotrv_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_drotrv_r_r_r(dst, src, src2)) }
 inst_drotr32_r_r_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DROTR32, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_drotr32_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_drotr32_r_r_i5(dst, src, imm)) }
+emit_drotr32_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_drotr32_r_r_i5(dst, src, imm)) }
 inst_wsbh_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .WSBH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_wsbh_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_wsbh_r_r(dst, src)) }
+emit_wsbh_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_wsbh_r_r(dst, src)) }
 inst_dsbh_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DSBH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_dsbh_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_dsbh_r_r(dst, src)) }
+emit_dsbh_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_dsbh_r_r(dst, src)) }
 inst_dshd_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DSHD, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_dshd_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_dshd_r_r(dst, src)) }
+emit_dshd_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_dshd_r_r(dst, src)) }
 inst_seb_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .SEB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_seb_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_seb_r_r(dst, src)) }
+emit_seb_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_seb_r_r(dst, src)) }
 inst_seh_r_r               :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .SEH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_seh_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_seh_r_r(dst, src)) }
+emit_seh_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_seh_r_r(dst, src)) }
 inst_rdhwr_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .RDHWR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_rdhwr_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_rdhwr_r_r(dst, src)) }
+emit_rdhwr_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_rdhwr_r_r(dst, src)) }
 inst_rdpgpr_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .RDPGPR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_rdpgpr_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_rdpgpr_r_r(dst, src)) }
+emit_rdpgpr_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_rdpgpr_r_r(dst, src)) }
 inst_wrpgpr_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .WRPGPR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_wrpgpr_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_wrpgpr_r_r(dst, src)) }
+emit_wrpgpr_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_wrpgpr_r_r(dst, src)) }
 inst_di_r                  :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .DI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_di_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_di_r(dst)) }
+emit_di_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_di_r(dst)) }
 inst_ei_r                  :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .EI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_ei_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_ei_r(dst)) }
+emit_ei_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_ei_r(dst)) }
 inst_eret_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .ERET, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_eret_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_eret_none()) }
+emit_eret_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_eret_none()) }
 inst_deret_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DERET, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_deret_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_deret_none()) }
+emit_deret_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_deret_none()) }
 inst_wait_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .WAIT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_wait_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wait_none()) }
+emit_wait_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wait_none()) }
 inst_bc_rel26              :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .BC, operand_count = 1, length = 4, ops = {op_label(target), {}, {}, {}}} }
-emit_bc_rel26              :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_bc_rel26(target)) }
+emit_bc_rel26              :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_bc_rel26(target)) }
 inst_balc_rel26            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .BALC, operand_count = 1, length = 4, ops = {op_label(target), {}, {}, {}}} }
-emit_balc_rel26            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_balc_rel26(target)) }
+emit_balc_rel26            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_balc_rel26(target)) }
 inst_beqc_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BEQC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_beqc_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_beqc_r_r_rel(dst, src, target)) }
+emit_beqc_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_beqc_r_r_rel(dst, src, target)) }
 inst_bnec_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BNEC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_bnec_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bnec_r_r_rel(dst, src, target)) }
+emit_bnec_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_bnec_r_r_rel(dst, src, target)) }
 inst_bltc_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_bltc_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bltc_r_r_rel(dst, src, target)) }
+emit_bltc_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_bltc_r_r_rel(dst, src, target)) }
 inst_bgec_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_bgec_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bgec_r_r_rel(dst, src, target)) }
+emit_bgec_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_bgec_r_r_rel(dst, src, target)) }
 inst_bltuc_r_r_rel         :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTUC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_bltuc_r_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bltuc_r_r_rel(dst, src, target)) }
+emit_bltuc_r_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_bltuc_r_r_rel(dst, src, target)) }
 inst_bgeuc_r_r_rel         :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEUC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
-emit_bgeuc_r_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bgeuc_r_r_rel(dst, src, target)) }
+emit_bgeuc_r_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append_elem(instructions, inst_bgeuc_r_r_rel(dst, src, target)) }
 inst_blezc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLEZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_blezc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_blezc_r_rel(dst, target)) }
+emit_blezc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_blezc_r_rel(dst, target)) }
 inst_bgezc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bgezc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgezc_r_rel(dst, target)) }
+emit_bgezc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bgezc_r_rel(dst, target)) }
 inst_bgtzc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGTZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bgtzc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgtzc_r_rel(dst, target)) }
+emit_bgtzc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bgtzc_r_rel(dst, target)) }
 inst_bltzc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bltzc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bltzc_r_rel(dst, target)) }
+emit_bltzc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bltzc_r_rel(dst, target)) }
 inst_beqzc_r_rel21         :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BEQZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_beqzc_r_rel21         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_beqzc_r_rel21(dst, target)) }
+emit_beqzc_r_rel21         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_beqzc_r_rel21(dst, target)) }
 inst_bnezc_r_rel21         :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BNEZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_bnezc_r_rel21         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bnezc_r_rel21(dst, target)) }
+emit_bnezc_r_rel21         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_bnezc_r_rel21(dst, target)) }
 inst_bc1eqz_f_rel          :: #force_inline proc "contextless" (dst: FPR, target: u32) -> Instruction { return Instruction{mnemonic = .BC1EQZ, operand_count = 2, length = 4, ops = {op_fpr(dst), op_label(target), {}, {}}} }
-emit_bc1eqz_f_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, target: u32) { append(instructions, inst_bc1eqz_f_rel(dst, target)) }
+emit_bc1eqz_f_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, target: u32) { append_elem(instructions, inst_bc1eqz_f_rel(dst, target)) }
 inst_bc1nez_f_rel          :: #force_inline proc "contextless" (dst: FPR, target: u32) -> Instruction { return Instruction{mnemonic = .BC1NEZ, operand_count = 2, length = 4, ops = {op_fpr(dst), op_label(target), {}, {}}} }
-emit_bc1nez_f_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, target: u32) { append(instructions, inst_bc1nez_f_rel(dst, target)) }
+emit_bc1nez_f_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, target: u32) { append_elem(instructions, inst_bc1nez_f_rel(dst, target)) }
 inst_bc2eqz_c2_rel         :: #force_inline proc "contextless" (dst: GTE_DataReg, target: u32) -> Instruction { return Instruction{mnemonic = .BC2EQZ, operand_count = 2, length = 4, ops = {op_gte_data(dst), op_label(target), {}, {}}} }
-emit_bc2eqz_c2_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, target: u32) { append(instructions, inst_bc2eqz_c2_rel(dst, target)) }
+emit_bc2eqz_c2_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, target: u32) { append_elem(instructions, inst_bc2eqz_c2_rel(dst, target)) }
 inst_bc2nez_c2_rel         :: #force_inline proc "contextless" (dst: GTE_DataReg, target: u32) -> Instruction { return Instruction{mnemonic = .BC2NEZ, operand_count = 2, length = 4, ops = {op_gte_data(dst), op_label(target), {}, {}}} }
-emit_bc2nez_c2_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, target: u32) { append(instructions, inst_bc2nez_c2_rel(dst, target)) }
+emit_bc2nez_c2_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, target: u32) { append_elem(instructions, inst_bc2nez_c2_rel(dst, target)) }
 inst_jic_r_i16             :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .JIC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_jic_r_i16             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_jic_r_i16(dst, imm)) }
+emit_jic_r_i16             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_jic_r_i16(dst, imm)) }
 inst_jialc_r_i16           :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .JIALC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_jialc_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_jialc_r_i16(dst, imm)) }
+emit_jialc_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_jialc_r_i16(dst, imm)) }
 inst_muh_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MUH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_muh_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_muh_r_r_r(dst, src, src2)) }
+emit_muh_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_muh_r_r_r(dst, src, src2)) }
 inst_mulu_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MULU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_mulu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_mulu_r_r_r(dst, src, src2)) }
+emit_mulu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_mulu_r_r_r(dst, src, src2)) }
 inst_muhu_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MUHU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_muhu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_muhu_r_r_r(dst, src, src2)) }
+emit_muhu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_muhu_r_r_r(dst, src, src2)) }
 inst_mod_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOD, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_mod_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_mod_r_r_r(dst, src, src2)) }
+emit_mod_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_mod_r_r_r(dst, src, src2)) }
 inst_modu_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MODU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_modu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_modu_r_r_r(dst, src, src2)) }
+emit_modu_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_modu_r_r_r(dst, src, src2)) }
 inst_dmul_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DMUL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dmul_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dmul_r_r_r(dst, src, src2)) }
+emit_dmul_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dmul_r_r_r(dst, src, src2)) }
 inst_dmuh_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DMUH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dmuh_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dmuh_r_r_r(dst, src, src2)) }
+emit_dmuh_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dmuh_r_r_r(dst, src, src2)) }
 inst_dmulu_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DMULU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dmulu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dmulu_r_r_r(dst, src, src2)) }
+emit_dmulu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dmulu_r_r_r(dst, src, src2)) }
 inst_dmuhu_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DMUHU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dmuhu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dmuhu_r_r_r(dst, src, src2)) }
+emit_dmuhu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dmuhu_r_r_r(dst, src, src2)) }
 inst_dmod_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DMOD, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dmod_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dmod_r_r_r(dst, src, src2)) }
+emit_dmod_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dmod_r_r_r(dst, src, src2)) }
 inst_dmodu_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .DMODU, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_dmodu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_dmodu_r_r_r(dst, src, src2)) }
+emit_dmodu_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_dmodu_r_r_r(dst, src, src2)) }
 inst_aui_r_r_u16           :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .AUI, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_aui_r_r_u16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_aui_r_r_u16(dst, src, imm)) }
+emit_aui_r_r_u16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_aui_r_r_u16(dst, src, imm)) }
 inst_auipc_r_i16           :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .AUIPC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_auipc_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_auipc_r_i16(dst, imm)) }
+emit_auipc_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_auipc_r_i16(dst, imm)) }
 inst_aluipc_r_i16          :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ALUIPC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_aluipc_r_i16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_aluipc_r_i16(dst, imm)) }
+emit_aluipc_r_i16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_aluipc_r_i16(dst, imm)) }
 inst_daui_r_r_u16          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DAUI, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 2), {}}} }
-emit_daui_r_r_u16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_daui_r_r_u16(dst, src, imm)) }
+emit_daui_r_r_u16          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_daui_r_r_u16(dst, src, imm)) }
 inst_dahi_r_u16            :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DAHI, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_dahi_r_u16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_dahi_r_u16(dst, imm)) }
+emit_dahi_r_u16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_dahi_r_u16(dst, imm)) }
 inst_dati_r_u16            :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DATI, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_dati_r_u16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_dati_r_u16(dst, imm)) }
+emit_dati_r_u16            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_dati_r_u16(dst, imm)) }
 inst_align_r_r_r_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ALIGN, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), op_imm(imm, 1)}} }
-emit_align_r_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR, imm: i64) { append(instructions, inst_align_r_r_r_i5(dst, src, src2, imm)) }
+emit_align_r_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR, imm: i64) { append_elem(instructions, inst_align_r_r_r_i5(dst, src, src2, imm)) }
 inst_dalign_r_r_r_i5       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DALIGN, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), op_imm(imm, 1)}} }
-emit_dalign_r_r_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR, imm: i64) { append(instructions, inst_dalign_r_r_r_i5(dst, src, src2, imm)) }
+emit_dalign_r_r_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR, imm: i64) { append_elem(instructions, inst_dalign_r_r_r_i5(dst, src, src2, imm)) }
 inst_bitswap_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .BITSWAP, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_bitswap_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_bitswap_r_r(dst, src)) }
+emit_bitswap_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_bitswap_r_r(dst, src)) }
 inst_dbitswap_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DBITSWAP, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_dbitswap_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_dbitswap_r_r(dst, src)) }
+emit_dbitswap_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_dbitswap_r_r(dst, src)) }
 inst_lsa_r_r_r_i5          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .LSA, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), op_imm(imm, 1)}} }
-emit_lsa_r_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR, imm: i64) { append(instructions, inst_lsa_r_r_r_i5(dst, src, src2, imm)) }
+emit_lsa_r_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR, imm: i64) { append_elem(instructions, inst_lsa_r_r_r_i5(dst, src, src2, imm)) }
 inst_dlsa_r_r_r_i5         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .DLSA, operand_count = 4, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), op_imm(imm, 1)}} }
-emit_dlsa_r_r_r_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR, imm: i64) { append(instructions, inst_dlsa_r_r_r_i5(dst, src, src2, imm)) }
+emit_dlsa_r_r_r_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR, imm: i64) { append_elem(instructions, inst_dlsa_r_r_r_i5(dst, src, src2, imm)) }
 inst_lwpc_r_rel            :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .LWPC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_lwpc_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_lwpc_r_rel(dst, target)) }
+emit_lwpc_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_lwpc_r_rel(dst, target)) }
 inst_lwupc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .LWUPC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_lwupc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_lwupc_r_rel(dst, target)) }
+emit_lwupc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_lwupc_r_rel(dst, target)) }
 inst_ldpc_r_rel            :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .LDPC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
-emit_ldpc_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_ldpc_r_rel(dst, target)) }
+emit_ldpc_r_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append_elem(instructions, inst_ldpc_r_rel(dst, target)) }
 inst_seleqz_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SELEQZ, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_seleqz_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_seleqz_r_r_r(dst, src, src2)) }
+emit_seleqz_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_seleqz_r_r_r(dst, src, src2)) }
 inst_selnez_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SELNEZ, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_selnez_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_selnez_r_r_r(dst, src, src2)) }
+emit_selnez_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_selnez_r_r_r(dst, src, src2)) }
 inst_crc32b_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CRC32B, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_crc32b_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_crc32b_r_r(dst, src)) }
+emit_crc32b_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_crc32b_r_r(dst, src)) }
 inst_crc32h_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CRC32H, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_crc32h_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_crc32h_r_r(dst, src)) }
+emit_crc32h_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_crc32h_r_r(dst, src)) }
 inst_crc32w_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CRC32W, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_crc32w_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_crc32w_r_r(dst, src)) }
+emit_crc32w_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_crc32w_r_r(dst, src)) }
 inst_crc32d_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CRC32D, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_crc32d_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_crc32d_r_r(dst, src)) }
+emit_crc32d_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_crc32d_r_r(dst, src)) }
 inst_crc32cb_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CRC32CB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_crc32cb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_crc32cb_r_r(dst, src)) }
+emit_crc32cb_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_crc32cb_r_r(dst, src)) }
 inst_crc32ch_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CRC32CH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_crc32ch_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_crc32ch_r_r(dst, src)) }
+emit_crc32ch_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_crc32ch_r_r(dst, src)) }
 inst_crc32cw_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CRC32CW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_crc32cw_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_crc32cw_r_r(dst, src)) }
+emit_crc32cw_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_crc32cw_r_r(dst, src)) }
 inst_crc32cd_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CRC32CD, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_crc32cd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_crc32cd_r_r(dst, src)) }
+emit_crc32cd_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_crc32cd_r_r(dst, src)) }
 inst_sigrie_u16            :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SIGRIE, operand_count = 1, length = 4, ops = {op_imm(imm, 2), {}, {}, {}}} }
-emit_sigrie_u16            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_sigrie_u16(imm)) }
+emit_sigrie_u16            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_sigrie_u16(imm)) }
 inst_mfc1_r_f              :: #force_inline proc "contextless" (dst: GPR, src: FPR) -> Instruction { return Instruction{mnemonic = .MFC1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_fpr(src), {}, {}}} }
-emit_mfc1_r_f              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append(instructions, inst_mfc1_r_f(dst, src)) }
+emit_mfc1_r_f              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append_elem(instructions, inst_mfc1_r_f(dst, src)) }
 inst_mtc1_r_f              :: #force_inline proc "contextless" (dst: GPR, src: FPR) -> Instruction { return Instruction{mnemonic = .MTC1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_fpr(src), {}, {}}} }
-emit_mtc1_r_f              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append(instructions, inst_mtc1_r_f(dst, src)) }
+emit_mtc1_r_f              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append_elem(instructions, inst_mtc1_r_f(dst, src)) }
 inst_dmfc1_r_f             :: #force_inline proc "contextless" (dst: GPR, src: FPR) -> Instruction { return Instruction{mnemonic = .DMFC1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_fpr(src), {}, {}}} }
-emit_dmfc1_r_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append(instructions, inst_dmfc1_r_f(dst, src)) }
+emit_dmfc1_r_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append_elem(instructions, inst_dmfc1_r_f(dst, src)) }
 inst_dmtc1_r_f             :: #force_inline proc "contextless" (dst: GPR, src: FPR) -> Instruction { return Instruction{mnemonic = .DMTC1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_fpr(src), {}, {}}} }
-emit_dmtc1_r_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append(instructions, inst_dmtc1_r_f(dst, src)) }
+emit_dmtc1_r_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append_elem(instructions, inst_dmtc1_r_f(dst, src)) }
 inst_cfc1_r_fcr            :: #force_inline proc "contextless" (dst: GPR, src: Register) -> Instruction { return Instruction{mnemonic = .CFC1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_reg(src), {}, {}}} }
-emit_cfc1_r_fcr            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register) { append(instructions, inst_cfc1_r_fcr(dst, src)) }
+emit_cfc1_r_fcr            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register) { append_elem(instructions, inst_cfc1_r_fcr(dst, src)) }
 inst_ctc1_r_fcr            :: #force_inline proc "contextless" (dst: GPR, src: Register) -> Instruction { return Instruction{mnemonic = .CTC1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_reg(src), {}, {}}} }
-emit_ctc1_r_fcr            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register) { append(instructions, inst_ctc1_r_fcr(dst, src)) }
+emit_ctc1_r_fcr            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register) { append_elem(instructions, inst_ctc1_r_fcr(dst, src)) }
 inst_mfhc1_r_f             :: #force_inline proc "contextless" (dst: GPR, src: FPR) -> Instruction { return Instruction{mnemonic = .MFHC1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_fpr(src), {}, {}}} }
-emit_mfhc1_r_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append(instructions, inst_mfhc1_r_f(dst, src)) }
+emit_mfhc1_r_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append_elem(instructions, inst_mfhc1_r_f(dst, src)) }
 inst_mthc1_r_f             :: #force_inline proc "contextless" (dst: GPR, src: FPR) -> Instruction { return Instruction{mnemonic = .MTHC1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_fpr(src), {}, {}}} }
-emit_mthc1_r_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append(instructions, inst_mthc1_r_f(dst, src)) }
+emit_mthc1_r_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: FPR) { append_elem(instructions, inst_mthc1_r_f(dst, src)) }
 inst_lwc1_f_m              :: #force_inline proc "contextless" (dst: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LWC1, operand_count = 2, length = 4, ops = {op_fpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lwc1_f_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, mem: Memory) { append(instructions, inst_lwc1_f_m(dst, mem)) }
+emit_lwc1_f_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, mem: Memory) { append_elem(instructions, inst_lwc1_f_m(dst, mem)) }
 inst_swc1_f_m              :: #force_inline proc "contextless" (dst: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SWC1, operand_count = 2, length = 4, ops = {op_fpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_swc1_f_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, mem: Memory) { append(instructions, inst_swc1_f_m(dst, mem)) }
+emit_swc1_f_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, mem: Memory) { append_elem(instructions, inst_swc1_f_m(dst, mem)) }
 inst_ldc1_f_m              :: #force_inline proc "contextless" (dst: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDC1, operand_count = 2, length = 4, ops = {op_fpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_ldc1_f_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, mem: Memory) { append(instructions, inst_ldc1_f_m(dst, mem)) }
+emit_ldc1_f_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, mem: Memory) { append_elem(instructions, inst_ldc1_f_m(dst, mem)) }
 inst_sdc1_f_m              :: #force_inline proc "contextless" (dst: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SDC1, operand_count = 2, length = 4, ops = {op_fpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sdc1_f_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, mem: Memory) { append(instructions, inst_sdc1_f_m(dst, mem)) }
+emit_sdc1_f_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, mem: Memory) { append_elem(instructions, inst_sdc1_f_m(dst, mem)) }
 inst_add_s_f_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .ADD_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_add_s_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_add_s_f_f_f(dst, src, src2)) }
+emit_add_s_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_add_s_f_f_f(dst, src, src2)) }
 inst_add_d_f_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .ADD_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_add_d_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_add_d_f_f_f(dst, src, src2)) }
+emit_add_d_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_add_d_f_f_f(dst, src, src2)) }
 inst_add_ps_f_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .ADD_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_add_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_add_ps_f_f_f(dst, src, src2)) }
+emit_add_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_add_ps_f_f_f(dst, src, src2)) }
 inst_sub_s_f_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .SUB_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_sub_s_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_sub_s_f_f_f(dst, src, src2)) }
+emit_sub_s_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_sub_s_f_f_f(dst, src, src2)) }
 inst_sub_d_f_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .SUB_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_sub_d_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_sub_d_f_f_f(dst, src, src2)) }
+emit_sub_d_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_sub_d_f_f_f(dst, src, src2)) }
 inst_sub_ps_f_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .SUB_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_sub_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_sub_ps_f_f_f(dst, src, src2)) }
+emit_sub_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_sub_ps_f_f_f(dst, src, src2)) }
 inst_mul_s_f_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .MUL_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_mul_s_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_mul_s_f_f_f(dst, src, src2)) }
+emit_mul_s_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_mul_s_f_f_f(dst, src, src2)) }
 inst_mul_d_f_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .MUL_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_mul_d_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_mul_d_f_f_f(dst, src, src2)) }
+emit_mul_d_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_mul_d_f_f_f(dst, src, src2)) }
 inst_mul_ps_f_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .MUL_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_mul_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_mul_ps_f_f_f(dst, src, src2)) }
+emit_mul_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_mul_ps_f_f_f(dst, src, src2)) }
 inst_div_s_f_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .DIV_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_div_s_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_div_s_f_f_f(dst, src, src2)) }
+emit_div_s_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_div_s_f_f_f(dst, src, src2)) }
 inst_div_d_f_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .DIV_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_div_d_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_div_d_f_f_f(dst, src, src2)) }
+emit_div_d_f_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_div_d_f_f_f(dst, src, src2)) }
 inst_sqrt_s_f_f            :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .SQRT_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_sqrt_s_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_sqrt_s_f_f(dst, src)) }
+emit_sqrt_s_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_sqrt_s_f_f(dst, src)) }
 inst_sqrt_d_f_f            :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .SQRT_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_sqrt_d_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_sqrt_d_f_f(dst, src)) }
+emit_sqrt_d_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_sqrt_d_f_f(dst, src)) }
 inst_abs_s_f_f             :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .ABS_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_abs_s_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_abs_s_f_f(dst, src)) }
+emit_abs_s_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_abs_s_f_f(dst, src)) }
 inst_abs_d_f_f             :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .ABS_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_abs_d_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_abs_d_f_f(dst, src)) }
+emit_abs_d_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_abs_d_f_f(dst, src)) }
 inst_abs_ps_f_f            :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .ABS_PS, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_abs_ps_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_abs_ps_f_f(dst, src)) }
+emit_abs_ps_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_abs_ps_f_f(dst, src)) }
 inst_neg_s_f_f             :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .NEG_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_neg_s_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_neg_s_f_f(dst, src)) }
+emit_neg_s_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_neg_s_f_f(dst, src)) }
 inst_neg_d_f_f             :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .NEG_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_neg_d_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_neg_d_f_f(dst, src)) }
+emit_neg_d_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_neg_d_f_f(dst, src)) }
 inst_neg_ps_f_f            :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .NEG_PS, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_neg_ps_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_neg_ps_f_f(dst, src)) }
+emit_neg_ps_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_neg_ps_f_f(dst, src)) }
 inst_mov_s_f_f             :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .MOV_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_mov_s_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_mov_s_f_f(dst, src)) }
+emit_mov_s_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_mov_s_f_f(dst, src)) }
 inst_mov_d_f_f             :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .MOV_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_mov_d_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_mov_d_f_f(dst, src)) }
+emit_mov_d_f_f             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_mov_d_f_f(dst, src)) }
 inst_mov_ps_f_f            :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .MOV_PS, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_mov_ps_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_mov_ps_f_f(dst, src)) }
+emit_mov_ps_f_f            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_mov_ps_f_f(dst, src)) }
 inst_recip_s_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .RECIP_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_recip_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_recip_s_f_f(dst, src)) }
+emit_recip_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_recip_s_f_f(dst, src)) }
 inst_recip_d_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .RECIP_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_recip_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_recip_d_f_f(dst, src)) }
+emit_recip_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_recip_d_f_f(dst, src)) }
 inst_rsqrt_s_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .RSQRT_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_rsqrt_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_rsqrt_s_f_f(dst, src)) }
+emit_rsqrt_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_rsqrt_s_f_f(dst, src)) }
 inst_rsqrt_d_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .RSQRT_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_rsqrt_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_rsqrt_d_f_f(dst, src)) }
+emit_rsqrt_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_rsqrt_d_f_f(dst, src)) }
 inst_madd_s_f_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MADD_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_madd_s_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_madd_s_f_f_f_f(dst, src, src2, src3)) }
+emit_madd_s_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_madd_s_f_f_f_f(dst, src, src2, src3)) }
 inst_madd_d_f_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MADD_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_madd_d_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_madd_d_f_f_f_f(dst, src, src2, src3)) }
+emit_madd_d_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_madd_d_f_f_f_f(dst, src, src2, src3)) }
 inst_madd_ps_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MADD_PS, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_madd_ps_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_madd_ps_f_f_f_f(dst, src, src2, src3)) }
+emit_madd_ps_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_madd_ps_f_f_f_f(dst, src, src2, src3)) }
 inst_msub_s_f_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MSUB_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_msub_s_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_msub_s_f_f_f_f(dst, src, src2, src3)) }
+emit_msub_s_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_msub_s_f_f_f_f(dst, src, src2, src3)) }
 inst_msub_d_f_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MSUB_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_msub_d_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_msub_d_f_f_f_f(dst, src, src2, src3)) }
+emit_msub_d_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_msub_d_f_f_f_f(dst, src, src2, src3)) }
 inst_msub_ps_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MSUB_PS, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_msub_ps_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_msub_ps_f_f_f_f(dst, src, src2, src3)) }
+emit_msub_ps_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_msub_ps_f_f_f_f(dst, src, src2, src3)) }
 inst_nmadd_s_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMADD_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_nmadd_s_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmadd_s_f_f_f_f(dst, src, src2, src3)) }
+emit_nmadd_s_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_nmadd_s_f_f_f_f(dst, src, src2, src3)) }
 inst_nmadd_d_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMADD_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_nmadd_d_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmadd_d_f_f_f_f(dst, src, src2, src3)) }
+emit_nmadd_d_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_nmadd_d_f_f_f_f(dst, src, src2, src3)) }
 inst_nmadd_ps_f_f_f_f      :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMADD_PS, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_nmadd_ps_f_f_f_f      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmadd_ps_f_f_f_f(dst, src, src2, src3)) }
+emit_nmadd_ps_f_f_f_f      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_nmadd_ps_f_f_f_f(dst, src, src2, src3)) }
 inst_nmsub_s_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMSUB_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_nmsub_s_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmsub_s_f_f_f_f(dst, src, src2, src3)) }
+emit_nmsub_s_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_nmsub_s_f_f_f_f(dst, src, src2, src3)) }
 inst_nmsub_d_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMSUB_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_nmsub_d_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmsub_d_f_f_f_f(dst, src, src2, src3)) }
+emit_nmsub_d_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_nmsub_d_f_f_f_f(dst, src, src2, src3)) }
 inst_nmsub_ps_f_f_f_f      :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMSUB_PS, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
-emit_nmsub_ps_f_f_f_f      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmsub_ps_f_f_f_f(dst, src, src2, src3)) }
+emit_nmsub_ps_f_f_f_f      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append_elem(instructions, inst_nmsub_ps_f_f_f_f(dst, src, src2, src3)) }
 inst_movn_s_f_f_r          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
-emit_movn_s_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movn_s_f_f_r(dst, src, src2)) }
+emit_movn_s_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append_elem(instructions, inst_movn_s_f_f_r(dst, src, src2)) }
 inst_movn_d_f_f_r          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
-emit_movn_d_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movn_d_f_f_r(dst, src, src2)) }
+emit_movn_d_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append_elem(instructions, inst_movn_d_f_f_r(dst, src, src2)) }
 inst_movn_ps_f_f_r         :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
-emit_movn_ps_f_f_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movn_ps_f_f_r(dst, src, src2)) }
+emit_movn_ps_f_f_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append_elem(instructions, inst_movn_ps_f_f_r(dst, src, src2)) }
 inst_movz_s_f_f_r          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVZ_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
-emit_movz_s_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movz_s_f_f_r(dst, src, src2)) }
+emit_movz_s_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append_elem(instructions, inst_movz_s_f_f_r(dst, src, src2)) }
 inst_movz_d_f_f_r          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVZ_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
-emit_movz_d_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movz_d_f_f_r(dst, src, src2)) }
+emit_movz_d_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append_elem(instructions, inst_movz_d_f_f_r(dst, src, src2)) }
 inst_movz_ps_f_f_r         :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVZ_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
-emit_movz_ps_f_f_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movz_ps_f_f_r(dst, src, src2)) }
+emit_movz_ps_f_f_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append_elem(instructions, inst_movz_ps_f_f_r(dst, src, src2)) }
 inst_movf_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVF_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_movf_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movf_s_f_f_cc(dst, src, imm)) }
+emit_movf_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_movf_s_f_f_cc(dst, src, imm)) }
 inst_movf_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVF_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_movf_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movf_d_f_f_cc(dst, src, imm)) }
+emit_movf_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_movf_d_f_f_cc(dst, src, imm)) }
 inst_movf_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVF_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_movf_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movf_ps_f_f_cc(dst, src, imm)) }
+emit_movf_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_movf_ps_f_f_cc(dst, src, imm)) }
 inst_movt_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVT_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_movt_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movt_s_f_f_cc(dst, src, imm)) }
+emit_movt_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_movt_s_f_f_cc(dst, src, imm)) }
 inst_movt_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVT_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_movt_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movt_d_f_f_cc(dst, src, imm)) }
+emit_movt_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_movt_d_f_f_cc(dst, src, imm)) }
 inst_movt_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVT_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_movt_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movt_ps_f_f_cc(dst, src, imm)) }
+emit_movt_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_movt_ps_f_f_cc(dst, src, imm)) }
 inst_cvt_s_d_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_S_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_s_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_s_d_f_f(dst, src)) }
+emit_cvt_s_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_s_d_f_f(dst, src)) }
 inst_cvt_s_w_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_S_W, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_s_w_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_s_w_f_f(dst, src)) }
+emit_cvt_s_w_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_s_w_f_f(dst, src)) }
 inst_cvt_s_l_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_S_L, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_s_l_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_s_l_f_f(dst, src)) }
+emit_cvt_s_l_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_s_l_f_f(dst, src)) }
 inst_cvt_d_s_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_D_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_d_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_d_s_f_f(dst, src)) }
+emit_cvt_d_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_d_s_f_f(dst, src)) }
 inst_cvt_d_w_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_D_W, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_d_w_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_d_w_f_f(dst, src)) }
+emit_cvt_d_w_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_d_w_f_f(dst, src)) }
 inst_cvt_d_l_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_D_L, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_d_l_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_d_l_f_f(dst, src)) }
+emit_cvt_d_l_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_d_l_f_f(dst, src)) }
 inst_cvt_w_s_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_W_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_w_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_w_s_f_f(dst, src)) }
+emit_cvt_w_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_w_s_f_f(dst, src)) }
 inst_cvt_w_d_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_W_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_w_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_w_d_f_f(dst, src)) }
+emit_cvt_w_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_w_d_f_f(dst, src)) }
 inst_cvt_l_s_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_L_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_l_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_l_s_f_f(dst, src)) }
+emit_cvt_l_s_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_l_s_f_f(dst, src)) }
 inst_cvt_l_d_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_L_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_l_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_l_d_f_f(dst, src)) }
+emit_cvt_l_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_l_d_f_f(dst, src)) }
 inst_cvt_ps_s_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .CVT_PS_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_cvt_ps_s_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_cvt_ps_s_f_f_f(dst, src, src2)) }
+emit_cvt_ps_s_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_cvt_ps_s_f_f_f(dst, src, src2)) }
 inst_cvt_s_pu_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_S_PU, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_s_pu_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_s_pu_f_f(dst, src)) }
+emit_cvt_s_pu_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_s_pu_f_f(dst, src)) }
 inst_cvt_s_pl_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_S_PL, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_cvt_s_pl_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_s_pl_f_f(dst, src)) }
+emit_cvt_s_pl_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_cvt_s_pl_f_f(dst, src)) }
 inst_pll_ps_f_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .PLL_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_pll_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_pll_ps_f_f_f(dst, src, src2)) }
+emit_pll_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_pll_ps_f_f_f(dst, src, src2)) }
 inst_plu_ps_f_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .PLU_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_plu_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_plu_ps_f_f_f(dst, src, src2)) }
+emit_plu_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_plu_ps_f_f_f(dst, src, src2)) }
 inst_pul_ps_f_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .PUL_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_pul_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_pul_ps_f_f_f(dst, src, src2)) }
+emit_pul_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_pul_ps_f_f_f(dst, src, src2)) }
 inst_puu_ps_f_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR) -> Instruction { return Instruction{mnemonic = .PUU_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), {}}} }
-emit_puu_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append(instructions, inst_puu_ps_f_f_f(dst, src, src2)) }
+emit_puu_ps_f_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR) { append_elem(instructions, inst_puu_ps_f_f_f(dst, src, src2)) }
 inst_round_w_s_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .ROUND_W_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_round_w_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_round_w_s_f_f(dst, src)) }
+emit_round_w_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_round_w_s_f_f(dst, src)) }
 inst_round_w_d_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .ROUND_W_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_round_w_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_round_w_d_f_f(dst, src)) }
+emit_round_w_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_round_w_d_f_f(dst, src)) }
 inst_round_l_s_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .ROUND_L_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_round_l_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_round_l_s_f_f(dst, src)) }
+emit_round_l_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_round_l_s_f_f(dst, src)) }
 inst_round_l_d_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .ROUND_L_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_round_l_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_round_l_d_f_f(dst, src)) }
+emit_round_l_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_round_l_d_f_f(dst, src)) }
 inst_trunc_w_s_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .TRUNC_W_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_trunc_w_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_trunc_w_s_f_f(dst, src)) }
+emit_trunc_w_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_trunc_w_s_f_f(dst, src)) }
 inst_trunc_w_d_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .TRUNC_W_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_trunc_w_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_trunc_w_d_f_f(dst, src)) }
+emit_trunc_w_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_trunc_w_d_f_f(dst, src)) }
 inst_trunc_l_s_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .TRUNC_L_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_trunc_l_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_trunc_l_s_f_f(dst, src)) }
+emit_trunc_l_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_trunc_l_s_f_f(dst, src)) }
 inst_trunc_l_d_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .TRUNC_L_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_trunc_l_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_trunc_l_d_f_f(dst, src)) }
+emit_trunc_l_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_trunc_l_d_f_f(dst, src)) }
 inst_ceil_w_s_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CEIL_W_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_ceil_w_s_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_ceil_w_s_f_f(dst, src)) }
+emit_ceil_w_s_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_ceil_w_s_f_f(dst, src)) }
 inst_ceil_w_d_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CEIL_W_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_ceil_w_d_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_ceil_w_d_f_f(dst, src)) }
+emit_ceil_w_d_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_ceil_w_d_f_f(dst, src)) }
 inst_ceil_l_s_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CEIL_L_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_ceil_l_s_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_ceil_l_s_f_f(dst, src)) }
+emit_ceil_l_s_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_ceil_l_s_f_f(dst, src)) }
 inst_ceil_l_d_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CEIL_L_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_ceil_l_d_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_ceil_l_d_f_f(dst, src)) }
+emit_ceil_l_d_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_ceil_l_d_f_f(dst, src)) }
 inst_floor_w_s_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .FLOOR_W_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_floor_w_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_floor_w_s_f_f(dst, src)) }
+emit_floor_w_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_floor_w_s_f_f(dst, src)) }
 inst_floor_w_d_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .FLOOR_W_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_floor_w_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_floor_w_d_f_f(dst, src)) }
+emit_floor_w_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_floor_w_d_f_f(dst, src)) }
 inst_floor_l_s_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .FLOOR_L_S, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_floor_l_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_floor_l_s_f_f(dst, src)) }
+emit_floor_l_s_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_floor_l_s_f_f(dst, src)) }
 inst_floor_l_d_f_f         :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .FLOOR_L_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_floor_l_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_floor_l_d_f_f(dst, src)) }
+emit_floor_l_d_f_f         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_floor_l_d_f_f(dst, src)) }
 inst_c_f_s_f_f_cc          :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_F_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_f_s_f_f_cc          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_f_s_f_f_cc(dst, src, imm)) }
+emit_c_f_s_f_f_cc          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_f_s_f_f_cc(dst, src, imm)) }
 inst_c_f_d_f_f_cc          :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_F_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_f_d_f_f_cc          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_f_d_f_f_cc(dst, src, imm)) }
+emit_c_f_d_f_f_cc          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_f_d_f_f_cc(dst, src, imm)) }
 inst_c_f_ps_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_F_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_f_ps_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_f_ps_f_f_cc(dst, src, imm)) }
+emit_c_f_ps_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_f_ps_f_f_cc(dst, src, imm)) }
 inst_c_un_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_UN_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_un_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_un_s_f_f_cc(dst, src, imm)) }
+emit_c_un_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_un_s_f_f_cc(dst, src, imm)) }
 inst_c_un_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_UN_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_un_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_un_d_f_f_cc(dst, src, imm)) }
+emit_c_un_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_un_d_f_f_cc(dst, src, imm)) }
 inst_c_un_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_UN_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_un_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_un_ps_f_f_cc(dst, src, imm)) }
+emit_c_un_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_un_ps_f_f_cc(dst, src, imm)) }
 inst_c_eq_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_EQ_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_eq_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_eq_s_f_f_cc(dst, src, imm)) }
+emit_c_eq_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_eq_s_f_f_cc(dst, src, imm)) }
 inst_c_eq_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_EQ_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_eq_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_eq_d_f_f_cc(dst, src, imm)) }
+emit_c_eq_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_eq_d_f_f_cc(dst, src, imm)) }
 inst_c_eq_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_EQ_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_eq_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_eq_ps_f_f_cc(dst, src, imm)) }
+emit_c_eq_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_eq_ps_f_f_cc(dst, src, imm)) }
 inst_c_ueq_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_UEQ_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ueq_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ueq_s_f_f_cc(dst, src, imm)) }
+emit_c_ueq_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ueq_s_f_f_cc(dst, src, imm)) }
 inst_c_ueq_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_UEQ_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ueq_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ueq_d_f_f_cc(dst, src, imm)) }
+emit_c_ueq_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ueq_d_f_f_cc(dst, src, imm)) }
 inst_c_ueq_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_UEQ_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ueq_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ueq_ps_f_f_cc(dst, src, imm)) }
+emit_c_ueq_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ueq_ps_f_f_cc(dst, src, imm)) }
 inst_c_olt_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_OLT_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_olt_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_olt_s_f_f_cc(dst, src, imm)) }
+emit_c_olt_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_olt_s_f_f_cc(dst, src, imm)) }
 inst_c_olt_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_OLT_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_olt_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_olt_d_f_f_cc(dst, src, imm)) }
+emit_c_olt_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_olt_d_f_f_cc(dst, src, imm)) }
 inst_c_olt_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_OLT_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_olt_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_olt_ps_f_f_cc(dst, src, imm)) }
+emit_c_olt_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_olt_ps_f_f_cc(dst, src, imm)) }
 inst_c_ult_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ULT_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ult_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ult_s_f_f_cc(dst, src, imm)) }
+emit_c_ult_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ult_s_f_f_cc(dst, src, imm)) }
 inst_c_ult_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ULT_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ult_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ult_d_f_f_cc(dst, src, imm)) }
+emit_c_ult_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ult_d_f_f_cc(dst, src, imm)) }
 inst_c_ult_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ULT_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ult_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ult_ps_f_f_cc(dst, src, imm)) }
+emit_c_ult_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ult_ps_f_f_cc(dst, src, imm)) }
 inst_c_ole_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_OLE_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ole_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ole_s_f_f_cc(dst, src, imm)) }
+emit_c_ole_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ole_s_f_f_cc(dst, src, imm)) }
 inst_c_ole_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_OLE_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ole_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ole_d_f_f_cc(dst, src, imm)) }
+emit_c_ole_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ole_d_f_f_cc(dst, src, imm)) }
 inst_c_ole_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_OLE_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ole_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ole_ps_f_f_cc(dst, src, imm)) }
+emit_c_ole_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ole_ps_f_f_cc(dst, src, imm)) }
 inst_c_ule_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ULE_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ule_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ule_s_f_f_cc(dst, src, imm)) }
+emit_c_ule_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ule_s_f_f_cc(dst, src, imm)) }
 inst_c_ule_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ULE_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ule_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ule_d_f_f_cc(dst, src, imm)) }
+emit_c_ule_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ule_d_f_f_cc(dst, src, imm)) }
 inst_c_ule_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ULE_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ule_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ule_ps_f_f_cc(dst, src, imm)) }
+emit_c_ule_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ule_ps_f_f_cc(dst, src, imm)) }
 inst_c_sf_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SF_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_sf_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_sf_s_f_f_cc(dst, src, imm)) }
+emit_c_sf_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_sf_s_f_f_cc(dst, src, imm)) }
 inst_c_sf_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SF_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_sf_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_sf_d_f_f_cc(dst, src, imm)) }
+emit_c_sf_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_sf_d_f_f_cc(dst, src, imm)) }
 inst_c_sf_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SF_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_sf_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_sf_ps_f_f_cc(dst, src, imm)) }
+emit_c_sf_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_sf_ps_f_f_cc(dst, src, imm)) }
 inst_c_ngle_s_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGLE_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngle_s_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngle_s_f_f_cc(dst, src, imm)) }
+emit_c_ngle_s_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngle_s_f_f_cc(dst, src, imm)) }
 inst_c_ngle_d_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGLE_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngle_d_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngle_d_f_f_cc(dst, src, imm)) }
+emit_c_ngle_d_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngle_d_f_f_cc(dst, src, imm)) }
 inst_c_ngle_ps_f_f_cc      :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGLE_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngle_ps_f_f_cc      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngle_ps_f_f_cc(dst, src, imm)) }
+emit_c_ngle_ps_f_f_cc      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngle_ps_f_f_cc(dst, src, imm)) }
 inst_c_seq_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SEQ_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_seq_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_seq_s_f_f_cc(dst, src, imm)) }
+emit_c_seq_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_seq_s_f_f_cc(dst, src, imm)) }
 inst_c_seq_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SEQ_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_seq_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_seq_d_f_f_cc(dst, src, imm)) }
+emit_c_seq_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_seq_d_f_f_cc(dst, src, imm)) }
 inst_c_seq_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SEQ_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_seq_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_seq_ps_f_f_cc(dst, src, imm)) }
+emit_c_seq_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_seq_ps_f_f_cc(dst, src, imm)) }
 inst_c_ngl_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGL_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngl_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngl_s_f_f_cc(dst, src, imm)) }
+emit_c_ngl_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngl_s_f_f_cc(dst, src, imm)) }
 inst_c_ngl_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGL_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngl_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngl_d_f_f_cc(dst, src, imm)) }
+emit_c_ngl_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngl_d_f_f_cc(dst, src, imm)) }
 inst_c_ngl_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGL_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngl_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngl_ps_f_f_cc(dst, src, imm)) }
+emit_c_ngl_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngl_ps_f_f_cc(dst, src, imm)) }
 inst_c_lt_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_LT_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_lt_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_lt_s_f_f_cc(dst, src, imm)) }
+emit_c_lt_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_lt_s_f_f_cc(dst, src, imm)) }
 inst_c_lt_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_LT_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_lt_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_lt_d_f_f_cc(dst, src, imm)) }
+emit_c_lt_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_lt_d_f_f_cc(dst, src, imm)) }
 inst_c_lt_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_LT_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_lt_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_lt_ps_f_f_cc(dst, src, imm)) }
+emit_c_lt_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_lt_ps_f_f_cc(dst, src, imm)) }
 inst_c_nge_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGE_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_nge_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_nge_s_f_f_cc(dst, src, imm)) }
+emit_c_nge_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_nge_s_f_f_cc(dst, src, imm)) }
 inst_c_nge_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGE_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_nge_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_nge_d_f_f_cc(dst, src, imm)) }
+emit_c_nge_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_nge_d_f_f_cc(dst, src, imm)) }
 inst_c_nge_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGE_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_nge_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_nge_ps_f_f_cc(dst, src, imm)) }
+emit_c_nge_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_nge_ps_f_f_cc(dst, src, imm)) }
 inst_c_le_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_LE_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_le_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_le_s_f_f_cc(dst, src, imm)) }
+emit_c_le_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_le_s_f_f_cc(dst, src, imm)) }
 inst_c_le_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_LE_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_le_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_le_d_f_f_cc(dst, src, imm)) }
+emit_c_le_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_le_d_f_f_cc(dst, src, imm)) }
 inst_c_le_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_LE_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_le_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_le_ps_f_f_cc(dst, src, imm)) }
+emit_c_le_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_le_ps_f_f_cc(dst, src, imm)) }
 inst_c_ngt_s_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGT_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngt_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngt_s_f_f_cc(dst, src, imm)) }
+emit_c_ngt_s_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngt_s_f_f_cc(dst, src, imm)) }
 inst_c_ngt_d_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGT_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngt_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngt_d_f_f_cc(dst, src, imm)) }
+emit_c_ngt_d_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngt_d_f_f_cc(dst, src, imm)) }
 inst_c_ngt_ps_f_f_cc       :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_NGT_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
-emit_c_ngt_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_c_ngt_ps_f_f_cc(dst, src, imm)) }
+emit_c_ngt_ps_f_f_cc       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append_elem(instructions, inst_c_ngt_ps_f_f_cc(dst, src, imm)) }
 inst_bc1f_cc_rel           :: #force_inline proc "contextless" (imm: i64, target: u32) -> Instruction { return Instruction{mnemonic = .BC1F, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(target), {}, {}}} }
-emit_bc1f_cc_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append(instructions, inst_bc1f_cc_rel(imm, target)) }
+emit_bc1f_cc_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append_elem(instructions, inst_bc1f_cc_rel(imm, target)) }
 inst_bc1t_cc_rel           :: #force_inline proc "contextless" (imm: i64, target: u32) -> Instruction { return Instruction{mnemonic = .BC1T, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(target), {}, {}}} }
-emit_bc1t_cc_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append(instructions, inst_bc1t_cc_rel(imm, target)) }
+emit_bc1t_cc_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append_elem(instructions, inst_bc1t_cc_rel(imm, target)) }
 inst_bc1fl_cc_rel          :: #force_inline proc "contextless" (imm: i64, target: u32) -> Instruction { return Instruction{mnemonic = .BC1FL, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(target), {}, {}}} }
-emit_bc1fl_cc_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append(instructions, inst_bc1fl_cc_rel(imm, target)) }
+emit_bc1fl_cc_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append_elem(instructions, inst_bc1fl_cc_rel(imm, target)) }
 inst_bc1tl_cc_rel          :: #force_inline proc "contextless" (imm: i64, target: u32) -> Instruction { return Instruction{mnemonic = .BC1TL, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(target), {}, {}}} }
-emit_bc1tl_cc_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append(instructions, inst_bc1tl_cc_rel(imm, target)) }
+emit_bc1tl_cc_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append_elem(instructions, inst_bc1tl_cc_rel(imm, target)) }
 inst_mfc0_r_c0_sel         :: #force_inline proc "contextless" (dst: GPR, src: CP0_Reg, imm: i64) -> Instruction { return Instruction{mnemonic = .MFC0, operand_count = 3, length = 4, ops = {op_gpr(dst), op_cp0(src), op_imm(imm, 1), {}}} }
-emit_mfc0_r_c0_sel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append(instructions, inst_mfc0_r_c0_sel(dst, src, imm)) }
+emit_mfc0_r_c0_sel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append_elem(instructions, inst_mfc0_r_c0_sel(dst, src, imm)) }
 inst_mtc0_r_c0_sel         :: #force_inline proc "contextless" (dst: GPR, src: CP0_Reg, imm: i64) -> Instruction { return Instruction{mnemonic = .MTC0, operand_count = 3, length = 4, ops = {op_gpr(dst), op_cp0(src), op_imm(imm, 1), {}}} }
-emit_mtc0_r_c0_sel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append(instructions, inst_mtc0_r_c0_sel(dst, src, imm)) }
+emit_mtc0_r_c0_sel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append_elem(instructions, inst_mtc0_r_c0_sel(dst, src, imm)) }
 inst_dmfc0_r_c0_sel        :: #force_inline proc "contextless" (dst: GPR, src: CP0_Reg, imm: i64) -> Instruction { return Instruction{mnemonic = .DMFC0, operand_count = 3, length = 4, ops = {op_gpr(dst), op_cp0(src), op_imm(imm, 1), {}}} }
-emit_dmfc0_r_c0_sel        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append(instructions, inst_dmfc0_r_c0_sel(dst, src, imm)) }
+emit_dmfc0_r_c0_sel        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append_elem(instructions, inst_dmfc0_r_c0_sel(dst, src, imm)) }
 inst_dmtc0_r_c0_sel        :: #force_inline proc "contextless" (dst: GPR, src: CP0_Reg, imm: i64) -> Instruction { return Instruction{mnemonic = .DMTC0, operand_count = 3, length = 4, ops = {op_gpr(dst), op_cp0(src), op_imm(imm, 1), {}}} }
-emit_dmtc0_r_c0_sel        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append(instructions, inst_dmtc0_r_c0_sel(dst, src, imm)) }
+emit_dmtc0_r_c0_sel        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append_elem(instructions, inst_dmtc0_r_c0_sel(dst, src, imm)) }
 inst_mfhc0_r_c0_sel        :: #force_inline proc "contextless" (dst: GPR, src: CP0_Reg, imm: i64) -> Instruction { return Instruction{mnemonic = .MFHC0, operand_count = 3, length = 4, ops = {op_gpr(dst), op_cp0(src), op_imm(imm, 1), {}}} }
-emit_mfhc0_r_c0_sel        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append(instructions, inst_mfhc0_r_c0_sel(dst, src, imm)) }
+emit_mfhc0_r_c0_sel        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append_elem(instructions, inst_mfhc0_r_c0_sel(dst, src, imm)) }
 inst_mthc0_r_c0_sel        :: #force_inline proc "contextless" (dst: GPR, src: CP0_Reg, imm: i64) -> Instruction { return Instruction{mnemonic = .MTHC0, operand_count = 3, length = 4, ops = {op_gpr(dst), op_cp0(src), op_imm(imm, 1), {}}} }
-emit_mthc0_r_c0_sel        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append(instructions, inst_mthc0_r_c0_sel(dst, src, imm)) }
+emit_mthc0_r_c0_sel        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: CP0_Reg, imm: i64) { append_elem(instructions, inst_mthc0_r_c0_sel(dst, src, imm)) }
 inst_tlbp_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TLBP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tlbp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbp_none()) }
+emit_tlbp_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbp_none()) }
 inst_tlbr_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TLBR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tlbr_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbr_none()) }
+emit_tlbr_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbr_none()) }
 inst_tlbwi_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TLBWI, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tlbwi_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbwi_none()) }
+emit_tlbwi_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbwi_none()) }
 inst_tlbwr_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TLBWR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tlbwr_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbwr_none()) }
+emit_tlbwr_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbwr_none()) }
 inst_cache_i5_m            :: #force_inline proc "contextless" (imm: i64, mem: Memory) -> Instruction { return Instruction{mnemonic = .CACHE, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_mem(mem, 4), {}, {}}} }
-emit_cache_i5_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append(instructions, inst_cache_i5_m(imm, mem)) }
+emit_cache_i5_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) { append_elem(instructions, inst_cache_i5_m(imm, mem)) }
 inst_mfc2_r_c2             :: #force_inline proc "contextless" (dst: GPR, src: GTE_DataReg) -> Instruction { return Instruction{mnemonic = .MFC2, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gte_data(src), {}, {}}} }
-emit_mfc2_r_c2             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GTE_DataReg) { append(instructions, inst_mfc2_r_c2(dst, src)) }
+emit_mfc2_r_c2             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GTE_DataReg) { append_elem(instructions, inst_mfc2_r_c2(dst, src)) }
 inst_mtc2_r_c2             :: #force_inline proc "contextless" (dst: GPR, src: GTE_DataReg) -> Instruction { return Instruction{mnemonic = .MTC2, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gte_data(src), {}, {}}} }
-emit_mtc2_r_c2             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GTE_DataReg) { append(instructions, inst_mtc2_r_c2(dst, src)) }
+emit_mtc2_r_c2             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GTE_DataReg) { append_elem(instructions, inst_mtc2_r_c2(dst, src)) }
 inst_cfc2_r_c2c            :: #force_inline proc "contextless" (dst: GPR, src: GTE_CtrlReg) -> Instruction { return Instruction{mnemonic = .CFC2, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gte_ctrl(src), {}, {}}} }
-emit_cfc2_r_c2c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GTE_CtrlReg) { append(instructions, inst_cfc2_r_c2c(dst, src)) }
+emit_cfc2_r_c2c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GTE_CtrlReg) { append_elem(instructions, inst_cfc2_r_c2c(dst, src)) }
 inst_ctc2_r_c2c            :: #force_inline proc "contextless" (dst: GPR, src: GTE_CtrlReg) -> Instruction { return Instruction{mnemonic = .CTC2, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gte_ctrl(src), {}, {}}} }
-emit_ctc2_r_c2c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GTE_CtrlReg) { append(instructions, inst_ctc2_r_c2c(dst, src)) }
+emit_ctc2_r_c2c            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GTE_CtrlReg) { append_elem(instructions, inst_ctc2_r_c2c(dst, src)) }
 inst_lwc2_c2_m             :: #force_inline proc "contextless" (dst: GTE_DataReg, mem: Memory) -> Instruction { return Instruction{mnemonic = .LWC2, operand_count = 2, length = 4, ops = {op_gte_data(dst), op_mem(mem, 4), {}, {}}} }
-emit_lwc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append(instructions, inst_lwc2_c2_m(dst, mem)) }
+emit_lwc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append_elem(instructions, inst_lwc2_c2_m(dst, mem)) }
 inst_swc2_c2_m             :: #force_inline proc "contextless" (dst: GTE_DataReg, mem: Memory) -> Instruction { return Instruction{mnemonic = .SWC2, operand_count = 2, length = 4, ops = {op_gte_data(dst), op_mem(mem, 4), {}, {}}} }
-emit_swc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append(instructions, inst_swc2_c2_m(dst, mem)) }
+emit_swc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append_elem(instructions, inst_swc2_c2_m(dst, mem)) }
 inst_ldc2_c2_m             :: #force_inline proc "contextless" (dst: GTE_DataReg, mem: Memory) -> Instruction { return Instruction{mnemonic = .LDC2, operand_count = 2, length = 4, ops = {op_gte_data(dst), op_mem(mem, 4), {}, {}}} }
-emit_ldc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append(instructions, inst_ldc2_c2_m(dst, mem)) }
+emit_ldc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append_elem(instructions, inst_ldc2_c2_m(dst, mem)) }
 inst_sdc2_c2_m             :: #force_inline proc "contextless" (dst: GTE_DataReg, mem: Memory) -> Instruction { return Instruction{mnemonic = .SDC2, operand_count = 2, length = 4, ops = {op_gte_data(dst), op_mem(mem, 4), {}, {}}} }
-emit_sdc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append(instructions, inst_sdc2_c2_m(dst, mem)) }
+emit_sdc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append_elem(instructions, inst_sdc2_c2_m(dst, mem)) }
 inst_rtps_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .RTPS, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_rtps_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rtps_none()) }
+emit_rtps_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rtps_none()) }
 inst_rtpt_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .RTPT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_rtpt_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rtpt_none()) }
+emit_rtpt_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rtpt_none()) }
 inst_dpcs_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DPCS, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_dpcs_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dpcs_none()) }
+emit_dpcs_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dpcs_none()) }
 inst_dpct_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DPCT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_dpct_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dpct_none()) }
+emit_dpct_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dpct_none()) }
 inst_intpl_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .INTPL, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_intpl_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_intpl_none()) }
+emit_intpl_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_intpl_none()) }
 inst_mvmva_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .MVMVA, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_mvmva_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_mvmva_none()) }
+emit_mvmva_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_mvmva_none()) }
 inst_ncds_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NCDS, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_ncds_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ncds_none()) }
+emit_ncds_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ncds_none()) }
 inst_ncdt_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NCDT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_ncdt_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ncdt_none()) }
+emit_ncdt_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ncdt_none()) }
 inst_nccs_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NCCS, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_nccs_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nccs_none()) }
+emit_nccs_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nccs_none()) }
 inst_ncct_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NCCT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_ncct_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ncct_none()) }
+emit_ncct_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ncct_none()) }
 inst_ncs_none              :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NCS, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_ncs_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ncs_none()) }
+emit_ncs_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ncs_none()) }
 inst_nct_none              :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NCT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_nct_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nct_none()) }
+emit_nct_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nct_none()) }
 inst_cdp_none              :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .CDP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_cdp_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cdp_none()) }
+emit_cdp_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cdp_none()) }
 inst_cc_none               :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .CC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_cc_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cc_none()) }
+emit_cc_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cc_none()) }
 inst_nclip_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NCLIP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_nclip_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nclip_none()) }
+emit_nclip_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nclip_none()) }
 inst_avsz3_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .AVSZ3, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_avsz3_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_avsz3_none()) }
+emit_avsz3_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_avsz3_none()) }
 inst_avsz4_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .AVSZ4, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_avsz4_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_avsz4_none()) }
+emit_avsz4_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_avsz4_none()) }
 inst_op_none               :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .OP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_op_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_op_none()) }
+emit_op_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_op_none()) }
 inst_gpf_none              :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .GPF, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_gpf_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_gpf_none()) }
+emit_gpf_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_gpf_none()) }
 inst_gpl_none              :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .GPL, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_gpl_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_gpl_none()) }
+emit_gpl_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_gpl_none()) }
 inst_sqr_none              :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SQR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_sqr_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sqr_none()) }
+emit_sqr_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sqr_none()) }
 inst_dcpl_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DCPL, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_dcpl_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dcpl_none()) }
+emit_dcpl_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dcpl_none()) }
 inst_lq_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LQ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_lq_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_lq_r_m(dst, mem)) }
+emit_lq_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_lq_r_m(dst, mem)) }
 inst_sq_r_m                :: #force_inline proc "contextless" (dst: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SQ, operand_count = 2, length = 4, ops = {op_gpr(dst), op_mem(mem, 4), {}, {}}} }
-emit_sq_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append(instructions, inst_sq_r_m(dst, mem)) }
+emit_sq_r_m                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, mem: Memory) { append_elem(instructions, inst_sq_r_m(dst, mem)) }
 inst_lqc2_c2_m             :: #force_inline proc "contextless" (dst: GTE_DataReg, mem: Memory) -> Instruction { return Instruction{mnemonic = .LQC2, operand_count = 2, length = 4, ops = {op_gte_data(dst), op_mem(mem, 4), {}, {}}} }
-emit_lqc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append(instructions, inst_lqc2_c2_m(dst, mem)) }
+emit_lqc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append_elem(instructions, inst_lqc2_c2_m(dst, mem)) }
 inst_sqc2_c2_m             :: #force_inline proc "contextless" (dst: GTE_DataReg, mem: Memory) -> Instruction { return Instruction{mnemonic = .SQC2, operand_count = 2, length = 4, ops = {op_gte_data(dst), op_mem(mem, 4), {}, {}}} }
-emit_sqc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append(instructions, inst_sqc2_c2_m(dst, mem)) }
+emit_sqc2_c2_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GTE_DataReg, mem: Memory) { append_elem(instructions, inst_sqc2_c2_m(dst, mem)) }
 inst_mfhi1_r               :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MFHI1, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mfhi1_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mfhi1_r(dst)) }
+emit_mfhi1_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mfhi1_r(dst)) }
 inst_mflo1_r               :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MFLO1, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mflo1_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mflo1_r(dst)) }
+emit_mflo1_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mflo1_r(dst)) }
 inst_mthi1_r               :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MTHI1, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mthi1_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mthi1_r(dst)) }
+emit_mthi1_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mthi1_r(dst)) }
 inst_mtlo1_r               :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MTLO1, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mtlo1_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mtlo1_r(dst)) }
+emit_mtlo1_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mtlo1_r(dst)) }
 inst_mult1_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MULT1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_mult1_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_mult1_r_r(dst, src)) }
+emit_mult1_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_mult1_r_r(dst, src)) }
 inst_multu1_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MULTU1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_multu1_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_multu1_r_r(dst, src)) }
+emit_multu1_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_multu1_r_r(dst, src)) }
 inst_div1_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DIV1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_div1_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_div1_r_r(dst, src)) }
+emit_div1_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_div1_r_r(dst, src)) }
 inst_divu1_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DIVU1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_divu1_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_divu1_r_r(dst, src)) }
+emit_divu1_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_divu1_r_r(dst, src)) }
 inst_madd1_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MADD1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_madd1_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_madd1_r_r(dst, src)) }
+emit_madd1_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_madd1_r_r(dst, src)) }
 inst_maddu1_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MADDU1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_maddu1_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_maddu1_r_r(dst, src)) }
+emit_maddu1_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_maddu1_r_r(dst, src)) }
 inst_msub1_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MSUB1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_msub1_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_msub1_r_r(dst, src)) }
+emit_msub1_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_msub1_r_r(dst, src)) }
 inst_msubu1_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MSUBU1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_msubu1_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_msubu1_r_r(dst, src)) }
+emit_msubu1_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_msubu1_r_r(dst, src)) }
 inst_pmfhl_lw_r            :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFHL_LW, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmfhl_lw_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmfhl_lw_r(dst)) }
+emit_pmfhl_lw_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmfhl_lw_r(dst)) }
 inst_pmfhl_uw_r            :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFHL_UW, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmfhl_uw_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmfhl_uw_r(dst)) }
+emit_pmfhl_uw_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmfhl_uw_r(dst)) }
 inst_pmfhl_lh_r            :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFHL_LH, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmfhl_lh_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmfhl_lh_r(dst)) }
+emit_pmfhl_lh_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmfhl_lh_r(dst)) }
 inst_pmfhl_sh_r            :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFHL_SH, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmfhl_sh_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmfhl_sh_r(dst)) }
+emit_pmfhl_sh_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmfhl_sh_r(dst)) }
 inst_pmfhl_slw_r           :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFHL_SLW, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmfhl_slw_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmfhl_slw_r(dst)) }
+emit_pmfhl_slw_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmfhl_slw_r(dst)) }
 inst_pmthl_lw_r            :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMTHL_LW, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmthl_lw_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmthl_lw_r(dst)) }
+emit_pmthl_lw_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmthl_lw_r(dst)) }
 inst_paddb_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_paddb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_paddb_r_r_r(dst, src, src2)) }
+emit_paddb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_paddb_r_r_r(dst, src, src2)) }
 inst_paddh_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_paddh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_paddh_r_r_r(dst, src, src2)) }
+emit_paddh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_paddh_r_r_r(dst, src, src2)) }
 inst_paddw_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_paddw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_paddw_r_r_r(dst, src, src2)) }
+emit_paddw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_paddw_r_r_r(dst, src, src2)) }
 inst_paddsb_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDSB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_paddsb_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_paddsb_r_r_r(dst, src, src2)) }
+emit_paddsb_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_paddsb_r_r_r(dst, src, src2)) }
 inst_paddsh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDSH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_paddsh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_paddsh_r_r_r(dst, src, src2)) }
+emit_paddsh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_paddsh_r_r_r(dst, src, src2)) }
 inst_paddsw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDSW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_paddsw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_paddsw_r_r_r(dst, src, src2)) }
+emit_paddsw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_paddsw_r_r_r(dst, src, src2)) }
 inst_paddub_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDUB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_paddub_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_paddub_r_r_r(dst, src, src2)) }
+emit_paddub_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_paddub_r_r_r(dst, src, src2)) }
 inst_padduh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDUH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_padduh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_padduh_r_r_r(dst, src, src2)) }
+emit_padduh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_padduh_r_r_r(dst, src, src2)) }
 inst_padduw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PADDUW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_padduw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_padduw_r_r_r(dst, src, src2)) }
+emit_padduw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_padduw_r_r_r(dst, src, src2)) }
 inst_psubb_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubb_r_r_r(dst, src, src2)) }
+emit_psubb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubb_r_r_r(dst, src, src2)) }
 inst_psubh_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubh_r_r_r(dst, src, src2)) }
+emit_psubh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubh_r_r_r(dst, src, src2)) }
 inst_psubw_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubw_r_r_r(dst, src, src2)) }
+emit_psubw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubw_r_r_r(dst, src, src2)) }
 inst_psubsb_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBSB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubsb_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubsb_r_r_r(dst, src, src2)) }
+emit_psubsb_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubsb_r_r_r(dst, src, src2)) }
 inst_psubsh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBSH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubsh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubsh_r_r_r(dst, src, src2)) }
+emit_psubsh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubsh_r_r_r(dst, src, src2)) }
 inst_psubsw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBSW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubsw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubsw_r_r_r(dst, src, src2)) }
+emit_psubsw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubsw_r_r_r(dst, src, src2)) }
 inst_psubub_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBUB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubub_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubub_r_r_r(dst, src, src2)) }
+emit_psubub_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubub_r_r_r(dst, src, src2)) }
 inst_psubuh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBUH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubuh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubuh_r_r_r(dst, src, src2)) }
+emit_psubuh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubuh_r_r_r(dst, src, src2)) }
 inst_psubuw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSUBUW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psubuw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psubuw_r_r_r(dst, src, src2)) }
+emit_psubuw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psubuw_r_r_r(dst, src, src2)) }
 inst_psllh_r_r_i5          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .PSLLH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_psllh_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_psllh_r_r_i5(dst, src, imm)) }
+emit_psllh_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_psllh_r_r_i5(dst, src, imm)) }
 inst_psrlh_r_r_i5          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .PSRLH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_psrlh_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_psrlh_r_r_i5(dst, src, imm)) }
+emit_psrlh_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_psrlh_r_r_i5(dst, src, imm)) }
 inst_psrah_r_r_i5          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .PSRAH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_psrah_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_psrah_r_r_i5(dst, src, imm)) }
+emit_psrah_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_psrah_r_r_i5(dst, src, imm)) }
 inst_psllw_r_r_i5          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .PSLLW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_psllw_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_psllw_r_r_i5(dst, src, imm)) }
+emit_psllw_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_psllw_r_r_i5(dst, src, imm)) }
 inst_psrlw_r_r_i5          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .PSRLW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_psrlw_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_psrlw_r_r_i5(dst, src, imm)) }
+emit_psrlw_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_psrlw_r_r_i5(dst, src, imm)) }
 inst_psraw_r_r_i5          :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .PSRAW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_psraw_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_psraw_r_r_i5(dst, src, imm)) }
+emit_psraw_r_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_psraw_r_r_i5(dst, src, imm)) }
 inst_psllvw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSLLVW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psllvw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psllvw_r_r_r(dst, src, src2)) }
+emit_psllvw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psllvw_r_r_r(dst, src, src2)) }
 inst_psrlvw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSRLVW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psrlvw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psrlvw_r_r_r(dst, src, src2)) }
+emit_psrlvw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psrlvw_r_r_r(dst, src, src2)) }
 inst_psravw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PSRAVW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_psravw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_psravw_r_r_r(dst, src, src2)) }
+emit_psravw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_psravw_r_r_r(dst, src, src2)) }
 inst_qfsrv_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .QFSRV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_qfsrv_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_qfsrv_r_r_r(dst, src, src2)) }
+emit_qfsrv_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_qfsrv_r_r_r(dst, src, src2)) }
 inst_pand_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PAND, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pand_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pand_r_r_r(dst, src, src2)) }
+emit_pand_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pand_r_r_r(dst, src, src2)) }
 inst_por_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .POR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_por_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_por_r_r_r(dst, src, src2)) }
+emit_por_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_por_r_r_r(dst, src, src2)) }
 inst_pxor_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PXOR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pxor_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pxor_r_r_r(dst, src, src2)) }
+emit_pxor_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pxor_r_r_r(dst, src, src2)) }
 inst_pnor_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PNOR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pnor_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pnor_r_r_r(dst, src, src2)) }
+emit_pnor_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pnor_r_r_r(dst, src, src2)) }
 inst_pceqb_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PCEQB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pceqb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pceqb_r_r_r(dst, src, src2)) }
+emit_pceqb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pceqb_r_r_r(dst, src, src2)) }
 inst_pceqh_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PCEQH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pceqh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pceqh_r_r_r(dst, src, src2)) }
+emit_pceqh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pceqh_r_r_r(dst, src, src2)) }
 inst_pceqw_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PCEQW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pceqw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pceqw_r_r_r(dst, src, src2)) }
+emit_pceqw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pceqw_r_r_r(dst, src, src2)) }
 inst_pcgtb_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PCGTB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pcgtb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pcgtb_r_r_r(dst, src, src2)) }
+emit_pcgtb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pcgtb_r_r_r(dst, src, src2)) }
 inst_pcgth_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PCGTH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pcgth_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pcgth_r_r_r(dst, src, src2)) }
+emit_pcgth_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pcgth_r_r_r(dst, src, src2)) }
 inst_pcgtw_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PCGTW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pcgtw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pcgtw_r_r_r(dst, src, src2)) }
+emit_pcgtw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pcgtw_r_r_r(dst, src, src2)) }
 inst_pmultw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMULTW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmultw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmultw_r_r_r(dst, src, src2)) }
+emit_pmultw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmultw_r_r_r(dst, src, src2)) }
 inst_pmultuw_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMULTUW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmultuw_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmultuw_r_r_r(dst, src, src2)) }
+emit_pmultuw_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmultuw_r_r_r(dst, src, src2)) }
 inst_pmulth_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMULTH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmulth_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmulth_r_r_r(dst, src, src2)) }
+emit_pmulth_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmulth_r_r_r(dst, src, src2)) }
 inst_pmaddw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMADDW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmaddw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmaddw_r_r_r(dst, src, src2)) }
+emit_pmaddw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmaddw_r_r_r(dst, src, src2)) }
 inst_pmadduw_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMADDUW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmadduw_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmadduw_r_r_r(dst, src, src2)) }
+emit_pmadduw_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmadduw_r_r_r(dst, src, src2)) }
 inst_pmaddh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMADDH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmaddh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmaddh_r_r_r(dst, src, src2)) }
+emit_pmaddh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmaddh_r_r_r(dst, src, src2)) }
 inst_pmsubw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMSUBW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmsubw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmsubw_r_r_r(dst, src, src2)) }
+emit_pmsubw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmsubw_r_r_r(dst, src, src2)) }
 inst_pmsubh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMSUBH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmsubh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmsubh_r_r_r(dst, src, src2)) }
+emit_pmsubh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmsubh_r_r_r(dst, src, src2)) }
 inst_phmadh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PHMADH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_phmadh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_phmadh_r_r_r(dst, src, src2)) }
+emit_phmadh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_phmadh_r_r_r(dst, src, src2)) }
 inst_phmsbh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PHMSBH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_phmsbh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_phmsbh_r_r_r(dst, src, src2)) }
+emit_phmsbh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_phmsbh_r_r_r(dst, src, src2)) }
 inst_pdivw_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PDIVW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pdivw_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pdivw_r_r(dst, src)) }
+emit_pdivw_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pdivw_r_r(dst, src)) }
 inst_pdivuw_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PDIVUW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pdivuw_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pdivuw_r_r(dst, src)) }
+emit_pdivuw_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pdivuw_r_r(dst, src)) }
 inst_pdivbw_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PDIVBW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pdivbw_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pdivbw_r_r(dst, src)) }
+emit_pdivbw_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pdivbw_r_r(dst, src)) }
 inst_pcpyld_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PCPYLD, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pcpyld_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pcpyld_r_r_r(dst, src, src2)) }
+emit_pcpyld_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pcpyld_r_r_r(dst, src, src2)) }
 inst_pcpyud_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PCPYUD, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pcpyud_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pcpyud_r_r_r(dst, src, src2)) }
+emit_pcpyud_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pcpyud_r_r_r(dst, src, src2)) }
 inst_pcpyh_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PCPYH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pcpyh_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pcpyh_r_r(dst, src)) }
+emit_pcpyh_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pcpyh_r_r(dst, src)) }
 inst_pinth_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PINTH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pinth_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pinth_r_r_r(dst, src, src2)) }
+emit_pinth_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pinth_r_r_r(dst, src, src2)) }
 inst_pintoh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PINTOH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pintoh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pintoh_r_r_r(dst, src, src2)) }
+emit_pintoh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pintoh_r_r_r(dst, src, src2)) }
 inst_pexeh_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PEXEH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pexeh_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pexeh_r_r(dst, src)) }
+emit_pexeh_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pexeh_r_r(dst, src)) }
 inst_pexew_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PEXEW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pexew_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pexew_r_r(dst, src)) }
+emit_pexew_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pexew_r_r(dst, src)) }
 inst_pexch_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PEXCH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pexch_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pexch_r_r(dst, src)) }
+emit_pexch_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pexch_r_r(dst, src)) }
 inst_pexcw_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PEXCW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pexcw_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pexcw_r_r(dst, src)) }
+emit_pexcw_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pexcw_r_r(dst, src)) }
 inst_prot3w_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PROT3W, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_prot3w_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_prot3w_r_r(dst, src)) }
+emit_prot3w_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_prot3w_r_r(dst, src)) }
 inst_ppacb_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PPACB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_ppacb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_ppacb_r_r_r(dst, src, src2)) }
+emit_ppacb_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_ppacb_r_r_r(dst, src, src2)) }
 inst_ppach_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PPACH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_ppach_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_ppach_r_r_r(dst, src, src2)) }
+emit_ppach_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_ppach_r_r_r(dst, src, src2)) }
 inst_ppacw_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PPACW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_ppacw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_ppacw_r_r_r(dst, src, src2)) }
+emit_ppacw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_ppacw_r_r_r(dst, src, src2)) }
 inst_ppac5_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PPAC5, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_ppac5_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_ppac5_r_r_r(dst, src, src2)) }
+emit_ppac5_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_ppac5_r_r_r(dst, src, src2)) }
 inst_pext5_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PEXT5, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pext5_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pext5_r_r_r(dst, src, src2)) }
+emit_pext5_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pext5_r_r_r(dst, src, src2)) }
 inst_pextlb_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PEXTLB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pextlb_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pextlb_r_r_r(dst, src, src2)) }
+emit_pextlb_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pextlb_r_r_r(dst, src, src2)) }
 inst_pextlh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PEXTLH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pextlh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pextlh_r_r_r(dst, src, src2)) }
+emit_pextlh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pextlh_r_r_r(dst, src, src2)) }
 inst_pextlw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PEXTLW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pextlw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pextlw_r_r_r(dst, src, src2)) }
+emit_pextlw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pextlw_r_r_r(dst, src, src2)) }
 inst_pextub_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PEXTUB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pextub_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pextub_r_r_r(dst, src, src2)) }
+emit_pextub_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pextub_r_r_r(dst, src, src2)) }
 inst_pextuh_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PEXTUH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pextuh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pextuh_r_r_r(dst, src, src2)) }
+emit_pextuh_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pextuh_r_r_r(dst, src, src2)) }
 inst_pextuw_r_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PEXTUW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pextuw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pextuw_r_r_r(dst, src, src2)) }
+emit_pextuw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pextuw_r_r_r(dst, src, src2)) }
 inst_pmfhi_r               :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFHI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmfhi_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmfhi_r(dst)) }
+emit_pmfhi_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmfhi_r(dst)) }
 inst_pmflo_r               :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFLO, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmflo_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmflo_r(dst)) }
+emit_pmflo_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmflo_r(dst)) }
 inst_pmthi_r               :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMTHI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmthi_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmthi_r(dst)) }
+emit_pmthi_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmthi_r(dst)) }
 inst_pmtlo_r               :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMTLO, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_pmtlo_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmtlo_r(dst)) }
+emit_pmtlo_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_pmtlo_r(dst)) }
 inst_plzcw_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PLZCW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_plzcw_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_plzcw_r_r(dst, src)) }
+emit_plzcw_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_plzcw_r_r(dst, src)) }
 inst_pabsh_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PABSH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pabsh_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pabsh_r_r(dst, src)) }
+emit_pabsh_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pabsh_r_r(dst, src)) }
 inst_pabsw_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PABSW, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_pabsw_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_pabsw_r_r(dst, src)) }
+emit_pabsw_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_pabsw_r_r(dst, src)) }
 inst_pmaxh_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMAXH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmaxh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmaxh_r_r_r(dst, src, src2)) }
+emit_pmaxh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmaxh_r_r_r(dst, src, src2)) }
 inst_pmaxw_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMAXW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pmaxw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pmaxw_r_r_r(dst, src, src2)) }
+emit_pmaxw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pmaxw_r_r_r(dst, src, src2)) }
 inst_pminh_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMINH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pminh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pminh_r_r_r(dst, src, src2)) }
+emit_pminh_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pminh_r_r_r(dst, src, src2)) }
 inst_pminw_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PMINW, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pminw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pminw_r_r_r(dst, src, src2)) }
+emit_pminw_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pminw_r_r_r(dst, src, src2)) }
 inst_mfsa_r                :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MFSA, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mfsa_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mfsa_r(dst)) }
+emit_mfsa_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mfsa_r(dst)) }
 inst_mtsa_r                :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .MTSA, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
-emit_mtsa_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_mtsa_r(dst)) }
+emit_mtsa_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append_elem(instructions, inst_mtsa_r(dst)) }
 inst_mtsab_r_i16           :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MTSAB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_mtsab_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_mtsab_r_i16(dst, imm)) }
+emit_mtsab_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_mtsab_r_i16(dst, imm)) }
 inst_mtsah_r_i16           :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MTSAH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 2), {}, {}}} }
-emit_mtsah_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_mtsah_r_i16(dst, imm)) }
+emit_mtsah_r_i16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_mtsah_r_i16(dst, imm)) }
 inst_addq_ph_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDQ_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addq_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addq_ph_r_r_r(dst, src, src2)) }
+emit_addq_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addq_ph_r_r_r(dst, src, src2)) }
 inst_addq_s_ph_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDQ_S_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addq_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addq_s_ph_r_r_r(dst, src, src2)) }
+emit_addq_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addq_s_ph_r_r_r(dst, src, src2)) }
 inst_addq_s_w_r_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDQ_S_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addq_s_w_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addq_s_w_r_r_r(dst, src, src2)) }
+emit_addq_s_w_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addq_s_w_r_r_r(dst, src, src2)) }
 inst_subq_ph_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUBQ_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_subq_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_subq_ph_r_r_r(dst, src, src2)) }
+emit_subq_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_subq_ph_r_r_r(dst, src, src2)) }
 inst_subq_s_ph_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUBQ_S_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_subq_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_subq_s_ph_r_r_r(dst, src, src2)) }
+emit_subq_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_subq_s_ph_r_r_r(dst, src, src2)) }
 inst_subq_s_w_r_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUBQ_S_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_subq_s_w_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_subq_s_w_r_r_r(dst, src, src2)) }
+emit_subq_s_w_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_subq_s_w_r_r_r(dst, src, src2)) }
 inst_addu_qb_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDU_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addu_qb_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addu_qb_r_r_r(dst, src, src2)) }
+emit_addu_qb_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addu_qb_r_r_r(dst, src, src2)) }
 inst_addu_s_qb_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDU_S_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addu_s_qb_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addu_s_qb_r_r_r(dst, src, src2)) }
+emit_addu_s_qb_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addu_s_qb_r_r_r(dst, src, src2)) }
 inst_addu_ph_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDU_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addu_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addu_ph_r_r_r(dst, src, src2)) }
+emit_addu_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addu_ph_r_r_r(dst, src, src2)) }
 inst_addu_s_ph_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDU_S_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addu_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addu_s_ph_r_r_r(dst, src, src2)) }
+emit_addu_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addu_s_ph_r_r_r(dst, src, src2)) }
 inst_subu_qb_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUBU_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_subu_qb_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_subu_qb_r_r_r(dst, src, src2)) }
+emit_subu_qb_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_subu_qb_r_r_r(dst, src, src2)) }
 inst_subu_s_qb_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUBU_S_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_subu_s_qb_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_subu_s_qb_r_r_r(dst, src, src2)) }
+emit_subu_s_qb_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_subu_s_qb_r_r_r(dst, src, src2)) }
 inst_subu_ph_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUBU_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_subu_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_subu_ph_r_r_r(dst, src, src2)) }
+emit_subu_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_subu_ph_r_r_r(dst, src, src2)) }
 inst_subu_s_ph_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SUBU_S_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_subu_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_subu_s_ph_r_r_r(dst, src, src2)) }
+emit_subu_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_subu_s_ph_r_r_r(dst, src, src2)) }
 inst_addsc_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDSC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addsc_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addsc_r_r_r(dst, src, src2)) }
+emit_addsc_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addsc_r_r_r(dst, src, src2)) }
 inst_addwc_r_r_r           :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .ADDWC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_addwc_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_addwc_r_r_r(dst, src, src2)) }
+emit_addwc_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_addwc_r_r_r(dst, src, src2)) }
 inst_muleu_s_ph_qbl_r_r_r  :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MULEU_S_PH_QBL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_muleu_s_ph_qbl_r_r_r  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_muleu_s_ph_qbl_r_r_r(dst, src, src2)) }
+emit_muleu_s_ph_qbl_r_r_r  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_muleu_s_ph_qbl_r_r_r(dst, src, src2)) }
 inst_muleu_s_ph_qbr_r_r_r  :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MULEU_S_PH_QBR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_muleu_s_ph_qbr_r_r_r  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_muleu_s_ph_qbr_r_r_r(dst, src, src2)) }
+emit_muleu_s_ph_qbr_r_r_r  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_muleu_s_ph_qbr_r_r_r(dst, src, src2)) }
 inst_muleq_s_w_phl_r_r_r   :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MULEQ_S_W_PHL, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_muleq_s_w_phl_r_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_muleq_s_w_phl_r_r_r(dst, src, src2)) }
+emit_muleq_s_w_phl_r_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_muleq_s_w_phl_r_r_r(dst, src, src2)) }
 inst_muleq_s_w_phr_r_r_r   :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MULEQ_S_W_PHR, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_muleq_s_w_phr_r_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_muleq_s_w_phr_r_r_r(dst, src, src2)) }
+emit_muleq_s_w_phr_r_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_muleq_s_w_phr_r_r_r(dst, src, src2)) }
 inst_mulq_rs_ph_r_r_r      :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MULQ_RS_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_mulq_rs_ph_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_mulq_rs_ph_r_r_r(dst, src, src2)) }
+emit_mulq_rs_ph_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_mulq_rs_ph_r_r_r(dst, src, src2)) }
 inst_mulq_s_ph_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MULQ_S_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_mulq_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_mulq_s_ph_r_r_r(dst, src, src2)) }
+emit_mulq_s_ph_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_mulq_s_ph_r_r_r(dst, src, src2)) }
 inst_mulsaq_s_w_ph_i5_r_r  :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MULSAQ_S_W_PH, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_mulsaq_s_w_ph_i5_r_r  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_mulsaq_s_w_ph_i5_r_r(imm, dst, src)) }
+emit_mulsaq_s_w_ph_i5_r_r  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_mulsaq_s_w_ph_i5_r_r(imm, dst, src)) }
 inst_dpaq_s_w_ph_i5_r_r    :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPAQ_S_W_PH, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpaq_s_w_ph_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpaq_s_w_ph_i5_r_r(imm, dst, src)) }
+emit_dpaq_s_w_ph_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpaq_s_w_ph_i5_r_r(imm, dst, src)) }
 inst_dpsq_s_w_ph_i5_r_r    :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPSQ_S_W_PH, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpsq_s_w_ph_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpsq_s_w_ph_i5_r_r(imm, dst, src)) }
+emit_dpsq_s_w_ph_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpsq_s_w_ph_i5_r_r(imm, dst, src)) }
 inst_dpaq_sa_l_w_i5_r_r    :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPAQ_SA_L_W, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpaq_sa_l_w_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpaq_sa_l_w_i5_r_r(imm, dst, src)) }
+emit_dpaq_sa_l_w_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpaq_sa_l_w_i5_r_r(imm, dst, src)) }
 inst_dpsq_sa_l_w_i5_r_r    :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPSQ_SA_L_W, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpsq_sa_l_w_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpsq_sa_l_w_i5_r_r(imm, dst, src)) }
+emit_dpsq_sa_l_w_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpsq_sa_l_w_i5_r_r(imm, dst, src)) }
 inst_dpau_h_qbl_i5_r_r     :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPAU_H_QBL, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpau_h_qbl_i5_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpau_h_qbl_i5_r_r(imm, dst, src)) }
+emit_dpau_h_qbl_i5_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpau_h_qbl_i5_r_r(imm, dst, src)) }
 inst_dpau_h_qbr_i5_r_r     :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPAU_H_QBR, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpau_h_qbr_i5_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpau_h_qbr_i5_r_r(imm, dst, src)) }
+emit_dpau_h_qbr_i5_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpau_h_qbr_i5_r_r(imm, dst, src)) }
 inst_dpsu_h_qbl_i5_r_r     :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPSU_H_QBL, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpsu_h_qbl_i5_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpsu_h_qbl_i5_r_r(imm, dst, src)) }
+emit_dpsu_h_qbl_i5_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpsu_h_qbl_i5_r_r(imm, dst, src)) }
 inst_dpsu_h_qbr_i5_r_r     :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPSU_H_QBR, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpsu_h_qbr_i5_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpsu_h_qbr_i5_r_r(imm, dst, src)) }
+emit_dpsu_h_qbr_i5_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpsu_h_qbr_i5_r_r(imm, dst, src)) }
 inst_dpa_w_ph_i5_r_r       :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPA_W_PH, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpa_w_ph_i5_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpa_w_ph_i5_r_r(imm, dst, src)) }
+emit_dpa_w_ph_i5_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpa_w_ph_i5_r_r(imm, dst, src)) }
 inst_dps_w_ph_i5_r_r       :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPS_W_PH, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dps_w_ph_i5_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dps_w_ph_i5_r_r(imm, dst, src)) }
+emit_dps_w_ph_i5_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dps_w_ph_i5_r_r(imm, dst, src)) }
 inst_dpax_w_ph_i5_r_r      :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPAX_W_PH, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpax_w_ph_i5_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpax_w_ph_i5_r_r(imm, dst, src)) }
+emit_dpax_w_ph_i5_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpax_w_ph_i5_r_r(imm, dst, src)) }
 inst_dpsx_w_ph_i5_r_r      :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DPSX_W_PH, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_dpsx_w_ph_i5_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_dpsx_w_ph_i5_r_r(imm, dst, src)) }
+emit_dpsx_w_ph_i5_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_dpsx_w_ph_i5_r_r(imm, dst, src)) }
 inst_maq_s_w_phl_i5_r_r    :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MAQ_S_W_PHL, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_maq_s_w_phl_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_maq_s_w_phl_i5_r_r(imm, dst, src)) }
+emit_maq_s_w_phl_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_maq_s_w_phl_i5_r_r(imm, dst, src)) }
 inst_maq_s_w_phr_i5_r_r    :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MAQ_S_W_PHR, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_maq_s_w_phr_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_maq_s_w_phr_i5_r_r(imm, dst, src)) }
+emit_maq_s_w_phr_i5_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_maq_s_w_phr_i5_r_r(imm, dst, src)) }
 inst_maq_sa_w_phl_i5_r_r   :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MAQ_SA_W_PHL, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_maq_sa_w_phl_i5_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_maq_sa_w_phl_i5_r_r(imm, dst, src)) }
+emit_maq_sa_w_phl_i5_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_maq_sa_w_phl_i5_r_r(imm, dst, src)) }
 inst_maq_sa_w_phr_i5_r_r   :: #force_inline proc "contextless" (imm: i64, dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MAQ_SA_W_PHR, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), op_gpr(src), {}}} }
-emit_maq_sa_w_phr_i5_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append(instructions, inst_maq_sa_w_phr_i5_r_r(imm, dst, src)) }
+emit_maq_sa_w_phr_i5_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR, src: GPR) { append_elem(instructions, inst_maq_sa_w_phr_i5_r_r(imm, dst, src)) }
 inst_extr_w_r_i5_i5        :: #force_inline proc "contextless" (dst: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTR_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_imm(imm2, 1), {}}} }
-emit_extr_w_r_i5_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append(instructions, inst_extr_w_r_i5_i5(dst, imm, imm2)) }
+emit_extr_w_r_i5_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_extr_w_r_i5_i5(dst, imm, imm2)) }
 inst_extr_r_w_r_i5_i5      :: #force_inline proc "contextless" (dst: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTR_R_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_imm(imm2, 1), {}}} }
-emit_extr_r_w_r_i5_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append(instructions, inst_extr_r_w_r_i5_i5(dst, imm, imm2)) }
+emit_extr_r_w_r_i5_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_extr_r_w_r_i5_i5(dst, imm, imm2)) }
 inst_extr_rs_w_r_i5_i5     :: #force_inline proc "contextless" (dst: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTR_RS_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_imm(imm2, 1), {}}} }
-emit_extr_rs_w_r_i5_i5     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append(instructions, inst_extr_rs_w_r_i5_i5(dst, imm, imm2)) }
+emit_extr_rs_w_r_i5_i5     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_extr_rs_w_r_i5_i5(dst, imm, imm2)) }
 inst_extr_s_h_r_i5_i5      :: #force_inline proc "contextless" (dst: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTR_S_H, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_imm(imm2, 1), {}}} }
-emit_extr_s_h_r_i5_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append(instructions, inst_extr_s_h_r_i5_i5(dst, imm, imm2)) }
+emit_extr_s_h_r_i5_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_extr_s_h_r_i5_i5(dst, imm, imm2)) }
 inst_extrv_w_r_i5_r        :: #force_inline proc "contextless" (dst: GPR, imm: i64, src: GPR) -> Instruction { return Instruction{mnemonic = .EXTRV_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_gpr(src), {}}} }
-emit_extrv_w_r_i5_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append(instructions, inst_extrv_w_r_i5_r(dst, imm, src)) }
+emit_extrv_w_r_i5_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append_elem(instructions, inst_extrv_w_r_i5_r(dst, imm, src)) }
 inst_extrv_r_w_r_i5_r      :: #force_inline proc "contextless" (dst: GPR, imm: i64, src: GPR) -> Instruction { return Instruction{mnemonic = .EXTRV_R_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_gpr(src), {}}} }
-emit_extrv_r_w_r_i5_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append(instructions, inst_extrv_r_w_r_i5_r(dst, imm, src)) }
+emit_extrv_r_w_r_i5_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append_elem(instructions, inst_extrv_r_w_r_i5_r(dst, imm, src)) }
 inst_extrv_rs_w_r_i5_r     :: #force_inline proc "contextless" (dst: GPR, imm: i64, src: GPR) -> Instruction { return Instruction{mnemonic = .EXTRV_RS_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_gpr(src), {}}} }
-emit_extrv_rs_w_r_i5_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append(instructions, inst_extrv_rs_w_r_i5_r(dst, imm, src)) }
+emit_extrv_rs_w_r_i5_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append_elem(instructions, inst_extrv_rs_w_r_i5_r(dst, imm, src)) }
 inst_extrv_s_h_r_i5_r      :: #force_inline proc "contextless" (dst: GPR, imm: i64, src: GPR) -> Instruction { return Instruction{mnemonic = .EXTRV_S_H, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_gpr(src), {}}} }
-emit_extrv_s_h_r_i5_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append(instructions, inst_extrv_s_h_r_i5_r(dst, imm, src)) }
+emit_extrv_s_h_r_i5_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append_elem(instructions, inst_extrv_s_h_r_i5_r(dst, imm, src)) }
 inst_extp_r_i5_i5          :: #force_inline proc "contextless" (dst: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTP, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_imm(imm2, 1), {}}} }
-emit_extp_r_i5_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append(instructions, inst_extp_r_i5_i5(dst, imm, imm2)) }
+emit_extp_r_i5_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_extp_r_i5_i5(dst, imm, imm2)) }
 inst_extpv_r_i5_r          :: #force_inline proc "contextless" (dst: GPR, imm: i64, src: GPR) -> Instruction { return Instruction{mnemonic = .EXTPV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_gpr(src), {}}} }
-emit_extpv_r_i5_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append(instructions, inst_extpv_r_i5_r(dst, imm, src)) }
+emit_extpv_r_i5_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append_elem(instructions, inst_extpv_r_i5_r(dst, imm, src)) }
 inst_extpdp_r_i5_i5        :: #force_inline proc "contextless" (dst: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTPDP, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_imm(imm2, 1), {}}} }
-emit_extpdp_r_i5_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append(instructions, inst_extpdp_r_i5_i5(dst, imm, imm2)) }
+emit_extpdp_r_i5_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_extpdp_r_i5_i5(dst, imm, imm2)) }
 inst_extpdpv_r_i5_r        :: #force_inline proc "contextless" (dst: GPR, imm: i64, src: GPR) -> Instruction { return Instruction{mnemonic = .EXTPDPV, operand_count = 3, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), op_gpr(src), {}}} }
-emit_extpdpv_r_i5_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append(instructions, inst_extpdpv_r_i5_r(dst, imm, src)) }
+emit_extpdpv_r_i5_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64, src: GPR) { append_elem(instructions, inst_extpdpv_r_i5_r(dst, imm, src)) }
 inst_shilo_i5_i5           :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .SHILO, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_imm(imm2, 1), {}, {}}} }
-emit_shilo_i5_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_shilo_i5_i5(imm, imm2)) }
+emit_shilo_i5_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_shilo_i5_i5(imm, imm2)) }
 inst_shilov_i5_r           :: #force_inline proc "contextless" (imm: i64, dst: GPR) -> Instruction { return Instruction{mnemonic = .SHILOV, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_gpr(dst), {}, {}}} }
-emit_shilov_i5_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR) { append(instructions, inst_shilov_i5_r(imm, dst)) }
+emit_shilov_i5_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: GPR) { append_elem(instructions, inst_shilov_i5_r(imm, dst)) }
 inst_mthlip_r_i5           :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MTHLIP, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), {}, {}}} }
-emit_mthlip_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_mthlip_r_i5(dst, imm)) }
+emit_mthlip_r_i5           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_mthlip_r_i5(dst, imm)) }
 inst_wrdsp_r_i5            :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .WRDSP, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), {}, {}}} }
-emit_wrdsp_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_wrdsp_r_i5(dst, imm)) }
+emit_wrdsp_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_wrdsp_r_i5(dst, imm)) }
 inst_rddsp_r_i5            :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .RDDSP, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), {}, {}}} }
-emit_rddsp_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_rddsp_r_i5(dst, imm)) }
+emit_rddsp_r_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_rddsp_r_i5(dst, imm)) }
 inst_precrq_qb_ph_r_r_r    :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PRECRQ_QB_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_precrq_qb_ph_r_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_precrq_qb_ph_r_r_r(dst, src, src2)) }
+emit_precrq_qb_ph_r_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_precrq_qb_ph_r_r_r(dst, src, src2)) }
 inst_precrq_ph_w_r_r_r     :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PRECRQ_PH_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_precrq_ph_w_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_precrq_ph_w_r_r_r(dst, src, src2)) }
+emit_precrq_ph_w_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_precrq_ph_w_r_r_r(dst, src, src2)) }
 inst_precrqu_s_qb_ph_r_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PRECRQU_S_QB_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_precrqu_s_qb_ph_r_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_precrqu_s_qb_ph_r_r_r(dst, src, src2)) }
+emit_precrqu_s_qb_ph_r_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_precrqu_s_qb_ph_r_r_r(dst, src, src2)) }
 inst_preceq_w_phl_r_r      :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQ_W_PHL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_preceq_w_phl_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceq_w_phl_r_r(dst, src)) }
+emit_preceq_w_phl_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_preceq_w_phl_r_r(dst, src)) }
 inst_preceq_w_phr_r_r      :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQ_W_PHR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_preceq_w_phr_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceq_w_phr_r_r(dst, src)) }
+emit_preceq_w_phr_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_preceq_w_phr_r_r(dst, src)) }
 inst_precequ_ph_qbl_r_r    :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQU_PH_QBL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_precequ_ph_qbl_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_precequ_ph_qbl_r_r(dst, src)) }
+emit_precequ_ph_qbl_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_precequ_ph_qbl_r_r(dst, src)) }
 inst_precequ_ph_qbr_r_r    :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQU_PH_QBR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_precequ_ph_qbr_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_precequ_ph_qbr_r_r(dst, src)) }
+emit_precequ_ph_qbr_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_precequ_ph_qbr_r_r(dst, src)) }
 inst_precequ_ph_qbla_r_r   :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQU_PH_QBLA, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_precequ_ph_qbla_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_precequ_ph_qbla_r_r(dst, src)) }
+emit_precequ_ph_qbla_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_precequ_ph_qbla_r_r(dst, src)) }
 inst_precequ_ph_qbra_r_r   :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQU_PH_QBRA, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_precequ_ph_qbra_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_precequ_ph_qbra_r_r(dst, src)) }
+emit_precequ_ph_qbra_r_r   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_precequ_ph_qbra_r_r(dst, src)) }
 inst_preceu_ph_qbl_r_r     :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEU_PH_QBL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_preceu_ph_qbl_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceu_ph_qbl_r_r(dst, src)) }
+emit_preceu_ph_qbl_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_preceu_ph_qbl_r_r(dst, src)) }
 inst_preceu_ph_qbr_r_r     :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEU_PH_QBR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_preceu_ph_qbr_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceu_ph_qbr_r_r(dst, src)) }
+emit_preceu_ph_qbr_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_preceu_ph_qbr_r_r(dst, src)) }
 inst_preceu_ph_qbla_r_r    :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEU_PH_QBLA, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_preceu_ph_qbla_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceu_ph_qbla_r_r(dst, src)) }
+emit_preceu_ph_qbla_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_preceu_ph_qbla_r_r(dst, src)) }
 inst_preceu_ph_qbra_r_r    :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEU_PH_QBRA, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_preceu_ph_qbra_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceu_ph_qbra_r_r(dst, src)) }
+emit_preceu_ph_qbra_r_r    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_preceu_ph_qbra_r_r(dst, src)) }
 inst_precrq_rs_ph_w_r_r_r  :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PRECRQ_RS_PH_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_precrq_rs_ph_w_r_r_r  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_precrq_rs_ph_w_r_r_r(dst, src, src2)) }
+emit_precrq_rs_ph_w_r_r_r  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_precrq_rs_ph_w_r_r_r(dst, src, src2)) }
 inst_cmpu_eq_qb_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CMPU_EQ_QB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_cmpu_eq_qb_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_cmpu_eq_qb_r_r(dst, src)) }
+emit_cmpu_eq_qb_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_cmpu_eq_qb_r_r(dst, src)) }
 inst_cmpu_lt_qb_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CMPU_LT_QB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_cmpu_lt_qb_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_cmpu_lt_qb_r_r(dst, src)) }
+emit_cmpu_lt_qb_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_cmpu_lt_qb_r_r(dst, src)) }
 inst_cmpu_le_qb_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CMPU_LE_QB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_cmpu_le_qb_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_cmpu_le_qb_r_r(dst, src)) }
+emit_cmpu_le_qb_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_cmpu_le_qb_r_r(dst, src)) }
 inst_cmp_eq_ph_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CMP_EQ_PH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_cmp_eq_ph_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_cmp_eq_ph_r_r(dst, src)) }
+emit_cmp_eq_ph_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_cmp_eq_ph_r_r(dst, src)) }
 inst_cmp_lt_ph_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CMP_LT_PH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_cmp_lt_ph_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_cmp_lt_ph_r_r(dst, src)) }
+emit_cmp_lt_ph_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_cmp_lt_ph_r_r(dst, src)) }
 inst_cmp_le_ph_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CMP_LE_PH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_cmp_le_ph_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_cmp_le_ph_r_r(dst, src)) }
+emit_cmp_le_ph_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_cmp_le_ph_r_r(dst, src)) }
 inst_cmpgu_eq_qb_r_r_r     :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .CMPGU_EQ_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_cmpgu_eq_qb_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_cmpgu_eq_qb_r_r_r(dst, src, src2)) }
+emit_cmpgu_eq_qb_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_cmpgu_eq_qb_r_r_r(dst, src, src2)) }
 inst_cmpgu_lt_qb_r_r_r     :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .CMPGU_LT_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_cmpgu_lt_qb_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_cmpgu_lt_qb_r_r_r(dst, src, src2)) }
+emit_cmpgu_lt_qb_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_cmpgu_lt_qb_r_r_r(dst, src, src2)) }
 inst_cmpgu_le_qb_r_r_r     :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .CMPGU_LE_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_cmpgu_le_qb_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_cmpgu_le_qb_r_r_r(dst, src, src2)) }
+emit_cmpgu_le_qb_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_cmpgu_le_qb_r_r_r(dst, src, src2)) }
 inst_pick_qb_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PICK_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pick_qb_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pick_qb_r_r_r(dst, src, src2)) }
+emit_pick_qb_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pick_qb_r_r_r(dst, src, src2)) }
 inst_pick_ph_r_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PICK_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_pick_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_pick_ph_r_r_r(dst, src, src2)) }
+emit_pick_ph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_pick_ph_r_r_r(dst, src, src2)) }
 inst_shll_qb_r_r_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHLL_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shll_qb_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shll_qb_r_r_i5(dst, src, imm)) }
+emit_shll_qb_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shll_qb_r_r_i5(dst, src, imm)) }
 inst_shll_ph_r_r_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHLL_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shll_ph_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shll_ph_r_r_i5(dst, src, imm)) }
+emit_shll_ph_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shll_ph_r_r_i5(dst, src, imm)) }
 inst_shll_s_ph_r_r_i5      :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHLL_S_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shll_s_ph_r_r_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shll_s_ph_r_r_i5(dst, src, imm)) }
+emit_shll_s_ph_r_r_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shll_s_ph_r_r_i5(dst, src, imm)) }
 inst_shll_s_w_r_r_i5       :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHLL_S_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shll_s_w_r_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shll_s_w_r_r_i5(dst, src, imm)) }
+emit_shll_s_w_r_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shll_s_w_r_r_i5(dst, src, imm)) }
 inst_shllv_qb_r_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHLLV_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shllv_qb_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shllv_qb_r_r_r(dst, src, src2)) }
+emit_shllv_qb_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shllv_qb_r_r_r(dst, src, src2)) }
 inst_shllv_ph_r_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHLLV_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shllv_ph_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shllv_ph_r_r_r(dst, src, src2)) }
+emit_shllv_ph_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shllv_ph_r_r_r(dst, src, src2)) }
 inst_shllv_s_ph_r_r_r      :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHLLV_S_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shllv_s_ph_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shllv_s_ph_r_r_r(dst, src, src2)) }
+emit_shllv_s_ph_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shllv_s_ph_r_r_r(dst, src, src2)) }
 inst_shllv_s_w_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHLLV_S_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shllv_s_w_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shllv_s_w_r_r_r(dst, src, src2)) }
+emit_shllv_s_w_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shllv_s_w_r_r_r(dst, src, src2)) }
 inst_shrl_qb_r_r_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRL_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shrl_qb_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shrl_qb_r_r_i5(dst, src, imm)) }
+emit_shrl_qb_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shrl_qb_r_r_i5(dst, src, imm)) }
 inst_shrl_ph_r_r_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRL_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shrl_ph_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shrl_ph_r_r_i5(dst, src, imm)) }
+emit_shrl_ph_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shrl_ph_r_r_i5(dst, src, imm)) }
 inst_shrlv_qb_r_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHRLV_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shrlv_qb_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shrlv_qb_r_r_r(dst, src, src2)) }
+emit_shrlv_qb_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shrlv_qb_r_r_r(dst, src, src2)) }
 inst_shrlv_ph_r_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHRLV_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shrlv_ph_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shrlv_ph_r_r_r(dst, src, src2)) }
+emit_shrlv_ph_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shrlv_ph_r_r_r(dst, src, src2)) }
 inst_shra_qb_r_r_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRA_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shra_qb_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shra_qb_r_r_i5(dst, src, imm)) }
+emit_shra_qb_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shra_qb_r_r_i5(dst, src, imm)) }
 inst_shra_r_qb_r_r_i5      :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRA_R_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shra_r_qb_r_r_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shra_r_qb_r_r_i5(dst, src, imm)) }
+emit_shra_r_qb_r_r_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shra_r_qb_r_r_i5(dst, src, imm)) }
 inst_shra_ph_r_r_i5        :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRA_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shra_ph_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shra_ph_r_r_i5(dst, src, imm)) }
+emit_shra_ph_r_r_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shra_ph_r_r_i5(dst, src, imm)) }
 inst_shra_r_ph_r_r_i5      :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRA_R_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shra_r_ph_r_r_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shra_r_ph_r_r_i5(dst, src, imm)) }
+emit_shra_r_ph_r_r_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shra_r_ph_r_r_i5(dst, src, imm)) }
 inst_shra_r_w_r_r_i5       :: #force_inline proc "contextless" (dst: GPR, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SHRA_R_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_shra_r_w_r_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append(instructions, inst_shra_r_w_r_r_i5(dst, src, imm)) }
+emit_shra_r_w_r_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, imm: i64) { append_elem(instructions, inst_shra_r_w_r_r_i5(dst, src, imm)) }
 inst_shrav_qb_r_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHRAV_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shrav_qb_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shrav_qb_r_r_r(dst, src, src2)) }
+emit_shrav_qb_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shrav_qb_r_r_r(dst, src, src2)) }
 inst_shrav_r_qb_r_r_r      :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHRAV_R_QB, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shrav_r_qb_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shrav_r_qb_r_r_r(dst, src, src2)) }
+emit_shrav_r_qb_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shrav_r_qb_r_r_r(dst, src, src2)) }
 inst_shrav_ph_r_r_r        :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHRAV_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shrav_ph_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shrav_ph_r_r_r(dst, src, src2)) }
+emit_shrav_ph_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shrav_ph_r_r_r(dst, src, src2)) }
 inst_shrav_r_ph_r_r_r      :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHRAV_R_PH, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shrav_r_ph_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shrav_r_ph_r_r_r(dst, src, src2)) }
+emit_shrav_r_ph_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shrav_r_ph_r_r_r(dst, src, src2)) }
 inst_shrav_r_w_r_r_r       :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .SHRAV_R_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_shrav_r_w_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_shrav_r_w_r_r_r(dst, src, src2)) }
+emit_shrav_r_w_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_shrav_r_w_r_r_r(dst, src, src2)) }
 inst_lbux_r_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .LBUX, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_lbux_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_lbux_r_r_r(dst, src, src2)) }
+emit_lbux_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_lbux_r_r_r(dst, src, src2)) }
 inst_lhx_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .LHX, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_lhx_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_lhx_r_r_r(dst, src, src2)) }
+emit_lhx_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_lhx_r_r_r(dst, src, src2)) }
 inst_lwx_r_r_r             :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .LWX, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
-emit_lwx_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_lwx_r_r_r(dst, src, src2)) }
+emit_lwx_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append_elem(instructions, inst_lwx_r_r_r(dst, src, src2)) }
 inst_bposge32_rel          :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .BPOSGE32, operand_count = 1, length = 4, ops = {op_label(target), {}, {}, {}}} }
-emit_bposge32_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_bposge32_rel(target)) }
+emit_bposge32_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_bposge32_rel(target)) }
 inst_insv_r_r              :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .INSV, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_insv_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_insv_r_r(dst, src)) }
+emit_insv_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_insv_r_r(dst, src)) }
 inst_bitrev_r_r            :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .BITREV, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_bitrev_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_bitrev_r_r(dst, src)) }
+emit_bitrev_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_bitrev_r_r(dst, src)) }
 inst_absq_s_ph_r_r         :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .ABSQ_S_PH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_absq_s_ph_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_absq_s_ph_r_r(dst, src)) }
+emit_absq_s_ph_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_absq_s_ph_r_r(dst, src)) }
 inst_absq_s_w_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .ABSQ_S_W, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_absq_s_w_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_absq_s_w_r_r(dst, src)) }
+emit_absq_s_w_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_absq_s_w_r_r(dst, src)) }
 inst_repl_ph_r_i5          :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .REPL_PH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), {}, {}}} }
-emit_repl_ph_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_repl_ph_r_i5(dst, imm)) }
+emit_repl_ph_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_repl_ph_r_i5(dst, imm)) }
 inst_replv_ph_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .REPLV_PH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_replv_ph_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_replv_ph_r_r(dst, src)) }
+emit_replv_ph_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_replv_ph_r_r(dst, src)) }
 inst_repl_qb_r_i5          :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .REPL_QB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), {}, {}}} }
-emit_repl_qb_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_repl_qb_r_i5(dst, imm)) }
+emit_repl_qb_r_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_repl_qb_r_i5(dst, imm)) }
 inst_replv_qb_r_r          :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .REPLV_QB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
-emit_replv_qb_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_replv_qb_r_r(dst, src)) }
+emit_replv_qb_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append_elem(instructions, inst_replv_qb_r_r(dst, src)) }
 inst_addv_b_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDV_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addv_b_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addv_b_w_w_w(dst, src, src2)) }
+emit_addv_b_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addv_b_w_w_w(dst, src, src2)) }
 inst_addv_h_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDV_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addv_h_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addv_h_w_w_w(dst, src, src2)) }
+emit_addv_h_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addv_h_w_w_w(dst, src, src2)) }
 inst_addv_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDV_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addv_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addv_w_w_w_w(dst, src, src2)) }
+emit_addv_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addv_w_w_w_w(dst, src, src2)) }
 inst_addv_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDV_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addv_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addv_d_w_w_w(dst, src, src2)) }
+emit_addv_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addv_d_w_w_w(dst, src, src2)) }
 inst_subv_b_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBV_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subv_b_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subv_b_w_w_w(dst, src, src2)) }
+emit_subv_b_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subv_b_w_w_w(dst, src, src2)) }
 inst_subv_h_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBV_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subv_h_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subv_h_w_w_w(dst, src, src2)) }
+emit_subv_h_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subv_h_w_w_w(dst, src, src2)) }
 inst_subv_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBV_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subv_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subv_w_w_w_w(dst, src, src2)) }
+emit_subv_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subv_w_w_w_w(dst, src, src2)) }
 inst_subv_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBV_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subv_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subv_d_w_w_w(dst, src, src2)) }
+emit_subv_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subv_d_w_w_w(dst, src, src2)) }
 inst_adds_s_b_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDS_S_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adds_s_b_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adds_s_b_w_w_w(dst, src, src2)) }
+emit_adds_s_b_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adds_s_b_w_w_w(dst, src, src2)) }
 inst_adds_s_h_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDS_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adds_s_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adds_s_h_w_w_w(dst, src, src2)) }
+emit_adds_s_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adds_s_h_w_w_w(dst, src, src2)) }
 inst_adds_s_w_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDS_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adds_s_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adds_s_w_w_w_w(dst, src, src2)) }
+emit_adds_s_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adds_s_w_w_w_w(dst, src, src2)) }
 inst_adds_s_d_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDS_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adds_s_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adds_s_d_w_w_w(dst, src, src2)) }
+emit_adds_s_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adds_s_d_w_w_w(dst, src, src2)) }
 inst_adds_u_b_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDS_U_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adds_u_b_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adds_u_b_w_w_w(dst, src, src2)) }
+emit_adds_u_b_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adds_u_b_w_w_w(dst, src, src2)) }
 inst_adds_u_h_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDS_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adds_u_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adds_u_h_w_w_w(dst, src, src2)) }
+emit_adds_u_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adds_u_h_w_w_w(dst, src, src2)) }
 inst_adds_u_w_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDS_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adds_u_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adds_u_w_w_w_w(dst, src, src2)) }
+emit_adds_u_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adds_u_w_w_w_w(dst, src, src2)) }
 inst_adds_u_d_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDS_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adds_u_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adds_u_d_w_w_w(dst, src, src2)) }
+emit_adds_u_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adds_u_d_w_w_w(dst, src, src2)) }
 inst_subs_s_b_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBS_S_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subs_s_b_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subs_s_b_w_w_w(dst, src, src2)) }
+emit_subs_s_b_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subs_s_b_w_w_w(dst, src, src2)) }
 inst_subs_s_h_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBS_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subs_s_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subs_s_h_w_w_w(dst, src, src2)) }
+emit_subs_s_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subs_s_h_w_w_w(dst, src, src2)) }
 inst_subs_s_w_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBS_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subs_s_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subs_s_w_w_w_w(dst, src, src2)) }
+emit_subs_s_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subs_s_w_w_w_w(dst, src, src2)) }
 inst_subs_s_d_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBS_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subs_s_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subs_s_d_w_w_w(dst, src, src2)) }
+emit_subs_s_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subs_s_d_w_w_w(dst, src, src2)) }
 inst_subs_u_b_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBS_U_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subs_u_b_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subs_u_b_w_w_w(dst, src, src2)) }
+emit_subs_u_b_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subs_u_b_w_w_w(dst, src, src2)) }
 inst_subs_u_h_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBS_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subs_u_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subs_u_h_w_w_w(dst, src, src2)) }
+emit_subs_u_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subs_u_h_w_w_w(dst, src, src2)) }
 inst_subs_u_w_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBS_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subs_u_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subs_u_w_w_w_w(dst, src, src2)) }
+emit_subs_u_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subs_u_w_w_w_w(dst, src, src2)) }
 inst_subs_u_d_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBS_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subs_u_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subs_u_d_w_w_w(dst, src, src2)) }
+emit_subs_u_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subs_u_d_w_w_w(dst, src, src2)) }
 inst_mulv_b_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULV_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulv_b_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulv_b_w_w_w(dst, src, src2)) }
+emit_mulv_b_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulv_b_w_w_w(dst, src, src2)) }
 inst_mulv_h_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULV_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulv_h_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulv_h_w_w_w(dst, src, src2)) }
+emit_mulv_h_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulv_h_w_w_w(dst, src, src2)) }
 inst_mulv_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULV_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulv_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulv_w_w_w_w(dst, src, src2)) }
+emit_mulv_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulv_w_w_w_w(dst, src, src2)) }
 inst_mulv_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULV_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulv_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulv_d_w_w_w(dst, src, src2)) }
+emit_mulv_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulv_d_w_w_w(dst, src, src2)) }
 inst_div_s_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_S_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_s_b_w_w_w(dst, src, src2)) }
+emit_div_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_s_b_w_w_w(dst, src, src2)) }
 inst_div_s_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_s_h_w_w_w(dst, src, src2)) }
+emit_div_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_s_h_w_w_w(dst, src, src2)) }
 inst_div_s_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_s_w_w_w_w(dst, src, src2)) }
+emit_div_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_s_w_w_w_w(dst, src, src2)) }
 inst_div_s_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_s_d_w_w_w(dst, src, src2)) }
+emit_div_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_s_d_w_w_w(dst, src, src2)) }
 inst_div_u_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_U_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_u_b_w_w_w(dst, src, src2)) }
+emit_div_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_u_b_w_w_w(dst, src, src2)) }
 inst_div_u_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_u_h_w_w_w(dst, src, src2)) }
+emit_div_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_u_h_w_w_w(dst, src, src2)) }
 inst_div_u_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_u_w_w_w_w(dst, src, src2)) }
+emit_div_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_u_w_w_w_w(dst, src, src2)) }
 inst_div_u_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_u_d_w_w_w(dst, src, src2)) }
+emit_div_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_u_d_w_w_w(dst, src, src2)) }
 inst_mod_s_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MOD_S_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mod_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mod_s_b_w_w_w(dst, src, src2)) }
+emit_mod_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mod_s_b_w_w_w(dst, src, src2)) }
 inst_mod_s_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MOD_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mod_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mod_s_h_w_w_w(dst, src, src2)) }
+emit_mod_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mod_s_h_w_w_w(dst, src, src2)) }
 inst_mod_s_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MOD_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mod_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mod_s_w_w_w_w(dst, src, src2)) }
+emit_mod_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mod_s_w_w_w_w(dst, src, src2)) }
 inst_mod_s_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MOD_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mod_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mod_s_d_w_w_w(dst, src, src2)) }
+emit_mod_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mod_s_d_w_w_w(dst, src, src2)) }
 inst_mod_u_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MOD_U_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mod_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mod_u_b_w_w_w(dst, src, src2)) }
+emit_mod_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mod_u_b_w_w_w(dst, src, src2)) }
 inst_mod_u_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MOD_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mod_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mod_u_h_w_w_w(dst, src, src2)) }
+emit_mod_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mod_u_h_w_w_w(dst, src, src2)) }
 inst_mod_u_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MOD_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mod_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mod_u_w_w_w_w(dst, src, src2)) }
+emit_mod_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mod_u_w_w_w_w(dst, src, src2)) }
 inst_mod_u_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MOD_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mod_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mod_u_d_w_w_w(dst, src, src2)) }
+emit_mod_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mod_u_d_w_w_w(dst, src, src2)) }
 inst_maddv_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MADDV_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maddv_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maddv_b_w_w_w(dst, src, src2)) }
+emit_maddv_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maddv_b_w_w_w(dst, src, src2)) }
 inst_maddv_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MADDV_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maddv_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maddv_h_w_w_w(dst, src, src2)) }
+emit_maddv_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maddv_h_w_w_w(dst, src, src2)) }
 inst_maddv_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MADDV_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maddv_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maddv_w_w_w_w(dst, src, src2)) }
+emit_maddv_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maddv_w_w_w_w(dst, src, src2)) }
 inst_maddv_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MADDV_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maddv_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maddv_d_w_w_w(dst, src, src2)) }
+emit_maddv_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maddv_d_w_w_w(dst, src, src2)) }
 inst_msubv_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MSUBV_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_msubv_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_msubv_b_w_w_w(dst, src, src2)) }
+emit_msubv_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_msubv_b_w_w_w(dst, src, src2)) }
 inst_msubv_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MSUBV_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_msubv_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_msubv_h_w_w_w(dst, src, src2)) }
+emit_msubv_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_msubv_h_w_w_w(dst, src, src2)) }
 inst_msubv_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MSUBV_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_msubv_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_msubv_w_w_w_w(dst, src, src2)) }
+emit_msubv_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_msubv_w_w_w_w(dst, src, src2)) }
 inst_msubv_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MSUBV_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_msubv_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_msubv_d_w_w_w(dst, src, src2)) }
+emit_msubv_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_msubv_d_w_w_w(dst, src, src2)) }
 inst_dotp_s_h_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOTP_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dotp_s_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dotp_s_h_w_w_w(dst, src, src2)) }
+emit_dotp_s_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dotp_s_h_w_w_w(dst, src, src2)) }
 inst_dotp_s_w_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOTP_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dotp_s_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dotp_s_w_w_w_w(dst, src, src2)) }
+emit_dotp_s_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dotp_s_w_w_w_w(dst, src, src2)) }
 inst_dotp_s_d_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOTP_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dotp_s_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dotp_s_d_w_w_w(dst, src, src2)) }
+emit_dotp_s_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dotp_s_d_w_w_w(dst, src, src2)) }
 inst_dotp_u_h_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOTP_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dotp_u_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dotp_u_h_w_w_w(dst, src, src2)) }
+emit_dotp_u_h_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dotp_u_h_w_w_w(dst, src, src2)) }
 inst_dotp_u_w_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOTP_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dotp_u_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dotp_u_w_w_w_w(dst, src, src2)) }
+emit_dotp_u_w_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dotp_u_w_w_w_w(dst, src, src2)) }
 inst_dotp_u_d_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOTP_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dotp_u_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dotp_u_d_w_w_w(dst, src, src2)) }
+emit_dotp_u_d_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dotp_u_d_w_w_w(dst, src, src2)) }
 inst_and_v_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AND_V, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_and_v_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_and_v_w_w_w(dst, src, src2)) }
+emit_and_v_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_and_v_w_w_w(dst, src, src2)) }
 inst_or_v_w_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .OR_V, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_or_v_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_or_v_w_w_w(dst, src, src2)) }
+emit_or_v_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_or_v_w_w_w(dst, src, src2)) }
 inst_nor_v_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NOR_V, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nor_v_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nor_v_w_w_w(dst, src, src2)) }
+emit_nor_v_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nor_v_w_w_w(dst, src, src2)) }
 inst_xor_v_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XOR_V, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xor_v_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xor_v_w_w_w(dst, src, src2)) }
+emit_xor_v_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xor_v_w_w_w(dst, src, src2)) }
 inst_andi_b_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ANDI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_andi_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_andi_b_w_w_i5(dst, src, imm)) }
+emit_andi_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_andi_b_w_w_i5(dst, src, imm)) }
 inst_ori_b_w_w_i5          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ORI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_ori_b_w_w_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ori_b_w_w_i5(dst, src, imm)) }
+emit_ori_b_w_w_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ori_b_w_w_i5(dst, src, imm)) }
 inst_nori_b_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .NORI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_nori_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_nori_b_w_w_i5(dst, src, imm)) }
+emit_nori_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_nori_b_w_w_i5(dst, src, imm)) }
 inst_xori_b_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XORI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_xori_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xori_b_w_w_i5(dst, src, imm)) }
+emit_xori_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xori_b_w_w_i5(dst, src, imm)) }
 inst_bsel_v_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BSEL_V, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bsel_v_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bsel_v_w_w_w(dst, src, src2)) }
+emit_bsel_v_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bsel_v_w_w_w(dst, src, src2)) }
 inst_bseli_b_w_w_i5        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BSELI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_bseli_b_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_bseli_b_w_w_i5(dst, src, imm)) }
+emit_bseli_b_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_bseli_b_w_w_i5(dst, src, imm)) }
 inst_bmnz_v_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BMNZ_V, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bmnz_v_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bmnz_v_w_w_w(dst, src, src2)) }
+emit_bmnz_v_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bmnz_v_w_w_w(dst, src, src2)) }
 inst_bmnzi_b_w_w_i5        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BMNZI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_bmnzi_b_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_bmnzi_b_w_w_i5(dst, src, imm)) }
+emit_bmnzi_b_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_bmnzi_b_w_w_i5(dst, src, imm)) }
 inst_bmz_v_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BMZ_V, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bmz_v_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bmz_v_w_w_w(dst, src, src2)) }
+emit_bmz_v_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bmz_v_w_w_w(dst, src, src2)) }
 inst_bmzi_b_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BMZI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_bmzi_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_bmzi_b_w_w_i5(dst, src, imm)) }
+emit_bmzi_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_bmzi_b_w_w_i5(dst, src, imm)) }
 inst_ceq_b_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CEQ_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ceq_b_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ceq_b_w_w_w(dst, src, src2)) }
+emit_ceq_b_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ceq_b_w_w_w(dst, src, src2)) }
 inst_ceq_h_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CEQ_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ceq_h_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ceq_h_w_w_w(dst, src, src2)) }
+emit_ceq_h_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ceq_h_w_w_w(dst, src, src2)) }
 inst_ceq_w_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CEQ_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ceq_w_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ceq_w_w_w_w(dst, src, src2)) }
+emit_ceq_w_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ceq_w_w_w_w(dst, src, src2)) }
 inst_ceq_d_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CEQ_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ceq_d_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ceq_d_w_w_w(dst, src, src2)) }
+emit_ceq_d_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ceq_d_w_w_w(dst, src, src2)) }
 inst_clt_s_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLT_S_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clt_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clt_s_b_w_w_w(dst, src, src2)) }
+emit_clt_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clt_s_b_w_w_w(dst, src, src2)) }
 inst_clt_s_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLT_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clt_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clt_s_h_w_w_w(dst, src, src2)) }
+emit_clt_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clt_s_h_w_w_w(dst, src, src2)) }
 inst_clt_s_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLT_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clt_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clt_s_w_w_w_w(dst, src, src2)) }
+emit_clt_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clt_s_w_w_w_w(dst, src, src2)) }
 inst_clt_s_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLT_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clt_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clt_s_d_w_w_w(dst, src, src2)) }
+emit_clt_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clt_s_d_w_w_w(dst, src, src2)) }
 inst_clt_u_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLT_U_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clt_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clt_u_b_w_w_w(dst, src, src2)) }
+emit_clt_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clt_u_b_w_w_w(dst, src, src2)) }
 inst_clt_u_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLT_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clt_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clt_u_h_w_w_w(dst, src, src2)) }
+emit_clt_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clt_u_h_w_w_w(dst, src, src2)) }
 inst_clt_u_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLT_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clt_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clt_u_w_w_w_w(dst, src, src2)) }
+emit_clt_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clt_u_w_w_w_w(dst, src, src2)) }
 inst_clt_u_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLT_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clt_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clt_u_d_w_w_w(dst, src, src2)) }
+emit_clt_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clt_u_d_w_w_w(dst, src, src2)) }
 inst_cle_s_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLE_S_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cle_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cle_s_b_w_w_w(dst, src, src2)) }
+emit_cle_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cle_s_b_w_w_w(dst, src, src2)) }
 inst_cle_s_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLE_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cle_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cle_s_h_w_w_w(dst, src, src2)) }
+emit_cle_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cle_s_h_w_w_w(dst, src, src2)) }
 inst_cle_s_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLE_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cle_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cle_s_w_w_w_w(dst, src, src2)) }
+emit_cle_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cle_s_w_w_w_w(dst, src, src2)) }
 inst_cle_s_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLE_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cle_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cle_s_d_w_w_w(dst, src, src2)) }
+emit_cle_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cle_s_d_w_w_w(dst, src, src2)) }
 inst_cle_u_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLE_U_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cle_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cle_u_b_w_w_w(dst, src, src2)) }
+emit_cle_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cle_u_b_w_w_w(dst, src, src2)) }
 inst_cle_u_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLE_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cle_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cle_u_h_w_w_w(dst, src, src2)) }
+emit_cle_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cle_u_h_w_w_w(dst, src, src2)) }
 inst_cle_u_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLE_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cle_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cle_u_w_w_w_w(dst, src, src2)) }
+emit_cle_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cle_u_w_w_w_w(dst, src, src2)) }
 inst_cle_u_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLE_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cle_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cle_u_d_w_w_w(dst, src, src2)) }
+emit_cle_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cle_u_d_w_w_w(dst, src, src2)) }
 inst_min_s_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MIN_S_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_min_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_min_s_b_w_w_w(dst, src, src2)) }
+emit_min_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_min_s_b_w_w_w(dst, src, src2)) }
 inst_min_s_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MIN_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_min_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_min_s_h_w_w_w(dst, src, src2)) }
+emit_min_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_min_s_h_w_w_w(dst, src, src2)) }
 inst_min_s_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MIN_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_min_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_min_s_w_w_w_w(dst, src, src2)) }
+emit_min_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_min_s_w_w_w_w(dst, src, src2)) }
 inst_min_s_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MIN_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_min_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_min_s_d_w_w_w(dst, src, src2)) }
+emit_min_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_min_s_d_w_w_w(dst, src, src2)) }
 inst_min_u_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MIN_U_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_min_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_min_u_b_w_w_w(dst, src, src2)) }
+emit_min_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_min_u_b_w_w_w(dst, src, src2)) }
 inst_min_u_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MIN_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_min_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_min_u_h_w_w_w(dst, src, src2)) }
+emit_min_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_min_u_h_w_w_w(dst, src, src2)) }
 inst_min_u_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MIN_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_min_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_min_u_w_w_w_w(dst, src, src2)) }
+emit_min_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_min_u_w_w_w_w(dst, src, src2)) }
 inst_min_u_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MIN_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_min_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_min_u_d_w_w_w(dst, src, src2)) }
+emit_min_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_min_u_d_w_w_w(dst, src, src2)) }
 inst_max_s_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MAX_S_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_max_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_max_s_b_w_w_w(dst, src, src2)) }
+emit_max_s_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_max_s_b_w_w_w(dst, src, src2)) }
 inst_max_s_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MAX_S_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_max_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_max_s_h_w_w_w(dst, src, src2)) }
+emit_max_s_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_max_s_h_w_w_w(dst, src, src2)) }
 inst_max_s_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MAX_S_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_max_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_max_s_w_w_w_w(dst, src, src2)) }
+emit_max_s_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_max_s_w_w_w_w(dst, src, src2)) }
 inst_max_s_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MAX_S_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_max_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_max_s_d_w_w_w(dst, src, src2)) }
+emit_max_s_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_max_s_d_w_w_w(dst, src, src2)) }
 inst_max_u_b_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MAX_U_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_max_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_max_u_b_w_w_w(dst, src, src2)) }
+emit_max_u_b_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_max_u_b_w_w_w(dst, src, src2)) }
 inst_max_u_h_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MAX_U_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_max_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_max_u_h_w_w_w(dst, src, src2)) }
+emit_max_u_h_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_max_u_h_w_w_w(dst, src, src2)) }
 inst_max_u_w_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MAX_U_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_max_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_max_u_w_w_w_w(dst, src, src2)) }
+emit_max_u_w_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_max_u_w_w_w_w(dst, src, src2)) }
 inst_max_u_d_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MAX_U_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_max_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_max_u_d_w_w_w(dst, src, src2)) }
+emit_max_u_d_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_max_u_d_w_w_w(dst, src, src2)) }
 inst_sll_b_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLL_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sll_b_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sll_b_w_w_w(dst, src, src2)) }
+emit_sll_b_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sll_b_w_w_w(dst, src, src2)) }
 inst_sll_h_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLL_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sll_h_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sll_h_w_w_w(dst, src, src2)) }
+emit_sll_h_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sll_h_w_w_w(dst, src, src2)) }
 inst_sll_w_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLL_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sll_w_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sll_w_w_w_w(dst, src, src2)) }
+emit_sll_w_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sll_w_w_w_w(dst, src, src2)) }
 inst_sll_d_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLL_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sll_d_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sll_d_w_w_w(dst, src, src2)) }
+emit_sll_d_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sll_d_w_w_w(dst, src, src2)) }
 inst_srl_b_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRL_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srl_b_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srl_b_w_w_w(dst, src, src2)) }
+emit_srl_b_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srl_b_w_w_w(dst, src, src2)) }
 inst_srl_h_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRL_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srl_h_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srl_h_w_w_w(dst, src, src2)) }
+emit_srl_h_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srl_h_w_w_w(dst, src, src2)) }
 inst_srl_w_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRL_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srl_w_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srl_w_w_w_w(dst, src, src2)) }
+emit_srl_w_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srl_w_w_w_w(dst, src, src2)) }
 inst_srl_d_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRL_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srl_d_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srl_d_w_w_w(dst, src, src2)) }
+emit_srl_d_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srl_d_w_w_w(dst, src, src2)) }
 inst_sra_b_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRA_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sra_b_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sra_b_w_w_w(dst, src, src2)) }
+emit_sra_b_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sra_b_w_w_w(dst, src, src2)) }
 inst_sra_h_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRA_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sra_h_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sra_h_w_w_w(dst, src, src2)) }
+emit_sra_h_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sra_h_w_w_w(dst, src, src2)) }
 inst_sra_w_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRA_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sra_w_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sra_w_w_w_w(dst, src, src2)) }
+emit_sra_w_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sra_w_w_w_w(dst, src, src2)) }
 inst_sra_d_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRA_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sra_d_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sra_d_w_w_w(dst, src, src2)) }
+emit_sra_d_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sra_d_w_w_w(dst, src, src2)) }
 inst_slli_b_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLLI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_slli_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_slli_b_w_w_i5(dst, src, imm)) }
+emit_slli_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_slli_b_w_w_i5(dst, src, imm)) }
 inst_slli_h_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLLI_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_slli_h_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_slli_h_w_w_i5(dst, src, imm)) }
+emit_slli_h_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_slli_h_w_w_i5(dst, src, imm)) }
 inst_slli_w_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLLI_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_slli_w_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_slli_w_w_w_i5(dst, src, imm)) }
+emit_slli_w_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_slli_w_w_w_i5(dst, src, imm)) }
 inst_slli_d_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLLI_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_slli_d_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_slli_d_w_w_i5(dst, src, imm)) }
+emit_slli_d_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_slli_d_w_w_i5(dst, src, imm)) }
 inst_srli_b_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRLI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_srli_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srli_b_w_w_i5(dst, src, imm)) }
+emit_srli_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srli_b_w_w_i5(dst, src, imm)) }
 inst_srli_h_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRLI_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_srli_h_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srli_h_w_w_i5(dst, src, imm)) }
+emit_srli_h_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srli_h_w_w_i5(dst, src, imm)) }
 inst_srli_w_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRLI_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_srli_w_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srli_w_w_w_i5(dst, src, imm)) }
+emit_srli_w_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srli_w_w_w_i5(dst, src, imm)) }
 inst_srli_d_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRLI_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_srli_d_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srli_d_w_w_i5(dst, src, imm)) }
+emit_srli_d_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srli_d_w_w_i5(dst, src, imm)) }
 inst_srai_b_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRAI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_srai_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srai_b_w_w_i5(dst, src, imm)) }
+emit_srai_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srai_b_w_w_i5(dst, src, imm)) }
 inst_srai_h_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRAI_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_srai_h_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srai_h_w_w_i5(dst, src, imm)) }
+emit_srai_h_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srai_h_w_w_i5(dst, src, imm)) }
 inst_srai_w_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRAI_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_srai_w_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srai_w_w_w_i5(dst, src, imm)) }
+emit_srai_w_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srai_w_w_w_i5(dst, src, imm)) }
 inst_srai_d_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRAI_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_srai_d_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srai_d_w_w_i5(dst, src, imm)) }
+emit_srai_d_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srai_d_w_w_i5(dst, src, imm)) }
 inst_fadd_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADD_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fadd_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadd_w_w_w_w(dst, src, src2)) }
+emit_fadd_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadd_w_w_w_w(dst, src, src2)) }
 inst_fadd_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADD_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fadd_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadd_d_w_w_w(dst, src, src2)) }
+emit_fadd_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadd_d_w_w_w(dst, src, src2)) }
 inst_fsub_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FSUB_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fsub_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsub_w_w_w_w(dst, src, src2)) }
+emit_fsub_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsub_w_w_w_w(dst, src, src2)) }
 inst_fsub_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FSUB_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fsub_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsub_d_w_w_w(dst, src, src2)) }
+emit_fsub_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsub_d_w_w_w(dst, src, src2)) }
 inst_fmul_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMUL_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmul_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmul_w_w_w_w(dst, src, src2)) }
+emit_fmul_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmul_w_w_w_w(dst, src, src2)) }
 inst_fmul_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMUL_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmul_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmul_d_w_w_w(dst, src, src2)) }
+emit_fmul_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmul_d_w_w_w(dst, src, src2)) }
 inst_fdiv_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FDIV_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fdiv_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdiv_w_w_w_w(dst, src, src2)) }
+emit_fdiv_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdiv_w_w_w_w(dst, src, src2)) }
 inst_fdiv_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FDIV_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fdiv_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdiv_d_w_w_w(dst, src, src2)) }
+emit_fdiv_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdiv_d_w_w_w(dst, src, src2)) }
 inst_fsqrt_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FSQRT_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fsqrt_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_w_w_w(dst, src)) }
+emit_fsqrt_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_w_w_w(dst, src)) }
 inst_fsqrt_d_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FSQRT_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fsqrt_d_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_d_w_w(dst, src)) }
+emit_fsqrt_d_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_d_w_w(dst, src)) }
 inst_frsqrt_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRT_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frsqrt_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrt_w_w_w(dst, src)) }
+emit_frsqrt_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrt_w_w_w(dst, src)) }
 inst_frsqrt_d_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRT_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frsqrt_d_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrt_d_w_w(dst, src)) }
+emit_frsqrt_d_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrt_d_w_w(dst, src)) }
 inst_frcp_w_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRCP_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frcp_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frcp_w_w_w(dst, src)) }
+emit_frcp_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frcp_w_w_w(dst, src)) }
 inst_frcp_d_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRCP_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frcp_d_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frcp_d_w_w(dst, src)) }
+emit_frcp_d_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frcp_d_w_w(dst, src)) }
 inst_frint_w_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINT_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frint_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frint_w_w_w(dst, src)) }
+emit_frint_w_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frint_w_w_w(dst, src)) }
 inst_frint_d_w_w           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRINT_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frint_d_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frint_d_w_w(dst, src)) }
+emit_frint_d_w_w           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frint_d_w_w(dst, src)) }
 inst_fmax_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAX_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmax_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmax_w_w_w_w(dst, src, src2)) }
+emit_fmax_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmax_w_w_w_w(dst, src, src2)) }
 inst_fmax_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMAX_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmax_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmax_d_w_w_w(dst, src, src2)) }
+emit_fmax_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmax_d_w_w_w(dst, src, src2)) }
 inst_fmin_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMIN_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmin_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmin_w_w_w_w(dst, src, src2)) }
+emit_fmin_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmin_w_w_w_w(dst, src, src2)) }
 inst_fmin_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMIN_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmin_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmin_d_w_w_w(dst, src, src2)) }
+emit_fmin_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmin_d_w_w_w(dst, src, src2)) }
 inst_fceq_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCEQ_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fceq_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fceq_w_w_w_w(dst, src, src2)) }
+emit_fceq_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fceq_w_w_w_w(dst, src, src2)) }
 inst_fceq_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCEQ_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fceq_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fceq_d_w_w_w(dst, src, src2)) }
+emit_fceq_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fceq_d_w_w_w(dst, src, src2)) }
 inst_fcne_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCNE_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fcne_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcne_w_w_w_w(dst, src, src2)) }
+emit_fcne_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcne_w_w_w_w(dst, src, src2)) }
 inst_fcne_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCNE_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fcne_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcne_d_w_w_w(dst, src, src2)) }
+emit_fcne_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcne_d_w_w_w(dst, src, src2)) }
 inst_fclt_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCLT_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fclt_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fclt_w_w_w_w(dst, src, src2)) }
+emit_fclt_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fclt_w_w_w_w(dst, src, src2)) }
 inst_fclt_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCLT_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fclt_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fclt_d_w_w_w(dst, src, src2)) }
+emit_fclt_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fclt_d_w_w_w(dst, src, src2)) }
 inst_fcle_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCLE_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fcle_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcle_w_w_w_w(dst, src, src2)) }
+emit_fcle_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcle_w_w_w_w(dst, src, src2)) }
 inst_fcle_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCLE_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fcle_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcle_d_w_w_w(dst, src, src2)) }
+emit_fcle_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcle_d_w_w_w(dst, src, src2)) }
 inst_ffint_s_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FFINT_S_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ffint_s_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ffint_s_w_w_w(dst, src)) }
+emit_ffint_s_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ffint_s_w_w_w(dst, src)) }
 inst_ffint_s_d_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FFINT_S_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ffint_s_d_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ffint_s_d_w_w(dst, src)) }
+emit_ffint_s_d_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ffint_s_d_w_w(dst, src)) }
 inst_ffint_u_w_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FFINT_U_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ffint_u_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ffint_u_w_w_w(dst, src)) }
+emit_ffint_u_w_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ffint_u_w_w_w(dst, src)) }
 inst_ffint_u_d_w_w         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FFINT_U_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ffint_u_d_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ffint_u_d_w_w(dst, src)) }
+emit_ffint_u_d_w_w         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ffint_u_d_w_w(dst, src)) }
 inst_ftrunc_s_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FTRUNC_S_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ftrunc_s_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ftrunc_s_w_w_w(dst, src)) }
+emit_ftrunc_s_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ftrunc_s_w_w_w(dst, src)) }
 inst_ftrunc_s_d_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FTRUNC_S_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ftrunc_s_d_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ftrunc_s_d_w_w(dst, src)) }
+emit_ftrunc_s_d_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ftrunc_s_d_w_w(dst, src)) }
 inst_ftrunc_u_w_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FTRUNC_U_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ftrunc_u_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ftrunc_u_w_w_w(dst, src)) }
+emit_ftrunc_u_w_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ftrunc_u_w_w_w(dst, src)) }
 inst_ftrunc_u_d_w_w        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FTRUNC_U_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ftrunc_u_d_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ftrunc_u_d_w_w(dst, src)) }
+emit_ftrunc_u_d_w_w        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ftrunc_u_d_w_w(dst, src)) }
 inst_fcvt_s_w_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_S_W, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_fcvt_s_w_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_fcvt_s_w_f_f(dst, src)) }
+emit_fcvt_s_w_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_fcvt_s_w_f_f(dst, src)) }
 inst_fcvt_s_d_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_S_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_fcvt_s_d_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_fcvt_s_d_f_f(dst, src)) }
+emit_fcvt_s_d_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_fcvt_s_d_f_f(dst, src)) }
 inst_fcvt_d_w_f_f          :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_D_W, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
-emit_fcvt_d_w_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_fcvt_d_w_f_f(dst, src)) }
+emit_fcvt_d_w_f_f          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append_elem(instructions, inst_fcvt_d_w_f_f(dst, src)) }
 inst_ld_b_w_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD_B, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_ld_b_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld_b_w_m(dst, mem)) }
+emit_ld_b_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld_b_w_m(dst, mem)) }
 inst_ld_h_w_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD_H, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_ld_h_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld_h_w_m(dst, mem)) }
+emit_ld_h_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld_h_w_m(dst, mem)) }
 inst_ld_w_w_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_ld_w_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld_w_w_m(dst, mem)) }
+emit_ld_w_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld_w_w_m(dst, mem)) }
 inst_ld_d_w_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_ld_d_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_ld_d_w_m(dst, mem)) }
+emit_ld_d_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_ld_d_w_m(dst, mem)) }
 inst_st_b_w_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST_B, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_st_b_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st_b_w_m(dst, mem)) }
+emit_st_b_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st_b_w_m(dst, mem)) }
 inst_st_h_w_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST_H, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_st_h_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st_h_w_m(dst, mem)) }
+emit_st_h_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st_h_w_m(dst, mem)) }
 inst_st_w_w_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_st_w_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st_w_w_m(dst, mem)) }
+emit_st_w_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st_w_w_m(dst, mem)) }
 inst_st_d_w_m              :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .ST_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_st_d_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_st_d_w_m(dst, mem)) }
+emit_st_d_w_m              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_st_d_w_m(dst, mem)) }
 inst_ldi_b_w_i5            :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LDI_B, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} }
-emit_ldi_b_w_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_ldi_b_w_i5(dst, imm)) }
+emit_ldi_b_w_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_ldi_b_w_i5(dst, imm)) }
 inst_ldi_h_w_i5            :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LDI_H, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} }
-emit_ldi_h_w_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_ldi_h_w_i5(dst, imm)) }
+emit_ldi_h_w_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_ldi_h_w_i5(dst, imm)) }
 inst_ldi_w_w_i5            :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LDI_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} }
-emit_ldi_w_w_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_ldi_w_w_i5(dst, imm)) }
+emit_ldi_w_w_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_ldi_w_w_i5(dst, imm)) }
 inst_ldi_d_w_i5            :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LDI_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} }
-emit_ldi_d_w_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_ldi_d_w_i5(dst, imm)) }
+emit_ldi_d_w_i5            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_ldi_d_w_i5(dst, imm)) }
 inst_copy_s_b_r_w_i5       :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_S_B, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_copy_s_b_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_s_b_r_w_i5(dst, src, imm)) }
+emit_copy_s_b_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append_elem(instructions, inst_copy_s_b_r_w_i5(dst, src, imm)) }
 inst_copy_s_h_r_w_i5       :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_S_H, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_copy_s_h_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_s_h_r_w_i5(dst, src, imm)) }
+emit_copy_s_h_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append_elem(instructions, inst_copy_s_h_r_w_i5(dst, src, imm)) }
 inst_copy_s_w_r_w_i5       :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_S_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_copy_s_w_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_s_w_r_w_i5(dst, src, imm)) }
+emit_copy_s_w_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append_elem(instructions, inst_copy_s_w_r_w_i5(dst, src, imm)) }
 inst_copy_u_b_r_w_i5       :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_U_B, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_copy_u_b_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_u_b_r_w_i5(dst, src, imm)) }
+emit_copy_u_b_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append_elem(instructions, inst_copy_u_b_r_w_i5(dst, src, imm)) }
 inst_copy_u_h_r_w_i5       :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_U_H, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_copy_u_h_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_u_h_r_w_i5(dst, src, imm)) }
+emit_copy_u_h_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append_elem(instructions, inst_copy_u_h_r_w_i5(dst, src, imm)) }
 inst_copy_u_w_r_w_i5       :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_U_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_copy_u_w_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_u_w_r_w_i5(dst, src, imm)) }
+emit_copy_u_w_r_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append_elem(instructions, inst_copy_u_w_r_w_i5(dst, src, imm)) }
 inst_insert_b_w_r_i5       :: #force_inline proc "contextless" (dst: Register, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .INSERT_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_insert_b_w_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append(instructions, inst_insert_b_w_r_i5(dst, src, imm)) }
+emit_insert_b_w_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append_elem(instructions, inst_insert_b_w_r_i5(dst, src, imm)) }
 inst_insert_h_w_r_i5       :: #force_inline proc "contextless" (dst: Register, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .INSERT_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_insert_h_w_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append(instructions, inst_insert_h_w_r_i5(dst, src, imm)) }
+emit_insert_h_w_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append_elem(instructions, inst_insert_h_w_r_i5(dst, src, imm)) }
 inst_insert_w_w_r_i5       :: #force_inline proc "contextless" (dst: Register, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .INSERT_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_insert_w_w_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append(instructions, inst_insert_w_w_r_i5(dst, src, imm)) }
+emit_insert_w_w_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append_elem(instructions, inst_insert_w_w_r_i5(dst, src, imm)) }
 inst_insert_d_w_r_i5       :: #force_inline proc "contextless" (dst: Register, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .INSERT_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_gpr(src), op_imm(imm, 1), {}}} }
-emit_insert_d_w_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append(instructions, inst_insert_d_w_r_i5(dst, src, imm)) }
+emit_insert_d_w_r_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append_elem(instructions, inst_insert_d_w_r_i5(dst, src, imm)) }
 inst_insve_b_w_w_i5        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .INSVE_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_insve_b_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_insve_b_w_w_i5(dst, src, imm)) }
+emit_insve_b_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_insve_b_w_w_i5(dst, src, imm)) }
 inst_insve_h_w_w_i5        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .INSVE_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_insve_h_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_insve_h_w_w_i5(dst, src, imm)) }
+emit_insve_h_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_insve_h_w_w_i5(dst, src, imm)) }
 inst_insve_w_w_w_i5        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .INSVE_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_insve_w_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_insve_w_w_w_i5(dst, src, imm)) }
+emit_insve_w_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_insve_w_w_w_i5(dst, src, imm)) }
 inst_insve_d_w_w_i5        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .INSVE_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_insve_d_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_insve_d_w_w_i5(dst, src, imm)) }
+emit_insve_d_w_w_i5        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_insve_d_w_w_i5(dst, src, imm)) }
 inst_shf_b_w_w_i5          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHF_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_shf_b_w_w_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shf_b_w_w_i5(dst, src, imm)) }
+emit_shf_b_w_w_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shf_b_w_w_i5(dst, src, imm)) }
 inst_shf_h_w_w_i5          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHF_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_shf_h_w_w_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shf_h_w_w_i5(dst, src, imm)) }
+emit_shf_h_w_w_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shf_h_w_w_i5(dst, src, imm)) }
 inst_shf_w_w_w_i5          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SHF_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_shf_w_w_w_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_shf_w_w_w_i5(dst, src, imm)) }
+emit_shf_w_w_w_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_shf_w_w_w_i5(dst, src, imm)) }
 inst_vshf_b_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSHF_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vshf_b_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vshf_b_w_w_w(dst, src, src2)) }
+emit_vshf_b_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vshf_b_w_w_w(dst, src, src2)) }
 inst_vshf_h_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSHF_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vshf_h_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vshf_h_w_w_w(dst, src, src2)) }
+emit_vshf_h_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vshf_h_w_w_w(dst, src, src2)) }
 inst_vshf_w_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSHF_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vshf_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vshf_w_w_w_w(dst, src, src2)) }
+emit_vshf_w_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vshf_w_w_w_w(dst, src, src2)) }
 inst_vshf_d_w_w_w          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSHF_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vshf_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vshf_d_w_w_w(dst, src, src2)) }
+emit_vshf_d_w_w_w          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vshf_d_w_w_w(dst, src, src2)) }
 inst_sld_b_w_w_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: GPR) -> Instruction { return Instruction{mnemonic = .SLD_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_gpr(src2), {}}} }
-emit_sld_b_w_w_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append(instructions, inst_sld_b_w_w_r(dst, src, src2)) }
+emit_sld_b_w_w_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append_elem(instructions, inst_sld_b_w_w_r(dst, src, src2)) }
 inst_sld_h_w_w_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: GPR) -> Instruction { return Instruction{mnemonic = .SLD_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_gpr(src2), {}}} }
-emit_sld_h_w_w_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append(instructions, inst_sld_h_w_w_r(dst, src, src2)) }
+emit_sld_h_w_w_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append_elem(instructions, inst_sld_h_w_w_r(dst, src, src2)) }
 inst_sld_w_w_w_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: GPR) -> Instruction { return Instruction{mnemonic = .SLD_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_gpr(src2), {}}} }
-emit_sld_w_w_w_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append(instructions, inst_sld_w_w_w_r(dst, src, src2)) }
+emit_sld_w_w_w_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append_elem(instructions, inst_sld_w_w_w_r(dst, src, src2)) }
 inst_sld_d_w_w_r           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: GPR) -> Instruction { return Instruction{mnemonic = .SLD_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_gpr(src2), {}}} }
-emit_sld_d_w_w_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append(instructions, inst_sld_d_w_w_r(dst, src, src2)) }
+emit_sld_d_w_w_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append_elem(instructions, inst_sld_d_w_w_r(dst, src, src2)) }
 inst_sldi_b_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLDI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_sldi_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sldi_b_w_w_i5(dst, src, imm)) }
+emit_sldi_b_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sldi_b_w_w_i5(dst, src, imm)) }
 inst_sldi_h_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLDI_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_sldi_h_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sldi_h_w_w_i5(dst, src, imm)) }
+emit_sldi_h_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sldi_h_w_w_i5(dst, src, imm)) }
 inst_sldi_w_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLDI_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_sldi_w_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sldi_w_w_w_i5(dst, src, imm)) }
+emit_sldi_w_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sldi_w_w_w_i5(dst, src, imm)) }
 inst_sldi_d_w_w_i5         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLDI_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_sldi_d_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sldi_d_w_w_i5(dst, src, imm)) }
+emit_sldi_d_w_w_i5         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sldi_d_w_w_i5(dst, src, imm)) }
 inst_splat_b_w_w_r         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: GPR) -> Instruction { return Instruction{mnemonic = .SPLAT_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_gpr(src2), {}}} }
-emit_splat_b_w_w_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append(instructions, inst_splat_b_w_w_r(dst, src, src2)) }
+emit_splat_b_w_w_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append_elem(instructions, inst_splat_b_w_w_r(dst, src, src2)) }
 inst_splat_h_w_w_r         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: GPR) -> Instruction { return Instruction{mnemonic = .SPLAT_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_gpr(src2), {}}} }
-emit_splat_h_w_w_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append(instructions, inst_splat_h_w_w_r(dst, src, src2)) }
+emit_splat_h_w_w_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append_elem(instructions, inst_splat_h_w_w_r(dst, src, src2)) }
 inst_splat_w_w_w_r         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: GPR) -> Instruction { return Instruction{mnemonic = .SPLAT_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_gpr(src2), {}}} }
-emit_splat_w_w_w_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append(instructions, inst_splat_w_w_w_r(dst, src, src2)) }
+emit_splat_w_w_w_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append_elem(instructions, inst_splat_w_w_w_r(dst, src, src2)) }
 inst_splat_d_w_w_r         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: GPR) -> Instruction { return Instruction{mnemonic = .SPLAT_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_gpr(src2), {}}} }
-emit_splat_d_w_w_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append(instructions, inst_splat_d_w_w_r(dst, src, src2)) }
+emit_splat_d_w_w_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: GPR) { append_elem(instructions, inst_splat_d_w_w_r(dst, src, src2)) }
 inst_splati_b_w_w_i5       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SPLATI_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_splati_b_w_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_splati_b_w_w_i5(dst, src, imm)) }
+emit_splati_b_w_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_splati_b_w_w_i5(dst, src, imm)) }
 inst_splati_h_w_w_i5       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SPLATI_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_splati_h_w_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_splati_h_w_w_i5(dst, src, imm)) }
+emit_splati_h_w_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_splati_h_w_w_i5(dst, src, imm)) }
 inst_splati_w_w_w_i5       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SPLATI_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_splati_w_w_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_splati_w_w_w_i5(dst, src, imm)) }
+emit_splati_w_w_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_splati_w_w_w_i5(dst, src, imm)) }
 inst_splati_d_w_w_i5       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SPLATI_D, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_splati_d_w_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_splati_d_w_w_i5(dst, src, imm)) }
+emit_splati_d_w_w_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_splati_d_w_w_i5(dst, src, imm)) }
 inst_bz_v_w_rel            :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BZ_V, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bz_v_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bz_v_w_rel(dst, target)) }
+emit_bz_v_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bz_v_w_rel(dst, target)) }
 inst_bnz_v_w_rel           :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BNZ_V, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bnz_v_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bnz_v_w_rel(dst, target)) }
+emit_bnz_v_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bnz_v_w_rel(dst, target)) }
 inst_bz_b_w_rel            :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BZ_B, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bz_b_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bz_b_w_rel(dst, target)) }
+emit_bz_b_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bz_b_w_rel(dst, target)) }
 inst_bz_h_w_rel            :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BZ_H, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bz_h_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bz_h_w_rel(dst, target)) }
+emit_bz_h_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bz_h_w_rel(dst, target)) }
 inst_bz_w_w_rel            :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BZ_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bz_w_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bz_w_w_rel(dst, target)) }
+emit_bz_w_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bz_w_w_rel(dst, target)) }
 inst_bz_d_w_rel            :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BZ_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bz_d_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bz_d_w_rel(dst, target)) }
+emit_bz_d_w_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bz_d_w_rel(dst, target)) }
 inst_bnz_b_w_rel           :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BNZ_B, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bnz_b_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bnz_b_w_rel(dst, target)) }
+emit_bnz_b_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bnz_b_w_rel(dst, target)) }
 inst_bnz_h_w_rel           :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BNZ_H, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bnz_h_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bnz_h_w_rel(dst, target)) }
+emit_bnz_h_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bnz_h_w_rel(dst, target)) }
 inst_bnz_w_w_rel           :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BNZ_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bnz_w_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bnz_w_w_rel(dst, target)) }
+emit_bnz_w_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bnz_w_w_rel(dst, target)) }
 inst_bnz_d_w_rel           :: #force_inline proc "contextless" (dst: Register, target: u32) -> Instruction { return Instruction{mnemonic = .BNZ_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(target), {}, {}}} }
-emit_bnz_d_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append(instructions, inst_bnz_d_w_rel(dst, target)) }
+emit_bnz_d_w_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, target: u32) { append_elem(instructions, inst_bnz_d_w_rel(dst, target)) }
 inst_nloc_b_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NLOC_B, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_nloc_b_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_nloc_b_w_w(dst, src)) }
+emit_nloc_b_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_nloc_b_w_w(dst, src)) }
 inst_nloc_h_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NLOC_H, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_nloc_h_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_nloc_h_w_w(dst, src)) }
+emit_nloc_h_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_nloc_h_w_w(dst, src)) }
 inst_nloc_w_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NLOC_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_nloc_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_nloc_w_w_w(dst, src)) }
+emit_nloc_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_nloc_w_w_w(dst, src)) }
 inst_nloc_d_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NLOC_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_nloc_d_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_nloc_d_w_w(dst, src)) }
+emit_nloc_d_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_nloc_d_w_w(dst, src)) }
 inst_nlzc_b_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NLZC_B, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_nlzc_b_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_nlzc_b_w_w(dst, src)) }
+emit_nlzc_b_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_nlzc_b_w_w(dst, src)) }
 inst_nlzc_h_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NLZC_H, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_nlzc_h_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_nlzc_h_w_w(dst, src)) }
+emit_nlzc_h_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_nlzc_h_w_w(dst, src)) }
 inst_nlzc_w_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NLZC_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_nlzc_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_nlzc_w_w_w(dst, src)) }
+emit_nlzc_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_nlzc_w_w_w(dst, src)) }
 inst_nlzc_d_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NLZC_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_nlzc_d_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_nlzc_d_w_w(dst, src)) }
+emit_nlzc_d_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_nlzc_d_w_w(dst, src)) }
 inst_pcnt_b_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PCNT_B, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_pcnt_b_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_pcnt_b_w_w(dst, src)) }
+emit_pcnt_b_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_pcnt_b_w_w(dst, src)) }
 inst_pcnt_h_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PCNT_H, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_pcnt_h_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_pcnt_h_w_w(dst, src)) }
+emit_pcnt_h_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_pcnt_h_w_w(dst, src)) }
 inst_pcnt_w_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PCNT_W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_pcnt_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_pcnt_w_w_w(dst, src)) }
+emit_pcnt_w_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_pcnt_w_w_w(dst, src)) }
 inst_pcnt_d_w_w            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PCNT_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_pcnt_d_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_pcnt_d_w_w(dst, src)) }
+emit_pcnt_d_w_w            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_pcnt_d_w_w(dst, src)) }
 inst_vmov_s_vs_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOV_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmov_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmov_s_vs_vs(dst, src)) }
+emit_vmov_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmov_s_vs_vs(dst, src)) }
 inst_vmov_p_vp_vp          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOV_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmov_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmov_p_vp_vp(dst, src)) }
+emit_vmov_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmov_p_vp_vp(dst, src)) }
 inst_vmov_t_vt_vt          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOV_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmov_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmov_t_vt_vt(dst, src)) }
+emit_vmov_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmov_t_vt_vt(dst, src)) }
 inst_vmov_q_vq_vq          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMOV_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmov_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmov_q_vq_vq(dst, src)) }
+emit_vmov_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmov_q_vq_vq(dst, src)) }
 inst_lv_s_vs_m             :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LV_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_lv_s_vs_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_lv_s_vs_m(dst, mem)) }
+emit_lv_s_vs_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_lv_s_vs_m(dst, mem)) }
 inst_lv_q_vq_m             :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LV_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_lv_q_vq_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_lv_q_vq_m(dst, mem)) }
+emit_lv_q_vq_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_lv_q_vq_m(dst, mem)) }
 inst_sv_s_vs_m             :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SV_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_sv_s_vs_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_sv_s_vs_m(dst, mem)) }
+emit_sv_s_vs_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_sv_s_vs_m(dst, mem)) }
 inst_sv_q_vq_m             :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SV_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_sv_q_vq_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_sv_q_vq_m(dst, mem)) }
+emit_sv_q_vq_m             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_sv_q_vq_m(dst, mem)) }
 inst_lvl_q_vq_m            :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LVL_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_lvl_q_vq_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_lvl_q_vq_m(dst, mem)) }
+emit_lvl_q_vq_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_lvl_q_vq_m(dst, mem)) }
 inst_lvr_q_vq_m            :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .LVR_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_lvr_q_vq_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_lvr_q_vq_m(dst, mem)) }
+emit_lvr_q_vq_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_lvr_q_vq_m(dst, mem)) }
 inst_svl_q_vq_m            :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SVL_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_svl_q_vq_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_svl_q_vq_m(dst, mem)) }
+emit_svl_q_vq_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_svl_q_vq_m(dst, mem)) }
 inst_svr_q_vq_m            :: #force_inline proc "contextless" (dst: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SVR_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(mem, 4), {}, {}}} }
-emit_svr_q_vq_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append(instructions, inst_svr_q_vq_m(dst, mem)) }
+emit_svr_q_vq_m            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) { append_elem(instructions, inst_svr_q_vq_m(dst, mem)) }
 inst_viim_s_vs_i16         :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VIIM_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 2), {}, {}}} }
-emit_viim_s_vs_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_viim_s_vs_i16(dst, imm)) }
+emit_viim_s_vs_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_viim_s_vs_i16(dst, imm)) }
 inst_vfim_s_vs_i16         :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VFIM_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 2), {}, {}}} }
-emit_vfim_s_vs_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vfim_s_vs_i16(dst, imm)) }
+emit_vfim_s_vs_i16         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vfim_s_vs_i16(dst, imm)) }
 inst_vadd_s_vs_vs_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADD_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadd_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadd_s_vs_vs_vs(dst, src, src2)) }
+emit_vadd_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadd_s_vs_vs_vs(dst, src, src2)) }
 inst_vadd_p_vp_vp_vp       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADD_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadd_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadd_p_vp_vp_vp(dst, src, src2)) }
+emit_vadd_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadd_p_vp_vp_vp(dst, src, src2)) }
 inst_vadd_t_vt_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADD_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadd_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadd_t_vt_vt_vt(dst, src, src2)) }
+emit_vadd_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadd_t_vt_vt_vt(dst, src, src2)) }
 inst_vadd_q_vq_vq_vq       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADD_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadd_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadd_q_vq_vq_vq(dst, src, src2)) }
+emit_vadd_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadd_q_vq_vq_vq(dst, src, src2)) }
 inst_vsub_s_vs_vs_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUB_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsub_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsub_s_vs_vs_vs(dst, src, src2)) }
+emit_vsub_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsub_s_vs_vs_vs(dst, src, src2)) }
 inst_vsub_p_vp_vp_vp       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUB_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsub_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsub_p_vp_vp_vp(dst, src, src2)) }
+emit_vsub_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsub_p_vp_vp_vp(dst, src, src2)) }
 inst_vsub_t_vt_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUB_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsub_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsub_t_vt_vt_vt(dst, src, src2)) }
+emit_vsub_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsub_t_vt_vt_vt(dst, src, src2)) }
 inst_vsub_q_vq_vq_vq       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUB_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsub_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsub_q_vq_vq_vq(dst, src, src2)) }
+emit_vsub_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsub_q_vq_vq_vq(dst, src, src2)) }
 inst_vmul_s_vs_vs_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMUL_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmul_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmul_s_vs_vs_vs(dst, src, src2)) }
+emit_vmul_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmul_s_vs_vs_vs(dst, src, src2)) }
 inst_vmul_p_vp_vp_vp       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMUL_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmul_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmul_p_vp_vp_vp(dst, src, src2)) }
+emit_vmul_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmul_p_vp_vp_vp(dst, src, src2)) }
 inst_vmul_t_vt_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMUL_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmul_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmul_t_vt_vt_vt(dst, src, src2)) }
+emit_vmul_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmul_t_vt_vt_vt(dst, src, src2)) }
 inst_vmul_q_vq_vq_vq       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMUL_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmul_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmul_q_vq_vq_vq(dst, src, src2)) }
+emit_vmul_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmul_q_vq_vq_vq(dst, src, src2)) }
 inst_vdiv_s_vs_vs_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIV_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdiv_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdiv_s_vs_vs_vs(dst, src, src2)) }
+emit_vdiv_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdiv_s_vs_vs_vs(dst, src, src2)) }
 inst_vdiv_p_vp_vp_vp       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIV_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdiv_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdiv_p_vp_vp_vp(dst, src, src2)) }
+emit_vdiv_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdiv_p_vp_vp_vp(dst, src, src2)) }
 inst_vdiv_t_vt_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIV_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdiv_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdiv_t_vt_vt_vt(dst, src, src2)) }
+emit_vdiv_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdiv_t_vt_vt_vt(dst, src, src2)) }
 inst_vdiv_q_vq_vq_vq       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIV_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdiv_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdiv_q_vq_vq_vq(dst, src, src2)) }
+emit_vdiv_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdiv_q_vq_vq_vq(dst, src, src2)) }
 inst_vabs_s_vs_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VABS_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vabs_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vabs_s_vs_vs(dst, src)) }
+emit_vabs_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vabs_s_vs_vs(dst, src)) }
 inst_vabs_p_vp_vp          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VABS_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vabs_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vabs_p_vp_vp(dst, src)) }
+emit_vabs_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vabs_p_vp_vp(dst, src)) }
 inst_vabs_t_vt_vt          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VABS_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vabs_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vabs_t_vt_vt(dst, src)) }
+emit_vabs_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vabs_t_vt_vt(dst, src)) }
 inst_vabs_q_vq_vq          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VABS_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vabs_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vabs_q_vq_vq(dst, src)) }
+emit_vabs_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vabs_q_vq_vq(dst, src)) }
 inst_vneg_s_vs_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VNEG_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vneg_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vneg_s_vs_vs(dst, src)) }
+emit_vneg_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vneg_s_vs_vs(dst, src)) }
 inst_vneg_p_vp_vp          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VNEG_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vneg_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vneg_p_vp_vp(dst, src)) }
+emit_vneg_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vneg_p_vp_vp(dst, src)) }
 inst_vneg_t_vt_vt          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VNEG_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vneg_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vneg_t_vt_vt(dst, src)) }
+emit_vneg_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vneg_t_vt_vt(dst, src)) }
 inst_vneg_q_vq_vq          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VNEG_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vneg_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vneg_q_vq_vq(dst, src)) }
+emit_vneg_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vneg_q_vq_vq(dst, src)) }
 inst_vsqrt_s_vs_vs         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSQRT_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vsqrt_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vsqrt_s_vs_vs(dst, src)) }
+emit_vsqrt_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vsqrt_s_vs_vs(dst, src)) }
 inst_vrcp_s_vs_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRCP_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrcp_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrcp_s_vs_vs(dst, src)) }
+emit_vrcp_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrcp_s_vs_vs(dst, src)) }
 inst_vrcp_p_vp_vp          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRCP_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrcp_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrcp_p_vp_vp(dst, src)) }
+emit_vrcp_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrcp_p_vp_vp(dst, src)) }
 inst_vrcp_t_vt_vt          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRCP_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrcp_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrcp_t_vt_vt(dst, src)) }
+emit_vrcp_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrcp_t_vt_vt(dst, src)) }
 inst_vrcp_q_vq_vq          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRCP_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrcp_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrcp_q_vq_vq(dst, src)) }
+emit_vrcp_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrcp_q_vq_vq(dst, src)) }
 inst_vrsq_s_vs_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRSQ_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrsq_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrsq_s_vs_vs(dst, src)) }
+emit_vrsq_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrsq_s_vs_vs(dst, src)) }
 inst_vrsq_p_vp_vp          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRSQ_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrsq_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrsq_p_vp_vp(dst, src)) }
+emit_vrsq_p_vp_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrsq_p_vp_vp(dst, src)) }
 inst_vrsq_t_vt_vt          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRSQ_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrsq_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrsq_t_vt_vt(dst, src)) }
+emit_vrsq_t_vt_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrsq_t_vt_vt(dst, src)) }
 inst_vrsq_q_vq_vq          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRSQ_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrsq_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrsq_q_vq_vq(dst, src)) }
+emit_vrsq_q_vq_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrsq_q_vq_vq(dst, src)) }
 inst_vdot_p_vs_vp_vp       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDOT_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdot_p_vs_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdot_p_vs_vp_vp(dst, src, src2)) }
+emit_vdot_p_vs_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdot_p_vs_vp_vp(dst, src, src2)) }
 inst_vdot_t_vs_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDOT_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdot_t_vs_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdot_t_vs_vt_vt(dst, src, src2)) }
+emit_vdot_t_vs_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdot_t_vs_vt_vt(dst, src, src2)) }
 inst_vdot_q_vs_vq_vq       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDOT_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdot_q_vs_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdot_q_vs_vq_vq(dst, src, src2)) }
+emit_vdot_q_vs_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdot_q_vs_vq_vq(dst, src, src2)) }
 inst_vscl_p_vp_vp_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSCL_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vscl_p_vp_vp_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vscl_p_vp_vp_vs(dst, src, src2)) }
+emit_vscl_p_vp_vp_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vscl_p_vp_vp_vs(dst, src, src2)) }
 inst_vscl_t_vt_vt_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSCL_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vscl_t_vt_vt_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vscl_t_vt_vt_vs(dst, src, src2)) }
+emit_vscl_t_vt_vt_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vscl_t_vt_vt_vs(dst, src, src2)) }
 inst_vscl_q_vq_vq_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSCL_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vscl_q_vq_vq_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vscl_q_vq_vq_vs(dst, src, src2)) }
+emit_vscl_q_vq_vq_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vscl_q_vq_vq_vs(dst, src, src2)) }
 inst_vhdp_p_vs_vp_vp       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHDP_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vhdp_p_vs_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhdp_p_vs_vp_vp(dst, src, src2)) }
+emit_vhdp_p_vs_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhdp_p_vs_vp_vp(dst, src, src2)) }
 inst_vhdp_t_vs_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHDP_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vhdp_t_vs_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhdp_t_vs_vt_vt(dst, src, src2)) }
+emit_vhdp_t_vs_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhdp_t_vs_vt_vt(dst, src, src2)) }
 inst_vhdp_q_vs_vq_vq       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHDP_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vhdp_q_vs_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhdp_q_vs_vq_vq(dst, src, src2)) }
+emit_vhdp_q_vs_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhdp_q_vs_vq_vq(dst, src, src2)) }
 inst_vavg_p_vs_vp          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VAVG_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vavg_p_vs_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vavg_p_vs_vp(dst, src)) }
+emit_vavg_p_vs_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vavg_p_vs_vp(dst, src)) }
 inst_vavg_t_vs_vt          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VAVG_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vavg_t_vs_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vavg_t_vs_vt(dst, src)) }
+emit_vavg_t_vs_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vavg_t_vs_vt(dst, src)) }
 inst_vavg_q_vs_vq          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VAVG_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vavg_q_vs_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vavg_q_vs_vq(dst, src)) }
+emit_vavg_q_vs_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vavg_q_vs_vq(dst, src)) }
 inst_vfad_p_vs_vp          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VFAD_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vfad_p_vs_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vfad_p_vs_vp(dst, src)) }
+emit_vfad_p_vs_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vfad_p_vs_vp(dst, src)) }
 inst_vfad_t_vs_vt          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VFAD_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vfad_t_vs_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vfad_t_vs_vt(dst, src)) }
+emit_vfad_t_vs_vt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vfad_t_vs_vt(dst, src)) }
 inst_vfad_q_vs_vq          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VFAD_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vfad_q_vs_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vfad_q_vs_vq(dst, src)) }
+emit_vfad_q_vs_vq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vfad_q_vs_vq(dst, src)) }
 inst_vmmul_p_vmp_vmp_vmp   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMMUL_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmmul_p_vmp_vmp_vmp   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmmul_p_vmp_vmp_vmp(dst, src, src2)) }
+emit_vmmul_p_vmp_vmp_vmp   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmmul_p_vmp_vmp_vmp(dst, src, src2)) }
 inst_vmmul_t_vmt_vmt_vmt   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMMUL_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmmul_t_vmt_vmt_vmt   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmmul_t_vmt_vmt_vmt(dst, src, src2)) }
+emit_vmmul_t_vmt_vmt_vmt   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmmul_t_vmt_vmt_vmt(dst, src, src2)) }
 inst_vmmul_q_vmq_vmq_vmq   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMMUL_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmmul_q_vmq_vmq_vmq   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmmul_q_vmq_vmq_vmq(dst, src, src2)) }
+emit_vmmul_q_vmq_vmq_vmq   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmmul_q_vmq_vmq_vmq(dst, src, src2)) }
 inst_vtfm2_p_vp_vmp_vp     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VTFM2_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vtfm2_p_vp_vmp_vp     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vtfm2_p_vp_vmp_vp(dst, src, src2)) }
+emit_vtfm2_p_vp_vmp_vp     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vtfm2_p_vp_vmp_vp(dst, src, src2)) }
 inst_vtfm3_t_vt_vmt_vt     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VTFM3_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vtfm3_t_vt_vmt_vt     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vtfm3_t_vt_vmt_vt(dst, src, src2)) }
+emit_vtfm3_t_vt_vmt_vt     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vtfm3_t_vt_vmt_vt(dst, src, src2)) }
 inst_vtfm4_q_vq_vmq_vq     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VTFM4_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vtfm4_q_vq_vmq_vq     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vtfm4_q_vq_vmq_vq(dst, src, src2)) }
+emit_vtfm4_q_vq_vmq_vq     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vtfm4_q_vq_vmq_vq(dst, src, src2)) }
 inst_vhtfm2_p_vp_vmp_vp    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHTFM2_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vhtfm2_p_vp_vmp_vp    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhtfm2_p_vp_vmp_vp(dst, src, src2)) }
+emit_vhtfm2_p_vp_vmp_vp    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhtfm2_p_vp_vmp_vp(dst, src, src2)) }
 inst_vhtfm3_t_vt_vmt_vt    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHTFM3_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vhtfm3_t_vt_vmt_vt    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhtfm3_t_vt_vmt_vt(dst, src, src2)) }
+emit_vhtfm3_t_vt_vmt_vt    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhtfm3_t_vt_vmt_vt(dst, src, src2)) }
 inst_vhtfm4_q_vq_vmq_vq    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VHTFM4_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vhtfm4_q_vq_vmq_vq    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vhtfm4_q_vq_vmq_vq(dst, src, src2)) }
+emit_vhtfm4_q_vq_vmq_vq    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vhtfm4_q_vq_vmq_vq(dst, src, src2)) }
 inst_vmscl_p_vmp_vmp_vs    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMSCL_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmscl_p_vmp_vmp_vs    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmscl_p_vmp_vmp_vs(dst, src, src2)) }
+emit_vmscl_p_vmp_vmp_vs    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmscl_p_vmp_vmp_vs(dst, src, src2)) }
 inst_vmscl_t_vmt_vmt_vs    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMSCL_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmscl_t_vmt_vmt_vs    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmscl_t_vmt_vmt_vs(dst, src, src2)) }
+emit_vmscl_t_vmt_vmt_vs    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmscl_t_vmt_vmt_vs(dst, src, src2)) }
 inst_vmscl_q_vmq_vmq_vs    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMSCL_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmscl_q_vmq_vmq_vs    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmscl_q_vmq_vmq_vs(dst, src, src2)) }
+emit_vmscl_q_vmq_vmq_vs    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmscl_q_vmq_vmq_vs(dst, src, src2)) }
 inst_vmmov_p_vmp_vmp       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMMOV_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmmov_p_vmp_vmp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmmov_p_vmp_vmp(dst, src)) }
+emit_vmmov_p_vmp_vmp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmmov_p_vmp_vmp(dst, src)) }
 inst_vmmov_t_vmt_vmt       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMMOV_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmmov_t_vmt_vmt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmmov_t_vmt_vmt(dst, src)) }
+emit_vmmov_t_vmt_vmt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmmov_t_vmt_vmt(dst, src)) }
 inst_vmmov_q_vmq_vmq       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMMOV_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmmov_q_vmq_vmq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmmov_q_vmq_vmq(dst, src)) }
+emit_vmmov_q_vmq_vmq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmmov_q_vmq_vmq(dst, src)) }
 inst_vmidt_p_vmp           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMIDT_P, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmidt_p_vmp           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmidt_p_vmp(dst)) }
+emit_vmidt_p_vmp           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmidt_p_vmp(dst)) }
 inst_vmidt_t_vmt           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMIDT_T, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmidt_t_vmt           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmidt_t_vmt(dst)) }
+emit_vmidt_t_vmt           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmidt_t_vmt(dst)) }
 inst_vmidt_q_vmq           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMIDT_Q, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmidt_q_vmq           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmidt_q_vmq(dst)) }
+emit_vmidt_q_vmq           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmidt_q_vmq(dst)) }
 inst_vmzero_p_vmp          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMZERO_P, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmzero_p_vmp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmzero_p_vmp(dst)) }
+emit_vmzero_p_vmp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmzero_p_vmp(dst)) }
 inst_vmzero_t_vmt          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMZERO_T, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmzero_t_vmt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmzero_t_vmt(dst)) }
+emit_vmzero_t_vmt          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmzero_t_vmt(dst)) }
 inst_vmzero_q_vmq          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMZERO_Q, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmzero_q_vmq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmzero_q_vmq(dst)) }
+emit_vmzero_q_vmq          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmzero_q_vmq(dst)) }
 inst_vmone_p_vmp           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMONE_P, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmone_p_vmp           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmone_p_vmp(dst)) }
+emit_vmone_p_vmp           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmone_p_vmp(dst)) }
 inst_vmone_t_vmt           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMONE_T, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmone_t_vmt           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmone_t_vmt(dst)) }
+emit_vmone_t_vmt           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmone_t_vmt(dst)) }
 inst_vmone_q_vmq           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .VMONE_Q, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_vmone_q_vmq           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_vmone_q_vmq(dst)) }
+emit_vmone_q_vmq           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_vmone_q_vmq(dst)) }
 inst_vcrs_t_vt_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCRS_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcrs_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcrs_t_vt_vt_vt(dst, src, src2)) }
+emit_vcrs_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcrs_t_vt_vt_vt(dst, src, src2)) }
 inst_vcrsp_t_vt_vt_vt      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCRSP_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcrsp_t_vt_vt_vt      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcrsp_t_vt_vt_vt(dst, src, src2)) }
+emit_vcrsp_t_vt_vt_vt      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcrsp_t_vt_vt_vt(dst, src, src2)) }
 inst_vqmul_q_vq_vq_vq      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VQMUL_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vqmul_q_vq_vq_vq      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vqmul_q_vq_vq_vq(dst, src, src2)) }
+emit_vqmul_q_vq_vq_vq      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vqmul_q_vq_vq_vq(dst, src, src2)) }
 inst_vcmp_s_i5_vs_vs       :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCMP_S, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_reg(dst), op_reg(src), {}}} }
-emit_vcmp_s_i5_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_vcmp_s_i5_vs_vs(imm, dst, src)) }
+emit_vcmp_s_i5_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_vcmp_s_i5_vs_vs(imm, dst, src)) }
 inst_vcmp_p_i5_vp_vp       :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCMP_P, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_reg(dst), op_reg(src), {}}} }
-emit_vcmp_p_i5_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_vcmp_p_i5_vp_vp(imm, dst, src)) }
+emit_vcmp_p_i5_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_vcmp_p_i5_vp_vp(imm, dst, src)) }
 inst_vcmp_t_i5_vt_vt       :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCMP_T, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_reg(dst), op_reg(src), {}}} }
-emit_vcmp_t_i5_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_vcmp_t_i5_vt_vt(imm, dst, src)) }
+emit_vcmp_t_i5_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_vcmp_t_i5_vt_vt(imm, dst, src)) }
 inst_vcmp_q_i5_vq_vq       :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCMP_Q, operand_count = 3, length = 4, ops = {op_imm(imm, 1), op_reg(dst), op_reg(src), {}}} }
-emit_vcmp_q_i5_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_vcmp_q_i5_vq_vq(imm, dst, src)) }
+emit_vcmp_q_i5_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_vcmp_q_i5_vq_vq(imm, dst, src)) }
 inst_vmin_s_vs_vs_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMIN_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmin_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmin_s_vs_vs_vs(dst, src, src2)) }
+emit_vmin_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmin_s_vs_vs_vs(dst, src, src2)) }
 inst_vmin_p_vp_vp_vp       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMIN_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmin_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmin_p_vp_vp_vp(dst, src, src2)) }
+emit_vmin_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmin_p_vp_vp_vp(dst, src, src2)) }
 inst_vmin_t_vt_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMIN_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmin_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmin_t_vt_vt_vt(dst, src, src2)) }
+emit_vmin_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmin_t_vt_vt_vt(dst, src, src2)) }
 inst_vmin_q_vq_vq_vq       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMIN_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmin_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmin_q_vq_vq_vq(dst, src, src2)) }
+emit_vmin_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmin_q_vq_vq_vq(dst, src, src2)) }
 inst_vmax_s_vs_vs_vs       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAX_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmax_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmax_s_vs_vs_vs(dst, src, src2)) }
+emit_vmax_s_vs_vs_vs       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmax_s_vs_vs_vs(dst, src, src2)) }
 inst_vmax_p_vp_vp_vp       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAX_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmax_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmax_p_vp_vp_vp(dst, src, src2)) }
+emit_vmax_p_vp_vp_vp       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmax_p_vp_vp_vp(dst, src, src2)) }
 inst_vmax_t_vt_vt_vt       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAX_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmax_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmax_t_vt_vt_vt(dst, src, src2)) }
+emit_vmax_t_vt_vt_vt       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmax_t_vt_vt_vt(dst, src, src2)) }
 inst_vmax_q_vq_vq_vq       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAX_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmax_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmax_q_vq_vq_vq(dst, src, src2)) }
+emit_vmax_q_vq_vq_vq       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmax_q_vq_vq_vq(dst, src, src2)) }
 inst_vsin_s_vs_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSIN_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vsin_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vsin_s_vs_vs(dst, src)) }
+emit_vsin_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vsin_s_vs_vs(dst, src)) }
 inst_vcos_s_vs_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCOS_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vcos_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcos_s_vs_vs(dst, src)) }
+emit_vcos_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcos_s_vs_vs(dst, src)) }
 inst_vexp2_s_vs_vs         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXP2_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vexp2_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vexp2_s_vs_vs(dst, src)) }
+emit_vexp2_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vexp2_s_vs_vs(dst, src)) }
 inst_vlog2_s_vs_vs         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VLOG2_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vlog2_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vlog2_s_vs_vs(dst, src)) }
+emit_vlog2_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vlog2_s_vs_vs(dst, src)) }
 inst_vasin_s_vs_vs         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VASIN_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vasin_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vasin_s_vs_vs(dst, src)) }
+emit_vasin_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vasin_s_vs_vs(dst, src)) }
 inst_vnrcp_s_vs_vs         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VNRCP_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vnrcp_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vnrcp_s_vs_vs(dst, src)) }
+emit_vnrcp_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vnrcp_s_vs_vs(dst, src)) }
 inst_vnsin_s_vs_vs         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VNSIN_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vnsin_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vnsin_s_vs_vs(dst, src)) }
+emit_vnsin_s_vs_vs         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vnsin_s_vs_vs(dst, src)) }
 inst_vrexp2_s_vs_vs        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VREXP2_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrexp2_s_vs_vs        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrexp2_s_vs_vs(dst, src)) }
+emit_vrexp2_s_vs_vs        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrexp2_s_vs_vs(dst, src)) }
 inst_vsgn_s_vs_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSGN_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vsgn_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vsgn_s_vs_vs(dst, src)) }
+emit_vsgn_s_vs_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vsgn_s_vs_vs(dst, src)) }
 inst_vi2f_s_vs_vs_i5       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VI2F_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vi2f_s_vs_vs_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vi2f_s_vs_vs_i5(dst, src, imm)) }
+emit_vi2f_s_vs_vs_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vi2f_s_vs_vs_i5(dst, src, imm)) }
 inst_vi2f_p_vp_vp_i5       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VI2F_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vi2f_p_vp_vp_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vi2f_p_vp_vp_i5(dst, src, imm)) }
+emit_vi2f_p_vp_vp_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vi2f_p_vp_vp_i5(dst, src, imm)) }
 inst_vi2f_t_vt_vt_i5       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VI2F_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vi2f_t_vt_vt_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vi2f_t_vt_vt_i5(dst, src, imm)) }
+emit_vi2f_t_vt_vt_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vi2f_t_vt_vt_i5(dst, src, imm)) }
 inst_vi2f_q_vq_vq_i5       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VI2F_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vi2f_q_vq_vq_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vi2f_q_vq_vq_i5(dst, src, imm)) }
+emit_vi2f_q_vq_vq_i5       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vi2f_q_vq_vq_i5(dst, src, imm)) }
 inst_vf2in_s_vs_vs_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IN_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2in_s_vs_vs_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2in_s_vs_vs_i5(dst, src, imm)) }
+emit_vf2in_s_vs_vs_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2in_s_vs_vs_i5(dst, src, imm)) }
 inst_vf2in_p_vp_vp_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IN_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2in_p_vp_vp_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2in_p_vp_vp_i5(dst, src, imm)) }
+emit_vf2in_p_vp_vp_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2in_p_vp_vp_i5(dst, src, imm)) }
 inst_vf2in_t_vt_vt_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IN_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2in_t_vt_vt_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2in_t_vt_vt_i5(dst, src, imm)) }
+emit_vf2in_t_vt_vt_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2in_t_vt_vt_i5(dst, src, imm)) }
 inst_vf2in_q_vq_vq_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IN_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2in_q_vq_vq_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2in_q_vq_vq_i5(dst, src, imm)) }
+emit_vf2in_q_vq_vq_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2in_q_vq_vq_i5(dst, src, imm)) }
 inst_vf2iz_s_vs_vs_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IZ_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2iz_s_vs_vs_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2iz_s_vs_vs_i5(dst, src, imm)) }
+emit_vf2iz_s_vs_vs_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2iz_s_vs_vs_i5(dst, src, imm)) }
 inst_vf2iz_p_vp_vp_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IZ_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2iz_p_vp_vp_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2iz_p_vp_vp_i5(dst, src, imm)) }
+emit_vf2iz_p_vp_vp_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2iz_p_vp_vp_i5(dst, src, imm)) }
 inst_vf2iz_t_vt_vt_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IZ_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2iz_t_vt_vt_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2iz_t_vt_vt_i5(dst, src, imm)) }
+emit_vf2iz_t_vt_vt_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2iz_t_vt_vt_i5(dst, src, imm)) }
 inst_vf2iz_q_vq_vq_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IZ_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2iz_q_vq_vq_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2iz_q_vq_vq_i5(dst, src, imm)) }
+emit_vf2iz_q_vq_vq_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2iz_q_vq_vq_i5(dst, src, imm)) }
 inst_vf2iu_s_vs_vs_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IU_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2iu_s_vs_vs_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2iu_s_vs_vs_i5(dst, src, imm)) }
+emit_vf2iu_s_vs_vs_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2iu_s_vs_vs_i5(dst, src, imm)) }
 inst_vf2iu_p_vp_vp_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IU_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2iu_p_vp_vp_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2iu_p_vp_vp_i5(dst, src, imm)) }
+emit_vf2iu_p_vp_vp_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2iu_p_vp_vp_i5(dst, src, imm)) }
 inst_vf2iu_t_vt_vt_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IU_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2iu_t_vt_vt_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2iu_t_vt_vt_i5(dst, src, imm)) }
+emit_vf2iu_t_vt_vt_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2iu_t_vt_vt_i5(dst, src, imm)) }
 inst_vf2iu_q_vq_vq_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2IU_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2iu_q_vq_vq_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2iu_q_vq_vq_i5(dst, src, imm)) }
+emit_vf2iu_q_vq_vq_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2iu_q_vq_vq_i5(dst, src, imm)) }
 inst_vf2id_s_vs_vs_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2ID_S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2id_s_vs_vs_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2id_s_vs_vs_i5(dst, src, imm)) }
+emit_vf2id_s_vs_vs_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2id_s_vs_vs_i5(dst, src, imm)) }
 inst_vf2id_p_vp_vp_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2ID_P, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2id_p_vp_vp_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2id_p_vp_vp_i5(dst, src, imm)) }
+emit_vf2id_p_vp_vp_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2id_p_vp_vp_i5(dst, src, imm)) }
 inst_vf2id_t_vt_vt_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2ID_T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2id_t_vt_vt_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2id_t_vt_vt_i5(dst, src, imm)) }
+emit_vf2id_t_vt_vt_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2id_t_vt_vt_i5(dst, src, imm)) }
 inst_vf2id_q_vq_vq_i5      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VF2ID_Q, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} }
-emit_vf2id_q_vq_vq_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vf2id_q_vq_vq_i5(dst, src, imm)) }
+emit_vf2id_q_vq_vq_i5      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vf2id_q_vq_vq_i5(dst, src, imm)) }
 inst_vf2h_p_vs_vp          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VF2H_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vf2h_p_vs_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vf2h_p_vs_vp(dst, src)) }
+emit_vf2h_p_vs_vp          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vf2h_p_vs_vp(dst, src)) }
 inst_vh2f_s_vp_vs          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VH2F_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vh2f_s_vp_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vh2f_s_vp_vs(dst, src)) }
+emit_vh2f_s_vp_vs          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vh2f_s_vp_vs(dst, src)) }
 inst_vflush_none           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .VFLUSH, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_vflush_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vflush_none()) }
+emit_vflush_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vflush_none()) }
 inst_vsync_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .VSYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_vsync_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vsync_none()) }
+emit_vsync_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vsync_none()) }
 inst_vnop_none             :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .VNOP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_vnop_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vnop_none()) }
+emit_vnop_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vnop_none()) }
 inst_vpfxs_i20             :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .VPFXS, operand_count = 1, length = 4, ops = {op_imm(imm, 4), {}, {}, {}}} }
-emit_vpfxs_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_vpfxs_i20(imm)) }
+emit_vpfxs_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_vpfxs_i20(imm)) }
 inst_vpfxt_i20             :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .VPFXT, operand_count = 1, length = 4, ops = {op_imm(imm, 4), {}, {}, {}}} }
-emit_vpfxt_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_vpfxt_i20(imm)) }
+emit_vpfxt_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_vpfxt_i20(imm)) }
 inst_vpfxd_i20             :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .VPFXD, operand_count = 1, length = 4, ops = {op_imm(imm, 4), {}, {}, {}}} }
-emit_vpfxd_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_vpfxd_i20(imm)) }
+emit_vpfxd_i20             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_vpfxd_i20(imm)) }
 inst_vcst_s_vs_i5          :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCST_S, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} }
-emit_vcst_s_vs_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vcst_s_vs_i5(dst, imm)) }
+emit_vcst_s_vs_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vcst_s_vs_i5(dst, imm)) }
 inst_vcst_p_vp_i5          :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCST_P, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} }
-emit_vcst_p_vp_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vcst_p_vp_i5(dst, imm)) }
+emit_vcst_p_vp_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vcst_p_vp_i5(dst, imm)) }
 inst_vcst_t_vt_i5          :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCST_T, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} }
-emit_vcst_t_vt_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vcst_t_vt_i5(dst, imm)) }
+emit_vcst_t_vt_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vcst_t_vt_i5(dst, imm)) }
 inst_vcst_q_vq_i5          :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCST_Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} }
-emit_vcst_q_vq_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vcst_q_vq_i5(dst, imm)) }
+emit_vcst_q_vq_i5          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vcst_q_vq_i5(dst, imm)) }
 inst_mfv_r_vs              :: #force_inline proc "contextless" (dst: GPR, src: Register) -> Instruction { return Instruction{mnemonic = .MFV, operand_count = 2, length = 4, ops = {op_gpr(dst), op_reg(src), {}, {}}} }
-emit_mfv_r_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register) { append(instructions, inst_mfv_r_vs(dst, src)) }
+emit_mfv_r_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register) { append_elem(instructions, inst_mfv_r_vs(dst, src)) }
 inst_mtv_r_vs              :: #force_inline proc "contextless" (dst: GPR, src: Register) -> Instruction { return Instruction{mnemonic = .MTV, operand_count = 2, length = 4, ops = {op_gpr(dst), op_reg(src), {}, {}}} }
-emit_mtv_r_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register) { append(instructions, inst_mtv_r_vs(dst, src)) }
+emit_mtv_r_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register) { append_elem(instructions, inst_mtv_r_vs(dst, src)) }
 inst_mfvc_r_i5             :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MFVC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), {}, {}}} }
-emit_mfvc_r_i5             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_mfvc_r_i5(dst, imm)) }
+emit_mfvc_r_i5             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_mfvc_r_i5(dst, imm)) }
 inst_mtvc_r_i5             :: #force_inline proc "contextless" (dst: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MTVC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_imm(imm, 1), {}, {}}} }
-emit_mtvc_r_i5             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append(instructions, inst_mtvc_r_i5(dst, imm)) }
+emit_mtvc_r_i5             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, imm: i64) { append_elem(instructions, inst_mtvc_r_i5(dst, imm)) }
 inst_bvf_i5_rel            :: #force_inline proc "contextless" (imm: i64, target: u32) -> Instruction { return Instruction{mnemonic = .BVF, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(target), {}, {}}} }
-emit_bvf_i5_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append(instructions, inst_bvf_i5_rel(imm, target)) }
+emit_bvf_i5_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append_elem(instructions, inst_bvf_i5_rel(imm, target)) }
 inst_bvt_i5_rel            :: #force_inline proc "contextless" (imm: i64, target: u32) -> Instruction { return Instruction{mnemonic = .BVT, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(target), {}, {}}} }
-emit_bvt_i5_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append(instructions, inst_bvt_i5_rel(imm, target)) }
+emit_bvt_i5_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append_elem(instructions, inst_bvt_i5_rel(imm, target)) }
 inst_bvfl_i5_rel           :: #force_inline proc "contextless" (imm: i64, target: u32) -> Instruction { return Instruction{mnemonic = .BVFL, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(target), {}, {}}} }
-emit_bvfl_i5_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append(instructions, inst_bvfl_i5_rel(imm, target)) }
+emit_bvfl_i5_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append_elem(instructions, inst_bvfl_i5_rel(imm, target)) }
 inst_bvtl_i5_rel           :: #force_inline proc "contextless" (imm: i64, target: u32) -> Instruction { return Instruction{mnemonic = .BVTL, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_label(target), {}, {}}} }
-emit_bvtl_i5_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append(instructions, inst_bvtl_i5_rel(imm, target)) }
+emit_bvtl_i5_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, target: u32) { append_elem(instructions, inst_bvtl_i5_rel(imm, target)) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/mips/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/mips/tools/gen_mnemonic_builders.odin
index d177dac85..926accafe 100644
--- a/core/rexcode/isa/mips/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/mips/tools/gen_mnemonic_builders.odin
@@ -506,7 +506,7 @@ generate_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
 	for n := pad - len(entry.proc_name); n > 0; n -= 1 { strings.write_byte(sb, ' ') }
 	strings.write_string(sb, " :: #force_inline proc(")
 	strings.write_string(sb, params)
-	strings.write_string(sb, ") { append(instructions, ")
+	strings.write_string(sb, ") { append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_string(sb, "(")
 	for i in 0..<sig.count {
diff --git a/core/rexcode/isa/mos6502/mnemonic_builders.odin b/core/rexcode/isa/mos6502/mnemonic_builders.odin
index a3562af95..a09cd2a8d 100644
--- a/core/rexcode/isa/mos6502/mnemonic_builders.odin
+++ b/core/rexcode/isa/mos6502/mnemonic_builders.odin
@@ -24,330 +24,330 @@ package rexcode_mos6502
 
 inst_adc_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ADC, imm) }
 inst_adc_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ADC, m) }
-emit_adc_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ADC, imm)) }
-emit_adc_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.ADC, m)) }
+emit_adc_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ADC, imm)) }
+emit_adc_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.ADC, m)) }
 inst_and_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.AND, imm) }
 inst_and_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.AND, m) }
-emit_and_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.AND, imm)) }
-emit_and_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.AND, m)) }
+emit_and_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.AND, imm)) }
+emit_and_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.AND, m)) }
 inst_asl_a       :: #force_inline proc "contextless" () -> Instruction { return inst_a(.ASL) }
 inst_asl_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ASL, m) }
-emit_asl_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_a(.ASL)) }
-emit_asl_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.ASL, m)) }
+emit_asl_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_a(.ASL)) }
+emit_asl_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.ASL, m)) }
 inst_bit_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.BIT, m) }
 inst_bit_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.BIT, imm) }
-emit_bit_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.BIT, m)) }
-emit_bit_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.BIT, imm)) }
+emit_bit_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.BIT, m)) }
+emit_bit_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.BIT, imm)) }
 inst_cmp_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.CMP, imm) }
 inst_cmp_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.CMP, m) }
-emit_cmp_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.CMP, imm)) }
-emit_cmp_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.CMP, m)) }
+emit_cmp_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.CMP, imm)) }
+emit_cmp_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.CMP, m)) }
 inst_cpx_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.CPX, imm) }
 inst_cpx_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.CPX, m) }
-emit_cpx_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.CPX, imm)) }
-emit_cpx_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.CPX, m)) }
+emit_cpx_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.CPX, imm)) }
+emit_cpx_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.CPX, m)) }
 inst_cpy_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.CPY, imm) }
 inst_cpy_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.CPY, m) }
-emit_cpy_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.CPY, imm)) }
-emit_cpy_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.CPY, m)) }
+emit_cpy_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.CPY, imm)) }
+emit_cpy_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.CPY, m)) }
 inst_dec_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.DEC, m) }
 inst_dec_a       :: #force_inline proc "contextless" () -> Instruction { return inst_a(.DEC) }
-emit_dec_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.DEC, m)) }
-emit_dec_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_a(.DEC)) }
+emit_dec_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.DEC, m)) }
+emit_dec_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_a(.DEC)) }
 inst_dex_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.DEX) }
-emit_dex_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.DEX)) }
+emit_dex_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.DEX)) }
 inst_dey_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.DEY) }
-emit_dey_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.DEY)) }
+emit_dey_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.DEY)) }
 inst_eor_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.EOR, imm) }
 inst_eor_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.EOR, m) }
-emit_eor_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.EOR, imm)) }
-emit_eor_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.EOR, m)) }
+emit_eor_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.EOR, imm)) }
+emit_eor_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.EOR, m)) }
 inst_inc_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.INC, m) }
 inst_inc_a       :: #force_inline proc "contextless" () -> Instruction { return inst_a(.INC) }
-emit_inc_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.INC, m)) }
-emit_inc_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_a(.INC)) }
+emit_inc_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.INC, m)) }
+emit_inc_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_a(.INC)) }
 inst_inx_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.INX) }
-emit_inx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.INX)) }
+emit_inx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.INX)) }
 inst_iny_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.INY) }
-emit_iny_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.INY)) }
+emit_iny_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.INY)) }
 inst_lsr_a       :: #force_inline proc "contextless" () -> Instruction { return inst_a(.LSR) }
 inst_lsr_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LSR, m) }
-emit_lsr_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_a(.LSR)) }
-emit_lsr_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.LSR, m)) }
+emit_lsr_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_a(.LSR)) }
+emit_lsr_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.LSR, m)) }
 inst_ora_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ORA, imm) }
 inst_ora_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ORA, m) }
-emit_ora_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ORA, imm)) }
-emit_ora_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.ORA, m)) }
+emit_ora_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ORA, imm)) }
+emit_ora_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.ORA, m)) }
 inst_rol_a       :: #force_inline proc "contextless" () -> Instruction { return inst_a(.ROL) }
 inst_rol_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ROL, m) }
-emit_rol_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_a(.ROL)) }
-emit_rol_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.ROL, m)) }
+emit_rol_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_a(.ROL)) }
+emit_rol_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.ROL, m)) }
 inst_ror_a       :: #force_inline proc "contextless" () -> Instruction { return inst_a(.ROR) }
 inst_ror_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ROR, m) }
-emit_ror_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_a(.ROR)) }
-emit_ror_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.ROR, m)) }
+emit_ror_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_a(.ROR)) }
+emit_ror_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.ROR, m)) }
 inst_sbc_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.SBC, imm) }
 inst_sbc_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SBC, m) }
-emit_sbc_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.SBC, imm)) }
-emit_sbc_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SBC, m)) }
+emit_sbc_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.SBC, imm)) }
+emit_sbc_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SBC, m)) }
 inst_bcc_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BCC, label_id) }
-emit_bcc_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BCC, label_id)) }
+emit_bcc_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BCC, label_id)) }
 inst_bcs_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BCS, label_id) }
-emit_bcs_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BCS, label_id)) }
+emit_bcs_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BCS, label_id)) }
 inst_beq_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BEQ, label_id) }
-emit_beq_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BEQ, label_id)) }
+emit_beq_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BEQ, label_id)) }
 inst_bmi_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BMI, label_id) }
-emit_bmi_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BMI, label_id)) }
+emit_bmi_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BMI, label_id)) }
 inst_bne_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BNE, label_id) }
-emit_bne_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BNE, label_id)) }
+emit_bne_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BNE, label_id)) }
 inst_bpl_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BPL, label_id) }
-emit_bpl_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BPL, label_id)) }
+emit_bpl_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BPL, label_id)) }
 inst_bvc_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BVC, label_id) }
-emit_bvc_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BVC, label_id)) }
+emit_bvc_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BVC, label_id)) }
 inst_bvs_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BVS, label_id) }
-emit_bvs_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BVS, label_id)) }
+emit_bvs_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BVS, label_id)) }
 inst_jmp_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.JMP, m) }
-emit_jmp_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.JMP, m)) }
+emit_jmp_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.JMP, m)) }
 inst_jsr_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.JSR, m) }
-emit_jsr_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.JSR, m)) }
+emit_jsr_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.JSR, m)) }
 inst_rti_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.RTI) }
-emit_rti_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.RTI)) }
+emit_rti_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.RTI)) }
 inst_rts_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.RTS) }
-emit_rts_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.RTS)) }
+emit_rts_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.RTS)) }
 inst_brk_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.BRK) }
-emit_brk_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.BRK)) }
+emit_brk_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.BRK)) }
 inst_clc_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLC) }
-emit_clc_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CLC)) }
+emit_clc_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CLC)) }
 inst_cld_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLD) }
-emit_cld_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CLD)) }
+emit_cld_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CLD)) }
 inst_cli_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLI) }
-emit_cli_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CLI)) }
+emit_cli_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CLI)) }
 inst_clv_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLV) }
-emit_clv_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CLV)) }
+emit_clv_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CLV)) }
 inst_sec_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SEC) }
-emit_sec_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.SEC)) }
+emit_sec_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.SEC)) }
 inst_sed_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SED) }
-emit_sed_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.SED)) }
+emit_sed_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.SED)) }
 inst_sei_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SEI) }
-emit_sei_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.SEI)) }
+emit_sei_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.SEI)) }
 inst_lda_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.LDA, imm) }
 inst_lda_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LDA, m) }
-emit_lda_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.LDA, imm)) }
-emit_lda_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.LDA, m)) }
+emit_lda_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.LDA, imm)) }
+emit_lda_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.LDA, m)) }
 inst_ldx_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.LDX, imm) }
 inst_ldx_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LDX, m) }
-emit_ldx_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.LDX, imm)) }
-emit_ldx_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.LDX, m)) }
+emit_ldx_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.LDX, imm)) }
+emit_ldx_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.LDX, m)) }
 inst_ldy_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.LDY, imm) }
 inst_ldy_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LDY, m) }
-emit_ldy_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.LDY, imm)) }
-emit_ldy_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.LDY, m)) }
+emit_ldy_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.LDY, imm)) }
+emit_ldy_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.LDY, m)) }
 inst_sta_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.STA, m) }
-emit_sta_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.STA, m)) }
+emit_sta_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.STA, m)) }
 inst_stx_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.STX, m) }
-emit_stx_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.STX, m)) }
+emit_stx_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.STX, m)) }
 inst_sty_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.STY, m) }
-emit_sty_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.STY, m)) }
+emit_sty_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.STY, m)) }
 inst_pha_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHA) }
-emit_pha_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.PHA)) }
+emit_pha_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.PHA)) }
 inst_php_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHP) }
-emit_php_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.PHP)) }
+emit_php_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.PHP)) }
 inst_pla_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLA) }
-emit_pla_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.PLA)) }
+emit_pla_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.PLA)) }
 inst_plp_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLP) }
-emit_plp_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.PLP)) }
+emit_plp_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.PLP)) }
 inst_tax_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TAX) }
-emit_tax_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.TAX)) }
+emit_tax_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.TAX)) }
 inst_tay_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TAY) }
-emit_tay_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.TAY)) }
+emit_tay_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.TAY)) }
 inst_tsx_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TSX) }
-emit_tsx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.TSX)) }
+emit_tsx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.TSX)) }
 inst_txa_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TXA) }
-emit_txa_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.TXA)) }
+emit_txa_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.TXA)) }
 inst_txs_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TXS) }
-emit_txs_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.TXS)) }
+emit_txs_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.TXS)) }
 inst_tya_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TYA) }
-emit_tya_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.TYA)) }
+emit_tya_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.TYA)) }
 inst_nop_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.NOP) }
-emit_nop_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.NOP)) }
+emit_nop_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.NOP)) }
 inst_lax_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LAX, m) }
-emit_lax_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.LAX, m)) }
+emit_lax_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.LAX, m)) }
 inst_dcp_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.DCP, m) }
-emit_dcp_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.DCP, m)) }
+emit_dcp_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.DCP, m)) }
 inst_isc_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ISC, m) }
-emit_isc_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.ISC, m)) }
+emit_isc_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.ISC, m)) }
 inst_rla_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RLA, m) }
-emit_rla_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RLA, m)) }
+emit_rla_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RLA, m)) }
 inst_rra_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RRA, m) }
-emit_rra_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RRA, m)) }
+emit_rra_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RRA, m)) }
 inst_slo_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SLO, m) }
-emit_slo_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SLO, m)) }
+emit_slo_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SLO, m)) }
 inst_sre_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SRE, m) }
-emit_sre_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SRE, m)) }
+emit_sre_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SRE, m)) }
 inst_alr_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ALR, imm) }
-emit_alr_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ALR, imm)) }
+emit_alr_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ALR, imm)) }
 inst_anc_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ANC, imm) }
-emit_anc_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ANC, imm)) }
+emit_anc_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ANC, imm)) }
 inst_arr_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ARR, imm) }
-emit_arr_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ARR, imm)) }
+emit_arr_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ARR, imm)) }
 inst_axs_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.AXS, imm) }
-emit_axs_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.AXS, imm)) }
+emit_axs_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.AXS, imm)) }
 inst_las_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LAS, m) }
-emit_las_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.LAS, m)) }
+emit_las_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.LAS, m)) }
 inst_ane_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ANE, imm) }
-emit_ane_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ANE, imm)) }
+emit_ane_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ANE, imm)) }
 inst_lxa_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.LXA, imm) }
-emit_lxa_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.LXA, imm)) }
+emit_lxa_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.LXA, imm)) }
 inst_sha_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SHA, m) }
-emit_sha_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SHA, m)) }
+emit_sha_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SHA, m)) }
 inst_shx_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SHX, m) }
-emit_shx_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SHX, m)) }
+emit_shx_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SHX, m)) }
 inst_shy_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SHY, m) }
-emit_shy_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SHY, m)) }
+emit_shy_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SHY, m)) }
 inst_tas_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.TAS, m) }
-emit_tas_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.TAS, m)) }
+emit_tas_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.TAS, m)) }
 inst_jam_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.JAM) }
-emit_jam_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.JAM)) }
+emit_jam_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.JAM)) }
 inst_usbc_imm8   :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.USBC, imm) }
-emit_usbc_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.USBC, imm)) }
+emit_usbc_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.USBC, imm)) }
 inst_dop_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.DOP, imm) }
 inst_dop_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.DOP, m) }
-emit_dop_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.DOP, imm)) }
-emit_dop_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.DOP, m)) }
+emit_dop_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.DOP, imm)) }
+emit_dop_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.DOP, m)) }
 inst_top_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.TOP, m) }
-emit_top_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.TOP, m)) }
+emit_top_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.TOP, m)) }
 inst_bra_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BRA, label_id) }
-emit_bra_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BRA, label_id)) }
+emit_bra_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BRA, label_id)) }
 inst_ina_a       :: #force_inline proc "contextless" () -> Instruction { return inst_a(.INA) }
-emit_ina_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_a(.INA)) }
+emit_ina_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_a(.INA)) }
 inst_dea_a       :: #force_inline proc "contextless" () -> Instruction { return inst_a(.DEA) }
-emit_dea_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_a(.DEA)) }
+emit_dea_a       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_a(.DEA)) }
 inst_phx_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHX) }
-emit_phx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.PHX)) }
+emit_phx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.PHX)) }
 inst_phy_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHY) }
-emit_phy_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.PHY)) }
+emit_phy_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.PHY)) }
 inst_plx_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLX) }
-emit_plx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.PLX)) }
+emit_plx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.PLX)) }
 inst_ply_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLY) }
-emit_ply_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.PLY)) }
+emit_ply_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.PLY)) }
 inst_stz_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.STZ, m) }
-emit_stz_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.STZ, m)) }
+emit_stz_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.STZ, m)) }
 inst_trb_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.TRB, m) }
-emit_trb_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.TRB, m)) }
+emit_trb_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.TRB, m)) }
 inst_tsb_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.TSB, m) }
-emit_tsb_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.TSB, m)) }
+emit_tsb_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.TSB, m)) }
 inst_stp_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.STP) }
-emit_stp_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.STP)) }
+emit_stp_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.STP)) }
 inst_wai_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.WAI) }
-emit_wai_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.WAI)) }
+emit_wai_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.WAI)) }
 inst_rmb0_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RMB0, m) }
-emit_rmb0_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RMB0, m)) }
+emit_rmb0_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RMB0, m)) }
 inst_rmb1_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RMB1, m) }
-emit_rmb1_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RMB1, m)) }
+emit_rmb1_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RMB1, m)) }
 inst_rmb2_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RMB2, m) }
-emit_rmb2_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RMB2, m)) }
+emit_rmb2_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RMB2, m)) }
 inst_rmb3_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RMB3, m) }
-emit_rmb3_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RMB3, m)) }
+emit_rmb3_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RMB3, m)) }
 inst_rmb4_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RMB4, m) }
-emit_rmb4_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RMB4, m)) }
+emit_rmb4_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RMB4, m)) }
 inst_rmb5_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RMB5, m) }
-emit_rmb5_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RMB5, m)) }
+emit_rmb5_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RMB5, m)) }
 inst_rmb6_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RMB6, m) }
-emit_rmb6_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RMB6, m)) }
+emit_rmb6_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RMB6, m)) }
 inst_rmb7_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.RMB7, m) }
-emit_rmb7_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.RMB7, m)) }
+emit_rmb7_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.RMB7, m)) }
 inst_smb0_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SMB0, m) }
-emit_smb0_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SMB0, m)) }
+emit_smb0_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SMB0, m)) }
 inst_smb1_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SMB1, m) }
-emit_smb1_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SMB1, m)) }
+emit_smb1_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SMB1, m)) }
 inst_smb2_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SMB2, m) }
-emit_smb2_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SMB2, m)) }
+emit_smb2_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SMB2, m)) }
 inst_smb3_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SMB3, m) }
-emit_smb3_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SMB3, m)) }
+emit_smb3_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SMB3, m)) }
 inst_smb4_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SMB4, m) }
-emit_smb4_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SMB4, m)) }
+emit_smb4_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SMB4, m)) }
 inst_smb5_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SMB5, m) }
-emit_smb5_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SMB5, m)) }
+emit_smb5_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SMB5, m)) }
 inst_smb6_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SMB6, m) }
-emit_smb6_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SMB6, m)) }
+emit_smb6_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SMB6, m)) }
 inst_smb7_m      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SMB7, m) }
-emit_smb7_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SMB7, m)) }
+emit_smb7_m      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SMB7, m)) }
 inst_bbr0_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBR0, zp, label_id) }
-emit_bbr0_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBR0, zp, label_id)) }
+emit_bbr0_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBR0, zp, label_id)) }
 inst_bbr1_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBR1, zp, label_id) }
-emit_bbr1_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBR1, zp, label_id)) }
+emit_bbr1_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBR1, zp, label_id)) }
 inst_bbr2_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBR2, zp, label_id) }
-emit_bbr2_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBR2, zp, label_id)) }
+emit_bbr2_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBR2, zp, label_id)) }
 inst_bbr3_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBR3, zp, label_id) }
-emit_bbr3_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBR3, zp, label_id)) }
+emit_bbr3_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBR3, zp, label_id)) }
 inst_bbr4_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBR4, zp, label_id) }
-emit_bbr4_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBR4, zp, label_id)) }
+emit_bbr4_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBR4, zp, label_id)) }
 inst_bbr5_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBR5, zp, label_id) }
-emit_bbr5_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBR5, zp, label_id)) }
+emit_bbr5_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBR5, zp, label_id)) }
 inst_bbr6_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBR6, zp, label_id) }
-emit_bbr6_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBR6, zp, label_id)) }
+emit_bbr6_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBR6, zp, label_id)) }
 inst_bbr7_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBR7, zp, label_id) }
-emit_bbr7_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBR7, zp, label_id)) }
+emit_bbr7_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBR7, zp, label_id)) }
 inst_bbs0_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBS0, zp, label_id) }
-emit_bbs0_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBS0, zp, label_id)) }
+emit_bbs0_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBS0, zp, label_id)) }
 inst_bbs1_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBS1, zp, label_id) }
-emit_bbs1_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBS1, zp, label_id)) }
+emit_bbs1_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBS1, zp, label_id)) }
 inst_bbs2_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBS2, zp, label_id) }
-emit_bbs2_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBS2, zp, label_id)) }
+emit_bbs2_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBS2, zp, label_id)) }
 inst_bbs3_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBS3, zp, label_id) }
-emit_bbs3_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBS3, zp, label_id)) }
+emit_bbs3_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBS3, zp, label_id)) }
 inst_bbs4_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBS4, zp, label_id) }
-emit_bbs4_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBS4, zp, label_id)) }
+emit_bbs4_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBS4, zp, label_id)) }
 inst_bbs5_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBS5, zp, label_id) }
-emit_bbs5_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBS5, zp, label_id)) }
+emit_bbs5_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBS5, zp, label_id)) }
 inst_bbs6_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBS6, zp, label_id) }
-emit_bbs6_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBS6, zp, label_id)) }
+emit_bbs6_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBS6, zp, label_id)) }
 inst_bbs7_zp_rel :: #force_inline proc "contextless" (zp: u8, label_id: u32) -> Instruction { return inst_zp_rel(.BBS7, zp, label_id) }
-emit_bbs7_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append(instructions, inst_zp_rel(.BBS7, zp, label_id)) }
+emit_bbs7_zp_rel :: #force_inline proc(instructions: ^[dynamic]Instruction, zp: u8, label_id: u32) { append_elem(instructions, inst_zp_rel(.BBS7, zp, label_id)) }
 inst_sxy_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SXY) }
-emit_sxy_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.SXY)) }
+emit_sxy_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.SXY)) }
 inst_sax_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SAX) }
 inst_sax_m       :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SAX, m) }
-emit_sax_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.SAX)) }
-emit_sax_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_m(.SAX, m)) }
+emit_sax_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.SAX)) }
+emit_sax_m       :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_m(.SAX, m)) }
 inst_say_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SAY) }
-emit_say_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.SAY)) }
+emit_say_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.SAY)) }
 inst_cla_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLA) }
-emit_cla_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CLA)) }
+emit_cla_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CLA)) }
 inst_clx_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLX) }
-emit_clx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CLX)) }
+emit_clx_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CLX)) }
 inst_cly_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLY) }
-emit_cly_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CLY)) }
+emit_cly_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CLY)) }
 inst_csh_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CSH) }
-emit_csh_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CSH)) }
+emit_csh_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CSH)) }
 inst_csl_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CSL) }
-emit_csl_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.CSL)) }
+emit_csl_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.CSL)) }
 inst_set_none    :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SET) }
-emit_set_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_none(.SET)) }
+emit_set_none    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_none(.SET)) }
 inst_st0_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ST0, imm) }
-emit_st0_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ST0, imm)) }
+emit_st0_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ST0, imm)) }
 inst_st1_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ST1, imm) }
-emit_st1_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ST1, imm)) }
+emit_st1_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ST1, imm)) }
 inst_st2_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.ST2, imm) }
-emit_st2_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.ST2, imm)) }
+emit_st2_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.ST2, imm)) }
 inst_tam_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.TAM, imm) }
-emit_tam_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.TAM, imm)) }
+emit_tam_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.TAM, imm)) }
 inst_tma_imm8    :: #force_inline proc "contextless" (imm: i64) -> Instruction { return inst_i(.TMA, imm) }
-emit_tma_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_i(.TMA, imm)) }
+emit_tma_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_i(.TMA, imm)) }
 inst_tst_tst     :: #force_inline proc "contextless" (imm: i64, m: Memory) -> Instruction { return Instruction{mnemonic = .TST, operand_count = 2, length = 0, ops = {op_imm8(imm), op_mem(m), {}}} }
-emit_tst_tst     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, m: Memory) { append(instructions, Instruction{mnemonic = .TST, operand_count = 2, length = 0, ops = {op_imm8(imm), op_mem(m), {}}}) }
+emit_tst_tst     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, m: Memory) { append_elem(instructions, Instruction{mnemonic = .TST, operand_count = 2, length = 0, ops = {op_imm8(imm), op_mem(m), {}}}) }
 inst_bsr_rel     :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return inst_rel(.BSR, label_id) }
-emit_bsr_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_rel(.BSR, label_id)) }
+emit_bsr_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_rel(.BSR, label_id)) }
 inst_tii_block   :: #force_inline proc "contextless" (src, dst, length_val: u16) -> Instruction { return inst_block(.TII, src, dst, length_val) }
-emit_tii_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append(instructions, inst_block(.TII, src, dst, length_val)) }
+emit_tii_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append_elem(instructions, inst_block(.TII, src, dst, length_val)) }
 inst_tdd_block   :: #force_inline proc "contextless" (src, dst, length_val: u16) -> Instruction { return inst_block(.TDD, src, dst, length_val) }
-emit_tdd_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append(instructions, inst_block(.TDD, src, dst, length_val)) }
+emit_tdd_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append_elem(instructions, inst_block(.TDD, src, dst, length_val)) }
 inst_tin_block   :: #force_inline proc "contextless" (src, dst, length_val: u16) -> Instruction { return inst_block(.TIN, src, dst, length_val) }
-emit_tin_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append(instructions, inst_block(.TIN, src, dst, length_val)) }
+emit_tin_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append_elem(instructions, inst_block(.TIN, src, dst, length_val)) }
 inst_tia_block   :: #force_inline proc "contextless" (src, dst, length_val: u16) -> Instruction { return inst_block(.TIA, src, dst, length_val) }
-emit_tia_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append(instructions, inst_block(.TIA, src, dst, length_val)) }
+emit_tia_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append_elem(instructions, inst_block(.TIA, src, dst, length_val)) }
 inst_tai_block   :: #force_inline proc "contextless" (src, dst, length_val: u16) -> Instruction { return inst_block(.TAI, src, dst, length_val) }
-emit_tai_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append(instructions, inst_block(.TAI, src, dst, length_val)) }
+emit_tai_block   :: #force_inline proc(instructions: ^[dynamic]Instruction, src, dst, length_val: u16) { append_elem(instructions, inst_block(.TAI, src, dst, length_val)) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/mos6502/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/mos6502/tools/gen_mnemonic_builders.odin
index b8f28f784..335fc9509 100644
--- a/core/rexcode/isa/mos6502/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/mos6502/tools/gen_mnemonic_builders.odin
@@ -297,7 +297,7 @@ shape_inst_body :: proc(sb: ^strings.Builder, e: Proc_Entry) {
 
 // emit_ body: append the corresponding inst_ result.
 shape_emit_body :: proc(sb: ^strings.Builder, e: Proc_Entry) {
-	strings.write_string(sb, "append(instructions, ")
+	strings.write_string(sb, "append_elem(instructions, ")
 	shape_inst_body(sb, e)
 	strings.write_string(sb, ")")
 }
diff --git a/core/rexcode/isa/mos65816/mnemonic_builders.odin b/core/rexcode/isa/mos65816/mnemonic_builders.odin
index 155cc0e3b..6c224bc17 100644
--- a/core/rexcode/isa/mos65816/mnemonic_builders.odin
+++ b/core/rexcode/isa/mos65816/mnemonic_builders.odin
@@ -33,247 +33,247 @@ package rexcode_mos65816
 inst_adc_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ADC, m) }
 inst_adc_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.ADC, i64(imm)) }
 inst_adc_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.ADC, i64(imm)) }
-emit_adc_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_adc_mem(m)) }
-emit_adc_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_adc_imm8(imm)) }
-emit_adc_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_adc_imm16(imm)) }
+emit_adc_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_adc_mem(m)) }
+emit_adc_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_adc_imm8(imm)) }
+emit_adc_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_adc_imm16(imm)) }
 inst_and_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.AND, m) }
 inst_and_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.AND, i64(imm)) }
 inst_and_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.AND, i64(imm)) }
-emit_and_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_and_mem(m)) }
-emit_and_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_and_imm8(imm)) }
-emit_and_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_and_imm16(imm)) }
+emit_and_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_and_mem(m)) }
+emit_and_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_and_imm8(imm)) }
+emit_and_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_and_imm16(imm)) }
 inst_asl_a        :: #force_inline proc "contextless" () -> Instruction { return inst_a(.ASL) }
 inst_asl_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ASL, m) }
-emit_asl_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_asl_a()) }
-emit_asl_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_asl_mem(m)) }
+emit_asl_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_asl_a()) }
+emit_asl_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_asl_mem(m)) }
 inst_bit_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.BIT, m) }
 inst_bit_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.BIT, i64(imm)) }
 inst_bit_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.BIT, i64(imm)) }
-emit_bit_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_bit_mem(m)) }
-emit_bit_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_bit_imm8(imm)) }
-emit_bit_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_bit_imm16(imm)) }
+emit_bit_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_bit_mem(m)) }
+emit_bit_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_bit_imm8(imm)) }
+emit_bit_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_bit_imm16(imm)) }
 inst_cmp_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.CMP, m) }
 inst_cmp_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.CMP, i64(imm)) }
 inst_cmp_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.CMP, i64(imm)) }
-emit_cmp_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_cmp_mem(m)) }
-emit_cmp_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_cmp_imm8(imm)) }
-emit_cmp_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_cmp_imm16(imm)) }
+emit_cmp_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_cmp_mem(m)) }
+emit_cmp_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_cmp_imm8(imm)) }
+emit_cmp_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_cmp_imm16(imm)) }
 inst_cpx_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.CPX, i64(imm)) }
 inst_cpx_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.CPX, i64(imm)) }
 inst_cpx_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.CPX, m) }
-emit_cpx_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_cpx_imm8(imm)) }
-emit_cpx_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_cpx_imm16(imm)) }
-emit_cpx_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_cpx_mem(m)) }
+emit_cpx_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_cpx_imm8(imm)) }
+emit_cpx_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_cpx_imm16(imm)) }
+emit_cpx_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_cpx_mem(m)) }
 inst_cpy_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.CPY, i64(imm)) }
 inst_cpy_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.CPY, i64(imm)) }
 inst_cpy_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.CPY, m) }
-emit_cpy_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_cpy_imm8(imm)) }
-emit_cpy_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_cpy_imm16(imm)) }
-emit_cpy_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_cpy_mem(m)) }
+emit_cpy_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_cpy_imm8(imm)) }
+emit_cpy_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_cpy_imm16(imm)) }
+emit_cpy_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_cpy_mem(m)) }
 inst_dec_a        :: #force_inline proc "contextless" () -> Instruction { return inst_a(.DEC) }
 inst_dec_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.DEC, m) }
-emit_dec_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dec_a()) }
-emit_dec_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_dec_mem(m)) }
+emit_dec_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dec_a()) }
+emit_dec_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_dec_mem(m)) }
 inst_dex_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.DEX) }
-emit_dex_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dex_none()) }
+emit_dex_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dex_none()) }
 inst_dey_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.DEY) }
-emit_dey_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dey_none()) }
+emit_dey_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dey_none()) }
 inst_eor_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.EOR, m) }
 inst_eor_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.EOR, i64(imm)) }
 inst_eor_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.EOR, i64(imm)) }
-emit_eor_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_eor_mem(m)) }
-emit_eor_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_eor_imm8(imm)) }
-emit_eor_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_eor_imm16(imm)) }
+emit_eor_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_eor_mem(m)) }
+emit_eor_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_eor_imm8(imm)) }
+emit_eor_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_eor_imm16(imm)) }
 inst_inc_a        :: #force_inline proc "contextless" () -> Instruction { return inst_a(.INC) }
 inst_inc_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.INC, m) }
-emit_inc_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_inc_a()) }
-emit_inc_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_inc_mem(m)) }
+emit_inc_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_inc_a()) }
+emit_inc_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_inc_mem(m)) }
 inst_inx_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.INX) }
-emit_inx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_inx_none()) }
+emit_inx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_inx_none()) }
 inst_iny_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.INY) }
-emit_iny_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_iny_none()) }
+emit_iny_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_iny_none()) }
 inst_lsr_a        :: #force_inline proc "contextless" () -> Instruction { return inst_a(.LSR) }
 inst_lsr_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LSR, m) }
-emit_lsr_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lsr_a()) }
-emit_lsr_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_lsr_mem(m)) }
+emit_lsr_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lsr_a()) }
+emit_lsr_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_lsr_mem(m)) }
 inst_ora_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ORA, m) }
 inst_ora_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.ORA, i64(imm)) }
 inst_ora_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.ORA, i64(imm)) }
-emit_ora_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_ora_mem(m)) }
-emit_ora_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_ora_imm8(imm)) }
-emit_ora_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_ora_imm16(imm)) }
+emit_ora_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_ora_mem(m)) }
+emit_ora_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_ora_imm8(imm)) }
+emit_ora_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_ora_imm16(imm)) }
 inst_rol_a        :: #force_inline proc "contextless" () -> Instruction { return inst_a(.ROL) }
 inst_rol_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ROL, m) }
-emit_rol_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rol_a()) }
-emit_rol_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_rol_mem(m)) }
+emit_rol_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rol_a()) }
+emit_rol_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_rol_mem(m)) }
 inst_ror_a        :: #force_inline proc "contextless" () -> Instruction { return inst_a(.ROR) }
 inst_ror_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.ROR, m) }
-emit_ror_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ror_a()) }
-emit_ror_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_ror_mem(m)) }
+emit_ror_a        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ror_a()) }
+emit_ror_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_ror_mem(m)) }
 inst_sbc_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.SBC, m) }
 inst_sbc_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.SBC, i64(imm)) }
 inst_sbc_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.SBC, i64(imm)) }
-emit_sbc_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_sbc_mem(m)) }
-emit_sbc_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_sbc_imm8(imm)) }
-emit_sbc_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_sbc_imm16(imm)) }
+emit_sbc_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_sbc_mem(m)) }
+emit_sbc_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_sbc_imm8(imm)) }
+emit_sbc_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_sbc_imm16(imm)) }
 inst_lda_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LDA, m) }
 inst_lda_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.LDA, i64(imm)) }
 inst_lda_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.LDA, i64(imm)) }
-emit_lda_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_lda_mem(m)) }
-emit_lda_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_lda_imm8(imm)) }
-emit_lda_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_lda_imm16(imm)) }
+emit_lda_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_lda_mem(m)) }
+emit_lda_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_lda_imm8(imm)) }
+emit_lda_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_lda_imm16(imm)) }
 inst_ldx_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.LDX, i64(imm)) }
 inst_ldx_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.LDX, i64(imm)) }
 inst_ldx_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LDX, m) }
-emit_ldx_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_ldx_imm8(imm)) }
-emit_ldx_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_ldx_imm16(imm)) }
-emit_ldx_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_ldx_mem(m)) }
+emit_ldx_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_ldx_imm8(imm)) }
+emit_ldx_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_ldx_imm16(imm)) }
+emit_ldx_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_ldx_mem(m)) }
 inst_ldy_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.LDY, i64(imm)) }
 inst_ldy_imm16    :: #force_inline proc "contextless" (imm: i16) -> Instruction { return inst_i16(.LDY, i64(imm)) }
 inst_ldy_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.LDY, m) }
-emit_ldy_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_ldy_imm8(imm)) }
-emit_ldy_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_ldy_imm16(imm)) }
-emit_ldy_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_ldy_mem(m)) }
+emit_ldy_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_ldy_imm8(imm)) }
+emit_ldy_imm16    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_ldy_imm16(imm)) }
+emit_ldy_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_ldy_mem(m)) }
 inst_sta_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.STA, m) }
-emit_sta_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_sta_mem(m)) }
+emit_sta_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_sta_mem(m)) }
 inst_stx_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.STX, m) }
-emit_stx_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_stx_mem(m)) }
+emit_stx_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_stx_mem(m)) }
 inst_sty_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.STY, m) }
-emit_sty_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_sty_mem(m)) }
+emit_sty_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_sty_mem(m)) }
 inst_tax_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TAX) }
-emit_tax_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tax_none()) }
+emit_tax_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tax_none()) }
 inst_tay_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TAY) }
-emit_tay_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tay_none()) }
+emit_tay_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tay_none()) }
 inst_tsx_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TSX) }
-emit_tsx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tsx_none()) }
+emit_tsx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tsx_none()) }
 inst_txa_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TXA) }
-emit_txa_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_txa_none()) }
+emit_txa_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_txa_none()) }
 inst_txs_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TXS) }
-emit_txs_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_txs_none()) }
+emit_txs_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_txs_none()) }
 inst_tya_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TYA) }
-emit_tya_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tya_none()) }
+emit_tya_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tya_none()) }
 inst_pha_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHA) }
-emit_pha_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pha_none()) }
+emit_pha_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pha_none()) }
 inst_php_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHP) }
-emit_php_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_php_none()) }
+emit_php_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_php_none()) }
 inst_pla_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLA) }
-emit_pla_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pla_none()) }
+emit_pla_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pla_none()) }
 inst_plp_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLP) }
-emit_plp_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_plp_none()) }
+emit_plp_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_plp_none()) }
 inst_jmp_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.JMP, m) }
-emit_jmp_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_jmp_mem(m)) }
+emit_jmp_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_jmp_mem(m)) }
 inst_jsr_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.JSR, m) }
-emit_jsr_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_jsr_mem(m)) }
+emit_jsr_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_jsr_mem(m)) }
 inst_rti_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.RTI) }
-emit_rti_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rti_none()) }
+emit_rti_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rti_none()) }
 inst_rts_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.RTS) }
-emit_rts_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rts_none()) }
+emit_rts_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rts_none()) }
 inst_brk_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.BRK, i64(imm)) }
-emit_brk_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_brk_imm8(imm)) }
+emit_brk_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_brk_imm8(imm)) }
 inst_nop_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.NOP) }
-emit_nop_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nop_none()) }
+emit_nop_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nop_none()) }
 inst_bcc_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BCC, label) }
-emit_bcc_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bcc_rel(label)) }
+emit_bcc_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bcc_rel(label)) }
 inst_bcs_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BCS, label) }
-emit_bcs_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bcs_rel(label)) }
+emit_bcs_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bcs_rel(label)) }
 inst_beq_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BEQ, label) }
-emit_beq_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_beq_rel(label)) }
+emit_beq_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_beq_rel(label)) }
 inst_bmi_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BMI, label) }
-emit_bmi_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bmi_rel(label)) }
+emit_bmi_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bmi_rel(label)) }
 inst_bne_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BNE, label) }
-emit_bne_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bne_rel(label)) }
+emit_bne_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bne_rel(label)) }
 inst_bpl_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BPL, label) }
-emit_bpl_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bpl_rel(label)) }
+emit_bpl_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bpl_rel(label)) }
 inst_bvc_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BVC, label) }
-emit_bvc_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bvc_rel(label)) }
+emit_bvc_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bvc_rel(label)) }
 inst_bvs_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BVS, label) }
-emit_bvs_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bvs_rel(label)) }
+emit_bvs_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bvs_rel(label)) }
 inst_clc_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLC) }
-emit_clc_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_clc_none()) }
+emit_clc_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_clc_none()) }
 inst_cld_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLD) }
-emit_cld_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cld_none()) }
+emit_cld_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cld_none()) }
 inst_cli_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLI) }
-emit_cli_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cli_none()) }
+emit_cli_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cli_none()) }
 inst_clv_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.CLV) }
-emit_clv_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_clv_none()) }
+emit_clv_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_clv_none()) }
 inst_sec_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SEC) }
-emit_sec_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sec_none()) }
+emit_sec_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sec_none()) }
 inst_sed_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SED) }
-emit_sed_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sed_none()) }
+emit_sed_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sed_none()) }
 inst_sei_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SEI) }
-emit_sei_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sei_none()) }
+emit_sei_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sei_none()) }
 inst_bra_rel      :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel(.BRA, label) }
-emit_bra_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bra_rel(label)) }
+emit_bra_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bra_rel(label)) }
 inst_stz_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.STZ, m) }
-emit_stz_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_stz_mem(m)) }
+emit_stz_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_stz_mem(m)) }
 inst_trb_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.TRB, m) }
-emit_trb_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_trb_mem(m)) }
+emit_trb_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_trb_mem(m)) }
 inst_tsb_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.TSB, m) }
-emit_tsb_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_tsb_mem(m)) }
+emit_tsb_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_tsb_mem(m)) }
 inst_phx_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHX) }
-emit_phx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_phx_none()) }
+emit_phx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_phx_none()) }
 inst_phy_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHY) }
-emit_phy_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_phy_none()) }
+emit_phy_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_phy_none()) }
 inst_plx_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLX) }
-emit_plx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_plx_none()) }
+emit_plx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_plx_none()) }
 inst_ply_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLY) }
-emit_ply_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ply_none()) }
+emit_ply_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ply_none()) }
 inst_stp_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.STP) }
-emit_stp_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stp_none()) }
+emit_stp_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stp_none()) }
 inst_wai_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.WAI) }
-emit_wai_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wai_none()) }
+emit_wai_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wai_none()) }
 inst_brl_rel_long :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel_long(.BRL, label) }
-emit_brl_rel_long :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_brl_rel_long(label)) }
+emit_brl_rel_long :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_brl_rel_long(label)) }
 inst_cop_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.COP, i64(imm)) }
-emit_cop_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_cop_imm8(imm)) }
+emit_cop_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_cop_imm8(imm)) }
 inst_jml_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.JML, m) }
-emit_jml_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_jml_mem(m)) }
+emit_jml_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_jml_mem(m)) }
 inst_jsl_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.JSL, m) }
-emit_jsl_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_jsl_mem(m)) }
+emit_jsl_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_jsl_mem(m)) }
 inst_mvn_banks    :: #force_inline proc "contextless" (src_bank, dst_bank: u8) -> Instruction { return inst_block_move(.MVN, src_bank, dst_bank) }
-emit_mvn_banks    :: #force_inline proc(instructions: ^[dynamic]Instruction, src_bank, dst_bank: u8) { append(instructions, inst_mvn_banks(src_bank, dst_bank)) }
+emit_mvn_banks    :: #force_inline proc(instructions: ^[dynamic]Instruction, src_bank, dst_bank: u8) { append_elem(instructions, inst_mvn_banks(src_bank, dst_bank)) }
 inst_mvp_banks    :: #force_inline proc "contextless" (src_bank, dst_bank: u8) -> Instruction { return inst_block_move(.MVP, src_bank, dst_bank) }
-emit_mvp_banks    :: #force_inline proc(instructions: ^[dynamic]Instruction, src_bank, dst_bank: u8) { append(instructions, inst_mvp_banks(src_bank, dst_bank)) }
+emit_mvp_banks    :: #force_inline proc(instructions: ^[dynamic]Instruction, src_bank, dst_bank: u8) { append_elem(instructions, inst_mvp_banks(src_bank, dst_bank)) }
 inst_pea_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.PEA, m) }
-emit_pea_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_pea_mem(m)) }
+emit_pea_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_pea_mem(m)) }
 inst_pei_mem      :: #force_inline proc "contextless" (m: Memory) -> Instruction { return inst_m(.PEI, m) }
-emit_pei_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append(instructions, inst_pei_mem(m)) }
+emit_pei_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, m: Memory) { append_elem(instructions, inst_pei_mem(m)) }
 inst_per_rel_long :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_rel_long(.PER, label) }
-emit_per_rel_long :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_per_rel_long(label)) }
+emit_per_rel_long :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_per_rel_long(label)) }
 inst_phb_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHB) }
-emit_phb_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_phb_none()) }
+emit_phb_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_phb_none()) }
 inst_phd_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHD) }
-emit_phd_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_phd_none()) }
+emit_phd_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_phd_none()) }
 inst_phk_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PHK) }
-emit_phk_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_phk_none()) }
+emit_phk_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_phk_none()) }
 inst_plb_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLB) }
-emit_plb_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_plb_none()) }
+emit_plb_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_plb_none()) }
 inst_pld_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.PLD) }
-emit_pld_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pld_none()) }
+emit_pld_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pld_none()) }
 inst_rep_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.REP, i64(imm)) }
-emit_rep_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_rep_imm8(imm)) }
+emit_rep_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_rep_imm8(imm)) }
 inst_sep_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.SEP, i64(imm)) }
-emit_sep_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_sep_imm8(imm)) }
+emit_sep_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_sep_imm8(imm)) }
 inst_rtl_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.RTL) }
-emit_rtl_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rtl_none()) }
+emit_rtl_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rtl_none()) }
 inst_tcd_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TCD) }
-emit_tcd_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tcd_none()) }
+emit_tcd_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tcd_none()) }
 inst_tdc_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TDC) }
-emit_tdc_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tdc_none()) }
+emit_tdc_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tdc_none()) }
 inst_tcs_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TCS) }
-emit_tcs_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tcs_none()) }
+emit_tcs_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tcs_none()) }
 inst_tsc_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TSC) }
-emit_tsc_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tsc_none()) }
+emit_tsc_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tsc_none()) }
 inst_txy_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TXY) }
-emit_txy_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_txy_none()) }
+emit_txy_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_txy_none()) }
 inst_tyx_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.TYX) }
-emit_tyx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tyx_none()) }
+emit_tyx_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tyx_none()) }
 inst_wdm_imm8     :: #force_inline proc "contextless" (imm: i8) -> Instruction { return inst_i8(.WDM, i64(imm)) }
-emit_wdm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_wdm_imm8(imm)) }
+emit_wdm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_wdm_imm8(imm)) }
 inst_xba_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.XBA) }
-emit_xba_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xba_none()) }
+emit_xba_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xba_none()) }
 inst_xce_none     :: #force_inline proc "contextless" () -> Instruction { return inst_none(.XCE) }
-emit_xce_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xce_none()) }
+emit_xce_none     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xce_none()) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/mos65816/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/mos65816/tools/gen_mnemonic_builders.odin
index b2ec9b5cc..2dd706c98 100644
--- a/core/rexcode/isa/mos65816/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/mos65816/tools/gen_mnemonic_builders.odin
@@ -335,7 +335,7 @@ generate_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, mnemonic_str
 		strings.write_string(sb, ", ")
 		strings.write_string(sb, params)
 	}
-	strings.write_string(sb, ") { append(instructions, ")
+	strings.write_string(sb, ") { append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_string(sb, "(")
 	strings.write_string(sb, kind_args(entry.kind))
diff --git a/core/rexcode/isa/ppc/mnemonic_builders.odin b/core/rexcode/isa/ppc/mnemonic_builders.odin
index 13a0cc87d..00e651c14 100644
--- a/core/rexcode/isa/ppc/mnemonic_builders.odin
+++ b/core/rexcode/isa/ppc/mnemonic_builders.odin
@@ -21,6659 +21,6659 @@ package rexcode_ppc
 // =============================================================================
 
 inst_b_rel                               :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .B, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_b_rel                               :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_b_rel(label)) }
+emit_b_rel                               :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_b_rel(label)) }
 inst_bl_rel                              :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bl_rel                              :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bl_rel(label)) }
+emit_bl_rel                              :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bl_rel(label)) }
 inst_ba_rel                              :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BA, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_ba_rel                              :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_ba_rel(label)) }
+emit_ba_rel                              :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_ba_rel(label)) }
 inst_bla_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BLA, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bla_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bla_rel(label)) }
+emit_bla_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bla_rel(label)) }
 inst_bc_bo_crb_rel                       :: #force_inline proc "contextless" (bo: i64, dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BC, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_label(label), {}}} }
-emit_bc_bo_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, label: u32) { append(instructions, inst_bc_bo_crb_rel(bo, dst, label)) }
+emit_bc_bo_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, label: u32) { append_elem(instructions, inst_bc_bo_crb_rel(bo, dst, label)) }
 inst_bcl_bo_crb_rel                      :: #force_inline proc "contextless" (bo: i64, dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BCL, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_label(label), {}}} }
-emit_bcl_bo_crb_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, label: u32) { append(instructions, inst_bcl_bo_crb_rel(bo, dst, label)) }
+emit_bcl_bo_crb_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, label: u32) { append_elem(instructions, inst_bcl_bo_crb_rel(bo, dst, label)) }
 inst_bca_bo_crb_rel                      :: #force_inline proc "contextless" (bo: i64, dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BCA, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_label(label), {}}} }
-emit_bca_bo_crb_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, label: u32) { append(instructions, inst_bca_bo_crb_rel(bo, dst, label)) }
+emit_bca_bo_crb_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, label: u32) { append_elem(instructions, inst_bca_bo_crb_rel(bo, dst, label)) }
 inst_bcla_bo_crb_rel                     :: #force_inline proc "contextless" (bo: i64, dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BCLA, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_label(label), {}}} }
-emit_bcla_bo_crb_rel                     :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, label: u32) { append(instructions, inst_bcla_bo_crb_rel(bo, dst, label)) }
+emit_bcla_bo_crb_rel                     :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, label: u32) { append_elem(instructions, inst_bcla_bo_crb_rel(bo, dst, label)) }
 inst_bclr_bo_crb_bh                      :: #force_inline proc "contextless" (bo: i64, dst: Register, bh: i64) -> Instruction { return Instruction{mnemonic = .BCLR, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_imm(bh), {}}} }
-emit_bclr_bo_crb_bh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append(instructions, inst_bclr_bo_crb_bh(bo, dst, bh)) }
+emit_bclr_bo_crb_bh                      :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append_elem(instructions, inst_bclr_bo_crb_bh(bo, dst, bh)) }
 inst_bclrl_bo_crb_bh                     :: #force_inline proc "contextless" (bo: i64, dst: Register, bh: i64) -> Instruction { return Instruction{mnemonic = .BCLRL, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_imm(bh), {}}} }
-emit_bclrl_bo_crb_bh                     :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append(instructions, inst_bclrl_bo_crb_bh(bo, dst, bh)) }
+emit_bclrl_bo_crb_bh                     :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append_elem(instructions, inst_bclrl_bo_crb_bh(bo, dst, bh)) }
 inst_bcctr_bo_crb_bh                     :: #force_inline proc "contextless" (bo: i64, dst: Register, bh: i64) -> Instruction { return Instruction{mnemonic = .BCCTR, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_imm(bh), {}}} }
-emit_bcctr_bo_crb_bh                     :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append(instructions, inst_bcctr_bo_crb_bh(bo, dst, bh)) }
+emit_bcctr_bo_crb_bh                     :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append_elem(instructions, inst_bcctr_bo_crb_bh(bo, dst, bh)) }
 inst_bcctrl_bo_crb_bh                    :: #force_inline proc "contextless" (bo: i64, dst: Register, bh: i64) -> Instruction { return Instruction{mnemonic = .BCCTRL, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_imm(bh), {}}} }
-emit_bcctrl_bo_crb_bh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append(instructions, inst_bcctrl_bo_crb_bh(bo, dst, bh)) }
+emit_bcctrl_bo_crb_bh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append_elem(instructions, inst_bcctrl_bo_crb_bh(bo, dst, bh)) }
 inst_bctar_bo_crb_bh                     :: #force_inline proc "contextless" (bo: i64, dst: Register, bh: i64) -> Instruction { return Instruction{mnemonic = .BCTAR, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_imm(bh), {}}} }
-emit_bctar_bo_crb_bh                     :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append(instructions, inst_bctar_bo_crb_bh(bo, dst, bh)) }
+emit_bctar_bo_crb_bh                     :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append_elem(instructions, inst_bctar_bo_crb_bh(bo, dst, bh)) }
 inst_bctarl_bo_crb_bh                    :: #force_inline proc "contextless" (bo: i64, dst: Register, bh: i64) -> Instruction { return Instruction{mnemonic = .BCTARL, operand_count = 3, length = 4, ops = {op_imm(bo), op_reg(dst), op_imm(bh), {}}} }
-emit_bctarl_bo_crb_bh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append(instructions, inst_bctarl_bo_crb_bh(bo, dst, bh)) }
+emit_bctarl_bo_crb_bh                    :: #force_inline proc(instructions: ^[dynamic]Instruction, bo: i64, dst: Register, bh: i64) { append_elem(instructions, inst_bctarl_bo_crb_bh(bo, dst, bh)) }
 inst_sc_imm                              :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SC, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_sc_imm                              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_sc_imm(imm)) }
+emit_sc_imm                              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_sc_imm(imm)) }
 inst_crand_crb_crb_crb                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_crand_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crand_crb_crb_crb(dst, src, src2)) }
+emit_crand_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crand_crb_crb_crb(dst, src, src2)) }
 inst_crnand_crb_crb_crb                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRNAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_crnand_crb_crb_crb                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crnand_crb_crb_crb(dst, src, src2)) }
+emit_crnand_crb_crb_crb                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crnand_crb_crb_crb(dst, src, src2)) }
 inst_cror_crb_crb_crb                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CROR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cror_crb_crb_crb                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cror_crb_crb_crb(dst, src, src2)) }
+emit_cror_crb_crb_crb                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cror_crb_crb_crb(dst, src, src2)) }
 inst_crnor_crb_crb_crb                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRNOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_crnor_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crnor_crb_crb_crb(dst, src, src2)) }
+emit_crnor_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crnor_crb_crb_crb(dst, src, src2)) }
 inst_crxor_crb_crb_crb                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRXOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_crxor_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crxor_crb_crb_crb(dst, src, src2)) }
+emit_crxor_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crxor_crb_crb_crb(dst, src, src2)) }
 inst_creqv_crb_crb_crb                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CREQV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_creqv_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_creqv_crb_crb_crb(dst, src, src2)) }
+emit_creqv_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_creqv_crb_crb_crb(dst, src, src2)) }
 inst_crandc_crb_crb_crb                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRANDC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_crandc_crb_crb_crb                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crandc_crb_crb_crb(dst, src, src2)) }
+emit_crandc_crb_crb_crb                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crandc_crb_crb_crb(dst, src, src2)) }
 inst_crorc_crb_crb_crb                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CRORC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_crorc_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_crorc_crb_crb_crb(dst, src, src2)) }
+emit_crorc_crb_crb_crb                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_crorc_crb_crb_crb(dst, src, src2)) }
 inst_mcrf_crf_crf                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MCRF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mcrf_crf_crf                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mcrf_crf_crf(dst, src)) }
+emit_mcrf_crf_crf                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mcrf_crf_crf(dst, src)) }
 inst_lbz_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LBZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lbz_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lbz_r_mem(dst, addr)) }
+emit_lbz_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lbz_r_mem(dst, addr)) }
 inst_lbzu_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LBZU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lbzu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lbzu_r_mem(dst, addr)) }
+emit_lbzu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lbzu_r_mem(dst, addr)) }
 inst_lbzx_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LBZX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lbzx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lbzx_r_mem(dst, addr)) }
+emit_lbzx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lbzx_r_mem(dst, addr)) }
 inst_lbzux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LBZUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lbzux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lbzux_r_mem(dst, addr)) }
+emit_lbzux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lbzux_r_mem(dst, addr)) }
 inst_lhz_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lhz_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lhz_r_mem(dst, addr)) }
+emit_lhz_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lhz_r_mem(dst, addr)) }
 inst_lhzu_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHZU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lhzu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lhzu_r_mem(dst, addr)) }
+emit_lhzu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lhzu_r_mem(dst, addr)) }
 inst_lhzx_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHZX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lhzx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lhzx_r_mem(dst, addr)) }
+emit_lhzx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lhzx_r_mem(dst, addr)) }
 inst_lhzux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHZUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lhzux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lhzux_r_mem(dst, addr)) }
+emit_lhzux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lhzux_r_mem(dst, addr)) }
 inst_lha_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHA, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lha_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lha_r_mem(dst, addr)) }
+emit_lha_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lha_r_mem(dst, addr)) }
 inst_lhau_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHAU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lhau_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lhau_r_mem(dst, addr)) }
+emit_lhau_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lhau_r_mem(dst, addr)) }
 inst_lhax_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHAX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lhax_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lhax_r_mem(dst, addr)) }
+emit_lhax_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lhax_r_mem(dst, addr)) }
 inst_lhaux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHAUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lhaux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lhaux_r_mem(dst, addr)) }
+emit_lhaux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lhaux_r_mem(dst, addr)) }
 inst_lwz_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwz_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwz_r_mem(dst, addr)) }
+emit_lwz_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwz_r_mem(dst, addr)) }
 inst_lwzu_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWZU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwzu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwzu_r_mem(dst, addr)) }
+emit_lwzu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwzu_r_mem(dst, addr)) }
 inst_lwzx_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWZX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwzx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwzx_r_mem(dst, addr)) }
+emit_lwzx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwzx_r_mem(dst, addr)) }
 inst_lwzux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWZUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwzux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwzux_r_mem(dst, addr)) }
+emit_lwzux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwzux_r_mem(dst, addr)) }
 inst_lwa_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWA, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwa_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwa_r_mem(dst, addr)) }
+emit_lwa_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwa_r_mem(dst, addr)) }
 inst_lwax_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWAX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwax_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwax_r_mem(dst, addr)) }
+emit_lwax_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwax_r_mem(dst, addr)) }
 inst_lwaux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWAUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwaux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwaux_r_mem(dst, addr)) }
+emit_lwaux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwaux_r_mem(dst, addr)) }
 inst_ld_r_mem                            :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_ld_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_ld_r_mem(dst, addr)) }
+emit_ld_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_ld_r_mem(dst, addr)) }
 inst_ldu_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LDU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_ldu_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_ldu_r_mem(dst, addr)) }
+emit_ldu_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_ldu_r_mem(dst, addr)) }
 inst_ldx_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LDX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_ldx_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_ldx_r_mem(dst, addr)) }
+emit_ldx_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_ldx_r_mem(dst, addr)) }
 inst_ldux_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LDUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_ldux_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_ldux_r_mem(dst, addr)) }
+emit_ldux_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_ldux_r_mem(dst, addr)) }
 inst_lq_r_mem                            :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lq_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lq_r_mem(dst, addr)) }
+emit_lq_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lq_r_mem(dst, addr)) }
 inst_lhbrx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHBRX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lhbrx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lhbrx_r_mem(dst, addr)) }
+emit_lhbrx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lhbrx_r_mem(dst, addr)) }
 inst_lwbrx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWBRX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwbrx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwbrx_r_mem(dst, addr)) }
+emit_lwbrx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwbrx_r_mem(dst, addr)) }
 inst_ldbrx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LDBRX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_ldbrx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_ldbrx_r_mem(dst, addr)) }
+emit_ldbrx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_ldbrx_r_mem(dst, addr)) }
 inst_lmw_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LMW, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lmw_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lmw_r_mem(dst, addr)) }
+emit_lmw_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lmw_r_mem(dst, addr)) }
 inst_lswi_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LSWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_lswi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_lswi_r_r_imm(dst, src, imm)) }
+emit_lswi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_lswi_r_r_imm(dst, src, imm)) }
 inst_lswx_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LSWX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lswx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lswx_r_mem(dst, addr)) }
+emit_lswx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lswx_r_mem(dst, addr)) }
 inst_stb_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STB, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stb_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stb_r_mem(dst, addr)) }
+emit_stb_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stb_r_mem(dst, addr)) }
 inst_stbu_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STBU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stbu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stbu_r_mem(dst, addr)) }
+emit_stbu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stbu_r_mem(dst, addr)) }
 inst_stbx_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STBX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stbx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stbx_r_mem(dst, addr)) }
+emit_stbx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stbx_r_mem(dst, addr)) }
 inst_stbux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STBUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stbux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stbux_r_mem(dst, addr)) }
+emit_stbux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stbux_r_mem(dst, addr)) }
 inst_sth_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STH, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_sth_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_sth_r_mem(dst, addr)) }
+emit_sth_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_sth_r_mem(dst, addr)) }
 inst_sthu_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STHU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_sthu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_sthu_r_mem(dst, addr)) }
+emit_sthu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_sthu_r_mem(dst, addr)) }
 inst_sthx_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STHX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_sthx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_sthx_r_mem(dst, addr)) }
+emit_sthx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_sthx_r_mem(dst, addr)) }
 inst_sthux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STHUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_sthux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_sthux_r_mem(dst, addr)) }
+emit_sthux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_sthux_r_mem(dst, addr)) }
 inst_stw_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STW, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stw_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stw_r_mem(dst, addr)) }
+emit_stw_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stw_r_mem(dst, addr)) }
 inst_stwu_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STWU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stwu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stwu_r_mem(dst, addr)) }
+emit_stwu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stwu_r_mem(dst, addr)) }
 inst_stwx_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STWX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stwx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stwx_r_mem(dst, addr)) }
+emit_stwx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stwx_r_mem(dst, addr)) }
 inst_stwux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STWUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stwux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stwux_r_mem(dst, addr)) }
+emit_stwux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stwux_r_mem(dst, addr)) }
 inst_std_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_std_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_std_r_mem(dst, addr)) }
+emit_std_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_std_r_mem(dst, addr)) }
 inst_stdu_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STDU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stdu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stdu_r_mem(dst, addr)) }
+emit_stdu_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stdu_r_mem(dst, addr)) }
 inst_stdx_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STDX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stdx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stdx_r_mem(dst, addr)) }
+emit_stdx_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stdx_r_mem(dst, addr)) }
 inst_stdux_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STDUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stdux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stdux_r_mem(dst, addr)) }
+emit_stdux_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stdux_r_mem(dst, addr)) }
 inst_stq_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stq_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stq_r_mem(dst, addr)) }
+emit_stq_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stq_r_mem(dst, addr)) }
 inst_sthbrx_r_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STHBRX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_sthbrx_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_sthbrx_r_mem(dst, addr)) }
+emit_sthbrx_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_sthbrx_r_mem(dst, addr)) }
 inst_stwbrx_r_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STWBRX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stwbrx_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stwbrx_r_mem(dst, addr)) }
+emit_stwbrx_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stwbrx_r_mem(dst, addr)) }
 inst_stdbrx_r_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STDBRX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stdbrx_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stdbrx_r_mem(dst, addr)) }
+emit_stdbrx_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stdbrx_r_mem(dst, addr)) }
 inst_stmw_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STMW, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stmw_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stmw_r_mem(dst, addr)) }
+emit_stmw_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stmw_r_mem(dst, addr)) }
 inst_stswi_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .STSWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_stswi_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_stswi_r_r_imm(dst, src, imm)) }
+emit_stswi_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_stswi_r_r_imm(dst, src, imm)) }
 inst_stswx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STSWX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stswx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stswx_r_mem(dst, addr)) }
+emit_stswx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stswx_r_mem(dst, addr)) }
 inst_lbarx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LBARX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lbarx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lbarx_r_mem(dst, addr)) }
+emit_lbarx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lbarx_r_mem(dst, addr)) }
 inst_lharx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LHARX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lharx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lharx_r_mem(dst, addr)) }
+emit_lharx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lharx_r_mem(dst, addr)) }
 inst_lwarx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LWARX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lwarx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lwarx_r_mem(dst, addr)) }
+emit_lwarx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lwarx_r_mem(dst, addr)) }
 inst_ldarx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LDARX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_ldarx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_ldarx_r_mem(dst, addr)) }
+emit_ldarx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_ldarx_r_mem(dst, addr)) }
 inst_lqarx_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LQARX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lqarx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lqarx_r_mem(dst, addr)) }
+emit_lqarx_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lqarx_r_mem(dst, addr)) }
 inst_stbcx_dot_r_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STBCX_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stbcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stbcx_dot_r_mem(dst, addr)) }
+emit_stbcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stbcx_dot_r_mem(dst, addr)) }
 inst_sthcx_dot_r_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STHCX_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_sthcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_sthcx_dot_r_mem(dst, addr)) }
+emit_sthcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_sthcx_dot_r_mem(dst, addr)) }
 inst_stwcx_dot_r_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STWCX_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stwcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stwcx_dot_r_mem(dst, addr)) }
+emit_stwcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stwcx_dot_r_mem(dst, addr)) }
 inst_stdcx_dot_r_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STDCX_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stdcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stdcx_dot_r_mem(dst, addr)) }
+emit_stdcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stdcx_dot_r_mem(dst, addr)) }
 inst_stqcx_dot_r_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STQCX_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stqcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stqcx_dot_r_mem(dst, addr)) }
+emit_stqcx_dot_r_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stqcx_dot_r_mem(dst, addr)) }
 inst_addi_r_rz_simm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_addi_r_rz_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_addi_r_rz_simm(dst, src, imm)) }
+emit_addi_r_rz_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_addi_r_rz_simm(dst, src, imm)) }
 inst_addis_r_rz_simm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_addis_r_rz_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_addis_r_rz_simm(dst, src, imm)) }
+emit_addis_r_rz_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_addis_r_rz_simm(dst, src, imm)) }
 inst_addic_r_r_simm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDIC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_addic_r_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_addic_r_r_simm(dst, src, imm)) }
+emit_addic_r_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_addic_r_r_simm(dst, src, imm)) }
 inst_addic_dot_r_r_simm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDIC_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_addic_dot_r_r_simm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_addic_dot_r_r_simm(dst, src, imm)) }
+emit_addic_dot_r_r_simm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_addic_dot_r_r_simm(dst, src, imm)) }
 inst_subfic_r_r_simm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SUBFIC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_subfic_r_r_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_subfic_r_r_simm(dst, src, imm)) }
+emit_subfic_r_r_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_subfic_r_r_simm(dst, src, imm)) }
 inst_addpcis_r_simm                      :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDPCIS, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_addpcis_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_addpcis_r_simm(dst, imm)) }
+emit_addpcis_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_addpcis_r_simm(dst, imm)) }
 inst_add_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_add_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_r_r_r(dst, src, src2)) }
+emit_add_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_r_r_r(dst, src, src2)) }
 inst_add_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_add_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_dot_r_r_r(dst, src, src2)) }
+emit_add_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_dot_r_r_r(dst, src, src2)) }
 inst_add_o_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADD_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_add_o_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_o_r_r_r(dst, src, src2)) }
+emit_add_o_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_o_r_r_r(dst, src, src2)) }
 inst_add_o_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADD_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_add_o_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_add_o_dot_r_r_r(dst, src, src2)) }
+emit_add_o_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_add_o_dot_r_r_r(dst, src, src2)) }
 inst_addc_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addc_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addc_r_r_r(dst, src, src2)) }
+emit_addc_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addc_r_r_r(dst, src, src2)) }
 inst_addc_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDC_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addc_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addc_dot_r_r_r(dst, src, src2)) }
+emit_addc_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addc_dot_r_r_r(dst, src, src2)) }
 inst_addc_o_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDC_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addc_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addc_o_r_r_r(dst, src, src2)) }
+emit_addc_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addc_o_r_r_r(dst, src, src2)) }
 inst_addc_o_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDC_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addc_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addc_o_dot_r_r_r(dst, src, src2)) }
+emit_addc_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addc_o_dot_r_r_r(dst, src, src2)) }
 inst_adde_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adde_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adde_r_r_r(dst, src, src2)) }
+emit_adde_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adde_r_r_r(dst, src, src2)) }
 inst_adde_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adde_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adde_dot_r_r_r(dst, src, src2)) }
+emit_adde_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adde_dot_r_r_r(dst, src, src2)) }
 inst_adde_o_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDE_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adde_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adde_o_r_r_r(dst, src, src2)) }
+emit_adde_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adde_o_r_r_r(dst, src, src2)) }
 inst_adde_o_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDE_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_adde_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_adde_o_dot_r_r_r(dst, src, src2)) }
+emit_adde_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_adde_o_dot_r_r_r(dst, src, src2)) }
 inst_addme_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDME, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_addme_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addme_r_r(dst, src)) }
+emit_addme_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addme_r_r(dst, src)) }
 inst_addme_dot_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDME_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_addme_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addme_dot_r_r(dst, src)) }
+emit_addme_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addme_dot_r_r(dst, src)) }
 inst_addme_o_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDME_O, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_addme_o_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addme_o_r_r(dst, src)) }
+emit_addme_o_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addme_o_r_r(dst, src)) }
 inst_addme_o_dot_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDME_O_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_addme_o_dot_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addme_o_dot_r_r(dst, src)) }
+emit_addme_o_dot_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addme_o_dot_r_r(dst, src)) }
 inst_addze_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDZE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_addze_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addze_r_r(dst, src)) }
+emit_addze_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addze_r_r(dst, src)) }
 inst_addze_dot_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDZE_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_addze_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addze_dot_r_r(dst, src)) }
+emit_addze_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addze_dot_r_r(dst, src)) }
 inst_addze_o_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDZE_O, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_addze_o_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addze_o_r_r(dst, src)) }
+emit_addze_o_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addze_o_r_r(dst, src)) }
 inst_addze_o_dot_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ADDZE_O_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_addze_o_dot_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_addze_o_dot_r_r(dst, src)) }
+emit_addze_o_dot_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_addze_o_dot_r_r(dst, src)) }
 inst_addex_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDEX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addex_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addex_r_r_r(dst, src, src2)) }
+emit_addex_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addex_r_r_r(dst, src, src2)) }
 inst_subf_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subf_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subf_r_r_r(dst, src, src2)) }
+emit_subf_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subf_r_r_r(dst, src, src2)) }
 inst_subf_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBF_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subf_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subf_dot_r_r_r(dst, src, src2)) }
+emit_subf_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subf_dot_r_r_r(dst, src, src2)) }
 inst_subf_o_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBF_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subf_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subf_o_r_r_r(dst, src, src2)) }
+emit_subf_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subf_o_r_r_r(dst, src, src2)) }
 inst_subf_o_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBF_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subf_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subf_o_dot_r_r_r(dst, src, src2)) }
+emit_subf_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subf_o_dot_r_r_r(dst, src, src2)) }
 inst_subfc_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfc_r_r_r(dst, src, src2)) }
+emit_subfc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfc_r_r_r(dst, src, src2)) }
 inst_subfc_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFC_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfc_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfc_dot_r_r_r(dst, src, src2)) }
+emit_subfc_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfc_dot_r_r_r(dst, src, src2)) }
 inst_subfc_o_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFC_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfc_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfc_o_r_r_r(dst, src, src2)) }
+emit_subfc_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfc_o_r_r_r(dst, src, src2)) }
 inst_subfc_o_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFC_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfc_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfc_o_dot_r_r_r(dst, src, src2)) }
+emit_subfc_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfc_o_dot_r_r_r(dst, src, src2)) }
 inst_subfe_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfe_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfe_r_r_r(dst, src, src2)) }
+emit_subfe_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfe_r_r_r(dst, src, src2)) }
 inst_subfe_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfe_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfe_dot_r_r_r(dst, src, src2)) }
+emit_subfe_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfe_dot_r_r_r(dst, src, src2)) }
 inst_subfe_o_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFE_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfe_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfe_o_r_r_r(dst, src, src2)) }
+emit_subfe_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfe_o_r_r_r(dst, src, src2)) }
 inst_subfe_o_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFE_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfe_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfe_o_dot_r_r_r(dst, src, src2)) }
+emit_subfe_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfe_o_dot_r_r_r(dst, src, src2)) }
 inst_subfme_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SUBFME, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_subfme_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_subfme_r_r(dst, src)) }
+emit_subfme_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_subfme_r_r(dst, src)) }
 inst_subfme_dot_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SUBFME_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_subfme_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_subfme_dot_r_r(dst, src)) }
+emit_subfme_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_subfme_dot_r_r(dst, src)) }
 inst_subfme_o_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SUBFME_O, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_subfme_o_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_subfme_o_r_r(dst, src)) }
+emit_subfme_o_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_subfme_o_r_r(dst, src)) }
 inst_subfme_o_dot_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SUBFME_O_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_subfme_o_dot_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_subfme_o_dot_r_r(dst, src)) }
+emit_subfme_o_dot_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_subfme_o_dot_r_r(dst, src)) }
 inst_subfze_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SUBFZE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_subfze_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_subfze_r_r(dst, src)) }
+emit_subfze_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_subfze_r_r(dst, src)) }
 inst_subfze_dot_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SUBFZE_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_subfze_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_subfze_dot_r_r(dst, src)) }
+emit_subfze_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_subfze_dot_r_r(dst, src)) }
 inst_subfze_o_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SUBFZE_O, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_subfze_o_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_subfze_o_r_r(dst, src)) }
+emit_subfze_o_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_subfze_o_r_r(dst, src)) }
 inst_subfze_o_dot_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SUBFZE_O_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_subfze_o_dot_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_subfze_o_dot_r_r(dst, src)) }
+emit_subfze_o_dot_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_subfze_o_dot_r_r(dst, src)) }
 inst_neg_r_r                             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NEG, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_neg_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_r_r(dst, src)) }
+emit_neg_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_r_r(dst, src)) }
 inst_neg_dot_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NEG_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_neg_dot_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_dot_r_r(dst, src)) }
+emit_neg_dot_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_dot_r_r(dst, src)) }
 inst_neg_o_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NEG_O, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_neg_o_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_o_r_r(dst, src)) }
+emit_neg_o_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_o_r_r(dst, src)) }
 inst_neg_o_dot_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NEG_O_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_neg_o_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_neg_o_dot_r_r(dst, src)) }
+emit_neg_o_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_neg_o_dot_r_r(dst, src)) }
 inst_mulli_r_rz_simm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MULLI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_mulli_r_rz_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_mulli_r_rz_simm(dst, src, imm)) }
+emit_mulli_r_rz_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_mulli_r_rz_simm(dst, src, imm)) }
 inst_mulhw_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhw_r_r_r(dst, src, src2)) }
+emit_mulhw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhw_r_r_r(dst, src, src2)) }
 inst_mulhw_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhw_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhw_dot_r_r_r(dst, src, src2)) }
+emit_mulhw_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhw_dot_r_r_r(dst, src, src2)) }
 inst_mulhwu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhwu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhwu_r_r_r(dst, src, src2)) }
+emit_mulhwu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhwu_r_r_r(dst, src, src2)) }
 inst_mulhwu_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhwu_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhwu_dot_r_r_r(dst, src, src2)) }
+emit_mulhwu_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhwu_dot_r_r_r(dst, src, src2)) }
 inst_mullw_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullw_r_r_r(dst, src, src2)) }
+emit_mullw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullw_r_r_r(dst, src, src2)) }
 inst_mullw_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullw_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullw_dot_r_r_r(dst, src, src2)) }
+emit_mullw_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullw_dot_r_r_r(dst, src, src2)) }
 inst_mullw_o_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLW_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullw_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullw_o_r_r_r(dst, src, src2)) }
+emit_mullw_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullw_o_r_r_r(dst, src, src2)) }
 inst_mullw_o_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLW_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullw_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullw_o_dot_r_r_r(dst, src, src2)) }
+emit_mullw_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullw_o_dot_r_r_r(dst, src, src2)) }
 inst_mulld_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulld_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulld_r_r_r(dst, src, src2)) }
+emit_mulld_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulld_r_r_r(dst, src, src2)) }
 inst_mulld_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulld_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulld_dot_r_r_r(dst, src, src2)) }
+emit_mulld_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulld_dot_r_r_r(dst, src, src2)) }
 inst_mulld_o_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLD_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulld_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulld_o_r_r_r(dst, src, src2)) }
+emit_mulld_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulld_o_r_r_r(dst, src, src2)) }
 inst_mulld_o_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLD_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulld_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulld_o_dot_r_r_r(dst, src, src2)) }
+emit_mulld_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulld_o_dot_r_r_r(dst, src, src2)) }
 inst_mulhd_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhd_r_r_r(dst, src, src2)) }
+emit_mulhd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhd_r_r_r(dst, src, src2)) }
 inst_mulhd_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhd_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhd_dot_r_r_r(dst, src, src2)) }
+emit_mulhd_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhd_dot_r_r_r(dst, src, src2)) }
 inst_mulhdu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhdu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhdu_r_r_r(dst, src, src2)) }
+emit_mulhdu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhdu_r_r_r(dst, src, src2)) }
 inst_mulhdu_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHDU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhdu_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhdu_dot_r_r_r(dst, src, src2)) }
+emit_mulhdu_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhdu_dot_r_r_r(dst, src, src2)) }
 inst_maddld_r_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MADDLD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_maddld_r_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_maddld_r_r_r_r(dst, src, src2, src3)) }
+emit_maddld_r_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_maddld_r_r_r_r(dst, src, src2, src3)) }
 inst_maddhd_r_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MADDHD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_maddhd_r_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_maddhd_r_r_r_r(dst, src, src2, src3)) }
+emit_maddhd_r_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_maddhd_r_r_r_r(dst, src, src2, src3)) }
 inst_maddhdu_r_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .MADDHDU, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_maddhdu_r_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_maddhdu_r_r_r_r(dst, src, src2, src3)) }
+emit_maddhdu_r_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_maddhdu_r_r_r_r(dst, src, src2, src3)) }
 inst_divw_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divw_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divw_r_r_r(dst, src, src2)) }
+emit_divw_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divw_r_r_r(dst, src, src2)) }
 inst_divw_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divw_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divw_dot_r_r_r(dst, src, src2)) }
+emit_divw_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divw_dot_r_r_r(dst, src, src2)) }
 inst_divw_o_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVW_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divw_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divw_o_r_r_r(dst, src, src2)) }
+emit_divw_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divw_o_r_r_r(dst, src, src2)) }
 inst_divw_o_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVW_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divw_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divw_o_dot_r_r_r(dst, src, src2)) }
+emit_divw_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divw_o_dot_r_r_r(dst, src, src2)) }
 inst_divwu_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwu_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwu_r_r_r(dst, src, src2)) }
+emit_divwu_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwu_r_r_r(dst, src, src2)) }
 inst_divwu_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwu_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwu_dot_r_r_r(dst, src, src2)) }
+emit_divwu_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwu_dot_r_r_r(dst, src, src2)) }
 inst_divwu_o_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWU_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwu_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwu_o_r_r_r(dst, src, src2)) }
+emit_divwu_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwu_o_r_r_r(dst, src, src2)) }
 inst_divwu_o_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWU_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwu_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwu_o_dot_r_r_r(dst, src, src2)) }
+emit_divwu_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwu_o_dot_r_r_r(dst, src, src2)) }
 inst_divd_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divd_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divd_r_r_r(dst, src, src2)) }
+emit_divd_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divd_r_r_r(dst, src, src2)) }
 inst_divd_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divd_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divd_dot_r_r_r(dst, src, src2)) }
+emit_divd_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divd_dot_r_r_r(dst, src, src2)) }
 inst_divd_o_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVD_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divd_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divd_o_r_r_r(dst, src, src2)) }
+emit_divd_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divd_o_r_r_r(dst, src, src2)) }
 inst_divd_o_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVD_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divd_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divd_o_dot_r_r_r(dst, src, src2)) }
+emit_divd_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divd_o_dot_r_r_r(dst, src, src2)) }
 inst_divdu_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdu_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdu_r_r_r(dst, src, src2)) }
+emit_divdu_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdu_r_r_r(dst, src, src2)) }
 inst_divdu_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdu_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdu_dot_r_r_r(dst, src, src2)) }
+emit_divdu_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdu_dot_r_r_r(dst, src, src2)) }
 inst_divdu_o_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDU_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdu_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdu_o_r_r_r(dst, src, src2)) }
+emit_divdu_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdu_o_r_r_r(dst, src, src2)) }
 inst_divdu_o_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDU_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdu_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdu_o_dot_r_r_r(dst, src, src2)) }
+emit_divdu_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdu_o_dot_r_r_r(dst, src, src2)) }
 inst_divwe_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwe_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwe_r_r_r(dst, src, src2)) }
+emit_divwe_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwe_r_r_r(dst, src, src2)) }
 inst_divwe_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwe_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwe_dot_r_r_r(dst, src, src2)) }
+emit_divwe_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwe_dot_r_r_r(dst, src, src2)) }
 inst_divwe_o_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWE_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwe_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwe_o_r_r_r(dst, src, src2)) }
+emit_divwe_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwe_o_r_r_r(dst, src, src2)) }
 inst_divwe_o_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWE_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwe_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwe_o_dot_r_r_r(dst, src, src2)) }
+emit_divwe_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwe_o_dot_r_r_r(dst, src, src2)) }
 inst_divweu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWEU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divweu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divweu_r_r_r(dst, src, src2)) }
+emit_divweu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divweu_r_r_r(dst, src, src2)) }
 inst_divweu_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWEU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divweu_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divweu_dot_r_r_r(dst, src, src2)) }
+emit_divweu_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divweu_dot_r_r_r(dst, src, src2)) }
 inst_divweu_o_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWEU_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divweu_o_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divweu_o_r_r_r(dst, src, src2)) }
+emit_divweu_o_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divweu_o_r_r_r(dst, src, src2)) }
 inst_divweu_o_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWEU_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divweu_o_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divweu_o_dot_r_r_r(dst, src, src2)) }
+emit_divweu_o_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divweu_o_dot_r_r_r(dst, src, src2)) }
 inst_divde_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divde_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divde_r_r_r(dst, src, src2)) }
+emit_divde_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divde_r_r_r(dst, src, src2)) }
 inst_divde_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divde_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divde_dot_r_r_r(dst, src, src2)) }
+emit_divde_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divde_dot_r_r_r(dst, src, src2)) }
 inst_divde_o_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDE_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divde_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divde_o_r_r_r(dst, src, src2)) }
+emit_divde_o_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divde_o_r_r_r(dst, src, src2)) }
 inst_divde_o_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDE_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divde_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divde_o_dot_r_r_r(dst, src, src2)) }
+emit_divde_o_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divde_o_dot_r_r_r(dst, src, src2)) }
 inst_divdeu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDEU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdeu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdeu_r_r_r(dst, src, src2)) }
+emit_divdeu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdeu_r_r_r(dst, src, src2)) }
 inst_divdeu_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDEU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdeu_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdeu_dot_r_r_r(dst, src, src2)) }
+emit_divdeu_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdeu_dot_r_r_r(dst, src, src2)) }
 inst_divdeu_o_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDEU_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdeu_o_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdeu_o_r_r_r(dst, src, src2)) }
+emit_divdeu_o_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdeu_o_r_r_r(dst, src, src2)) }
 inst_divdeu_o_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDEU_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdeu_o_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdeu_o_dot_r_r_r(dst, src, src2)) }
+emit_divdeu_o_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdeu_o_dot_r_r_r(dst, src, src2)) }
 inst_modsw_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MODSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_modsw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_modsw_r_r_r(dst, src, src2)) }
+emit_modsw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_modsw_r_r_r(dst, src, src2)) }
 inst_moduw_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MODUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_moduw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_moduw_r_r_r(dst, src, src2)) }
+emit_moduw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_moduw_r_r_r(dst, src, src2)) }
 inst_modsd_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MODSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_modsd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_modsd_r_r_r(dst, src, src2)) }
+emit_modsd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_modsd_r_r_r(dst, src, src2)) }
 inst_modud_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MODUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_modud_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_modud_r_r_r(dst, src, src2)) }
+emit_modud_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_modud_r_r_r(dst, src, src2)) }
 inst_twi_imm_r_simm                      :: #force_inline proc "contextless" (imm: i64, dst: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .TWI, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_imm(imm2), {}}} }
-emit_twi_imm_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, imm2: i64) { append(instructions, inst_twi_imm_r_simm(imm, dst, imm2)) }
+emit_twi_imm_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, imm2: i64) { append_elem(instructions, inst_twi_imm_r_simm(imm, dst, imm2)) }
 inst_tw_imm_r_r                          :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TW, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_tw_imm_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_tw_imm_r_r(imm, dst, src)) }
+emit_tw_imm_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_tw_imm_r_r(imm, dst, src)) }
 inst_tdi_imm_r_simm                      :: #force_inline proc "contextless" (imm: i64, dst: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .TDI, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_imm(imm2), {}}} }
-emit_tdi_imm_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, imm2: i64) { append(instructions, inst_tdi_imm_r_simm(imm, dst, imm2)) }
+emit_tdi_imm_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, imm2: i64) { append_elem(instructions, inst_tdi_imm_r_simm(imm, dst, imm2)) }
 inst_td_imm_r_r                          :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TD, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_td_imm_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_td_imm_r_r(imm, dst, src)) }
+emit_td_imm_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_td_imm_r_r(imm, dst, src)) }
 inst_andi_dot_r_r_uimm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ANDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_andi_dot_r_r_uimm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_andi_dot_r_r_uimm(dst, src, imm)) }
+emit_andi_dot_r_r_uimm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_andi_dot_r_r_uimm(dst, src, imm)) }
 inst_andis_dot_r_r_uimm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ANDIS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_andis_dot_r_r_uimm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_andis_dot_r_r_uimm(dst, src, imm)) }
+emit_andis_dot_r_r_uimm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_andis_dot_r_r_uimm(dst, src, imm)) }
 inst_ori_r_r_uimm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ORI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_ori_r_r_uimm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ori_r_r_uimm(dst, src, imm)) }
+emit_ori_r_r_uimm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ori_r_r_uimm(dst, src, imm)) }
 inst_oris_r_r_uimm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ORIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_oris_r_r_uimm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_oris_r_r_uimm(dst, src, imm)) }
+emit_oris_r_r_uimm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_oris_r_r_uimm(dst, src, imm)) }
 inst_xori_r_r_uimm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XORI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xori_r_r_uimm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xori_r_r_uimm(dst, src, imm)) }
+emit_xori_r_r_uimm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xori_r_r_uimm(dst, src, imm)) }
 inst_xoris_r_r_uimm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XORIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xoris_r_r_uimm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xoris_r_r_uimm(dst, src, imm)) }
+emit_xoris_r_r_uimm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xoris_r_r_uimm(dst, src, imm)) }
 inst_and_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_and_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_and_r_r_r(dst, src, src2)) }
+emit_and_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_and_r_r_r(dst, src, src2)) }
 inst_and_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AND_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_and_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_and_dot_r_r_r(dst, src, src2)) }
+emit_and_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_and_dot_r_r_r(dst, src, src2)) }
 inst_or_r_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .OR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_or_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_or_r_r_r(dst, src, src2)) }
+emit_or_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_or_r_r_r(dst, src, src2)) }
 inst_or_dot_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .OR_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_or_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_or_dot_r_r_r(dst, src, src2)) }
+emit_or_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_or_dot_r_r_r(dst, src, src2)) }
 inst_xor_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xor_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xor_r_r_r(dst, src, src2)) }
+emit_xor_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xor_r_r_r(dst, src, src2)) }
 inst_xor_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XOR_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xor_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xor_dot_r_r_r(dst, src, src2)) }
+emit_xor_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xor_dot_r_r_r(dst, src, src2)) }
 inst_nand_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nand_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nand_r_r_r(dst, src, src2)) }
+emit_nand_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nand_r_r_r(dst, src, src2)) }
 inst_nand_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NAND_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nand_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nand_dot_r_r_r(dst, src, src2)) }
+emit_nand_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nand_dot_r_r_r(dst, src, src2)) }
 inst_nor_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nor_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nor_r_r_r(dst, src, src2)) }
+emit_nor_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nor_r_r_r(dst, src, src2)) }
 inst_nor_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NOR_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nor_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nor_dot_r_r_r(dst, src, src2)) }
+emit_nor_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nor_dot_r_r_r(dst, src, src2)) }
 inst_eqv_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EQV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eqv_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eqv_r_r_r(dst, src, src2)) }
+emit_eqv_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eqv_r_r_r(dst, src, src2)) }
 inst_eqv_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EQV_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eqv_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eqv_dot_r_r_r(dst, src, src2)) }
+emit_eqv_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eqv_dot_r_r_r(dst, src, src2)) }
 inst_andc_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ANDC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_andc_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_andc_r_r_r(dst, src, src2)) }
+emit_andc_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_andc_r_r_r(dst, src, src2)) }
 inst_andc_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ANDC_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_andc_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_andc_dot_r_r_r(dst, src, src2)) }
+emit_andc_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_andc_dot_r_r_r(dst, src, src2)) }
 inst_orc_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ORC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_orc_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_orc_r_r_r(dst, src, src2)) }
+emit_orc_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_orc_r_r_r(dst, src, src2)) }
 inst_orc_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ORC_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_orc_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_orc_dot_r_r_r(dst, src, src2)) }
+emit_orc_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_orc_dot_r_r_r(dst, src, src2)) }
 inst_extsb_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EXTSB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_extsb_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_extsb_r_r(dst, src)) }
+emit_extsb_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_extsb_r_r(dst, src)) }
 inst_extsb_dot_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EXTSB_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_extsb_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_extsb_dot_r_r(dst, src)) }
+emit_extsb_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_extsb_dot_r_r(dst, src)) }
 inst_extsh_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EXTSH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_extsh_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_extsh_r_r(dst, src)) }
+emit_extsh_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_extsh_r_r(dst, src)) }
 inst_extsh_dot_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EXTSH_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_extsh_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_extsh_dot_r_r(dst, src)) }
+emit_extsh_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_extsh_dot_r_r(dst, src)) }
 inst_extsw_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EXTSW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_extsw_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_extsw_r_r(dst, src)) }
+emit_extsw_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_extsw_r_r(dst, src)) }
 inst_extsw_dot_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EXTSW_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_extsw_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_extsw_dot_r_r(dst, src)) }
+emit_extsw_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_extsw_dot_r_r(dst, src)) }
 inst_cntlzw_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNTLZW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cntlzw_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cntlzw_r_r(dst, src)) }
+emit_cntlzw_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cntlzw_r_r(dst, src)) }
 inst_cntlzw_dot_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNTLZW_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cntlzw_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cntlzw_dot_r_r(dst, src)) }
+emit_cntlzw_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cntlzw_dot_r_r(dst, src)) }
 inst_cntlzd_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNTLZD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cntlzd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cntlzd_r_r(dst, src)) }
+emit_cntlzd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cntlzd_r_r(dst, src)) }
 inst_cntlzd_dot_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNTLZD_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cntlzd_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cntlzd_dot_r_r(dst, src)) }
+emit_cntlzd_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cntlzd_dot_r_r(dst, src)) }
 inst_cnttzw_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNTTZW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cnttzw_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cnttzw_r_r(dst, src)) }
+emit_cnttzw_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cnttzw_r_r(dst, src)) }
 inst_cnttzw_dot_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNTTZW_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cnttzw_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cnttzw_dot_r_r(dst, src)) }
+emit_cnttzw_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cnttzw_dot_r_r(dst, src)) }
 inst_cnttzd_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNTTZD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cnttzd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cnttzd_r_r(dst, src)) }
+emit_cnttzd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cnttzd_r_r(dst, src)) }
 inst_cnttzd_dot_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CNTTZD_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cnttzd_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cnttzd_dot_r_r(dst, src)) }
+emit_cnttzd_dot_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cnttzd_dot_r_r(dst, src)) }
 inst_popcntb_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .POPCNTB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_popcntb_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_popcntb_r_r(dst, src)) }
+emit_popcntb_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_popcntb_r_r(dst, src)) }
 inst_popcntw_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .POPCNTW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_popcntw_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_popcntw_r_r(dst, src)) }
+emit_popcntw_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_popcntw_r_r(dst, src)) }
 inst_popcntd_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .POPCNTD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_popcntd_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_popcntd_r_r(dst, src)) }
+emit_popcntd_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_popcntd_r_r(dst, src)) }
 inst_prtyw_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PRTYW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_prtyw_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_prtyw_r_r(dst, src)) }
+emit_prtyw_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_prtyw_r_r(dst, src)) }
 inst_prtyd_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PRTYD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_prtyd_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_prtyd_r_r(dst, src)) }
+emit_prtyd_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_prtyd_r_r(dst, src)) }
 inst_bpermd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BPERMD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bpermd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bpermd_r_r_r(dst, src, src2)) }
+emit_bpermd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bpermd_r_r_r(dst, src, src2)) }
 inst_cmpb_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMPB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cmpb_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmpb_r_r_r(dst, src, src2)) }
+emit_cmpb_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmpb_r_r_r(dst, src, src2)) }
 inst_slw_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_slw_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_slw_r_r_r(dst, src, src2)) }
+emit_slw_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_slw_r_r_r(dst, src, src2)) }
 inst_slw_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_slw_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_slw_dot_r_r_r(dst, src, src2)) }
+emit_slw_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_slw_dot_r_r_r(dst, src, src2)) }
 inst_srw_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srw_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srw_r_r_r(dst, src, src2)) }
+emit_srw_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srw_r_r_r(dst, src, src2)) }
 inst_srw_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srw_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srw_dot_r_r_r(dst, src, src2)) }
+emit_srw_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srw_dot_r_r_r(dst, src, src2)) }
 inst_sraw_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sraw_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sraw_r_r_r(dst, src, src2)) }
+emit_sraw_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sraw_r_r_r(dst, src, src2)) }
 inst_sraw_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sraw_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sraw_dot_r_r_r(dst, src, src2)) }
+emit_sraw_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sraw_dot_r_r_r(dst, src, src2)) }
 inst_srawi_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRAWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_srawi_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srawi_r_r_imm(dst, src, imm)) }
+emit_srawi_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srawi_r_r_imm(dst, src, imm)) }
 inst_srawi_dot_r_r_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRAWI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_srawi_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srawi_dot_r_r_imm(dst, src, imm)) }
+emit_srawi_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srawi_dot_r_r_imm(dst, src, imm)) }
 inst_sld_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sld_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sld_r_r_r(dst, src, src2)) }
+emit_sld_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sld_r_r_r(dst, src, src2)) }
 inst_sld_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sld_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sld_dot_r_r_r(dst, src, src2)) }
+emit_sld_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sld_dot_r_r_r(dst, src, src2)) }
 inst_srd_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srd_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srd_r_r_r(dst, src, src2)) }
+emit_srd_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srd_r_r_r(dst, src, src2)) }
 inst_srd_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srd_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srd_dot_r_r_r(dst, src, src2)) }
+emit_srd_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srd_dot_r_r_r(dst, src, src2)) }
 inst_srad_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srad_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srad_r_r_r(dst, src, src2)) }
+emit_srad_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srad_r_r_r(dst, src, src2)) }
 inst_srad_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srad_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srad_dot_r_r_r(dst, src, src2)) }
+emit_srad_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srad_dot_r_r_r(dst, src, src2)) }
 inst_sradi_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRADI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_sradi_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sradi_r_r_imm(dst, src, imm)) }
+emit_sradi_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sradi_r_r_imm(dst, src, imm)) }
 inst_sradi_dot_r_r_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRADI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_sradi_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sradi_dot_r_r_imm(dst, src, imm)) }
+emit_sradi_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sradi_dot_r_r_imm(dst, src, imm)) }
 inst_rlwinm_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLWINM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rlwinm_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rlwinm_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rlwinm_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rlwinm_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rlwinm_dot_r_r_imm_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLWINM_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rlwinm_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rlwinm_dot_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rlwinm_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rlwinm_dot_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rlwnm_r_r_r_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RLWNM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_rlwnm_r_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_rlwnm_r_r_r_imm(dst, src, src2, imm)) }
+emit_rlwnm_r_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_rlwnm_r_r_r_imm(dst, src, src2, imm)) }
 inst_rlwnm_dot_r_r_r_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RLWNM_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_rlwnm_dot_r_r_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_rlwnm_dot_r_r_r_imm(dst, src, src2, imm)) }
+emit_rlwnm_dot_r_r_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_rlwnm_dot_r_r_r_imm(dst, src, src2, imm)) }
 inst_rlwimi_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLWIMI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rlwimi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rlwimi_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rlwimi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rlwimi_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rlwimi_dot_r_r_imm_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLWIMI_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rlwimi_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rlwimi_dot_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rlwimi_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rlwimi_dot_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldicl_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLDICL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rldicl_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rldicl_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rldicl_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rldicl_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldicl_dot_r_r_imm_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLDICL_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rldicl_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rldicl_dot_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rldicl_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rldicl_dot_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldicr_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLDICR, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rldicr_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rldicr_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rldicr_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rldicr_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldicr_dot_r_r_imm_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLDICR_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rldicr_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rldicr_dot_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rldicr_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rldicr_dot_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldic_r_r_imm_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLDIC, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rldic_r_r_imm_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rldic_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rldic_r_r_imm_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rldic_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldic_dot_r_r_imm_imm               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLDIC_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rldic_dot_r_r_imm_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rldic_dot_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rldic_dot_r_r_imm_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rldic_dot_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldimi_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLDIMI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rldimi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rldimi_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rldimi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rldimi_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldimi_dot_r_r_imm_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .RLDIMI_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_rldimi_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_rldimi_dot_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_rldimi_dot_r_r_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_rldimi_dot_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rldcl_r_r_r_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RLDCL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_rldcl_r_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_rldcl_r_r_r_imm(dst, src, src2, imm)) }
+emit_rldcl_r_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_rldcl_r_r_r_imm(dst, src, src2, imm)) }
 inst_rldcl_dot_r_r_r_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RLDCL_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_rldcl_dot_r_r_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_rldcl_dot_r_r_r_imm(dst, src, src2, imm)) }
+emit_rldcl_dot_r_r_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_rldcl_dot_r_r_r_imm(dst, src, src2, imm)) }
 inst_rldcr_r_r_r_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RLDCR, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_rldcr_r_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_rldcr_r_r_r_imm(dst, src, src2, imm)) }
+emit_rldcr_r_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_rldcr_r_r_r_imm(dst, src, src2, imm)) }
 inst_rldcr_dot_r_r_r_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RLDCR_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_rldcr_dot_r_r_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_rldcr_dot_r_r_r_imm(dst, src, src2, imm)) }
+emit_rldcr_dot_r_r_r_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_rldcr_dot_r_r_r_imm(dst, src, src2, imm)) }
 inst_cmpi_crf_imm_r_simm                 :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CMPI, operand_count = 4, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_imm(imm2)}} }
-emit_cmpi_crf_imm_r_simm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append(instructions, inst_cmpi_crf_imm_r_simm(dst, imm, src, imm2)) }
+emit_cmpi_crf_imm_r_simm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_cmpi_crf_imm_r_simm(dst, imm, src, imm2)) }
 inst_cmpli_crf_imm_r_uimm                :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .CMPLI, operand_count = 4, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_imm(imm2)}} }
-emit_cmpli_crf_imm_r_uimm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append(instructions, inst_cmpli_crf_imm_r_uimm(dst, imm, src, imm2)) }
+emit_cmpli_crf_imm_r_uimm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) { append_elem(instructions, inst_cmpli_crf_imm_r_uimm(dst, imm, src, imm2)) }
 inst_cmp_crf_imm_r_r                     :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMP, operand_count = 4, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2)}} }
-emit_cmp_crf_imm_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register) { append(instructions, inst_cmp_crf_imm_r_r(dst, imm, src, src2)) }
+emit_cmp_crf_imm_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register) { append_elem(instructions, inst_cmp_crf_imm_r_r(dst, imm, src, src2)) }
 inst_cmpl_crf_imm_r_r                    :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMPL, operand_count = 4, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2)}} }
-emit_cmpl_crf_imm_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register) { append(instructions, inst_cmpl_crf_imm_r_r(dst, imm, src, src2)) }
+emit_cmpl_crf_imm_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register) { append_elem(instructions, inst_cmpl_crf_imm_r_r(dst, imm, src, src2)) }
 inst_cmprb_crf_imm_r_r                   :: #force_inline proc "contextless" (dst: Register, imm: i64, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMPRB, operand_count = 4, length = 4, ops = {op_reg(dst), op_imm(imm), op_reg(src), op_reg(src2)}} }
-emit_cmprb_crf_imm_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register) { append(instructions, inst_cmprb_crf_imm_r_r(dst, imm, src, src2)) }
+emit_cmprb_crf_imm_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, src2: Register) { append_elem(instructions, inst_cmprb_crf_imm_r_r(dst, imm, src, src2)) }
 inst_cmpeqb_crf_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMPEQB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cmpeqb_crf_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmpeqb_crf_r_r(dst, src, src2)) }
+emit_cmpeqb_crf_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmpeqb_crf_r_r(dst, src, src2)) }
 inst_fadd_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fadd_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadd_fr_fr_fr(dst, src, src2)) }
+emit_fadd_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadd_fr_fr_fr(dst, src, src2)) }
 inst_fadd_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fadd_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadd_dot_fr_fr_fr(dst, src, src2)) }
+emit_fadd_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadd_dot_fr_fr_fr(dst, src, src2)) }
 inst_fadds_fr_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fadds_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadds_fr_fr_fr(dst, src, src2)) }
+emit_fadds_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadds_fr_fr_fr(dst, src, src2)) }
 inst_fadds_dot_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FADDS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fadds_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fadds_dot_fr_fr_fr(dst, src, src2)) }
+emit_fadds_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fadds_dot_fr_fr_fr(dst, src, src2)) }
 inst_fsub_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fsub_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsub_fr_fr_fr(dst, src, src2)) }
+emit_fsub_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsub_fr_fr_fr(dst, src, src2)) }
 inst_fsub_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FSUB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fsub_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsub_dot_fr_fr_fr(dst, src, src2)) }
+emit_fsub_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsub_dot_fr_fr_fr(dst, src, src2)) }
 inst_fsubs_fr_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FSUBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fsubs_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsubs_fr_fr_fr(dst, src, src2)) }
+emit_fsubs_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsubs_fr_fr_fr(dst, src, src2)) }
 inst_fsubs_dot_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FSUBS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fsubs_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fsubs_dot_fr_fr_fr(dst, src, src2)) }
+emit_fsubs_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fsubs_dot_fr_fr_fr(dst, src, src2)) }
 inst_fmul_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMUL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmul_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmul_fr_fr_fr(dst, src, src2)) }
+emit_fmul_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmul_fr_fr_fr(dst, src, src2)) }
 inst_fmul_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMUL_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmul_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmul_dot_fr_fr_fr(dst, src, src2)) }
+emit_fmul_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmul_dot_fr_fr_fr(dst, src, src2)) }
 inst_fmuls_fr_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMULS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmuls_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmuls_fr_fr_fr(dst, src, src2)) }
+emit_fmuls_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmuls_fr_fr_fr(dst, src, src2)) }
 inst_fmuls_dot_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMULS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmuls_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmuls_dot_fr_fr_fr(dst, src, src2)) }
+emit_fmuls_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmuls_dot_fr_fr_fr(dst, src, src2)) }
 inst_fdiv_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FDIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fdiv_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdiv_fr_fr_fr(dst, src, src2)) }
+emit_fdiv_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdiv_fr_fr_fr(dst, src, src2)) }
 inst_fdiv_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FDIV_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fdiv_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdiv_dot_fr_fr_fr(dst, src, src2)) }
+emit_fdiv_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdiv_dot_fr_fr_fr(dst, src, src2)) }
 inst_fdivs_fr_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FDIVS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fdivs_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdivs_fr_fr_fr(dst, src, src2)) }
+emit_fdivs_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdivs_fr_fr_fr(dst, src, src2)) }
 inst_fdivs_dot_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FDIVS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fdivs_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fdivs_dot_fr_fr_fr(dst, src, src2)) }
+emit_fdivs_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fdivs_dot_fr_fr_fr(dst, src, src2)) }
 inst_fsqrt_fr_fr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FSQRT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fsqrt_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_fr_fr(dst, src)) }
+emit_fsqrt_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_fr_fr(dst, src)) }
 inst_fsqrt_dot_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FSQRT_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fsqrt_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrt_dot_fr_fr(dst, src)) }
+emit_fsqrt_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrt_dot_fr_fr(dst, src)) }
 inst_fsqrts_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FSQRTS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fsqrts_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrts_fr_fr(dst, src)) }
+emit_fsqrts_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrts_fr_fr(dst, src)) }
 inst_fsqrts_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FSQRTS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fsqrts_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fsqrts_dot_fr_fr(dst, src)) }
+emit_fsqrts_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fsqrts_dot_fr_fr(dst, src)) }
 inst_fre_fr_fr                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fre_fr_fr                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fre_fr_fr(dst, src)) }
+emit_fre_fr_fr                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fre_fr_fr(dst, src)) }
 inst_fre_dot_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRE_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fre_dot_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fre_dot_fr_fr(dst, src)) }
+emit_fre_dot_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fre_dot_fr_fr(dst, src)) }
 inst_fres_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRES, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fres_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fres_fr_fr(dst, src)) }
+emit_fres_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fres_fr_fr(dst, src)) }
 inst_fres_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRES_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fres_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fres_dot_fr_fr(dst, src)) }
+emit_fres_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fres_dot_fr_fr(dst, src)) }
 inst_frsqrte_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frsqrte_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrte_fr_fr(dst, src)) }
+emit_frsqrte_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrte_fr_fr(dst, src)) }
 inst_frsqrte_dot_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTE_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frsqrte_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrte_dot_fr_fr(dst, src)) }
+emit_frsqrte_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrte_dot_fr_fr(dst, src)) }
 inst_frsqrtes_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTES, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frsqrtes_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrtes_fr_fr(dst, src)) }
+emit_frsqrtes_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrtes_fr_fr(dst, src)) }
 inst_frsqrtes_dot_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSQRTES_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frsqrtes_dot_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsqrtes_dot_fr_fr(dst, src)) }
+emit_frsqrtes_dot_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsqrtes_dot_fr_fr(dst, src)) }
 inst_fmadd_fr_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FMADD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fmadd_fr_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmadd_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fmadd_fr_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmadd_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fmadd_dot_fr_fr_fr_fr               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FMADD_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fmadd_dot_fr_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmadd_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fmadd_dot_fr_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmadd_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fmadds_fr_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FMADDS, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fmadds_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmadds_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fmadds_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmadds_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fmadds_dot_fr_fr_fr_fr              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FMADDS_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fmadds_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmadds_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fmadds_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmadds_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fmsub_fr_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FMSUB, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fmsub_fr_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmsub_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fmsub_fr_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmsub_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fmsub_dot_fr_fr_fr_fr               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FMSUB_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fmsub_dot_fr_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmsub_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fmsub_dot_fr_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmsub_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fmsubs_fr_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FMSUBS, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fmsubs_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmsubs_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fmsubs_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmsubs_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fmsubs_dot_fr_fr_fr_fr              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FMSUBS_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fmsubs_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fmsubs_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fmsubs_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fmsubs_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fnmadd_fr_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FNMADD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fnmadd_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmadd_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fnmadd_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmadd_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fnmadd_dot_fr_fr_fr_fr              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FNMADD_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fnmadd_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmadd_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fnmadd_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmadd_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fnmadds_fr_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FNMADDS, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fnmadds_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmadds_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fnmadds_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmadds_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fnmadds_dot_fr_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FNMADDS_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fnmadds_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmadds_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fnmadds_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmadds_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fnmsub_fr_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FNMSUB, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fnmsub_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmsub_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fnmsub_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmsub_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fnmsub_dot_fr_fr_fr_fr              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FNMSUB_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fnmsub_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmsub_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fnmsub_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmsub_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fnmsubs_fr_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FNMSUBS, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fnmsubs_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmsubs_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fnmsubs_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmsubs_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fnmsubs_dot_fr_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FNMSUBS_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fnmsubs_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fnmsubs_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fnmsubs_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fnmsubs_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fsel_fr_fr_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FSEL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fsel_fr_fr_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fsel_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fsel_fr_fr_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fsel_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fsel_dot_fr_fr_fr_fr                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .FSEL_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_fsel_dot_fr_fr_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_fsel_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_fsel_dot_fr_fr_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_fsel_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_fcpsgn_fr_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCPSGN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fcpsgn_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcpsgn_fr_fr_fr(dst, src, src2)) }
+emit_fcpsgn_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcpsgn_fr_fr_fr(dst, src, src2)) }
 inst_fcpsgn_dot_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCPSGN_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fcpsgn_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcpsgn_dot_fr_fr_fr(dst, src, src2)) }
+emit_fcpsgn_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcpsgn_dot_fr_fr_fr(dst, src, src2)) }
 inst_fneg_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FNEG, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fneg_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fneg_fr_fr(dst, src)) }
+emit_fneg_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fneg_fr_fr(dst, src)) }
 inst_fneg_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FNEG_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fneg_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fneg_dot_fr_fr(dst, src)) }
+emit_fneg_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fneg_dot_fr_fr(dst, src)) }
 inst_fabs_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fabs_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fabs_fr_fr(dst, src)) }
+emit_fabs_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fabs_fr_fr(dst, src)) }
 inst_fabs_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FABS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fabs_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fabs_dot_fr_fr(dst, src)) }
+emit_fabs_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fabs_dot_fr_fr(dst, src)) }
 inst_fnabs_fr_fr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FNABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fnabs_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fnabs_fr_fr(dst, src)) }
+emit_fnabs_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fnabs_fr_fr(dst, src)) }
 inst_fnabs_dot_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FNABS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fnabs_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fnabs_dot_fr_fr(dst, src)) }
+emit_fnabs_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fnabs_dot_fr_fr(dst, src)) }
 inst_fmr_fr_fr                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fmr_fr_fr                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmr_fr_fr(dst, src)) }
+emit_fmr_fr_fr                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmr_fr_fr(dst, src)) }
 inst_fmr_dot_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FMR_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fmr_dot_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fmr_dot_fr_fr(dst, src)) }
+emit_fmr_dot_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fmr_dot_fr_fr(dst, src)) }
 inst_frsp_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frsp_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsp_fr_fr(dst, src)) }
+emit_frsp_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsp_fr_fr(dst, src)) }
 inst_frsp_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRSP_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frsp_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frsp_dot_fr_fr(dst, src)) }
+emit_frsp_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frsp_dot_fr_fr(dst, src)) }
 inst_fctid_fr_fr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTID, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctid_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctid_fr_fr(dst, src)) }
+emit_fctid_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctid_fr_fr(dst, src)) }
 inst_fctid_dot_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTID_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctid_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctid_dot_fr_fr(dst, src)) }
+emit_fctid_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctid_dot_fr_fr(dst, src)) }
 inst_fctidu_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIDU, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctidu_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctidu_fr_fr(dst, src)) }
+emit_fctidu_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctidu_fr_fr(dst, src)) }
 inst_fctidu_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIDU_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctidu_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctidu_dot_fr_fr(dst, src)) }
+emit_fctidu_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctidu_dot_fr_fr(dst, src)) }
 inst_fctidz_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIDZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctidz_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctidz_fr_fr(dst, src)) }
+emit_fctidz_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctidz_fr_fr(dst, src)) }
 inst_fctidz_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIDZ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctidz_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctidz_dot_fr_fr(dst, src)) }
+emit_fctidz_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctidz_dot_fr_fr(dst, src)) }
 inst_fctiduz_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIDUZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiduz_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiduz_fr_fr(dst, src)) }
+emit_fctiduz_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiduz_fr_fr(dst, src)) }
 inst_fctiduz_dot_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIDUZ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiduz_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiduz_dot_fr_fr(dst, src)) }
+emit_fctiduz_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiduz_dot_fr_fr(dst, src)) }
 inst_fctiw_fr_fr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiw_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiw_fr_fr(dst, src)) }
+emit_fctiw_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiw_fr_fr(dst, src)) }
 inst_fctiw_dot_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIW_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiw_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiw_dot_fr_fr(dst, src)) }
+emit_fctiw_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiw_dot_fr_fr(dst, src)) }
 inst_fctiwu_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIWU, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiwu_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiwu_fr_fr(dst, src)) }
+emit_fctiwu_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiwu_fr_fr(dst, src)) }
 inst_fctiwu_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIWU_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiwu_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiwu_dot_fr_fr(dst, src)) }
+emit_fctiwu_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiwu_dot_fr_fr(dst, src)) }
 inst_fctiwz_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIWZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiwz_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiwz_fr_fr(dst, src)) }
+emit_fctiwz_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiwz_fr_fr(dst, src)) }
 inst_fctiwz_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIWZ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiwz_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiwz_dot_fr_fr(dst, src)) }
+emit_fctiwz_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiwz_dot_fr_fr(dst, src)) }
 inst_fctiwuz_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIWUZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiwuz_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiwuz_fr_fr(dst, src)) }
+emit_fctiwuz_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiwuz_fr_fr(dst, src)) }
 inst_fctiwuz_dot_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCTIWUZ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fctiwuz_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fctiwuz_dot_fr_fr(dst, src)) }
+emit_fctiwuz_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fctiwuz_dot_fr_fr(dst, src)) }
 inst_fcfid_fr_fr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCFID, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fcfid_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcfid_fr_fr(dst, src)) }
+emit_fcfid_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcfid_fr_fr(dst, src)) }
 inst_fcfid_dot_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCFID_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fcfid_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcfid_dot_fr_fr(dst, src)) }
+emit_fcfid_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcfid_dot_fr_fr(dst, src)) }
 inst_fcfidu_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCFIDU, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fcfidu_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcfidu_fr_fr(dst, src)) }
+emit_fcfidu_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcfidu_fr_fr(dst, src)) }
 inst_fcfidu_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCFIDU_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fcfidu_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcfidu_dot_fr_fr(dst, src)) }
+emit_fcfidu_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcfidu_dot_fr_fr(dst, src)) }
 inst_fcfids_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCFIDS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fcfids_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcfids_fr_fr(dst, src)) }
+emit_fcfids_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcfids_fr_fr(dst, src)) }
 inst_fcfids_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCFIDS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fcfids_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcfids_dot_fr_fr(dst, src)) }
+emit_fcfids_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcfids_dot_fr_fr(dst, src)) }
 inst_fcfidus_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCFIDUS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fcfidus_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcfidus_fr_fr(dst, src)) }
+emit_fcfidus_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcfidus_fr_fr(dst, src)) }
 inst_fcfidus_dot_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FCFIDUS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_fcfidus_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_fcfidus_dot_fr_fr(dst, src)) }
+emit_fcfidus_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_fcfidus_dot_fr_fr(dst, src)) }
 inst_frin_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRIN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frin_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frin_fr_fr(dst, src)) }
+emit_frin_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frin_fr_fr(dst, src)) }
 inst_frin_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRIN_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frin_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frin_dot_fr_fr(dst, src)) }
+emit_frin_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frin_dot_fr_fr(dst, src)) }
 inst_friz_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_friz_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_friz_fr_fr(dst, src)) }
+emit_friz_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_friz_fr_fr(dst, src)) }
 inst_friz_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRIZ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_friz_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_friz_dot_fr_fr(dst, src)) }
+emit_friz_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_friz_dot_fr_fr(dst, src)) }
 inst_frip_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRIP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frip_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frip_fr_fr(dst, src)) }
+emit_frip_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frip_fr_fr(dst, src)) }
 inst_frip_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRIP_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frip_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frip_dot_fr_fr(dst, src)) }
+emit_frip_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frip_dot_fr_fr(dst, src)) }
 inst_frim_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRIM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frim_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frim_fr_fr(dst, src)) }
+emit_frim_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frim_fr_fr(dst, src)) }
 inst_frim_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FRIM_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_frim_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_frim_dot_fr_fr(dst, src)) }
+emit_frim_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_frim_dot_fr_fr(dst, src)) }
 inst_fcmpu_crf_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMPU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fcmpu_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmpu_crf_fr_fr(dst, src, src2)) }
+emit_fcmpu_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmpu_crf_fr_fr(dst, src, src2)) }
 inst_fcmpo_crf_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FCMPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fcmpo_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fcmpo_crf_fr_fr(dst, src, src2)) }
+emit_fcmpo_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fcmpo_crf_fr_fr(dst, src, src2)) }
 inst_ftdiv_crf_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FTDIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ftdiv_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ftdiv_crf_fr_fr(dst, src, src2)) }
+emit_ftdiv_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ftdiv_crf_fr_fr(dst, src, src2)) }
 inst_ftsqrt_crf_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .FTSQRT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ftsqrt_crf_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ftsqrt_crf_fr(dst, src)) }
+emit_ftsqrt_crf_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ftsqrt_crf_fr(dst, src)) }
 inst_fmrgew_fr_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMRGEW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmrgew_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmrgew_fr_fr_fr(dst, src, src2)) }
+emit_fmrgew_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmrgew_fr_fr_fr(dst, src, src2)) }
 inst_fmrgow_fr_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .FMRGOW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_fmrgow_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_fmrgow_fr_fr_fr(dst, src, src2)) }
+emit_fmrgow_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_fmrgow_fr_fr_fr(dst, src, src2)) }
 inst_lfs_fr_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFS, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfs_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfs_fr_mem(dst, addr)) }
+emit_lfs_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfs_fr_mem(dst, addr)) }
 inst_lfsu_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFSU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfsu_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfsu_fr_mem(dst, addr)) }
+emit_lfsu_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfsu_fr_mem(dst, addr)) }
 inst_lfsx_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFSX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfsx_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfsx_fr_mem(dst, addr)) }
+emit_lfsx_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfsx_fr_mem(dst, addr)) }
 inst_lfsux_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFSUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfsux_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfsux_fr_mem(dst, addr)) }
+emit_lfsux_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfsux_fr_mem(dst, addr)) }
 inst_lfd_fr_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfd_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfd_fr_mem(dst, addr)) }
+emit_lfd_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfd_fr_mem(dst, addr)) }
 inst_lfdu_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFDU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfdu_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfdu_fr_mem(dst, addr)) }
+emit_lfdu_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfdu_fr_mem(dst, addr)) }
 inst_lfdx_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFDX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfdx_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfdx_fr_mem(dst, addr)) }
+emit_lfdx_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfdx_fr_mem(dst, addr)) }
 inst_lfdux_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFDUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfdux_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfdux_fr_mem(dst, addr)) }
+emit_lfdux_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfdux_fr_mem(dst, addr)) }
 inst_lfiwax_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFIWAX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfiwax_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfiwax_fr_mem(dst, addr)) }
+emit_lfiwax_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfiwax_fr_mem(dst, addr)) }
 inst_lfiwzx_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFIWZX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfiwzx_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfiwzx_fr_mem(dst, addr)) }
+emit_lfiwzx_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfiwzx_fr_mem(dst, addr)) }
 inst_lfdp_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfdp_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfdp_fr_mem(dst, addr)) }
+emit_lfdp_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfdp_fr_mem(dst, addr)) }
 inst_lfdpx_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFDPX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfdpx_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfdpx_fr_mem(dst, addr)) }
+emit_lfdpx_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfdpx_fr_mem(dst, addr)) }
 inst_stfs_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFS, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfs_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfs_fr_mem(dst, addr)) }
+emit_stfs_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfs_fr_mem(dst, addr)) }
 inst_stfsu_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFSU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfsu_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfsu_fr_mem(dst, addr)) }
+emit_stfsu_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfsu_fr_mem(dst, addr)) }
 inst_stfsx_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFSX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfsx_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfsx_fr_mem(dst, addr)) }
+emit_stfsx_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfsx_fr_mem(dst, addr)) }
 inst_stfsux_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFSUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfsux_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfsux_fr_mem(dst, addr)) }
+emit_stfsux_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfsux_fr_mem(dst, addr)) }
 inst_stfd_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfd_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfd_fr_mem(dst, addr)) }
+emit_stfd_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfd_fr_mem(dst, addr)) }
 inst_stfdu_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFDU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfdu_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfdu_fr_mem(dst, addr)) }
+emit_stfdu_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfdu_fr_mem(dst, addr)) }
 inst_stfdx_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFDX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfdx_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfdx_fr_mem(dst, addr)) }
+emit_stfdx_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfdx_fr_mem(dst, addr)) }
 inst_stfdux_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFDUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfdux_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfdux_fr_mem(dst, addr)) }
+emit_stfdux_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfdux_fr_mem(dst, addr)) }
 inst_stfiwx_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFIWX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfiwx_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfiwx_fr_mem(dst, addr)) }
+emit_stfiwx_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfiwx_fr_mem(dst, addr)) }
 inst_stfdp_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfdp_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfdp_fr_mem(dst, addr)) }
+emit_stfdp_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfdp_fr_mem(dst, addr)) }
 inst_stfdpx_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFDPX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfdpx_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfdpx_fr_mem(dst, addr)) }
+emit_stfdpx_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfdpx_fr_mem(dst, addr)) }
 inst_mffs_fr                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFFS, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mffs_fr                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mffs_fr(dst)) }
+emit_mffs_fr                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mffs_fr(dst)) }
 inst_mffs_dot_fr                         :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFFS_DOT, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mffs_dot_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mffs_dot_fr(dst)) }
+emit_mffs_dot_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mffs_dot_fr(dst)) }
 inst_mcrfs_crf_crf                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MCRFS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mcrfs_crf_crf                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mcrfs_crf_crf(dst, src)) }
+emit_mcrfs_crf_crf                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mcrfs_crf_crf(dst, src)) }
 inst_mtfsb0_crb                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTFSB0, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtfsb0_crb                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtfsb0_crb(dst)) }
+emit_mtfsb0_crb                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtfsb0_crb(dst)) }
 inst_mtfsb0_dot_crb                      :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTFSB0_DOT, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtfsb0_dot_crb                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtfsb0_dot_crb(dst)) }
+emit_mtfsb0_dot_crb                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtfsb0_dot_crb(dst)) }
 inst_mtfsb1_crb                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTFSB1, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtfsb1_crb                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtfsb1_crb(dst)) }
+emit_mtfsb1_crb                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtfsb1_crb(dst)) }
 inst_mtfsb1_dot_crb                      :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTFSB1_DOT, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtfsb1_dot_crb                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtfsb1_dot_crb(dst)) }
+emit_mtfsb1_dot_crb                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtfsb1_dot_crb(dst)) }
 inst_mtfsfi_crf_imm                      :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MTFSFI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_mtfsfi_crf_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mtfsfi_crf_imm(dst, imm)) }
+emit_mtfsfi_crf_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mtfsfi_crf_imm(dst, imm)) }
 inst_mtfsfi_dot_crf_imm                  :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MTFSFI_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_mtfsfi_dot_crf_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mtfsfi_dot_crf_imm(dst, imm)) }
+emit_mtfsfi_dot_crf_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mtfsfi_dot_crf_imm(dst, imm)) }
 inst_mtfsf_imm_fr                        :: #force_inline proc "contextless" (imm: i64, dst: Register) -> Instruction { return Instruction{mnemonic = .MTFSF, operand_count = 2, length = 4, ops = {op_imm(imm), op_reg(dst), {}, {}}} }
-emit_mtfsf_imm_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append(instructions, inst_mtfsf_imm_fr(imm, dst)) }
+emit_mtfsf_imm_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append_elem(instructions, inst_mtfsf_imm_fr(imm, dst)) }
 inst_mtfsf_dot_imm_fr                    :: #force_inline proc "contextless" (imm: i64, dst: Register) -> Instruction { return Instruction{mnemonic = .MTFSF_DOT, operand_count = 2, length = 4, ops = {op_imm(imm), op_reg(dst), {}, {}}} }
-emit_mtfsf_dot_imm_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append(instructions, inst_mtfsf_dot_imm_fr(imm, dst)) }
+emit_mtfsf_dot_imm_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append_elem(instructions, inst_mtfsf_dot_imm_fr(imm, dst)) }
 inst_mfspr_r_spr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFSPR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mfspr_r_spr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mfspr_r_spr(dst, src)) }
+emit_mfspr_r_spr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mfspr_r_spr(dst, src)) }
 inst_mtspr_spr_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTSPR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtspr_spr_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtspr_spr_r(dst, src)) }
+emit_mtspr_spr_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtspr_spr_r(dst, src)) }
 inst_mftb_r_spr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFTB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mftb_r_spr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mftb_r_spr(dst, src)) }
+emit_mftb_r_spr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mftb_r_spr(dst, src)) }
 inst_mfcr_r                              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfcr_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfcr_r(dst)) }
+emit_mfcr_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfcr_r(dst)) }
 inst_mtcrf_imm_r                         :: #force_inline proc "contextless" (imm: i64, dst: Register) -> Instruction { return Instruction{mnemonic = .MTCRF, operand_count = 2, length = 4, ops = {op_imm(imm), op_reg(dst), {}, {}}} }
-emit_mtcrf_imm_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append(instructions, inst_mtcrf_imm_r(imm, dst)) }
+emit_mtcrf_imm_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append_elem(instructions, inst_mtcrf_imm_r(imm, dst)) }
 inst_mtocrf_imm_r                        :: #force_inline proc "contextless" (imm: i64, dst: Register) -> Instruction { return Instruction{mnemonic = .MTOCRF, operand_count = 2, length = 4, ops = {op_imm(imm), op_reg(dst), {}, {}}} }
-emit_mtocrf_imm_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append(instructions, inst_mtocrf_imm_r(imm, dst)) }
+emit_mtocrf_imm_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append_elem(instructions, inst_mtocrf_imm_r(imm, dst)) }
 inst_mfocrf_r_imm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MFOCRF, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_mfocrf_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mfocrf_r_imm(dst, imm)) }
+emit_mfocrf_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mfocrf_r_imm(dst, imm)) }
 inst_mtmsr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTMSR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtmsr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtmsr_r(dst)) }
+emit_mtmsr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtmsr_r(dst)) }
 inst_mfmsr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFMSR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfmsr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfmsr_r(dst)) }
+emit_mfmsr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfmsr_r(dst)) }
 inst_mtmsrd_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTMSRD, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtmsrd_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtmsrd_r(dst)) }
+emit_mtmsrd_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtmsrd_r(dst)) }
 inst_sc_hv_imm                           :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SC_HV, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_sc_hv_imm                           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_sc_hv_imm(imm)) }
+emit_sc_hv_imm                           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_sc_hv_imm(imm)) }
 inst_rfi_none                            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .RFI, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_rfi_none                            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rfi_none()) }
+emit_rfi_none                            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rfi_none()) }
 inst_rfid_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .RFID, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_rfid_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rfid_none()) }
+emit_rfid_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rfid_none()) }
 inst_hrfid_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .HRFID, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_hrfid_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_hrfid_none()) }
+emit_hrfid_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_hrfid_none()) }
 inst_sync_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_sync_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sync_none()) }
+emit_sync_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sync_none()) }
 inst_lwsync_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .LWSYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_lwsync_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lwsync_none()) }
+emit_lwsync_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lwsync_none()) }
 inst_ptesync_none                        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .PTESYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_ptesync_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ptesync_none()) }
+emit_ptesync_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ptesync_none()) }
 inst_eieio_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .EIEIO, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_eieio_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_eieio_none()) }
+emit_eieio_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_eieio_none()) }
 inst_isync_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .ISYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_isync_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_isync_none()) }
+emit_isync_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_isync_none()) }
 inst_dcbt_mem                            :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .DCBT, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_dcbt_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_dcbt_mem(addr)) }
+emit_dcbt_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_dcbt_mem(addr)) }
 inst_dcbtst_mem                          :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .DCBTST, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_dcbtst_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_dcbtst_mem(addr)) }
+emit_dcbtst_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_dcbtst_mem(addr)) }
 inst_dcba_mem                            :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .DCBA, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_dcba_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_dcba_mem(addr)) }
+emit_dcba_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_dcba_mem(addr)) }
 inst_dcbf_mem                            :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .DCBF, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_dcbf_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_dcbf_mem(addr)) }
+emit_dcbf_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_dcbf_mem(addr)) }
 inst_dcbz_mem                            :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .DCBZ, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_dcbz_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_dcbz_mem(addr)) }
+emit_dcbz_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_dcbz_mem(addr)) }
 inst_dcbzl_mem                           :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .DCBZL, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_dcbzl_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_dcbzl_mem(addr)) }
+emit_dcbzl_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_dcbzl_mem(addr)) }
 inst_icbi_mem                            :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .ICBI, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_icbi_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_icbi_mem(addr)) }
+emit_icbi_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_icbi_mem(addr)) }
 inst_icbt_mem                            :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .ICBT, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_icbt_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_icbt_mem(addr)) }
+emit_icbt_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_icbt_mem(addr)) }
 inst_nap_none                            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NAP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_nap_none                            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nap_none()) }
+emit_nap_none                            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nap_none()) }
 inst_wait_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .WAIT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_wait_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wait_none()) }
+emit_wait_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wait_none()) }
 inst_msync_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .MSYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_msync_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_msync_none()) }
+emit_msync_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_msync_none()) }
 inst_tlbie_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TLBIE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tlbie_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tlbie_r_r(dst, src)) }
+emit_tlbie_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tlbie_r_r(dst, src)) }
 inst_tlbiel_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .TLBIEL, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_tlbiel_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbiel_r(dst)) }
+emit_tlbiel_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbiel_r(dst)) }
 inst_tlbsync_none                        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TLBSYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tlbsync_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbsync_none()) }
+emit_tlbsync_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbsync_none()) }
 inst_slbie_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .SLBIE, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_slbie_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_slbie_r(dst)) }
+emit_slbie_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_slbie_r(dst)) }
 inst_slbia_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SLBIA, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_slbia_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_slbia_none()) }
+emit_slbia_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_slbia_none()) }
 inst_slbmte_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SLBMTE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_slbmte_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_slbmte_r_r(dst, src)) }
+emit_slbmte_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_slbmte_r_r(dst, src)) }
 inst_slbmfee_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SLBMFEE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_slbmfee_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_slbmfee_r_r(dst, src)) }
+emit_slbmfee_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_slbmfee_r_r(dst, src)) }
 inst_slbmfev_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SLBMFEV, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_slbmfev_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_slbmfev_r_r(dst, src)) }
+emit_slbmfev_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_slbmfev_r_r(dst, src)) }
 inst_slbsync_none                        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SLBSYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_slbsync_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_slbsync_none()) }
+emit_slbsync_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_slbsync_none()) }
 inst_slbieg_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SLBIEG, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_slbieg_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_slbieg_r_r(dst, src)) }
+emit_slbieg_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_slbieg_r_r(dst, src)) }
 inst_darn_r_imm                          :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DARN, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_darn_r_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_darn_r_imm(dst, imm)) }
+emit_darn_r_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_darn_r_imm(dst, imm)) }
 inst_vand_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vand_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vand_v_v_v(dst, src, src2)) }
+emit_vand_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vand_v_v_v(dst, src, src2)) }
 inst_vandc_v_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VANDC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vandc_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vandc_v_v_v(dst, src, src2)) }
+emit_vandc_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vandc_v_v_v(dst, src, src2)) }
 inst_vor_v_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vor_v_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vor_v_v_v(dst, src, src2)) }
+emit_vor_v_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vor_v_v_v(dst, src, src2)) }
 inst_vorc_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VORC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vorc_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vorc_v_v_v(dst, src, src2)) }
+emit_vorc_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vorc_v_v_v(dst, src, src2)) }
 inst_vnor_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vnor_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vnor_v_v_v(dst, src, src2)) }
+emit_vnor_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vnor_v_v_v(dst, src, src2)) }
 inst_vxor_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VXOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vxor_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vxor_v_v_v(dst, src, src2)) }
+emit_vxor_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vxor_v_v_v(dst, src, src2)) }
 inst_veqv_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VEQV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_veqv_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_veqv_v_v_v(dst, src, src2)) }
+emit_veqv_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_veqv_v_v_v(dst, src, src2)) }
 inst_vnand_v_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vnand_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vnand_v_v_v(dst, src, src2)) }
+emit_vnand_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vnand_v_v_v(dst, src, src2)) }
 inst_vsel_v_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VSEL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vsel_v_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vsel_v_v_v_v(dst, src, src2, src3)) }
+emit_vsel_v_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vsel_v_v_v_v(dst, src, src2, src3)) }
 inst_vaddubm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDUBM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddubm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddubm_v_v_v(dst, src, src2)) }
+emit_vaddubm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddubm_v_v_v(dst, src, src2)) }
 inst_vadduhm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDUHM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadduhm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadduhm_v_v_v(dst, src, src2)) }
+emit_vadduhm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadduhm_v_v_v(dst, src, src2)) }
 inst_vadduwm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDUWM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadduwm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadduwm_v_v_v(dst, src, src2)) }
+emit_vadduwm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadduwm_v_v_v(dst, src, src2)) }
 inst_vaddudm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDUDM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddudm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddudm_v_v_v(dst, src, src2)) }
+emit_vaddudm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddudm_v_v_v(dst, src, src2)) }
 inst_vaddfp_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddfp_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddfp_v_v_v(dst, src, src2)) }
+emit_vaddfp_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddfp_v_v_v(dst, src, src2)) }
 inst_vsububm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBUBM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsububm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsububm_v_v_v(dst, src, src2)) }
+emit_vsububm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsububm_v_v_v(dst, src, src2)) }
 inst_vsubuhm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBUHM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubuhm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubuhm_v_v_v(dst, src, src2)) }
+emit_vsubuhm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubuhm_v_v_v(dst, src, src2)) }
 inst_vsubuwm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBUWM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubuwm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubuwm_v_v_v(dst, src, src2)) }
+emit_vsubuwm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubuwm_v_v_v(dst, src, src2)) }
 inst_vsubudm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBUDM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubudm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubudm_v_v_v(dst, src, src2)) }
+emit_vsubudm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubudm_v_v_v(dst, src, src2)) }
 inst_vsubfp_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubfp_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubfp_v_v_v(dst, src, src2)) }
+emit_vsubfp_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubfp_v_v_v(dst, src, src2)) }
 inst_vaddcuw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDCUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddcuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddcuw_v_v_v(dst, src, src2)) }
+emit_vaddcuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddcuw_v_v_v(dst, src, src2)) }
 inst_vaddcuq_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDCUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddcuq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddcuq_v_v_v(dst, src, src2)) }
+emit_vaddcuq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddcuq_v_v_v(dst, src, src2)) }
 inst_vaddecuq_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VADDECUQ, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vaddecuq_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vaddecuq_v_v_v_v(dst, src, src2, src3)) }
+emit_vaddecuq_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vaddecuq_v_v_v_v(dst, src, src2, src3)) }
 inst_vaddeuqm_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VADDEUQM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vaddeuqm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vaddeuqm_v_v_v_v(dst, src, src2, src3)) }
+emit_vaddeuqm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vaddeuqm_v_v_v_v(dst, src, src2, src3)) }
 inst_vsubcuw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBCUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubcuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubcuw_v_v_v(dst, src, src2)) }
+emit_vsubcuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubcuw_v_v_v(dst, src, src2)) }
 inst_vsubcuq_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBCUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubcuq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubcuq_v_v_v(dst, src, src2)) }
+emit_vsubcuq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubcuq_v_v_v(dst, src, src2)) }
 inst_vsubecuq_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VSUBECUQ, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vsubecuq_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vsubecuq_v_v_v_v(dst, src, src2, src3)) }
+emit_vsubecuq_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vsubecuq_v_v_v_v(dst, src, src2, src3)) }
 inst_vsubeuqm_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VSUBEUQM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vsubeuqm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vsubeuqm_v_v_v_v(dst, src, src2, src3)) }
+emit_vsubeuqm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vsubeuqm_v_v_v_v(dst, src, src2, src3)) }
 inst_vaddubs_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDUBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddubs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddubs_v_v_v(dst, src, src2)) }
+emit_vaddubs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddubs_v_v_v(dst, src, src2)) }
 inst_vadduhs_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDUHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadduhs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadduhs_v_v_v(dst, src, src2)) }
+emit_vadduhs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadduhs_v_v_v(dst, src, src2)) }
 inst_vadduws_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDUWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadduws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadduws_v_v_v(dst, src, src2)) }
+emit_vadduws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadduws_v_v_v(dst, src, src2)) }
 inst_vaddsbs_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDSBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddsbs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddsbs_v_v_v(dst, src, src2)) }
+emit_vaddsbs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddsbs_v_v_v(dst, src, src2)) }
 inst_vaddshs_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDSHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddshs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddshs_v_v_v(dst, src, src2)) }
+emit_vaddshs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddshs_v_v_v(dst, src, src2)) }
 inst_vaddsws_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDSWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddsws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddsws_v_v_v(dst, src, src2)) }
+emit_vaddsws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddsws_v_v_v(dst, src, src2)) }
 inst_vsububs_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBUBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsububs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsububs_v_v_v(dst, src, src2)) }
+emit_vsububs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsububs_v_v_v(dst, src, src2)) }
 inst_vsubuhs_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBUHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubuhs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubuhs_v_v_v(dst, src, src2)) }
+emit_vsubuhs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubuhs_v_v_v(dst, src, src2)) }
 inst_vsubuws_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBUWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubuws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubuws_v_v_v(dst, src, src2)) }
+emit_vsubuws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubuws_v_v_v(dst, src, src2)) }
 inst_vsubsbs_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBSBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubsbs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubsbs_v_v_v(dst, src, src2)) }
+emit_vsubsbs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubsbs_v_v_v(dst, src, src2)) }
 inst_vsubshs_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBSHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubshs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubshs_v_v_v(dst, src, src2)) }
+emit_vsubshs_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubshs_v_v_v(dst, src, src2)) }
 inst_vsubsws_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBSWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubsws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubsws_v_v_v(dst, src, src2)) }
+emit_vsubsws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubsws_v_v_v(dst, src, src2)) }
 inst_vmulesb_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULESB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulesb_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulesb_v_v_v(dst, src, src2)) }
+emit_vmulesb_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulesb_v_v_v(dst, src, src2)) }
 inst_vmulesh_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULESH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulesh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulesh_v_v_v(dst, src, src2)) }
+emit_vmulesh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulesh_v_v_v(dst, src, src2)) }
 inst_vmulesw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULESW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulesw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulesw_v_v_v(dst, src, src2)) }
+emit_vmulesw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulesw_v_v_v(dst, src, src2)) }
 inst_vmuleub_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULEUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmuleub_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmuleub_v_v_v(dst, src, src2)) }
+emit_vmuleub_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmuleub_v_v_v(dst, src, src2)) }
 inst_vmuleuh_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULEUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmuleuh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmuleuh_v_v_v(dst, src, src2)) }
+emit_vmuleuh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmuleuh_v_v_v(dst, src, src2)) }
 inst_vmuleuw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULEUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmuleuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmuleuw_v_v_v(dst, src, src2)) }
+emit_vmuleuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmuleuw_v_v_v(dst, src, src2)) }
 inst_vmulosb_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULOSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulosb_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulosb_v_v_v(dst, src, src2)) }
+emit_vmulosb_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulosb_v_v_v(dst, src, src2)) }
 inst_vmulosh_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULOSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulosh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulosh_v_v_v(dst, src, src2)) }
+emit_vmulosh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulosh_v_v_v(dst, src, src2)) }
 inst_vmulosw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULOSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulosw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulosw_v_v_v(dst, src, src2)) }
+emit_vmulosw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulosw_v_v_v(dst, src, src2)) }
 inst_vmuloub_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULOUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmuloub_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmuloub_v_v_v(dst, src, src2)) }
+emit_vmuloub_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmuloub_v_v_v(dst, src, src2)) }
 inst_vmulouh_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULOUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulouh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulouh_v_v_v(dst, src, src2)) }
+emit_vmulouh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulouh_v_v_v(dst, src, src2)) }
 inst_vmulouw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULOUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulouw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulouw_v_v_v(dst, src, src2)) }
+emit_vmulouw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulouw_v_v_v(dst, src, src2)) }
 inst_vmuluwm_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULUWM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmuluwm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmuluwm_v_v_v(dst, src, src2)) }
+emit_vmuluwm_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmuluwm_v_v_v(dst, src, src2)) }
 inst_vmsumubm_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUMUBM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsumubm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsumubm_v_v_v_v(dst, src, src2, src3)) }
+emit_vmsumubm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsumubm_v_v_v_v(dst, src, src2, src3)) }
 inst_vmsummbm_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUMMBM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsummbm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsummbm_v_v_v_v(dst, src, src2, src3)) }
+emit_vmsummbm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsummbm_v_v_v_v(dst, src, src2, src3)) }
 inst_vmsumuhm_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUMUHM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsumuhm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsumuhm_v_v_v_v(dst, src, src2, src3)) }
+emit_vmsumuhm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsumuhm_v_v_v_v(dst, src, src2, src3)) }
 inst_vmsumshm_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUMSHM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsumshm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsumshm_v_v_v_v(dst, src, src2, src3)) }
+emit_vmsumshm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsumshm_v_v_v_v(dst, src, src2, src3)) }
 inst_vmsumuhs_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUMUHS, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsumuhs_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsumuhs_v_v_v_v(dst, src, src2, src3)) }
+emit_vmsumuhs_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsumuhs_v_v_v_v(dst, src, src2, src3)) }
 inst_vmsumshs_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUMSHS, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsumshs_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsumshs_v_v_v_v(dst, src, src2, src3)) }
+emit_vmsumshs_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsumshs_v_v_v_v(dst, src, src2, src3)) }
 inst_vmsumudm_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUMUDM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsumudm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsumudm_v_v_v_v(dst, src, src2, src3)) }
+emit_vmsumudm_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsumudm_v_v_v_v(dst, src, src2, src3)) }
 inst_vcmpequb_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequb_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequb_v_v_v(dst, src, src2)) }
+emit_vcmpequb_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequb_v_v_v(dst, src, src2)) }
 inst_vcmpequb_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequb_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequb_dot_v_v_v(dst, src, src2)) }
+emit_vcmpequb_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequb_dot_v_v_v(dst, src, src2)) }
 inst_vcmpequh_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequh_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequh_v_v_v(dst, src, src2)) }
+emit_vcmpequh_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequh_v_v_v(dst, src, src2)) }
 inst_vcmpequh_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUH_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequh_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequh_dot_v_v_v(dst, src, src2)) }
+emit_vcmpequh_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequh_dot_v_v_v(dst, src, src2)) }
 inst_vcmpequw_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequw_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequw_v_v_v(dst, src, src2)) }
+emit_vcmpequw_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequw_v_v_v(dst, src, src2)) }
 inst_vcmpequw_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequw_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequw_dot_v_v_v(dst, src, src2)) }
+emit_vcmpequw_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequw_dot_v_v_v(dst, src, src2)) }
 inst_vcmpequd_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequd_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequd_v_v_v(dst, src, src2)) }
+emit_vcmpequd_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequd_v_v_v(dst, src, src2)) }
 inst_vcmpequd_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequd_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequd_dot_v_v_v(dst, src, src2)) }
+emit_vcmpequd_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequd_dot_v_v_v(dst, src, src2)) }
 inst_vcmpneb_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpneb_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpneb_v_v_v(dst, src, src2)) }
+emit_vcmpneb_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpneb_v_v_v(dst, src, src2)) }
 inst_vcmpneb_dot_v_v_v                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpneb_dot_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpneb_dot_v_v_v(dst, src, src2)) }
+emit_vcmpneb_dot_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpneb_dot_v_v_v(dst, src, src2)) }
 inst_vcmpneh_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpneh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpneh_v_v_v(dst, src, src2)) }
+emit_vcmpneh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpneh_v_v_v(dst, src, src2)) }
 inst_vcmpneh_dot_v_v_v                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEH_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpneh_dot_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpneh_dot_v_v_v(dst, src, src2)) }
+emit_vcmpneh_dot_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpneh_dot_v_v_v(dst, src, src2)) }
 inst_vcmpnew_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpnew_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpnew_v_v_v(dst, src, src2)) }
+emit_vcmpnew_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpnew_v_v_v(dst, src, src2)) }
 inst_vcmpnew_dot_v_v_v                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpnew_dot_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpnew_dot_v_v_v(dst, src, src2)) }
+emit_vcmpnew_dot_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpnew_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtsb_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsb_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsb_v_v_v(dst, src, src2)) }
+emit_vcmpgtsb_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsb_v_v_v(dst, src, src2)) }
 inst_vcmpgtsb_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsb_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsb_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtsb_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsb_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtsh_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsh_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsh_v_v_v(dst, src, src2)) }
+emit_vcmpgtsh_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsh_v_v_v(dst, src, src2)) }
 inst_vcmpgtsh_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSH_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsh_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsh_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtsh_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsh_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtsw_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsw_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsw_v_v_v(dst, src, src2)) }
+emit_vcmpgtsw_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsw_v_v_v(dst, src, src2)) }
 inst_vcmpgtsw_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsw_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsw_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtsw_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsw_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtsd_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsd_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsd_v_v_v(dst, src, src2)) }
+emit_vcmpgtsd_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsd_v_v_v(dst, src, src2)) }
 inst_vcmpgtsd_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsd_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsd_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtsd_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsd_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtub_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtub_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtub_v_v_v(dst, src, src2)) }
+emit_vcmpgtub_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtub_v_v_v(dst, src, src2)) }
 inst_vcmpgtub_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtub_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtub_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtub_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtub_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtuh_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtuh_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtuh_v_v_v(dst, src, src2)) }
+emit_vcmpgtuh_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtuh_v_v_v(dst, src, src2)) }
 inst_vcmpgtuh_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUH_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtuh_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtuh_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtuh_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtuh_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtuw_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtuw_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtuw_v_v_v(dst, src, src2)) }
+emit_vcmpgtuw_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtuw_v_v_v(dst, src, src2)) }
 inst_vcmpgtuw_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtuw_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtuw_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtuw_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtuw_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtud_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtud_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtud_v_v_v(dst, src, src2)) }
+emit_vcmpgtud_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtud_v_v_v(dst, src, src2)) }
 inst_vcmpgtud_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtud_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtud_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtud_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtud_dot_v_v_v(dst, src, src2)) }
 inst_vcmpeqfp_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpeqfp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpeqfp_v_v_v(dst, src, src2)) }
+emit_vcmpeqfp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpeqfp_v_v_v(dst, src, src2)) }
 inst_vcmpeqfp_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQFP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpeqfp_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpeqfp_dot_v_v_v(dst, src, src2)) }
+emit_vcmpeqfp_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpeqfp_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgefp_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGEFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgefp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgefp_v_v_v(dst, src, src2)) }
+emit_vcmpgefp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgefp_v_v_v(dst, src, src2)) }
 inst_vcmpgefp_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGEFP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgefp_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgefp_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgefp_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgefp_dot_v_v_v(dst, src, src2)) }
 inst_vcmpgtfp_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtfp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtfp_v_v_v(dst, src, src2)) }
+emit_vcmpgtfp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtfp_v_v_v(dst, src, src2)) }
 inst_vcmpgtfp_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTFP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtfp_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtfp_dot_v_v_v(dst, src, src2)) }
+emit_vcmpgtfp_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtfp_dot_v_v_v(dst, src, src2)) }
 inst_vcmpbfp_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPBFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpbfp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpbfp_v_v_v(dst, src, src2)) }
+emit_vcmpbfp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpbfp_v_v_v(dst, src, src2)) }
 inst_vcmpbfp_dot_v_v_v                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPBFP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpbfp_dot_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpbfp_dot_v_v_v(dst, src, src2)) }
+emit_vcmpbfp_dot_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpbfp_dot_v_v_v(dst, src, src2)) }
 inst_vmaxsb_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxsb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxsb_v_v_v(dst, src, src2)) }
+emit_vmaxsb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxsb_v_v_v(dst, src, src2)) }
 inst_vmaxsh_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxsh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxsh_v_v_v(dst, src, src2)) }
+emit_vmaxsh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxsh_v_v_v(dst, src, src2)) }
 inst_vmaxsw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxsw_v_v_v(dst, src, src2)) }
+emit_vmaxsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxsw_v_v_v(dst, src, src2)) }
 inst_vmaxsd_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxsd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxsd_v_v_v(dst, src, src2)) }
+emit_vmaxsd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxsd_v_v_v(dst, src, src2)) }
 inst_vmaxub_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxub_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxub_v_v_v(dst, src, src2)) }
+emit_vmaxub_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxub_v_v_v(dst, src, src2)) }
 inst_vmaxuh_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxuh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxuh_v_v_v(dst, src, src2)) }
+emit_vmaxuh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxuh_v_v_v(dst, src, src2)) }
 inst_vmaxuw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxuw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxuw_v_v_v(dst, src, src2)) }
+emit_vmaxuw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxuw_v_v_v(dst, src, src2)) }
 inst_vmaxud_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxud_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxud_v_v_v(dst, src, src2)) }
+emit_vmaxud_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxud_v_v_v(dst, src, src2)) }
 inst_vmaxfp_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxfp_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxfp_v_v_v(dst, src, src2)) }
+emit_vmaxfp_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxfp_v_v_v(dst, src, src2)) }
 inst_vminsb_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminsb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminsb_v_v_v(dst, src, src2)) }
+emit_vminsb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminsb_v_v_v(dst, src, src2)) }
 inst_vminsh_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminsh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminsh_v_v_v(dst, src, src2)) }
+emit_vminsh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminsh_v_v_v(dst, src, src2)) }
 inst_vminsw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminsw_v_v_v(dst, src, src2)) }
+emit_vminsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminsw_v_v_v(dst, src, src2)) }
 inst_vminsd_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminsd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminsd_v_v_v(dst, src, src2)) }
+emit_vminsd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminsd_v_v_v(dst, src, src2)) }
 inst_vminub_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminub_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminub_v_v_v(dst, src, src2)) }
+emit_vminub_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminub_v_v_v(dst, src, src2)) }
 inst_vminuh_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminuh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminuh_v_v_v(dst, src, src2)) }
+emit_vminuh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminuh_v_v_v(dst, src, src2)) }
 inst_vminuw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminuw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminuw_v_v_v(dst, src, src2)) }
+emit_vminuw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminuw_v_v_v(dst, src, src2)) }
 inst_vminud_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminud_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminud_v_v_v(dst, src, src2)) }
+emit_vminud_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminud_v_v_v(dst, src, src2)) }
 inst_vminfp_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminfp_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminfp_v_v_v(dst, src, src2)) }
+emit_vminfp_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminfp_v_v_v(dst, src, src2)) }
 inst_vavgsb_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAVGSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vavgsb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vavgsb_v_v_v(dst, src, src2)) }
+emit_vavgsb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vavgsb_v_v_v(dst, src, src2)) }
 inst_vavgsh_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAVGSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vavgsh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vavgsh_v_v_v(dst, src, src2)) }
+emit_vavgsh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vavgsh_v_v_v(dst, src, src2)) }
 inst_vavgsw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAVGSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vavgsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vavgsw_v_v_v(dst, src, src2)) }
+emit_vavgsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vavgsw_v_v_v(dst, src, src2)) }
 inst_vavgub_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAVGUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vavgub_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vavgub_v_v_v(dst, src, src2)) }
+emit_vavgub_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vavgub_v_v_v(dst, src, src2)) }
 inst_vavguh_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAVGUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vavguh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vavguh_v_v_v(dst, src, src2)) }
+emit_vavguh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vavguh_v_v_v(dst, src, src2)) }
 inst_vavguw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAVGUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vavguw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vavguw_v_v_v(dst, src, src2)) }
+emit_vavguw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vavguw_v_v_v(dst, src, src2)) }
 inst_vsl_v_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsl_v_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsl_v_v_v(dst, src, src2)) }
+emit_vsl_v_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsl_v_v_v(dst, src, src2)) }
 inst_vsr_v_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsr_v_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsr_v_v_v(dst, src, src2)) }
+emit_vsr_v_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsr_v_v_v(dst, src, src2)) }
 inst_vslo_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSLO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vslo_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vslo_v_v_v(dst, src, src2)) }
+emit_vslo_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vslo_v_v_v(dst, src, src2)) }
 inst_vsro_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsro_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsro_v_v_v(dst, src, src2)) }
+emit_vsro_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsro_v_v_v(dst, src, src2)) }
 inst_vslb_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSLB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vslb_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vslb_v_v_v(dst, src, src2)) }
+emit_vslb_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vslb_v_v_v(dst, src, src2)) }
 inst_vslh_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSLH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vslh_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vslh_v_v_v(dst, src, src2)) }
+emit_vslh_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vslh_v_v_v(dst, src, src2)) }
 inst_vslw_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vslw_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vslw_v_v_v(dst, src, src2)) }
+emit_vslw_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vslw_v_v_v(dst, src, src2)) }
 inst_vsld_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSLD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsld_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsld_v_v_v(dst, src, src2)) }
+emit_vsld_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsld_v_v_v(dst, src, src2)) }
 inst_vsrb_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrb_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrb_v_v_v(dst, src, src2)) }
+emit_vsrb_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrb_v_v_v(dst, src, src2)) }
 inst_vsrh_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrh_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrh_v_v_v(dst, src, src2)) }
+emit_vsrh_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrh_v_v_v(dst, src, src2)) }
 inst_vsrw_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrw_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrw_v_v_v(dst, src, src2)) }
+emit_vsrw_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrw_v_v_v(dst, src, src2)) }
 inst_vsrd_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrd_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrd_v_v_v(dst, src, src2)) }
+emit_vsrd_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrd_v_v_v(dst, src, src2)) }
 inst_vsrab_v_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRAB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrab_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrab_v_v_v(dst, src, src2)) }
+emit_vsrab_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrab_v_v_v(dst, src, src2)) }
 inst_vsrah_v_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrah_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrah_v_v_v(dst, src, src2)) }
+emit_vsrah_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrah_v_v_v(dst, src, src2)) }
 inst_vsraw_v_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsraw_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsraw_v_v_v(dst, src, src2)) }
+emit_vsraw_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsraw_v_v_v(dst, src, src2)) }
 inst_vsrad_v_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRAD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrad_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrad_v_v_v(dst, src, src2)) }
+emit_vsrad_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrad_v_v_v(dst, src, src2)) }
 inst_vrlb_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlb_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlb_v_v_v(dst, src, src2)) }
+emit_vrlb_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlb_v_v_v(dst, src, src2)) }
 inst_vrlh_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlh_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlh_v_v_v(dst, src, src2)) }
+emit_vrlh_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlh_v_v_v(dst, src, src2)) }
 inst_vrlw_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlw_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlw_v_v_v(dst, src, src2)) }
+emit_vrlw_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlw_v_v_v(dst, src, src2)) }
 inst_vrld_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrld_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrld_v_v_v(dst, src, src2)) }
+emit_vrld_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrld_v_v_v(dst, src, src2)) }
 inst_vperm_v_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VPERM, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vperm_v_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vperm_v_v_v_v(dst, src, src2, src3)) }
+emit_vperm_v_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vperm_v_v_v_v(dst, src, src2, src3)) }
 inst_vpermr_v_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VPERMR, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vpermr_v_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vpermr_v_v_v_v(dst, src, src2, src3)) }
+emit_vpermr_v_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vpermr_v_v_v_v(dst, src, src2, src3)) }
 inst_vsldoi_v_v_v_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSLDOI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_vsldoi_v_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vsldoi_v_v_v_imm(dst, src, src2, imm)) }
+emit_vsldoi_v_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vsldoi_v_v_v_imm(dst, src, src2, imm)) }
 inst_vbpermq_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VBPERMQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vbpermq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vbpermq_v_v_v(dst, src, src2)) }
+emit_vbpermq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vbpermq_v_v_v(dst, src, src2)) }
 inst_vbpermd_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VBPERMD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vbpermd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vbpermd_v_v_v(dst, src, src2)) }
+emit_vbpermd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vbpermd_v_v_v(dst, src, src2)) }
 inst_vmrghb_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGHB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrghb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrghb_v_v_v(dst, src, src2)) }
+emit_vmrghb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrghb_v_v_v(dst, src, src2)) }
 inst_vmrghh_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGHH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrghh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrghh_v_v_v(dst, src, src2)) }
+emit_vmrghh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrghh_v_v_v(dst, src, src2)) }
 inst_vmrghw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrghw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrghw_v_v_v(dst, src, src2)) }
+emit_vmrghw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrghw_v_v_v(dst, src, src2)) }
 inst_vmrglb_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGLB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrglb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrglb_v_v_v(dst, src, src2)) }
+emit_vmrglb_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrglb_v_v_v(dst, src, src2)) }
 inst_vmrglh_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGLH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrglh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrglh_v_v_v(dst, src, src2)) }
+emit_vmrglh_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrglh_v_v_v(dst, src, src2)) }
 inst_vmrglw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrglw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrglw_v_v_v(dst, src, src2)) }
+emit_vmrglw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrglw_v_v_v(dst, src, src2)) }
 inst_vmrgew_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGEW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrgew_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrgew_v_v_v(dst, src, src2)) }
+emit_vmrgew_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrgew_v_v_v(dst, src, src2)) }
 inst_vmrgow_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGOW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrgow_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrgow_v_v_v(dst, src, src2)) }
+emit_vmrgow_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrgow_v_v_v(dst, src, src2)) }
 inst_vspltb_v_v_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSPLTB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vspltb_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vspltb_v_v_imm(dst, src, imm)) }
+emit_vspltb_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vspltb_v_v_imm(dst, src, imm)) }
 inst_vsplth_v_v_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSPLTH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vsplth_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vsplth_v_v_imm(dst, src, imm)) }
+emit_vsplth_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vsplth_v_v_imm(dst, src, imm)) }
 inst_vspltw_v_v_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSPLTW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vspltw_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vspltw_v_v_imm(dst, src, imm)) }
+emit_vspltw_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vspltw_v_v_imm(dst, src, imm)) }
 inst_vspltisb_v_simm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSPLTISB, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_vspltisb_v_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vspltisb_v_simm(dst, imm)) }
+emit_vspltisb_v_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vspltisb_v_simm(dst, imm)) }
 inst_vspltish_v_simm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSPLTISH, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_vspltish_v_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vspltish_v_simm(dst, imm)) }
+emit_vspltish_v_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vspltish_v_simm(dst, imm)) }
 inst_vspltisw_v_simm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSPLTISW, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_vspltisw_v_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vspltisw_v_simm(dst, imm)) }
+emit_vspltisw_v_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vspltisw_v_simm(dst, imm)) }
 inst_vpkpx_v_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkpx_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkpx_v_v_v(dst, src, src2)) }
+emit_vpkpx_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkpx_v_v_v(dst, src, src2)) }
 inst_vpkuhum_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKUHUM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkuhum_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkuhum_v_v_v(dst, src, src2)) }
+emit_vpkuhum_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkuhum_v_v_v(dst, src, src2)) }
 inst_vpkuwum_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKUWUM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkuwum_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkuwum_v_v_v(dst, src, src2)) }
+emit_vpkuwum_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkuwum_v_v_v(dst, src, src2)) }
 inst_vpkudum_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKUDUM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkudum_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkudum_v_v_v(dst, src, src2)) }
+emit_vpkudum_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkudum_v_v_v(dst, src, src2)) }
 inst_vpkuhus_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKUHUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkuhus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkuhus_v_v_v(dst, src, src2)) }
+emit_vpkuhus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkuhus_v_v_v(dst, src, src2)) }
 inst_vpkuwus_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKUWUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkuwus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkuwus_v_v_v(dst, src, src2)) }
+emit_vpkuwus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkuwus_v_v_v(dst, src, src2)) }
 inst_vpkudus_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKUDUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkudus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkudus_v_v_v(dst, src, src2)) }
+emit_vpkudus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkudus_v_v_v(dst, src, src2)) }
 inst_vpkshus_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKSHUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkshus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkshus_v_v_v(dst, src, src2)) }
+emit_vpkshus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkshus_v_v_v(dst, src, src2)) }
 inst_vpkswus_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKSWUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkswus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkswus_v_v_v(dst, src, src2)) }
+emit_vpkswus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkswus_v_v_v(dst, src, src2)) }
 inst_vpksdus_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKSDUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpksdus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpksdus_v_v_v(dst, src, src2)) }
+emit_vpksdus_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpksdus_v_v_v(dst, src, src2)) }
 inst_vpkshss_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKSHSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkshss_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkshss_v_v_v(dst, src, src2)) }
+emit_vpkshss_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkshss_v_v_v(dst, src, src2)) }
 inst_vpkswss_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKSWSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpkswss_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpkswss_v_v_v(dst, src, src2)) }
+emit_vpkswss_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpkswss_v_v_v(dst, src, src2)) }
 inst_vpksdss_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPKSDSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpksdss_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpksdss_v_v_v(dst, src, src2)) }
+emit_vpksdss_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpksdss_v_v_v(dst, src, src2)) }
 inst_vupkhsb_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUPKHSB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vupkhsb_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vupkhsb_v_v(dst, src)) }
+emit_vupkhsb_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vupkhsb_v_v(dst, src)) }
 inst_vupkhsh_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUPKHSH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vupkhsh_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vupkhsh_v_v(dst, src)) }
+emit_vupkhsh_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vupkhsh_v_v(dst, src)) }
 inst_vupkhsw_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUPKHSW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vupkhsw_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vupkhsw_v_v(dst, src)) }
+emit_vupkhsw_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vupkhsw_v_v(dst, src)) }
 inst_vupklsb_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUPKLSB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vupklsb_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vupklsb_v_v(dst, src)) }
+emit_vupklsb_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vupklsb_v_v(dst, src)) }
 inst_vupklsh_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUPKLSH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vupklsh_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vupklsh_v_v(dst, src)) }
+emit_vupklsh_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vupklsh_v_v(dst, src)) }
 inst_vupklsw_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUPKLSW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vupklsw_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vupklsw_v_v(dst, src)) }
+emit_vupklsw_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vupklsw_v_v(dst, src)) }
 inst_vupkhpx_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUPKHPX, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vupkhpx_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vupkhpx_v_v(dst, src)) }
+emit_vupkhpx_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vupkhpx_v_v(dst, src)) }
 inst_vupklpx_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VUPKLPX, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vupklpx_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vupklpx_v_v(dst, src)) }
+emit_vupklpx_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vupklpx_v_v(dst, src)) }
 inst_vcipher_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCIPHER, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcipher_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcipher_v_v_v(dst, src, src2)) }
+emit_vcipher_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcipher_v_v_v(dst, src, src2)) }
 inst_vcipherlast_v_v_v                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCIPHERLAST, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcipherlast_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcipherlast_v_v_v(dst, src, src2)) }
+emit_vcipherlast_v_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcipherlast_v_v_v(dst, src, src2)) }
 inst_vncipher_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNCIPHER, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vncipher_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vncipher_v_v_v(dst, src, src2)) }
+emit_vncipher_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vncipher_v_v_v(dst, src, src2)) }
 inst_vncipherlast_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNCIPHERLAST, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vncipherlast_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vncipherlast_v_v_v(dst, src, src2)) }
+emit_vncipherlast_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vncipherlast_v_v_v(dst, src, src2)) }
 inst_vsbox_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSBOX, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vsbox_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vsbox_v_v(dst, src)) }
+emit_vsbox_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vsbox_v_v(dst, src)) }
 inst_vshasigmaw_v_v_imm_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .VSHASIGMAW, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_vshasigmaw_v_v_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_vshasigmaw_v_v_imm_imm(dst, src, imm, imm2)) }
+emit_vshasigmaw_v_v_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_vshasigmaw_v_v_imm_imm(dst, src, imm, imm2)) }
 inst_vshasigmad_v_v_imm_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .VSHASIGMAD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_vshasigmad_v_v_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_vshasigmad_v_v_imm_imm(dst, src, imm, imm2)) }
+emit_vshasigmad_v_v_imm_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_vshasigmad_v_v_imm_imm(dst, src, imm, imm2)) }
 inst_vpmsumb_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPMSUMB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpmsumb_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpmsumb_v_v_v(dst, src, src2)) }
+emit_vpmsumb_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpmsumb_v_v_v(dst, src, src2)) }
 inst_vpmsumh_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPMSUMH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpmsumh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpmsumh_v_v_v(dst, src, src2)) }
+emit_vpmsumh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpmsumh_v_v_v(dst, src, src2)) }
 inst_vpmsumw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPMSUMW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpmsumw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpmsumw_v_v_v(dst, src, src2)) }
+emit_vpmsumw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpmsumw_v_v_v(dst, src, src2)) }
 inst_vpmsumd_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPMSUMD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpmsumd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpmsumd_v_v_v(dst, src, src2)) }
+emit_vpmsumd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpmsumd_v_v_v(dst, src, src2)) }
 inst_vrfim_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRFIM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrfim_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrfim_v_v(dst, src)) }
+emit_vrfim_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrfim_v_v(dst, src)) }
 inst_vrfin_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRFIN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrfin_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrfin_v_v(dst, src)) }
+emit_vrfin_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrfin_v_v(dst, src)) }
 inst_vrfip_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRFIP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrfip_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrfip_v_v(dst, src)) }
+emit_vrfip_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrfip_v_v(dst, src)) }
 inst_vrfiz_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRFIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrfiz_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrfiz_v_v(dst, src)) }
+emit_vrfiz_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrfiz_v_v(dst, src)) }
 inst_vexptefp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXPTEFP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vexptefp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vexptefp_v_v(dst, src)) }
+emit_vexptefp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vexptefp_v_v(dst, src)) }
 inst_vlogefp_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VLOGEFP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vlogefp_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vlogefp_v_v(dst, src)) }
+emit_vlogefp_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vlogefp_v_v(dst, src)) }
 inst_vrefp_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VREFP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrefp_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrefp_v_v(dst, src)) }
+emit_vrefp_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrefp_v_v(dst, src)) }
 inst_vrsqrtefp_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRSQRTEFP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrsqrtefp_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrsqrtefp_v_v(dst, src)) }
+emit_vrsqrtefp_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrsqrtefp_v_v(dst, src)) }
 inst_vmaddfp_v_v_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMADDFP, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmaddfp_v_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmaddfp_v_v_v_v(dst, src, src2, src3)) }
+emit_vmaddfp_v_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmaddfp_v_v_v_v(dst, src, src2, src3)) }
 inst_vnmsubfp_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VNMSUBFP, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vnmsubfp_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vnmsubfp_v_v_v_v(dst, src, src2, src3)) }
+emit_vnmsubfp_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vnmsubfp_v_v_v_v(dst, src, src2, src3)) }
 inst_vcfsx_v_v_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCFSX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vcfsx_v_v_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vcfsx_v_v_imm(dst, src, imm)) }
+emit_vcfsx_v_v_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vcfsx_v_v_imm(dst, src, imm)) }
 inst_vcfux_v_v_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCFUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vcfux_v_v_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vcfux_v_v_imm(dst, src, imm)) }
+emit_vcfux_v_v_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vcfux_v_v_imm(dst, src, imm)) }
 inst_vctsxs_v_v_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCTSXS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vctsxs_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vctsxs_v_v_imm(dst, src, imm)) }
+emit_vctsxs_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vctsxs_v_v_imm(dst, src, imm)) }
 inst_vctuxs_v_v_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCTUXS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vctuxs_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vctuxs_v_v_imm(dst, src, imm)) }
+emit_vctuxs_v_v_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vctuxs_v_v_imm(dst, src, imm)) }
 inst_lvx_v_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LVX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lvx_v_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lvx_v_mem(dst, addr)) }
+emit_lvx_v_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lvx_v_mem(dst, addr)) }
 inst_lvxl_v_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LVXL, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lvxl_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lvxl_v_mem(dst, addr)) }
+emit_lvxl_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lvxl_v_mem(dst, addr)) }
 inst_lvebx_v_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LVEBX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lvebx_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lvebx_v_mem(dst, addr)) }
+emit_lvebx_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lvebx_v_mem(dst, addr)) }
 inst_lvehx_v_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LVEHX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lvehx_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lvehx_v_mem(dst, addr)) }
+emit_lvehx_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lvehx_v_mem(dst, addr)) }
 inst_lvewx_v_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LVEWX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lvewx_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lvewx_v_mem(dst, addr)) }
+emit_lvewx_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lvewx_v_mem(dst, addr)) }
 inst_lvsl_v_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LVSL, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lvsl_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lvsl_v_mem(dst, addr)) }
+emit_lvsl_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lvsl_v_mem(dst, addr)) }
 inst_lvsr_v_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LVSR, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lvsr_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lvsr_v_mem(dst, addr)) }
+emit_lvsr_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lvsr_v_mem(dst, addr)) }
 inst_stvx_v_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STVX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stvx_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stvx_v_mem(dst, addr)) }
+emit_stvx_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stvx_v_mem(dst, addr)) }
 inst_stvxl_v_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STVXL, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stvxl_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stvxl_v_mem(dst, addr)) }
+emit_stvxl_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stvxl_v_mem(dst, addr)) }
 inst_stvebx_v_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STVEBX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stvebx_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stvebx_v_mem(dst, addr)) }
+emit_stvebx_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stvebx_v_mem(dst, addr)) }
 inst_stvehx_v_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STVEHX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stvehx_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stvehx_v_mem(dst, addr)) }
+emit_stvehx_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stvehx_v_mem(dst, addr)) }
 inst_stvewx_v_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STVEWX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stvewx_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stvewx_v_mem(dst, addr)) }
+emit_stvewx_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stvewx_v_mem(dst, addr)) }
 inst_mfvscr_v                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFVSCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfvscr_v                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfvscr_v(dst)) }
+emit_mfvscr_v                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfvscr_v(dst)) }
 inst_mtvscr_v                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTVSCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtvscr_v                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtvscr_v(dst)) }
+emit_mtvscr_v                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtvscr_v(dst)) }
 inst_vabsdub_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VABSDUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vabsdub_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vabsdub_v_v_v(dst, src, src2)) }
+emit_vabsdub_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vabsdub_v_v_v(dst, src, src2)) }
 inst_vabsduh_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VABSDUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vabsduh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vabsduh_v_v_v(dst, src, src2)) }
+emit_vabsduh_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vabsduh_v_v_v(dst, src, src2)) }
 inst_vabsduw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VABSDUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vabsduw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vabsduw_v_v_v(dst, src, src2)) }
+emit_vabsduw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vabsduw_v_v_v(dst, src, src2)) }
 inst_vextsb2w_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTSB2W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextsb2w_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextsb2w_v_v(dst, src)) }
+emit_vextsb2w_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextsb2w_v_v(dst, src)) }
 inst_vextsh2w_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTSH2W, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextsh2w_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextsh2w_v_v(dst, src)) }
+emit_vextsh2w_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextsh2w_v_v(dst, src)) }
 inst_vextsb2d_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTSB2D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextsb2d_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextsb2d_v_v(dst, src)) }
+emit_vextsb2d_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextsb2d_v_v(dst, src)) }
 inst_vextsh2d_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTSH2D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextsh2d_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextsh2d_v_v(dst, src)) }
+emit_vextsh2d_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextsh2d_v_v(dst, src)) }
 inst_vextsw2d_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTSW2D, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextsw2d_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextsw2d_v_v(dst, src)) }
+emit_vextsw2d_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextsw2d_v_v(dst, src)) }
 inst_vprtybw_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPRTYBW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vprtybw_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vprtybw_v_v(dst, src)) }
+emit_vprtybw_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vprtybw_v_v(dst, src)) }
 inst_vprtybd_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPRTYBD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vprtybd_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vprtybd_v_v(dst, src)) }
+emit_vprtybd_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vprtybd_v_v(dst, src)) }
 inst_vprtybq_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPRTYBQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vprtybq_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vprtybq_v_v(dst, src)) }
+emit_vprtybq_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vprtybq_v_v(dst, src)) }
 inst_vrlwnm_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLWNM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlwnm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlwnm_v_v_v(dst, src, src2)) }
+emit_vrlwnm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlwnm_v_v_v(dst, src, src2)) }
 inst_vrldnm_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLDNM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrldnm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrldnm_v_v_v(dst, src, src2)) }
+emit_vrldnm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrldnm_v_v_v(dst, src, src2)) }
 inst_vrlwmi_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLWMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlwmi_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlwmi_v_v_v(dst, src, src2)) }
+emit_vrlwmi_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlwmi_v_v_v(dst, src, src2)) }
 inst_vrldmi_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLDMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrldmi_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrldmi_v_v_v(dst, src, src2)) }
+emit_vrldmi_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrldmi_v_v_v(dst, src, src2)) }
 inst_vcmpnezb_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEZB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpnezb_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpnezb_v_v_v(dst, src, src2)) }
+emit_vcmpnezb_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpnezb_v_v_v(dst, src, src2)) }
 inst_vcmpnezb_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEZB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpnezb_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpnezb_dot_v_v_v(dst, src, src2)) }
+emit_vcmpnezb_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpnezb_dot_v_v_v(dst, src, src2)) }
 inst_vcmpnezh_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEZH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpnezh_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpnezh_v_v_v(dst, src, src2)) }
+emit_vcmpnezh_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpnezh_v_v_v(dst, src, src2)) }
 inst_vcmpnezh_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEZH_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpnezh_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpnezh_dot_v_v_v(dst, src, src2)) }
+emit_vcmpnezh_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpnezh_dot_v_v_v(dst, src, src2)) }
 inst_vcmpnezw_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEZW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpnezw_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpnezw_v_v_v(dst, src, src2)) }
+emit_vcmpnezw_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpnezw_v_v_v(dst, src, src2)) }
 inst_vcmpnezw_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPNEZW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpnezw_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpnezw_dot_v_v_v(dst, src, src2)) }
+emit_vcmpnezw_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpnezw_dot_v_v_v(dst, src, src2)) }
 inst_vclzb_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCLZB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vclzb_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vclzb_v_v(dst, src)) }
+emit_vclzb_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vclzb_v_v(dst, src)) }
 inst_vclzh_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCLZH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vclzh_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vclzh_v_v(dst, src)) }
+emit_vclzh_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vclzh_v_v(dst, src)) }
 inst_vclzw_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCLZW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vclzw_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vclzw_v_v(dst, src)) }
+emit_vclzw_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vclzw_v_v(dst, src)) }
 inst_vclzd_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCLZD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vclzd_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vclzd_v_v(dst, src)) }
+emit_vclzd_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vclzd_v_v(dst, src)) }
 inst_vctzb_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCTZB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vctzb_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vctzb_v_v(dst, src)) }
+emit_vctzb_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vctzb_v_v(dst, src)) }
 inst_vctzh_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCTZH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vctzh_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vctzh_v_v(dst, src)) }
+emit_vctzh_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vctzh_v_v(dst, src)) }
 inst_vctzw_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCTZW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vctzw_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vctzw_v_v(dst, src)) }
+emit_vctzw_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vctzw_v_v(dst, src)) }
 inst_vctzd_v_v                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCTZD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vctzd_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vctzd_v_v(dst, src)) }
+emit_vctzd_v_v                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vctzd_v_v(dst, src)) }
 inst_vpopcntb_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPOPCNTB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vpopcntb_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vpopcntb_v_v(dst, src)) }
+emit_vpopcntb_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vpopcntb_v_v(dst, src)) }
 inst_vpopcnth_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPOPCNTH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vpopcnth_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vpopcnth_v_v(dst, src)) }
+emit_vpopcnth_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vpopcnth_v_v(dst, src)) }
 inst_vpopcntw_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPOPCNTW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vpopcntw_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vpopcntw_v_v(dst, src)) }
+emit_vpopcntw_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vpopcntw_v_v(dst, src)) }
 inst_vpopcntd_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VPOPCNTD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vpopcntd_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vpopcntd_v_v(dst, src)) }
+emit_vpopcntd_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vpopcntd_v_v(dst, src)) }
 inst_vextractub_v_v_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VEXTRACTUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vextractub_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vextractub_v_v_imm(dst, src, imm)) }
+emit_vextractub_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vextractub_v_v_imm(dst, src, imm)) }
 inst_vextractuh_v_v_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VEXTRACTUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vextractuh_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vextractuh_v_v_imm(dst, src, imm)) }
+emit_vextractuh_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vextractuh_v_v_imm(dst, src, imm)) }
 inst_vextractuw_v_v_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VEXTRACTUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vextractuw_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vextractuw_v_v_imm(dst, src, imm)) }
+emit_vextractuw_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vextractuw_v_v_imm(dst, src, imm)) }
 inst_vextractd_v_v_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VEXTRACTD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vextractd_v_v_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vextractd_v_v_imm(dst, src, imm)) }
+emit_vextractd_v_v_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vextractd_v_v_imm(dst, src, imm)) }
 inst_vinsertb_v_v_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VINSERTB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vinsertb_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vinsertb_v_v_imm(dst, src, imm)) }
+emit_vinsertb_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vinsertb_v_v_imm(dst, src, imm)) }
 inst_vinserth_v_v_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VINSERTH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vinserth_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vinserth_v_v_imm(dst, src, imm)) }
+emit_vinserth_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vinserth_v_v_imm(dst, src, imm)) }
 inst_vinsertw_v_v_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VINSERTW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vinsertw_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vinsertw_v_v_imm(dst, src, imm)) }
+emit_vinsertw_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vinsertw_v_v_imm(dst, src, imm)) }
 inst_vinsertd_v_v_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VINSERTD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vinsertd_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vinsertd_v_v_imm(dst, src, imm)) }
+emit_vinsertd_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vinsertd_v_v_imm(dst, src, imm)) }
 inst_vslv_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSLV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vslv_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vslv_v_v_v(dst, src, src2)) }
+emit_vslv_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vslv_v_v_v(dst, src, src2)) }
 inst_vsrv_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrv_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrv_v_v_v(dst, src, src2)) }
+emit_vsrv_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrv_v_v_v(dst, src, src2)) }
 inst_vmul10uq_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMUL10UQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmul10uq_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmul10uq_v_v(dst, src)) }
+emit_vmul10uq_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmul10uq_v_v(dst, src)) }
 inst_vmul10cuq_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VMUL10CUQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vmul10cuq_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vmul10cuq_v_v(dst, src)) }
+emit_vmul10cuq_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vmul10cuq_v_v(dst, src)) }
 inst_vmul10euq_v_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMUL10EUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmul10euq_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmul10euq_v_v_v(dst, src, src2)) }
+emit_vmul10euq_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmul10euq_v_v_v(dst, src, src2)) }
 inst_vmul10ecuq_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMUL10ECUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmul10ecuq_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmul10ecuq_v_v_v(dst, src, src2)) }
+emit_vmul10ecuq_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmul10ecuq_v_v_v(dst, src, src2)) }
 inst_lxsdx_vs_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXSDX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxsdx_vs_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxsdx_vs_mem(dst, addr)) }
+emit_lxsdx_vs_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxsdx_vs_mem(dst, addr)) }
 inst_lxsiwax_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXSIWAX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxsiwax_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxsiwax_vs_mem(dst, addr)) }
+emit_lxsiwax_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxsiwax_vs_mem(dst, addr)) }
 inst_lxsiwzx_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXSIWZX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxsiwzx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxsiwzx_vs_mem(dst, addr)) }
+emit_lxsiwzx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxsiwzx_vs_mem(dst, addr)) }
 inst_lxvd2x_vs_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXVD2X, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxvd2x_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxvd2x_vs_mem(dst, addr)) }
+emit_lxvd2x_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxvd2x_vs_mem(dst, addr)) }
 inst_lxvdsx_vs_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXVDSX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxvdsx_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxvdsx_vs_mem(dst, addr)) }
+emit_lxvdsx_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxvdsx_vs_mem(dst, addr)) }
 inst_lxvw4x_vs_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXVW4X, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxvw4x_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxvw4x_vs_mem(dst, addr)) }
+emit_lxvw4x_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxvw4x_vs_mem(dst, addr)) }
 inst_stxsdx_vs_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXSDX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxsdx_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxsdx_vs_mem(dst, addr)) }
+emit_stxsdx_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxsdx_vs_mem(dst, addr)) }
 inst_stxsiwx_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXSIWX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxsiwx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxsiwx_vs_mem(dst, addr)) }
+emit_stxsiwx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxsiwx_vs_mem(dst, addr)) }
 inst_stxvd2x_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXVD2X, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxvd2x_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxvd2x_vs_mem(dst, addr)) }
+emit_stxvd2x_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxvd2x_vs_mem(dst, addr)) }
 inst_stxvw4x_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXVW4X, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxvw4x_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxvw4x_vs_mem(dst, addr)) }
+emit_stxvw4x_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxvw4x_vs_mem(dst, addr)) }
 inst_lxsspx_vs_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXSSPX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxsspx_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxsspx_vs_mem(dst, addr)) }
+emit_lxsspx_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxsspx_vs_mem(dst, addr)) }
 inst_stxsspx_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXSSPX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxsspx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxsspx_vs_mem(dst, addr)) }
+emit_stxsspx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxsspx_vs_mem(dst, addr)) }
 inst_lxv_vs_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxv_vs_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxv_vs_mem(dst, addr)) }
+emit_lxv_vs_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxv_vs_mem(dst, addr)) }
 inst_stxv_vs_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxv_vs_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxv_vs_mem(dst, addr)) }
+emit_stxv_vs_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxv_vs_mem(dst, addr)) }
 inst_lxvh8x_vs_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXVH8X, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxvh8x_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxvh8x_vs_mem(dst, addr)) }
+emit_lxvh8x_vs_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxvh8x_vs_mem(dst, addr)) }
 inst_lxvb16x_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXVB16X, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxvb16x_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxvb16x_vs_mem(dst, addr)) }
+emit_lxvb16x_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxvb16x_vs_mem(dst, addr)) }
 inst_lxvl_vs_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvl_vs_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvl_vs_r_r(dst, src, src2)) }
+emit_lxvl_vs_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvl_vs_r_r(dst, src, src2)) }
 inst_lxvll_vs_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVLL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvll_vs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvll_vs_r_r(dst, src, src2)) }
+emit_lxvll_vs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvll_vs_r_r(dst, src, src2)) }
 inst_stxvh8x_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXVH8X, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxvh8x_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxvh8x_vs_mem(dst, addr)) }
+emit_stxvh8x_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxvh8x_vs_mem(dst, addr)) }
 inst_stxvb16x_vs_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXVB16X, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxvb16x_vs_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxvb16x_vs_mem(dst, addr)) }
+emit_stxvb16x_vs_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxvb16x_vs_mem(dst, addr)) }
 inst_stxvl_vs_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvl_vs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvl_vs_r_r(dst, src, src2)) }
+emit_stxvl_vs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvl_vs_r_r(dst, src, src2)) }
 inst_stxvll_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVLL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvll_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvll_vs_r_r(dst, src, src2)) }
+emit_stxvll_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvll_vs_r_r(dst, src, src2)) }
 inst_lxvx_vs_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXVX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxvx_vs_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxvx_vs_mem(dst, addr)) }
+emit_lxvx_vs_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxvx_vs_mem(dst, addr)) }
 inst_stxvx_vs_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXVX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxvx_vs_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxvx_vs_mem(dst, addr)) }
+emit_stxvx_vs_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxvx_vs_mem(dst, addr)) }
 inst_lxsibzx_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXSIBZX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxsibzx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxsibzx_vs_mem(dst, addr)) }
+emit_lxsibzx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxsibzx_vs_mem(dst, addr)) }
 inst_lxsihzx_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXSIHZX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxsihzx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxsihzx_vs_mem(dst, addr)) }
+emit_lxsihzx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxsihzx_vs_mem(dst, addr)) }
 inst_stxsibx_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXSIBX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxsibx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxsibx_vs_mem(dst, addr)) }
+emit_stxsibx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxsibx_vs_mem(dst, addr)) }
 inst_stxsihx_vs_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXSIHX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxsihx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxsihx_vs_mem(dst, addr)) }
+emit_stxsihx_vs_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxsihx_vs_mem(dst, addr)) }
 inst_lxsd_v_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXSD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxsd_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxsd_v_mem(dst, addr)) }
+emit_lxsd_v_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxsd_v_mem(dst, addr)) }
 inst_stxsd_v_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXSD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxsd_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxsd_v_mem(dst, addr)) }
+emit_stxsd_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxsd_v_mem(dst, addr)) }
 inst_lxssp_v_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXSSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxssp_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxssp_v_mem(dst, addr)) }
+emit_lxssp_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxssp_v_mem(dst, addr)) }
 inst_stxssp_v_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXSSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxssp_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxssp_v_mem(dst, addr)) }
+emit_stxssp_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxssp_v_mem(dst, addr)) }
 inst_xsaddsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSADDSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsaddsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsaddsp_vs_vs_vs(dst, src, src2)) }
+emit_xsaddsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsaddsp_vs_vs_vs(dst, src, src2)) }
 inst_xsadddp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSADDDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsadddp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsadddp_vs_vs_vs(dst, src, src2)) }
+emit_xsadddp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsadddp_vs_vs_vs(dst, src, src2)) }
 inst_xssubsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSSUBSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xssubsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xssubsp_vs_vs_vs(dst, src, src2)) }
+emit_xssubsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xssubsp_vs_vs_vs(dst, src, src2)) }
 inst_xssubdp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSSUBDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xssubdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xssubdp_vs_vs_vs(dst, src, src2)) }
+emit_xssubdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xssubdp_vs_vs_vs(dst, src, src2)) }
 inst_xsmulsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMULSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmulsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmulsp_vs_vs_vs(dst, src, src2)) }
+emit_xsmulsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmulsp_vs_vs_vs(dst, src, src2)) }
 inst_xsmuldp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMULDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmuldp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmuldp_vs_vs_vs(dst, src, src2)) }
+emit_xsmuldp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmuldp_vs_vs_vs(dst, src, src2)) }
 inst_xsdivsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSDIVSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsdivsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsdivsp_vs_vs_vs(dst, src, src2)) }
+emit_xsdivsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsdivsp_vs_vs_vs(dst, src, src2)) }
 inst_xsdivdp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSDIVDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsdivdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsdivdp_vs_vs_vs(dst, src, src2)) }
+emit_xsdivdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsdivdp_vs_vs_vs(dst, src, src2)) }
 inst_xssqrtsp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSSQRTSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xssqrtsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xssqrtsp_vs_vs(dst, src)) }
+emit_xssqrtsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xssqrtsp_vs_vs(dst, src)) }
 inst_xssqrtdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSSQRTDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xssqrtdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xssqrtdp_vs_vs(dst, src)) }
+emit_xssqrtdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xssqrtdp_vs_vs(dst, src)) }
 inst_xsresp_vs_vs                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRESP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsresp_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsresp_vs_vs(dst, src)) }
+emit_xsresp_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsresp_vs_vs(dst, src)) }
 inst_xsredp_vs_vs                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSREDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsredp_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsredp_vs_vs(dst, src)) }
+emit_xsredp_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsredp_vs_vs(dst, src)) }
 inst_xsrsqrtesp_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRSQRTESP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsrsqrtesp_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsrsqrtesp_vs_vs(dst, src)) }
+emit_xsrsqrtesp_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsrsqrtesp_vs_vs(dst, src)) }
 inst_xsrsqrtedp_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRSQRTEDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsrsqrtedp_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsrsqrtedp_vs_vs(dst, src)) }
+emit_xsrsqrtedp_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsrsqrtedp_vs_vs(dst, src)) }
 inst_xsmaddasp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMADDASP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaddasp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaddasp_vs_vs_vs(dst, src, src2)) }
+emit_xsmaddasp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaddasp_vs_vs_vs(dst, src, src2)) }
 inst_xsmaddadp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMADDADP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaddadp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaddadp_vs_vs_vs(dst, src, src2)) }
+emit_xsmaddadp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaddadp_vs_vs_vs(dst, src, src2)) }
 inst_xsmaddmsp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMADDMSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaddmsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaddmsp_vs_vs_vs(dst, src, src2)) }
+emit_xsmaddmsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaddmsp_vs_vs_vs(dst, src, src2)) }
 inst_xsmaddmdp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMADDMDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaddmdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaddmdp_vs_vs_vs(dst, src, src2)) }
+emit_xsmaddmdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaddmdp_vs_vs_vs(dst, src, src2)) }
 inst_xsmsubasp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMSUBASP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmsubasp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmsubasp_vs_vs_vs(dst, src, src2)) }
+emit_xsmsubasp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmsubasp_vs_vs_vs(dst, src, src2)) }
 inst_xsmsubadp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMSUBADP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmsubadp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmsubadp_vs_vs_vs(dst, src, src2)) }
+emit_xsmsubadp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmsubadp_vs_vs_vs(dst, src, src2)) }
 inst_xsmsubmsp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMSUBMSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmsubmsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmsubmsp_vs_vs_vs(dst, src, src2)) }
+emit_xsmsubmsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmsubmsp_vs_vs_vs(dst, src, src2)) }
 inst_xsmsubmdp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMSUBMDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmsubmdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmsubmdp_vs_vs_vs(dst, src, src2)) }
+emit_xsmsubmdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmsubmdp_vs_vs_vs(dst, src, src2)) }
 inst_xsnmaddasp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMADDASP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmaddasp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmaddasp_vs_vs_vs(dst, src, src2)) }
+emit_xsnmaddasp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmaddasp_vs_vs_vs(dst, src, src2)) }
 inst_xsnmaddadp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMADDADP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmaddadp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmaddadp_vs_vs_vs(dst, src, src2)) }
+emit_xsnmaddadp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmaddadp_vs_vs_vs(dst, src, src2)) }
 inst_xsnmaddmsp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMADDMSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmaddmsp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmaddmsp_vs_vs_vs(dst, src, src2)) }
+emit_xsnmaddmsp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmaddmsp_vs_vs_vs(dst, src, src2)) }
 inst_xsnmaddmdp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMADDMDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmaddmdp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmaddmdp_vs_vs_vs(dst, src, src2)) }
+emit_xsnmaddmdp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmaddmdp_vs_vs_vs(dst, src, src2)) }
 inst_xsnmsubasp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMSUBASP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmsubasp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmsubasp_vs_vs_vs(dst, src, src2)) }
+emit_xsnmsubasp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmsubasp_vs_vs_vs(dst, src, src2)) }
 inst_xsnmsubadp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMSUBADP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmsubadp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmsubadp_vs_vs_vs(dst, src, src2)) }
+emit_xsnmsubadp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmsubadp_vs_vs_vs(dst, src, src2)) }
 inst_xsnmsubmsp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMSUBMSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmsubmsp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmsubmsp_vs_vs_vs(dst, src, src2)) }
+emit_xsnmsubmsp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmsubmsp_vs_vs_vs(dst, src, src2)) }
 inst_xsnmsubmdp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMSUBMDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmsubmdp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmsubmdp_vs_vs_vs(dst, src, src2)) }
+emit_xsnmsubmdp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmsubmdp_vs_vs_vs(dst, src, src2)) }
 inst_xsmaxdp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMAXDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaxdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaxdp_vs_vs_vs(dst, src, src2)) }
+emit_xsmaxdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaxdp_vs_vs_vs(dst, src, src2)) }
 inst_xsmindp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMINDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmindp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmindp_vs_vs_vs(dst, src, src2)) }
+emit_xsmindp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmindp_vs_vs_vs(dst, src, src2)) }
 inst_xsmaxcdp_vs_vs_vs                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMAXCDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaxcdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaxcdp_vs_vs_vs(dst, src, src2)) }
+emit_xsmaxcdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaxcdp_vs_vs_vs(dst, src, src2)) }
 inst_xsmincdp_vs_vs_vs                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMINCDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmincdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmincdp_vs_vs_vs(dst, src, src2)) }
+emit_xsmincdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmincdp_vs_vs_vs(dst, src, src2)) }
 inst_xsmaxjdp_vs_vs_vs                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMAXJDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaxjdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaxjdp_vs_vs_vs(dst, src, src2)) }
+emit_xsmaxjdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaxjdp_vs_vs_vs(dst, src, src2)) }
 inst_xsminjdp_vs_vs_vs                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMINJDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsminjdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsminjdp_vs_vs_vs(dst, src, src2)) }
+emit_xsminjdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsminjdp_vs_vs_vs(dst, src, src2)) }
 inst_xscmpodp_crf_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPODP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpodp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpodp_crf_vs_vs(dst, src, src2)) }
+emit_xscmpodp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpodp_crf_vs_vs(dst, src, src2)) }
 inst_xscmpudp_crf_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPUDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpudp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpudp_crf_vs_vs(dst, src, src2)) }
+emit_xscmpudp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpudp_crf_vs_vs(dst, src, src2)) }
 inst_xscmpeqdp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPEQDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpeqdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpeqdp_vs_vs_vs(dst, src, src2)) }
+emit_xscmpeqdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpeqdp_vs_vs_vs(dst, src, src2)) }
 inst_xscmpgtdp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPGTDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpgtdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpgtdp_vs_vs_vs(dst, src, src2)) }
+emit_xscmpgtdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpgtdp_vs_vs_vs(dst, src, src2)) }
 inst_xscmpgedp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPGEDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpgedp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpgedp_vs_vs_vs(dst, src, src2)) }
+emit_xscmpgedp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpgedp_vs_vs_vs(dst, src, src2)) }
 inst_xscpsgndp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCPSGNDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscpsgndp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscpsgndp_vs_vs_vs(dst, src, src2)) }
+emit_xscpsgndp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscpsgndp_vs_vs_vs(dst, src, src2)) }
 inst_xsabsdp_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSABSDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsabsdp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsabsdp_vs_vs(dst, src)) }
+emit_xsabsdp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsabsdp_vs_vs(dst, src)) }
 inst_xsnabsdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSNABSDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsnabsdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsnabsdp_vs_vs(dst, src)) }
+emit_xsnabsdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsnabsdp_vs_vs(dst, src)) }
 inst_xsnegdp_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSNEGDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsnegdp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsnegdp_vs_vs(dst, src)) }
+emit_xsnegdp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsnegdp_vs_vs(dst, src)) }
 inst_xscvdpsp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVDPSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvdpsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvdpsp_vs_vs(dst, src)) }
+emit_xscvdpsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvdpsp_vs_vs(dst, src)) }
 inst_xscvspdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVSPDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvspdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvspdp_vs_vs(dst, src)) }
+emit_xscvspdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvspdp_vs_vs(dst, src)) }
 inst_xscvdpsxds_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVDPSXDS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvdpsxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvdpsxds_vs_vs(dst, src)) }
+emit_xscvdpsxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvdpsxds_vs_vs(dst, src)) }
 inst_xscvdpuxds_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVDPUXDS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvdpuxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvdpuxds_vs_vs(dst, src)) }
+emit_xscvdpuxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvdpuxds_vs_vs(dst, src)) }
 inst_xscvsxddp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVSXDDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvsxddp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvsxddp_vs_vs(dst, src)) }
+emit_xscvsxddp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvsxddp_vs_vs(dst, src)) }
 inst_xscvuxddp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVUXDDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvuxddp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvuxddp_vs_vs(dst, src)) }
+emit_xscvuxddp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvuxddp_vs_vs(dst, src)) }
 inst_xscvdpsxws_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVDPSXWS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvdpsxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvdpsxws_vs_vs(dst, src)) }
+emit_xscvdpsxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvdpsxws_vs_vs(dst, src)) }
 inst_xscvdpuxws_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVDPUXWS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvdpuxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvdpuxws_vs_vs(dst, src)) }
+emit_xscvdpuxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvdpuxws_vs_vs(dst, src)) }
 inst_xscvdphp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVDPHP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvdphp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvdphp_vs_vs(dst, src)) }
+emit_xscvdphp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvdphp_vs_vs(dst, src)) }
 inst_xscvhpdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVHPDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvhpdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvhpdp_vs_vs(dst, src)) }
+emit_xscvhpdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvhpdp_vs_vs(dst, src)) }
 inst_xscvspdpn_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVSPDPN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvspdpn_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvspdpn_vs_vs(dst, src)) }
+emit_xscvspdpn_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvspdpn_vs_vs(dst, src)) }
 inst_xscvdpspn_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVDPSPN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvdpspn_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvdpspn_vs_vs(dst, src)) }
+emit_xscvdpspn_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvdpspn_vs_vs(dst, src)) }
 inst_xsrdpi_vs_vs                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRDPI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsrdpi_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsrdpi_vs_vs(dst, src)) }
+emit_xsrdpi_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsrdpi_vs_vs(dst, src)) }
 inst_xsrdpim_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRDPIM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsrdpim_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsrdpim_vs_vs(dst, src)) }
+emit_xsrdpim_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsrdpim_vs_vs(dst, src)) }
 inst_xsrdpip_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRDPIP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsrdpip_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsrdpip_vs_vs(dst, src)) }
+emit_xsrdpip_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsrdpip_vs_vs(dst, src)) }
 inst_xsrdpiz_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRDPIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsrdpiz_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsrdpiz_vs_vs(dst, src)) }
+emit_xsrdpiz_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsrdpiz_vs_vs(dst, src)) }
 inst_xsrdpic_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRDPIC, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsrdpic_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsrdpic_vs_vs(dst, src)) }
+emit_xsrdpic_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsrdpic_vs_vs(dst, src)) }
 inst_xsrsp_vs_vs                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSRSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsrsp_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsrsp_vs_vs(dst, src)) }
+emit_xsrsp_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsrsp_vs_vs(dst, src)) }
 inst_xsiexpdp_vs_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSIEXPDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsiexpdp_vs_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsiexpdp_vs_r_r(dst, src, src2)) }
+emit_xsiexpdp_vs_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsiexpdp_vs_r_r(dst, src, src2)) }
 inst_xsxexpdp_r_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSXEXPDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsxexpdp_r_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsxexpdp_r_vs(dst, src)) }
+emit_xsxexpdp_r_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsxexpdp_r_vs(dst, src)) }
 inst_xsxsigdp_r_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSXSIGDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsxsigdp_r_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsxsigdp_r_vs(dst, src)) }
+emit_xsxsigdp_r_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsxsigdp_r_vs(dst, src)) }
 inst_xvaddsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVADDSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvaddsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvaddsp_vs_vs_vs(dst, src, src2)) }
+emit_xvaddsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvaddsp_vs_vs_vs(dst, src, src2)) }
 inst_xvadddp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVADDDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvadddp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvadddp_vs_vs_vs(dst, src, src2)) }
+emit_xvadddp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvadddp_vs_vs_vs(dst, src, src2)) }
 inst_xvsubsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVSUBSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvsubsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvsubsp_vs_vs_vs(dst, src, src2)) }
+emit_xvsubsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvsubsp_vs_vs_vs(dst, src, src2)) }
 inst_xvsubdp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVSUBDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvsubdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvsubdp_vs_vs_vs(dst, src, src2)) }
+emit_xvsubdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvsubdp_vs_vs_vs(dst, src, src2)) }
 inst_xvmulsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMULSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmulsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmulsp_vs_vs_vs(dst, src, src2)) }
+emit_xvmulsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmulsp_vs_vs_vs(dst, src, src2)) }
 inst_xvmuldp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMULDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmuldp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmuldp_vs_vs_vs(dst, src, src2)) }
+emit_xvmuldp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmuldp_vs_vs_vs(dst, src, src2)) }
 inst_xvdivsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVDIVSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvdivsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvdivsp_vs_vs_vs(dst, src, src2)) }
+emit_xvdivsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvdivsp_vs_vs_vs(dst, src, src2)) }
 inst_xvdivdp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVDIVDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvdivdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvdivdp_vs_vs_vs(dst, src, src2)) }
+emit_xvdivdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvdivdp_vs_vs_vs(dst, src, src2)) }
 inst_xvsqrtsp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVSQRTSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvsqrtsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvsqrtsp_vs_vs(dst, src)) }
+emit_xvsqrtsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvsqrtsp_vs_vs(dst, src)) }
 inst_xvsqrtdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVSQRTDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvsqrtdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvsqrtdp_vs_vs(dst, src)) }
+emit_xvsqrtdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvsqrtdp_vs_vs(dst, src)) }
 inst_xvresp_vs_vs                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRESP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvresp_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvresp_vs_vs(dst, src)) }
+emit_xvresp_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvresp_vs_vs(dst, src)) }
 inst_xvredp_vs_vs                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVREDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvredp_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvredp_vs_vs(dst, src)) }
+emit_xvredp_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvredp_vs_vs(dst, src)) }
 inst_xvrsqrtesp_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRSQRTESP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrsqrtesp_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrsqrtesp_vs_vs(dst, src)) }
+emit_xvrsqrtesp_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrsqrtesp_vs_vs(dst, src)) }
 inst_xvrsqrtedp_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRSQRTEDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrsqrtedp_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrsqrtedp_vs_vs(dst, src)) }
+emit_xvrsqrtedp_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrsqrtedp_vs_vs(dst, src)) }
 inst_xvmaddasp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMADDASP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmaddasp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmaddasp_vs_vs_vs(dst, src, src2)) }
+emit_xvmaddasp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmaddasp_vs_vs_vs(dst, src, src2)) }
 inst_xvmaddadp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMADDADP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmaddadp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmaddadp_vs_vs_vs(dst, src, src2)) }
+emit_xvmaddadp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmaddadp_vs_vs_vs(dst, src, src2)) }
 inst_xvmaddmsp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMADDMSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmaddmsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmaddmsp_vs_vs_vs(dst, src, src2)) }
+emit_xvmaddmsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmaddmsp_vs_vs_vs(dst, src, src2)) }
 inst_xvmaddmdp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMADDMDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmaddmdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmaddmdp_vs_vs_vs(dst, src, src2)) }
+emit_xvmaddmdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmaddmdp_vs_vs_vs(dst, src, src2)) }
 inst_xvmsubasp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMSUBASP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmsubasp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmsubasp_vs_vs_vs(dst, src, src2)) }
+emit_xvmsubasp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmsubasp_vs_vs_vs(dst, src, src2)) }
 inst_xvmsubadp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMSUBADP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmsubadp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmsubadp_vs_vs_vs(dst, src, src2)) }
+emit_xvmsubadp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmsubadp_vs_vs_vs(dst, src, src2)) }
 inst_xvmsubmsp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMSUBMSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmsubmsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmsubmsp_vs_vs_vs(dst, src, src2)) }
+emit_xvmsubmsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmsubmsp_vs_vs_vs(dst, src, src2)) }
 inst_xvmsubmdp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMSUBMDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmsubmdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmsubmdp_vs_vs_vs(dst, src, src2)) }
+emit_xvmsubmdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmsubmdp_vs_vs_vs(dst, src, src2)) }
 inst_xvnmaddasp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVNMADDASP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvnmaddasp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvnmaddasp_vs_vs_vs(dst, src, src2)) }
+emit_xvnmaddasp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvnmaddasp_vs_vs_vs(dst, src, src2)) }
 inst_xvnmaddadp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVNMADDADP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvnmaddadp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvnmaddadp_vs_vs_vs(dst, src, src2)) }
+emit_xvnmaddadp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvnmaddadp_vs_vs_vs(dst, src, src2)) }
 inst_xvnmaddmsp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVNMADDMSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvnmaddmsp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvnmaddmsp_vs_vs_vs(dst, src, src2)) }
+emit_xvnmaddmsp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvnmaddmsp_vs_vs_vs(dst, src, src2)) }
 inst_xvnmaddmdp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVNMADDMDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvnmaddmdp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvnmaddmdp_vs_vs_vs(dst, src, src2)) }
+emit_xvnmaddmdp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvnmaddmdp_vs_vs_vs(dst, src, src2)) }
 inst_xvnmsubasp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVNMSUBASP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvnmsubasp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvnmsubasp_vs_vs_vs(dst, src, src2)) }
+emit_xvnmsubasp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvnmsubasp_vs_vs_vs(dst, src, src2)) }
 inst_xvnmsubadp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVNMSUBADP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvnmsubadp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvnmsubadp_vs_vs_vs(dst, src, src2)) }
+emit_xvnmsubadp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvnmsubadp_vs_vs_vs(dst, src, src2)) }
 inst_xvnmsubmsp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVNMSUBMSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvnmsubmsp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvnmsubmsp_vs_vs_vs(dst, src, src2)) }
+emit_xvnmsubmsp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvnmsubmsp_vs_vs_vs(dst, src, src2)) }
 inst_xvnmsubmdp_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVNMSUBMDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvnmsubmdp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvnmsubmdp_vs_vs_vs(dst, src, src2)) }
+emit_xvnmsubmdp_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvnmsubmdp_vs_vs_vs(dst, src, src2)) }
 inst_xvmaxsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMAXSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmaxsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmaxsp_vs_vs_vs(dst, src, src2)) }
+emit_xvmaxsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmaxsp_vs_vs_vs(dst, src, src2)) }
 inst_xvmaxdp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMAXDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmaxdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmaxdp_vs_vs_vs(dst, src, src2)) }
+emit_xvmaxdp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmaxdp_vs_vs_vs(dst, src, src2)) }
 inst_xvminsp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMINSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvminsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvminsp_vs_vs_vs(dst, src, src2)) }
+emit_xvminsp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvminsp_vs_vs_vs(dst, src, src2)) }
 inst_xvmindp_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVMINDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvmindp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvmindp_vs_vs_vs(dst, src, src2)) }
+emit_xvmindp_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvmindp_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpeqsp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPEQSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpeqsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpeqsp_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpeqsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpeqsp_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpeqsp_dot_vs_vs_vs              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPEQSP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpeqsp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpeqsp_dot_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpeqsp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpeqsp_dot_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpeqdp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPEQDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpeqdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpeqdp_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpeqdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpeqdp_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpeqdp_dot_vs_vs_vs              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPEQDP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpeqdp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpeqdp_dot_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpeqdp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpeqdp_dot_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpgtsp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPGTSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpgtsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpgtsp_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpgtsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpgtsp_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpgtsp_dot_vs_vs_vs              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPGTSP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpgtsp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpgtsp_dot_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpgtsp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpgtsp_dot_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpgtdp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPGTDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpgtdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpgtdp_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpgtdp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpgtdp_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpgtdp_dot_vs_vs_vs              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPGTDP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpgtdp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpgtdp_dot_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpgtdp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpgtdp_dot_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpgesp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPGESP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpgesp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpgesp_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpgesp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpgesp_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpgesp_dot_vs_vs_vs              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPGESP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpgesp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpgesp_dot_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpgesp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpgesp_dot_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpgedp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPGEDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpgedp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpgedp_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpgedp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpgedp_vs_vs_vs(dst, src, src2)) }
 inst_xvcmpgedp_dot_vs_vs_vs              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCMPGEDP_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcmpgedp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcmpgedp_dot_vs_vs_vs(dst, src, src2)) }
+emit_xvcmpgedp_dot_vs_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcmpgedp_dot_vs_vs_vs(dst, src, src2)) }
 inst_xvcpsgnsp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCPSGNSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcpsgnsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcpsgnsp_vs_vs_vs(dst, src, src2)) }
+emit_xvcpsgnsp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcpsgnsp_vs_vs_vs(dst, src, src2)) }
 inst_xvcpsgndp_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVCPSGNDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvcpsgndp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvcpsgndp_vs_vs_vs(dst, src, src2)) }
+emit_xvcpsgndp_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvcpsgndp_vs_vs_vs(dst, src, src2)) }
 inst_xvabssp_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVABSSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvabssp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvabssp_vs_vs(dst, src)) }
+emit_xvabssp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvabssp_vs_vs(dst, src)) }
 inst_xvabsdp_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVABSDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvabsdp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvabsdp_vs_vs(dst, src)) }
+emit_xvabsdp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvabsdp_vs_vs(dst, src)) }
 inst_xvnabssp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVNABSSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvnabssp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvnabssp_vs_vs(dst, src)) }
+emit_xvnabssp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvnabssp_vs_vs(dst, src)) }
 inst_xvnabsdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVNABSDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvnabsdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvnabsdp_vs_vs(dst, src)) }
+emit_xvnabsdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvnabsdp_vs_vs(dst, src)) }
 inst_xvnegsp_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVNEGSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvnegsp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvnegsp_vs_vs(dst, src)) }
+emit_xvnegsp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvnegsp_vs_vs(dst, src)) }
 inst_xvnegdp_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVNEGDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvnegdp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvnegdp_vs_vs(dst, src)) }
+emit_xvnegdp_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvnegdp_vs_vs(dst, src)) }
 inst_xvcvspdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSPDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvspdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvspdp_vs_vs(dst, src)) }
+emit_xvcvspdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvspdp_vs_vs(dst, src)) }
 inst_xvcvdpsp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVDPSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvdpsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvdpsp_vs_vs(dst, src)) }
+emit_xvcvdpsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvdpsp_vs_vs(dst, src)) }
 inst_xvcvspsxds_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSPSXDS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvspsxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvspsxds_vs_vs(dst, src)) }
+emit_xvcvspsxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvspsxds_vs_vs(dst, src)) }
 inst_xvcvspuxds_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSPUXDS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvspuxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvspuxds_vs_vs(dst, src)) }
+emit_xvcvspuxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvspuxds_vs_vs(dst, src)) }
 inst_xvcvdpsxds_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVDPSXDS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvdpsxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvdpsxds_vs_vs(dst, src)) }
+emit_xvcvdpsxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvdpsxds_vs_vs(dst, src)) }
 inst_xvcvdpuxds_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVDPUXDS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvdpuxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvdpuxds_vs_vs(dst, src)) }
+emit_xvcvdpuxds_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvdpuxds_vs_vs(dst, src)) }
 inst_xvcvspsxws_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSPSXWS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvspsxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvspsxws_vs_vs(dst, src)) }
+emit_xvcvspsxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvspsxws_vs_vs(dst, src)) }
 inst_xvcvspuxws_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSPUXWS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvspuxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvspuxws_vs_vs(dst, src)) }
+emit_xvcvspuxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvspuxws_vs_vs(dst, src)) }
 inst_xvcvdpsxws_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVDPSXWS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvdpsxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvdpsxws_vs_vs(dst, src)) }
+emit_xvcvdpsxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvdpsxws_vs_vs(dst, src)) }
 inst_xvcvdpuxws_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVDPUXWS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvdpuxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvdpuxws_vs_vs(dst, src)) }
+emit_xvcvdpuxws_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvdpuxws_vs_vs(dst, src)) }
 inst_xvcvsxdsp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSXDSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvsxdsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvsxdsp_vs_vs(dst, src)) }
+emit_xvcvsxdsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvsxdsp_vs_vs(dst, src)) }
 inst_xvcvuxdsp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVUXDSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvuxdsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvuxdsp_vs_vs(dst, src)) }
+emit_xvcvuxdsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvuxdsp_vs_vs(dst, src)) }
 inst_xvcvsxddp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSXDDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvsxddp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvsxddp_vs_vs(dst, src)) }
+emit_xvcvsxddp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvsxddp_vs_vs(dst, src)) }
 inst_xvcvuxddp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVUXDDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvuxddp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvuxddp_vs_vs(dst, src)) }
+emit_xvcvuxddp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvuxddp_vs_vs(dst, src)) }
 inst_xvcvsxwsp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSXWSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvsxwsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvsxwsp_vs_vs(dst, src)) }
+emit_xvcvsxwsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvsxwsp_vs_vs(dst, src)) }
 inst_xvcvuxwsp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVUXWSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvuxwsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvuxwsp_vs_vs(dst, src)) }
+emit_xvcvuxwsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvuxwsp_vs_vs(dst, src)) }
 inst_xvcvsxwdp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSXWDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvsxwdp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvsxwdp_vs_vs(dst, src)) }
+emit_xvcvsxwdp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvsxwdp_vs_vs(dst, src)) }
 inst_xvcvuxwdp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVUXWDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvuxwdp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvuxwdp_vs_vs(dst, src)) }
+emit_xvcvuxwdp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvuxwdp_vs_vs(dst, src)) }
 inst_xvrspi_vs_vs                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRSPI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrspi_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrspi_vs_vs(dst, src)) }
+emit_xvrspi_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrspi_vs_vs(dst, src)) }
 inst_xvrspim_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRSPIM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrspim_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrspim_vs_vs(dst, src)) }
+emit_xvrspim_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrspim_vs_vs(dst, src)) }
 inst_xvrspip_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRSPIP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrspip_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrspip_vs_vs(dst, src)) }
+emit_xvrspip_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrspip_vs_vs(dst, src)) }
 inst_xvrspiz_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRSPIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrspiz_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrspiz_vs_vs(dst, src)) }
+emit_xvrspiz_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrspiz_vs_vs(dst, src)) }
 inst_xvrspic_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRSPIC, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrspic_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrspic_vs_vs(dst, src)) }
+emit_xvrspic_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrspic_vs_vs(dst, src)) }
 inst_xvrdpi_vs_vs                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRDPI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrdpi_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrdpi_vs_vs(dst, src)) }
+emit_xvrdpi_vs_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrdpi_vs_vs(dst, src)) }
 inst_xvrdpim_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRDPIM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrdpim_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrdpim_vs_vs(dst, src)) }
+emit_xvrdpim_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrdpim_vs_vs(dst, src)) }
 inst_xvrdpip_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRDPIP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrdpip_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrdpip_vs_vs(dst, src)) }
+emit_xvrdpip_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrdpip_vs_vs(dst, src)) }
 inst_xvrdpiz_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRDPIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrdpiz_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrdpiz_vs_vs(dst, src)) }
+emit_xvrdpiz_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrdpiz_vs_vs(dst, src)) }
 inst_xvrdpic_vs_vs                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVRDPIC, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvrdpic_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvrdpic_vs_vs(dst, src)) }
+emit_xvrdpic_vs_vs                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvrdpic_vs_vs(dst, src)) }
 inst_xviexpsp_vs_vs_vs                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVIEXPSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xviexpsp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xviexpsp_vs_vs_vs(dst, src, src2)) }
+emit_xviexpsp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xviexpsp_vs_vs_vs(dst, src, src2)) }
 inst_xviexpdp_vs_vs_vs                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVIEXPDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xviexpdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xviexpdp_vs_vs_vs(dst, src, src2)) }
+emit_xviexpdp_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xviexpdp_vs_vs_vs(dst, src, src2)) }
 inst_xvxexpsp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVXEXPSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvxexpsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvxexpsp_vs_vs(dst, src)) }
+emit_xvxexpsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvxexpsp_vs_vs(dst, src)) }
 inst_xvxexpdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVXEXPDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvxexpdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvxexpdp_vs_vs(dst, src)) }
+emit_xvxexpdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvxexpdp_vs_vs(dst, src)) }
 inst_xvxsigsp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVXSIGSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvxsigsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvxsigsp_vs_vs(dst, src)) }
+emit_xvxsigsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvxsigsp_vs_vs(dst, src)) }
 inst_xvxsigdp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVXSIGDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvxsigdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvxsigdp_vs_vs(dst, src)) }
+emit_xvxsigdp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvxsigdp_vs_vs(dst, src)) }
 inst_xvtstdcsp_vs_vs_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XVTSTDCSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xvtstdcsp_vs_vs_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xvtstdcsp_vs_vs_imm(dst, src, imm)) }
+emit_xvtstdcsp_vs_vs_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xvtstdcsp_vs_vs_imm(dst, src, imm)) }
 inst_xvtstdcdp_vs_vs_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XVTSTDCDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xvtstdcdp_vs_vs_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xvtstdcdp_vs_vs_imm(dst, src, imm)) }
+emit_xvtstdcdp_vs_vs_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xvtstdcdp_vs_vs_imm(dst, src, imm)) }
 inst_xststdcsp_crf_vs_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XSTSTDCSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xststdcsp_crf_vs_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xststdcsp_crf_vs_imm(dst, src, imm)) }
+emit_xststdcsp_crf_vs_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xststdcsp_crf_vs_imm(dst, src, imm)) }
 inst_xststdcdp_crf_vs_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XSTSTDCDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xststdcdp_crf_vs_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xststdcdp_crf_vs_imm(dst, src, imm)) }
+emit_xststdcdp_crf_vs_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xststdcdp_crf_vs_imm(dst, src, imm)) }
 inst_xstsqrtdp_crf_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSTSQRTDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xstsqrtdp_crf_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xstsqrtdp_crf_vs(dst, src)) }
+emit_xstsqrtdp_crf_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xstsqrtdp_crf_vs(dst, src)) }
 inst_xvtsqrtsp_crf_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVTSQRTSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvtsqrtsp_crf_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvtsqrtsp_crf_vs(dst, src)) }
+emit_xvtsqrtsp_crf_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvtsqrtsp_crf_vs(dst, src)) }
 inst_xvtsqrtdp_crf_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVTSQRTDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvtsqrtdp_crf_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvtsqrtdp_crf_vs(dst, src)) }
+emit_xvtsqrtdp_crf_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvtsqrtdp_crf_vs(dst, src)) }
 inst_xstdivdp_crf_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSTDIVDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xstdivdp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xstdivdp_crf_vs_vs(dst, src, src2)) }
+emit_xstdivdp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xstdivdp_crf_vs_vs(dst, src, src2)) }
 inst_xvtdivsp_crf_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVTDIVSP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvtdivsp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvtdivsp_crf_vs_vs(dst, src, src2)) }
+emit_xvtdivsp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvtdivsp_crf_vs_vs(dst, src, src2)) }
 inst_xvtdivdp_crf_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XVTDIVDP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xvtdivdp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xvtdivdp_crf_vs_vs(dst, src, src2)) }
+emit_xvtdivdp_crf_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xvtdivdp_crf_vs_vs(dst, src, src2)) }
 inst_xxland_vs_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXLAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxland_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxland_vs_vs_vs(dst, src, src2)) }
+emit_xxland_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxland_vs_vs_vs(dst, src, src2)) }
 inst_xxlandc_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXLANDC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxlandc_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxlandc_vs_vs_vs(dst, src, src2)) }
+emit_xxlandc_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxlandc_vs_vs_vs(dst, src, src2)) }
 inst_xxlor_vs_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXLOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxlor_vs_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxlor_vs_vs_vs(dst, src, src2)) }
+emit_xxlor_vs_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxlor_vs_vs_vs(dst, src, src2)) }
 inst_xxlxor_vs_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXLXOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxlxor_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxlxor_vs_vs_vs(dst, src, src2)) }
+emit_xxlxor_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxlxor_vs_vs_vs(dst, src, src2)) }
 inst_xxlnor_vs_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXLNOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxlnor_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxlnor_vs_vs_vs(dst, src, src2)) }
+emit_xxlnor_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxlnor_vs_vs_vs(dst, src, src2)) }
 inst_xxleqv_vs_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXLEQV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxleqv_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxleqv_vs_vs_vs(dst, src, src2)) }
+emit_xxleqv_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxleqv_vs_vs_vs(dst, src, src2)) }
 inst_xxlnand_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXLNAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxlnand_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxlnand_vs_vs_vs(dst, src, src2)) }
+emit_xxlnand_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxlnand_vs_vs_vs(dst, src, src2)) }
 inst_xxlorc_vs_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXLORC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxlorc_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxlorc_vs_vs_vs(dst, src, src2)) }
+emit_xxlorc_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxlorc_vs_vs_vs(dst, src, src2)) }
 inst_xxsel_vs_vs_vs_vs                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .XXSEL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_xxsel_vs_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_xxsel_vs_vs_vs_vs(dst, src, src2, src3)) }
+emit_xxsel_vs_vs_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_xxsel_vs_vs_vs_vs(dst, src, src2, src3)) }
 inst_xxspltw_vs_vs_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXSPLTW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xxspltw_vs_vs_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xxspltw_vs_vs_imm(dst, src, imm)) }
+emit_xxspltw_vs_vs_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xxspltw_vs_vs_imm(dst, src, imm)) }
 inst_xxspltib_vs_uimm                    :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXSPLTIB, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_xxspltib_vs_uimm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_xxspltib_vs_uimm(dst, imm)) }
+emit_xxspltib_vs_uimm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_xxspltib_vs_uimm(dst, imm)) }
 inst_xxsldwi_vs_vs_vs_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXSLDWI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_xxsldwi_vs_vs_vs_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_xxsldwi_vs_vs_vs_imm(dst, src, src2, imm)) }
+emit_xxsldwi_vs_vs_vs_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_xxsldwi_vs_vs_vs_imm(dst, src, src2, imm)) }
 inst_xxpermdi_vs_vs_vs_imm               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXPERMDI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_xxpermdi_vs_vs_vs_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_xxpermdi_vs_vs_vs_imm(dst, src, src2, imm)) }
+emit_xxpermdi_vs_vs_vs_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_xxpermdi_vs_vs_vs_imm(dst, src, src2, imm)) }
 inst_xxmrghw_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXMRGHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxmrghw_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxmrghw_vs_vs_vs(dst, src, src2)) }
+emit_xxmrghw_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxmrghw_vs_vs_vs(dst, src, src2)) }
 inst_xxmrglw_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXMRGLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxmrglw_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxmrglw_vs_vs_vs(dst, src, src2)) }
+emit_xxmrglw_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxmrglw_vs_vs_vs(dst, src, src2)) }
 inst_xxextractuw_vs_vs_imm               :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXEXTRACTUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xxextractuw_vs_vs_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xxextractuw_vs_vs_imm(dst, src, imm)) }
+emit_xxextractuw_vs_vs_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xxextractuw_vs_vs_imm(dst, src, imm)) }
 inst_xxinsertw_vs_vs_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXINSERTW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xxinsertw_vs_vs_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xxinsertw_vs_vs_imm(dst, src, imm)) }
+emit_xxinsertw_vs_vs_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xxinsertw_vs_vs_imm(dst, src, imm)) }
 inst_xxspltiw_vs_simm                    :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXSPLTIW, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_xxspltiw_vs_simm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_xxspltiw_vs_simm(dst, imm)) }
+emit_xxspltiw_vs_simm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_xxspltiw_vs_simm(dst, imm)) }
 inst_xxspltidp_vs_simm                   :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXSPLTIDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_xxspltidp_vs_simm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_xxspltidp_vs_simm(dst, imm)) }
+emit_xxspltidp_vs_simm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_xxspltidp_vs_simm(dst, imm)) }
 inst_xxsplti32dx_vs_simm                 :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXSPLTI32DX, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_xxsplti32dx_vs_simm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_xxsplti32dx_vs_simm(dst, imm)) }
+emit_xxsplti32dx_vs_simm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_xxsplti32dx_vs_simm(dst, imm)) }
 inst_xscmpeqqp_crf_v_v                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPEQQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpeqqp_crf_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpeqqp_crf_v_v(dst, src, src2)) }
+emit_xscmpeqqp_crf_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpeqqp_crf_v_v(dst, src, src2)) }
 inst_xscmpgtqp_crf_v_v                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPGTQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpgtqp_crf_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpgtqp_crf_v_v(dst, src, src2)) }
+emit_xscmpgtqp_crf_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpgtqp_crf_v_v(dst, src, src2)) }
 inst_xscmpgeqp_crf_v_v                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPGEQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpgeqp_crf_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpgeqp_crf_v_v(dst, src, src2)) }
+emit_xscmpgeqp_crf_v_v                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpgeqp_crf_v_v(dst, src, src2)) }
 inst_xsaddqp_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSADDQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsaddqp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsaddqp_v_v_v(dst, src, src2)) }
+emit_xsaddqp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsaddqp_v_v_v(dst, src, src2)) }
 inst_xsaddqpo_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSADDQPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsaddqpo_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsaddqpo_v_v_v(dst, src, src2)) }
+emit_xsaddqpo_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsaddqpo_v_v_v(dst, src, src2)) }
 inst_xssubqp_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSSUBQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xssubqp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xssubqp_v_v_v(dst, src, src2)) }
+emit_xssubqp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xssubqp_v_v_v(dst, src, src2)) }
 inst_xssubqpo_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSSUBQPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xssubqpo_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xssubqpo_v_v_v(dst, src, src2)) }
+emit_xssubqpo_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xssubqpo_v_v_v(dst, src, src2)) }
 inst_xsmulqp_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMULQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmulqp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmulqp_v_v_v(dst, src, src2)) }
+emit_xsmulqp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmulqp_v_v_v(dst, src, src2)) }
 inst_xsmulqpo_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMULQPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmulqpo_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmulqpo_v_v_v(dst, src, src2)) }
+emit_xsmulqpo_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmulqpo_v_v_v(dst, src, src2)) }
 inst_xsdivqp_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSDIVQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsdivqp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsdivqp_v_v_v(dst, src, src2)) }
+emit_xsdivqp_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsdivqp_v_v_v(dst, src, src2)) }
 inst_xsdivqpo_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSDIVQPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsdivqpo_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsdivqpo_v_v_v(dst, src, src2)) }
+emit_xsdivqpo_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsdivqpo_v_v_v(dst, src, src2)) }
 inst_xssqrtqp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSSQRTQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xssqrtqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xssqrtqp_v_v(dst, src)) }
+emit_xssqrtqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xssqrtqp_v_v(dst, src)) }
 inst_xssqrtqpo_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSSQRTQPO, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xssqrtqpo_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xssqrtqpo_v_v(dst, src)) }
+emit_xssqrtqpo_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xssqrtqpo_v_v(dst, src)) }
 inst_xsmaddqp_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMADDQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaddqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaddqp_v_v_v(dst, src, src2)) }
+emit_xsmaddqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaddqp_v_v_v(dst, src, src2)) }
 inst_xsmaddqpo_v_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMADDQPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaddqpo_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaddqpo_v_v_v(dst, src, src2)) }
+emit_xsmaddqpo_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaddqpo_v_v_v(dst, src, src2)) }
 inst_xsmsubqp_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMSUBQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmsubqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmsubqp_v_v_v(dst, src, src2)) }
+emit_xsmsubqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmsubqp_v_v_v(dst, src, src2)) }
 inst_xsmsubqpo_v_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMSUBQPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmsubqpo_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmsubqpo_v_v_v(dst, src, src2)) }
+emit_xsmsubqpo_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmsubqpo_v_v_v(dst, src, src2)) }
 inst_xsnmaddqp_v_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMADDQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmaddqp_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmaddqp_v_v_v(dst, src, src2)) }
+emit_xsnmaddqp_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmaddqp_v_v_v(dst, src, src2)) }
 inst_xsnmaddqpo_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMADDQPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmaddqpo_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmaddqpo_v_v_v(dst, src, src2)) }
+emit_xsnmaddqpo_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmaddqpo_v_v_v(dst, src, src2)) }
 inst_xsnmsubqp_v_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMSUBQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmsubqp_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmsubqp_v_v_v(dst, src, src2)) }
+emit_xsnmsubqp_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmsubqp_v_v_v(dst, src, src2)) }
 inst_xsnmsubqpo_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSNMSUBQPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsnmsubqpo_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsnmsubqpo_v_v_v(dst, src, src2)) }
+emit_xsnmsubqpo_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsnmsubqpo_v_v_v(dst, src, src2)) }
 inst_xsabsqp_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSABSQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsabsqp_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsabsqp_v_v(dst, src)) }
+emit_xsabsqp_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsabsqp_v_v(dst, src)) }
 inst_xsnabsqp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSNABSQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsnabsqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsnabsqp_v_v(dst, src)) }
+emit_xsnabsqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsnabsqp_v_v(dst, src)) }
 inst_xsnegqp_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSNEGQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsnegqp_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsnegqp_v_v(dst, src)) }
+emit_xsnegqp_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsnegqp_v_v(dst, src)) }
 inst_xscpsgnqp_v_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCPSGNQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscpsgnqp_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscpsgnqp_v_v_v(dst, src, src2)) }
+emit_xscpsgnqp_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscpsgnqp_v_v_v(dst, src, src2)) }
 inst_xscmpoqp_crf_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPOQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpoqp_crf_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpoqp_crf_v_v(dst, src, src2)) }
+emit_xscmpoqp_crf_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpoqp_crf_v_v(dst, src, src2)) }
 inst_xscmpuqp_crf_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSCMPUQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xscmpuqp_crf_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xscmpuqp_crf_v_v(dst, src, src2)) }
+emit_xscmpuqp_crf_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xscmpuqp_crf_v_v(dst, src, src2)) }
 inst_xststdcqp_crf_v_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XSTSTDCQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xststdcqp_crf_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xststdcqp_crf_v_imm(dst, src, imm)) }
+emit_xststdcqp_crf_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xststdcqp_crf_v_imm(dst, src, imm)) }
 inst_xsrqpi_imm_v_v_imm                  :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .XSRQPI, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_xsrqpi_imm_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_xsrqpi_imm_v_v_imm(imm, dst, src, imm2)) }
+emit_xsrqpi_imm_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_xsrqpi_imm_v_v_imm(imm, dst, src, imm2)) }
 inst_xsrqpix_imm_v_v_imm                 :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .XSRQPIX, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_xsrqpix_imm_v_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_xsrqpix_imm_v_v_imm(imm, dst, src, imm2)) }
+emit_xsrqpix_imm_v_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_xsrqpix_imm_v_v_imm(imm, dst, src, imm2)) }
 inst_xsrqpxp_imm_v_v_imm                 :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .XSRQPXP, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_xsrqpxp_imm_v_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_xsrqpxp_imm_v_v_imm(imm, dst, src, imm2)) }
+emit_xsrqpxp_imm_v_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_xsrqpxp_imm_v_v_imm(imm, dst, src, imm2)) }
 inst_xsxexpqp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSXEXPQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsxexpqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsxexpqp_v_v(dst, src)) }
+emit_xsxexpqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsxexpqp_v_v(dst, src)) }
 inst_xsxsigqp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSXSIGQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xsxsigqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xsxsigqp_v_v(dst, src)) }
+emit_xsxsigqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xsxsigqp_v_v(dst, src)) }
 inst_xsiexpqp_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSIEXPQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsiexpqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsiexpqp_v_v_v(dst, src, src2)) }
+emit_xsiexpqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsiexpqp_v_v_v(dst, src, src2)) }
 inst_xscvqpdp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVQPDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvqpdp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvqpdp_v_v(dst, src)) }
+emit_xscvqpdp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvqpdp_v_v(dst, src)) }
 inst_xscvqpdpo_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVQPDPO, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvqpdpo_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvqpdpo_v_v(dst, src)) }
+emit_xscvqpdpo_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvqpdpo_v_v(dst, src)) }
 inst_xscvdpqp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVDPQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvdpqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvdpqp_v_v(dst, src)) }
+emit_xscvdpqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvdpqp_v_v(dst, src)) }
 inst_xscvqpsdz_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVQPSDZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvqpsdz_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvqpsdz_v_v(dst, src)) }
+emit_xscvqpsdz_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvqpsdz_v_v(dst, src)) }
 inst_xscvqpswz_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVQPSWZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvqpswz_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvqpswz_v_v(dst, src)) }
+emit_xscvqpswz_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvqpswz_v_v(dst, src)) }
 inst_xscvqpudz_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVQPUDZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvqpudz_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvqpudz_v_v(dst, src)) }
+emit_xscvqpudz_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvqpudz_v_v(dst, src)) }
 inst_xscvqpuwz_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVQPUWZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvqpuwz_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvqpuwz_v_v(dst, src)) }
+emit_xscvqpuwz_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvqpuwz_v_v(dst, src)) }
 inst_xscvsdqp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVSDQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvsdqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvsdqp_v_v(dst, src)) }
+emit_xscvsdqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvsdqp_v_v(dst, src)) }
 inst_xscvudqp_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVUDQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvudqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvudqp_v_v(dst, src)) }
+emit_xscvudqp_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvudqp_v_v(dst, src)) }
 inst_dadd_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dadd_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dadd_fr_fr_fr(dst, src, src2)) }
+emit_dadd_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dadd_fr_fr_fr(dst, src, src2)) }
 inst_dadd_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DADD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dadd_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dadd_dot_fr_fr_fr(dst, src, src2)) }
+emit_dadd_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dadd_dot_fr_fr_fr(dst, src, src2)) }
 inst_dsub_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dsub_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dsub_fr_fr_fr(dst, src, src2)) }
+emit_dsub_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dsub_fr_fr_fr(dst, src, src2)) }
 inst_dsub_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DSUB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dsub_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dsub_dot_fr_fr_fr(dst, src, src2)) }
+emit_dsub_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dsub_dot_fr_fr_fr(dst, src, src2)) }
 inst_dmul_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DMUL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dmul_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dmul_fr_fr_fr(dst, src, src2)) }
+emit_dmul_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dmul_fr_fr_fr(dst, src, src2)) }
 inst_dmul_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DMUL_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dmul_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dmul_dot_fr_fr_fr(dst, src, src2)) }
+emit_dmul_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dmul_dot_fr_fr_fr(dst, src, src2)) }
 inst_ddiv_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DDIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ddiv_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ddiv_fr_fr_fr(dst, src, src2)) }
+emit_ddiv_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ddiv_fr_fr_fr(dst, src, src2)) }
 inst_ddiv_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DDIV_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ddiv_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ddiv_dot_fr_fr_fr(dst, src, src2)) }
+emit_ddiv_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ddiv_dot_fr_fr_fr(dst, src, src2)) }
 inst_dcmpu_crf_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCMPU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcmpu_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcmpu_crf_fr_fr(dst, src, src2)) }
+emit_dcmpu_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcmpu_crf_fr_fr(dst, src, src2)) }
 inst_dcmpo_crf_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCMPO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcmpo_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcmpo_crf_fr_fr(dst, src, src2)) }
+emit_dcmpo_crf_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcmpo_crf_fr_fr(dst, src, src2)) }
 inst_drsp_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DRSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_drsp_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_drsp_fr_fr(dst, src)) }
+emit_drsp_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_drsp_fr_fr(dst, src)) }
 inst_drsp_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DRSP_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_drsp_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_drsp_dot_fr_fr(dst, src)) }
+emit_drsp_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_drsp_dot_fr_fr(dst, src)) }
 inst_dctdp_fr_fr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCTDP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dctdp_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dctdp_fr_fr(dst, src)) }
+emit_dctdp_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dctdp_fr_fr(dst, src)) }
 inst_dctdp_dot_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCTDP_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dctdp_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dctdp_dot_fr_fr(dst, src)) }
+emit_dctdp_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dctdp_dot_fr_fr(dst, src)) }
 inst_dxex_fr_fr                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DXEX, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dxex_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dxex_fr_fr(dst, src)) }
+emit_dxex_fr_fr                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dxex_fr_fr(dst, src)) }
 inst_dxex_dot_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DXEX_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dxex_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dxex_dot_fr_fr(dst, src)) }
+emit_dxex_dot_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dxex_dot_fr_fr(dst, src)) }
 inst_diex_fr_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIEX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_diex_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_diex_fr_fr_fr(dst, src, src2)) }
+emit_diex_fr_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_diex_fr_fr_fr(dst, src, src2)) }
 inst_diex_dot_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIEX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_diex_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_diex_dot_fr_fr_fr(dst, src, src2)) }
+emit_diex_dot_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_diex_dot_fr_fr_fr(dst, src, src2)) }
 inst_drrnd_fr_fr_fr_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DRRND, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_drrnd_fr_fr_fr_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_drrnd_fr_fr_fr_imm(dst, src, src2, imm)) }
+emit_drrnd_fr_fr_fr_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_drrnd_fr_fr_fr_imm(dst, src, src2, imm)) }
 inst_drrnd_dot_fr_fr_fr_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DRRND_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_drrnd_dot_fr_fr_fr_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_drrnd_dot_fr_fr_fr_imm(dst, src, src2, imm)) }
+emit_drrnd_dot_fr_fr_fr_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_drrnd_dot_fr_fr_fr_imm(dst, src, src2, imm)) }
 inst_drintx_imm_fr_fr_imm                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .DRINTX, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_drintx_imm_fr_fr_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_drintx_imm_fr_fr_imm(imm, dst, src, imm2)) }
+emit_drintx_imm_fr_fr_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_drintx_imm_fr_fr_imm(imm, dst, src, imm2)) }
 inst_drintx_dot_imm_fr_fr_imm            :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .DRINTX_DOT, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_drintx_dot_imm_fr_fr_imm            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_drintx_dot_imm_fr_fr_imm(imm, dst, src, imm2)) }
+emit_drintx_dot_imm_fr_fr_imm            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_drintx_dot_imm_fr_fr_imm(imm, dst, src, imm2)) }
 inst_drintn_imm_fr_fr_imm                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .DRINTN, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_drintn_imm_fr_fr_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_drintn_imm_fr_fr_imm(imm, dst, src, imm2)) }
+emit_drintn_imm_fr_fr_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_drintn_imm_fr_fr_imm(imm, dst, src, imm2)) }
 inst_drintn_dot_imm_fr_fr_imm            :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .DRINTN_DOT, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_drintn_dot_imm_fr_fr_imm            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_drintn_dot_imm_fr_fr_imm(imm, dst, src, imm2)) }
+emit_drintn_dot_imm_fr_fr_imm            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_drintn_dot_imm_fr_fr_imm(imm, dst, src, imm2)) }
 inst_dqua_fr_fr_fr_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DQUA, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_dqua_fr_fr_fr_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_dqua_fr_fr_fr_imm(dst, src, src2, imm)) }
+emit_dqua_fr_fr_fr_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_dqua_fr_fr_fr_imm(dst, src, src2, imm)) }
 inst_dqua_dot_fr_fr_fr_imm               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DQUA_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_dqua_dot_fr_fr_fr_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_dqua_dot_fr_fr_fr_imm(dst, src, src2, imm)) }
+emit_dqua_dot_fr_fr_fr_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_dqua_dot_fr_fr_fr_imm(dst, src, src2, imm)) }
 inst_dquai_imm_fr_fr_imm                 :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .DQUAI, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_dquai_imm_fr_fr_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_dquai_imm_fr_fr_imm(imm, dst, src, imm2)) }
+emit_dquai_imm_fr_fr_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_dquai_imm_fr_fr_imm(imm, dst, src, imm2)) }
 inst_dquai_dot_imm_fr_fr_imm             :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .DQUAI_DOT, operand_count = 4, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), op_imm(imm2)}} }
-emit_dquai_dot_imm_fr_fr_imm             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append(instructions, inst_dquai_dot_imm_fr_fr_imm(imm, dst, src, imm2)) }
+emit_dquai_dot_imm_fr_fr_imm             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register, imm2: i64) { append_elem(instructions, inst_dquai_dot_imm_fr_fr_imm(imm, dst, src, imm2)) }
 inst_dscli_fr_fr_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DSCLI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dscli_fr_fr_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dscli_fr_fr_imm(dst, src, imm)) }
+emit_dscli_fr_fr_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dscli_fr_fr_imm(dst, src, imm)) }
 inst_dscli_dot_fr_fr_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DSCLI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dscli_dot_fr_fr_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dscli_dot_fr_fr_imm(dst, src, imm)) }
+emit_dscli_dot_fr_fr_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dscli_dot_fr_fr_imm(dst, src, imm)) }
 inst_dscri_fr_fr_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DSCRI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dscri_fr_fr_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dscri_fr_fr_imm(dst, src, imm)) }
+emit_dscri_fr_fr_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dscri_fr_fr_imm(dst, src, imm)) }
 inst_dscri_dot_fr_fr_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DSCRI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dscri_dot_fr_fr_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dscri_dot_fr_fr_imm(dst, src, imm)) }
+emit_dscri_dot_fr_fr_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dscri_dot_fr_fr_imm(dst, src, imm)) }
 inst_dcffix_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCFFIX, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dcffix_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dcffix_fr_fr(dst, src)) }
+emit_dcffix_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dcffix_fr_fr(dst, src)) }
 inst_dcffix_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCFFIX_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dcffix_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dcffix_dot_fr_fr(dst, src)) }
+emit_dcffix_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dcffix_dot_fr_fr(dst, src)) }
 inst_dctfix_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCTFIX, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dctfix_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dctfix_fr_fr(dst, src)) }
+emit_dctfix_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dctfix_fr_fr(dst, src)) }
 inst_dctfix_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCTFIX_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dctfix_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dctfix_dot_fr_fr(dst, src)) }
+emit_dctfix_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dctfix_dot_fr_fr(dst, src)) }
 inst_dtstdc_crf_fr_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DTSTDC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dtstdc_crf_fr_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dtstdc_crf_fr_imm(dst, src, imm)) }
+emit_dtstdc_crf_fr_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dtstdc_crf_fr_imm(dst, src, imm)) }
 inst_dtstdg_crf_fr_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DTSTDG, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dtstdg_crf_fr_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dtstdg_crf_fr_imm(dst, src, imm)) }
+emit_dtstdg_crf_fr_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dtstdg_crf_fr_imm(dst, src, imm)) }
 inst_dtstex_crf_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DTSTEX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dtstex_crf_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dtstex_crf_fr_fr(dst, src, src2)) }
+emit_dtstex_crf_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dtstex_crf_fr_fr(dst, src, src2)) }
 inst_dtstsf_crf_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DTSTSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dtstsf_crf_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dtstsf_crf_fr_fr(dst, src, src2)) }
+emit_dtstsf_crf_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dtstsf_crf_fr_fr(dst, src, src2)) }
 inst_denbcd_imm_fr_fr                    :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DENBCD, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_denbcd_imm_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_denbcd_imm_fr_fr(imm, dst, src)) }
+emit_denbcd_imm_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_denbcd_imm_fr_fr(imm, dst, src)) }
 inst_denbcd_dot_imm_fr_fr                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DENBCD_DOT, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_denbcd_dot_imm_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_denbcd_dot_imm_fr_fr(imm, dst, src)) }
+emit_denbcd_dot_imm_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_denbcd_dot_imm_fr_fr(imm, dst, src)) }
 inst_ddedpd_imm_fr_fr                    :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DDEDPD, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_ddedpd_imm_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_ddedpd_imm_fr_fr(imm, dst, src)) }
+emit_ddedpd_imm_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_ddedpd_imm_fr_fr(imm, dst, src)) }
 inst_ddedpd_dot_imm_fr_fr                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DDEDPD_DOT, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_ddedpd_dot_imm_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_ddedpd_dot_imm_fr_fr(imm, dst, src)) }
+emit_ddedpd_dot_imm_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_ddedpd_dot_imm_fr_fr(imm, dst, src)) }
 inst_daddq_fr_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DADDQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_daddq_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_daddq_fr_fr_fr(dst, src, src2)) }
+emit_daddq_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_daddq_fr_fr_fr(dst, src, src2)) }
 inst_daddq_dot_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DADDQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_daddq_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_daddq_dot_fr_fr_fr(dst, src, src2)) }
+emit_daddq_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_daddq_dot_fr_fr_fr(dst, src, src2)) }
 inst_dsubq_fr_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DSUBQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dsubq_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dsubq_fr_fr_fr(dst, src, src2)) }
+emit_dsubq_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dsubq_fr_fr_fr(dst, src, src2)) }
 inst_dsubq_dot_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DSUBQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dsubq_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dsubq_dot_fr_fr_fr(dst, src, src2)) }
+emit_dsubq_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dsubq_dot_fr_fr_fr(dst, src, src2)) }
 inst_dmulq_fr_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DMULQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dmulq_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dmulq_fr_fr_fr(dst, src, src2)) }
+emit_dmulq_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dmulq_fr_fr_fr(dst, src, src2)) }
 inst_dmulq_dot_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DMULQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dmulq_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dmulq_dot_fr_fr_fr(dst, src, src2)) }
+emit_dmulq_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dmulq_dot_fr_fr_fr(dst, src, src2)) }
 inst_ddivq_fr_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DDIVQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ddivq_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ddivq_fr_fr_fr(dst, src, src2)) }
+emit_ddivq_fr_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ddivq_fr_fr_fr(dst, src, src2)) }
 inst_ddivq_dot_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DDIVQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ddivq_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ddivq_dot_fr_fr_fr(dst, src, src2)) }
+emit_ddivq_dot_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ddivq_dot_fr_fr_fr(dst, src, src2)) }
 inst_dcmpuq_crf_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCMPUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcmpuq_crf_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcmpuq_crf_fr_fr(dst, src, src2)) }
+emit_dcmpuq_crf_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcmpuq_crf_fr_fr(dst, src, src2)) }
 inst_dcmpoq_crf_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCMPOQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcmpoq_crf_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcmpoq_crf_fr_fr(dst, src, src2)) }
+emit_dcmpoq_crf_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcmpoq_crf_fr_fr(dst, src, src2)) }
 inst_dctfixq_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCTFIXQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dctfixq_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dctfixq_fr_fr(dst, src)) }
+emit_dctfixq_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dctfixq_fr_fr(dst, src)) }
 inst_dctfixq_dot_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCTFIXQ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dctfixq_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dctfixq_dot_fr_fr(dst, src)) }
+emit_dctfixq_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dctfixq_dot_fr_fr(dst, src)) }
 inst_xxmtacc_imm                         :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .XXMTACC, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_xxmtacc_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_xxmtacc_imm(imm)) }
+emit_xxmtacc_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_xxmtacc_imm(imm)) }
 inst_xxmfacc_imm                         :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .XXMFACC, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_xxmfacc_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_xxmfacc_imm(imm)) }
+emit_xxmfacc_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_xxmfacc_imm(imm)) }
 inst_xxsetaccz_imm                       :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .XXSETACCZ, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_xxsetaccz_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_xxsetaccz_imm(imm)) }
+emit_xxsetaccz_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_xxsetaccz_imm(imm)) }
 inst_xvf16ger2_imm_vs_vs                 :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF16GER2, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf16ger2_imm_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf16ger2_imm_vs_vs(imm, dst, src)) }
+emit_xvf16ger2_imm_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf16ger2_imm_vs_vs(imm, dst, src)) }
 inst_xvf16ger2pp_imm_vs_vs               :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF16GER2PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf16ger2pp_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf16ger2pp_imm_vs_vs(imm, dst, src)) }
+emit_xvf16ger2pp_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf16ger2pp_imm_vs_vs(imm, dst, src)) }
 inst_xvf16ger2pn_imm_vs_vs               :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF16GER2PN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf16ger2pn_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf16ger2pn_imm_vs_vs(imm, dst, src)) }
+emit_xvf16ger2pn_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf16ger2pn_imm_vs_vs(imm, dst, src)) }
 inst_xvf16ger2np_imm_vs_vs               :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF16GER2NP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf16ger2np_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf16ger2np_imm_vs_vs(imm, dst, src)) }
+emit_xvf16ger2np_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf16ger2np_imm_vs_vs(imm, dst, src)) }
 inst_xvf16ger2nn_imm_vs_vs               :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF16GER2NN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf16ger2nn_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf16ger2nn_imm_vs_vs(imm, dst, src)) }
+emit_xvf16ger2nn_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf16ger2nn_imm_vs_vs(imm, dst, src)) }
 inst_xvf32ger_imm_vs_vs                  :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF32GER, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf32ger_imm_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf32ger_imm_vs_vs(imm, dst, src)) }
+emit_xvf32ger_imm_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf32ger_imm_vs_vs(imm, dst, src)) }
 inst_xvf32gerpp_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF32GERPP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf32gerpp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf32gerpp_imm_vs_vs(imm, dst, src)) }
+emit_xvf32gerpp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf32gerpp_imm_vs_vs(imm, dst, src)) }
 inst_xvf32gerpn_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF32GERPN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf32gerpn_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf32gerpn_imm_vs_vs(imm, dst, src)) }
+emit_xvf32gerpn_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf32gerpn_imm_vs_vs(imm, dst, src)) }
 inst_xvf32gernp_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF32GERNP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf32gernp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf32gernp_imm_vs_vs(imm, dst, src)) }
+emit_xvf32gernp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf32gernp_imm_vs_vs(imm, dst, src)) }
 inst_xvf32gernn_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF32GERNN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf32gernn_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf32gernn_imm_vs_vs(imm, dst, src)) }
+emit_xvf32gernn_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf32gernn_imm_vs_vs(imm, dst, src)) }
 inst_xvf64ger_imm_vs_vs                  :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF64GER, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf64ger_imm_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf64ger_imm_vs_vs(imm, dst, src)) }
+emit_xvf64ger_imm_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf64ger_imm_vs_vs(imm, dst, src)) }
 inst_xvf64gerpp_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF64GERPP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf64gerpp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf64gerpp_imm_vs_vs(imm, dst, src)) }
+emit_xvf64gerpp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf64gerpp_imm_vs_vs(imm, dst, src)) }
 inst_xvf64gerpn_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF64GERPN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf64gerpn_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf64gerpn_imm_vs_vs(imm, dst, src)) }
+emit_xvf64gerpn_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf64gerpn_imm_vs_vs(imm, dst, src)) }
 inst_xvf64gernp_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF64GERNP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf64gernp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf64gernp_imm_vs_vs(imm, dst, src)) }
+emit_xvf64gernp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf64gernp_imm_vs_vs(imm, dst, src)) }
 inst_xvf64gernn_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVF64GERNN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvf64gernn_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvf64gernn_imm_vs_vs(imm, dst, src)) }
+emit_xvf64gernn_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvf64gernn_imm_vs_vs(imm, dst, src)) }
 inst_xvbf16ger2_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVBF16GER2, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvbf16ger2_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvbf16ger2_imm_vs_vs(imm, dst, src)) }
+emit_xvbf16ger2_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvbf16ger2_imm_vs_vs(imm, dst, src)) }
 inst_xvbf16ger2pp_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVBF16GER2PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvbf16ger2pp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvbf16ger2pp_imm_vs_vs(imm, dst, src)) }
+emit_xvbf16ger2pp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvbf16ger2pp_imm_vs_vs(imm, dst, src)) }
 inst_xvbf16ger2pn_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVBF16GER2PN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvbf16ger2pn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvbf16ger2pn_imm_vs_vs(imm, dst, src)) }
+emit_xvbf16ger2pn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvbf16ger2pn_imm_vs_vs(imm, dst, src)) }
 inst_xvbf16ger2np_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVBF16GER2NP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvbf16ger2np_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvbf16ger2np_imm_vs_vs(imm, dst, src)) }
+emit_xvbf16ger2np_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvbf16ger2np_imm_vs_vs(imm, dst, src)) }
 inst_xvbf16ger2nn_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVBF16GER2NN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvbf16ger2nn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvbf16ger2nn_imm_vs_vs(imm, dst, src)) }
+emit_xvbf16ger2nn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvbf16ger2nn_imm_vs_vs(imm, dst, src)) }
 inst_xvi4ger8_imm_vs_vs                  :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI4GER8, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi4ger8_imm_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi4ger8_imm_vs_vs(imm, dst, src)) }
+emit_xvi4ger8_imm_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi4ger8_imm_vs_vs(imm, dst, src)) }
 inst_xvi4ger8pp_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI4GER8PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi4ger8pp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi4ger8pp_imm_vs_vs(imm, dst, src)) }
+emit_xvi4ger8pp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi4ger8pp_imm_vs_vs(imm, dst, src)) }
 inst_xvi8ger4_imm_vs_vs                  :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI8GER4, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi8ger4_imm_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi8ger4_imm_vs_vs(imm, dst, src)) }
+emit_xvi8ger4_imm_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi8ger4_imm_vs_vs(imm, dst, src)) }
 inst_xvi8ger4pp_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI8GER4PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi8ger4pp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi8ger4pp_imm_vs_vs(imm, dst, src)) }
+emit_xvi8ger4pp_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi8ger4pp_imm_vs_vs(imm, dst, src)) }
 inst_xvi8ger4spp_imm_vs_vs               :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI8GER4SPP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi8ger4spp_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi8ger4spp_imm_vs_vs(imm, dst, src)) }
+emit_xvi8ger4spp_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi8ger4spp_imm_vs_vs(imm, dst, src)) }
 inst_xvi16ger2_imm_vs_vs                 :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI16GER2, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi16ger2_imm_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi16ger2_imm_vs_vs(imm, dst, src)) }
+emit_xvi16ger2_imm_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi16ger2_imm_vs_vs(imm, dst, src)) }
 inst_xvi16ger2pp_imm_vs_vs               :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI16GER2PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi16ger2pp_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi16ger2pp_imm_vs_vs(imm, dst, src)) }
+emit_xvi16ger2pp_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi16ger2pp_imm_vs_vs(imm, dst, src)) }
 inst_xvi16ger2s_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI16GER2S, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi16ger2s_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi16ger2s_imm_vs_vs(imm, dst, src)) }
+emit_xvi16ger2s_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi16ger2s_imm_vs_vs(imm, dst, src)) }
 inst_xvi16ger2spp_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVI16GER2SPP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_xvi16ger2spp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_xvi16ger2spp_imm_vs_vs(imm, dst, src)) }
+emit_xvi16ger2spp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_xvi16ger2spp_imm_vs_vs(imm, dst, src)) }
 inst_vstribl_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSTRIBL, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vstribl_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vstribl_v_v(dst, src)) }
+emit_vstribl_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vstribl_v_v(dst, src)) }
 inst_vstribr_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSTRIBR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vstribr_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vstribr_v_v(dst, src)) }
+emit_vstribr_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vstribr_v_v(dst, src)) }
 inst_vstribl_dot_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSTRIBL_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vstribl_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vstribl_dot_v_v(dst, src)) }
+emit_vstribl_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vstribl_dot_v_v(dst, src)) }
 inst_vstribr_dot_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSTRIBR_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vstribr_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vstribr_dot_v_v(dst, src)) }
+emit_vstribr_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vstribr_dot_v_v(dst, src)) }
 inst_vstrihl_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSTRIHL, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vstrihl_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vstrihl_v_v(dst, src)) }
+emit_vstrihl_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vstrihl_v_v(dst, src)) }
 inst_vstrihr_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSTRIHR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vstrihr_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vstrihr_v_v(dst, src)) }
+emit_vstrihr_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vstrihr_v_v(dst, src)) }
 inst_vstrihl_dot_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSTRIHL_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vstrihl_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vstrihl_dot_v_v(dst, src)) }
+emit_vstrihl_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vstrihl_dot_v_v(dst, src)) }
 inst_vstrihr_dot_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VSTRIHR_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vstrihr_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vstrihr_dot_v_v(dst, src)) }
+emit_vstrihr_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vstrihr_dot_v_v(dst, src)) }
 inst_vmsumcud_v_v_v_v                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUMCUD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsumcud_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsumcud_v_v_v_v(dst, src, src2, src3)) }
+emit_vmsumcud_v_v_v_v                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsumcud_v_v_v_v(dst, src, src2, src3)) }
 inst_vcfuged_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCFUGED, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcfuged_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcfuged_v_v_v(dst, src, src2)) }
+emit_vcfuged_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcfuged_v_v_v(dst, src, src2)) }
 inst_vpdepd_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPDEPD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpdepd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpdepd_v_v_v(dst, src, src2)) }
+emit_vpdepd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpdepd_v_v_v(dst, src, src2)) }
 inst_vpextd_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VPEXTD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vpextd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vpextd_v_v_v(dst, src, src2)) }
+emit_vpextd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vpextd_v_v_v(dst, src, src2)) }
 inst_vgnb_r_v_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VGNB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vgnb_r_v_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vgnb_r_v_imm(dst, src, imm)) }
+emit_vgnb_r_v_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vgnb_r_v_imm(dst, src, imm)) }
 inst_vsldbi_v_v_v_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSLDBI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_vsldbi_v_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vsldbi_v_v_v_imm(dst, src, src2, imm)) }
+emit_vsldbi_v_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vsldbi_v_v_v_imm(dst, src, src2, imm)) }
 inst_vsrdbi_v_v_v_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSRDBI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_vsrdbi_v_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vsrdbi_v_v_v_imm(dst, src, src2, imm)) }
+emit_vsrdbi_v_v_v_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vsrdbi_v_v_v_imm(dst, src, src2, imm)) }
 inst_vclzdm_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCLZDM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vclzdm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vclzdm_v_v_v(dst, src, src2)) }
+emit_vclzdm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vclzdm_v_v_v(dst, src, src2)) }
 inst_vctzdm_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCTZDM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vctzdm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vctzdm_v_v_v(dst, src, src2)) }
+emit_vctzdm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vctzdm_v_v_v(dst, src, src2)) }
 inst_vclrlb_v_v_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCLRLB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vclrlb_v_v_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vclrlb_v_v_r(dst, src, src2)) }
+emit_vclrlb_v_v_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vclrlb_v_v_r(dst, src, src2)) }
 inst_vclrrb_v_v_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCLRRB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vclrrb_v_v_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vclrrb_v_v_r(dst, src, src2)) }
+emit_vclrrb_v_v_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vclrrb_v_v_r(dst, src, src2)) }
 inst_vexpandbm_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXPANDBM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vexpandbm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vexpandbm_v_v(dst, src)) }
+emit_vexpandbm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vexpandbm_v_v(dst, src)) }
 inst_vexpandhm_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXPANDHM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vexpandhm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vexpandhm_v_v(dst, src)) }
+emit_vexpandhm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vexpandhm_v_v(dst, src)) }
 inst_vexpandwm_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXPANDWM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vexpandwm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vexpandwm_v_v(dst, src)) }
+emit_vexpandwm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vexpandwm_v_v(dst, src)) }
 inst_vexpanddm_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXPANDDM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vexpanddm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vexpanddm_v_v(dst, src)) }
+emit_vexpanddm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vexpanddm_v_v(dst, src)) }
 inst_vexpandqm_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXPANDQM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vexpandqm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vexpandqm_v_v(dst, src)) }
+emit_vexpandqm_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vexpandqm_v_v(dst, src)) }
 inst_vextractbm_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTRACTBM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextractbm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextractbm_r_v(dst, src)) }
+emit_vextractbm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextractbm_r_v(dst, src)) }
 inst_vextracthm_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTRACTHM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextracthm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextracthm_r_v(dst, src)) }
+emit_vextracthm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextracthm_r_v(dst, src)) }
 inst_vextractwm_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTRACTWM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextractwm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextractwm_r_v(dst, src)) }
+emit_vextractwm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextractwm_r_v(dst, src)) }
 inst_vextractdm_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTRACTDM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextractdm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextractdm_r_v(dst, src)) }
+emit_vextractdm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextractdm_r_v(dst, src)) }
 inst_vextractqm_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTRACTQM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextractqm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextractqm_r_v(dst, src)) }
+emit_vextractqm_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextractqm_r_v(dst, src)) }
 inst_vcntmbb_r_v_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCNTMBB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vcntmbb_r_v_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vcntmbb_r_v_imm(dst, src, imm)) }
+emit_vcntmbb_r_v_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vcntmbb_r_v_imm(dst, src, imm)) }
 inst_vcntmbh_r_v_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCNTMBH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vcntmbh_r_v_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vcntmbh_r_v_imm(dst, src, imm)) }
+emit_vcntmbh_r_v_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vcntmbh_r_v_imm(dst, src, imm)) }
 inst_vcntmbw_r_v_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCNTMBW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vcntmbw_r_v_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vcntmbw_r_v_imm(dst, src, imm)) }
+emit_vcntmbw_r_v_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vcntmbw_r_v_imm(dst, src, imm)) }
 inst_vcntmbd_r_v_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VCNTMBD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vcntmbd_r_v_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vcntmbd_r_v_imm(dst, src, imm)) }
+emit_vcntmbd_r_v_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vcntmbd_r_v_imm(dst, src, imm)) }
 inst_mtvsrbm_vs_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTVSRBM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtvsrbm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtvsrbm_vs_r(dst, src)) }
+emit_mtvsrbm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtvsrbm_vs_r(dst, src)) }
 inst_mtvsrhm_vs_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTVSRHM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtvsrhm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtvsrhm_vs_r(dst, src)) }
+emit_mtvsrhm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtvsrhm_vs_r(dst, src)) }
 inst_mtvsrwm_vs_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTVSRWM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtvsrwm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtvsrwm_vs_r(dst, src)) }
+emit_mtvsrwm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtvsrwm_vs_r(dst, src)) }
 inst_mtvsrdm_vs_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTVSRDM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtvsrdm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtvsrdm_vs_r(dst, src)) }
+emit_mtvsrdm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtvsrdm_vs_r(dst, src)) }
 inst_mtvsrqm_vs_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTVSRQM, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtvsrqm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtvsrqm_vs_r(dst, src)) }
+emit_mtvsrqm_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtvsrqm_vs_r(dst, src)) }
 inst_copy_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .COPY, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_copy_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_copy_r_r(dst, src)) }
+emit_copy_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_copy_r_r(dst, src)) }
 inst_paste_dot_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PASTE_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_paste_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_paste_dot_r_r(dst, src)) }
+emit_paste_dot_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_paste_dot_r_r(dst, src)) }
 inst_lbzcix_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LBZCIX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lbzcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lbzcix_r_r_r(dst, src, src2)) }
+emit_lbzcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lbzcix_r_r_r(dst, src, src2)) }
 inst_lhzcix_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LHZCIX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lhzcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lhzcix_r_r_r(dst, src, src2)) }
+emit_lhzcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lhzcix_r_r_r(dst, src, src2)) }
 inst_lwzcix_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LWZCIX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lwzcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lwzcix_r_r_r(dst, src, src2)) }
+emit_lwzcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lwzcix_r_r_r(dst, src, src2)) }
 inst_ldcix_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LDCIX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ldcix_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ldcix_r_r_r(dst, src, src2)) }
+emit_ldcix_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ldcix_r_r_r(dst, src, src2)) }
 inst_stbcix_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STBCIX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stbcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stbcix_r_r_r(dst, src, src2)) }
+emit_stbcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stbcix_r_r_r(dst, src, src2)) }
 inst_sthcix_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STHCIX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sthcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sthcix_r_r_r(dst, src, src2)) }
+emit_sthcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sthcix_r_r_r(dst, src, src2)) }
 inst_stwcix_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STWCIX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stwcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stwcix_r_r_r(dst, src, src2)) }
+emit_stwcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stwcix_r_r_r(dst, src, src2)) }
 inst_stdcix_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STDCIX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stdcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stdcix_r_r_r(dst, src, src2)) }
+emit_stdcix_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stdcix_r_r_r(dst, src, src2)) }
 inst_tbegin_dot_imm                      :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .TBEGIN_DOT, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_tbegin_dot_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_tbegin_dot_imm(imm)) }
+emit_tbegin_dot_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_tbegin_dot_imm(imm)) }
 inst_tend_dot_none                       :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TEND_DOT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tend_dot_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tend_dot_none()) }
+emit_tend_dot_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tend_dot_none()) }
 inst_tabort_dot_r                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .TABORT_DOT, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_tabort_dot_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tabort_dot_r(dst)) }
+emit_tabort_dot_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tabort_dot_r(dst)) }
 inst_tabortwc_dot_imm_r_r                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TABORTWC_DOT, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_tabortwc_dot_imm_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_tabortwc_dot_imm_r_r(imm, dst, src)) }
+emit_tabortwc_dot_imm_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_tabortwc_dot_imm_r_r(imm, dst, src)) }
 inst_tabortwci_dot_imm_r_imm             :: #force_inline proc "contextless" (imm: i64, dst: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .TABORTWCI_DOT, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_imm(imm2), {}}} }
-emit_tabortwci_dot_imm_r_imm             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, imm2: i64) { append(instructions, inst_tabortwci_dot_imm_r_imm(imm, dst, imm2)) }
+emit_tabortwci_dot_imm_r_imm             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, imm2: i64) { append_elem(instructions, inst_tabortwci_dot_imm_r_imm(imm, dst, imm2)) }
 inst_tabortdc_dot_imm_r_r                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TABORTDC_DOT, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_tabortdc_dot_imm_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_tabortdc_dot_imm_r_r(imm, dst, src)) }
+emit_tabortdc_dot_imm_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_tabortdc_dot_imm_r_r(imm, dst, src)) }
 inst_tabortdci_dot_imm_r_imm             :: #force_inline proc "contextless" (imm: i64, dst: Register, imm2: i64) -> Instruction { return Instruction{mnemonic = .TABORTDCI_DOT, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_imm(imm2), {}}} }
-emit_tabortdci_dot_imm_r_imm             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, imm2: i64) { append(instructions, inst_tabortdci_dot_imm_r_imm(imm, dst, imm2)) }
+emit_tabortdci_dot_imm_r_imm             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, imm2: i64) { append_elem(instructions, inst_tabortdci_dot_imm_r_imm(imm, dst, imm2)) }
 inst_treclaim_dot_r                      :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .TRECLAIM_DOT, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_treclaim_dot_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_treclaim_dot_r(dst)) }
+emit_treclaim_dot_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_treclaim_dot_r(dst)) }
 inst_trechkpt_dot_none                   :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TRECHKPT_DOT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_trechkpt_dot_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_trechkpt_dot_none()) }
+emit_trechkpt_dot_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_trechkpt_dot_none()) }
 inst_tsuspend_dot_none                   :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TSUSPEND_DOT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tsuspend_dot_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tsuspend_dot_none()) }
+emit_tsuspend_dot_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tsuspend_dot_none()) }
 inst_tresume_dot_none                    :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TRESUME_DOT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tresume_dot_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tresume_dot_none()) }
+emit_tresume_dot_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tresume_dot_none()) }
 inst_tcheck_crf                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .TCHECK, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_tcheck_crf                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tcheck_crf(dst)) }
+emit_tcheck_crf                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tcheck_crf(dst)) }
 inst_addg6s_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDG6S, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addg6s_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addg6s_r_r_r(dst, src, src2)) }
+emit_addg6s_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addg6s_r_r_r(dst, src, src2)) }
 inst_cbcdtd_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CBCDTD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cbcdtd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cbcdtd_r_r(dst, src)) }
+emit_cbcdtd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cbcdtd_r_r(dst, src)) }
 inst_cdtbcd_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .CDTBCD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_cdtbcd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_cdtbcd_r_r(dst, src)) }
+emit_cdtbcd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_cdtbcd_r_r(dst, src)) }
 inst_rfebb_imm                           :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .RFEBB, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_rfebb_imm                           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_rfebb_imm(imm)) }
+emit_rfebb_imm                           :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_rfebb_imm(imm)) }
 inst_rfdi_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .RFDI, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_rfdi_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rfdi_none()) }
+emit_rfdi_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rfdi_none()) }
 inst_msgsync_none                        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .MSGSYNC, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_msgsync_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_msgsync_none()) }
+emit_msgsync_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_msgsync_none()) }
 inst_isel_r_rz_r_crb                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .ISEL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_isel_r_rz_r_crb                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_isel_r_rz_r_crb(dst, src, src2, src3)) }
+emit_isel_r_rz_r_crb                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_isel_r_rz_r_crb(dst, src, src2, src3)) }
 inst_dcbtt_mem                           :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .DCBTT, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_dcbtt_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_dcbtt_mem(addr)) }
+emit_dcbtt_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_dcbtt_mem(addr)) }
 inst_dcbtstt_mem                         :: #force_inline proc "contextless" (addr: Memory) -> Instruction { return Instruction{mnemonic = .DCBTSTT, operand_count = 1, length = 4, ops = {op_mem(addr), {}, {}, {}}} }
-emit_dcbtstt_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append(instructions, inst_dcbtstt_mem(addr)) }
+emit_dcbtstt_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, addr: Memory) { append_elem(instructions, inst_dcbtstt_mem(addr)) }
 inst_vextublx_r_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VEXTUBLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vextublx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vextublx_r_r_v(dst, src, src2)) }
+emit_vextublx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vextublx_r_r_v(dst, src, src2)) }
 inst_vextuhlx_r_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VEXTUHLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vextuhlx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vextuhlx_r_r_v(dst, src, src2)) }
+emit_vextuhlx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vextuhlx_r_r_v(dst, src, src2)) }
 inst_vextuwlx_r_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VEXTUWLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vextuwlx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vextuwlx_r_r_v(dst, src, src2)) }
+emit_vextuwlx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vextuwlx_r_r_v(dst, src, src2)) }
 inst_vextubrx_r_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VEXTUBRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vextubrx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vextubrx_r_r_v(dst, src, src2)) }
+emit_vextubrx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vextubrx_r_r_v(dst, src, src2)) }
 inst_vextuhrx_r_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VEXTUHRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vextuhrx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vextuhrx_r_r_v(dst, src, src2)) }
+emit_vextuhrx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vextuhrx_r_r_v(dst, src, src2)) }
 inst_vextuwrx_r_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VEXTUWRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vextuwrx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vextuwrx_r_r_v(dst, src, src2)) }
+emit_vextuwrx_r_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vextuwrx_r_r_v(dst, src, src2)) }
 inst_vinsbvlx_v_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSBVLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinsbvlx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinsbvlx_v_r_v(dst, src, src2)) }
+emit_vinsbvlx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinsbvlx_v_r_v(dst, src, src2)) }
 inst_vinshvlx_v_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSHVLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinshvlx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinshvlx_v_r_v(dst, src, src2)) }
+emit_vinshvlx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinshvlx_v_r_v(dst, src, src2)) }
 inst_vinswvlx_v_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSWVLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinswvlx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinswvlx_v_r_v(dst, src, src2)) }
+emit_vinswvlx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinswvlx_v_r_v(dst, src, src2)) }
 inst_vinsbvrx_v_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSBVRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinsbvrx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinsbvrx_v_r_v(dst, src, src2)) }
+emit_vinsbvrx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinsbvrx_v_r_v(dst, src, src2)) }
 inst_vinshvrx_v_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSHVRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinshvrx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinshvrx_v_r_v(dst, src, src2)) }
+emit_vinshvrx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinshvrx_v_r_v(dst, src, src2)) }
 inst_vinswvrx_v_r_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSWVRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinswvrx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinswvrx_v_r_v(dst, src, src2)) }
+emit_vinswvrx_v_r_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinswvrx_v_r_v(dst, src, src2)) }
 inst_vinsblx_v_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSBLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinsblx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinsblx_v_r_r(dst, src, src2)) }
+emit_vinsblx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinsblx_v_r_r(dst, src, src2)) }
 inst_vinshlx_v_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSHLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinshlx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinshlx_v_r_r(dst, src, src2)) }
+emit_vinshlx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinshlx_v_r_r(dst, src, src2)) }
 inst_vinswlx_v_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSWLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinswlx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinswlx_v_r_r(dst, src, src2)) }
+emit_vinswlx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinswlx_v_r_r(dst, src, src2)) }
 inst_vinsdlx_v_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSDLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinsdlx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinsdlx_v_r_r(dst, src, src2)) }
+emit_vinsdlx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinsdlx_v_r_r(dst, src, src2)) }
 inst_vinsbrx_v_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSBRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinsbrx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinsbrx_v_r_r(dst, src, src2)) }
+emit_vinsbrx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinsbrx_v_r_r(dst, src, src2)) }
 inst_vinshrx_v_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSHRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinshrx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinshrx_v_r_r(dst, src, src2)) }
+emit_vinshrx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinshrx_v_r_r(dst, src, src2)) }
 inst_vinswrx_v_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSWRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinswrx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinswrx_v_r_r(dst, src, src2)) }
+emit_vinswrx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinswrx_v_r_r(dst, src, src2)) }
 inst_vinsdrx_v_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VINSDRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vinsdrx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vinsdrx_v_r_r(dst, src, src2)) }
+emit_vinsdrx_v_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vinsdrx_v_r_r(dst, src, src2)) }
 inst_vinsw_v_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VINSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vinsw_v_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vinsw_v_r_imm(dst, src, imm)) }
+emit_vinsw_v_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vinsw_v_r_imm(dst, src, imm)) }
 inst_vinsd_v_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VINSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vinsd_v_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vinsd_v_r_imm(dst, src, imm)) }
+emit_vinsd_v_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vinsd_v_r_imm(dst, src, imm)) }
 inst_vextdubvlx_v_v_v_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VEXTDUBVLX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vextdubvlx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vextdubvlx_v_v_v_r(dst, src, src2, src3)) }
+emit_vextdubvlx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vextdubvlx_v_v_v_r(dst, src, src2, src3)) }
 inst_vextduhvlx_v_v_v_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VEXTDUHVLX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vextduhvlx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vextduhvlx_v_v_v_r(dst, src, src2, src3)) }
+emit_vextduhvlx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vextduhvlx_v_v_v_r(dst, src, src2, src3)) }
 inst_vextduwvlx_v_v_v_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VEXTDUWVLX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vextduwvlx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vextduwvlx_v_v_v_r(dst, src, src2, src3)) }
+emit_vextduwvlx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vextduwvlx_v_v_v_r(dst, src, src2, src3)) }
 inst_vextddvlx_v_v_v_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VEXTDDVLX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vextddvlx_v_v_v_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vextddvlx_v_v_v_r(dst, src, src2, src3)) }
+emit_vextddvlx_v_v_v_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vextddvlx_v_v_v_r(dst, src, src2, src3)) }
 inst_vextdubvrx_v_v_v_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VEXTDUBVRX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vextdubvrx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vextdubvrx_v_v_v_r(dst, src, src2, src3)) }
+emit_vextdubvrx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vextdubvrx_v_v_v_r(dst, src, src2, src3)) }
 inst_vextduhvrx_v_v_v_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VEXTDUHVRX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vextduhvrx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vextduhvrx_v_v_v_r(dst, src, src2, src3)) }
+emit_vextduhvrx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vextduhvrx_v_v_v_r(dst, src, src2, src3)) }
 inst_vextduwvrx_v_v_v_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VEXTDUWVRX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vextduwvrx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vextduwvrx_v_v_v_r(dst, src, src2, src3)) }
+emit_vextduwvrx_v_v_v_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vextduwvrx_v_v_v_r(dst, src, src2, src3)) }
 inst_vextddvrx_v_v_v_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VEXTDDVRX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vextddvrx_v_v_v_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vextddvrx_v_v_v_r(dst, src, src2, src3)) }
+emit_vextddvrx_v_v_v_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vextddvrx_v_v_v_r(dst, src, src2, src3)) }
 inst_lxvrbx_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVRBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvrbx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvrbx_vs_r_r(dst, src, src2)) }
+emit_lxvrbx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvrbx_vs_r_r(dst, src, src2)) }
 inst_lxvrhx_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVRHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvrhx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvrhx_vs_r_r(dst, src, src2)) }
+emit_lxvrhx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvrhx_vs_r_r(dst, src, src2)) }
 inst_lxvrwx_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVRWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvrwx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvrwx_vs_r_r(dst, src, src2)) }
+emit_lxvrwx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvrwx_vs_r_r(dst, src, src2)) }
 inst_lxvrdx_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVRDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvrdx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvrdx_vs_r_r(dst, src, src2)) }
+emit_lxvrdx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvrdx_vs_r_r(dst, src, src2)) }
 inst_stxvrbx_vs_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVRBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvrbx_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvrbx_vs_r_r(dst, src, src2)) }
+emit_stxvrbx_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvrbx_vs_r_r(dst, src, src2)) }
 inst_stxvrhx_vs_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVRHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvrhx_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvrhx_vs_r_r(dst, src, src2)) }
+emit_stxvrhx_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvrhx_vs_r_r(dst, src, src2)) }
 inst_stxvrwx_vs_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVRWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvrwx_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvrwx_vs_r_r(dst, src, src2)) }
+emit_stxvrwx_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvrwx_vs_r_r(dst, src, src2)) }
 inst_stxvrdx_vs_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVRDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvrdx_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvrdx_vs_r_r(dst, src, src2)) }
+emit_stxvrdx_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvrdx_vs_r_r(dst, src, src2)) }
 inst_lxvkq_vs_imm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LXVKQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_lxvkq_vs_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_lxvkq_vs_imm(dst, imm)) }
+emit_lxvkq_vs_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_lxvkq_vs_imm(dst, imm)) }
 inst_xsmaxcqp_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMAXCQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmaxcqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmaxcqp_v_v_v(dst, src, src2)) }
+emit_xsmaxcqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmaxcqp_v_v_v(dst, src, src2)) }
 inst_xsmincqp_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XSMINCQP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xsmincqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xsmincqp_v_v_v(dst, src, src2)) }
+emit_xsmincqp_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xsmincqp_v_v_v(dst, src, src2)) }
 inst_vrlq_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlq_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlq_v_v_v(dst, src, src2)) }
+emit_vrlq_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlq_v_v_v(dst, src, src2)) }
 inst_vrlqmi_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLQMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlqmi_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlqmi_v_v_v(dst, src, src2)) }
+emit_vrlqmi_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlqmi_v_v_v(dst, src, src2)) }
 inst_vrlqnm_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLQNM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlqnm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlqnm_v_v_v(dst, src, src2)) }
+emit_vrlqnm_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlqnm_v_v_v(dst, src, src2)) }
 inst_vslq_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSLQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vslq_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vslq_v_v_v(dst, src, src2)) }
+emit_vslq_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vslq_v_v_v(dst, src, src2)) }
 inst_vsrq_v_v_v                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrq_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrq_v_v_v(dst, src, src2)) }
+emit_vsrq_v_v_v                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrq_v_v_v(dst, src, src2)) }
 inst_vsraq_v_v_v                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRAQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsraq_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsraq_v_v_v(dst, src, src2)) }
+emit_vsraq_v_v_v                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsraq_v_v_v(dst, src, src2)) }
 inst_vmulesd_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULESD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulesd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulesd_v_v_v(dst, src, src2)) }
+emit_vmulesd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulesd_v_v_v(dst, src, src2)) }
 inst_vmuleud_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULEUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmuleud_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmuleud_v_v_v(dst, src, src2)) }
+emit_vmuleud_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmuleud_v_v_v(dst, src, src2)) }
 inst_vmulosd_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULOSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulosd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulosd_v_v_v(dst, src, src2)) }
+emit_vmulosd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulosd_v_v_v(dst, src, src2)) }
 inst_vmuloud_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULOUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmuloud_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmuloud_v_v_v(dst, src, src2)) }
+emit_vmuloud_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmuloud_v_v_v(dst, src, src2)) }
 inst_vmulld_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULLD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulld_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulld_v_v_v(dst, src, src2)) }
+emit_vmulld_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulld_v_v_v(dst, src, src2)) }
 inst_vmulhsw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULHSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulhsw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulhsw_v_v_v(dst, src, src2)) }
+emit_vmulhsw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulhsw_v_v_v(dst, src, src2)) }
 inst_vmulhsd_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULHSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulhsd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulhsd_v_v_v(dst, src, src2)) }
+emit_vmulhsd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulhsd_v_v_v(dst, src, src2)) }
 inst_vmulhuw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULHUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulhuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulhuw_v_v_v(dst, src, src2)) }
+emit_vmulhuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulhuw_v_v_v(dst, src, src2)) }
 inst_vmulhud_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULHUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulhud_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulhud_v_v_v(dst, src, src2)) }
+emit_vmulhud_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulhud_v_v_v(dst, src, src2)) }
 inst_vdivsw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivsw_v_v_v(dst, src, src2)) }
+emit_vdivsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivsw_v_v_v(dst, src, src2)) }
 inst_vdivuw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivuw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivuw_v_v_v(dst, src, src2)) }
+emit_vdivuw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivuw_v_v_v(dst, src, src2)) }
 inst_vdivsd_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivsd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivsd_v_v_v(dst, src, src2)) }
+emit_vdivsd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivsd_v_v_v(dst, src, src2)) }
 inst_vdivud_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivud_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivud_v_v_v(dst, src, src2)) }
+emit_vdivud_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivud_v_v_v(dst, src, src2)) }
 inst_vdivsq_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVSQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivsq_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivsq_v_v_v(dst, src, src2)) }
+emit_vdivsq_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivsq_v_v_v(dst, src, src2)) }
 inst_vdivuq_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivuq_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivuq_v_v_v(dst, src, src2)) }
+emit_vdivuq_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivuq_v_v_v(dst, src, src2)) }
 inst_vdivesw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVESW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivesw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivesw_v_v_v(dst, src, src2)) }
+emit_vdivesw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivesw_v_v_v(dst, src, src2)) }
 inst_vdiveuw_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVEUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdiveuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdiveuw_v_v_v(dst, src, src2)) }
+emit_vdiveuw_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdiveuw_v_v_v(dst, src, src2)) }
 inst_vdivesd_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVESD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivesd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivesd_v_v_v(dst, src, src2)) }
+emit_vdivesd_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivesd_v_v_v(dst, src, src2)) }
 inst_vdiveud_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVEUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdiveud_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdiveud_v_v_v(dst, src, src2)) }
+emit_vdiveud_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdiveud_v_v_v(dst, src, src2)) }
 inst_vdivesq_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVESQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdivesq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdivesq_v_v_v(dst, src, src2)) }
+emit_vdivesq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdivesq_v_v_v(dst, src, src2)) }
 inst_vdiveuq_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VDIVEUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vdiveuq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vdiveuq_v_v_v(dst, src, src2)) }
+emit_vdiveuq_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vdiveuq_v_v_v(dst, src, src2)) }
 inst_vmodsw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMODSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmodsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmodsw_v_v_v(dst, src, src2)) }
+emit_vmodsw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmodsw_v_v_v(dst, src, src2)) }
 inst_vmoduw_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMODUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmoduw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmoduw_v_v_v(dst, src, src2)) }
+emit_vmoduw_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmoduw_v_v_v(dst, src, src2)) }
 inst_vmodsd_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMODSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmodsd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmodsd_v_v_v(dst, src, src2)) }
+emit_vmodsd_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmodsd_v_v_v(dst, src, src2)) }
 inst_vmodud_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMODUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmodud_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmodud_v_v_v(dst, src, src2)) }
+emit_vmodud_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmodud_v_v_v(dst, src, src2)) }
 inst_vmodsq_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMODSQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmodsq_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmodsq_v_v_v(dst, src, src2)) }
+emit_vmodsq_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmodsq_v_v_v(dst, src, src2)) }
 inst_vmoduq_v_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMODUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmoduq_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmoduq_v_v_v(dst, src, src2)) }
+emit_vmoduq_v_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmoduq_v_v_v(dst, src, src2)) }
 inst_setb_r_crf                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .SETB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_setb_r_crf                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_setb_r_crf(dst, src)) }
+emit_setb_r_crf                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_setb_r_crf(dst, src)) }
 inst_mcrxrx_crf                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MCRXRX, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mcrxrx_crf                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mcrxrx_crf(dst)) }
+emit_mcrxrx_crf                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mcrxrx_crf(dst)) }
 inst_xvcvbf16spn_vs_vs                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVBF16SPN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvbf16spn_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvbf16spn_vs_vs(dst, src)) }
+emit_xvcvbf16spn_vs_vs                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvbf16spn_vs_vs(dst, src)) }
 inst_xvcvspbf16_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSPBF16, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvspbf16_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvspbf16_vs_vs(dst, src)) }
+emit_xvcvspbf16_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvspbf16_vs_vs(dst, src)) }
 inst_xxgenpcvbm_vs_v_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXGENPCVBM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xxgenpcvbm_vs_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xxgenpcvbm_vs_v_imm(dst, src, imm)) }
+emit_xxgenpcvbm_vs_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xxgenpcvbm_vs_v_imm(dst, src, imm)) }
 inst_xxgenpcvhm_vs_v_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXGENPCVHM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xxgenpcvhm_vs_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xxgenpcvhm_vs_v_imm(dst, src, imm)) }
+emit_xxgenpcvhm_vs_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xxgenpcvhm_vs_v_imm(dst, src, imm)) }
 inst_xxgenpcvwm_vs_v_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXGENPCVWM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xxgenpcvwm_vs_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xxgenpcvwm_vs_v_imm(dst, src, imm)) }
+emit_xxgenpcvwm_vs_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xxgenpcvwm_vs_v_imm(dst, src, imm)) }
 inst_xxgenpcvdm_vs_v_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XXGENPCVDM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xxgenpcvdm_vs_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xxgenpcvdm_vs_v_imm(dst, src, imm)) }
+emit_xxgenpcvdm_vs_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xxgenpcvdm_vs_v_imm(dst, src, imm)) }
 inst_xxblendvb_vs_vs_vs_vs               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .XXBLENDVB, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_xxblendvb_vs_vs_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_xxblendvb_vs_vs_vs_vs(dst, src, src2, src3)) }
+emit_xxblendvb_vs_vs_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_xxblendvb_vs_vs_vs_vs(dst, src, src2, src3)) }
 inst_xxblendvh_vs_vs_vs_vs               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .XXBLENDVH, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_xxblendvh_vs_vs_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_xxblendvh_vs_vs_vs_vs(dst, src, src2, src3)) }
+emit_xxblendvh_vs_vs_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_xxblendvh_vs_vs_vs_vs(dst, src, src2, src3)) }
 inst_xxblendvw_vs_vs_vs_vs               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .XXBLENDVW, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_xxblendvw_vs_vs_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_xxblendvw_vs_vs_vs_vs(dst, src, src2, src3)) }
+emit_xxblendvw_vs_vs_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_xxblendvw_vs_vs_vs_vs(dst, src, src2, src3)) }
 inst_xxblendvd_vs_vs_vs_vs               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .XXBLENDVD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_xxblendvd_vs_vs_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_xxblendvd_vs_vs_vs_vs(dst, src, src2, src3)) }
+emit_xxblendvd_vs_vs_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_xxblendvd_vs_vs_vs_vs(dst, src, src2, src3)) }
 inst_xxpermx_vs_vs_vs_vs                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .XXPERMX, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_xxpermx_vs_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_xxpermx_vs_vs_vs_vs(dst, src, src2, src3)) }
+emit_xxpermx_vs_vs_vs_vs                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_xxpermx_vs_vs_vs_vs(dst, src, src2, src3)) }
 inst_xxeval_vs_vs_vs_vs                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .XXEVAL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_xxeval_vs_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_xxeval_vs_vs_vs_vs(dst, src, src2, src3)) }
+emit_xxeval_vs_vs_vs_vs                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_xxeval_vs_vs_vs_vs(dst, src, src2, src3)) }
 inst_xxperm_vs_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXPERM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxperm_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxperm_vs_vs_vs(dst, src, src2)) }
+emit_xxperm_vs_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxperm_vs_vs_vs(dst, src, src2)) }
 inst_pld_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pld_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pld_r_mem(dst, addr)) }
+emit_pld_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pld_r_mem(dst, addr)) }
 inst_pstd_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pstd_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pstd_r_mem(dst, addr)) }
+emit_pstd_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pstd_r_mem(dst, addr)) }
 inst_plwz_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLWZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plwz_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plwz_r_mem(dst, addr)) }
+emit_plwz_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plwz_r_mem(dst, addr)) }
 inst_pstw_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTW, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pstw_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pstw_r_mem(dst, addr)) }
+emit_pstw_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pstw_r_mem(dst, addr)) }
 inst_plbz_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLBZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plbz_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plbz_r_mem(dst, addr)) }
+emit_plbz_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plbz_r_mem(dst, addr)) }
 inst_pstb_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTB, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pstb_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pstb_r_mem(dst, addr)) }
+emit_pstb_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pstb_r_mem(dst, addr)) }
 inst_plhz_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLHZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plhz_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plhz_r_mem(dst, addr)) }
+emit_plhz_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plhz_r_mem(dst, addr)) }
 inst_psth_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTH, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psth_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psth_r_mem(dst, addr)) }
+emit_psth_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psth_r_mem(dst, addr)) }
 inst_plha_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLHA, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plha_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plha_r_mem(dst, addr)) }
+emit_plha_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plha_r_mem(dst, addr)) }
 inst_plwa_r_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLWA, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plwa_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plwa_r_mem(dst, addr)) }
+emit_plwa_r_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plwa_r_mem(dst, addr)) }
 inst_plfd_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLFD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plfd_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plfd_fr_mem(dst, addr)) }
+emit_plfd_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plfd_fr_mem(dst, addr)) }
 inst_pstfd_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTFD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pstfd_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pstfd_fr_mem(dst, addr)) }
+emit_pstfd_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pstfd_fr_mem(dst, addr)) }
 inst_plfs_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLFS, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plfs_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plfs_fr_mem(dst, addr)) }
+emit_plfs_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plfs_fr_mem(dst, addr)) }
 inst_pstfs_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTFS, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pstfs_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pstfs_fr_mem(dst, addr)) }
+emit_pstfs_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pstfs_fr_mem(dst, addr)) }
 inst_plxv_vs_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plxv_vs_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plxv_vs_mem(dst, addr)) }
+emit_plxv_vs_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plxv_vs_mem(dst, addr)) }
 inst_pstxv_vs_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTXV, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pstxv_vs_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pstxv_vs_mem(dst, addr)) }
+emit_pstxv_vs_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pstxv_vs_mem(dst, addr)) }
 inst_plxsd_v_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLXSD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plxsd_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plxsd_v_mem(dst, addr)) }
+emit_plxsd_v_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plxsd_v_mem(dst, addr)) }
 inst_pstxsd_v_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTXSD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pstxsd_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pstxsd_v_mem(dst, addr)) }
+emit_pstxsd_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pstxsd_v_mem(dst, addr)) }
 inst_plxssp_v_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PLXSSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_plxssp_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_plxssp_v_mem(dst, addr)) }
+emit_plxssp_v_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_plxssp_v_mem(dst, addr)) }
 inst_pstxssp_v_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSTXSSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_pstxssp_v_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_pstxssp_v_mem(dst, addr)) }
+emit_pstxssp_v_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_pstxssp_v_mem(dst, addr)) }
 inst_paddi_r_rz_simm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .PADDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_paddi_r_rz_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_paddi_r_rz_simm(dst, src, imm)) }
+emit_paddi_r_rz_simm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_paddi_r_rz_simm(dst, src, imm)) }
 inst_pli_r_simm                          :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .PLI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_pli_r_simm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_pli_r_simm(dst, imm)) }
+emit_pli_r_simm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_pli_r_simm(dst, imm)) }
 inst_psubi_r_r_simm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .PSUBI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_psubi_r_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_psubi_r_r_simm(dst, src, imm)) }
+emit_psubi_r_r_simm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_psubi_r_r_simm(dst, src, imm)) }
 inst_pmxvf32ger_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF32GER, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf32ger_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf32ger_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf32ger_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf32ger_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf64ger_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF64GER, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf64ger_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf64ger_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf64ger_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf64ger_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi4ger8_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI4GER8, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi4ger8_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi4ger8_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi4ger8_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi4ger8_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi8ger4_imm_vs_vs                :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI8GER4, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi8ger4_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi8ger4_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi8ger4_imm_vs_vs                :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi8ger4_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi16ger2_imm_vs_vs               :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI16GER2, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi16ger2_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi16ger2_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi16ger2_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi16ger2_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf16ger2_imm_vs_vs               :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF16GER2, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf16ger2_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf16ger2_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf16ger2_imm_vs_vs               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf16ger2_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf16ger2pp_imm_vs_vs             :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF16GER2PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf16ger2pp_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf16ger2pp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf16ger2pp_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf16ger2pp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf16ger2pn_imm_vs_vs             :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF16GER2PN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf16ger2pn_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf16ger2pn_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf16ger2pn_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf16ger2pn_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf16ger2np_imm_vs_vs             :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF16GER2NP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf16ger2np_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf16ger2np_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf16ger2np_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf16ger2np_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf16ger2nn_imm_vs_vs             :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF16GER2NN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf16ger2nn_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf16ger2nn_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf16ger2nn_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf16ger2nn_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf32gerpp_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF32GERPP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf32gerpp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf32gerpp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf32gerpp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf32gerpp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf32gerpn_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF32GERPN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf32gerpn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf32gerpn_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf32gerpn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf32gerpn_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf32gernp_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF32GERNP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf32gernp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf32gernp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf32gernp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf32gernp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf32gernn_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF32GERNN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf32gernn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf32gernn_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf32gernn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf32gernn_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf64gerpp_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF64GERPP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf64gerpp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf64gerpp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf64gerpp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf64gerpp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf64gerpn_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF64GERPN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf64gerpn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf64gerpn_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf64gerpn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf64gerpn_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf64gernp_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF64GERNP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf64gernp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf64gernp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf64gernp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf64gernp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvf64gernn_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVF64GERNN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvf64gernn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvf64gernn_imm_vs_vs(imm, dst, src)) }
+emit_pmxvf64gernn_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvf64gernn_imm_vs_vs(imm, dst, src)) }
 inst_pmxvbf16ger2_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVBF16GER2, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvbf16ger2_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvbf16ger2_imm_vs_vs(imm, dst, src)) }
+emit_pmxvbf16ger2_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvbf16ger2_imm_vs_vs(imm, dst, src)) }
 inst_pmxvbf16ger2pp_imm_vs_vs            :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVBF16GER2PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvbf16ger2pp_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvbf16ger2pp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvbf16ger2pp_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvbf16ger2pp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvbf16ger2pn_imm_vs_vs            :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVBF16GER2PN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvbf16ger2pn_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvbf16ger2pn_imm_vs_vs(imm, dst, src)) }
+emit_pmxvbf16ger2pn_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvbf16ger2pn_imm_vs_vs(imm, dst, src)) }
 inst_pmxvbf16ger2np_imm_vs_vs            :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVBF16GER2NP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvbf16ger2np_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvbf16ger2np_imm_vs_vs(imm, dst, src)) }
+emit_pmxvbf16ger2np_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvbf16ger2np_imm_vs_vs(imm, dst, src)) }
 inst_pmxvbf16ger2nn_imm_vs_vs            :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVBF16GER2NN, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvbf16ger2nn_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvbf16ger2nn_imm_vs_vs(imm, dst, src)) }
+emit_pmxvbf16ger2nn_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvbf16ger2nn_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi4ger8pp_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI4GER8PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi4ger8pp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi4ger8pp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi4ger8pp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi4ger8pp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi8ger4pp_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI8GER4PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi8ger4pp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi8ger4pp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi8ger4pp_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi8ger4pp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi8ger4spp_imm_vs_vs             :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI8GER4SPP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi8ger4spp_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi8ger4spp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi8ger4spp_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi8ger4spp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi16ger2pp_imm_vs_vs             :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI16GER2PP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi16ger2pp_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi16ger2pp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi16ger2pp_imm_vs_vs             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi16ger2pp_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi16ger2s_imm_vs_vs              :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI16GER2S, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi16ger2s_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi16ger2s_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi16ger2s_imm_vs_vs              :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi16ger2s_imm_vs_vs(imm, dst, src)) }
 inst_pmxvi16ger2spp_imm_vs_vs            :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PMXVI16GER2SPP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_pmxvi16ger2spp_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_pmxvi16ger2spp_imm_vs_vs(imm, dst, src)) }
+emit_pmxvi16ger2spp_imm_vs_vs            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_pmxvi16ger2spp_imm_vs_vs(imm, dst, src)) }
 inst_lxvp_vs_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LXVP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lxvp_vs_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lxvp_vs_mem(dst, addr)) }
+emit_lxvp_vs_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lxvp_vs_mem(dst, addr)) }
 inst_stxvp_vs_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STXVP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stxvp_vs_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stxvp_vs_mem(dst, addr)) }
+emit_stxvp_vs_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stxvp_vs_mem(dst, addr)) }
 inst_lxvpx_vs_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvpx_vs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvpx_vs_r_r(dst, src, src2)) }
+emit_lxvpx_vs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvpx_vs_r_r(dst, src, src2)) }
 inst_stxvpx_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvpx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvpx_vs_r_r(dst, src, src2)) }
+emit_stxvpx_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvpx_vs_r_r(dst, src, src2)) }
 inst_dcbi_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCBI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dcbi_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dcbi_r_r(dst, src)) }
+emit_dcbi_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dcbi_r_r(dst, src)) }
 inst_icbiep_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ICBIEP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_icbiep_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_icbiep_r_r(dst, src)) }
+emit_icbiep_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_icbiep_r_r(dst, src)) }
 inst_dcbtep_imm_r_r                      :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCBTEP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_dcbtep_imm_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_dcbtep_imm_r_r(imm, dst, src)) }
+emit_dcbtep_imm_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_dcbtep_imm_r_r(imm, dst, src)) }
 inst_dcbtstep_imm_r_r                    :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCBTSTEP, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_dcbtstep_imm_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_dcbtstep_imm_r_r(imm, dst, src)) }
+emit_dcbtstep_imm_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_dcbtstep_imm_r_r(imm, dst, src)) }
 inst_lbepx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LBEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lbepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lbepx_r_r_r(dst, src, src2)) }
+emit_lbepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lbepx_r_r_r(dst, src, src2)) }
 inst_lhepx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LHEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lhepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lhepx_r_r_r(dst, src, src2)) }
+emit_lhepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lhepx_r_r_r(dst, src, src2)) }
 inst_lwepx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LWEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lwepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lwepx_r_r_r(dst, src, src2)) }
+emit_lwepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lwepx_r_r_r(dst, src, src2)) }
 inst_stbepx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STBEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stbepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stbepx_r_r_r(dst, src, src2)) }
+emit_stbepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stbepx_r_r_r(dst, src, src2)) }
 inst_sthepx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STHEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sthepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sthepx_r_r_r(dst, src, src2)) }
+emit_sthepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sthepx_r_r_r(dst, src, src2)) }
 inst_stwepx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STWEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stwepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stwepx_r_r_r(dst, src, src2)) }
+emit_stwepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stwepx_r_r_r(dst, src, src2)) }
 inst_lfdepx_fr_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LFDEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lfdepx_fr_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lfdepx_fr_r_r(dst, src, src2)) }
+emit_lfdepx_fr_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lfdepx_fr_r_r(dst, src, src2)) }
 inst_stfdepx_fr_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STFDEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stfdepx_fr_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stfdepx_fr_r_r(dst, src, src2)) }
+emit_stfdepx_fr_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stfdepx_fr_r_r(dst, src, src2)) }
 inst_tlbsx_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TLBSX, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tlbsx_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tlbsx_r_r(dst, src)) }
+emit_tlbsx_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tlbsx_r_r(dst, src)) }
 inst_dccci_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCCCI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dccci_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dccci_r_r(dst, src)) }
+emit_dccci_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dccci_r_r(dst, src)) }
 inst_iccci_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ICCCI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_iccci_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_iccci_r_r(dst, src)) }
+emit_iccci_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_iccci_r_r(dst, src)) }
 inst_wrtee_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .WRTEE, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_wrtee_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_wrtee_r(dst)) }
+emit_wrtee_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_wrtee_r(dst)) }
 inst_wrteei_imm                          :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .WRTEEI, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_wrteei_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_wrteei_imm(imm)) }
+emit_wrteei_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_wrteei_imm(imm)) }
 inst_tlbre_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TLBRE, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tlbre_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbre_none()) }
+emit_tlbre_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbre_none()) }
 inst_tlbwe_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TLBWE, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_tlbwe_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbwe_none()) }
+emit_tlbwe_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbwe_none()) }
 inst_tlbivax_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TLBIVAX, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tlbivax_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tlbivax_r_r(dst, src)) }
+emit_tlbivax_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tlbivax_r_r(dst, src)) }
 inst_tlbilx_imm_r_r                      :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TLBILX, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_tlbilx_imm_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_tlbilx_imm_r_r(imm, dst, src)) }
+emit_tlbilx_imm_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_tlbilx_imm_r_r(imm, dst, src)) }
 inst_tlbld_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .TLBLD, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_tlbld_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbld_r(dst)) }
+emit_tlbld_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbld_r(dst)) }
 inst_tlbli_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .TLBLI, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_tlbli_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_tlbli_r(dst)) }
+emit_tlbli_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_tlbli_r(dst)) }
 inst_mfpmr_r_spr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFPMR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mfpmr_r_spr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mfpmr_r_spr(dst, src)) }
+emit_mfpmr_r_spr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mfpmr_r_spr(dst, src)) }
 inst_mtpmr_spr_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTPMR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtpmr_spr_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtpmr_spr_r(dst, src)) }
+emit_mtpmr_spr_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtpmr_spr_r(dst, src)) }
 inst_mfsr_r_imm                          :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MFSR, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_mfsr_r_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mfsr_r_imm(dst, imm)) }
+emit_mfsr_r_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mfsr_r_imm(dst, imm)) }
 inst_mtsr_imm_r                          :: #force_inline proc "contextless" (imm: i64, dst: Register) -> Instruction { return Instruction{mnemonic = .MTSR, operand_count = 2, length = 4, ops = {op_imm(imm), op_reg(dst), {}, {}}} }
-emit_mtsr_imm_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append(instructions, inst_mtsr_imm_r(imm, dst)) }
+emit_mtsr_imm_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register) { append_elem(instructions, inst_mtsr_imm_r(imm, dst)) }
 inst_mfsrin_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFSRIN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mfsrin_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mfsrin_r_r(dst, src)) }
+emit_mfsrin_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mfsrin_r_r(dst, src)) }
 inst_mtsrin_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTSRIN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtsrin_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtsrin_r_r(dst, src)) }
+emit_mtsrin_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtsrin_r_r(dst, src)) }
 inst_dst_r_r_imm                         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DST, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dst_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dst_r_r_imm(dst, src, imm)) }
+emit_dst_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dst_r_r_imm(dst, src, imm)) }
 inst_dstt_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DSTT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dstt_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dstt_r_r_imm(dst, src, imm)) }
+emit_dstt_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dstt_r_r_imm(dst, src, imm)) }
 inst_dstst_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DSTST, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dstst_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dstst_r_r_imm(dst, src, imm)) }
+emit_dstst_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dstst_r_r_imm(dst, src, imm)) }
 inst_dststt_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DSTSTT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dststt_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dststt_r_r_imm(dst, src, imm)) }
+emit_dststt_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dststt_r_r_imm(dst, src, imm)) }
 inst_dss_imm                             :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .DSS, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_dss_imm                             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_dss_imm(imm)) }
+emit_dss_imm                             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_dss_imm(imm)) }
 inst_dssall_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DSSALL, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_dssall_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_dssall_none()) }
+emit_dssall_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_dssall_none()) }
 inst_vsumsws_v_v_v                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUMSWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsumsws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsumsws_v_v_v(dst, src, src2)) }
+emit_vsumsws_v_v_v                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsumsws_v_v_v(dst, src, src2)) }
 inst_vsum2sws_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUM2SWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsum2sws_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsum2sws_v_v_v(dst, src, src2)) }
+emit_vsum2sws_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsum2sws_v_v_v(dst, src, src2)) }
 inst_vsum4sbs_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUM4SBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsum4sbs_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsum4sbs_v_v_v(dst, src, src2)) }
+emit_vsum4sbs_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsum4sbs_v_v_v(dst, src, src2)) }
 inst_vsum4shs_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUM4SHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsum4shs_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsum4shs_v_v_v(dst, src, src2)) }
+emit_vsum4shs_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsum4shs_v_v_v(dst, src, src2)) }
 inst_vsum4ubs_v_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUM4UBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsum4ubs_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsum4ubs_v_v_v(dst, src, src2)) }
+emit_vsum4ubs_v_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsum4ubs_v_v_v(dst, src, src2)) }
 inst_mffsce_fr                           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFFSCE, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mffsce_fr                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mffsce_fr(dst)) }
+emit_mffsce_fr                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mffsce_fr(dst)) }
 inst_mffscdrn_fr_fr                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFFSCDRN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mffscdrn_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mffscdrn_fr_fr(dst, src)) }
+emit_mffscdrn_fr_fr                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mffscdrn_fr_fr(dst, src)) }
 inst_mffscdrni_fr_imm                    :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MFFSCDRNI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_mffscdrni_fr_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mffscdrni_fr_imm(dst, imm)) }
+emit_mffscdrni_fr_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mffscdrni_fr_imm(dst, imm)) }
 inst_mffscrn_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFFSCRN, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mffscrn_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mffscrn_fr_fr(dst, src)) }
+emit_mffscrn_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mffscrn_fr_fr(dst, src)) }
 inst_mffscrni_fr_imm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MFFSCRNI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_mffscrni_fr_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_mffscrni_fr_imm(dst, imm)) }
+emit_mffscrni_fr_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_mffscrni_fr_imm(dst, imm)) }
 inst_mffsl_fr                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFFSL, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mffsl_fr                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mffsl_fr(dst)) }
+emit_mffsl_fr                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mffsl_fr(dst)) }
 inst_stop_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .STOP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_stop_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stop_none()) }
+emit_stop_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stop_none()) }
 inst_cpabort_none                        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .CPABORT, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_cpabort_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cpabort_none()) }
+emit_cpabort_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cpabort_none()) }
 inst_attn_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .ATTN, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_attn_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_attn_none()) }
+emit_attn_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_attn_none()) }
 inst_mtfprd_fr_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTFPRD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtfprd_fr_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtfprd_fr_r(dst, src)) }
+emit_mtfprd_fr_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtfprd_fr_r(dst, src)) }
 inst_mffprd_r_fr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFFPRD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mffprd_r_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mffprd_r_fr(dst, src)) }
+emit_mffprd_r_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mffprd_r_fr(dst, src)) }
 inst_mtfprwa_fr_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTFPRWA, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtfprwa_fr_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtfprwa_fr_r(dst, src)) }
+emit_mtfprwa_fr_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtfprwa_fr_r(dst, src)) }
 inst_mtfprwz_fr_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTFPRWZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtfprwz_fr_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtfprwz_fr_r(dst, src)) }
+emit_mtfprwz_fr_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtfprwz_fr_r(dst, src)) }
 inst_mffprwz_r_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFFPRWZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mffprwz_r_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mffprwz_r_fr(dst, src)) }
+emit_mffprwz_r_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mffprwz_r_fr(dst, src)) }
 inst_mfvsrld_r_vs                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFVSRLD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mfvsrld_r_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mfvsrld_r_vs(dst, src)) }
+emit_mfvsrld_r_vs                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mfvsrld_r_vs(dst, src)) }
 inst_mtvsrdd_vs_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTVSRDD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtvsrdd_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtvsrdd_vs_r_r(dst, src, src2)) }
+emit_mtvsrdd_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtvsrdd_vs_r_r(dst, src, src2)) }
 inst_mtvsrws_vs_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTVSRWS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtvsrws_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtvsrws_vs_r(dst, src)) }
+emit_mtvsrws_vs_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtvsrws_vs_r(dst, src)) }
 inst_extswsli_r_r_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EXTSWSLI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_extswsli_r_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_extswsli_r_r_imm(dst, src, imm)) }
+emit_extswsli_r_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_extswsli_r_r_imm(dst, src, imm)) }
 inst_extswsli_dot_r_r_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EXTSWSLI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_extswsli_dot_r_r_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_extswsli_dot_r_r_imm(dst, src, imm)) }
+emit_extswsli_dot_r_r_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_extswsli_dot_r_r_imm(dst, src, imm)) }
 inst_isellt_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ISELLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_isellt_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_isellt_r_r_r(dst, src, src2)) }
+emit_isellt_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_isellt_r_r_r(dst, src, src2)) }
 inst_iselgt_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ISELGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_iselgt_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_iselgt_r_r_r(dst, src, src2)) }
+emit_iselgt_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_iselgt_r_r_r(dst, src, src2)) }
 inst_iseleq_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ISELEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_iseleq_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_iseleq_r_r_r(dst, src, src2)) }
+emit_iseleq_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_iseleq_r_r_r(dst, src, src2)) }
 inst_tweq_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TWEQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tweq_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tweq_r_r(dst, src)) }
+emit_tweq_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tweq_r_r(dst, src)) }
 inst_twne_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TWNE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_twne_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_twne_r_r(dst, src)) }
+emit_twne_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_twne_r_r(dst, src)) }
 inst_twgt_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TWGT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_twgt_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_twgt_r_r(dst, src)) }
+emit_twgt_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_twgt_r_r(dst, src)) }
 inst_twlt_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TWLT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_twlt_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_twlt_r_r(dst, src)) }
+emit_twlt_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_twlt_r_r(dst, src)) }
 inst_twgti_r_simm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TWGTI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_twgti_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_twgti_r_simm(dst, imm)) }
+emit_twgti_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_twgti_r_simm(dst, imm)) }
 inst_twlti_r_simm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TWLTI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_twlti_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_twlti_r_simm(dst, imm)) }
+emit_twlti_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_twlti_r_simm(dst, imm)) }
 inst_tweqi_r_simm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TWEQI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_tweqi_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_tweqi_r_simm(dst, imm)) }
+emit_tweqi_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_tweqi_r_simm(dst, imm)) }
 inst_twnei_r_simm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TWNEI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_twnei_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_twnei_r_simm(dst, imm)) }
+emit_twnei_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_twnei_r_simm(dst, imm)) }
 inst_twui_r_simm                         :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TWUI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_twui_r_simm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_twui_r_simm(dst, imm)) }
+emit_twui_r_simm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_twui_r_simm(dst, imm)) }
 inst_tdeq_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TDEQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tdeq_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tdeq_r_r(dst, src)) }
+emit_tdeq_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tdeq_r_r(dst, src)) }
 inst_tdne_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TDNE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tdne_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tdne_r_r(dst, src)) }
+emit_tdne_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tdne_r_r(dst, src)) }
 inst_tdgt_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TDGT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tdgt_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tdgt_r_r(dst, src)) }
+emit_tdgt_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tdgt_r_r(dst, src)) }
 inst_tdlt_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TDLT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tdlt_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tdlt_r_r(dst, src)) }
+emit_tdlt_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tdlt_r_r(dst, src)) }
 inst_tdgti_r_simm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TDGTI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_tdgti_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_tdgti_r_simm(dst, imm)) }
+emit_tdgti_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_tdgti_r_simm(dst, imm)) }
 inst_tdlti_r_simm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TDLTI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_tdlti_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_tdlti_r_simm(dst, imm)) }
+emit_tdlti_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_tdlti_r_simm(dst, imm)) }
 inst_tdeqi_r_simm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TDEQI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_tdeqi_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_tdeqi_r_simm(dst, imm)) }
+emit_tdeqi_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_tdeqi_r_simm(dst, imm)) }
 inst_tdnei_r_simm                        :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TDNEI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_tdnei_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_tdnei_r_simm(dst, imm)) }
+emit_tdnei_r_simm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_tdnei_r_simm(dst, imm)) }
 inst_tdui_r_simm                         :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TDUI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_tdui_r_simm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_tdui_r_simm(dst, imm)) }
+emit_tdui_r_simm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_tdui_r_simm(dst, imm)) }
 inst_bcdadd_dot_v_v_v_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDADD_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_bcdadd_dot_v_v_v_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_bcdadd_dot_v_v_v_imm(dst, src, src2, imm)) }
+emit_bcdadd_dot_v_v_v_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_bcdadd_dot_v_v_v_imm(dst, src, src2, imm)) }
 inst_bcdsub_dot_v_v_v_imm                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDSUB_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_bcdsub_dot_v_v_v_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_bcdsub_dot_v_v_v_imm(dst, src, src2, imm)) }
+emit_bcdsub_dot_v_v_v_imm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_bcdsub_dot_v_v_v_imm(dst, src, src2, imm)) }
 inst_bcds_dot_v_v_v_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDS_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_bcds_dot_v_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_bcds_dot_v_v_v_imm(dst, src, src2, imm)) }
+emit_bcds_dot_v_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_bcds_dot_v_v_v_imm(dst, src, src2, imm)) }
 inst_bcdus_dot_v_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BCDUS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bcdus_dot_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bcdus_dot_v_v_v(dst, src, src2)) }
+emit_bcdus_dot_v_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bcdus_dot_v_v_v(dst, src, src2)) }
 inst_bcdsr_dot_v_v_v_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDSR_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_bcdsr_dot_v_v_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_bcdsr_dot_v_v_v_imm(dst, src, src2, imm)) }
+emit_bcdsr_dot_v_v_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_bcdsr_dot_v_v_v_imm(dst, src, src2, imm)) }
 inst_bcdcfn_dot_v_v_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDCFN_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_bcdcfn_dot_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_bcdcfn_dot_v_v_imm(dst, src, imm)) }
+emit_bcdcfn_dot_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_bcdcfn_dot_v_v_imm(dst, src, imm)) }
 inst_bcdctn_dot_v_v                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .BCDCTN_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_bcdctn_dot_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_bcdctn_dot_v_v(dst, src)) }
+emit_bcdctn_dot_v_v                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_bcdctn_dot_v_v(dst, src)) }
 inst_bcdcfz_dot_v_v_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDCFZ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_bcdcfz_dot_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_bcdcfz_dot_v_v_imm(dst, src, imm)) }
+emit_bcdcfz_dot_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_bcdcfz_dot_v_v_imm(dst, src, imm)) }
 inst_bcdctz_dot_v_v_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDCTZ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_bcdctz_dot_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_bcdctz_dot_v_v_imm(dst, src, imm)) }
+emit_bcdctz_dot_v_v_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_bcdctz_dot_v_v_imm(dst, src, imm)) }
 inst_bcdcpsgn_dot_v_v_v                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BCDCPSGN_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bcdcpsgn_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bcdcpsgn_dot_v_v_v(dst, src, src2)) }
+emit_bcdcpsgn_dot_v_v_v                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bcdcpsgn_dot_v_v_v(dst, src, src2)) }
 inst_bcdtrunc_dot_v_v_v_imm              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDTRUNC_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_bcdtrunc_dot_v_v_v_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_bcdtrunc_dot_v_v_v_imm(dst, src, src2, imm)) }
+emit_bcdtrunc_dot_v_v_v_imm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_bcdtrunc_dot_v_v_v_imm(dst, src, src2, imm)) }
 inst_bcdutrunc_dot_v_v_v                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BCDUTRUNC_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bcdutrunc_dot_v_v_v                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bcdutrunc_dot_v_v_v(dst, src, src2)) }
+emit_bcdutrunc_dot_v_v_v                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bcdutrunc_dot_v_v_v(dst, src, src2)) }
 inst_bcdcfsq_dot_v_v_imm                 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .BCDCFSQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_bcdcfsq_dot_v_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_bcdcfsq_dot_v_v_imm(dst, src, imm)) }
+emit_bcdcfsq_dot_v_v_imm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_bcdcfsq_dot_v_v_imm(dst, src, imm)) }
 inst_bcdctsq_dot_v_v                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .BCDCTSQ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_bcdctsq_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_bcdctsq_dot_v_v(dst, src)) }
+emit_bcdctsq_dot_v_v                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_bcdctsq_dot_v_v(dst, src)) }
 inst_scv_imm                             :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .SCV, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_scv_imm                             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_scv_imm(imm)) }
+emit_scv_imm                             :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_scv_imm(imm)) }
 inst_bdnztl_crb_rel                      :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BDNZTL, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label), {}, {}}} }
-emit_bdnztl_crb_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_bdnztl_crb_rel(dst, label)) }
+emit_bdnztl_crb_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_bdnztl_crb_rel(dst, label)) }
 inst_bdztl_crb_rel                       :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BDZTL, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label), {}, {}}} }
-emit_bdztl_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_bdztl_crb_rel(dst, label)) }
+emit_bdztl_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_bdztl_crb_rel(dst, label)) }
 inst_bdnzfl_crb_rel                      :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BDNZFL, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label), {}, {}}} }
-emit_bdnzfl_crb_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_bdnzfl_crb_rel(dst, label)) }
+emit_bdnzfl_crb_rel                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_bdnzfl_crb_rel(dst, label)) }
 inst_bdzfl_crb_rel                       :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BDZFL, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label), {}, {}}} }
-emit_bdzfl_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_bdzfl_crb_rel(dst, label)) }
+emit_bdzfl_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_bdzfl_crb_rel(dst, label)) }
 inst_bdnztlr_crb                         :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BDNZTLR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_bdnztlr_crb                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bdnztlr_crb(dst)) }
+emit_bdnztlr_crb                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bdnztlr_crb(dst)) }
 inst_bdztlr_crb                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BDZTLR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_bdztlr_crb                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bdztlr_crb(dst)) }
+emit_bdztlr_crb                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bdztlr_crb(dst)) }
 inst_bdnzflr_crb                         :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BDNZFLR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_bdnzflr_crb                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bdnzflr_crb(dst)) }
+emit_bdnzflr_crb                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bdnzflr_crb(dst)) }
 inst_bdzflr_crb                          :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BDZFLR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_bdzflr_crb                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bdzflr_crb(dst)) }
+emit_bdzflr_crb                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bdzflr_crb(dst)) }
 inst_bdnztlrl_crb                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BDNZTLRL, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_bdnztlrl_crb                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bdnztlrl_crb(dst)) }
+emit_bdnztlrl_crb                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bdnztlrl_crb(dst)) }
 inst_bdztlrl_crb                         :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BDZTLRL, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_bdztlrl_crb                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bdztlrl_crb(dst)) }
+emit_bdztlrl_crb                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bdztlrl_crb(dst)) }
 inst_bdnzflrl_crb                        :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BDNZFLRL, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_bdnzflrl_crb                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bdnzflrl_crb(dst)) }
+emit_bdnzflrl_crb                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bdnzflrl_crb(dst)) }
 inst_bdzflrl_crb                         :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .BDZFLRL, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_bdzflrl_crb                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_bdzflrl_crb(dst)) }
+emit_bdzflrl_crb                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_bdzflrl_crb(dst)) }
 inst_mtcr_r                              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtcr_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtcr_r(dst)) }
+emit_mtcr_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtcr_r(dst)) }
 inst_mfdscr_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFDSCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfdscr_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfdscr_r(dst)) }
+emit_mfdscr_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfdscr_r(dst)) }
 inst_mtdscr_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTDSCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtdscr_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtdscr_r(dst)) }
+emit_mtdscr_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtdscr_r(dst)) }
 inst_mfcfar_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFCFAR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfcfar_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfcfar_r(dst)) }
+emit_mfcfar_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfcfar_r(dst)) }
 inst_mtcfar_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTCFAR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtcfar_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtcfar_r(dst)) }
+emit_mtcfar_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtcfar_r(dst)) }
 inst_mfppr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFPPR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfppr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfppr_r(dst)) }
+emit_mfppr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfppr_r(dst)) }
 inst_mtppr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTPPR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtppr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtppr_r(dst)) }
+emit_mtppr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtppr_r(dst)) }
 inst_mfdec_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFDEC, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfdec_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfdec_r(dst)) }
+emit_mfdec_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfdec_r(dst)) }
 inst_mtdec_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTDEC, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtdec_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtdec_r(dst)) }
+emit_mtdec_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtdec_r(dst)) }
 inst_mfsrr0_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFSRR0, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfsrr0_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfsrr0_r(dst)) }
+emit_mfsrr0_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfsrr0_r(dst)) }
 inst_mtsrr0_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTSRR0, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtsrr0_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtsrr0_r(dst)) }
+emit_mtsrr0_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtsrr0_r(dst)) }
 inst_mfsrr1_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFSRR1, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfsrr1_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfsrr1_r(dst)) }
+emit_mfsrr1_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfsrr1_r(dst)) }
 inst_mtsrr1_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTSRR1, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtsrr1_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtsrr1_r(dst)) }
+emit_mtsrr1_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtsrr1_r(dst)) }
 inst_mfdar_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFDAR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfdar_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfdar_r(dst)) }
+emit_mfdar_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfdar_r(dst)) }
 inst_mtdar_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTDAR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtdar_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtdar_r(dst)) }
+emit_mtdar_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtdar_r(dst)) }
 inst_mfdsisr_r                           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFDSISR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfdsisr_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfdsisr_r(dst)) }
+emit_mfdsisr_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfdsisr_r(dst)) }
 inst_mtdsisr_r                           :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTDSISR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtdsisr_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtdsisr_r(dst)) }
+emit_mtdsisr_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtdsisr_r(dst)) }
 inst_mfasr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFASR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfasr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfasr_r(dst)) }
+emit_mfasr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfasr_r(dst)) }
 inst_mtasr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTASR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtasr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtasr_r(dst)) }
+emit_mtasr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtasr_r(dst)) }
 inst_mfamr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFAMR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfamr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfamr_r(dst)) }
+emit_mfamr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfamr_r(dst)) }
 inst_mtamr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTAMR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtamr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtamr_r(dst)) }
+emit_mtamr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtamr_r(dst)) }
 inst_mftcr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFTCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mftcr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mftcr_r(dst)) }
+emit_mftcr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mftcr_r(dst)) }
 inst_mttcr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTTCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mttcr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mttcr_r(dst)) }
+emit_mttcr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mttcr_r(dst)) }
 inst_mfesr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFESR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfesr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfesr_r(dst)) }
+emit_mfesr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfesr_r(dst)) }
 inst_mtesr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTESR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtesr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtesr_r(dst)) }
+emit_mtesr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtesr_r(dst)) }
 inst_mfdccr_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFDCCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfdccr_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfdccr_r(dst)) }
+emit_mfdccr_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfdccr_r(dst)) }
 inst_mtdccr_r                            :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTDCCR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtdccr_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtdccr_r(dst)) }
+emit_mtdccr_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtdccr_r(dst)) }
 inst_mtbr0_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTBR0, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtbr0_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtbr0_r(dst)) }
+emit_mtbr0_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtbr0_r(dst)) }
 inst_mtbr1_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTBR1, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtbr1_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtbr1_r(dst)) }
+emit_mtbr1_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtbr1_r(dst)) }
 inst_mttbl_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTTBL, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mttbl_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mttbl_r(dst)) }
+emit_mttbl_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mttbl_r(dst)) }
 inst_mttbu_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTTBU, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mttbu_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mttbu_r(dst)) }
+emit_mttbu_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mttbu_r(dst)) }
 inst_lwat_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LWAT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_lwat_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_lwat_r_r_imm(dst, src, imm)) }
+emit_lwat_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_lwat_r_r_imm(dst, src, imm)) }
 inst_ldat_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LDAT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_ldat_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ldat_r_r_imm(dst, src, imm)) }
+emit_ldat_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ldat_r_r_imm(dst, src, imm)) }
 inst_stwat_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .STWAT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_stwat_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_stwat_r_r_imm(dst, src, imm)) }
+emit_stwat_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_stwat_r_r_imm(dst, src, imm)) }
 inst_stdat_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .STDAT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_stdat_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_stdat_r_r_imm(dst, src, imm)) }
+emit_stdat_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_stdat_r_r_imm(dst, src, imm)) }
 inst_vextsd2q_v_v                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXTSD2Q, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vextsd2q_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vextsd2q_v_v(dst, src)) }
+emit_vextsd2q_v_v                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vextsd2q_v_v(dst, src)) }
 inst_lxvprl_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVPRL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvprl_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvprl_vs_r_r(dst, src, src2)) }
+emit_lxvprl_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvprl_vs_r_r(dst, src, src2)) }
 inst_lxvprll_vs_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVPRLL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvprll_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvprll_vs_r_r(dst, src, src2)) }
+emit_lxvprll_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvprll_vs_r_r(dst, src, src2)) }
 inst_stxvprl_vs_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVPRL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvprl_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvprl_vs_r_r(dst, src, src2)) }
+emit_stxvprl_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvprl_vs_r_r(dst, src, src2)) }
 inst_stxvprll_vs_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVPRLL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvprll_vs_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvprll_vs_r_r(dst, src, src2)) }
+emit_stxvprll_vs_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvprll_vs_r_r(dst, src, src2)) }
 inst_lxvrl_vs_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVRL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvrl_vs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvrl_vs_r_r(dst, src, src2)) }
+emit_lxvrl_vs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvrl_vs_r_r(dst, src, src2)) }
 inst_lxvrll_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVRLL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvrll_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvrll_vs_r_r(dst, src, src2)) }
+emit_lxvrll_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvrll_vs_r_r(dst, src, src2)) }
 inst_stxvrl_vs_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVRL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvrl_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvrl_vs_r_r(dst, src, src2)) }
+emit_stxvrl_vs_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvrl_vs_r_r(dst, src, src2)) }
 inst_stxvrll_vs_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STXVRLL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stxvrll_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stxvrll_vs_r_r(dst, src, src2)) }
+emit_stxvrll_vs_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stxvrll_vs_r_r(dst, src, src2)) }
 inst_rfmci_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .RFMCI, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_rfmci_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rfmci_none()) }
+emit_rfmci_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rfmci_none()) }
 inst_nop_none                            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .NOP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_nop_none                            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nop_none()) }
+emit_nop_none                            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nop_none()) }
 inst_xnop_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .XNOP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_xnop_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xnop_none()) }
+emit_xnop_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xnop_none()) }
 inst_li_r_simm                           :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_li_r_simm                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_li_r_simm(dst, imm)) }
+emit_li_r_simm                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_li_r_simm(dst, imm)) }
 inst_lis_r_simm                          :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LIS, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_lis_r_simm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_lis_r_simm(dst, imm)) }
+emit_lis_r_simm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_lis_r_simm(dst, imm)) }
 inst_la_r_mem                            :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LA, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_la_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_la_r_mem(dst, addr)) }
+emit_la_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_la_r_mem(dst, addr)) }
 inst_mr_r_r                              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mr_r_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mr_r_r(dst, src)) }
+emit_mr_r_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mr_r_r(dst, src)) }
 inst_mr_dot_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MR_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mr_dot_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mr_dot_r_r(dst, src)) }
+emit_mr_dot_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mr_dot_r_r(dst, src)) }
 inst_not_r_r                             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_not_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_not_r_r(dst, src)) }
+emit_not_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_not_r_r(dst, src)) }
 inst_not_dot_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .NOT_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_not_dot_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_not_dot_r_r(dst, src)) }
+emit_not_dot_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_not_dot_r_r(dst, src)) }
 inst_blr_none                            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BLR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_blr_none                            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_blr_none()) }
+emit_blr_none                            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_blr_none()) }
 inst_blrl_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BLRL, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_blrl_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_blrl_none()) }
+emit_blrl_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_blrl_none()) }
 inst_bctr_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BCTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bctr_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bctr_none()) }
+emit_bctr_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bctr_none()) }
 inst_bctrl_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BCTRL, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bctrl_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bctrl_none()) }
+emit_bctrl_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bctrl_none()) }
 inst_beq_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BEQ, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_beq_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_beq_rel(label)) }
+emit_beq_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_beq_rel(label)) }
 inst_bne_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BNE, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bne_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bne_rel(label)) }
+emit_bne_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bne_rel(label)) }
 inst_blt_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BLT, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_blt_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_blt_rel(label)) }
+emit_blt_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_blt_rel(label)) }
 inst_ble_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BLE, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_ble_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_ble_rel(label)) }
+emit_ble_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_ble_rel(label)) }
 inst_bgt_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BGT, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bgt_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bgt_rel(label)) }
+emit_bgt_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bgt_rel(label)) }
 inst_bge_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BGE, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bge_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bge_rel(label)) }
+emit_bge_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bge_rel(label)) }
 inst_bso_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BSO, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bso_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bso_rel(label)) }
+emit_bso_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bso_rel(label)) }
 inst_bns_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BNS, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bns_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bns_rel(label)) }
+emit_bns_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bns_rel(label)) }
 inst_beql_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BEQL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_beql_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_beql_rel(label)) }
+emit_beql_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_beql_rel(label)) }
 inst_bnel_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BNEL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bnel_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bnel_rel(label)) }
+emit_bnel_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bnel_rel(label)) }
 inst_bltl_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BLTL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bltl_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bltl_rel(label)) }
+emit_bltl_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bltl_rel(label)) }
 inst_blel_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BLEL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_blel_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_blel_rel(label)) }
+emit_blel_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_blel_rel(label)) }
 inst_bgtl_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BGTL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bgtl_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bgtl_rel(label)) }
+emit_bgtl_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bgtl_rel(label)) }
 inst_bgel_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BGEL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bgel_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bgel_rel(label)) }
+emit_bgel_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bgel_rel(label)) }
 inst_bsol_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BSOL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bsol_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bsol_rel(label)) }
+emit_bsol_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bsol_rel(label)) }
 inst_bnsl_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BNSL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bnsl_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bnsl_rel(label)) }
+emit_bnsl_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bnsl_rel(label)) }
 inst_beqlr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BEQLR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_beqlr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_beqlr_none()) }
+emit_beqlr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_beqlr_none()) }
 inst_bnelr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BNELR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bnelr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bnelr_none()) }
+emit_bnelr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bnelr_none()) }
 inst_bltlr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BLTLR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bltlr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bltlr_none()) }
+emit_bltlr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bltlr_none()) }
 inst_blelr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BLELR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_blelr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_blelr_none()) }
+emit_blelr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_blelr_none()) }
 inst_bgtlr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BGTLR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bgtlr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bgtlr_none()) }
+emit_bgtlr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bgtlr_none()) }
 inst_bgelr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BGELR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bgelr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bgelr_none()) }
+emit_bgelr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bgelr_none()) }
 inst_bsolr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BSOLR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bsolr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bsolr_none()) }
+emit_bsolr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bsolr_none()) }
 inst_bnslr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BNSLR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bnslr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bnslr_none()) }
+emit_bnslr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bnslr_none()) }
 inst_beqctr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BEQCTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_beqctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_beqctr_none()) }
+emit_beqctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_beqctr_none()) }
 inst_bnectr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BNECTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bnectr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bnectr_none()) }
+emit_bnectr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bnectr_none()) }
 inst_bltctr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BLTCTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bltctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bltctr_none()) }
+emit_bltctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bltctr_none()) }
 inst_blectr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BLECTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_blectr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_blectr_none()) }
+emit_blectr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_blectr_none()) }
 inst_bgtctr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BGTCTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bgtctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bgtctr_none()) }
+emit_bgtctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bgtctr_none()) }
 inst_bgectr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BGECTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bgectr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bgectr_none()) }
+emit_bgectr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bgectr_none()) }
 inst_bsoctr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BSOCTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bsoctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bsoctr_none()) }
+emit_bsoctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bsoctr_none()) }
 inst_bnsctr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BNSCTR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bnsctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bnsctr_none()) }
+emit_bnsctr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bnsctr_none()) }
 inst_bdz_rel                             :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BDZ, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bdz_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bdz_rel(label)) }
+emit_bdz_rel                             :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bdz_rel(label)) }
 inst_bdnz_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BDNZ, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bdnz_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bdnz_rel(label)) }
+emit_bdnz_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bdnz_rel(label)) }
 inst_bdzl_rel                            :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BDZL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bdzl_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bdzl_rel(label)) }
+emit_bdzl_rel                            :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bdzl_rel(label)) }
 inst_bdnzl_rel                           :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .BDNZL, operand_count = 1, length = 4, ops = {op_label(label), {}, {}, {}}} }
-emit_bdnzl_rel                           :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_bdnzl_rel(label)) }
+emit_bdnzl_rel                           :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_bdnzl_rel(label)) }
 inst_bdzlr_none                          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BDZLR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bdzlr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bdzlr_none()) }
+emit_bdzlr_none                          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bdzlr_none()) }
 inst_bdnzlr_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BDNZLR, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bdnzlr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bdnzlr_none()) }
+emit_bdnzlr_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bdnzlr_none()) }
 inst_bdzlrl_none                         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BDZLRL, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bdzlrl_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bdzlrl_none()) }
+emit_bdzlrl_none                         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bdzlrl_none()) }
 inst_bdnzlrl_none                        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .BDNZLRL, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_bdnzlrl_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_bdnzlrl_none()) }
+emit_bdnzlrl_none                        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_bdnzlrl_none()) }
 inst_bdzf_crb_rel                        :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BDZF, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label), {}, {}}} }
-emit_bdzf_crb_rel                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_bdzf_crb_rel(dst, label)) }
+emit_bdzf_crb_rel                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_bdzf_crb_rel(dst, label)) }
 inst_bdzt_crb_rel                        :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BDZT, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label), {}, {}}} }
-emit_bdzt_crb_rel                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_bdzt_crb_rel(dst, label)) }
+emit_bdzt_crb_rel                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_bdzt_crb_rel(dst, label)) }
 inst_bdnzf_crb_rel                       :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BDNZF, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label), {}, {}}} }
-emit_bdnzf_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_bdnzf_crb_rel(dst, label)) }
+emit_bdnzf_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_bdnzf_crb_rel(dst, label)) }
 inst_bdnzt_crb_rel                       :: #force_inline proc "contextless" (dst: Register, label: u32) -> Instruction { return Instruction{mnemonic = .BDNZT, operand_count = 2, length = 4, ops = {op_reg(dst), op_label(label), {}, {}}} }
-emit_bdnzt_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append(instructions, inst_bdnzt_crb_rel(dst, label)) }
+emit_bdnzt_crb_rel                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) { append_elem(instructions, inst_bdnzt_crb_rel(dst, label)) }
 inst_trap_none                           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .TRAP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} }
-emit_trap_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_trap_none()) }
+emit_trap_none                           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_trap_none()) }
 inst_mflr_r                              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFLR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mflr_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mflr_r(dst)) }
+emit_mflr_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mflr_r(dst)) }
 inst_mtlr_r                              :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTLR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtlr_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtlr_r(dst)) }
+emit_mtlr_r                              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtlr_r(dst)) }
 inst_mfctr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFCTR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfctr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfctr_r(dst)) }
+emit_mfctr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfctr_r(dst)) }
 inst_mtctr_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTCTR, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtctr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtctr_r(dst)) }
+emit_mtctr_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtctr_r(dst)) }
 inst_mfxer_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MFXER, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mfxer_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mfxer_r(dst)) }
+emit_mfxer_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mfxer_r(dst)) }
 inst_mtxer_r                             :: #force_inline proc "contextless" (dst: Register) -> Instruction { return Instruction{mnemonic = .MTXER, operand_count = 1, length = 4, ops = {op_reg(dst), {}, {}, {}}} }
-emit_mtxer_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append(instructions, inst_mtxer_r(dst)) }
+emit_mtxer_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register) { append_elem(instructions, inst_mtxer_r(dst)) }
 inst_slwi_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_slwi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_slwi_r_r_imm(dst, src, imm)) }
+emit_slwi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_slwi_r_r_imm(dst, src, imm)) }
 inst_srwi_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_srwi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srwi_r_r_imm(dst, src, imm)) }
+emit_srwi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srwi_r_r_imm(dst, src, imm)) }
 inst_sldi_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_sldi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sldi_r_r_imm(dst, src, imm)) }
+emit_sldi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sldi_r_r_imm(dst, src, imm)) }
 inst_srdi_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SRDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_srdi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_srdi_r_r_imm(dst, src, imm)) }
+emit_srdi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_srdi_r_r_imm(dst, src, imm)) }
 inst_clrrwi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CLRRWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_clrrwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_clrrwi_r_r_imm(dst, src, imm)) }
+emit_clrrwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_clrrwi_r_r_imm(dst, src, imm)) }
 inst_clrlwi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CLRLWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_clrlwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_clrlwi_r_r_imm(dst, src, imm)) }
+emit_clrlwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_clrlwi_r_r_imm(dst, src, imm)) }
 inst_clrrdi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CLRRDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_clrrdi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_clrrdi_r_r_imm(dst, src, imm)) }
+emit_clrrdi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_clrrdi_r_r_imm(dst, src, imm)) }
 inst_clrldi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CLRLDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_clrldi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_clrldi_r_r_imm(dst, src, imm)) }
+emit_clrldi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_clrldi_r_r_imm(dst, src, imm)) }
 inst_extldi_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTLDI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_extldi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_extldi_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_extldi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_extldi_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_extrdi_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTRDI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_extrdi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_extrdi_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_extrdi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_extrdi_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_extlwi_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTLWI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_extlwi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_extlwi_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_extlwi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_extlwi_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_extrwi_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .EXTRWI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_extrwi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_extrwi_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_extrwi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_extrwi_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_inslwi_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INSLWI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_inslwi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_inslwi_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_inslwi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_inslwi_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_insrwi_r_r_imm_imm                  :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .INSRWI, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_insrwi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_insrwi_r_r_imm_imm(dst, src, imm, imm2)) }
+emit_insrwi_r_r_imm_imm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_insrwi_r_r_imm_imm(dst, src, imm, imm2)) }
 inst_rotlw_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ROTLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rotlw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rotlw_r_r_r(dst, src, src2)) }
+emit_rotlw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rotlw_r_r_r(dst, src, src2)) }
 inst_rotlwi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ROTLWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_rotlwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rotlwi_r_r_imm(dst, src, imm)) }
+emit_rotlwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rotlwi_r_r_imm(dst, src, imm)) }
 inst_rotrw_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ROTRW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rotrw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rotrw_r_r_r(dst, src, src2)) }
+emit_rotrw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rotrw_r_r_r(dst, src, src2)) }
 inst_rotld_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ROTLD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rotld_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rotld_r_r_r(dst, src, src2)) }
+emit_rotld_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rotld_r_r_r(dst, src, src2)) }
 inst_rotldi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ROTLDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_rotldi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rotldi_r_r_imm(dst, src, imm)) }
+emit_rotldi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rotldi_r_r_imm(dst, src, imm)) }
 inst_rotrdi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ROTRDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_rotrdi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rotrdi_r_r_imm(dst, src, imm)) }
+emit_rotrdi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rotrdi_r_r_imm(dst, src, imm)) }
 inst_sub_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sub_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_r_r_r(dst, src, src2)) }
+emit_sub_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_r_r_r(dst, src, src2)) }
 inst_sub_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sub_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_dot_r_r_r(dst, src, src2)) }
+emit_sub_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_dot_r_r_r(dst, src, src2)) }
 inst_sub_o_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUB_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sub_o_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_o_r_r_r(dst, src, src2)) }
+emit_sub_o_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_o_r_r_r(dst, src, src2)) }
 inst_sub_o_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUB_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sub_o_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sub_o_dot_r_r_r(dst, src, src2)) }
+emit_sub_o_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sub_o_dot_r_r_r(dst, src, src2)) }
 inst_subc_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subc_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subc_r_r_r(dst, src, src2)) }
+emit_subc_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subc_r_r_r(dst, src, src2)) }
 inst_subc_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBC_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subc_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subc_dot_r_r_r(dst, src, src2)) }
+emit_subc_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subc_dot_r_r_r(dst, src, src2)) }
 inst_subc_o_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBC_O, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subc_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subc_o_r_r_r(dst, src, src2)) }
+emit_subc_o_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subc_o_r_r_r(dst, src, src2)) }
 inst_subc_o_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBC_O_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subc_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subc_o_dot_r_r_r(dst, src, src2)) }
+emit_subc_o_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subc_o_dot_r_r_r(dst, src, src2)) }
 inst_cmpw_crf_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMPW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cmpw_crf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmpw_crf_r_r(dst, src, src2)) }
+emit_cmpw_crf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmpw_crf_r_r(dst, src, src2)) }
 inst_cmplw_crf_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMPLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cmplw_crf_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmplw_crf_r_r(dst, src, src2)) }
+emit_cmplw_crf_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmplw_crf_r_r(dst, src, src2)) }
 inst_cmpd_crf_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMPD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cmpd_crf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmpd_crf_r_r(dst, src, src2)) }
+emit_cmpd_crf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmpd_crf_r_r(dst, src, src2)) }
 inst_cmpld_crf_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CMPLD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cmpld_crf_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cmpld_crf_r_r(dst, src, src2)) }
+emit_cmpld_crf_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cmpld_crf_r_r(dst, src, src2)) }
 inst_cmpwi_crf_r_simm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CMPWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_cmpwi_crf_r_simm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_cmpwi_crf_r_simm(dst, src, imm)) }
+emit_cmpwi_crf_r_simm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_cmpwi_crf_r_simm(dst, src, imm)) }
 inst_cmplwi_crf_r_uimm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CMPLWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_cmplwi_crf_r_uimm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_cmplwi_crf_r_uimm(dst, src, imm)) }
+emit_cmplwi_crf_r_uimm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_cmplwi_crf_r_uimm(dst, src, imm)) }
 inst_cmpdi_crf_r_simm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CMPDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_cmpdi_crf_r_simm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_cmpdi_crf_r_simm(dst, src, imm)) }
+emit_cmpdi_crf_r_simm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_cmpdi_crf_r_simm(dst, src, imm)) }
 inst_cmpldi_crf_r_uimm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CMPLDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_cmpldi_crf_r_uimm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_cmpldi_crf_r_uimm(dst, src, imm)) }
+emit_cmpldi_crf_r_uimm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_cmpldi_crf_r_uimm(dst, src, imm)) }
 inst_evaddw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddw_r_r_r(dst, src, src2)) }
+emit_evaddw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddw_r_r_r(dst, src, src2)) }
 inst_evaddiw_r_r_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EVADDIW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_evaddiw_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_evaddiw_r_r_imm(dst, src, imm)) }
+emit_evaddiw_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_evaddiw_r_r_imm(dst, src, imm)) }
 inst_evsubfw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfw_r_r_r(dst, src, src2)) }
+emit_evsubfw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfw_r_r_r(dst, src, src2)) }
 inst_evsubifw_r_r_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EVSUBIFW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_evsubifw_r_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_evsubifw_r_r_imm(dst, src, imm)) }
+emit_evsubifw_r_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_evsubifw_r_r_imm(dst, src, imm)) }
 inst_evabs_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evabs_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evabs_r_r(dst, src)) }
+emit_evabs_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evabs_r_r(dst, src)) }
 inst_evextsh_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVEXTSH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evextsh_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evextsh_r_r(dst, src)) }
+emit_evextsh_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evextsh_r_r(dst, src)) }
 inst_evextsb_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVEXTSB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evextsb_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evextsb_r_r(dst, src)) }
+emit_evextsb_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evextsb_r_r(dst, src)) }
 inst_evcntlzw_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVCNTLZW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evcntlzw_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evcntlzw_r_r(dst, src)) }
+emit_evcntlzw_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evcntlzw_r_r(dst, src)) }
 inst_evcntlsw_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVCNTLSW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evcntlsw_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evcntlsw_r_r(dst, src)) }
+emit_evcntlsw_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evcntlsw_r_r(dst, src)) }
 inst_evrlw_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrlw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrlw_r_r_r(dst, src, src2)) }
+emit_evrlw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrlw_r_r_r(dst, src, src2)) }
 inst_evrlwi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EVRLWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_evrlwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_evrlwi_r_r_imm(dst, src, imm)) }
+emit_evrlwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_evrlwi_r_r_imm(dst, src, imm)) }
 inst_evslw_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSLW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evslw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evslw_r_r_r(dst, src, src2)) }
+emit_evslw_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evslw_r_r_r(dst, src, src2)) }
 inst_evslwi_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EVSLWI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_evslwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_evslwi_r_r_imm(dst, src, imm)) }
+emit_evslwi_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_evslwi_r_r_imm(dst, src, imm)) }
 inst_evsplati_r_imm                      :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EVSPLATI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_evsplati_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_evsplati_r_imm(dst, imm)) }
+emit_evsplati_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_evsplati_r_imm(dst, imm)) }
 inst_evsplatfi_r_imm                     :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EVSPLATFI, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_evsplatfi_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_evsplatfi_r_imm(dst, imm)) }
+emit_evsplatfi_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_evsplatfi_r_imm(dst, imm)) }
 inst_evsrwu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrwu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrwu_r_r_r(dst, src, src2)) }
+emit_evsrwu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrwu_r_r_r(dst, src, src2)) }
 inst_evsrws_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrws_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrws_r_r_r(dst, src, src2)) }
+emit_evsrws_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrws_r_r_r(dst, src, src2)) }
 inst_evsrwiu_r_r_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EVSRWIU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_evsrwiu_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_evsrwiu_r_r_imm(dst, src, imm)) }
+emit_evsrwiu_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_evsrwiu_r_r_imm(dst, src, imm)) }
 inst_evsrwis_r_r_imm                     :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EVSRWIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_evsrwis_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_evsrwis_r_r_imm(dst, src, imm)) }
+emit_evsrwis_r_r_imm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_evsrwis_r_r_imm(dst, src, imm)) }
 inst_evand_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evand_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evand_r_r_r(dst, src, src2)) }
+emit_evand_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evand_r_r_r(dst, src, src2)) }
 inst_evor_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evor_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evor_r_r_r(dst, src, src2)) }
+emit_evor_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evor_r_r_r(dst, src, src2)) }
 inst_evxor_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVXOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evxor_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evxor_r_r_r(dst, src, src2)) }
+emit_evxor_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evxor_r_r_r(dst, src, src2)) }
 inst_evnand_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNAND, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnand_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnand_r_r_r(dst, src, src2)) }
+emit_evnand_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnand_r_r_r(dst, src, src2)) }
 inst_evnor_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNOR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnor_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnor_r_r_r(dst, src, src2)) }
+emit_evnor_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnor_r_r_r(dst, src, src2)) }
 inst_evandc_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVANDC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evandc_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evandc_r_r_r(dst, src, src2)) }
+emit_evandc_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evandc_r_r_r(dst, src, src2)) }
 inst_evorc_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVORC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evorc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evorc_r_r_r(dst, src, src2)) }
+emit_evorc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evorc_r_r_r(dst, src, src2)) }
 inst_eveqv_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVEQV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eveqv_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eveqv_r_r_r(dst, src, src2)) }
+emit_eveqv_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eveqv_r_r_r(dst, src, src2)) }
 inst_evcmpgts_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPGTS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpgts_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpgts_crf_r_r(dst, src, src2)) }
+emit_evcmpgts_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpgts_crf_r_r(dst, src, src2)) }
 inst_evcmpgtu_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPGTU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpgtu_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpgtu_crf_r_r(dst, src, src2)) }
+emit_evcmpgtu_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpgtu_crf_r_r(dst, src, src2)) }
 inst_evcmplts_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPLTS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmplts_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmplts_crf_r_r(dst, src, src2)) }
+emit_evcmplts_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmplts_crf_r_r(dst, src, src2)) }
 inst_evcmpltu_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPLTU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpltu_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpltu_crf_r_r(dst, src, src2)) }
+emit_evcmpltu_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpltu_crf_r_r(dst, src, src2)) }
 inst_evcmpeq_crf_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpeq_crf_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpeq_crf_r_r(dst, src, src2)) }
+emit_evcmpeq_crf_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpeq_crf_r_r(dst, src, src2)) }
 inst_evsel_r_r_r_crf                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .EVSEL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_evsel_r_r_r_crf                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_evsel_r_r_r_crf(dst, src, src2, src3)) }
+emit_evsel_r_r_r_crf                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_evsel_r_r_r_crf(dst, src, src2, src3)) }
 inst_evmergehi_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMERGEHI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmergehi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmergehi_r_r_r(dst, src, src2)) }
+emit_evmergehi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmergehi_r_r_r(dst, src, src2)) }
 inst_evmergelo_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMERGELO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmergelo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmergelo_r_r_r(dst, src, src2)) }
+emit_evmergelo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmergelo_r_r_r(dst, src, src2)) }
 inst_evmergehilo_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMERGEHILO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmergehilo_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmergehilo_r_r_r(dst, src, src2)) }
+emit_evmergehilo_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmergehilo_r_r_r(dst, src, src2)) }
 inst_evmergelohi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMERGELOHI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmergelohi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmergelohi_r_r_r(dst, src, src2)) }
+emit_evmergelohi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmergelohi_r_r_r(dst, src, src2)) }
 inst_evdivws_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIVWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdivws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdivws_r_r_r(dst, src, src2)) }
+emit_evdivws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdivws_r_r_r(dst, src, src2)) }
 inst_evdivwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIVWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdivwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdivwu_r_r_r(dst, src, src2)) }
+emit_evdivwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdivwu_r_r_r(dst, src, src2)) }
 inst_evmra_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVMRA, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evmra_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evmra_r_r(dst, src)) }
+emit_evmra_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evmra_r_r(dst, src)) }
 inst_evldd_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLDD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evldd_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evldd_r_mem(dst, addr)) }
+emit_evldd_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evldd_r_mem(dst, addr)) }
 inst_evlddx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlddx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlddx_r_r_r(dst, src, src2)) }
+emit_evlddx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlddx_r_r_r(dst, src, src2)) }
 inst_evldw_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLDW, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evldw_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evldw_r_mem(dst, addr)) }
+emit_evldw_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evldw_r_mem(dst, addr)) }
 inst_evldwx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldwx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldwx_r_r_r(dst, src, src2)) }
+emit_evldwx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldwx_r_r_r(dst, src, src2)) }
 inst_evldh_r_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLDH, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evldh_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evldh_r_mem(dst, addr)) }
+emit_evldh_r_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evldh_r_mem(dst, addr)) }
 inst_evldhx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldhx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldhx_r_r_r(dst, src, src2)) }
+emit_evldhx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldhx_r_r_r(dst, src, src2)) }
 inst_evstdd_r_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVSTDD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evstdd_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evstdd_r_mem(dst, addr)) }
+emit_evstdd_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evstdd_r_mem(dst, addr)) }
 inst_evstddx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstddx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstddx_r_r_r(dst, src, src2)) }
+emit_evstddx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstddx_r_r_r(dst, src, src2)) }
 inst_evstdw_r_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVSTDW, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evstdw_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evstdw_r_mem(dst, addr)) }
+emit_evstdw_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evstdw_r_mem(dst, addr)) }
 inst_evstdwx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdwx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdwx_r_r_r(dst, src, src2)) }
+emit_evstdwx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdwx_r_r_r(dst, src, src2)) }
 inst_evstdh_r_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVSTDH, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evstdh_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evstdh_r_mem(dst, addr)) }
+emit_evstdh_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evstdh_r_mem(dst, addr)) }
 inst_evstdhx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdhx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdhx_r_r_r(dst, src, src2)) }
+emit_evstdhx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdhx_r_r_r(dst, src, src2)) }
 inst_evlwwsplat_r_mem                    :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLWWSPLAT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evlwwsplat_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evlwwsplat_r_mem(dst, addr)) }
+emit_evlwwsplat_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evlwwsplat_r_mem(dst, addr)) }
 inst_evlwhsplat_r_mem                    :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLWHSPLAT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evlwhsplat_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evlwhsplat_r_mem(dst, addr)) }
+emit_evlwhsplat_r_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evlwhsplat_r_mem(dst, addr)) }
 inst_evlhhesplat_r_mem                   :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLHHESPLAT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evlhhesplat_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evlhhesplat_r_mem(dst, addr)) }
+emit_evlhhesplat_r_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evlhhesplat_r_mem(dst, addr)) }
 inst_evlhhossplat_r_mem                  :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLHHOSSPLAT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evlhhossplat_r_mem                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evlhhossplat_r_mem(dst, addr)) }
+emit_evlhhossplat_r_mem                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evlhhossplat_r_mem(dst, addr)) }
 inst_evlhhousplat_r_mem                  :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLHHOUSPLAT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evlhhousplat_r_mem                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evlhhousplat_r_mem(dst, addr)) }
+emit_evlhhousplat_r_mem                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evlhhousplat_r_mem(dst, addr)) }
 inst_evlwhe_r_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLWHE, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evlwhe_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evlwhe_r_mem(dst, addr)) }
+emit_evlwhe_r_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evlwhe_r_mem(dst, addr)) }
 inst_evlwhou_r_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLWHOU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evlwhou_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evlwhou_r_mem(dst, addr)) }
+emit_evlwhou_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evlwhou_r_mem(dst, addr)) }
 inst_evlwhos_r_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVLWHOS, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evlwhos_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evlwhos_r_mem(dst, addr)) }
+emit_evlwhos_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evlwhos_r_mem(dst, addr)) }
 inst_evlwhex_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHEX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhex_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhex_r_r_r(dst, src, src2)) }
+emit_evlwhex_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhex_r_r_r(dst, src, src2)) }
 inst_evstwwe_r_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVSTWWE, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evstwwe_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evstwwe_r_mem(dst, addr)) }
+emit_evstwwe_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evstwwe_r_mem(dst, addr)) }
 inst_evstwwo_r_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVSTWWO, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evstwwo_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evstwwo_r_mem(dst, addr)) }
+emit_evstwwo_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evstwwo_r_mem(dst, addr)) }
 inst_evstwhe_r_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVSTWHE, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evstwhe_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evstwhe_r_mem(dst, addr)) }
+emit_evstwhe_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evstwhe_r_mem(dst, addr)) }
 inst_evstwho_r_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .EVSTWHO, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_evstwho_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_evstwho_r_mem(dst, addr)) }
+emit_evstwho_r_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_evstwho_r_mem(dst, addr)) }
 inst_evstwhex_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWHEX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwhex_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwhex_r_r_r(dst, src, src2)) }
+emit_evstwhex_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwhex_r_r_r(dst, src, src2)) }
 inst_evfsadd_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsadd_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsadd_r_r_r(dst, src, src2)) }
+emit_evfsadd_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsadd_r_r_r(dst, src, src2)) }
 inst_evfssub_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfssub_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfssub_r_r_r(dst, src, src2)) }
+emit_evfssub_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfssub_r_r_r(dst, src, src2)) }
 inst_evfsabs_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsabs_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsabs_r_r(dst, src)) }
+emit_evfsabs_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsabs_r_r(dst, src)) }
 inst_evfsnabs_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSNABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsnabs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsnabs_r_r(dst, src)) }
+emit_evfsnabs_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsnabs_r_r(dst, src)) }
 inst_evfsneg_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSNEG, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsneg_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsneg_r_r(dst, src)) }
+emit_evfsneg_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsneg_r_r(dst, src)) }
 inst_evfsmul_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSMUL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsmul_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsmul_r_r_r(dst, src, src2)) }
+emit_evfsmul_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsmul_r_r_r(dst, src, src2)) }
 inst_evfsdiv_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSDIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsdiv_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsdiv_r_r_r(dst, src, src2)) }
+emit_evfsdiv_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsdiv_r_r_r(dst, src, src2)) }
 inst_evfscmpgt_crf_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSCMPGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfscmpgt_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfscmpgt_crf_r_r(dst, src, src2)) }
+emit_evfscmpgt_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfscmpgt_crf_r_r(dst, src, src2)) }
 inst_evfscmplt_crf_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSCMPLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfscmplt_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfscmplt_crf_r_r(dst, src, src2)) }
+emit_evfscmplt_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfscmplt_crf_r_r(dst, src, src2)) }
 inst_evfscmpeq_crf_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSCMPEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfscmpeq_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfscmpeq_crf_r_r(dst, src, src2)) }
+emit_evfscmpeq_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfscmpeq_crf_r_r(dst, src, src2)) }
 inst_evfststgt_crf_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSTSTGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfststgt_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfststgt_crf_r_r(dst, src, src2)) }
+emit_evfststgt_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfststgt_crf_r_r(dst, src, src2)) }
 inst_evfststlt_crf_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSTSTLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfststlt_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfststlt_crf_r_r(dst, src, src2)) }
+emit_evfststlt_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfststlt_crf_r_r(dst, src, src2)) }
 inst_evfststeq_crf_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSTSTEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfststeq_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfststeq_crf_r_r(dst, src, src2)) }
+emit_evfststeq_crf_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfststeq_crf_r_r(dst, src, src2)) }
 inst_evfscfui_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCFUI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfscfui_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfscfui_r_r(dst, src)) }
+emit_evfscfui_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfscfui_r_r(dst, src)) }
 inst_evfscfsi_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCFSI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfscfsi_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfscfsi_r_r(dst, src)) }
+emit_evfscfsi_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfscfsi_r_r(dst, src)) }
 inst_evfscfuf_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCFUF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfscfuf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfscfuf_r_r(dst, src)) }
+emit_evfscfuf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfscfuf_r_r(dst, src)) }
 inst_evfscfsf_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCFSF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfscfsf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfscfsf_r_r(dst, src)) }
+emit_evfscfsf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfscfsf_r_r(dst, src)) }
 inst_evfsctui_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCTUI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsctui_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsctui_r_r(dst, src)) }
+emit_evfsctui_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsctui_r_r(dst, src)) }
 inst_evfsctsi_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCTSI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsctsi_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsctsi_r_r(dst, src)) }
+emit_evfsctsi_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsctsi_r_r(dst, src)) }
 inst_evfsctuf_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCTUF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsctuf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsctuf_r_r(dst, src)) }
+emit_evfsctuf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsctuf_r_r(dst, src)) }
 inst_evfsctsf_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCTSF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsctsf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsctsf_r_r(dst, src)) }
+emit_evfsctsf_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsctsf_r_r(dst, src)) }
 inst_evfsctuiz_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCTUIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsctuiz_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsctuiz_r_r(dst, src)) }
+emit_evfsctuiz_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsctuiz_r_r(dst, src)) }
 inst_evfsctsiz_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCTSIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfsctsiz_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfsctsiz_r_r(dst, src)) }
+emit_evfsctsiz_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfsctsiz_r_r(dst, src)) }
 inst_efsadd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsadd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsadd_r_r_r(dst, src, src2)) }
+emit_efsadd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsadd_r_r_r(dst, src, src2)) }
 inst_efssub_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efssub_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efssub_r_r_r(dst, src, src2)) }
+emit_efssub_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efssub_r_r_r(dst, src, src2)) }
 inst_efsabs_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsabs_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsabs_r_r(dst, src)) }
+emit_efsabs_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsabs_r_r(dst, src)) }
 inst_efsnabs_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSNABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsnabs_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsnabs_r_r(dst, src)) }
+emit_efsnabs_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsnabs_r_r(dst, src)) }
 inst_efsneg_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSNEG, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsneg_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsneg_r_r(dst, src)) }
+emit_efsneg_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsneg_r_r(dst, src)) }
 inst_efsmul_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSMUL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsmul_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsmul_r_r_r(dst, src, src2)) }
+emit_efsmul_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsmul_r_r_r(dst, src, src2)) }
 inst_efsdiv_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSDIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsdiv_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsdiv_r_r_r(dst, src, src2)) }
+emit_efsdiv_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsdiv_r_r_r(dst, src, src2)) }
 inst_efscmpgt_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSCMPGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efscmpgt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efscmpgt_crf_r_r(dst, src, src2)) }
+emit_efscmpgt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efscmpgt_crf_r_r(dst, src, src2)) }
 inst_efscmplt_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSCMPLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efscmplt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efscmplt_crf_r_r(dst, src, src2)) }
+emit_efscmplt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efscmplt_crf_r_r(dst, src, src2)) }
 inst_efscmpeq_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSCMPEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efscmpeq_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efscmpeq_crf_r_r(dst, src, src2)) }
+emit_efscmpeq_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efscmpeq_crf_r_r(dst, src, src2)) }
 inst_efststgt_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSTSTGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efststgt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efststgt_crf_r_r(dst, src, src2)) }
+emit_efststgt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efststgt_crf_r_r(dst, src, src2)) }
 inst_efststlt_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSTSTLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efststlt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efststlt_crf_r_r(dst, src, src2)) }
+emit_efststlt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efststlt_crf_r_r(dst, src, src2)) }
 inst_efststeq_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSTSTEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efststeq_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efststeq_crf_r_r(dst, src, src2)) }
+emit_efststeq_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efststeq_crf_r_r(dst, src, src2)) }
 inst_efscfui_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCFUI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efscfui_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efscfui_r_r(dst, src)) }
+emit_efscfui_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efscfui_r_r(dst, src)) }
 inst_efscfsi_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCFSI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efscfsi_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efscfsi_r_r(dst, src)) }
+emit_efscfsi_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efscfsi_r_r(dst, src)) }
 inst_efscfuf_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCFUF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efscfuf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efscfuf_r_r(dst, src)) }
+emit_efscfuf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efscfuf_r_r(dst, src)) }
 inst_efscfsf_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCFSF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efscfsf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efscfsf_r_r(dst, src)) }
+emit_efscfsf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efscfsf_r_r(dst, src)) }
 inst_efsctui_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCTUI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsctui_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsctui_r_r(dst, src)) }
+emit_efsctui_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsctui_r_r(dst, src)) }
 inst_efsctsi_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCTSI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsctsi_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsctsi_r_r(dst, src)) }
+emit_efsctsi_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsctsi_r_r(dst, src)) }
 inst_efsctuf_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCTUF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsctuf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsctuf_r_r(dst, src)) }
+emit_efsctuf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsctuf_r_r(dst, src)) }
 inst_efsctsf_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCTSF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsctsf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsctsf_r_r(dst, src)) }
+emit_efsctsf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsctsf_r_r(dst, src)) }
 inst_efsctuiz_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCTUIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsctuiz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsctuiz_r_r(dst, src)) }
+emit_efsctuiz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsctuiz_r_r(dst, src)) }
 inst_efsctsiz_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCTSIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efsctsiz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efsctsiz_r_r(dst, src)) }
+emit_efsctsiz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efsctsiz_r_r(dst, src)) }
 inst_efscfd_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCFD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efscfd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efscfd_r_r(dst, src)) }
+emit_efscfd_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efscfd_r_r(dst, src)) }
 inst_efdadd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdadd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdadd_r_r_r(dst, src, src2)) }
+emit_efdadd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdadd_r_r_r(dst, src, src2)) }
 inst_efdsub_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdsub_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdsub_r_r_r(dst, src, src2)) }
+emit_efdsub_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdsub_r_r_r(dst, src, src2)) }
 inst_efdabs_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdabs_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdabs_r_r(dst, src)) }
+emit_efdabs_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdabs_r_r(dst, src)) }
 inst_efdnabs_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDNABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdnabs_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdnabs_r_r(dst, src)) }
+emit_efdnabs_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdnabs_r_r(dst, src)) }
 inst_efdneg_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDNEG, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdneg_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdneg_r_r(dst, src)) }
+emit_efdneg_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdneg_r_r(dst, src)) }
 inst_efdmul_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDMUL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdmul_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdmul_r_r_r(dst, src, src2)) }
+emit_efdmul_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdmul_r_r_r(dst, src, src2)) }
 inst_efddiv_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDDIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efddiv_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efddiv_r_r_r(dst, src, src2)) }
+emit_efddiv_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efddiv_r_r_r(dst, src, src2)) }
 inst_efdcmpgt_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDCMPGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdcmpgt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdcmpgt_crf_r_r(dst, src, src2)) }
+emit_efdcmpgt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdcmpgt_crf_r_r(dst, src, src2)) }
 inst_efdcmplt_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDCMPLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdcmplt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdcmplt_crf_r_r(dst, src, src2)) }
+emit_efdcmplt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdcmplt_crf_r_r(dst, src, src2)) }
 inst_efdcmpeq_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDCMPEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdcmpeq_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdcmpeq_crf_r_r(dst, src, src2)) }
+emit_efdcmpeq_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdcmpeq_crf_r_r(dst, src, src2)) }
 inst_efdtstgt_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDTSTGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdtstgt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdtstgt_crf_r_r(dst, src, src2)) }
+emit_efdtstgt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdtstgt_crf_r_r(dst, src, src2)) }
 inst_efdtstlt_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDTSTLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdtstlt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdtstlt_crf_r_r(dst, src, src2)) }
+emit_efdtstlt_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdtstlt_crf_r_r(dst, src, src2)) }
 inst_efdtsteq_crf_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDTSTEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdtsteq_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdtsteq_crf_r_r(dst, src, src2)) }
+emit_efdtsteq_crf_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdtsteq_crf_r_r(dst, src, src2)) }
 inst_efdcfui_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCFUI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcfui_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcfui_r_r(dst, src)) }
+emit_efdcfui_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcfui_r_r(dst, src)) }
 inst_efdcfsi_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCFSI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcfsi_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcfsi_r_r(dst, src)) }
+emit_efdcfsi_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcfsi_r_r(dst, src)) }
 inst_efdcfuf_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCFUF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcfuf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcfuf_r_r(dst, src)) }
+emit_efdcfuf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcfuf_r_r(dst, src)) }
 inst_efdcfsf_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCFSF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcfsf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcfsf_r_r(dst, src)) }
+emit_efdcfsf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcfsf_r_r(dst, src)) }
 inst_efdctui_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTUI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdctui_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdctui_r_r(dst, src)) }
+emit_efdctui_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdctui_r_r(dst, src)) }
 inst_efdctsi_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTSI, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdctsi_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdctsi_r_r(dst, src)) }
+emit_efdctsi_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdctsi_r_r(dst, src)) }
 inst_efdctuf_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTUF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdctuf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdctuf_r_r(dst, src)) }
+emit_efdctuf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdctuf_r_r(dst, src)) }
 inst_efdctsf_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTSF, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdctsf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdctsf_r_r(dst, src)) }
+emit_efdctsf_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdctsf_r_r(dst, src)) }
 inst_efdctuiz_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTUIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdctuiz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdctuiz_r_r(dst, src)) }
+emit_efdctuiz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdctuiz_r_r(dst, src)) }
 inst_efdctsiz_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTSIZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdctsiz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdctsiz_r_r(dst, src)) }
+emit_efdctsiz_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdctsiz_r_r(dst, src)) }
 inst_efdcfs_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCFS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcfs_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcfs_r_r(dst, src)) }
+emit_efdcfs_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcfs_r_r(dst, src)) }
 inst_efdcfsid_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCFSID, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcfsid_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcfsid_r_r(dst, src)) }
+emit_efdcfsid_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcfsid_r_r(dst, src)) }
 inst_efdcfuid_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCFUID, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcfuid_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcfuid_r_r(dst, src)) }
+emit_efdcfuid_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcfuid_r_r(dst, src)) }
 inst_efdctsidz_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTSIDZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdctsidz_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdctsidz_r_r(dst, src)) }
+emit_efdctsidz_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdctsidz_r_r(dst, src)) }
 inst_efdctuidz_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTUIDZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdctuidz_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdctuidz_r_r(dst, src)) }
+emit_efdctuidz_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdctuidz_r_r(dst, src)) }
 inst_evmhossf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhossf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhossf_r_r_r(dst, src, src2)) }
+emit_evmhossf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhossf_r_r_r(dst, src, src2)) }
 inst_evmhossfa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhossfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhossfa_r_r_r(dst, src, src2)) }
+emit_evmhossfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhossfa_r_r_r(dst, src, src2)) }
 inst_evmhossfaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhossfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhossfaaw_r_r_r(dst, src, src2)) }
+emit_evmhossfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhossfaaw_r_r_r(dst, src, src2)) }
 inst_evmhossfanw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSSFANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhossfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhossfanw_r_r_r(dst, src, src2)) }
+emit_evmhossfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhossfanw_r_r_r(dst, src, src2)) }
 inst_evmhossiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhossiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhossiaaw_r_r_r(dst, src, src2)) }
+emit_evmhossiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhossiaaw_r_r_r(dst, src, src2)) }
 inst_evmhossianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSSIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhossianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhossianw_r_r_r(dst, src, src2)) }
+emit_evmhossianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhossianw_r_r_r(dst, src, src2)) }
 inst_evmhosmf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosmf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosmf_r_r_r(dst, src, src2)) }
+emit_evmhosmf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosmf_r_r_r(dst, src, src2)) }
 inst_evmhosmfa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosmfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosmfa_r_r_r(dst, src, src2)) }
+emit_evmhosmfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosmfa_r_r_r(dst, src, src2)) }
 inst_evmhosmfaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSMFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosmfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosmfaaw_r_r_r(dst, src, src2)) }
+emit_evmhosmfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosmfaaw_r_r_r(dst, src, src2)) }
 inst_evmhosmfanw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSMFANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosmfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosmfanw_r_r_r(dst, src, src2)) }
+emit_evmhosmfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosmfanw_r_r_r(dst, src, src2)) }
 inst_evmhosmi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosmi_r_r_r(dst, src, src2)) }
+emit_evmhosmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosmi_r_r_r(dst, src, src2)) }
 inst_evmhosmia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosmia_r_r_r(dst, src, src2)) }
+emit_evmhosmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosmia_r_r_r(dst, src, src2)) }
 inst_evmhosmiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosmiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosmiaaw_r_r_r(dst, src, src2)) }
+emit_evmhosmiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosmiaaw_r_r_r(dst, src, src2)) }
 inst_evmhosmianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSMIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosmianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosmianw_r_r_r(dst, src, src2)) }
+emit_evmhosmianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosmianw_r_r_r(dst, src, src2)) }
 inst_evmhesmf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesmf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesmf_r_r_r(dst, src, src2)) }
+emit_evmhesmf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesmf_r_r_r(dst, src, src2)) }
 inst_evmhesmfa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesmfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesmfa_r_r_r(dst, src, src2)) }
+emit_evmhesmfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesmfa_r_r_r(dst, src, src2)) }
 inst_evmhesmfaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESMFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesmfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesmfaaw_r_r_r(dst, src, src2)) }
+emit_evmhesmfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesmfaaw_r_r_r(dst, src, src2)) }
 inst_evmhesmfanw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESMFANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesmfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesmfanw_r_r_r(dst, src, src2)) }
+emit_evmhesmfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesmfanw_r_r_r(dst, src, src2)) }
 inst_evmhesmi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesmi_r_r_r(dst, src, src2)) }
+emit_evmhesmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesmi_r_r_r(dst, src, src2)) }
 inst_evmhesmia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesmia_r_r_r(dst, src, src2)) }
+emit_evmhesmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesmia_r_r_r(dst, src, src2)) }
 inst_evmhesmiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesmiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesmiaaw_r_r_r(dst, src, src2)) }
+emit_evmhesmiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesmiaaw_r_r_r(dst, src, src2)) }
 inst_evmhesmianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESMIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesmianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesmianw_r_r_r(dst, src, src2)) }
+emit_evmhesmianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesmianw_r_r_r(dst, src, src2)) }
 inst_evmhessf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhessf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhessf_r_r_r(dst, src, src2)) }
+emit_evmhessf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhessf_r_r_r(dst, src, src2)) }
 inst_evmhessfa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhessfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhessfa_r_r_r(dst, src, src2)) }
+emit_evmhessfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhessfa_r_r_r(dst, src, src2)) }
 inst_evmhessfaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhessfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhessfaaw_r_r_r(dst, src, src2)) }
+emit_evmhessfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhessfaaw_r_r_r(dst, src, src2)) }
 inst_evmhessfanw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESSFANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhessfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhessfanw_r_r_r(dst, src, src2)) }
+emit_evmhessfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhessfanw_r_r_r(dst, src, src2)) }
 inst_evmhessiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhessiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhessiaaw_r_r_r(dst, src, src2)) }
+emit_evmhessiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhessiaaw_r_r_r(dst, src, src2)) }
 inst_evmhessianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESSIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhessianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhessianw_r_r_r(dst, src, src2)) }
+emit_evmhessianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhessianw_r_r_r(dst, src, src2)) }
 inst_evmheumi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmheumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmheumi_r_r_r(dst, src, src2)) }
+emit_evmheumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmheumi_r_r_r(dst, src, src2)) }
 inst_evmheumia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmheumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmheumia_r_r_r(dst, src, src2)) }
+emit_evmheumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmheumia_r_r_r(dst, src, src2)) }
 inst_evmheumiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmheumiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmheumiaaw_r_r_r(dst, src, src2)) }
+emit_evmheumiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmheumiaaw_r_r_r(dst, src, src2)) }
 inst_evmheumianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEUMIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmheumianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmheumianw_r_r_r(dst, src, src2)) }
+emit_evmheumianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmheumianw_r_r_r(dst, src, src2)) }
 inst_evmheusiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmheusiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmheusiaaw_r_r_r(dst, src, src2)) }
+emit_evmheusiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmheusiaaw_r_r_r(dst, src, src2)) }
 inst_evmheusianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEUSIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmheusianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmheusianw_r_r_r(dst, src, src2)) }
+emit_evmheusianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmheusianw_r_r_r(dst, src, src2)) }
 inst_evmhoumi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhoumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhoumi_r_r_r(dst, src, src2)) }
+emit_evmhoumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhoumi_r_r_r(dst, src, src2)) }
 inst_evmhoumia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhoumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhoumia_r_r_r(dst, src, src2)) }
+emit_evmhoumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhoumia_r_r_r(dst, src, src2)) }
 inst_evmhoumiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhoumiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhoumiaaw_r_r_r(dst, src, src2)) }
+emit_evmhoumiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhoumiaaw_r_r_r(dst, src, src2)) }
 inst_evmhoumianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOUMIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhoumianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhoumianw_r_r_r(dst, src, src2)) }
+emit_evmhoumianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhoumianw_r_r_r(dst, src, src2)) }
 inst_evmhousiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhousiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhousiaaw_r_r_r(dst, src, src2)) }
+emit_evmhousiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhousiaaw_r_r_r(dst, src, src2)) }
 inst_evmhousianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOUSIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhousianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhousianw_r_r_r(dst, src, src2)) }
+emit_evmhousianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhousianw_r_r_r(dst, src, src2)) }
 inst_evmhogsmfaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOGSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhogsmfaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhogsmfaa_r_r_r(dst, src, src2)) }
+emit_evmhogsmfaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhogsmfaa_r_r_r(dst, src, src2)) }
 inst_evmhogsmfan_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOGSMFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhogsmfan_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhogsmfan_r_r_r(dst, src, src2)) }
+emit_evmhogsmfan_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhogsmfan_r_r_r(dst, src, src2)) }
 inst_evmhogsmiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOGSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhogsmiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhogsmiaa_r_r_r(dst, src, src2)) }
+emit_evmhogsmiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhogsmiaa_r_r_r(dst, src, src2)) }
 inst_evmhogsmian_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOGSMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhogsmian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhogsmian_r_r_r(dst, src, src2)) }
+emit_evmhogsmian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhogsmian_r_r_r(dst, src, src2)) }
 inst_evmhogumiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOGUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhogumiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhogumiaa_r_r_r(dst, src, src2)) }
+emit_evmhogumiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhogumiaa_r_r_r(dst, src, src2)) }
 inst_evmhogumian_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOGUMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhogumian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhogumian_r_r_r(dst, src, src2)) }
+emit_evmhogumian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhogumian_r_r_r(dst, src, src2)) }
 inst_evmhegsmfaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEGSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhegsmfaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhegsmfaa_r_r_r(dst, src, src2)) }
+emit_evmhegsmfaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhegsmfaa_r_r_r(dst, src, src2)) }
 inst_evmhegsmfan_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEGSMFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhegsmfan_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhegsmfan_r_r_r(dst, src, src2)) }
+emit_evmhegsmfan_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhegsmfan_r_r_r(dst, src, src2)) }
 inst_evmhegsmiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEGSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhegsmiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhegsmiaa_r_r_r(dst, src, src2)) }
+emit_evmhegsmiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhegsmiaa_r_r_r(dst, src, src2)) }
 inst_evmhegsmian_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEGSMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhegsmian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhegsmian_r_r_r(dst, src, src2)) }
+emit_evmhegsmian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhegsmian_r_r_r(dst, src, src2)) }
 inst_evmhegumiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEGUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhegumiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhegumiaa_r_r_r(dst, src, src2)) }
+emit_evmhegumiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhegumiaa_r_r_r(dst, src, src2)) }
 inst_evmhegumian_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHEGUMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhegumian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhegumian_r_r_r(dst, src, src2)) }
+emit_evmhegumian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhegumian_r_r_r(dst, src, src2)) }
 inst_evmwhssf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssf_r_r_r(dst, src, src2)) }
+emit_evmwhssf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssf_r_r_r(dst, src, src2)) }
 inst_evmwhssfa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfa_r_r_r(dst, src, src2)) }
+emit_evmwhssfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfa_r_r_r(dst, src, src2)) }
 inst_evmwlssiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlssiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlssiaaw_r_r_r(dst, src, src2)) }
+emit_evmwlssiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlssiaaw_r_r_r(dst, src, src2)) }
 inst_evmwlssianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSSIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlssianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlssianw_r_r_r(dst, src, src2)) }
+emit_evmwlssianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlssianw_r_r_r(dst, src, src2)) }
 inst_evmwhsmf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhsmf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhsmf_r_r_r(dst, src, src2)) }
+emit_evmwhsmf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhsmf_r_r_r(dst, src, src2)) }
 inst_evmwhsmfa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhsmfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhsmfa_r_r_r(dst, src, src2)) }
+emit_evmwhsmfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhsmfa_r_r_r(dst, src, src2)) }
 inst_evmwhsmi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhsmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhsmi_r_r_r(dst, src, src2)) }
+emit_evmwhsmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhsmi_r_r_r(dst, src, src2)) }
 inst_evmwhsmia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhsmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhsmia_r_r_r(dst, src, src2)) }
+emit_evmwhsmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhsmia_r_r_r(dst, src, src2)) }
 inst_evmwhumi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhumi_r_r_r(dst, src, src2)) }
+emit_evmwhumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhumi_r_r_r(dst, src, src2)) }
 inst_evmwhumia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhumia_r_r_r(dst, src, src2)) }
+emit_evmwhumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhumia_r_r_r(dst, src, src2)) }
 inst_evmwlsmiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlsmiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlsmiaaw_r_r_r(dst, src, src2)) }
+emit_evmwlsmiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlsmiaaw_r_r_r(dst, src, src2)) }
 inst_evmwlsmianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSMIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlsmianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlsmianw_r_r_r(dst, src, src2)) }
+emit_evmwlsmianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlsmianw_r_r_r(dst, src, src2)) }
 inst_evmwlumi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlumi_r_r_r(dst, src, src2)) }
+emit_evmwlumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlumi_r_r_r(dst, src, src2)) }
 inst_evmwlumia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlumia_r_r_r(dst, src, src2)) }
+emit_evmwlumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlumia_r_r_r(dst, src, src2)) }
 inst_evmwlumiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlumiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlumiaaw_r_r_r(dst, src, src2)) }
+emit_evmwlumiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlumiaaw_r_r_r(dst, src, src2)) }
 inst_evmwlumianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUMIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlumianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlumianw_r_r_r(dst, src, src2)) }
+emit_evmwlumianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlumianw_r_r_r(dst, src, src2)) }
 inst_evmwlusiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlusiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlusiaaw_r_r_r(dst, src, src2)) }
+emit_evmwlusiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlusiaaw_r_r_r(dst, src, src2)) }
 inst_evmwlusianw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUSIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlusianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlusianw_r_r_r(dst, src, src2)) }
+emit_evmwlusianw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlusianw_r_r_r(dst, src, src2)) }
 inst_evmwsmf_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwsmf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwsmf_r_r_r(dst, src, src2)) }
+emit_evmwsmf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwsmf_r_r_r(dst, src, src2)) }
 inst_evmwsmfa_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwsmfa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwsmfa_r_r_r(dst, src, src2)) }
+emit_evmwsmfa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwsmfa_r_r_r(dst, src, src2)) }
 inst_evmwsmfaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwsmfaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwsmfaa_r_r_r(dst, src, src2)) }
+emit_evmwsmfaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwsmfaa_r_r_r(dst, src, src2)) }
 inst_evmwsmfan_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSMFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwsmfan_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwsmfan_r_r_r(dst, src, src2)) }
+emit_evmwsmfan_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwsmfan_r_r_r(dst, src, src2)) }
 inst_evmwsmi_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwsmi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwsmi_r_r_r(dst, src, src2)) }
+emit_evmwsmi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwsmi_r_r_r(dst, src, src2)) }
 inst_evmwsmia_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwsmia_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwsmia_r_r_r(dst, src, src2)) }
+emit_evmwsmia_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwsmia_r_r_r(dst, src, src2)) }
 inst_evmwsmiaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwsmiaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwsmiaa_r_r_r(dst, src, src2)) }
+emit_evmwsmiaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwsmiaa_r_r_r(dst, src, src2)) }
 inst_evmwsmian_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwsmian_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwsmian_r_r_r(dst, src, src2)) }
+emit_evmwsmian_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwsmian_r_r_r(dst, src, src2)) }
 inst_evmwssf_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwssf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwssf_r_r_r(dst, src, src2)) }
+emit_evmwssf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwssf_r_r_r(dst, src, src2)) }
 inst_evmwssfa_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwssfa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwssfa_r_r_r(dst, src, src2)) }
+emit_evmwssfa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwssfa_r_r_r(dst, src, src2)) }
 inst_evmwssfaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSSFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwssfaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwssfaa_r_r_r(dst, src, src2)) }
+emit_evmwssfaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwssfaa_r_r_r(dst, src, src2)) }
 inst_evmwssfan_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSSFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwssfan_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwssfan_r_r_r(dst, src, src2)) }
+emit_evmwssfan_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwssfan_r_r_r(dst, src, src2)) }
 inst_evmwumi_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwumi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwumi_r_r_r(dst, src, src2)) }
+emit_evmwumi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwumi_r_r_r(dst, src, src2)) }
 inst_evmwumia_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwumia_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwumia_r_r_r(dst, src, src2)) }
+emit_evmwumia_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwumia_r_r_r(dst, src, src2)) }
 inst_evmwumiaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwumiaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwumiaa_r_r_r(dst, src, src2)) }
+emit_evmwumiaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwumiaa_r_r_r(dst, src, src2)) }
 inst_evmwumian_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWUMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwumian_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwumian_r_r_r(dst, src, src2)) }
+emit_evmwumian_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwumian_r_r_r(dst, src, src2)) }
 inst_brinc_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BRINC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_brinc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_brinc_r_r_r(dst, src, src2)) }
+emit_brinc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_brinc_r_r_r(dst, src, src2)) }
 inst_evlwhsplatx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHSPLATX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhsplatx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhsplatx_r_r_r(dst, src, src2)) }
+emit_evlwhsplatx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhsplatx_r_r_r(dst, src, src2)) }
 inst_evlwwsplatx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWWSPLATX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwwsplatx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwwsplatx_r_r_r(dst, src, src2)) }
+emit_evlwwsplatx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwwsplatx_r_r_r(dst, src, src2)) }
 inst_evlhhesplatx_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHESPLATX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhesplatx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhesplatx_r_r_r(dst, src, src2)) }
+emit_evlhhesplatx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhesplatx_r_r_r(dst, src, src2)) }
 inst_evlhhossplatx_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHOSSPLATX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhossplatx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhossplatx_r_r_r(dst, src, src2)) }
+emit_evlhhossplatx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhossplatx_r_r_r(dst, src, src2)) }
 inst_evlhhousplatx_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHOUSPLATX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhousplatx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhousplatx_r_r_r(dst, src, src2)) }
+emit_evlhhousplatx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhousplatx_r_r_r(dst, src, src2)) }
 inst_evlwhoux_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHOUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhoux_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhoux_r_r_r(dst, src, src2)) }
+emit_evlwhoux_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhoux_r_r_r(dst, src, src2)) }
 inst_evlwhosx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHOSX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhosx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhosx_r_r_r(dst, src, src2)) }
+emit_evlwhosx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhosx_r_r_r(dst, src, src2)) }
 inst_evstwwex_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWWEX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwwex_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwwex_r_r_r(dst, src, src2)) }
+emit_evstwwex_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwwex_r_r_r(dst, src, src2)) }
 inst_evstwwox_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWWOX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwwox_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwwox_r_r_r(dst, src, src2)) }
+emit_evstwwox_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwwox_r_r_r(dst, src, src2)) }
 inst_evstwhox_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWHOX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwhox_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwhox_r_r_r(dst, src, src2)) }
+emit_evstwhox_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwhox_r_r_r(dst, src, src2)) }
 inst_icbtls_imm_r_r                      :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ICBTLS, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_icbtls_imm_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_icbtls_imm_r_r(imm, dst, src)) }
+emit_icbtls_imm_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_icbtls_imm_r_r(imm, dst, src)) }
 inst_icblc_imm_r_r                       :: #force_inline proc "contextless" (imm: i64, dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .ICBLC, operand_count = 3, length = 4, ops = {op_imm(imm), op_reg(dst), op_reg(src), {}}} }
-emit_icblc_imm_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append(instructions, inst_icblc_imm_r_r(imm, dst, src)) }
+emit_icblc_imm_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, dst: Register, src: Register) { append_elem(instructions, inst_icblc_imm_r_r(imm, dst, src)) }
 inst_dcbst_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .DCBST, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_dcbst_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_dcbst_r_r(dst, src)) }
+emit_dcbst_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_dcbst_r_r(dst, src)) }
 inst_mbar_imm                            :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{mnemonic = .MBAR, operand_count = 1, length = 4, ops = {op_imm(imm), {}, {}, {}}} }
-emit_mbar_imm                            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_mbar_imm(imm)) }
+emit_mbar_imm                            :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_mbar_imm(imm)) }
 inst_mtdcr_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MTDCR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mtdcr_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mtdcr_r_r(dst, src)) }
+emit_mtdcr_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mtdcr_r_r(dst, src)) }
 inst_mfdcr_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .MFDCR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_mfdcr_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_mfdcr_r_r(dst, src)) }
+emit_mfdcr_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_mfdcr_r_r(dst, src)) }
 inst_tlbilxva_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .TLBILXVA, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_tlbilxva_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_tlbilxva_r_r(dst, src)) }
+emit_tlbilxva_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_tlbilxva_r_r(dst, src)) }
 inst_xscvsxdsp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVSXDSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvsxdsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvsxdsp_vs_vs(dst, src)) }
+emit_xscvsxdsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvsxdsp_vs_vs(dst, src)) }
 inst_xscvuxdsp_vs_vs                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XSCVUXDSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xscvuxdsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xscvuxdsp_vs_vs(dst, src)) }
+emit_xscvuxdsp_vs_vs                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xscvuxdsp_vs_vs(dst, src)) }
 inst_xxbrh_vs_vs                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XXBRH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xxbrh_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xxbrh_vs_vs(dst, src)) }
+emit_xxbrh_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xxbrh_vs_vs(dst, src)) }
 inst_xxbrw_vs_vs                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XXBRW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xxbrw_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xxbrw_vs_vs(dst, src)) }
+emit_xxbrw_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xxbrw_vs_vs(dst, src)) }
 inst_xxbrd_vs_vs                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XXBRD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xxbrd_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xxbrd_vs_vs(dst, src)) }
+emit_xxbrd_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xxbrd_vs_vs(dst, src)) }
 inst_xxbrq_vs_vs                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XXBRQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xxbrq_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xxbrq_vs_vs(dst, src)) }
+emit_xxbrq_vs_vs                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xxbrq_vs_vs(dst, src)) }
 inst_pdepd_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PDEPD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_pdepd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_pdepd_r_r_r(dst, src, src2)) }
+emit_pdepd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_pdepd_r_r_r(dst, src, src2)) }
 inst_pextd_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PEXTD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_pextd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_pextd_r_r_r(dst, src, src2)) }
+emit_pextd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_pextd_r_r_r(dst, src, src2)) }
 inst_cntlzdm_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CNTLZDM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cntlzdm_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cntlzdm_r_r_r(dst, src, src2)) }
+emit_cntlzdm_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cntlzdm_r_r_r(dst, src, src2)) }
 inst_cnttzdm_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CNTTZDM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cnttzdm_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cnttzdm_r_r_r(dst, src, src2)) }
+emit_cnttzdm_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cnttzdm_r_r_r(dst, src, src2)) }
 inst_cfuged_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CFUGED, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cfuged_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cfuged_r_r_r(dst, src, src2)) }
+emit_cfuged_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cfuged_r_r_r(dst, src, src2)) }
 inst_brh_r_r                             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .BRH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_brh_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_brh_r_r(dst, src)) }
+emit_brh_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_brh_r_r(dst, src)) }
 inst_brw_r_r                             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .BRW, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_brw_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_brw_r_r(dst, src)) }
+emit_brw_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_brw_r_r(dst, src)) }
 inst_brd_r_r                             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .BRD, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_brd_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_brd_r_r(dst, src)) }
+emit_brd_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_brd_r_r(dst, src)) }
 inst_divweo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divweo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divweo_r_r_r(dst, src, src2)) }
+emit_divweo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divweo_r_r_r(dst, src, src2)) }
 inst_divweuo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWEUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divweuo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divweuo_r_r_r(dst, src, src2)) }
+emit_divweuo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divweuo_r_r_r(dst, src, src2)) }
 inst_divdeo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdeo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdeo_r_r_r(dst, src, src2)) }
+emit_divdeo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdeo_r_r_r(dst, src, src2)) }
 inst_divdeuo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDEUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdeuo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdeuo_r_r_r(dst, src, src2)) }
+emit_divdeuo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdeuo_r_r_r(dst, src, src2)) }
 inst_xvtlsbb_crf_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVTLSBB, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvtlsbb_crf_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvtlsbb_crf_vs(dst, src)) }
+emit_xvtlsbb_crf_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvtlsbb_crf_vs(dst, src)) }
 inst_xvcvhpsp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVHPSP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvhpsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvhpsp_vs_vs(dst, src)) }
+emit_xvcvhpsp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvhpsp_vs_vs(dst, src)) }
 inst_xvcvsphp_vs_vs                      :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .XVCVSPHP, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_xvcvsphp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_xvcvsphp_vs_vs(dst, src)) }
+emit_xvcvsphp_vs_vs                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_xvcvsphp_vs_vs(dst, src)) }
 inst_xxpermr_vs_vs_vs                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .XXPERMR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_xxpermr_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_xxpermr_vs_vs_vs(dst, src, src2)) }
+emit_xxpermr_vs_vs_vs                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_xxpermr_vs_vs_vs(dst, src, src2)) }
 inst_evfsmadd_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSMADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsmadd_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsmadd_r_r_r(dst, src, src2)) }
+emit_evfsmadd_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsmadd_r_r_r(dst, src, src2)) }
 inst_evfsmsub_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSMSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsmsub_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsmsub_r_r_r(dst, src, src2)) }
+emit_evfsmsub_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsmsub_r_r_r(dst, src, src2)) }
 inst_evfsnmadd_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSNMADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsnmadd_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsnmadd_r_r_r(dst, src, src2)) }
+emit_evfsnmadd_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsnmadd_r_r_r(dst, src, src2)) }
 inst_evfsnmsub_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSNMSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsnmsub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsnmsub_r_r_r(dst, src, src2)) }
+emit_evfsnmsub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsnmsub_r_r_r(dst, src, src2)) }
 inst_efsmadd_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSMADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsmadd_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsmadd_r_r_r(dst, src, src2)) }
+emit_efsmadd_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsmadd_r_r_r(dst, src, src2)) }
 inst_efsmsub_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSMSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsmsub_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsmsub_r_r_r(dst, src, src2)) }
+emit_efsmsub_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsmsub_r_r_r(dst, src, src2)) }
 inst_efsnmadd_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSNMADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsnmadd_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsnmadd_r_r_r(dst, src, src2)) }
+emit_efsnmadd_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsnmadd_r_r_r(dst, src, src2)) }
 inst_efsnmsub_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSNMSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsnmsub_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsnmsub_r_r_r(dst, src, src2)) }
+emit_efsnmsub_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsnmsub_r_r_r(dst, src, src2)) }
 inst_efdmadd_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDMADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdmadd_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdmadd_r_r_r(dst, src, src2)) }
+emit_efdmadd_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdmadd_r_r_r(dst, src, src2)) }
 inst_efdmsub_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDMSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdmsub_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdmsub_r_r_r(dst, src, src2)) }
+emit_efdmsub_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdmsub_r_r_r(dst, src, src2)) }
 inst_efdnmadd_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDNMADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdnmadd_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdnmadd_r_r_r(dst, src, src2)) }
+emit_efdnmadd_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdnmadd_r_r_r(dst, src, src2)) }
 inst_efdnmsub_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDNMSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdnmsub_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdnmsub_r_r_r(dst, src, src2)) }
+emit_efdnmsub_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdnmsub_r_r_r(dst, src, src2)) }
 inst_evfssqrt_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSSQRT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfssqrt_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfssqrt_r_r(dst, src)) }
+emit_evfssqrt_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfssqrt_r_r(dst, src)) }
 inst_evfsmax_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSMAX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsmax_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsmax_r_r_r(dst, src, src2)) }
+emit_evfsmax_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsmax_r_r_r(dst, src, src2)) }
 inst_evfsmin_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSMIN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsmin_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsmin_r_r_r(dst, src, src2)) }
+emit_evfsmin_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsmin_r_r_r(dst, src, src2)) }
 inst_evfscfh_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCFH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfscfh_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfscfh_r_r(dst, src)) }
+emit_evfscfh_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfscfh_r_r(dst, src)) }
 inst_evfscth_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EVFSCTH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_evfscth_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_evfscth_r_r(dst, src)) }
+emit_evfscth_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_evfscth_r_r(dst, src)) }
 inst_evfsaddsub_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSADDSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsaddsub_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsaddsub_r_r_r(dst, src, src2)) }
+emit_evfsaddsub_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsaddsub_r_r_r(dst, src, src2)) }
 inst_evfssubadd_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSSUBADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfssubadd_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfssubadd_r_r_r(dst, src, src2)) }
+emit_evfssubadd_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfssubadd_r_r_r(dst, src, src2)) }
 inst_evfssum_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSSUM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfssum_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfssum_r_r_r(dst, src, src2)) }
+emit_evfssum_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfssum_r_r_r(dst, src, src2)) }
 inst_evfsdiff_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSDIFF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsdiff_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsdiff_r_r_r(dst, src, src2)) }
+emit_evfsdiff_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsdiff_r_r_r(dst, src, src2)) }
 inst_evfssumdiff_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSSUMDIFF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfssumdiff_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfssumdiff_r_r_r(dst, src, src2)) }
+emit_evfssumdiff_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfssumdiff_r_r_r(dst, src, src2)) }
 inst_evfsdiffsum_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSDIFFSUM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsdiffsum_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsdiffsum_r_r_r(dst, src, src2)) }
+emit_evfsdiffsum_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsdiffsum_r_r_r(dst, src, src2)) }
 inst_evfsaddx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSADDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsaddx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsaddx_r_r_r(dst, src, src2)) }
+emit_evfsaddx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsaddx_r_r_r(dst, src, src2)) }
 inst_evfssubx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSSUBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfssubx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfssubx_r_r_r(dst, src, src2)) }
+emit_evfssubx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfssubx_r_r_r(dst, src, src2)) }
 inst_evfsaddsubx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSADDSUBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsaddsubx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsaddsubx_r_r_r(dst, src, src2)) }
+emit_evfsaddsubx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsaddsubx_r_r_r(dst, src, src2)) }
 inst_evfssubaddx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSSUBADDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfssubaddx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfssubaddx_r_r_r(dst, src, src2)) }
+emit_evfssubaddx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfssubaddx_r_r_r(dst, src, src2)) }
 inst_evfsmulx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSMULX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsmulx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsmulx_r_r_r(dst, src, src2)) }
+emit_evfsmulx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsmulx_r_r_r(dst, src, src2)) }
 inst_evfsmule_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSMULE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsmule_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsmule_r_r_r(dst, src, src2)) }
+emit_evfsmule_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsmule_r_r_r(dst, src, src2)) }
 inst_evfsmulo_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVFSMULO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evfsmulo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evfsmulo_r_r_r(dst, src, src2)) }
+emit_evfsmulo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evfsmulo_r_r_r(dst, src, src2)) }
 inst_efssqrt_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSSQRT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efssqrt_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efssqrt_r_r(dst, src)) }
+emit_efssqrt_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efssqrt_r_r(dst, src)) }
 inst_efsmax_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSMAX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsmax_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsmax_r_r_r(dst, src, src2)) }
+emit_efsmax_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsmax_r_r_r(dst, src, src2)) }
 inst_efsmin_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFSMIN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efsmin_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efsmin_r_r_r(dst, src, src2)) }
+emit_efsmin_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efsmin_r_r_r(dst, src, src2)) }
 inst_efscfh_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCFH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efscfh_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efscfh_r_r(dst, src)) }
+emit_efscfh_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efscfh_r_r(dst, src)) }
 inst_efscth_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFSCTH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efscth_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efscth_r_r(dst, src)) }
+emit_efscth_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efscth_r_r(dst, src)) }
 inst_efdsqrt_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDSQRT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdsqrt_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdsqrt_r_r(dst, src)) }
+emit_efdsqrt_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdsqrt_r_r(dst, src)) }
 inst_efdmax_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDMAX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdmax_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdmax_r_r_r(dst, src, src2)) }
+emit_efdmax_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdmax_r_r_r(dst, src, src2)) }
 inst_efdmin_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EFDMIN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_efdmin_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_efdmin_r_r_r(dst, src, src2)) }
+emit_efdmin_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_efdmin_r_r_r(dst, src, src2)) }
 inst_efdcfh_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCFH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcfh_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcfh_r_r(dst, src)) }
+emit_efdcfh_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcfh_r_r(dst, src)) }
 inst_efdcth_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .EFDCTH, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_efdcth_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_efdcth_r_r(dst, src)) }
+emit_efdcth_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_efdcth_r_r(dst, src)) }
 inst_evsubw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubw_r_r_r(dst, src, src2)) }
+emit_evsubw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubw_r_r_r(dst, src, src2)) }
 inst_evsubiw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBIW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubiw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubiw_r_r_r(dst, src, src2)) }
+emit_evsubiw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubiw_r_r_r(dst, src, src2)) }
 inst_evneg_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEG, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evneg_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evneg_r_r_r(dst, src, src2)) }
+emit_evneg_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evneg_r_r_r(dst, src, src2)) }
 inst_evrndw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndw_r_r_r(dst, src, src2)) }
+emit_evrndw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndw_r_r_r(dst, src, src2)) }
 inst_evmr_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmr_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmr_r_r_r(dst, src, src2)) }
+emit_evmr_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmr_r_r_r(dst, src, src2)) }
 inst_evnot_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnot_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnot_r_r_r(dst, src, src2)) }
+emit_evnot_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnot_r_r_r(dst, src, src2)) }
 inst_evsadd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsadd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsadd_r_r_r(dst, src, src2)) }
+emit_evsadd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsadd_r_r_r(dst, src, src2)) }
 inst_evssub_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSSUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evssub_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evssub_r_r_r(dst, src, src2)) }
+emit_evssub_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evssub_r_r_r(dst, src, src2)) }
 inst_evsabs_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSABS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsabs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsabs_r_r_r(dst, src, src2)) }
+emit_evsabs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsabs_r_r_r(dst, src, src2)) }
 inst_evsnabs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSNABS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsnabs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsnabs_r_r_r(dst, src, src2)) }
+emit_evsnabs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsnabs_r_r_r(dst, src, src2)) }
 inst_evsneg_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSNEG, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsneg_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsneg_r_r_r(dst, src, src2)) }
+emit_evsneg_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsneg_r_r_r(dst, src, src2)) }
 inst_evsmul_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSMUL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsmul_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsmul_r_r_r(dst, src, src2)) }
+emit_evsmul_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsmul_r_r_r(dst, src, src2)) }
 inst_evsdiv_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSDIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsdiv_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsdiv_r_r_r(dst, src, src2)) }
+emit_evsdiv_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsdiv_r_r_r(dst, src, src2)) }
 inst_evscmpgt_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCMPGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evscmpgt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evscmpgt_r_r_r(dst, src, src2)) }
+emit_evscmpgt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evscmpgt_r_r_r(dst, src, src2)) }
 inst_evsgmplt_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSGMPLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsgmplt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsgmplt_r_r_r(dst, src, src2)) }
+emit_evsgmplt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsgmplt_r_r_r(dst, src, src2)) }
 inst_evsgmpeq_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSGMPEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsgmpeq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsgmpeq_r_r_r(dst, src, src2)) }
+emit_evsgmpeq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsgmpeq_r_r_r(dst, src, src2)) }
 inst_evscfui_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCFUI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evscfui_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evscfui_r_r_r(dst, src, src2)) }
+emit_evscfui_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evscfui_r_r_r(dst, src, src2)) }
 inst_evscfsi_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCFSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evscfsi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evscfsi_r_r_r(dst, src, src2)) }
+emit_evscfsi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evscfsi_r_r_r(dst, src, src2)) }
 inst_evscfuf_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCFUF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evscfuf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evscfuf_r_r_r(dst, src, src2)) }
+emit_evscfuf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evscfuf_r_r_r(dst, src, src2)) }
 inst_evscfsf_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCFSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evscfsf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evscfsf_r_r_r(dst, src, src2)) }
+emit_evscfsf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evscfsf_r_r_r(dst, src, src2)) }
 inst_evsctui_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCTUI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsctui_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsctui_r_r_r(dst, src, src2)) }
+emit_evsctui_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsctui_r_r_r(dst, src, src2)) }
 inst_evsctsi_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCTSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsctsi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsctsi_r_r_r(dst, src, src2)) }
+emit_evsctsi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsctsi_r_r_r(dst, src, src2)) }
 inst_evsctuf_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCTUF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsctuf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsctuf_r_r_r(dst, src, src2)) }
+emit_evsctuf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsctuf_r_r_r(dst, src, src2)) }
 inst_evsctsf_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCTSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsctsf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsctsf_r_r_r(dst, src, src2)) }
+emit_evsctsf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsctsf_r_r_r(dst, src, src2)) }
 inst_evsctuiz_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCTUIZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsctuiz_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsctuiz_r_r_r(dst, src, src2)) }
+emit_evsctuiz_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsctuiz_r_r_r(dst, src, src2)) }
 inst_evsctsiz_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSCTSIZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsctsiz_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsctsiz_r_r_r(dst, src, src2)) }
+emit_evsctsiz_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsctsiz_r_r_r(dst, src, src2)) }
 inst_evststgt_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTSTGT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evststgt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evststgt_r_r_r(dst, src, src2)) }
+emit_evststgt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evststgt_r_r_r(dst, src, src2)) }
 inst_evststlt_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTSTLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evststlt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evststlt_r_r_r(dst, src, src2)) }
+emit_evststlt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evststlt_r_r_r(dst, src, src2)) }
 inst_evststeq_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTSTEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evststeq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evststeq_r_r_r(dst, src, src2)) }
+emit_evststeq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evststeq_r_r_r(dst, src, src2)) }
 inst_evmwlssf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlssf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlssf_r_r_r(dst, src, src2)) }
+emit_evmwlssf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlssf_r_r_r(dst, src, src2)) }
 inst_evmwlsmf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlsmf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlsmf_r_r_r(dst, src, src2)) }
+emit_evmwlsmf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlsmf_r_r_r(dst, src, src2)) }
 inst_evmwlssfa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlssfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlssfa_r_r_r(dst, src, src2)) }
+emit_evmwlssfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlssfa_r_r_r(dst, src, src2)) }
 inst_evmwlsmfa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlsmfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlsmfa_r_r_r(dst, src, src2)) }
+emit_evmwlsmfa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlsmfa_r_r_r(dst, src, src2)) }
 inst_evaddusiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddusiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddusiaaw_r_r_r(dst, src, src2)) }
+emit_evaddusiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddusiaaw_r_r_r(dst, src, src2)) }
 inst_evaddssiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddssiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddssiaaw_r_r_r(dst, src, src2)) }
+emit_evaddssiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddssiaaw_r_r_r(dst, src, src2)) }
 inst_evsubfusiaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfusiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfusiaaw_r_r_r(dst, src, src2)) }
+emit_evsubfusiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfusiaaw_r_r_r(dst, src, src2)) }
 inst_evsubfssiaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFSSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfssiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfssiaaw_r_r_r(dst, src, src2)) }
+emit_evsubfssiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfssiaaw_r_r_r(dst, src, src2)) }
 inst_evaddumiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddumiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddumiaaw_r_r_r(dst, src, src2)) }
+emit_evaddumiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddumiaaw_r_r_r(dst, src, src2)) }
 inst_evaddsmiaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsmiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsmiaaw_r_r_r(dst, src, src2)) }
+emit_evaddsmiaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsmiaaw_r_r_r(dst, src, src2)) }
 inst_evsubfumiaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfumiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfumiaaw_r_r_r(dst, src, src2)) }
+emit_evsubfumiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfumiaaw_r_r_r(dst, src, src2)) }
 inst_evsubfsmiaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFSMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfsmiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfsmiaaw_r_r_r(dst, src, src2)) }
+emit_evsubfsmiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfsmiaaw_r_r_r(dst, src, src2)) }
 inst_evmwlssfaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlssfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlssfaaw_r_r_r(dst, src, src2)) }
+emit_evmwlssfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlssfaaw_r_r_r(dst, src, src2)) }
 inst_evmwhusiaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHUSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhusiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhusiaa_r_r_r(dst, src, src2)) }
+emit_evmwhusiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhusiaa_r_r_r(dst, src, src2)) }
 inst_evmwhssmaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSMAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssmaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssmaa_r_r_r(dst, src, src2)) }
+emit_evmwhssmaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssmaa_r_r_r(dst, src, src2)) }
 inst_evmwhssfaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfaa_r_r_r(dst, src, src2)) }
+emit_evmwhssfaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfaa_r_r_r(dst, src, src2)) }
 inst_evmwlsmfaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSMFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlsmfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlsmfaaw_r_r_r(dst, src, src2)) }
+emit_evmwlsmfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlsmfaaw_r_r_r(dst, src, src2)) }
 inst_evmwhumiaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhumiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhumiaa_r_r_r(dst, src, src2)) }
+emit_evmwhumiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhumiaa_r_r_r(dst, src, src2)) }
 inst_evmwhsmiaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhsmiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhsmiaa_r_r_r(dst, src, src2)) }
+emit_evmwhsmiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhsmiaa_r_r_r(dst, src, src2)) }
 inst_evmwhsmfaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhsmfaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhsmfaa_r_r_r(dst, src, src2)) }
+emit_evmwhsmfaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhsmfaa_r_r_r(dst, src, src2)) }
 inst_evmwhgumiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHGUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhgumiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhgumiaa_r_r_r(dst, src, src2)) }
+emit_evmwhgumiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhgumiaa_r_r_r(dst, src, src2)) }
 inst_evmwhgsmiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHGSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhgsmiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhgsmiaa_r_r_r(dst, src, src2)) }
+emit_evmwhgsmiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhgsmiaa_r_r_r(dst, src, src2)) }
 inst_evmwhgssfaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHGSSFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhgssfaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhgssfaa_r_r_r(dst, src, src2)) }
+emit_evmwhgssfaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhgssfaa_r_r_r(dst, src, src2)) }
 inst_evmwhgsmfaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHGSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhgsmfaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhgsmfaa_r_r_r(dst, src, src2)) }
+emit_evmwhgsmfaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhgsmfaa_r_r_r(dst, src, src2)) }
 inst_evmwlssfanw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSSFANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlssfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlssfanw_r_r_r(dst, src, src2)) }
+emit_evmwlssfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlssfanw_r_r_r(dst, src, src2)) }
 inst_evmwhusian_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHUSIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhusian_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhusian_r_r_r(dst, src, src2)) }
+emit_evmwhusian_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhusian_r_r_r(dst, src, src2)) }
 inst_evmwhssian_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssian_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssian_r_r_r(dst, src, src2)) }
+emit_evmwhssian_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssian_r_r_r(dst, src, src2)) }
 inst_evmwhssfan_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfan_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfan_r_r_r(dst, src, src2)) }
+emit_evmwhssfan_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfan_r_r_r(dst, src, src2)) }
 inst_evmwlsmfanw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSMFANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlsmfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlsmfanw_r_r_r(dst, src, src2)) }
+emit_evmwlsmfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlsmfanw_r_r_r(dst, src, src2)) }
 inst_evmwhumian_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHUMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhumian_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhumian_r_r_r(dst, src, src2)) }
+emit_evmwhumian_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhumian_r_r_r(dst, src, src2)) }
 inst_evmwhsmian_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhsmian_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhsmian_r_r_r(dst, src, src2)) }
+emit_evmwhsmian_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhsmian_r_r_r(dst, src, src2)) }
 inst_evmwhsmfan_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSMFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhsmfan_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhsmfan_r_r_r(dst, src, src2)) }
+emit_evmwhsmfan_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhsmfan_r_r_r(dst, src, src2)) }
 inst_evmwhgumian_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHGUMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhgumian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhgumian_r_r_r(dst, src, src2)) }
+emit_evmwhgumian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhgumian_r_r_r(dst, src, src2)) }
 inst_evmwhgsmian_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHGSMIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhgsmian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhgsmian_r_r_r(dst, src, src2)) }
+emit_evmwhgsmian_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhgsmian_r_r_r(dst, src, src2)) }
 inst_evmwhgssfan_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHGSSFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhgssfan_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhgssfan_r_r_r(dst, src, src2)) }
+emit_evmwhgssfan_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhgssfan_r_r_r(dst, src, src2)) }
 inst_evmwhgsmfan_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHGSMFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhgsmfan_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhgsmfan_r_r_r(dst, src, src2)) }
+emit_evmwhgsmfan_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhgsmfan_r_r_r(dst, src, src2)) }
 inst_evdotpwcssi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssi_r_r_r(dst, src, src2)) }
+emit_evdotpwcssi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssi_r_r_r(dst, src, src2)) }
 inst_evdotpwcsmi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcsmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcsmi_r_r_r(dst, src, src2)) }
+emit_evdotpwcsmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcsmi_r_r_r(dst, src, src2)) }
 inst_evdotpwcssfr_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssfr_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssfr_r_r_r(dst, src, src2)) }
+emit_evdotpwcssfr_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssfr_r_r_r(dst, src, src2)) }
 inst_evdotpwcssf_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssf_r_r_r(dst, src, src2)) }
+emit_evdotpwcssf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssf_r_r_r(dst, src, src2)) }
 inst_evdotpwgasmf_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGASMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgasmf_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgasmf_r_r_r(dst, src, src2)) }
+emit_evdotpwgasmf_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgasmf_r_r_r(dst, src, src2)) }
 inst_evdotpwxgasmf_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGASMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgasmf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgasmf_r_r_r(dst, src, src2)) }
+emit_evdotpwxgasmf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgasmf_r_r_r(dst, src, src2)) }
 inst_evdotpwgasmfr_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGASMFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgasmfr_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgasmfr_r_r_r(dst, src, src2)) }
+emit_evdotpwgasmfr_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgasmfr_r_r_r(dst, src, src2)) }
 inst_evdotpwxgasmfr_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGASMFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgasmfr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgasmfr_r_r_r(dst, src, src2)) }
+emit_evdotpwxgasmfr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgasmfr_r_r_r(dst, src, src2)) }
 inst_evdotpwgssmf_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGSSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgssmf_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgssmf_r_r_r(dst, src, src2)) }
+emit_evdotpwgssmf_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgssmf_r_r_r(dst, src, src2)) }
 inst_evdotpwxgssmf_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGSSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgssmf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgssmf_r_r_r(dst, src, src2)) }
+emit_evdotpwxgssmf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgssmf_r_r_r(dst, src, src2)) }
 inst_evdotpwgssmfr_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGSSMFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgssmfr_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgssmfr_r_r_r(dst, src, src2)) }
+emit_evdotpwgssmfr_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgssmfr_r_r_r(dst, src, src2)) }
 inst_evdotpwxgssmfr_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGSSMFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgssmfr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgssmfr_r_r_r(dst, src, src2)) }
+emit_evdotpwxgssmfr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgssmfr_r_r_r(dst, src, src2)) }
 inst_evdotpwcssiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotpwcssiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotpwcsmiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcsmiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcsmiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotpwcsmiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcsmiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotpwcssfraaw3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSFRAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssfraaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssfraaw3_r_r_r(dst, src, src2)) }
+emit_evdotpwcssfraaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssfraaw3_r_r_r(dst, src, src2)) }
 inst_evdotpwcssfaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSFAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssfaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssfaaw3_r_r_r(dst, src, src2)) }
+emit_evdotpwcssfaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssfaaw3_r_r_r(dst, src, src2)) }
 inst_evdotpwgasmfaa3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGASMFAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgasmfaa3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgasmfaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwgasmfaa3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgasmfaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwxgasmfaa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGASMFAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgasmfaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgasmfaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwxgasmfaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgasmfaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwgasmfraa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGASMFRAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgasmfraa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgasmfraa3_r_r_r(dst, src, src2)) }
+emit_evdotpwgasmfraa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgasmfraa3_r_r_r(dst, src, src2)) }
 inst_evdotpwxgasmfraa3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGASMFRAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgasmfraa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgasmfraa3_r_r_r(dst, src, src2)) }
+emit_evdotpwxgasmfraa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgasmfraa3_r_r_r(dst, src, src2)) }
 inst_evdotpwgssmfaa3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGSSMFAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgssmfaa3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgssmfaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwgssmfaa3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgssmfaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwxgssmfaa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGSSMFAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgssmfaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgssmfaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwxgssmfaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgssmfaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwgssmfraa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGSSMFRAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgssmfraa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgssmfraa3_r_r_r(dst, src, src2)) }
+emit_evdotpwgssmfraa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgssmfraa3_r_r_r(dst, src, src2)) }
 inst_evdotpwxgssmfraa3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGSSMFRAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgssmfraa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgssmfraa3_r_r_r(dst, src, src2)) }
+emit_evdotpwxgssmfraa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgssmfraa3_r_r_r(dst, src, src2)) }
 inst_evdotpwcssia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssia_r_r_r(dst, src, src2)) }
+emit_evdotpwcssia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssia_r_r_r(dst, src, src2)) }
 inst_evdotpwcsmia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcsmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcsmia_r_r_r(dst, src, src2)) }
+emit_evdotpwcsmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcsmia_r_r_r(dst, src, src2)) }
 inst_evdotpwcssfra_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssfra_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssfra_r_r_r(dst, src, src2)) }
+emit_evdotpwcssfra_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssfra_r_r_r(dst, src, src2)) }
 inst_evdotpwcssfa_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssfa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssfa_r_r_r(dst, src, src2)) }
+emit_evdotpwcssfa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssfa_r_r_r(dst, src, src2)) }
 inst_evdotpwgasmfa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGASMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgasmfa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgasmfa_r_r_r(dst, src, src2)) }
+emit_evdotpwgasmfa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgasmfa_r_r_r(dst, src, src2)) }
 inst_evdotpwxgasmfa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGASMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgasmfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgasmfa_r_r_r(dst, src, src2)) }
+emit_evdotpwxgasmfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgasmfa_r_r_r(dst, src, src2)) }
 inst_evdotpwgasmfra_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGASMFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgasmfra_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgasmfra_r_r_r(dst, src, src2)) }
+emit_evdotpwgasmfra_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgasmfra_r_r_r(dst, src, src2)) }
 inst_evdotpwxgasmfra_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGASMFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgasmfra_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgasmfra_r_r_r(dst, src, src2)) }
+emit_evdotpwxgasmfra_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgasmfra_r_r_r(dst, src, src2)) }
 inst_evdotpwgssmfa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGSSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgssmfa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgssmfa_r_r_r(dst, src, src2)) }
+emit_evdotpwgssmfa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgssmfa_r_r_r(dst, src, src2)) }
 inst_evdotpwxgssmfa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGSSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgssmfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgssmfa_r_r_r(dst, src, src2)) }
+emit_evdotpwxgssmfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgssmfa_r_r_r(dst, src, src2)) }
 inst_evdotpwgssmfra_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGSSMFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgssmfra_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgssmfra_r_r_r(dst, src, src2)) }
+emit_evdotpwgssmfra_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgssmfra_r_r_r(dst, src, src2)) }
 inst_evdotpwxgssmfra_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGSSMFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgssmfra_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgssmfra_r_r_r(dst, src, src2)) }
+emit_evdotpwxgssmfra_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgssmfra_r_r_r(dst, src, src2)) }
 inst_evdotpwcssiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssiaaw_r_r_r(dst, src, src2)) }
+emit_evdotpwcssiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssiaaw_r_r_r(dst, src, src2)) }
 inst_evdotpwcsmiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcsmiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcsmiaaw_r_r_r(dst, src, src2)) }
+emit_evdotpwcsmiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcsmiaaw_r_r_r(dst, src, src2)) }
 inst_evdotpwcssfraaw_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSFRAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssfraaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssfraaw_r_r_r(dst, src, src2)) }
+emit_evdotpwcssfraaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssfraaw_r_r_r(dst, src, src2)) }
 inst_evdotpwcssfaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWCSSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwcssfaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwcssfaaw_r_r_r(dst, src, src2)) }
+emit_evdotpwcssfaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwcssfaaw_r_r_r(dst, src, src2)) }
 inst_evdotpwgasmfaa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGASMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgasmfaa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgasmfaa_r_r_r(dst, src, src2)) }
+emit_evdotpwgasmfaa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgasmfaa_r_r_r(dst, src, src2)) }
 inst_evdotpwxgasmfaa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGASMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgasmfaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgasmfaa_r_r_r(dst, src, src2)) }
+emit_evdotpwxgasmfaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgasmfaa_r_r_r(dst, src, src2)) }
 inst_evdotpwgasmfraa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGASMFRAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgasmfraa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgasmfraa_r_r_r(dst, src, src2)) }
+emit_evdotpwgasmfraa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgasmfraa_r_r_r(dst, src, src2)) }
 inst_evdotpwxgasmfraa_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGASMFRAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgasmfraa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgasmfraa_r_r_r(dst, src, src2)) }
+emit_evdotpwxgasmfraa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgasmfraa_r_r_r(dst, src, src2)) }
 inst_evdotpwgssmfaa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGSSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgssmfaa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgssmfaa_r_r_r(dst, src, src2)) }
+emit_evdotpwgssmfaa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgssmfaa_r_r_r(dst, src, src2)) }
 inst_evdotpwxgssmfaa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGSSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgssmfaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgssmfaa_r_r_r(dst, src, src2)) }
+emit_evdotpwxgssmfaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgssmfaa_r_r_r(dst, src, src2)) }
 inst_evdotpwgssmfraa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWGSSMFRAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwgssmfraa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwgssmfraa_r_r_r(dst, src, src2)) }
+emit_evdotpwgssmfraa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwgssmfraa_r_r_r(dst, src, src2)) }
 inst_evdotpwxgssmfraa_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWXGSSMFRAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwxgssmfraa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwxgssmfraa_r_r_r(dst, src, src2)) }
+emit_evdotpwxgssmfraa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwxgssmfraa_r_r_r(dst, src, src2)) }
 inst_evdotphihcssi_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssi_r_r_r(dst, src, src2)) }
+emit_evdotphihcssi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssi_r_r_r(dst, src, src2)) }
 inst_evdotplohcssi_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssi_r_r_r(dst, src, src2)) }
+emit_evdotplohcssi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssi_r_r_r(dst, src, src2)) }
 inst_evdotphihcssf_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssf_r_r_r(dst, src, src2)) }
+emit_evdotphihcssf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssf_r_r_r(dst, src, src2)) }
 inst_evdotplohcssf_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssf_r_r_r(dst, src, src2)) }
+emit_evdotplohcssf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssf_r_r_r(dst, src, src2)) }
 inst_evdotphihcsmi_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcsmi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcsmi_r_r_r(dst, src, src2)) }
+emit_evdotphihcsmi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcsmi_r_r_r(dst, src, src2)) }
 inst_evdotplohcsmi_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcsmi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcsmi_r_r_r(dst, src, src2)) }
+emit_evdotplohcsmi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcsmi_r_r_r(dst, src, src2)) }
 inst_evdotphihcssfr_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssfr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssfr_r_r_r(dst, src, src2)) }
+emit_evdotphihcssfr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssfr_r_r_r(dst, src, src2)) }
 inst_evdotplohcssfr_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssfr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssfr_r_r_r(dst, src, src2)) }
+emit_evdotplohcssfr_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssfr_r_r_r(dst, src, src2)) }
 inst_evdotphihcssiaaw3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssiaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphihcssiaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotplohcssiaaw3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssiaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotplohcssiaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphihcssfaaw3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSFAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssfaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssfaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphihcssfaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssfaaw3_r_r_r(dst, src, src2)) }
 inst_evdotplohcssfaaw3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSFAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssfaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssfaaw3_r_r_r(dst, src, src2)) }
+emit_evdotplohcssfaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssfaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphihcsmiaaw3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcsmiaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcsmiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphihcsmiaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcsmiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotplohcsmiaaw3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcsmiaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcsmiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotplohcsmiaaw3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcsmiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphihcssfraaw3_r_r_r            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSFRAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssfraaw3_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssfraaw3_r_r_r(dst, src, src2)) }
+emit_evdotphihcssfraaw3_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssfraaw3_r_r_r(dst, src, src2)) }
 inst_evdotplohcssfraaw3_r_r_r            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSFRAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssfraaw3_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssfraaw3_r_r_r(dst, src, src2)) }
+emit_evdotplohcssfraaw3_r_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssfraaw3_r_r_r(dst, src, src2)) }
 inst_evdotphihcssia_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssia_r_r_r(dst, src, src2)) }
+emit_evdotphihcssia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssia_r_r_r(dst, src, src2)) }
 inst_evdotplohcssia_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssia_r_r_r(dst, src, src2)) }
+emit_evdotplohcssia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssia_r_r_r(dst, src, src2)) }
 inst_evdotphihcssfa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssfa_r_r_r(dst, src, src2)) }
+emit_evdotphihcssfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssfa_r_r_r(dst, src, src2)) }
 inst_evdotplohcssfa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssfa_r_r_r(dst, src, src2)) }
+emit_evdotplohcssfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssfa_r_r_r(dst, src, src2)) }
 inst_evdotphihcsmia_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcsmia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcsmia_r_r_r(dst, src, src2)) }
+emit_evdotphihcsmia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcsmia_r_r_r(dst, src, src2)) }
 inst_evdotplohcsmia_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcsmia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcsmia_r_r_r(dst, src, src2)) }
+emit_evdotplohcsmia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcsmia_r_r_r(dst, src, src2)) }
 inst_evdotphihcssfra_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssfra_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssfra_r_r_r(dst, src, src2)) }
+emit_evdotphihcssfra_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssfra_r_r_r(dst, src, src2)) }
 inst_evdotplohcssfra_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssfra_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssfra_r_r_r(dst, src, src2)) }
+emit_evdotplohcssfra_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssfra_r_r_r(dst, src, src2)) }
 inst_evdotphihcssiaaw_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssiaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphihcssiaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssiaaw_r_r_r(dst, src, src2)) }
 inst_evdotplohcssiaaw_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssiaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssiaaw_r_r_r(dst, src, src2)) }
+emit_evdotplohcssiaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphihcssfaaw_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssfaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssfaaw_r_r_r(dst, src, src2)) }
+emit_evdotphihcssfaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssfaaw_r_r_r(dst, src, src2)) }
 inst_evdotplohcssfaaw_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssfaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssfaaw_r_r_r(dst, src, src2)) }
+emit_evdotplohcssfaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssfaaw_r_r_r(dst, src, src2)) }
 inst_evdotphihcsmiaaw_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcsmiaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcsmiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphihcsmiaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcsmiaaw_r_r_r(dst, src, src2)) }
 inst_evdotplohcsmiaaw_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcsmiaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcsmiaaw_r_r_r(dst, src, src2)) }
+emit_evdotplohcsmiaaw_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcsmiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphihcssfraaw_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHIHCSSFRAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphihcssfraaw_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphihcssfraaw_r_r_r(dst, src, src2)) }
+emit_evdotphihcssfraaw_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphihcssfraaw_r_r_r(dst, src, src2)) }
 inst_evdotplohcssfraaw_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPLOHCSSFRAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotplohcssfraaw_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotplohcssfraaw_r_r_r(dst, src, src2)) }
+emit_evdotplohcssfraaw_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotplohcssfraaw_r_r_r(dst, src, src2)) }
 inst_evdotphausi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHAUSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphausi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphausi_r_r_r(dst, src, src2)) }
+emit_evdotphausi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphausi_r_r_r(dst, src, src2)) }
 inst_evdotphassi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassi_r_r_r(dst, src, src2)) }
+emit_evdotphassi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassi_r_r_r(dst, src, src2)) }
 inst_evdotphasusi_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASUSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasusi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasusi_r_r_r(dst, src, src2)) }
+emit_evdotphasusi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasusi_r_r_r(dst, src, src2)) }
 inst_evdotphassf_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassf_r_r_r(dst, src, src2)) }
+emit_evdotphassf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassf_r_r_r(dst, src, src2)) }
 inst_evdotphsssf_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssf_r_r_r(dst, src, src2)) }
+emit_evdotphsssf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssf_r_r_r(dst, src, src2)) }
 inst_evdotphaumi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHAUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphaumi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphaumi_r_r_r(dst, src, src2)) }
+emit_evdotphaumi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphaumi_r_r_r(dst, src, src2)) }
 inst_evdotphasmi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasmi_r_r_r(dst, src, src2)) }
+emit_evdotphasmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasmi_r_r_r(dst, src, src2)) }
 inst_evdotphasumi_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasumi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasumi_r_r_r(dst, src, src2)) }
+emit_evdotphasumi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasumi_r_r_r(dst, src, src2)) }
 inst_evdotphassfr_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassfr_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassfr_r_r_r(dst, src, src2)) }
+emit_evdotphassfr_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassfr_r_r_r(dst, src, src2)) }
 inst_evdotphssmi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphssmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphssmi_r_r_r(dst, src, src2)) }
+emit_evdotphssmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphssmi_r_r_r(dst, src, src2)) }
 inst_evdotphsssi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssi_r_r_r(dst, src, src2)) }
+emit_evdotphsssi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssi_r_r_r(dst, src, src2)) }
 inst_evdotphsssfr_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssfr_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssfr_r_r_r(dst, src, src2)) }
+emit_evdotphsssfr_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssfr_r_r_r(dst, src, src2)) }
 inst_evdotphausiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHAUSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphausiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphausiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphausiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphausiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphassiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphassiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphasusiaaw3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASUSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasusiaaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasusiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphasusiaaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasusiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphassfaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSFAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassfaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassfaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphassfaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassfaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphsssiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphsssiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphsssfaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSFAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssfaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssfaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphsssfaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssfaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphaumiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHAUMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphaumiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphaumiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphaumiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphaumiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphasmiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasmiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasmiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphasmiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasmiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphasumiaaw3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASUMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasumiaaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasumiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphasumiaaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasumiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphassfraaw3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSFRAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassfraaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassfraaw3_r_r_r(dst, src, src2)) }
+emit_evdotphassfraaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassfraaw3_r_r_r(dst, src, src2)) }
 inst_evdotphssmiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphssmiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphssmiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotphssmiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphssmiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotphsssfraaw3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSFRAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssfraaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssfraaw3_r_r_r(dst, src, src2)) }
+emit_evdotphsssfraaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssfraaw3_r_r_r(dst, src, src2)) }
 inst_evdotphausia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHAUSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphausia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphausia_r_r_r(dst, src, src2)) }
+emit_evdotphausia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphausia_r_r_r(dst, src, src2)) }
 inst_evdotphassia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassia_r_r_r(dst, src, src2)) }
+emit_evdotphassia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassia_r_r_r(dst, src, src2)) }
 inst_evdotphasusia_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASUSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasusia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasusia_r_r_r(dst, src, src2)) }
+emit_evdotphasusia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasusia_r_r_r(dst, src, src2)) }
 inst_evdotphassfa_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassfa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassfa_r_r_r(dst, src, src2)) }
+emit_evdotphassfa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassfa_r_r_r(dst, src, src2)) }
 inst_evdotphsssfa_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssfa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssfa_r_r_r(dst, src, src2)) }
+emit_evdotphsssfa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssfa_r_r_r(dst, src, src2)) }
 inst_evdotphaumia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHAUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphaumia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphaumia_r_r_r(dst, src, src2)) }
+emit_evdotphaumia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphaumia_r_r_r(dst, src, src2)) }
 inst_evdotphasmia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasmia_r_r_r(dst, src, src2)) }
+emit_evdotphasmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasmia_r_r_r(dst, src, src2)) }
 inst_evdotphasumia_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasumia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasumia_r_r_r(dst, src, src2)) }
+emit_evdotphasumia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasumia_r_r_r(dst, src, src2)) }
 inst_evdotphassfra_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassfra_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassfra_r_r_r(dst, src, src2)) }
+emit_evdotphassfra_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassfra_r_r_r(dst, src, src2)) }
 inst_evdotphssmia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphssmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphssmia_r_r_r(dst, src, src2)) }
+emit_evdotphssmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphssmia_r_r_r(dst, src, src2)) }
 inst_evdotphsssia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssia_r_r_r(dst, src, src2)) }
+emit_evdotphsssia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssia_r_r_r(dst, src, src2)) }
 inst_evdotphsssfra_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssfra_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssfra_r_r_r(dst, src, src2)) }
+emit_evdotphsssfra_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssfra_r_r_r(dst, src, src2)) }
 inst_evdotphausiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHAUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphausiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphausiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphausiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphausiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphassiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphassiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphasusiaaw_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasusiaaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasusiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphasusiaaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasusiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphassfaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassfaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassfaaw_r_r_r(dst, src, src2)) }
+emit_evdotphassfaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassfaaw_r_r_r(dst, src, src2)) }
 inst_evdotphsssiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphsssiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphsssfaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssfaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssfaaw_r_r_r(dst, src, src2)) }
+emit_evdotphsssfaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssfaaw_r_r_r(dst, src, src2)) }
 inst_evdotphaumiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHAUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphaumiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphaumiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphaumiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphaumiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphasmiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasmiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasmiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphasmiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasmiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphasumiaaw_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphasumiaaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphasumiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphasumiaaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphasumiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphassfraaw_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHASSFRAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphassfraaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphassfraaw_r_r_r(dst, src, src2)) }
+emit_evdotphassfraaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphassfraaw_r_r_r(dst, src, src2)) }
 inst_evdotphssmiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphssmiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphssmiaaw_r_r_r(dst, src, src2)) }
+emit_evdotphssmiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphssmiaaw_r_r_r(dst, src, src2)) }
 inst_evdotphsssfraaw_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPHSSSFRAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotphsssfraaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotphsssfraaw_r_r_r(dst, src, src2)) }
+emit_evdotphsssfraaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotphsssfraaw_r_r_r(dst, src, src2)) }
 inst_evdotp4hgaumi_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGAUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgaumi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgaumi_r_r_r(dst, src, src2)) }
+emit_evdotp4hgaumi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgaumi_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasmi_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasmi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasmi_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasmi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasmi_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasumi_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasumi_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasumi_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasumi_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasumi_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasmf_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasmf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasmf_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasmf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasmf_r_r_r(dst, src, src2)) }
 inst_evdotp4hgssmi_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGSSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgssmi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgssmi_r_r_r(dst, src, src2)) }
+emit_evdotp4hgssmi_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgssmi_r_r_r(dst, src, src2)) }
 inst_evdotp4hgssmf_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGSSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgssmf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgssmf_r_r_r(dst, src, src2)) }
+emit_evdotp4hgssmf_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgssmf_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgasmi_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGASMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgasmi_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgasmi_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgasmi_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgasmi_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgasmf_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGASMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgasmf_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgasmf_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgasmf_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgasmf_r_r_r(dst, src, src2)) }
 inst_evdotpbaumi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBAUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbaumi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbaumi_r_r_r(dst, src, src2)) }
+emit_evdotpbaumi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbaumi_r_r_r(dst, src, src2)) }
 inst_evdotpbasmi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBASMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbasmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbasmi_r_r_r(dst, src, src2)) }
+emit_evdotpbasmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbasmi_r_r_r(dst, src, src2)) }
 inst_evdotpbasumi_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBASUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbasumi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbasumi_r_r_r(dst, src, src2)) }
+emit_evdotpbasumi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbasumi_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgssmi_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGSSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgssmi_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgssmi_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgssmi_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgssmi_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgssmf_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGSSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgssmf_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgssmf_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgssmf_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgssmf_r_r_r(dst, src, src2)) }
 inst_evdotp4hgaumiaa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGAUMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgaumiaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgaumiaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hgaumiaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgaumiaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasmiaa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasmiaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasmiaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasmiaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasmiaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasumiaa3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASUMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasumiaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasumiaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasumiaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasumiaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasmfaa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASMFAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasmfaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasmfaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasmfaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasmfaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hgssmiaa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGSSMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgssmiaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgssmiaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hgssmiaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgssmiaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hgssmfaa3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGSSMFAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgssmfaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgssmfaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hgssmfaa3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgssmfaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgasmiaa3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGASMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgasmiaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgasmiaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgasmiaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgasmiaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgasmfaa3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGASMFAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgasmfaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgasmfaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgasmfaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgasmfaa3_r_r_r(dst, src, src2)) }
 inst_evdotpbaumiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBAUMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbaumiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbaumiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotpbaumiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbaumiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotpbasmiaaw3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBASMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbasmiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbasmiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotpbasmiaaw3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbasmiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotpbasumiaaw3_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBASUMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbasumiaaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbasumiaaw3_r_r_r(dst, src, src2)) }
+emit_evdotpbasumiaaw3_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbasumiaaw3_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgssmiaa3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGSSMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgssmiaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgssmiaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgssmiaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgssmiaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgssmfaa3_r_r_r             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGSSMFAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgssmfaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgssmfaa3_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgssmfaa3_r_r_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgssmfaa3_r_r_r(dst, src, src2)) }
 inst_evdotp4hgaumia_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGAUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgaumia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgaumia_r_r_r(dst, src, src2)) }
+emit_evdotp4hgaumia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgaumia_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasmia_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasmia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasmia_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasmia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasmia_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasumia_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasumia_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasumia_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasumia_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasumia_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasmfa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasmfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasmfa_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasmfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasmfa_r_r_r(dst, src, src2)) }
 inst_evdotp4hgssmia_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGSSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgssmia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgssmia_r_r_r(dst, src, src2)) }
+emit_evdotp4hgssmia_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgssmia_r_r_r(dst, src, src2)) }
 inst_evdotp4hgssmfa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGSSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgssmfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgssmfa_r_r_r(dst, src, src2)) }
+emit_evdotp4hgssmfa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgssmfa_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgasmia_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGASMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgasmia_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgasmia_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgasmia_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgasmia_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgasmfa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGASMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgasmfa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgasmfa_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgasmfa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgasmfa_r_r_r(dst, src, src2)) }
 inst_evdotpbaumia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBAUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbaumia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbaumia_r_r_r(dst, src, src2)) }
+emit_evdotpbaumia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbaumia_r_r_r(dst, src, src2)) }
 inst_evdotpbasmia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBASMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbasmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbasmia_r_r_r(dst, src, src2)) }
+emit_evdotpbasmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbasmia_r_r_r(dst, src, src2)) }
 inst_evdotpbasumia_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBASUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbasumia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbasumia_r_r_r(dst, src, src2)) }
+emit_evdotpbasumia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbasumia_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgssmia_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGSSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgssmia_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgssmia_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgssmia_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgssmia_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgssmfa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGSSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgssmfa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgssmfa_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgssmfa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgssmfa_r_r_r(dst, src, src2)) }
 inst_evdotp4hgaumiaa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGAUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgaumiaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgaumiaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hgaumiaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgaumiaa_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasmiaa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasmiaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasmiaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasmiaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasmiaa_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasumiaa_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasumiaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasumiaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasumiaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasumiaa_r_r_r(dst, src, src2)) }
 inst_evdotp4hgasmfaa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGASMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgasmfaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgasmfaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hgasmfaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgasmfaa_r_r_r(dst, src, src2)) }
 inst_evdotp4hgssmiaa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGSSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgssmiaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgssmiaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hgssmiaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgssmiaa_r_r_r(dst, src, src2)) }
 inst_evdotp4hgssmfaa_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HGSSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hgssmfaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hgssmfaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hgssmfaa_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hgssmfaa_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgasmiaa_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGASMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgasmiaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgasmiaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgasmiaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgasmiaa_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgasmfaa_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGASMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgasmfaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgasmfaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgasmfaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgasmfaa_r_r_r(dst, src, src2)) }
 inst_evdotpbaumiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBAUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbaumiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbaumiaaw_r_r_r(dst, src, src2)) }
+emit_evdotpbaumiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbaumiaaw_r_r_r(dst, src, src2)) }
 inst_evdotpbasmiaaw_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBASMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbasmiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbasmiaaw_r_r_r(dst, src, src2)) }
+emit_evdotpbasmiaaw_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbasmiaaw_r_r_r(dst, src, src2)) }
 inst_evdotpbasumiaaw_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPBASUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpbasumiaaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpbasumiaaw_r_r_r(dst, src, src2)) }
+emit_evdotpbasumiaaw_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpbasumiaaw_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgssmiaa_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGSSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgssmiaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgssmiaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgssmiaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgssmiaa_r_r_r(dst, src, src2)) }
 inst_evdotp4hxgssmfaa_r_r_r              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTP4HXGSSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotp4hxgssmfaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotp4hxgssmfaa_r_r_r(dst, src, src2)) }
+emit_evdotp4hxgssmfaa_r_r_r              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotp4hxgssmfaa_r_r_r(dst, src, src2)) }
 inst_evdotpwausi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWAUSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwausi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwausi_r_r_r(dst, src, src2)) }
+emit_evdotpwausi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwausi_r_r_r(dst, src, src2)) }
 inst_evdotpwassi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwassi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwassi_r_r_r(dst, src, src2)) }
+emit_evdotpwassi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwassi_r_r_r(dst, src, src2)) }
 inst_evdotpwasusi_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASUSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasusi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasusi_r_r_r(dst, src, src2)) }
+emit_evdotpwasusi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasusi_r_r_r(dst, src, src2)) }
 inst_evdotpwaumi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWAUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwaumi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwaumi_r_r_r(dst, src, src2)) }
+emit_evdotpwaumi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwaumi_r_r_r(dst, src, src2)) }
 inst_evdotpwasmi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasmi_r_r_r(dst, src, src2)) }
+emit_evdotpwasmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasmi_r_r_r(dst, src, src2)) }
 inst_evdotpwasumi_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasumi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasumi_r_r_r(dst, src, src2)) }
+emit_evdotpwasumi_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasumi_r_r_r(dst, src, src2)) }
 inst_evdotpwssmi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWSSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwssmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwssmi_r_r_r(dst, src, src2)) }
+emit_evdotpwssmi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwssmi_r_r_r(dst, src, src2)) }
 inst_evdotpwsssi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWSSSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwsssi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwsssi_r_r_r(dst, src, src2)) }
+emit_evdotpwsssi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwsssi_r_r_r(dst, src, src2)) }
 inst_evdotpwausiaa3_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWAUSIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwausiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwausiaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwausiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwausiaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwassiaa3_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASSIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwassiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwassiaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwassiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwassiaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwasusiaa3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASUSIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasusiaa3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasusiaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwasusiaa3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasusiaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwsssiaa3_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWSSSIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwsssiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwsssiaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwsssiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwsssiaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwaumiaa3_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWAUMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwaumiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwaumiaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwaumiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwaumiaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwasmiaa3_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasmiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasmiaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwasmiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasmiaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwasumiaa3_r_r_r               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASUMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasumiaa3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasumiaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwasumiaa3_r_r_r               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasumiaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwssmiaa3_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWSSMIAA3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwssmiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwssmiaa3_r_r_r(dst, src, src2)) }
+emit_evdotpwssmiaa3_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwssmiaa3_r_r_r(dst, src, src2)) }
 inst_evdotpwausia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWAUSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwausia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwausia_r_r_r(dst, src, src2)) }
+emit_evdotpwausia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwausia_r_r_r(dst, src, src2)) }
 inst_evdotpwassia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwassia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwassia_r_r_r(dst, src, src2)) }
+emit_evdotpwassia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwassia_r_r_r(dst, src, src2)) }
 inst_evdotpwasusia_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASUSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasusia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasusia_r_r_r(dst, src, src2)) }
+emit_evdotpwasusia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasusia_r_r_r(dst, src, src2)) }
 inst_evdotpwaumia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWAUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwaumia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwaumia_r_r_r(dst, src, src2)) }
+emit_evdotpwaumia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwaumia_r_r_r(dst, src, src2)) }
 inst_evdotpwasmia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasmia_r_r_r(dst, src, src2)) }
+emit_evdotpwasmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasmia_r_r_r(dst, src, src2)) }
 inst_evdotpwasumia_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasumia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasumia_r_r_r(dst, src, src2)) }
+emit_evdotpwasumia_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasumia_r_r_r(dst, src, src2)) }
 inst_evdotpwssmia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWSSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwssmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwssmia_r_r_r(dst, src, src2)) }
+emit_evdotpwssmia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwssmia_r_r_r(dst, src, src2)) }
 inst_evdotpwsssia_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWSSSIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwsssia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwsssia_r_r_r(dst, src, src2)) }
+emit_evdotpwsssia_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwsssia_r_r_r(dst, src, src2)) }
 inst_evdotpwausiaa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWAUSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwausiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwausiaa_r_r_r(dst, src, src2)) }
+emit_evdotpwausiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwausiaa_r_r_r(dst, src, src2)) }
 inst_evdotpwassiaa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwassiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwassiaa_r_r_r(dst, src, src2)) }
+emit_evdotpwassiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwassiaa_r_r_r(dst, src, src2)) }
 inst_evdotpwasusiaa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASUSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasusiaa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasusiaa_r_r_r(dst, src, src2)) }
+emit_evdotpwasusiaa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasusiaa_r_r_r(dst, src, src2)) }
 inst_evdotpwsssiaa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWSSSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwsssiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwsssiaa_r_r_r(dst, src, src2)) }
+emit_evdotpwsssiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwsssiaa_r_r_r(dst, src, src2)) }
 inst_evdotpwaumiaa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWAUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwaumiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwaumiaa_r_r_r(dst, src, src2)) }
+emit_evdotpwaumiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwaumiaa_r_r_r(dst, src, src2)) }
 inst_evdotpwasmiaa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasmiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasmiaa_r_r_r(dst, src, src2)) }
+emit_evdotpwasmiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasmiaa_r_r_r(dst, src, src2)) }
 inst_evdotpwasumiaa_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWASUMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwasumiaa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwasumiaa_r_r_r(dst, src, src2)) }
+emit_evdotpwasumiaa_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwasumiaa_r_r_r(dst, src, src2)) }
 inst_evdotpwssmiaa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDOTPWSSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdotpwssmiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdotpwssmiaa_r_r_r(dst, src, src2)) }
+emit_evdotpwssmiaa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdotpwssmiaa_r_r_r(dst, src, src2)) }
 inst_evaddib_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDIB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddib_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddib_r_r_r(dst, src, src2)) }
+emit_evaddib_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddib_r_r_r(dst, src, src2)) }
 inst_evaddih_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDIH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddih_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddih_r_r_r(dst, src, src2)) }
+emit_evaddih_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddih_r_r_r(dst, src, src2)) }
 inst_evsubifh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBIFH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubifh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubifh_r_r_r(dst, src, src2)) }
+emit_evsubifh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubifh_r_r_r(dst, src, src2)) }
 inst_evsubifb_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBIFB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubifb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubifb_r_r_r(dst, src, src2)) }
+emit_evsubifb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubifb_r_r_r(dst, src, src2)) }
 inst_evabsb_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsb_r_r_r(dst, src, src2)) }
+emit_evabsb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsb_r_r_r(dst, src, src2)) }
 inst_evabsh_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsh_r_r_r(dst, src, src2)) }
+emit_evabsh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsh_r_r_r(dst, src, src2)) }
 inst_evabsd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsd_r_r_r(dst, src, src2)) }
+emit_evabsd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsd_r_r_r(dst, src, src2)) }
 inst_evabss_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabss_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabss_r_r_r(dst, src, src2)) }
+emit_evabss_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabss_r_r_r(dst, src, src2)) }
 inst_evabsbs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsbs_r_r_r(dst, src, src2)) }
+emit_evabsbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsbs_r_r_r(dst, src, src2)) }
 inst_evabshs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabshs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabshs_r_r_r(dst, src, src2)) }
+emit_evabshs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabshs_r_r_r(dst, src, src2)) }
 inst_evabsds_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsds_r_r_r(dst, src, src2)) }
+emit_evabsds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsds_r_r_r(dst, src, src2)) }
 inst_evnegwo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegwo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegwo_r_r_r(dst, src, src2)) }
+emit_evnegwo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegwo_r_r_r(dst, src, src2)) }
 inst_evnegb_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegb_r_r_r(dst, src, src2)) }
+emit_evnegb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegb_r_r_r(dst, src, src2)) }
 inst_evnegbo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGBO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegbo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegbo_r_r_r(dst, src, src2)) }
+emit_evnegbo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegbo_r_r_r(dst, src, src2)) }
 inst_evnegh_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegh_r_r_r(dst, src, src2)) }
+emit_evnegh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegh_r_r_r(dst, src, src2)) }
 inst_evnegho_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGHO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegho_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegho_r_r_r(dst, src, src2)) }
+emit_evnegho_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegho_r_r_r(dst, src, src2)) }
 inst_evnegd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegd_r_r_r(dst, src, src2)) }
+emit_evnegd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegd_r_r_r(dst, src, src2)) }
 inst_evnegs_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegs_r_r_r(dst, src, src2)) }
+emit_evnegs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegs_r_r_r(dst, src, src2)) }
 inst_evnegwos_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGWOS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegwos_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegwos_r_r_r(dst, src, src2)) }
+emit_evnegwos_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegwos_r_r_r(dst, src, src2)) }
 inst_evnegbs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegbs_r_r_r(dst, src, src2)) }
+emit_evnegbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegbs_r_r_r(dst, src, src2)) }
 inst_evnegbos_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGBOS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegbos_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegbos_r_r_r(dst, src, src2)) }
+emit_evnegbos_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegbos_r_r_r(dst, src, src2)) }
 inst_evneghs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evneghs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evneghs_r_r_r(dst, src, src2)) }
+emit_evneghs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evneghs_r_r_r(dst, src, src2)) }
 inst_evneghos_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGHOS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evneghos_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evneghos_r_r_r(dst, src, src2)) }
+emit_evneghos_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evneghos_r_r_r(dst, src, src2)) }
 inst_evnegds_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVNEGDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evnegds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evnegds_r_r_r(dst, src, src2)) }
+emit_evnegds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evnegds_r_r_r(dst, src, src2)) }
 inst_evextzb_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVEXTZB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evextzb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evextzb_r_r_r(dst, src, src2)) }
+emit_evextzb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evextzb_r_r_r(dst, src, src2)) }
 inst_evextsbh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVEXTSBH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evextsbh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evextsbh_r_r_r(dst, src, src2)) }
+emit_evextsbh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evextsbh_r_r_r(dst, src, src2)) }
 inst_evextsw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVEXTSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evextsw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evextsw_r_r_r(dst, src, src2)) }
+emit_evextsw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evextsw_r_r_r(dst, src, src2)) }
 inst_evrndwh_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDWH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndwh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndwh_r_r_r(dst, src, src2)) }
+emit_evrndwh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndwh_r_r_r(dst, src, src2)) }
 inst_evrndhb_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDHB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndhb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndhb_r_r_r(dst, src, src2)) }
+emit_evrndhb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndhb_r_r_r(dst, src, src2)) }
 inst_evrnddw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDDW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrnddw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrnddw_r_r_r(dst, src, src2)) }
+emit_evrnddw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrnddw_r_r_r(dst, src, src2)) }
 inst_evrndwhus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDWHUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndwhus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndwhus_r_r_r(dst, src, src2)) }
+emit_evrndwhus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndwhus_r_r_r(dst, src, src2)) }
 inst_evrndwhss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDWHSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndwhss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndwhss_r_r_r(dst, src, src2)) }
+emit_evrndwhss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndwhss_r_r_r(dst, src, src2)) }
 inst_evrndhbus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDHBUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndhbus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndhbus_r_r_r(dst, src, src2)) }
+emit_evrndhbus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndhbus_r_r_r(dst, src, src2)) }
 inst_evrndhbss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDHBSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndhbss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndhbss_r_r_r(dst, src, src2)) }
+emit_evrndhbss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndhbss_r_r_r(dst, src, src2)) }
 inst_evrnddwus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDDWUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrnddwus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrnddwus_r_r_r(dst, src, src2)) }
+emit_evrnddwus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrnddwus_r_r_r(dst, src, src2)) }
 inst_evrnddwss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDDWSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrnddwss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrnddwss_r_r_r(dst, src, src2)) }
+emit_evrnddwss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrnddwss_r_r_r(dst, src, src2)) }
 inst_evrndwnh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDWNH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndwnh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndwnh_r_r_r(dst, src, src2)) }
+emit_evrndwnh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndwnh_r_r_r(dst, src, src2)) }
 inst_evrndhnb_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDHNB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndhnb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndhnb_r_r_r(dst, src, src2)) }
+emit_evrndhnb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndhnb_r_r_r(dst, src, src2)) }
 inst_evrnddnw_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDDNW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrnddnw_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrnddnw_r_r_r(dst, src, src2)) }
+emit_evrnddnw_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrnddnw_r_r_r(dst, src, src2)) }
 inst_evrndwnhus_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDWNHUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndwnhus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndwnhus_r_r_r(dst, src, src2)) }
+emit_evrndwnhus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndwnhus_r_r_r(dst, src, src2)) }
 inst_evrndwnhss_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDWNHSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndwnhss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndwnhss_r_r_r(dst, src, src2)) }
+emit_evrndwnhss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndwnhss_r_r_r(dst, src, src2)) }
 inst_evrndhnbus_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDHNBUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndhnbus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndhnbus_r_r_r(dst, src, src2)) }
+emit_evrndhnbus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndhnbus_r_r_r(dst, src, src2)) }
 inst_evrndhnbss_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDHNBSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrndhnbss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrndhnbss_r_r_r(dst, src, src2)) }
+emit_evrndhnbss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrndhnbss_r_r_r(dst, src, src2)) }
 inst_evrnddnwus_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDDNWUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrnddnwus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrnddnwus_r_r_r(dst, src, src2)) }
+emit_evrnddnwus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrnddnwus_r_r_r(dst, src, src2)) }
 inst_evrnddnwss_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRNDDNWSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrnddnwss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrnddnwss_r_r_r(dst, src, src2)) }
+emit_evrnddnwss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrnddnwss_r_r_r(dst, src, src2)) }
 inst_evcntlzh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCNTLZH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcntlzh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcntlzh_r_r_r(dst, src, src2)) }
+emit_evcntlzh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcntlzh_r_r_r(dst, src, src2)) }
 inst_evcntlsh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCNTLSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcntlsh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcntlsh_r_r_r(dst, src, src2)) }
+emit_evcntlsh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcntlsh_r_r_r(dst, src, src2)) }
 inst_evpopcntb_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPOPCNTB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpopcntb_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpopcntb_r_r_r(dst, src, src2)) }
+emit_evpopcntb_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpopcntb_r_r_r(dst, src, src2)) }
 inst_circinc_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CIRCINC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_circinc_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_circinc_r_r_r(dst, src, src2)) }
+emit_circinc_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_circinc_r_r_r(dst, src, src2)) }
 inst_evunpkhibui_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKHIBUI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpkhibui_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpkhibui_r_r_r(dst, src, src2)) }
+emit_evunpkhibui_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpkhibui_r_r_r(dst, src, src2)) }
 inst_evunpkhibsi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKHIBSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpkhibsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpkhibsi_r_r_r(dst, src, src2)) }
+emit_evunpkhibsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpkhibsi_r_r_r(dst, src, src2)) }
 inst_evunpkhihui_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKHIHUI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpkhihui_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpkhihui_r_r_r(dst, src, src2)) }
+emit_evunpkhihui_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpkhihui_r_r_r(dst, src, src2)) }
 inst_evunpkhihsi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKHIHSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpkhihsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpkhihsi_r_r_r(dst, src, src2)) }
+emit_evunpkhihsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpkhihsi_r_r_r(dst, src, src2)) }
 inst_evunpklobui_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKLOBUI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpklobui_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpklobui_r_r_r(dst, src, src2)) }
+emit_evunpklobui_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpklobui_r_r_r(dst, src, src2)) }
 inst_evunpklobsi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKLOBSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpklobsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpklobsi_r_r_r(dst, src, src2)) }
+emit_evunpklobsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpklobsi_r_r_r(dst, src, src2)) }
 inst_evunpklohui_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKLOHUI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpklohui_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpklohui_r_r_r(dst, src, src2)) }
+emit_evunpklohui_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpklohui_r_r_r(dst, src, src2)) }
 inst_evunpklohsi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKLOHSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpklohsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpklohsi_r_r_r(dst, src, src2)) }
+emit_evunpklohsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpklohsi_r_r_r(dst, src, src2)) }
 inst_evunpklohf_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKLOHF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpklohf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpklohf_r_r_r(dst, src, src2)) }
+emit_evunpklohf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpklohf_r_r_r(dst, src, src2)) }
 inst_evunpkhihf_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKHIHF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpkhihf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpkhihf_r_r_r(dst, src, src2)) }
+emit_evunpkhihf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpkhihf_r_r_r(dst, src, src2)) }
 inst_evunpklowgsf_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKLOWGSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpklowgsf_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpklowgsf_r_r_r(dst, src, src2)) }
+emit_evunpklowgsf_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpklowgsf_r_r_r(dst, src, src2)) }
 inst_evunpkhiwgsf_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVUNPKHIWGSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evunpkhiwgsf_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evunpkhiwgsf_r_r_r(dst, src, src2)) }
+emit_evunpkhiwgsf_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evunpkhiwgsf_r_r_r(dst, src, src2)) }
 inst_evsatsduw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSDUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatsduw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatsduw_r_r_r(dst, src, src2)) }
+emit_evsatsduw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatsduw_r_r_r(dst, src, src2)) }
 inst_evsatsdsw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSDSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatsdsw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatsdsw_r_r_r(dst, src, src2)) }
+emit_evsatsdsw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatsdsw_r_r_r(dst, src, src2)) }
 inst_evsatshub_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSHUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatshub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatshub_r_r_r(dst, src, src2)) }
+emit_evsatshub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatshub_r_r_r(dst, src, src2)) }
 inst_evsatshsb_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSHSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatshsb_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatshsb_r_r_r(dst, src, src2)) }
+emit_evsatshsb_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatshsb_r_r_r(dst, src, src2)) }
 inst_evsatuwuh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATUWUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatuwuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatuwuh_r_r_r(dst, src, src2)) }
+emit_evsatuwuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatuwuh_r_r_r(dst, src, src2)) }
 inst_evsatswsh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSWSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatswsh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatswsh_r_r_r(dst, src, src2)) }
+emit_evsatswsh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatswsh_r_r_r(dst, src, src2)) }
 inst_evsatswuh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSWUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatswuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatswuh_r_r_r(dst, src, src2)) }
+emit_evsatswuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatswuh_r_r_r(dst, src, src2)) }
 inst_evsatuhub_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATUHUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatuhub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatuhub_r_r_r(dst, src, src2)) }
+emit_evsatuhub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatuhub_r_r_r(dst, src, src2)) }
 inst_evsatuduw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATUDUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatuduw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatuduw_r_r_r(dst, src, src2)) }
+emit_evsatuduw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatuduw_r_r_r(dst, src, src2)) }
 inst_evsatuwsw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATUWSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatuwsw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatuwsw_r_r_r(dst, src, src2)) }
+emit_evsatuwsw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatuwsw_r_r_r(dst, src, src2)) }
 inst_evsatshuh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSHUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatshuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatshuh_r_r_r(dst, src, src2)) }
+emit_evsatshuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatshuh_r_r_r(dst, src, src2)) }
 inst_evsatuhsh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATUHSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatuhsh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatuhsh_r_r_r(dst, src, src2)) }
+emit_evsatuhsh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatuhsh_r_r_r(dst, src, src2)) }
 inst_evsatswuw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSWUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatswuw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatswuw_r_r_r(dst, src, src2)) }
+emit_evsatswuw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatswuw_r_r_r(dst, src, src2)) }
 inst_evsatswgsdf_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSWGSDF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatswgsdf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatswgsdf_r_r_r(dst, src, src2)) }
+emit_evsatswgsdf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatswgsdf_r_r_r(dst, src, src2)) }
 inst_evsatsbub_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATSBUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatsbub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatsbub_r_r_r(dst, src, src2)) }
+emit_evsatsbub_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatsbub_r_r_r(dst, src, src2)) }
 inst_evsatubsb_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSATUBSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsatubsb_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsatubsb_r_r_r(dst, src, src2)) }
+emit_evsatubsb_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsatubsb_r_r_r(dst, src, src2)) }
 inst_evmaxhpuw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXHPUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxhpuw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxhpuw_r_r_r(dst, src, src2)) }
+emit_evmaxhpuw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxhpuw_r_r_r(dst, src, src2)) }
 inst_evmaxhpsw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXHPSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxhpsw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxhpsw_r_r_r(dst, src, src2)) }
+emit_evmaxhpsw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxhpsw_r_r_r(dst, src, src2)) }
 inst_evmaxbpuh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXBPUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxbpuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxbpuh_r_r_r(dst, src, src2)) }
+emit_evmaxbpuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxbpuh_r_r_r(dst, src, src2)) }
 inst_evmaxbpsh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXBPSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxbpsh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxbpsh_r_r_r(dst, src, src2)) }
+emit_evmaxbpsh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxbpsh_r_r_r(dst, src, src2)) }
 inst_evmaxwpud_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXWPUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxwpud_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxwpud_r_r_r(dst, src, src2)) }
+emit_evmaxwpud_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxwpud_r_r_r(dst, src, src2)) }
 inst_evmaxwpsd_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXWPSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxwpsd_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxwpsd_r_r_r(dst, src, src2)) }
+emit_evmaxwpsd_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxwpsd_r_r_r(dst, src, src2)) }
 inst_evminhpuw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINHPUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminhpuw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminhpuw_r_r_r(dst, src, src2)) }
+emit_evminhpuw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminhpuw_r_r_r(dst, src, src2)) }
 inst_evminhpsw_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINHPSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminhpsw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminhpsw_r_r_r(dst, src, src2)) }
+emit_evminhpsw_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminhpsw_r_r_r(dst, src, src2)) }
 inst_evminbpuh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINBPUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminbpuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminbpuh_r_r_r(dst, src, src2)) }
+emit_evminbpuh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminbpuh_r_r_r(dst, src, src2)) }
 inst_evminbpsh_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINBPSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminbpsh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminbpsh_r_r_r(dst, src, src2)) }
+emit_evminbpsh_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminbpsh_r_r_r(dst, src, src2)) }
 inst_evminwpud_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINWPUD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminwpud_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminwpud_r_r_r(dst, src, src2)) }
+emit_evminwpud_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminwpud_r_r_r(dst, src, src2)) }
 inst_evminwpsd_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINWPSD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminwpsd_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminwpsd_r_r_r(dst, src, src2)) }
+emit_evminwpsd_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminwpsd_r_r_r(dst, src, src2)) }
 inst_evmaxmagws_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXMAGWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxmagws_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxmagws_r_r_r(dst, src, src2)) }
+emit_evmaxmagws_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxmagws_r_r_r(dst, src, src2)) }
 inst_evsl_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsl_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsl_r_r_r(dst, src, src2)) }
+emit_evsl_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsl_r_r_r(dst, src, src2)) }
 inst_evsli_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSLI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsli_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsli_r_r_r(dst, src, src2)) }
+emit_evsli_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsli_r_r_r(dst, src, src2)) }
 inst_evsplatie_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatie_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatie_r_r_r(dst, src, src2)) }
+emit_evsplatie_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatie_r_r_r(dst, src, src2)) }
 inst_evsplatib_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatib_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatib_r_r_r(dst, src, src2)) }
+emit_evsplatib_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatib_r_r_r(dst, src, src2)) }
 inst_evsplatibe_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIBE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatibe_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatibe_r_r_r(dst, src, src2)) }
+emit_evsplatibe_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatibe_r_r_r(dst, src, src2)) }
 inst_evsplatih_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatih_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatih_r_r_r(dst, src, src2)) }
+emit_evsplatih_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatih_r_r_r(dst, src, src2)) }
 inst_evsplatihe_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIHE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatihe_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatihe_r_r_r(dst, src, src2)) }
+emit_evsplatihe_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatihe_r_r_r(dst, src, src2)) }
 inst_evsplatid_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATID, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatid_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatid_r_r_r(dst, src, src2)) }
+emit_evsplatid_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatid_r_r_r(dst, src, src2)) }
 inst_evsplatia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatia_r_r_r(dst, src, src2)) }
+emit_evsplatia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatia_r_r_r(dst, src, src2)) }
 inst_evsplatiea_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIEA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatiea_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatiea_r_r_r(dst, src, src2)) }
+emit_evsplatiea_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatiea_r_r_r(dst, src, src2)) }
 inst_evsplatiba_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIBA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatiba_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatiba_r_r_r(dst, src, src2)) }
+emit_evsplatiba_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatiba_r_r_r(dst, src, src2)) }
 inst_evsplatibea_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIBEA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatibea_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatibea_r_r_r(dst, src, src2)) }
+emit_evsplatibea_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatibea_r_r_r(dst, src, src2)) }
 inst_evsplatiha_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIHA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatiha_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatiha_r_r_r(dst, src, src2)) }
+emit_evsplatiha_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatiha_r_r_r(dst, src, src2)) }
 inst_evsplatihea_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIHEA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatihea_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatihea_r_r_r(dst, src, src2)) }
+emit_evsplatihea_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatihea_r_r_r(dst, src, src2)) }
 inst_evsplatida_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATIDA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatida_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatida_r_r_r(dst, src, src2)) }
+emit_evsplatida_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatida_r_r_r(dst, src, src2)) }
 inst_evsplatfio_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfio_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfio_r_r_r(dst, src, src2)) }
+emit_evsplatfio_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfio_r_r_r(dst, src, src2)) }
 inst_evsplatfib_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfib_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfib_r_r_r(dst, src, src2)) }
+emit_evsplatfib_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfib_r_r_r(dst, src, src2)) }
 inst_evsplatfibo_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIBO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfibo_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfibo_r_r_r(dst, src, src2)) }
+emit_evsplatfibo_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfibo_r_r_r(dst, src, src2)) }
 inst_evsplatfih_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfih_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfih_r_r_r(dst, src, src2)) }
+emit_evsplatfih_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfih_r_r_r(dst, src, src2)) }
 inst_evsplatfiho_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIHO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfiho_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfiho_r_r_r(dst, src, src2)) }
+emit_evsplatfiho_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfiho_r_r_r(dst, src, src2)) }
 inst_evsplatfid_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFID, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfid_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfid_r_r_r(dst, src, src2)) }
+emit_evsplatfid_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfid_r_r_r(dst, src, src2)) }
 inst_evsplatfia_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfia_r_r_r(dst, src, src2)) }
+emit_evsplatfia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfia_r_r_r(dst, src, src2)) }
 inst_evsplatfioa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIOA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfioa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfioa_r_r_r(dst, src, src2)) }
+emit_evsplatfioa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfioa_r_r_r(dst, src, src2)) }
 inst_evsplatfiba_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIBA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfiba_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfiba_r_r_r(dst, src, src2)) }
+emit_evsplatfiba_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfiba_r_r_r(dst, src, src2)) }
 inst_evsplatfiboa_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIBOA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfiboa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfiboa_r_r_r(dst, src, src2)) }
+emit_evsplatfiboa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfiboa_r_r_r(dst, src, src2)) }
 inst_evsplatfiha_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIHA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfiha_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfiha_r_r_r(dst, src, src2)) }
+emit_evsplatfiha_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfiha_r_r_r(dst, src, src2)) }
 inst_evsplatfihoa_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIHOA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfihoa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfihoa_r_r_r(dst, src, src2)) }
+emit_evsplatfihoa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfihoa_r_r_r(dst, src, src2)) }
 inst_evsplatfida_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATFIDA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatfida_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatfida_r_r_r(dst, src, src2)) }
+emit_evsplatfida_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatfida_r_r_r(dst, src, src2)) }
 inst_evcmpgtdu_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPGTDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpgtdu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpgtdu_r_r_r(dst, src, src2)) }
+emit_evcmpgtdu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpgtdu_r_r_r(dst, src, src2)) }
 inst_evcmpgtds_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPGTDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpgtds_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpgtds_r_r_r(dst, src, src2)) }
+emit_evcmpgtds_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpgtds_r_r_r(dst, src, src2)) }
 inst_evcmpltdu_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPLTDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpltdu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpltdu_r_r_r(dst, src, src2)) }
+emit_evcmpltdu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpltdu_r_r_r(dst, src, src2)) }
 inst_evcmpltds_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPLTDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpltds_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpltds_r_r_r(dst, src, src2)) }
+emit_evcmpltds_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpltds_r_r_r(dst, src, src2)) }
 inst_evcmpeqd_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCMPEQD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evcmpeqd_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evcmpeqd_r_r_r(dst, src, src2)) }
+emit_evcmpeqd_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evcmpeqd_r_r_r(dst, src, src2)) }
 inst_evswapbhilo_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSWAPBHILO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evswapbhilo_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evswapbhilo_r_r_r(dst, src, src2)) }
+emit_evswapbhilo_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evswapbhilo_r_r_r(dst, src, src2)) }
 inst_evswapblohi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSWAPBLOHI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evswapblohi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evswapblohi_r_r_r(dst, src, src2)) }
+emit_evswapblohi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evswapblohi_r_r_r(dst, src, src2)) }
 inst_evswaphhilo_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSWAPHHILO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evswaphhilo_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evswaphhilo_r_r_r(dst, src, src2)) }
+emit_evswaphhilo_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evswaphhilo_r_r_r(dst, src, src2)) }
 inst_evswaphlohi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSWAPHLOHI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evswaphlohi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evswaphlohi_r_r_r(dst, src, src2)) }
+emit_evswaphlohi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evswaphlohi_r_r_r(dst, src, src2)) }
 inst_evswaphe_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSWAPHE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evswaphe_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evswaphe_r_r_r(dst, src, src2)) }
+emit_evswaphe_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evswaphe_r_r_r(dst, src, src2)) }
 inst_evswaphhi_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSWAPHHI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evswaphhi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evswaphhi_r_r_r(dst, src, src2)) }
+emit_evswaphhi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evswaphhi_r_r_r(dst, src, src2)) }
 inst_evswaphlo_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSWAPHLO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evswaphlo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evswaphlo_r_r_r(dst, src, src2)) }
+emit_evswaphlo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evswaphlo_r_r_r(dst, src, src2)) }
 inst_evswapho_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSWAPHO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evswapho_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evswapho_r_r_r(dst, src, src2)) }
+emit_evswapho_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evswapho_r_r_r(dst, src, src2)) }
 inst_evinsb_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVINSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evinsb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evinsb_r_r_r(dst, src, src2)) }
+emit_evinsb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evinsb_r_r_r(dst, src, src2)) }
 inst_evxtrb_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVXTRB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evxtrb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evxtrb_r_r_r(dst, src, src2)) }
+emit_evxtrb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evxtrb_r_r_r(dst, src, src2)) }
 inst_evsplath_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplath_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplath_r_r_r(dst, src, src2)) }
+emit_evsplath_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplath_r_r_r(dst, src, src2)) }
 inst_evsplatb_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSPLATB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsplatb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsplatb_r_r_r(dst, src, src2)) }
+emit_evsplatb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsplatb_r_r_r(dst, src, src2)) }
 inst_evinsh_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVINSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evinsh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evinsh_r_r_r(dst, src, src2)) }
+emit_evinsh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evinsh_r_r_r(dst, src, src2)) }
 inst_evclrbe_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCLRBE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evclrbe_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evclrbe_r_r_r(dst, src, src2)) }
+emit_evclrbe_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evclrbe_r_r_r(dst, src, src2)) }
 inst_evclrbo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCLRBO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evclrbo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evclrbo_r_r_r(dst, src, src2)) }
+emit_evclrbo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evclrbo_r_r_r(dst, src, src2)) }
 inst_evclrh_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVCLRH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evclrh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evclrh_r_r_r(dst, src, src2)) }
+emit_evclrh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evclrh_r_r_r(dst, src, src2)) }
 inst_evxtrh_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVXTRH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evxtrh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evxtrh_r_r_r(dst, src, src2)) }
+emit_evxtrh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evxtrh_r_r_r(dst, src, src2)) }
 inst_evselbitm0_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSELBITM0, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evselbitm0_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evselbitm0_r_r_r(dst, src, src2)) }
+emit_evselbitm0_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evselbitm0_r_r_r(dst, src, src2)) }
 inst_evselbitm1_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSELBITM1, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evselbitm1_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evselbitm1_r_r_r(dst, src, src2)) }
+emit_evselbitm1_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evselbitm1_r_r_r(dst, src, src2)) }
 inst_evselbit_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSELBIT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evselbit_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evselbit_r_r_r(dst, src, src2)) }
+emit_evselbit_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evselbit_r_r_r(dst, src, src2)) }
 inst_evperm_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPERM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evperm_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evperm_r_r_r(dst, src, src2)) }
+emit_evperm_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evperm_r_r_r(dst, src, src2)) }
 inst_evperm2_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPERM2, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evperm2_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evperm2_r_r_r(dst, src, src2)) }
+emit_evperm2_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evperm2_r_r_r(dst, src, src2)) }
 inst_evperm3_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPERM3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evperm3_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evperm3_r_r_r(dst, src, src2)) }
+emit_evperm3_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evperm3_r_r_r(dst, src, src2)) }
 inst_evxtrd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVXTRD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evxtrd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evxtrd_r_r_r(dst, src, src2)) }
+emit_evxtrd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evxtrd_r_r_r(dst, src, src2)) }
 inst_evsrbu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrbu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrbu_r_r_r(dst, src, src2)) }
+emit_evsrbu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrbu_r_r_r(dst, src, src2)) }
 inst_evsrbs_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrbs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrbs_r_r_r(dst, src, src2)) }
+emit_evsrbs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrbs_r_r_r(dst, src, src2)) }
 inst_evsrbiu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRBIU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrbiu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrbiu_r_r_r(dst, src, src2)) }
+emit_evsrbiu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrbiu_r_r_r(dst, src, src2)) }
 inst_evsrbis_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRBIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrbis_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrbis_r_r_r(dst, src, src2)) }
+emit_evsrbis_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrbis_r_r_r(dst, src, src2)) }
 inst_evslb_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSLB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evslb_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evslb_r_r_r(dst, src, src2)) }
+emit_evslb_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evslb_r_r_r(dst, src, src2)) }
 inst_evrlb_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRLB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrlb_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrlb_r_r_r(dst, src, src2)) }
+emit_evrlb_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrlb_r_r_r(dst, src, src2)) }
 inst_evslbi_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSLBI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evslbi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evslbi_r_r_r(dst, src, src2)) }
+emit_evslbi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evslbi_r_r_r(dst, src, src2)) }
 inst_evrlbi_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRLBI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrlbi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrlbi_r_r_r(dst, src, src2)) }
+emit_evrlbi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrlbi_r_r_r(dst, src, src2)) }
 inst_evsrhu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrhu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrhu_r_r_r(dst, src, src2)) }
+emit_evsrhu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrhu_r_r_r(dst, src, src2)) }
 inst_evsrhs_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrhs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrhs_r_r_r(dst, src, src2)) }
+emit_evsrhs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrhs_r_r_r(dst, src, src2)) }
 inst_evsrhiu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRHIU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrhiu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrhiu_r_r_r(dst, src, src2)) }
+emit_evsrhiu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrhiu_r_r_r(dst, src, src2)) }
 inst_evsrhis_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRHIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrhis_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrhis_r_r_r(dst, src, src2)) }
+emit_evsrhis_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrhis_r_r_r(dst, src, src2)) }
 inst_evslh_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSLH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evslh_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evslh_r_r_r(dst, src, src2)) }
+emit_evslh_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evslh_r_r_r(dst, src, src2)) }
 inst_evrlh_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRLH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrlh_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrlh_r_r_r(dst, src, src2)) }
+emit_evrlh_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrlh_r_r_r(dst, src, src2)) }
 inst_evslhi_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSLHI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evslhi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evslhi_r_r_r(dst, src, src2)) }
+emit_evslhi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evslhi_r_r_r(dst, src, src2)) }
 inst_evrlhi_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVRLHI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evrlhi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evrlhi_r_r_r(dst, src, src2)) }
+emit_evrlhi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evrlhi_r_r_r(dst, src, src2)) }
 inst_evsru_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsru_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsru_r_r_r(dst, src, src2)) }
+emit_evsru_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsru_r_r_r(dst, src, src2)) }
 inst_evsrs_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrs_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrs_r_r_r(dst, src, src2)) }
+emit_evsrs_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrs_r_r_r(dst, src, src2)) }
 inst_evsriu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRIU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsriu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsriu_r_r_r(dst, src, src2)) }
+emit_evsriu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsriu_r_r_r(dst, src, src2)) }
 inst_evsris_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSRIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsris_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsris_r_r_r(dst, src, src2)) }
+emit_evsris_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsris_r_r_r(dst, src, src2)) }
 inst_evlvsl_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLVSL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlvsl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlvsl_r_r_r(dst, src, src2)) }
+emit_evlvsl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlvsl_r_r_r(dst, src, src2)) }
 inst_evlvsr_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLVSR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlvsr_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlvsr_r_r_r(dst, src, src2)) }
+emit_evlvsr_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlvsr_r_r_r(dst, src, src2)) }
 inst_evsroiu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSROIU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsroiu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsroiu_r_r_r(dst, src, src2)) }
+emit_evsroiu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsroiu_r_r_r(dst, src, src2)) }
 inst_evsrois_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSROIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsrois_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsrois_r_r_r(dst, src, src2)) }
+emit_evsrois_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsrois_r_r_r(dst, src, src2)) }
 inst_evsloi_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSLOI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsloi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsloi_r_r_r(dst, src, src2)) }
+emit_evsloi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsloi_r_r_r(dst, src, src2)) }
 inst_evldbx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldbx_r_r_r(dst, src, src2)) }
+emit_evldbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldbx_r_r_r(dst, src, src2)) }
 inst_evldb_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldb_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldb_r_r_r(dst, src, src2)) }
+emit_evldb_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldb_r_r_r(dst, src, src2)) }
 inst_evlhhsplathx_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHSPLATHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhsplathx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhsplathx_r_r_r(dst, src, src2)) }
+emit_evlhhsplathx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhsplathx_r_r_r(dst, src, src2)) }
 inst_evlhhsplath_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHSPLATH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhsplath_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhsplath_r_r_r(dst, src, src2)) }
+emit_evlhhsplath_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhsplath_r_r_r(dst, src, src2)) }
 inst_evlwbsplatwx_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBSPLATWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbsplatwx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbsplatwx_r_r_r(dst, src, src2)) }
+emit_evlwbsplatwx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbsplatwx_r_r_r(dst, src, src2)) }
 inst_evlwbsplatw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBSPLATW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbsplatw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbsplatw_r_r_r(dst, src, src2)) }
+emit_evlwbsplatw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbsplatw_r_r_r(dst, src, src2)) }
 inst_evlwhsplatwx_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHSPLATWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhsplatwx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhsplatwx_r_r_r(dst, src, src2)) }
+emit_evlwhsplatwx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhsplatwx_r_r_r(dst, src, src2)) }
 inst_evlwhsplatw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHSPLATW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhsplatw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhsplatw_r_r_r(dst, src, src2)) }
+emit_evlwhsplatw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhsplatw_r_r_r(dst, src, src2)) }
 inst_evlbbsplatbx_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLBBSPLATBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlbbsplatbx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlbbsplatbx_r_r_r(dst, src, src2)) }
+emit_evlbbsplatbx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlbbsplatbx_r_r_r(dst, src, src2)) }
 inst_evlbbsplatb_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLBBSPLATB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlbbsplatb_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlbbsplatb_r_r_r(dst, src, src2)) }
+emit_evlbbsplatb_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlbbsplatb_r_r_r(dst, src, src2)) }
 inst_evstdbx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdbx_r_r_r(dst, src, src2)) }
+emit_evstdbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdbx_r_r_r(dst, src, src2)) }
 inst_evstdb_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdb_r_r_r(dst, src, src2)) }
+emit_evstdb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdb_r_r_r(dst, src, src2)) }
 inst_evlwbex_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBEX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbex_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbex_r_r_r(dst, src, src2)) }
+emit_evlwbex_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbex_r_r_r(dst, src, src2)) }
 inst_evlwbe_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbe_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbe_r_r_r(dst, src, src2)) }
+emit_evlwbe_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbe_r_r_r(dst, src, src2)) }
 inst_evlwboux_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBOUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwboux_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwboux_r_r_r(dst, src, src2)) }
+emit_evlwboux_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwboux_r_r_r(dst, src, src2)) }
 inst_evlwbou_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBOU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbou_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbou_r_r_r(dst, src, src2)) }
+emit_evlwbou_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbou_r_r_r(dst, src, src2)) }
 inst_evlwbosx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBOSX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbosx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbosx_r_r_r(dst, src, src2)) }
+emit_evlwbosx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbosx_r_r_r(dst, src, src2)) }
 inst_evlwbos_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBOS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbos_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbos_r_r_r(dst, src, src2)) }
+emit_evlwbos_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbos_r_r_r(dst, src, src2)) }
 inst_evstwbex_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBEX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbex_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbex_r_r_r(dst, src, src2)) }
+emit_evstwbex_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbex_r_r_r(dst, src, src2)) }
 inst_evstwbe_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbe_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbe_r_r_r(dst, src, src2)) }
+emit_evstwbe_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbe_r_r_r(dst, src, src2)) }
 inst_evstwbox_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBOX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbox_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbox_r_r_r(dst, src, src2)) }
+emit_evstwbox_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbox_r_r_r(dst, src, src2)) }
 inst_evstwbo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbo_r_r_r(dst, src, src2)) }
+emit_evstwbo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbo_r_r_r(dst, src, src2)) }
 inst_evstwbx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbx_r_r_r(dst, src, src2)) }
+emit_evstwbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbx_r_r_r(dst, src, src2)) }
 inst_evstwb_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwb_r_r_r(dst, src, src2)) }
+emit_evstwb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwb_r_r_r(dst, src, src2)) }
 inst_evsthbx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTHBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsthbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsthbx_r_r_r(dst, src, src2)) }
+emit_evsthbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsthbx_r_r_r(dst, src, src2)) }
 inst_evsthb_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTHB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsthb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsthb_r_r_r(dst, src, src2)) }
+emit_evsthb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsthb_r_r_r(dst, src, src2)) }
 inst_evlddmx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDDMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlddmx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlddmx_r_r_r(dst, src, src2)) }
+emit_evlddmx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlddmx_r_r_r(dst, src, src2)) }
 inst_evlddu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlddu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlddu_r_r_r(dst, src, src2)) }
+emit_evlddu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlddu_r_r_r(dst, src, src2)) }
 inst_evldwmx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDWMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldwmx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldwmx_r_r_r(dst, src, src2)) }
+emit_evldwmx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldwmx_r_r_r(dst, src, src2)) }
 inst_evldwu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldwu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldwu_r_r_r(dst, src, src2)) }
+emit_evldwu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldwu_r_r_r(dst, src, src2)) }
 inst_evldhmx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDHMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldhmx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldhmx_r_r_r(dst, src, src2)) }
+emit_evldhmx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldhmx_r_r_r(dst, src, src2)) }
 inst_evldhu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldhu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldhu_r_r_r(dst, src, src2)) }
+emit_evldhu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldhu_r_r_r(dst, src, src2)) }
 inst_evldbmx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDBMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldbmx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldbmx_r_r_r(dst, src, src2)) }
+emit_evldbmx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldbmx_r_r_r(dst, src, src2)) }
 inst_evldbu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evldbu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evldbu_r_r_r(dst, src, src2)) }
+emit_evldbu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evldbu_r_r_r(dst, src, src2)) }
 inst_evlhhesplatmx_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHESPLATMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhesplatmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhesplatmx_r_r_r(dst, src, src2)) }
+emit_evlhhesplatmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhesplatmx_r_r_r(dst, src, src2)) }
 inst_evlhhesplatu_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHESPLATU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhesplatu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhesplatu_r_r_r(dst, src, src2)) }
+emit_evlhhesplatu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhesplatu_r_r_r(dst, src, src2)) }
 inst_evlhhsplathmx_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHSPLATHMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhsplathmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhsplathmx_r_r_r(dst, src, src2)) }
+emit_evlhhsplathmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhsplathmx_r_r_r(dst, src, src2)) }
 inst_evlhhsplathu_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHSPLATHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhsplathu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhsplathu_r_r_r(dst, src, src2)) }
+emit_evlhhsplathu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhsplathu_r_r_r(dst, src, src2)) }
 inst_evlhhousplatmx_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHOUSPLATMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhousplatmx_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhousplatmx_r_r_r(dst, src, src2)) }
+emit_evlhhousplatmx_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhousplatmx_r_r_r(dst, src, src2)) }
 inst_evlhhousplatu_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHOUSPLATU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhousplatu_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhousplatu_r_r_r(dst, src, src2)) }
+emit_evlhhousplatu_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhousplatu_r_r_r(dst, src, src2)) }
 inst_evlhhossplatmx_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHOSSPLATMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhossplatmx_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhossplatmx_r_r_r(dst, src, src2)) }
+emit_evlhhossplatmx_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhossplatmx_r_r_r(dst, src, src2)) }
 inst_evlhhossplatu_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLHHOSSPLATU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlhhossplatu_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlhhossplatu_r_r_r(dst, src, src2)) }
+emit_evlhhossplatu_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlhhossplatu_r_r_r(dst, src, src2)) }
 inst_evlwhemx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHEMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhemx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhemx_r_r_r(dst, src, src2)) }
+emit_evlwhemx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhemx_r_r_r(dst, src, src2)) }
 inst_evlwheu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHEU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwheu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwheu_r_r_r(dst, src, src2)) }
+emit_evlwheu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwheu_r_r_r(dst, src, src2)) }
 inst_evlwbsplatwmx_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBSPLATWMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbsplatwmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbsplatwmx_r_r_r(dst, src, src2)) }
+emit_evlwbsplatwmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbsplatwmx_r_r_r(dst, src, src2)) }
 inst_evlwbsplatwu_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBSPLATWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbsplatwu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbsplatwu_r_r_r(dst, src, src2)) }
+emit_evlwbsplatwu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbsplatwu_r_r_r(dst, src, src2)) }
 inst_evlwhoumx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHOUMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhoumx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhoumx_r_r_r(dst, src, src2)) }
+emit_evlwhoumx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhoumx_r_r_r(dst, src, src2)) }
 inst_evlwhouu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHOUU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhouu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhouu_r_r_r(dst, src, src2)) }
+emit_evlwhouu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhouu_r_r_r(dst, src, src2)) }
 inst_evlwhosmx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHOSMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhosmx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhosmx_r_r_r(dst, src, src2)) }
+emit_evlwhosmx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhosmx_r_r_r(dst, src, src2)) }
 inst_evlwhosu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHOSU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhosu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhosu_r_r_r(dst, src, src2)) }
+emit_evlwhosu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhosu_r_r_r(dst, src, src2)) }
 inst_evlwwsplatmx_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWWSPLATMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwwsplatmx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwwsplatmx_r_r_r(dst, src, src2)) }
+emit_evlwwsplatmx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwwsplatmx_r_r_r(dst, src, src2)) }
 inst_evlwwsplatu_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWWSPLATU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwwsplatu_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwwsplatu_r_r_r(dst, src, src2)) }
+emit_evlwwsplatu_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwwsplatu_r_r_r(dst, src, src2)) }
 inst_evlwhsplatwmx_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHSPLATWMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhsplatwmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhsplatwmx_r_r_r(dst, src, src2)) }
+emit_evlwhsplatwmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhsplatwmx_r_r_r(dst, src, src2)) }
 inst_evlwhsplatwu_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHSPLATWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhsplatwu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhsplatwu_r_r_r(dst, src, src2)) }
+emit_evlwhsplatwu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhsplatwu_r_r_r(dst, src, src2)) }
 inst_evlwhsplatmx_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHSPLATMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhsplatmx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhsplatmx_r_r_r(dst, src, src2)) }
+emit_evlwhsplatmx_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhsplatmx_r_r_r(dst, src, src2)) }
 inst_evlwhsplatu_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWHSPLATU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwhsplatu_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwhsplatu_r_r_r(dst, src, src2)) }
+emit_evlwhsplatu_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwhsplatu_r_r_r(dst, src, src2)) }
 inst_evlbbsplatbmx_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLBBSPLATBMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlbbsplatbmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlbbsplatbmx_r_r_r(dst, src, src2)) }
+emit_evlbbsplatbmx_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlbbsplatbmx_r_r_r(dst, src, src2)) }
 inst_evlbbsplatbu_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLBBSPLATBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlbbsplatbu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlbbsplatbu_r_r_r(dst, src, src2)) }
+emit_evlbbsplatbu_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlbbsplatbu_r_r_r(dst, src, src2)) }
 inst_evstddmx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDDMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstddmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstddmx_r_r_r(dst, src, src2)) }
+emit_evstddmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstddmx_r_r_r(dst, src, src2)) }
 inst_evstddu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstddu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstddu_r_r_r(dst, src, src2)) }
+emit_evstddu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstddu_r_r_r(dst, src, src2)) }
 inst_evstdwmx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDWMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdwmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdwmx_r_r_r(dst, src, src2)) }
+emit_evstdwmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdwmx_r_r_r(dst, src, src2)) }
 inst_evstdwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdwu_r_r_r(dst, src, src2)) }
+emit_evstdwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdwu_r_r_r(dst, src, src2)) }
 inst_evstdhmx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDHMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdhmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdhmx_r_r_r(dst, src, src2)) }
+emit_evstdhmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdhmx_r_r_r(dst, src, src2)) }
 inst_evstdhu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdhu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdhu_r_r_r(dst, src, src2)) }
+emit_evstdhu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdhu_r_r_r(dst, src, src2)) }
 inst_evstdbmx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDBMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdbmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdbmx_r_r_r(dst, src, src2)) }
+emit_evstdbmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdbmx_r_r_r(dst, src, src2)) }
 inst_evstdbu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstdbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstdbu_r_r_r(dst, src, src2)) }
+emit_evstdbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstdbu_r_r_r(dst, src, src2)) }
 inst_evlwbemx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBEMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbemx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbemx_r_r_r(dst, src, src2)) }
+emit_evlwbemx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbemx_r_r_r(dst, src, src2)) }
 inst_evlwbeu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBEU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbeu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbeu_r_r_r(dst, src, src2)) }
+emit_evlwbeu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbeu_r_r_r(dst, src, src2)) }
 inst_evlwboumx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBOUMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwboumx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwboumx_r_r_r(dst, src, src2)) }
+emit_evlwboumx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwboumx_r_r_r(dst, src, src2)) }
 inst_evlwbouu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBOUU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbouu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbouu_r_r_r(dst, src, src2)) }
+emit_evlwbouu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbouu_r_r_r(dst, src, src2)) }
 inst_evlwbosmx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBOSMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbosmx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbosmx_r_r_r(dst, src, src2)) }
+emit_evlwbosmx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbosmx_r_r_r(dst, src, src2)) }
 inst_evlwbosu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLWBOSU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlwbosu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlwbosu_r_r_r(dst, src, src2)) }
+emit_evlwbosu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlwbosu_r_r_r(dst, src, src2)) }
 inst_evstwhemx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWHEMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwhemx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwhemx_r_r_r(dst, src, src2)) }
+emit_evstwhemx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwhemx_r_r_r(dst, src, src2)) }
 inst_evstwheu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWHEU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwheu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwheu_r_r_r(dst, src, src2)) }
+emit_evstwheu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwheu_r_r_r(dst, src, src2)) }
 inst_evstwbemx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBEMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbemx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbemx_r_r_r(dst, src, src2)) }
+emit_evstwbemx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbemx_r_r_r(dst, src, src2)) }
 inst_evstwbeu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBEU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbeu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbeu_r_r_r(dst, src, src2)) }
+emit_evstwbeu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbeu_r_r_r(dst, src, src2)) }
 inst_evstwhomx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWHOMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwhomx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwhomx_r_r_r(dst, src, src2)) }
+emit_evstwhomx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwhomx_r_r_r(dst, src, src2)) }
 inst_evstwhou_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWHOU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwhou_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwhou_r_r_r(dst, src, src2)) }
+emit_evstwhou_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwhou_r_r_r(dst, src, src2)) }
 inst_evstwbomx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBOMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbomx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbomx_r_r_r(dst, src, src2)) }
+emit_evstwbomx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbomx_r_r_r(dst, src, src2)) }
 inst_evstwbou_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBOU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbou_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbou_r_r_r(dst, src, src2)) }
+emit_evstwbou_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbou_r_r_r(dst, src, src2)) }
 inst_evstwwemx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWWEMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwwemx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwwemx_r_r_r(dst, src, src2)) }
+emit_evstwwemx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwwemx_r_r_r(dst, src, src2)) }
 inst_evstwweu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWWEU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwweu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwweu_r_r_r(dst, src, src2)) }
+emit_evstwweu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwweu_r_r_r(dst, src, src2)) }
 inst_evstwbmx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbmx_r_r_r(dst, src, src2)) }
+emit_evstwbmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbmx_r_r_r(dst, src, src2)) }
 inst_evstwbu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwbu_r_r_r(dst, src, src2)) }
+emit_evstwbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwbu_r_r_r(dst, src, src2)) }
 inst_evstwwomx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWWOMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwwomx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwwomx_r_r_r(dst, src, src2)) }
+emit_evstwwomx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwwomx_r_r_r(dst, src, src2)) }
 inst_evstwwou_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTWWOU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstwwou_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstwwou_r_r_r(dst, src, src2)) }
+emit_evstwwou_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstwwou_r_r_r(dst, src, src2)) }
 inst_evsthbmx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTHBMX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsthbmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsthbmx_r_r_r(dst, src, src2)) }
+emit_evsthbmx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsthbmx_r_r_r(dst, src, src2)) }
 inst_evsthbu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTHBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsthbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsthbu_r_r_r(dst, src, src2)) }
+emit_evsthbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsthbu_r_r_r(dst, src, src2)) }
 inst_evmhusi_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHUSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhusi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhusi_r_r_r(dst, src, src2)) }
+emit_evmhusi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhusi_r_r_r(dst, src, src2)) }
 inst_evmhssi_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHSSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhssi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhssi_r_r_r(dst, src, src2)) }
+emit_evmhssi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhssi_r_r_r(dst, src, src2)) }
 inst_evmhsusi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHSUSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhsusi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhsusi_r_r_r(dst, src, src2)) }
+emit_evmhsusi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhsusi_r_r_r(dst, src, src2)) }
 inst_evmhssf_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHSSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhssf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhssf_r_r_r(dst, src, src2)) }
+emit_evmhssf_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhssf_r_r_r(dst, src, src2)) }
 inst_evmhumi_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhumi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhumi_r_r_r(dst, src, src2)) }
+emit_evmhumi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhumi_r_r_r(dst, src, src2)) }
 inst_evmhssfr_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHSSFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhssfr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhssfr_r_r_r(dst, src, src2)) }
+emit_evmhssfr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhssfr_r_r_r(dst, src, src2)) }
 inst_evmhesumi_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesumi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesumi_r_r_r(dst, src, src2)) }
+emit_evmhesumi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesumi_r_r_r(dst, src, src2)) }
 inst_evmhosumi_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosumi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosumi_r_r_r(dst, src, src2)) }
+emit_evmhosumi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosumi_r_r_r(dst, src, src2)) }
 inst_evmbeumi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBEUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbeumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbeumi_r_r_r(dst, src, src2)) }
+emit_evmbeumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbeumi_r_r_r(dst, src, src2)) }
 inst_evmbesmi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesmi_r_r_r(dst, src, src2)) }
+emit_evmbesmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesmi_r_r_r(dst, src, src2)) }
 inst_evmbesumi_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesumi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesumi_r_r_r(dst, src, src2)) }
+emit_evmbesumi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesumi_r_r_r(dst, src, src2)) }
 inst_evmboumi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmboumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmboumi_r_r_r(dst, src, src2)) }
+emit_evmboumi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmboumi_r_r_r(dst, src, src2)) }
 inst_evmbosmi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosmi_r_r_r(dst, src, src2)) }
+emit_evmbosmi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosmi_r_r_r(dst, src, src2)) }
 inst_evmbosumi_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSUMI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosumi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosumi_r_r_r(dst, src, src2)) }
+emit_evmbosumi_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosumi_r_r_r(dst, src, src2)) }
 inst_evmhesumia_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesumia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesumia_r_r_r(dst, src, src2)) }
+emit_evmhesumia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesumia_r_r_r(dst, src, src2)) }
 inst_evmhosumia_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosumia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosumia_r_r_r(dst, src, src2)) }
+emit_evmhosumia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosumia_r_r_r(dst, src, src2)) }
 inst_evmbeumia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBEUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbeumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbeumia_r_r_r(dst, src, src2)) }
+emit_evmbeumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbeumia_r_r_r(dst, src, src2)) }
 inst_evmbesmia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesmia_r_r_r(dst, src, src2)) }
+emit_evmbesmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesmia_r_r_r(dst, src, src2)) }
 inst_evmbesumia_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesumia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesumia_r_r_r(dst, src, src2)) }
+emit_evmbesumia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesumia_r_r_r(dst, src, src2)) }
 inst_evmboumia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmboumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmboumia_r_r_r(dst, src, src2)) }
+emit_evmboumia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmboumia_r_r_r(dst, src, src2)) }
 inst_evmbosmia_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosmia_r_r_r(dst, src, src2)) }
+emit_evmbosmia_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosmia_r_r_r(dst, src, src2)) }
 inst_evmbosumia_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSUMIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosumia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosumia_r_r_r(dst, src, src2)) }
+emit_evmbosumia_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosumia_r_r_r(dst, src, src2)) }
 inst_evmwusiw_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWUSIW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwusiw_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwusiw_r_r_r(dst, src, src2)) }
+emit_evmwusiw_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwusiw_r_r_r(dst, src, src2)) }
 inst_evmwssiw_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSSIW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwssiw_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwssiw_r_r_r(dst, src, src2)) }
+emit_evmwssiw_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwssiw_r_r_r(dst, src, src2)) }
 inst_evmwhssfr_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfr_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfr_r_r_r(dst, src, src2)) }
+emit_evmwhssfr_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfr_r_r_r(dst, src, src2)) }
 inst_evmwehgsmfr_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWEHGSMFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwehgsmfr_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwehgsmfr_r_r_r(dst, src, src2)) }
+emit_evmwehgsmfr_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwehgsmfr_r_r_r(dst, src, src2)) }
 inst_evmwehgsmf_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWEHGSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwehgsmf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwehgsmf_r_r_r(dst, src, src2)) }
+emit_evmwehgsmf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwehgsmf_r_r_r(dst, src, src2)) }
 inst_evmwohgsmfr_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWOHGSMFR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwohgsmfr_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwohgsmfr_r_r_r(dst, src, src2)) }
+emit_evmwohgsmfr_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwohgsmfr_r_r_r(dst, src, src2)) }
 inst_evmwohgsmf_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWOHGSMF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwohgsmf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwohgsmf_r_r_r(dst, src, src2)) }
+emit_evmwohgsmf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwohgsmf_r_r_r(dst, src, src2)) }
 inst_evmwhssfra_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfra_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfra_r_r_r(dst, src, src2)) }
+emit_evmwhssfra_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfra_r_r_r(dst, src, src2)) }
 inst_evmwehgsmfra_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWEHGSMFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwehgsmfra_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwehgsmfra_r_r_r(dst, src, src2)) }
+emit_evmwehgsmfra_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwehgsmfra_r_r_r(dst, src, src2)) }
 inst_evmwehgsmfa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWEHGSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwehgsmfa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwehgsmfa_r_r_r(dst, src, src2)) }
+emit_evmwehgsmfa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwehgsmfa_r_r_r(dst, src, src2)) }
 inst_evmwohgsmfra_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWOHGSMFRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwohgsmfra_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwohgsmfra_r_r_r(dst, src, src2)) }
+emit_evmwohgsmfra_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwohgsmfra_r_r_r(dst, src, src2)) }
 inst_evmwohgsmfa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWOHGSMFA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwohgsmfa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwohgsmfa_r_r_r(dst, src, src2)) }
+emit_evmwohgsmfa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwohgsmfa_r_r_r(dst, src, src2)) }
 inst_evaddusiaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDUSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddusiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddusiaa_r_r_r(dst, src, src2)) }
+emit_evaddusiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddusiaa_r_r_r(dst, src, src2)) }
 inst_evaddssiaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddssiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddssiaa_r_r_r(dst, src, src2)) }
+emit_evaddssiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddssiaa_r_r_r(dst, src, src2)) }
 inst_evsubfusiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFUSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfusiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfusiaa_r_r_r(dst, src, src2)) }
+emit_evsubfusiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfusiaa_r_r_r(dst, src, src2)) }
 inst_evsubfssiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFSSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfssiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfssiaa_r_r_r(dst, src, src2)) }
+emit_evsubfssiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfssiaa_r_r_r(dst, src, src2)) }
 inst_evaddsmiaa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsmiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsmiaa_r_r_r(dst, src, src2)) }
+emit_evaddsmiaa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsmiaa_r_r_r(dst, src, src2)) }
 inst_evsubfsmiaa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFSMIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfsmiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfsmiaa_r_r_r(dst, src, src2)) }
+emit_evsubfsmiaa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfsmiaa_r_r_r(dst, src, src2)) }
 inst_evaddh_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddh_r_r_r(dst, src, src2)) }
+emit_evaddh_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddh_r_r_r(dst, src, src2)) }
 inst_evaddhss_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhss_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhss_r_r_r(dst, src, src2)) }
+emit_evaddhss_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhss_r_r_r(dst, src, src2)) }
 inst_evsubfh_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfh_r_r_r(dst, src, src2)) }
+emit_evsubfh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfh_r_r_r(dst, src, src2)) }
 inst_evsubfhss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhss_r_r_r(dst, src, src2)) }
+emit_evsubfhss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhss_r_r_r(dst, src, src2)) }
 inst_evaddhx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhx_r_r_r(dst, src, src2)) }
+emit_evaddhx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhx_r_r_r(dst, src, src2)) }
 inst_evaddhxss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHXSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhxss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhxss_r_r_r(dst, src, src2)) }
+emit_evaddhxss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhxss_r_r_r(dst, src, src2)) }
 inst_evsubfhx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhx_r_r_r(dst, src, src2)) }
+emit_evsubfhx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhx_r_r_r(dst, src, src2)) }
 inst_evsubfhxss_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHXSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhxss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhxss_r_r_r(dst, src, src2)) }
+emit_evsubfhxss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhxss_r_r_r(dst, src, src2)) }
 inst_evaddd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddd_r_r_r(dst, src, src2)) }
+emit_evaddd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddd_r_r_r(dst, src, src2)) }
 inst_evadddss_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDDSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evadddss_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evadddss_r_r_r(dst, src, src2)) }
+emit_evadddss_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evadddss_r_r_r(dst, src, src2)) }
 inst_evsubfd_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfd_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfd_r_r_r(dst, src, src2)) }
+emit_evsubfd_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfd_r_r_r(dst, src, src2)) }
 inst_evsubfdss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFDSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfdss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfdss_r_r_r(dst, src, src2)) }
+emit_evsubfdss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfdss_r_r_r(dst, src, src2)) }
 inst_evaddb_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddb_r_r_r(dst, src, src2)) }
+emit_evaddb_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddb_r_r_r(dst, src, src2)) }
 inst_evaddbss_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDBSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddbss_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddbss_r_r_r(dst, src, src2)) }
+emit_evaddbss_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddbss_r_r_r(dst, src, src2)) }
 inst_evsubfb_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfb_r_r_r(dst, src, src2)) }
+emit_evsubfb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfb_r_r_r(dst, src, src2)) }
 inst_evsubfbss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFBSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfbss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfbss_r_r_r(dst, src, src2)) }
+emit_evsubfbss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfbss_r_r_r(dst, src, src2)) }
 inst_evaddsubfh_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSUBFH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsubfh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsubfh_r_r_r(dst, src, src2)) }
+emit_evaddsubfh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsubfh_r_r_r(dst, src, src2)) }
 inst_evaddsubfhss_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSUBFHSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsubfhss_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsubfhss_r_r_r(dst, src, src2)) }
+emit_evaddsubfhss_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsubfhss_r_r_r(dst, src, src2)) }
 inst_evsubfaddh_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFADDH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfaddh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfaddh_r_r_r(dst, src, src2)) }
+emit_evsubfaddh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfaddh_r_r_r(dst, src, src2)) }
 inst_evsubfaddhss_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFADDHSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfaddhss_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfaddhss_r_r_r(dst, src, src2)) }
+emit_evsubfaddhss_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfaddhss_r_r_r(dst, src, src2)) }
 inst_evaddsubfhx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSUBFHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsubfhx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsubfhx_r_r_r(dst, src, src2)) }
+emit_evaddsubfhx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsubfhx_r_r_r(dst, src, src2)) }
 inst_evaddsubfhxss_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSUBFHXSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsubfhxss_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsubfhxss_r_r_r(dst, src, src2)) }
+emit_evaddsubfhxss_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsubfhxss_r_r_r(dst, src, src2)) }
 inst_evsubfaddhx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFADDHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfaddhx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfaddhx_r_r_r(dst, src, src2)) }
+emit_evsubfaddhx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfaddhx_r_r_r(dst, src, src2)) }
 inst_evsubfaddhxss_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFADDHXSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfaddhxss_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfaddhxss_r_r_r(dst, src, src2)) }
+emit_evsubfaddhxss_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfaddhxss_r_r_r(dst, src, src2)) }
 inst_evadddus_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDDUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evadddus_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evadddus_r_r_r(dst, src, src2)) }
+emit_evadddus_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evadddus_r_r_r(dst, src, src2)) }
 inst_evaddbus_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDBUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddbus_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddbus_r_r_r(dst, src, src2)) }
+emit_evaddbus_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddbus_r_r_r(dst, src, src2)) }
 inst_evsubfdus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFDUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfdus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfdus_r_r_r(dst, src, src2)) }
+emit_evsubfdus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfdus_r_r_r(dst, src, src2)) }
 inst_evsubfbus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFBUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfbus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfbus_r_r_r(dst, src, src2)) }
+emit_evsubfbus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfbus_r_r_r(dst, src, src2)) }
 inst_evaddwus_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwus_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwus_r_r_r(dst, src, src2)) }
+emit_evaddwus_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwus_r_r_r(dst, src, src2)) }
 inst_evaddwxus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWXUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwxus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwxus_r_r_r(dst, src, src2)) }
+emit_evaddwxus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwxus_r_r_r(dst, src, src2)) }
 inst_evsubfwus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwus_r_r_r(dst, src, src2)) }
+emit_evsubfwus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwus_r_r_r(dst, src, src2)) }
 inst_evsubfwxus_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWXUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwxus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwxus_r_r_r(dst, src, src2)) }
+emit_evsubfwxus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwxus_r_r_r(dst, src, src2)) }
 inst_evadd2subf2h_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADD2SUBF2H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evadd2subf2h_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evadd2subf2h_r_r_r(dst, src, src2)) }
+emit_evadd2subf2h_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evadd2subf2h_r_r_r(dst, src, src2)) }
 inst_evadd2subf2hss_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADD2SUBF2HSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evadd2subf2hss_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evadd2subf2hss_r_r_r(dst, src, src2)) }
+emit_evadd2subf2hss_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evadd2subf2hss_r_r_r(dst, src, src2)) }
 inst_evsubf2add2h_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBF2ADD2H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubf2add2h_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubf2add2h_r_r_r(dst, src, src2)) }
+emit_evsubf2add2h_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubf2add2h_r_r_r(dst, src, src2)) }
 inst_evsubf2add2hss_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBF2ADD2HSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubf2add2hss_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubf2add2hss_r_r_r(dst, src, src2)) }
+emit_evsubf2add2hss_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubf2add2hss_r_r_r(dst, src, src2)) }
 inst_evaddhus_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhus_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhus_r_r_r(dst, src, src2)) }
+emit_evaddhus_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhus_r_r_r(dst, src, src2)) }
 inst_evaddhxus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHXUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhxus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhxus_r_r_r(dst, src, src2)) }
+emit_evaddhxus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhxus_r_r_r(dst, src, src2)) }
 inst_evsubfhus_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhus_r_r_r(dst, src, src2)) }
+emit_evsubfhus_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhus_r_r_r(dst, src, src2)) }
 inst_evsubfhxus_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHXUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhxus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhxus_r_r_r(dst, src, src2)) }
+emit_evsubfhxus_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhxus_r_r_r(dst, src, src2)) }
 inst_evaddwss_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwss_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwss_r_r_r(dst, src, src2)) }
+emit_evaddwss_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwss_r_r_r(dst, src, src2)) }
 inst_evsubfwss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwss_r_r_r(dst, src, src2)) }
+emit_evsubfwss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwss_r_r_r(dst, src, src2)) }
 inst_evaddwx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwx_r_r_r(dst, src, src2)) }
+emit_evaddwx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwx_r_r_r(dst, src, src2)) }
 inst_evaddwxss_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWXSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwxss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwxss_r_r_r(dst, src, src2)) }
+emit_evaddwxss_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwxss_r_r_r(dst, src, src2)) }
 inst_evsubfwx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwx_r_r_r(dst, src, src2)) }
+emit_evsubfwx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwx_r_r_r(dst, src, src2)) }
 inst_evsubfwxss_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWXSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwxss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwxss_r_r_r(dst, src, src2)) }
+emit_evsubfwxss_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwxss_r_r_r(dst, src, src2)) }
 inst_evaddsubfw_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSUBFW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsubfw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsubfw_r_r_r(dst, src, src2)) }
+emit_evaddsubfw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsubfw_r_r_r(dst, src, src2)) }
 inst_evaddsubfwss_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSUBFWSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsubfwss_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsubfwss_r_r_r(dst, src, src2)) }
+emit_evaddsubfwss_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsubfwss_r_r_r(dst, src, src2)) }
 inst_evsubfaddw_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFADDW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfaddw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfaddw_r_r_r(dst, src, src2)) }
+emit_evsubfaddw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfaddw_r_r_r(dst, src, src2)) }
 inst_evsubfaddwss_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFADDWSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfaddwss_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfaddwss_r_r_r(dst, src, src2)) }
+emit_evsubfaddwss_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfaddwss_r_r_r(dst, src, src2)) }
 inst_evaddsubfwx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSUBFWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsubfwx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsubfwx_r_r_r(dst, src, src2)) }
+emit_evaddsubfwx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsubfwx_r_r_r(dst, src, src2)) }
 inst_evaddsubfwxss_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDSUBFWXSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddsubfwxss_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddsubfwxss_r_r_r(dst, src, src2)) }
+emit_evaddsubfwxss_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddsubfwxss_r_r_r(dst, src, src2)) }
 inst_evsubfaddwx_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFADDWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfaddwx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfaddwx_r_r_r(dst, src, src2)) }
+emit_evsubfaddwx_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfaddwx_r_r_r(dst, src, src2)) }
 inst_evsubfaddwxss_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFADDWXSS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfaddwxss_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfaddwxss_r_r_r(dst, src, src2)) }
+emit_evsubfaddwxss_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfaddwxss_r_r_r(dst, src, src2)) }
 inst_evmar_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmar_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmar_r_r_r(dst, src, src2)) }
+emit_evmar_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmar_r_r_r(dst, src, src2)) }
 inst_evsumwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUMWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsumwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsumwu_r_r_r(dst, src, src2)) }
+emit_evsumwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsumwu_r_r_r(dst, src, src2)) }
 inst_evsumws_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUMWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsumws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsumws_r_r_r(dst, src, src2)) }
+emit_evsumws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsumws_r_r_r(dst, src, src2)) }
 inst_evsum4bu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM4BU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum4bu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum4bu_r_r_r(dst, src, src2)) }
+emit_evsum4bu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum4bu_r_r_r(dst, src, src2)) }
 inst_evsum4bs_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM4BS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum4bs_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum4bs_r_r_r(dst, src, src2)) }
+emit_evsum4bs_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum4bs_r_r_r(dst, src, src2)) }
 inst_evsum2hu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2hu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2hu_r_r_r(dst, src, src2)) }
+emit_evsum2hu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2hu_r_r_r(dst, src, src2)) }
 inst_evsum2hs_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2hs_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2hs_r_r_r(dst, src, src2)) }
+emit_evsum2hs_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2hs_r_r_r(dst, src, src2)) }
 inst_evdiff2his_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIFF2HIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdiff2his_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdiff2his_r_r_r(dst, src, src2)) }
+emit_evdiff2his_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdiff2his_r_r_r(dst, src, src2)) }
 inst_evsum2his_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2his_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2his_r_r_r(dst, src, src2)) }
+emit_evsum2his_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2his_r_r_r(dst, src, src2)) }
 inst_evsumwua_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUMWUA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsumwua_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsumwua_r_r_r(dst, src, src2)) }
+emit_evsumwua_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsumwua_r_r_r(dst, src, src2)) }
 inst_evsumwsa_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUMWSA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsumwsa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsumwsa_r_r_r(dst, src, src2)) }
+emit_evsumwsa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsumwsa_r_r_r(dst, src, src2)) }
 inst_evsum4bua_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM4BUA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum4bua_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum4bua_r_r_r(dst, src, src2)) }
+emit_evsum4bua_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum4bua_r_r_r(dst, src, src2)) }
 inst_evsum4bsa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM4BSA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum4bsa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum4bsa_r_r_r(dst, src, src2)) }
+emit_evsum4bsa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum4bsa_r_r_r(dst, src, src2)) }
 inst_evsum2hua_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HUA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2hua_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2hua_r_r_r(dst, src, src2)) }
+emit_evsum2hua_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2hua_r_r_r(dst, src, src2)) }
 inst_evsum2hsa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HSA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2hsa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2hsa_r_r_r(dst, src, src2)) }
+emit_evsum2hsa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2hsa_r_r_r(dst, src, src2)) }
 inst_evdiff2hisa_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIFF2HISA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdiff2hisa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdiff2hisa_r_r_r(dst, src, src2)) }
+emit_evdiff2hisa_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdiff2hisa_r_r_r(dst, src, src2)) }
 inst_evsum2hisa_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HISA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2hisa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2hisa_r_r_r(dst, src, src2)) }
+emit_evsum2hisa_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2hisa_r_r_r(dst, src, src2)) }
 inst_evsumwuaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUMWUAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsumwuaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsumwuaa_r_r_r(dst, src, src2)) }
+emit_evsumwuaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsumwuaa_r_r_r(dst, src, src2)) }
 inst_evsumwsaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUMWSAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsumwsaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsumwsaa_r_r_r(dst, src, src2)) }
+emit_evsumwsaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsumwsaa_r_r_r(dst, src, src2)) }
 inst_evsum4buaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM4BUAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum4buaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum4buaaw_r_r_r(dst, src, src2)) }
+emit_evsum4buaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum4buaaw_r_r_r(dst, src, src2)) }
 inst_evsum4bsaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM4BSAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum4bsaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum4bsaaw_r_r_r(dst, src, src2)) }
+emit_evsum4bsaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum4bsaaw_r_r_r(dst, src, src2)) }
 inst_evsum2huaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HUAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2huaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2huaaw_r_r_r(dst, src, src2)) }
+emit_evsum2huaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2huaaw_r_r_r(dst, src, src2)) }
 inst_evsum2hsaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HSAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2hsaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2hsaaw_r_r_r(dst, src, src2)) }
+emit_evsum2hsaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2hsaaw_r_r_r(dst, src, src2)) }
 inst_evdiff2hisaaw_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIFF2HISAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdiff2hisaaw_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdiff2hisaaw_r_r_r(dst, src, src2)) }
+emit_evdiff2hisaaw_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdiff2hisaaw_r_r_r(dst, src, src2)) }
 inst_evsum2hisaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUM2HISAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsum2hisaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsum2hisaaw_r_r_r(dst, src, src2)) }
+emit_evsum2hisaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsum2hisaaw_r_r_r(dst, src, src2)) }
 inst_evdivwsf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIVWSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdivwsf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdivwsf_r_r_r(dst, src, src2)) }
+emit_evdivwsf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdivwsf_r_r_r(dst, src, src2)) }
 inst_evdivwuf_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIVWUF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdivwuf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdivwuf_r_r_r(dst, src, src2)) }
+emit_evdivwuf_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdivwuf_r_r_r(dst, src, src2)) }
 inst_evdivs_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIVS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdivs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdivs_r_r_r(dst, src, src2)) }
+emit_evdivs_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdivs_r_r_r(dst, src, src2)) }
 inst_evdivu_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDIVU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdivu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdivu_r_r_r(dst, src, src2)) }
+emit_evdivu_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdivu_r_r_r(dst, src, src2)) }
 inst_evaddwegsi_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWEGSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwegsi_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwegsi_r_r_r(dst, src, src2)) }
+emit_evaddwegsi_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwegsi_r_r_r(dst, src, src2)) }
 inst_evaddwegsf_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWEGSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwegsf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwegsf_r_r_r(dst, src, src2)) }
+emit_evaddwegsf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwegsf_r_r_r(dst, src, src2)) }
 inst_evsubfwegsi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWEGSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwegsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwegsi_r_r_r(dst, src, src2)) }
+emit_evsubfwegsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwegsi_r_r_r(dst, src, src2)) }
 inst_evsubfwegsf_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWEGSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwegsf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwegsf_r_r_r(dst, src, src2)) }
+emit_evsubfwegsf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwegsf_r_r_r(dst, src, src2)) }
 inst_evaddwogsi_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWOGSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwogsi_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwogsi_r_r_r(dst, src, src2)) }
+emit_evaddwogsi_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwogsi_r_r_r(dst, src, src2)) }
 inst_evaddwogsf_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDWOGSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddwogsf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddwogsf_r_r_r(dst, src, src2)) }
+emit_evaddwogsf_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddwogsf_r_r_r(dst, src, src2)) }
 inst_evsubfwogsi_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWOGSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwogsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwogsi_r_r_r(dst, src, src2)) }
+emit_evsubfwogsi_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwogsi_r_r_r(dst, src, src2)) }
 inst_evsubfwogsf_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFWOGSF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfwogsf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfwogsf_r_r_r(dst, src, src2)) }
+emit_evsubfwogsf_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfwogsf_r_r_r(dst, src, src2)) }
 inst_evaddhhiuw_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHHIUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhhiuw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhhiuw_r_r_r(dst, src, src2)) }
+emit_evaddhhiuw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhhiuw_r_r_r(dst, src, src2)) }
 inst_evaddhhisw_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHHISW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhhisw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhhisw_r_r_r(dst, src, src2)) }
+emit_evaddhhisw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhhisw_r_r_r(dst, src, src2)) }
 inst_evsubfhhiuw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHHIUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhhiuw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhhiuw_r_r_r(dst, src, src2)) }
+emit_evsubfhhiuw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhhiuw_r_r_r(dst, src, src2)) }
 inst_evsubfhhisw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHHISW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhhisw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhhisw_r_r_r(dst, src, src2)) }
+emit_evsubfhhisw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhhisw_r_r_r(dst, src, src2)) }
 inst_evaddhlouw_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHLOUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhlouw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhlouw_r_r_r(dst, src, src2)) }
+emit_evaddhlouw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhlouw_r_r_r(dst, src, src2)) }
 inst_evaddhlosw_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVADDHLOSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evaddhlosw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evaddhlosw_r_r_r(dst, src, src2)) }
+emit_evaddhlosw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evaddhlosw_r_r_r(dst, src, src2)) }
 inst_evsubfhlouw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHLOUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhlouw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhlouw_r_r_r(dst, src, src2)) }
+emit_evsubfhlouw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhlouw_r_r_r(dst, src, src2)) }
 inst_evsubfhlosw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSUBFHLOSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsubfhlosw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsubfhlosw_r_r_r(dst, src, src2)) }
+emit_evsubfhlosw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsubfhlosw_r_r_r(dst, src, src2)) }
 inst_evmhesusiaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesusiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesusiaaw_r_r_r(dst, src, src2)) }
+emit_evmhesusiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesusiaaw_r_r_r(dst, src, src2)) }
 inst_evmhosusiaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSUSIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosusiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosusiaaw_r_r_r(dst, src, src2)) }
+emit_evmhosusiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosusiaaw_r_r_r(dst, src, src2)) }
 inst_evmhesumiaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesumiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesumiaaw_r_r_r(dst, src, src2)) }
+emit_evmhesumiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesumiaaw_r_r_r(dst, src, src2)) }
 inst_evmhosumiaaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSUMIAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosumiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosumiaaw_r_r_r(dst, src, src2)) }
+emit_evmhosumiaaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosumiaaw_r_r_r(dst, src, src2)) }
 inst_evmbeusiaah_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBEUSIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbeusiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbeusiaah_r_r_r(dst, src, src2)) }
+emit_evmbeusiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbeusiaah_r_r_r(dst, src, src2)) }
 inst_evmbessiaah_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESSIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbessiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbessiaah_r_r_r(dst, src, src2)) }
+emit_evmbessiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbessiaah_r_r_r(dst, src, src2)) }
 inst_evmbesusiaah_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESUSIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesusiaah_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesusiaah_r_r_r(dst, src, src2)) }
+emit_evmbesusiaah_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesusiaah_r_r_r(dst, src, src2)) }
 inst_evmbousiaah_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOUSIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbousiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbousiaah_r_r_r(dst, src, src2)) }
+emit_evmbousiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbousiaah_r_r_r(dst, src, src2)) }
 inst_evmbossiaah_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSSIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbossiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbossiaah_r_r_r(dst, src, src2)) }
+emit_evmbossiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbossiaah_r_r_r(dst, src, src2)) }
 inst_evmbosusiaah_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSUSIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosusiaah_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosusiaah_r_r_r(dst, src, src2)) }
+emit_evmbosusiaah_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosusiaah_r_r_r(dst, src, src2)) }
 inst_evmbeumiaah_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBEUMIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbeumiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbeumiaah_r_r_r(dst, src, src2)) }
+emit_evmbeumiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbeumiaah_r_r_r(dst, src, src2)) }
 inst_evmbesmiaah_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESMIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesmiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesmiaah_r_r_r(dst, src, src2)) }
+emit_evmbesmiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesmiaah_r_r_r(dst, src, src2)) }
 inst_evmbesumiaah_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESUMIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesumiaah_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesumiaah_r_r_r(dst, src, src2)) }
+emit_evmbesumiaah_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesumiaah_r_r_r(dst, src, src2)) }
 inst_evmboumiaah_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOUMIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmboumiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmboumiaah_r_r_r(dst, src, src2)) }
+emit_evmboumiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmboumiaah_r_r_r(dst, src, src2)) }
 inst_evmbosmiaah_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSMIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosmiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosmiaah_r_r_r(dst, src, src2)) }
+emit_evmbosmiaah_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosmiaah_r_r_r(dst, src, src2)) }
 inst_evmbosumiaah_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSUMIAAH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosumiaah_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosumiaah_r_r_r(dst, src, src2)) }
+emit_evmbosumiaah_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosumiaah_r_r_r(dst, src, src2)) }
 inst_evmwlusiaaw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlusiaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlusiaaw3_r_r_r(dst, src, src2)) }
+emit_evmwlusiaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlusiaaw3_r_r_r(dst, src, src2)) }
 inst_evmwlssiaaw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSSIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlssiaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlssiaaw3_r_r_r(dst, src, src2)) }
+emit_evmwlssiaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlssiaaw3_r_r_r(dst, src, src2)) }
 inst_evmwhssfraaw3_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFRAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfraaw3_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfraaw3_r_r_r(dst, src, src2)) }
+emit_evmwhssfraaw3_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfraaw3_r_r_r(dst, src, src2)) }
 inst_evmwhssfaaw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfaaw3_r_r_r(dst, src, src2)) }
+emit_evmwhssfaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfaaw3_r_r_r(dst, src, src2)) }
 inst_evmwhssfraaw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFRAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfraaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfraaw_r_r_r(dst, src, src2)) }
+emit_evmwhssfraaw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfraaw_r_r_r(dst, src, src2)) }
 inst_evmwhssfaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfaaw_r_r_r(dst, src, src2)) }
+emit_evmwhssfaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfaaw_r_r_r(dst, src, src2)) }
 inst_evmwlumiaaw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlumiaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlumiaaw3_r_r_r(dst, src, src2)) }
+emit_evmwlumiaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlumiaaw3_r_r_r(dst, src, src2)) }
 inst_evmwlsmiaaw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSMIAAW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlsmiaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlsmiaaw3_r_r_r(dst, src, src2)) }
+emit_evmwlsmiaaw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlsmiaaw3_r_r_r(dst, src, src2)) }
 inst_evmwusiaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWUSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwusiaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwusiaa_r_r_r(dst, src, src2)) }
+emit_evmwusiaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwusiaa_r_r_r(dst, src, src2)) }
 inst_evmwssiaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSSIAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwssiaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwssiaa_r_r_r(dst, src, src2)) }
+emit_evmwssiaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwssiaa_r_r_r(dst, src, src2)) }
 inst_evmwehgsmfraa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWEHGSMFRAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwehgsmfraa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwehgsmfraa_r_r_r(dst, src, src2)) }
+emit_evmwehgsmfraa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwehgsmfraa_r_r_r(dst, src, src2)) }
 inst_evmwehgsmfaa_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWEHGSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwehgsmfaa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwehgsmfaa_r_r_r(dst, src, src2)) }
+emit_evmwehgsmfaa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwehgsmfaa_r_r_r(dst, src, src2)) }
 inst_evmwohgsmfraa_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWOHGSMFRAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwohgsmfraa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwohgsmfraa_r_r_r(dst, src, src2)) }
+emit_evmwohgsmfraa_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwohgsmfraa_r_r_r(dst, src, src2)) }
 inst_evmwohgsmfaa_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWOHGSMFAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwohgsmfaa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwohgsmfaa_r_r_r(dst, src, src2)) }
+emit_evmwohgsmfaa_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwohgsmfaa_r_r_r(dst, src, src2)) }
 inst_evmhesusianw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESUSIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesusianw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesusianw_r_r_r(dst, src, src2)) }
+emit_evmhesusianw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesusianw_r_r_r(dst, src, src2)) }
 inst_evmhosusianw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSUSIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosusianw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosusianw_r_r_r(dst, src, src2)) }
+emit_evmhosusianw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosusianw_r_r_r(dst, src, src2)) }
 inst_evmhesumianw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHESUMIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhesumianw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhesumianw_r_r_r(dst, src, src2)) }
+emit_evmhesumianw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhesumianw_r_r_r(dst, src, src2)) }
 inst_evmhosumianw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMHOSUMIANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmhosumianw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmhosumianw_r_r_r(dst, src, src2)) }
+emit_evmhosumianw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmhosumianw_r_r_r(dst, src, src2)) }
 inst_evmbeusianh_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBEUSIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbeusianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbeusianh_r_r_r(dst, src, src2)) }
+emit_evmbeusianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbeusianh_r_r_r(dst, src, src2)) }
 inst_evmbessianh_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESSIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbessianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbessianh_r_r_r(dst, src, src2)) }
+emit_evmbessianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbessianh_r_r_r(dst, src, src2)) }
 inst_evmbesusianh_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESUSIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesusianh_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesusianh_r_r_r(dst, src, src2)) }
+emit_evmbesusianh_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesusianh_r_r_r(dst, src, src2)) }
 inst_evmbousianh_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOUSIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbousianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbousianh_r_r_r(dst, src, src2)) }
+emit_evmbousianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbousianh_r_r_r(dst, src, src2)) }
 inst_evmbossianh_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSSIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbossianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbossianh_r_r_r(dst, src, src2)) }
+emit_evmbossianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbossianh_r_r_r(dst, src, src2)) }
 inst_evmbosusianh_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSUSIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosusianh_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosusianh_r_r_r(dst, src, src2)) }
+emit_evmbosusianh_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosusianh_r_r_r(dst, src, src2)) }
 inst_evmbeumianh_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBEUMIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbeumianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbeumianh_r_r_r(dst, src, src2)) }
+emit_evmbeumianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbeumianh_r_r_r(dst, src, src2)) }
 inst_evmbesmianh_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESMIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesmianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesmianh_r_r_r(dst, src, src2)) }
+emit_evmbesmianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesmianh_r_r_r(dst, src, src2)) }
 inst_evmbesumianh_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBESUMIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbesumianh_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbesumianh_r_r_r(dst, src, src2)) }
+emit_evmbesumianh_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbesumianh_r_r_r(dst, src, src2)) }
 inst_evmboumianh_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOUMIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmboumianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmboumianh_r_r_r(dst, src, src2)) }
+emit_evmboumianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmboumianh_r_r_r(dst, src, src2)) }
 inst_evmbosmianh_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSMIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosmianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosmianh_r_r_r(dst, src, src2)) }
+emit_evmbosmianh_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosmianh_r_r_r(dst, src, src2)) }
 inst_evmbosumianh_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMBOSUMIANH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmbosumianh_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmbosumianh_r_r_r(dst, src, src2)) }
+emit_evmbosumianh_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmbosumianh_r_r_r(dst, src, src2)) }
 inst_evmwlusianw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUSIANW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlusianw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlusianw3_r_r_r(dst, src, src2)) }
+emit_evmwlusianw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlusianw3_r_r_r(dst, src, src2)) }
 inst_evmwlssianw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSSIANW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlssianw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlssianw3_r_r_r(dst, src, src2)) }
+emit_evmwlssianw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlssianw3_r_r_r(dst, src, src2)) }
 inst_evmwhssfranw3_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFRANW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfranw3_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfranw3_r_r_r(dst, src, src2)) }
+emit_evmwhssfranw3_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfranw3_r_r_r(dst, src, src2)) }
 inst_evmwhssfanw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFANW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfanw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfanw3_r_r_r(dst, src, src2)) }
+emit_evmwhssfanw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfanw3_r_r_r(dst, src, src2)) }
 inst_evmwhssfranw_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFRANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfranw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfranw_r_r_r(dst, src, src2)) }
+emit_evmwhssfranw_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfranw_r_r_r(dst, src, src2)) }
 inst_evmwhssfanw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWHSSFANW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwhssfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwhssfanw_r_r_r(dst, src, src2)) }
+emit_evmwhssfanw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwhssfanw_r_r_r(dst, src, src2)) }
 inst_evmwlumianw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLUMIANW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlumianw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlumianw3_r_r_r(dst, src, src2)) }
+emit_evmwlumianw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlumianw3_r_r_r(dst, src, src2)) }
 inst_evmwlsmianw3_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWLSMIANW3, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwlsmianw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwlsmianw3_r_r_r(dst, src, src2)) }
+emit_evmwlsmianw3_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwlsmianw3_r_r_r(dst, src, src2)) }
 inst_evmwusian_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWUSIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwusian_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwusian_r_r_r(dst, src, src2)) }
+emit_evmwusian_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwusian_r_r_r(dst, src, src2)) }
 inst_evmwssian_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWSSIAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwssian_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwssian_r_r_r(dst, src, src2)) }
+emit_evmwssian_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwssian_r_r_r(dst, src, src2)) }
 inst_evmwehgsmfran_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWEHGSMFRAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwehgsmfran_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwehgsmfran_r_r_r(dst, src, src2)) }
+emit_evmwehgsmfran_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwehgsmfran_r_r_r(dst, src, src2)) }
 inst_evmwehgsmfan_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWEHGSMFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwehgsmfan_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwehgsmfan_r_r_r(dst, src, src2)) }
+emit_evmwehgsmfan_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwehgsmfan_r_r_r(dst, src, src2)) }
 inst_evmwohgsmfran_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWOHGSMFRAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwohgsmfran_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwohgsmfran_r_r_r(dst, src, src2)) }
+emit_evmwohgsmfran_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwohgsmfran_r_r_r(dst, src, src2)) }
 inst_evmwohgsmfan_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMWOHGSMFAN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmwohgsmfan_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmwohgsmfan_r_r_r(dst, src, src2)) }
+emit_evmwohgsmfan_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmwohgsmfan_r_r_r(dst, src, src2)) }
 inst_evseteqb_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETEQB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evseteqb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evseteqb_r_r_r(dst, src, src2)) }
+emit_evseteqb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evseteqb_r_r_r(dst, src, src2)) }
 inst_evseteqh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETEQH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evseteqh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evseteqh_r_r_r(dst, src, src2)) }
+emit_evseteqh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evseteqh_r_r_r(dst, src, src2)) }
 inst_evseteqw_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETEQW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evseteqw_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evseteqw_r_r_r(dst, src, src2)) }
+emit_evseteqw_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evseteqw_r_r_r(dst, src, src2)) }
 inst_evsetgthu_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgthu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgthu_r_r_r(dst, src, src2)) }
+emit_evsetgthu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgthu_r_r_r(dst, src, src2)) }
 inst_evsetgths_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgths_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgths_r_r_r(dst, src, src2)) }
+emit_evsetgths_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgths_r_r_r(dst, src, src2)) }
 inst_evsetgtwu_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgtwu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgtwu_r_r_r(dst, src, src2)) }
+emit_evsetgtwu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgtwu_r_r_r(dst, src, src2)) }
 inst_evsetgtws_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgtws_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgtws_r_r_r(dst, src, src2)) }
+emit_evsetgtws_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgtws_r_r_r(dst, src, src2)) }
 inst_evsetgtbu_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgtbu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgtbu_r_r_r(dst, src, src2)) }
+emit_evsetgtbu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgtbu_r_r_r(dst, src, src2)) }
 inst_evsetgtbs_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgtbs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgtbs_r_r_r(dst, src, src2)) }
+emit_evsetgtbs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgtbs_r_r_r(dst, src, src2)) }
 inst_evsetltbu_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetltbu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetltbu_r_r_r(dst, src, src2)) }
+emit_evsetltbu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetltbu_r_r_r(dst, src, src2)) }
 inst_evsetltbs_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetltbs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetltbs_r_r_r(dst, src, src2)) }
+emit_evsetltbs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetltbs_r_r_r(dst, src, src2)) }
 inst_evsetlthu_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetlthu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetlthu_r_r_r(dst, src, src2)) }
+emit_evsetlthu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetlthu_r_r_r(dst, src, src2)) }
 inst_evsetlths_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetlths_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetlths_r_r_r(dst, src, src2)) }
+emit_evsetlths_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetlths_r_r_r(dst, src, src2)) }
 inst_evsetltwu_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetltwu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetltwu_r_r_r(dst, src, src2)) }
+emit_evsetltwu_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetltwu_r_r_r(dst, src, src2)) }
 inst_evsetltws_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetltws_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetltws_r_r_r(dst, src, src2)) }
+emit_evsetltws_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetltws_r_r_r(dst, src, src2)) }
 inst_evsaduw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSADUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsaduw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsaduw_r_r_r(dst, src, src2)) }
+emit_evsaduw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsaduw_r_r_r(dst, src, src2)) }
 inst_evsadsw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSADSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsadsw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsadsw_r_r_r(dst, src, src2)) }
+emit_evsadsw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsadsw_r_r_r(dst, src, src2)) }
 inst_evsad4ub_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD4UB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad4ub_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad4ub_r_r_r(dst, src, src2)) }
+emit_evsad4ub_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad4ub_r_r_r(dst, src, src2)) }
 inst_evsad4sb_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD4SB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad4sb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad4sb_r_r_r(dst, src, src2)) }
+emit_evsad4sb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad4sb_r_r_r(dst, src, src2)) }
 inst_evsad2uh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD2UH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad2uh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad2uh_r_r_r(dst, src, src2)) }
+emit_evsad2uh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad2uh_r_r_r(dst, src, src2)) }
 inst_evsad2sh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD2SH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad2sh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad2sh_r_r_r(dst, src, src2)) }
+emit_evsad2sh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad2sh_r_r_r(dst, src, src2)) }
 inst_evsaduwa_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSADUWA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsaduwa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsaduwa_r_r_r(dst, src, src2)) }
+emit_evsaduwa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsaduwa_r_r_r(dst, src, src2)) }
 inst_evsadswa_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSADSWA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsadswa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsadswa_r_r_r(dst, src, src2)) }
+emit_evsadswa_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsadswa_r_r_r(dst, src, src2)) }
 inst_evsad4uba_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD4UBA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad4uba_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad4uba_r_r_r(dst, src, src2)) }
+emit_evsad4uba_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad4uba_r_r_r(dst, src, src2)) }
 inst_evsad4sba_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD4SBA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad4sba_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad4sba_r_r_r(dst, src, src2)) }
+emit_evsad4sba_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad4sba_r_r_r(dst, src, src2)) }
 inst_evsad2uha_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD2UHA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad2uha_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad2uha_r_r_r(dst, src, src2)) }
+emit_evsad2uha_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad2uha_r_r_r(dst, src, src2)) }
 inst_evsad2sha_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD2SHA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad2sha_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad2sha_r_r_r(dst, src, src2)) }
+emit_evsad2sha_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad2sha_r_r_r(dst, src, src2)) }
 inst_evabsdifuw_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSDIFUW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsdifuw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsdifuw_r_r_r(dst, src, src2)) }
+emit_evabsdifuw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsdifuw_r_r_r(dst, src, src2)) }
 inst_evabsdifsw_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSDIFSW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsdifsw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsdifsw_r_r_r(dst, src, src2)) }
+emit_evabsdifsw_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsdifsw_r_r_r(dst, src, src2)) }
 inst_evabsdifub_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSDIFUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsdifub_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsdifub_r_r_r(dst, src, src2)) }
+emit_evabsdifub_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsdifub_r_r_r(dst, src, src2)) }
 inst_evabsdifsb_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSDIFSB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsdifsb_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsdifsb_r_r_r(dst, src, src2)) }
+emit_evabsdifsb_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsdifsb_r_r_r(dst, src, src2)) }
 inst_evabsdifuh_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSDIFUH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsdifuh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsdifuh_r_r_r(dst, src, src2)) }
+emit_evabsdifuh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsdifuh_r_r_r(dst, src, src2)) }
 inst_evabsdifsh_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVABSDIFSH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evabsdifsh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evabsdifsh_r_r_r(dst, src, src2)) }
+emit_evabsdifsh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evabsdifsh_r_r_r(dst, src, src2)) }
 inst_evsaduwaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSADUWAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsaduwaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsaduwaa_r_r_r(dst, src, src2)) }
+emit_evsaduwaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsaduwaa_r_r_r(dst, src, src2)) }
 inst_evsadswaa_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSADSWAA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsadswaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsadswaa_r_r_r(dst, src, src2)) }
+emit_evsadswaa_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsadswaa_r_r_r(dst, src, src2)) }
 inst_evsad4ubaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD4UBAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad4ubaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad4ubaaw_r_r_r(dst, src, src2)) }
+emit_evsad4ubaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad4ubaaw_r_r_r(dst, src, src2)) }
 inst_evsad4sbaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD4SBAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad4sbaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad4sbaaw_r_r_r(dst, src, src2)) }
+emit_evsad4sbaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad4sbaaw_r_r_r(dst, src, src2)) }
 inst_evsad2uhaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD2UHAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad2uhaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad2uhaaw_r_r_r(dst, src, src2)) }
+emit_evsad2uhaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad2uhaaw_r_r_r(dst, src, src2)) }
 inst_evsad2shaaw_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSAD2SHAAW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsad2shaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsad2shaaw_r_r_r(dst, src, src2)) }
+emit_evsad2shaaw_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsad2shaaw_r_r_r(dst, src, src2)) }
 inst_evpkshubs_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSHUBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkshubs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkshubs_r_r_r(dst, src, src2)) }
+emit_evpkshubs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkshubs_r_r_r(dst, src, src2)) }
 inst_evpkshsbs_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSHSBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkshsbs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkshsbs_r_r_r(dst, src, src2)) }
+emit_evpkshsbs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkshsbs_r_r_r(dst, src, src2)) }
 inst_evpkswuhs_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSWUHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkswuhs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkswuhs_r_r_r(dst, src, src2)) }
+emit_evpkswuhs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkswuhs_r_r_r(dst, src, src2)) }
 inst_evpkswshs_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSWSHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkswshs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkswshs_r_r_r(dst, src, src2)) }
+emit_evpkswshs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkswshs_r_r_r(dst, src, src2)) }
 inst_evpkuhubs_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKUHUBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkuhubs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkuhubs_r_r_r(dst, src, src2)) }
+emit_evpkuhubs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkuhubs_r_r_r(dst, src, src2)) }
 inst_evpkuwuhs_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKUWUHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkuwuhs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkuwuhs_r_r_r(dst, src, src2)) }
+emit_evpkuwuhs_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkuwuhs_r_r_r(dst, src, src2)) }
 inst_evpkswshilvs_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSWSHILVS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkswshilvs_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkswshilvs_r_r_r(dst, src, src2)) }
+emit_evpkswshilvs_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkswshilvs_r_r_r(dst, src, src2)) }
 inst_evpkswgshefrs_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSWGSHEFRS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkswgshefrs_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkswgshefrs_r_r_r(dst, src, src2)) }
+emit_evpkswgshefrs_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkswgshefrs_r_r_r(dst, src, src2)) }
 inst_evpkswshfrs_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSWSHFRS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkswshfrs_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkswshfrs_r_r_r(dst, src, src2)) }
+emit_evpkswshfrs_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkswshfrs_r_r_r(dst, src, src2)) }
 inst_evpkswshilvfrs_r_r_r                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSWSHILVFRS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkswshilvfrs_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkswshilvfrs_r_r_r(dst, src, src2)) }
+emit_evpkswshilvfrs_r_r_r                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkswshilvfrs_r_r_r(dst, src, src2)) }
 inst_evpksdswfrs_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSDSWFRS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpksdswfrs_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpksdswfrs_r_r_r(dst, src, src2)) }
+emit_evpksdswfrs_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpksdswfrs_r_r_r(dst, src, src2)) }
 inst_evpksdshefrs_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSDSHEFRS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpksdshefrs_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpksdshefrs_r_r_r(dst, src, src2)) }
+emit_evpksdshefrs_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpksdshefrs_r_r_r(dst, src, src2)) }
 inst_evpkuduws_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKUDUWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkuduws_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkuduws_r_r_r(dst, src, src2)) }
+emit_evpkuduws_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkuduws_r_r_r(dst, src, src2)) }
 inst_evpksdsws_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSDSWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpksdsws_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpksdsws_r_r_r(dst, src, src2)) }
+emit_evpksdsws_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpksdsws_r_r_r(dst, src, src2)) }
 inst_evpkswgswfrs_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVPKSWGSWFRS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evpkswgswfrs_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evpkswgswfrs_r_r_r(dst, src, src2)) }
+emit_evpkswgswfrs_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evpkswgswfrs_r_r_r(dst, src, src2)) }
 inst_evilveh_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVILVEH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evilveh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evilveh_r_r_r(dst, src, src2)) }
+emit_evilveh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evilveh_r_r_r(dst, src, src2)) }
 inst_evilveoh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVILVEOH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evilveoh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evilveoh_r_r_r(dst, src, src2)) }
+emit_evilveoh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evilveoh_r_r_r(dst, src, src2)) }
 inst_evilvhih_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVILVHIH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evilvhih_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evilvhih_r_r_r(dst, src, src2)) }
+emit_evilvhih_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evilvhih_r_r_r(dst, src, src2)) }
 inst_evilvhiloh_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVILVHILOH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evilvhiloh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evilvhiloh_r_r_r(dst, src, src2)) }
+emit_evilvhiloh_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evilvhiloh_r_r_r(dst, src, src2)) }
 inst_evilvloh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVILVLOH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evilvloh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evilvloh_r_r_r(dst, src, src2)) }
+emit_evilvloh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evilvloh_r_r_r(dst, src, src2)) }
 inst_evilvlohih_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVILVLOHIH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evilvlohih_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evilvlohih_r_r_r(dst, src, src2)) }
+emit_evilvlohih_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evilvlohih_r_r_r(dst, src, src2)) }
 inst_evilvoeh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVILVOEH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evilvoeh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evilvoeh_r_r_r(dst, src, src2)) }
+emit_evilvoeh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evilvoeh_r_r_r(dst, src, src2)) }
 inst_evilvoh_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVILVOH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evilvoh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evilvoh_r_r_r(dst, src, src2)) }
+emit_evilvoh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evilvoh_r_r_r(dst, src, src2)) }
 inst_evdlveb_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDLVEB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdlveb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdlveb_r_r_r(dst, src, src2)) }
+emit_evdlveb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdlveb_r_r_r(dst, src, src2)) }
 inst_evdlveh_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDLVEH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdlveh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdlveh_r_r_r(dst, src, src2)) }
+emit_evdlveh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdlveh_r_r_r(dst, src, src2)) }
 inst_evdlveob_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDLVEOB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdlveob_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdlveob_r_r_r(dst, src, src2)) }
+emit_evdlveob_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdlveob_r_r_r(dst, src, src2)) }
 inst_evdlveoh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDLVEOH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdlveoh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdlveoh_r_r_r(dst, src, src2)) }
+emit_evdlveoh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdlveoh_r_r_r(dst, src, src2)) }
 inst_evdlvob_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDLVOB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdlvob_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdlvob_r_r_r(dst, src, src2)) }
+emit_evdlvob_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdlvob_r_r_r(dst, src, src2)) }
 inst_evdlvoh_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDLVOH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdlvoh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdlvoh_r_r_r(dst, src, src2)) }
+emit_evdlvoh_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdlvoh_r_r_r(dst, src, src2)) }
 inst_evdlvoeb_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDLVOEB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdlvoeb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdlvoeb_r_r_r(dst, src, src2)) }
+emit_evdlvoeb_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdlvoeb_r_r_r(dst, src, src2)) }
 inst_evdlvoeh_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVDLVOEH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evdlvoeh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evdlvoeh_r_r_r(dst, src, src2)) }
+emit_evdlvoeh_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evdlvoeh_r_r_r(dst, src, src2)) }
 inst_evmaxbu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxbu_r_r_r(dst, src, src2)) }
+emit_evmaxbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxbu_r_r_r(dst, src, src2)) }
 inst_evmaxbs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxbs_r_r_r(dst, src, src2)) }
+emit_evmaxbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxbs_r_r_r(dst, src, src2)) }
 inst_evmaxhu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxhu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxhu_r_r_r(dst, src, src2)) }
+emit_evmaxhu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxhu_r_r_r(dst, src, src2)) }
 inst_evmaxhs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxhs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxhs_r_r_r(dst, src, src2)) }
+emit_evmaxhs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxhs_r_r_r(dst, src, src2)) }
 inst_evmaxwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxwu_r_r_r(dst, src, src2)) }
+emit_evmaxwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxwu_r_r_r(dst, src, src2)) }
 inst_evmaxws_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxws_r_r_r(dst, src, src2)) }
+emit_evmaxws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxws_r_r_r(dst, src, src2)) }
 inst_evmaxdu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxdu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxdu_r_r_r(dst, src, src2)) }
+emit_evmaxdu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxdu_r_r_r(dst, src, src2)) }
 inst_evmaxds_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMAXDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmaxds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmaxds_r_r_r(dst, src, src2)) }
+emit_evmaxds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmaxds_r_r_r(dst, src, src2)) }
 inst_evminbu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminbu_r_r_r(dst, src, src2)) }
+emit_evminbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminbu_r_r_r(dst, src, src2)) }
 inst_evminbs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminbs_r_r_r(dst, src, src2)) }
+emit_evminbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminbs_r_r_r(dst, src, src2)) }
 inst_evminhu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminhu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminhu_r_r_r(dst, src, src2)) }
+emit_evminhu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminhu_r_r_r(dst, src, src2)) }
 inst_evminhs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminhs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminhs_r_r_r(dst, src, src2)) }
+emit_evminhs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminhs_r_r_r(dst, src, src2)) }
 inst_evminwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminwu_r_r_r(dst, src, src2)) }
+emit_evminwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminwu_r_r_r(dst, src, src2)) }
 inst_evminws_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminws_r_r_r(dst, src, src2)) }
+emit_evminws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminws_r_r_r(dst, src, src2)) }
 inst_evmindu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evmindu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evmindu_r_r_r(dst, src, src2)) }
+emit_evmindu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evmindu_r_r_r(dst, src, src2)) }
 inst_evminds_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVMINDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evminds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evminds_r_r_r(dst, src, src2)) }
+emit_evminds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evminds_r_r_r(dst, src, src2)) }
 inst_evavgwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgwu_r_r_r(dst, src, src2)) }
+emit_evavgwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgwu_r_r_r(dst, src, src2)) }
 inst_evavgws_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgws_r_r_r(dst, src, src2)) }
+emit_evavgws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgws_r_r_r(dst, src, src2)) }
 inst_evavgbu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGBU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgbu_r_r_r(dst, src, src2)) }
+emit_evavgbu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgbu_r_r_r(dst, src, src2)) }
 inst_evavgbs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGBS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgbs_r_r_r(dst, src, src2)) }
+emit_evavgbs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgbs_r_r_r(dst, src, src2)) }
 inst_evavghu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGHU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavghu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavghu_r_r_r(dst, src, src2)) }
+emit_evavghu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavghu_r_r_r(dst, src, src2)) }
 inst_evavghs_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGHS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavghs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavghs_r_r_r(dst, src, src2)) }
+emit_evavghs_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavghs_r_r_r(dst, src, src2)) }
 inst_evavgdu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGDU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgdu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgdu_r_r_r(dst, src, src2)) }
+emit_evavgdu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgdu_r_r_r(dst, src, src2)) }
 inst_evavgds_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgds_r_r_r(dst, src, src2)) }
+emit_evavgds_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgds_r_r_r(dst, src, src2)) }
 inst_evavgwur_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGWUR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgwur_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgwur_r_r_r(dst, src, src2)) }
+emit_evavgwur_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgwur_r_r_r(dst, src, src2)) }
 inst_evavgwsr_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGWSR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgwsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgwsr_r_r_r(dst, src, src2)) }
+emit_evavgwsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgwsr_r_r_r(dst, src, src2)) }
 inst_evavgbur_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGBUR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgbur_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgbur_r_r_r(dst, src, src2)) }
+emit_evavgbur_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgbur_r_r_r(dst, src, src2)) }
 inst_evavgbsr_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGBSR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgbsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgbsr_r_r_r(dst, src, src2)) }
+emit_evavgbsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgbsr_r_r_r(dst, src, src2)) }
 inst_evavghur_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGHUR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavghur_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavghur_r_r_r(dst, src, src2)) }
+emit_evavghur_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavghur_r_r_r(dst, src, src2)) }
 inst_evavghsr_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGHSR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavghsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavghsr_r_r_r(dst, src, src2)) }
+emit_evavghsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavghsr_r_r_r(dst, src, src2)) }
 inst_evavgdur_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGDUR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgdur_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgdur_r_r_r(dst, src, src2)) }
+emit_evavgdur_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgdur_r_r_r(dst, src, src2)) }
 inst_evavgdsr_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVAVGDSR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evavgdsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evavgdsr_r_r_r(dst, src, src2)) }
+emit_evavgdsr_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evavgdsr_r_r_r(dst, src, src2)) }
 inst_ps_div_fr_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_DIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_div_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_div_fr_fr_fr(dst, src, src2)) }
+emit_ps_div_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_div_fr_fr_fr(dst, src, src2)) }
 inst_ps_div_dot_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_DIV_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_div_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_div_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_div_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_div_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_sub_fr_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_SUB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_sub_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_sub_fr_fr_fr(dst, src, src2)) }
+emit_ps_sub_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_sub_fr_fr_fr(dst, src, src2)) }
 inst_ps_sub_dot_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_SUB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_sub_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_sub_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_sub_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_sub_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_add_fr_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_ADD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_add_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_add_fr_fr_fr(dst, src, src2)) }
+emit_ps_add_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_add_fr_fr_fr(dst, src, src2)) }
 inst_ps_add_dot_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_ADD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_add_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_add_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_add_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_add_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_sel_fr_fr_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_SEL, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_sel_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_sel_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_sel_fr_fr_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_sel_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_sel_dot_fr_fr_fr_fr              :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_SEL_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_sel_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_sel_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_sel_dot_fr_fr_fr_fr              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_sel_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_res_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_RES, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_res_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_res_fr_fr(dst, src)) }
+emit_ps_res_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_res_fr_fr(dst, src)) }
 inst_ps_res_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_RES_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_res_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_res_dot_fr_fr(dst, src)) }
+emit_ps_res_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_res_dot_fr_fr(dst, src)) }
 inst_ps_mul_fr_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MUL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_mul_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_mul_fr_fr_fr(dst, src, src2)) }
+emit_ps_mul_fr_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_mul_fr_fr_fr(dst, src, src2)) }
 inst_ps_mul_dot_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MUL_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_mul_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_mul_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_mul_dot_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_mul_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_rsqrte_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_RSQRTE, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_rsqrte_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_rsqrte_fr_fr(dst, src)) }
+emit_ps_rsqrte_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_rsqrte_fr_fr(dst, src)) }
 inst_ps_rsqrte_dot_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_RSQRTE_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_rsqrte_dot_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_rsqrte_dot_fr_fr(dst, src)) }
+emit_ps_rsqrte_dot_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_rsqrte_dot_fr_fr(dst, src)) }
 inst_ps_msub_fr_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_MSUB, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_msub_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_msub_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_msub_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_msub_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_msub_dot_fr_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_MSUB_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_msub_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_msub_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_msub_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_msub_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_madd_fr_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_MADD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_madd_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_madd_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_madd_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_madd_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_madd_dot_fr_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_MADD_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_madd_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_madd_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_madd_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_madd_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_nmsub_fr_fr_fr_fr                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_NMSUB, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_nmsub_fr_fr_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_nmsub_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_nmsub_fr_fr_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_nmsub_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_nmsub_dot_fr_fr_fr_fr            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_NMSUB_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_nmsub_dot_fr_fr_fr_fr            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_nmsub_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_nmsub_dot_fr_fr_fr_fr            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_nmsub_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_nmadd_fr_fr_fr_fr                :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_NMADD, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_nmadd_fr_fr_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_nmadd_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_nmadd_fr_fr_fr_fr                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_nmadd_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_nmadd_dot_fr_fr_fr_fr            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_NMADD_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_nmadd_dot_fr_fr_fr_fr            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_nmadd_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_nmadd_dot_fr_fr_fr_fr            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_nmadd_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_sum0_fr_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_SUM0, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_sum0_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_sum0_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_sum0_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_sum0_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_sum0_dot_fr_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_SUM0_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_sum0_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_sum0_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_sum0_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_sum0_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_sum1_fr_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_SUM1, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_sum1_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_sum1_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_sum1_fr_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_sum1_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_sum1_dot_fr_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_SUM1_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_sum1_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_sum1_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_sum1_dot_fr_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_sum1_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_muls0_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MULS0, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_muls0_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_muls0_fr_fr_fr(dst, src, src2)) }
+emit_ps_muls0_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_muls0_fr_fr_fr(dst, src, src2)) }
 inst_ps_muls0_dot_fr_fr_fr               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MULS0_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_muls0_dot_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_muls0_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_muls0_dot_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_muls0_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_muls1_fr_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MULS1, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_muls1_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_muls1_fr_fr_fr(dst, src, src2)) }
+emit_ps_muls1_fr_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_muls1_fr_fr_fr(dst, src, src2)) }
 inst_ps_muls1_dot_fr_fr_fr               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MULS1_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_muls1_dot_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_muls1_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_muls1_dot_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_muls1_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_madds0_fr_fr_fr_fr               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_MADDS0, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_madds0_fr_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_madds0_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_madds0_fr_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_madds0_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_madds0_dot_fr_fr_fr_fr           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_MADDS0_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_madds0_dot_fr_fr_fr_fr           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_madds0_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_madds0_dot_fr_fr_fr_fr           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_madds0_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_madds1_fr_fr_fr_fr               :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_MADDS1, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_madds1_fr_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_madds1_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_madds1_fr_fr_fr_fr               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_madds1_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_madds1_dot_fr_fr_fr_fr           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .PS_MADDS1_DOT, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_ps_madds1_dot_fr_fr_fr_fr           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_ps_madds1_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
+emit_ps_madds1_dot_fr_fr_fr_fr           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_ps_madds1_dot_fr_fr_fr_fr(dst, src, src2, src3)) }
 inst_ps_neg_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_NEG, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_neg_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_neg_fr_fr(dst, src)) }
+emit_ps_neg_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_neg_fr_fr(dst, src)) }
 inst_ps_neg_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_NEG_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_neg_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_neg_dot_fr_fr(dst, src)) }
+emit_ps_neg_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_neg_dot_fr_fr(dst, src)) }
 inst_ps_mr_fr_fr                         :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_MR, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_mr_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_mr_fr_fr(dst, src)) }
+emit_ps_mr_fr_fr                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_mr_fr_fr(dst, src)) }
 inst_ps_mr_dot_fr_fr                     :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_MR_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_mr_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_mr_dot_fr_fr(dst, src)) }
+emit_ps_mr_dot_fr_fr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_mr_dot_fr_fr(dst, src)) }
 inst_ps_nabs_fr_fr                       :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_NABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_nabs_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_nabs_fr_fr(dst, src)) }
+emit_ps_nabs_fr_fr                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_nabs_fr_fr(dst, src)) }
 inst_ps_nabs_dot_fr_fr                   :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_NABS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_nabs_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_nabs_dot_fr_fr(dst, src)) }
+emit_ps_nabs_dot_fr_fr                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_nabs_dot_fr_fr(dst, src)) }
 inst_ps_abs_fr_fr                        :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_ABS, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_abs_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_abs_fr_fr(dst, src)) }
+emit_ps_abs_fr_fr                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_abs_fr_fr(dst, src)) }
 inst_ps_abs_dot_fr_fr                    :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .PS_ABS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_ps_abs_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_ps_abs_dot_fr_fr(dst, src)) }
+emit_ps_abs_dot_fr_fr                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_ps_abs_dot_fr_fr(dst, src)) }
 inst_ps_cmpu0_crf_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_CMPU0, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_cmpu0_crf_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_cmpu0_crf_fr_fr(dst, src, src2)) }
+emit_ps_cmpu0_crf_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_cmpu0_crf_fr_fr(dst, src, src2)) }
 inst_ps_cmpu1_crf_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_CMPU1, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_cmpu1_crf_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_cmpu1_crf_fr_fr(dst, src, src2)) }
+emit_ps_cmpu1_crf_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_cmpu1_crf_fr_fr(dst, src, src2)) }
 inst_ps_cmpo0_crf_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_CMPO0, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_cmpo0_crf_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_cmpo0_crf_fr_fr(dst, src, src2)) }
+emit_ps_cmpo0_crf_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_cmpo0_crf_fr_fr(dst, src, src2)) }
 inst_ps_cmpo1_crf_fr_fr                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_CMPO1, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_cmpo1_crf_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_cmpo1_crf_fr_fr(dst, src, src2)) }
+emit_ps_cmpo1_crf_fr_fr                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_cmpo1_crf_fr_fr(dst, src, src2)) }
 inst_ps_merge00_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MERGE00, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_merge00_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_merge00_fr_fr_fr(dst, src, src2)) }
+emit_ps_merge00_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_merge00_fr_fr_fr(dst, src, src2)) }
 inst_ps_merge00_dot_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MERGE00_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_merge00_dot_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_merge00_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_merge00_dot_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_merge00_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_merge01_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MERGE01, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_merge01_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_merge01_fr_fr_fr(dst, src, src2)) }
+emit_ps_merge01_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_merge01_fr_fr_fr(dst, src, src2)) }
 inst_ps_merge01_dot_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MERGE01_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_merge01_dot_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_merge01_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_merge01_dot_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_merge01_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_merge10_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MERGE10, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_merge10_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_merge10_fr_fr_fr(dst, src, src2)) }
+emit_ps_merge10_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_merge10_fr_fr_fr(dst, src, src2)) }
 inst_ps_merge10_dot_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MERGE10_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_merge10_dot_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_merge10_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_merge10_dot_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_merge10_dot_fr_fr_fr(dst, src, src2)) }
 inst_ps_merge11_fr_fr_fr                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MERGE11, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_merge11_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_merge11_fr_fr_fr(dst, src, src2)) }
+emit_ps_merge11_fr_fr_fr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_merge11_fr_fr_fr(dst, src, src2)) }
 inst_ps_merge11_dot_fr_fr_fr             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PS_MERGE11_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ps_merge11_dot_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ps_merge11_dot_fr_fr_fr(dst, src, src2)) }
+emit_ps_merge11_dot_fr_fr_fr             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ps_merge11_dot_fr_fr_fr(dst, src, src2)) }
 inst_psq_lx_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSQ_LX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psq_lx_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psq_lx_fr_mem(dst, addr)) }
+emit_psq_lx_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psq_lx_fr_mem(dst, addr)) }
 inst_psq_lux_fr_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSQ_LUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psq_lux_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psq_lux_fr_mem(dst, addr)) }
+emit_psq_lux_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psq_lux_fr_mem(dst, addr)) }
 inst_psq_stx_fr_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSQ_STX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psq_stx_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psq_stx_fr_mem(dst, addr)) }
+emit_psq_stx_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psq_stx_fr_mem(dst, addr)) }
 inst_psq_stux_fr_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSQ_STUX, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psq_stux_fr_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psq_stux_fr_mem(dst, addr)) }
+emit_psq_stux_fr_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psq_stux_fr_mem(dst, addr)) }
 inst_psq_l_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSQ_L, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psq_l_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psq_l_fr_mem(dst, addr)) }
+emit_psq_l_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psq_l_fr_mem(dst, addr)) }
 inst_psq_lu_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSQ_LU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psq_lu_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psq_lu_fr_mem(dst, addr)) }
+emit_psq_lu_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psq_lu_fr_mem(dst, addr)) }
 inst_psq_st_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSQ_ST, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psq_st_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psq_st_fr_mem(dst, addr)) }
+emit_psq_st_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psq_st_fr_mem(dst, addr)) }
 inst_psq_stu_fr_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .PSQ_STU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_psq_stu_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_psq_stu_fr_mem(dst, addr)) }
+emit_psq_stu_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_psq_stu_fr_mem(dst, addr)) }
 inst_vaddfp128_vr128_vr128_vr128         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vaddfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vaddfp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vaddfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vaddfp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vsubfp128_vr128_vr128_vr128         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubfp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vsubfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubfp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vmulfp128_vr128_vr128_vr128         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMULFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmulfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmulfp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vmulfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmulfp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vmaddfp128_vr128_vr128_vr128_vr128  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMADDFP128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmaddfp128_vr128_vr128_vr128_vr128  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmaddfp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
+emit_vmaddfp128_vr128_vr128_vr128_vr128  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmaddfp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
 inst_vmaddcfp128_vr128_vr128_vr128_vr128 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMADDCFP128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmaddcfp128_vr128_vr128_vr128_vr128 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmaddcfp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
+emit_vmaddcfp128_vr128_vr128_vr128_vr128 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmaddcfp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
 inst_vnmsubfp128_vr128_vr128_vr128_vr128 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VNMSUBFP128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vnmsubfp128_vr128_vr128_vr128_vr128 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vnmsubfp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
+emit_vnmsubfp128_vr128_vr128_vr128_vr128 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vnmsubfp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
 inst_vmsum3fp128_vr128_vr128_vr128_vr128 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUM3FP128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsum3fp128_vr128_vr128_vr128_vr128 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsum3fp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
+emit_vmsum3fp128_vr128_vr128_vr128_vr128 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsum3fp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
 inst_vmsum4fp128_vr128_vr128_vr128_vr128 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VMSUM4FP128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vmsum4fp128_vr128_vr128_vr128_vr128 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vmsum4fp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
+emit_vmsum4fp128_vr128_vr128_vr128_vr128 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vmsum4fp128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
 inst_vmaxfp128_vr128_vr128_vr128         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMAXFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmaxfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmaxfp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vmaxfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmaxfp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vminfp128_vr128_vr128_vr128         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMINFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vminfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vminfp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vminfp128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vminfp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vrefp128_vr128_vr128                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VREFP128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrefp128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrefp128_vr128_vr128(dst, src)) }
+emit_vrefp128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrefp128_vr128_vr128(dst, src)) }
 inst_vrsqrtefp128_vr128_vr128            :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRSQRTEFP128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrsqrtefp128_vr128_vr128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrsqrtefp128_vr128_vr128(dst, src)) }
+emit_vrsqrtefp128_vr128_vr128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrsqrtefp128_vr128_vr128(dst, src)) }
 inst_vexptefp128_vr128_vr128             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VEXPTEFP128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vexptefp128_vr128_vr128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vexptefp128_vr128_vr128(dst, src)) }
+emit_vexptefp128_vr128_vr128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vexptefp128_vr128_vr128(dst, src)) }
 inst_vlogefp128_vr128_vr128              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VLOGEFP128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vlogefp128_vr128_vr128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vlogefp128_vr128_vr128(dst, src)) }
+emit_vlogefp128_vr128_vr128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vlogefp128_vr128_vr128(dst, src)) }
 inst_vand128_vr128_vr128_vr128           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VAND128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vand128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vand128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vand128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vand128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vandc128_vr128_vr128_vr128          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VANDC128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vandc128_vr128_vr128_vr128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vandc128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vandc128_vr128_vr128_vr128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vandc128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vor128_vr128_vr128_vr128            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VOR128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vor128_vr128_vr128_vr128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vor128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vor128_vr128_vr128_vr128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vor128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vxor128_vr128_vr128_vr128           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VXOR128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vxor128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vxor128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vxor128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vxor128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vnor128_vr128_vr128_vr128           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNOR128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vnor128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vnor128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vnor128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vnor128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vsel128_vr128_vr128_vr128_vr128     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VSEL128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vsel128_vr128_vr128_vr128_vr128     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vsel128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
+emit_vsel128_vr128_vr128_vr128_vr128     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vsel128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
 inst_vcmpeqfp128_vr128_vr128_vr128       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpeqfp128_vr128_vr128_vr128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpeqfp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpeqfp128_vr128_vr128_vr128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpeqfp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpeqfp128_dot_vr128_vr128_vr128   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQFP128_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpeqfp128_dot_vr128_vr128_vr128   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpeqfp128_dot_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpeqfp128_dot_vr128_vr128_vr128   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpeqfp128_dot_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpgefp128_vr128_vr128_vr128       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGEFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgefp128_vr128_vr128_vr128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgefp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpgefp128_vr128_vr128_vr128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgefp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpgefp128_dot_vr128_vr128_vr128   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGEFP128_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgefp128_dot_vr128_vr128_vr128   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgefp128_dot_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpgefp128_dot_vr128_vr128_vr128   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgefp128_dot_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpgtfp128_vr128_vr128_vr128       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtfp128_vr128_vr128_vr128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtfp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpgtfp128_vr128_vr128_vr128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtfp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpgtfp128_dot_vr128_vr128_vr128   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTFP128_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtfp128_dot_vr128_vr128_vr128   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtfp128_dot_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpgtfp128_dot_vr128_vr128_vr128   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtfp128_dot_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpbfp128_vr128_vr128_vr128        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPBFP128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpbfp128_vr128_vr128_vr128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpbfp128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpbfp128_vr128_vr128_vr128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpbfp128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpbfp128_dot_vr128_vr128_vr128    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPBFP128_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpbfp128_dot_vr128_vr128_vr128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpbfp128_dot_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpbfp128_dot_vr128_vr128_vr128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpbfp128_dot_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpequw128_vr128_vr128_vr128       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUW128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequw128_vr128_vr128_vr128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequw128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpequw128_vr128_vr128_vr128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequw128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vcmpequw128_dot_vr128_vr128_vr128   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUW128_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequw128_dot_vr128_vr128_vr128   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequw128_dot_vr128_vr128_vr128(dst, src, src2)) }
+emit_vcmpequw128_dot_vr128_vr128_vr128   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequw128_dot_vr128_vr128_vr128(dst, src, src2)) }
 inst_vrfim128_vr128_vr128                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRFIM128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrfim128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrfim128_vr128_vr128(dst, src)) }
+emit_vrfim128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrfim128_vr128_vr128(dst, src)) }
 inst_vrfin128_vr128_vr128                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRFIN128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrfin128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrfin128_vr128_vr128(dst, src)) }
+emit_vrfin128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrfin128_vr128_vr128(dst, src)) }
 inst_vrfip128_vr128_vr128                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRFIP128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrfip128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrfip128_vr128_vr128(dst, src)) }
+emit_vrfip128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrfip128_vr128_vr128(dst, src)) }
 inst_vrfiz128_vr128_vr128                :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VRFIZ128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vrfiz128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vrfiz128_vr128_vr128(dst, src)) }
+emit_vrfiz128_vr128_vr128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vrfiz128_vr128_vr128(dst, src)) }
 inst_vcfpsxws128_vr128_vr128             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCFPSXWS128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vcfpsxws128_vr128_vr128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcfpsxws128_vr128_vr128(dst, src)) }
+emit_vcfpsxws128_vr128_vr128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcfpsxws128_vr128_vr128(dst, src)) }
 inst_vcfpuxws128_vr128_vr128             :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCFPUXWS128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vcfpuxws128_vr128_vr128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcfpuxws128_vr128_vr128(dst, src)) }
+emit_vcfpuxws128_vr128_vr128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcfpuxws128_vr128_vr128(dst, src)) }
 inst_vcsxwfp128_vr128_vr128              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCSXWFP128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vcsxwfp128_vr128_vr128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcsxwfp128_vr128_vr128(dst, src)) }
+emit_vcsxwfp128_vr128_vr128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcsxwfp128_vr128_vr128(dst, src)) }
 inst_vcuxwfp128_vr128_vr128              :: #force_inline proc "contextless" (dst: Register, src: Register) -> Instruction { return Instruction{mnemonic = .VCUXWFP128, operand_count = 2, length = 4, ops = {op_reg(dst), op_reg(src), {}, {}}} }
-emit_vcuxwfp128_vr128_vr128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append(instructions, inst_vcuxwfp128_vr128_vr128(dst, src)) }
+emit_vcuxwfp128_vr128_vr128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) { append_elem(instructions, inst_vcuxwfp128_vr128_vr128(dst, src)) }
 inst_vspltw128_vr128_vr128_imm           :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSPLTW128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vspltw128_vr128_vr128_imm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vspltw128_vr128_vr128_imm(dst, src, imm)) }
+emit_vspltw128_vr128_vr128_imm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vspltw128_vr128_vr128_imm(dst, src, imm)) }
 inst_vspltisw128_vr128_imm               :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSPLTISW128, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm), {}, {}}} }
-emit_vspltisw128_vr128_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_vspltisw128_vr128_imm(dst, imm)) }
+emit_vspltisw128_vr128_imm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append_elem(instructions, inst_vspltisw128_vr128_imm(dst, imm)) }
 inst_vmrghw128_vr128_vr128_vr128         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGHW128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrghw128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrghw128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vmrghw128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrghw128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vmrglw128_vr128_vr128_vr128         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMRGLW128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmrglw128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmrglw128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vmrglw128_vr128_vr128_vr128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmrglw128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vpkd3d128_vr128_vr128_imm_imm       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .VPKD3D128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_vpkd3d128_vr128_vr128_imm_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_vpkd3d128_vr128_vr128_imm_imm(dst, src, imm, imm2)) }
+emit_vpkd3d128_vr128_vr128_imm_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_vpkd3d128_vr128_vr128_imm_imm(dst, src, imm, imm2)) }
 inst_vupkd3d128_vr128_vr128_imm          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VUPKD3D128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vupkd3d128_vr128_vr128_imm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vupkd3d128_vr128_vr128_imm(dst, src, imm)) }
+emit_vupkd3d128_vr128_vr128_imm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vupkd3d128_vr128_vr128_imm(dst, src, imm)) }
 inst_vperm128_vr128_vr128_vr128_vr128    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction { return Instruction{mnemonic = .VPERM128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_reg(src3)}} }
-emit_vperm128_vr128_vr128_vr128_vr128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append(instructions, inst_vperm128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
+emit_vperm128_vr128_vr128_vr128_vr128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) { append_elem(instructions, inst_vperm128_vr128_vr128_vr128_vr128(dst, src, src2, src3)) }
 inst_vpermwi128_vr128_vr128_imm          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VPERMWI128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_vpermwi128_vr128_vr128_imm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_vpermwi128_vr128_vr128_imm(dst, src, imm)) }
+emit_vpermwi128_vr128_vr128_imm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_vpermwi128_vr128_vr128_imm(dst, src, imm)) }
 inst_vrlimi128_vr128_vr128_imm_imm       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .VRLIMI128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), op_imm(imm2)}} }
-emit_vrlimi128_vr128_vr128_imm_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append(instructions, inst_vrlimi128_vr128_vr128_imm_imm(dst, src, imm, imm2)) }
+emit_vrlimi128_vr128_vr128_imm_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) { append_elem(instructions, inst_vrlimi128_vr128_vr128_imm_imm(dst, src, imm, imm2)) }
 inst_vsldoi128_vr128_vr128_vr128_imm     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .VSLDOI128, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm)}} }
-emit_vsldoi128_vr128_vr128_vr128_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_vsldoi128_vr128_vr128_vr128_imm(dst, src, src2, imm)) }
+emit_vsldoi128_vr128_vr128_vr128_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append_elem(instructions, inst_vsldoi128_vr128_vr128_vr128_imm(dst, src, src2, imm)) }
 inst_vrlw128_vr128_vr128_vr128           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VRLW128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vrlw128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vrlw128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vrlw128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vrlw128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vslw128_vr128_vr128_vr128           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSLW128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vslw128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vslw128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vslw128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vslw128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vsrw128_vr128_vr128_vr128           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRW128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsrw128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsrw128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vsrw128_vr128_vr128_vr128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsrw128_vr128_vr128_vr128(dst, src, src2)) }
 inst_vsraw128_vr128_vr128_vr128          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSRAW128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsraw128_vr128_vr128_vr128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsraw128_vr128_vr128_vr128(dst, src, src2)) }
+emit_vsraw128_vr128_vr128_vr128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsraw128_vr128_vr128_vr128(dst, src, src2)) }
 inst_lvebx128_vr128_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVEBX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvebx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvebx128_vr128_r_r(dst, src, src2)) }
+emit_lvebx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvebx128_vr128_r_r(dst, src, src2)) }
 inst_lvehx128_vr128_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVEHX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvehx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvehx128_vr128_r_r(dst, src, src2)) }
+emit_lvehx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvehx128_vr128_r_r(dst, src, src2)) }
 inst_lvewx128_vr128_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVEWX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvewx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvewx128_vr128_r_r(dst, src, src2)) }
+emit_lvewx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvewx128_vr128_r_r(dst, src, src2)) }
 inst_lvx128_vr128_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvx128_vr128_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvx128_vr128_r_r(dst, src, src2)) }
+emit_lvx128_vr128_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvx128_vr128_r_r(dst, src, src2)) }
 inst_lvxl128_vr128_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVXL128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvxl128_vr128_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvxl128_vr128_r_r(dst, src, src2)) }
+emit_lvxl128_vr128_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvxl128_vr128_r_r(dst, src, src2)) }
 inst_lvlx128_vr128_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVLX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvlx128_vr128_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvlx128_vr128_r_r(dst, src, src2)) }
+emit_lvlx128_vr128_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvlx128_vr128_r_r(dst, src, src2)) }
 inst_lvrx128_vr128_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVRX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvrx128_vr128_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvrx128_vr128_r_r(dst, src, src2)) }
+emit_lvrx128_vr128_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvrx128_vr128_r_r(dst, src, src2)) }
 inst_lvlxl128_vr128_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVLXL128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvlxl128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvlxl128_vr128_r_r(dst, src, src2)) }
+emit_lvlxl128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvlxl128_vr128_r_r(dst, src, src2)) }
 inst_lvrxl128_vr128_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVRXL128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvrxl128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvrxl128_vr128_r_r(dst, src, src2)) }
+emit_lvrxl128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvrxl128_vr128_r_r(dst, src, src2)) }
 inst_stvebx128_vr128_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVEBX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvebx128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvebx128_vr128_r_r(dst, src, src2)) }
+emit_stvebx128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvebx128_vr128_r_r(dst, src, src2)) }
 inst_stvehx128_vr128_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVEHX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvehx128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvehx128_vr128_r_r(dst, src, src2)) }
+emit_stvehx128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvehx128_vr128_r_r(dst, src, src2)) }
 inst_stvewx128_vr128_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVEWX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvewx128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvewx128_vr128_r_r(dst, src, src2)) }
+emit_stvewx128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvewx128_vr128_r_r(dst, src, src2)) }
 inst_stvx128_vr128_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvx128_vr128_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvx128_vr128_r_r(dst, src, src2)) }
+emit_stvx128_vr128_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvx128_vr128_r_r(dst, src, src2)) }
 inst_stvxl128_vr128_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVXL128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvxl128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvxl128_vr128_r_r(dst, src, src2)) }
+emit_stvxl128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvxl128_vr128_r_r(dst, src, src2)) }
 inst_stvlx128_vr128_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVLX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvlx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvlx128_vr128_r_r(dst, src, src2)) }
+emit_stvlx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvlx128_vr128_r_r(dst, src, src2)) }
 inst_stvrx128_vr128_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVRX128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvrx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvrx128_vr128_r_r(dst, src, src2)) }
+emit_stvrx128_vr128_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvrx128_vr128_r_r(dst, src, src2)) }
 inst_stvlxl128_vr128_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVLXL128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvlxl128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvlxl128_vr128_r_r(dst, src, src2)) }
+emit_stvlxl128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvlxl128_vr128_r_r(dst, src, src2)) }
 inst_stvrxl128_vr128_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVRXL128, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvrxl128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvrxl128_vr128_r_r(dst, src, src2)) }
+emit_stvrxl128_vr128_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvrxl128_vr128_r_r(dst, src, src2)) }
 inst_ti_r_r_imm                          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .TI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_ti_r_r_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ti_r_r_imm(dst, src, imm)) }
+emit_ti_r_r_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ti_r_r_imm(dst, src, imm)) }
 inst_mulhhwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHHWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhhwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhhwu_r_r_r(dst, src, src2)) }
+emit_mulhhwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhhwu_r_r_r(dst, src, src2)) }
 inst_mulhhwu_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHHWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhhwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhhwu_dot_r_r_r(dst, src, src2)) }
+emit_mulhhwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhhwu_dot_r_r_r(dst, src, src2)) }
 inst_machhwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwu_r_r_r(dst, src, src2)) }
+emit_machhwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwu_r_r_r(dst, src, src2)) }
 inst_machhwu_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwu_dot_r_r_r(dst, src, src2)) }
+emit_machhwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwu_dot_r_r_r(dst, src, src2)) }
 inst_mulhhw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhhw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhhw_r_r_r(dst, src, src2)) }
+emit_mulhhw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhhw_r_r_r(dst, src, src2)) }
 inst_mulhhw_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULHHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulhhw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulhhw_dot_r_r_r(dst, src, src2)) }
+emit_mulhhw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulhhw_dot_r_r_r(dst, src, src2)) }
 inst_machhw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhw_r_r_r(dst, src, src2)) }
+emit_machhw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhw_r_r_r(dst, src, src2)) }
 inst_machhw_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhw_dot_r_r_r(dst, src, src2)) }
+emit_machhw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhw_dot_r_r_r(dst, src, src2)) }
 inst_nmachhw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACHHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmachhw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmachhw_r_r_r(dst, src, src2)) }
+emit_nmachhw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmachhw_r_r_r(dst, src, src2)) }
 inst_nmachhw_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACHHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmachhw_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmachhw_dot_r_r_r(dst, src, src2)) }
+emit_nmachhw_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmachhw_dot_r_r_r(dst, src, src2)) }
 inst_machhwsu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWSU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwsu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwsu_r_r_r(dst, src, src2)) }
+emit_machhwsu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwsu_r_r_r(dst, src, src2)) }
 inst_machhwsu_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWSU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwsu_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwsu_dot_r_r_r(dst, src, src2)) }
+emit_machhwsu_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwsu_dot_r_r_r(dst, src, src2)) }
 inst_machhws_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhws_r_r_r(dst, src, src2)) }
+emit_machhws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhws_r_r_r(dst, src, src2)) }
 inst_machhws_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhws_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhws_dot_r_r_r(dst, src, src2)) }
+emit_machhws_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhws_dot_r_r_r(dst, src, src2)) }
 inst_nmachhws_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACHHWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmachhws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmachhws_r_r_r(dst, src, src2)) }
+emit_nmachhws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmachhws_r_r_r(dst, src, src2)) }
 inst_nmachhws_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACHHWS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmachhws_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmachhws_dot_r_r_r(dst, src, src2)) }
+emit_nmachhws_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmachhws_dot_r_r_r(dst, src, src2)) }
 inst_vadduqm_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VADDUQM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vadduqm_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vadduqm_r_r_r(dst, src, src2)) }
+emit_vadduqm_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vadduqm_r_r_r(dst, src, src2)) }
 inst_vcmpuq_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpuq_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpuq_r_r_r(dst, src, src2)) }
+emit_vcmpuq_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpuq_r_r_r(dst, src, src2)) }
 inst_mulchwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULCHWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulchwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulchwu_r_r_r(dst, src, src2)) }
+emit_mulchwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulchwu_r_r_r(dst, src, src2)) }
 inst_mulchwu_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULCHWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulchwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulchwu_dot_r_r_r(dst, src, src2)) }
+emit_mulchwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulchwu_dot_r_r_r(dst, src, src2)) }
 inst_macchwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwu_r_r_r(dst, src, src2)) }
+emit_macchwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwu_r_r_r(dst, src, src2)) }
 inst_macchwu_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwu_dot_r_r_r(dst, src, src2)) }
+emit_macchwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwu_dot_r_r_r(dst, src, src2)) }
 inst_vcmpsq_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPSQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpsq_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpsq_r_r_r(dst, src, src2)) }
+emit_vcmpsq_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpsq_r_r_r(dst, src, src2)) }
 inst_mulchw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULCHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulchw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulchw_r_r_r(dst, src, src2)) }
+emit_mulchw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulchw_r_r_r(dst, src, src2)) }
 inst_mulchw_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULCHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulchw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulchw_dot_r_r_r(dst, src, src2)) }
+emit_mulchw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulchw_dot_r_r_r(dst, src, src2)) }
 inst_macchw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchw_r_r_r(dst, src, src2)) }
+emit_macchw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchw_r_r_r(dst, src, src2)) }
 inst_macchw_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchw_dot_r_r_r(dst, src, src2)) }
+emit_macchw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchw_dot_r_r_r(dst, src, src2)) }
 inst_nmacchw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACCHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmacchw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmacchw_r_r_r(dst, src, src2)) }
+emit_nmacchw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmacchw_r_r_r(dst, src, src2)) }
 inst_nmacchw_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACCHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmacchw_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmacchw_dot_r_r_r(dst, src, src2)) }
+emit_nmacchw_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmacchw_dot_r_r_r(dst, src, src2)) }
 inst_macchwsu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWSU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwsu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwsu_r_r_r(dst, src, src2)) }
+emit_macchwsu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwsu_r_r_r(dst, src, src2)) }
 inst_macchwsu_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWSU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwsu_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwsu_dot_r_r_r(dst, src, src2)) }
+emit_macchwsu_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwsu_dot_r_r_r(dst, src, src2)) }
 inst_vcmpequq_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequq_r_r_r(dst, src, src2)) }
+emit_vcmpequq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequq_r_r_r(dst, src, src2)) }
 inst_macchws_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchws_r_r_r(dst, src, src2)) }
+emit_macchws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchws_r_r_r(dst, src, src2)) }
 inst_macchws_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchws_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchws_dot_r_r_r(dst, src, src2)) }
+emit_macchws_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchws_dot_r_r_r(dst, src, src2)) }
 inst_nmacchws_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACCHWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmacchws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmacchws_r_r_r(dst, src, src2)) }
+emit_nmacchws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmacchws_r_r_r(dst, src, src2)) }
 inst_nmacchws_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACCHWS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmacchws_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmacchws_dot_r_r_r(dst, src, src2)) }
+emit_nmacchws_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmacchws_dot_r_r_r(dst, src, src2)) }
 inst_vcmpgtuq_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtuq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtuq_r_r_r(dst, src, src2)) }
+emit_vcmpgtuq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtuq_r_r_r(dst, src, src2)) }
 inst_vcuxwfp_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCUXWFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcuxwfp_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcuxwfp_r_r_r(dst, src, src2)) }
+emit_vcuxwfp_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcuxwfp_r_r_r(dst, src, src2)) }
 inst_mullhwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLHWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullhwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullhwu_r_r_r(dst, src, src2)) }
+emit_mullhwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullhwu_r_r_r(dst, src, src2)) }
 inst_mullhwu_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLHWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullhwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullhwu_dot_r_r_r(dst, src, src2)) }
+emit_mullhwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullhwu_dot_r_r_r(dst, src, src2)) }
 inst_maclhwu_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwu_r_r_r(dst, src, src2)) }
+emit_maclhwu_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwu_r_r_r(dst, src, src2)) }
 inst_maclhwu_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwu_dot_r_r_r(dst, src, src2)) }
+emit_maclhwu_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwu_dot_r_r_r(dst, src, src2)) }
 inst_vcsxwfp_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCSXWFP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcsxwfp_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcsxwfp_r_r_r(dst, src, src2)) }
+emit_vcsxwfp_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcsxwfp_r_r_r(dst, src, src2)) }
 inst_mullhw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullhw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullhw_r_r_r(dst, src, src2)) }
+emit_mullhw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullhw_r_r_r(dst, src, src2)) }
 inst_mullhw_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullhw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullhw_dot_r_r_r(dst, src, src2)) }
+emit_mullhw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullhw_dot_r_r_r(dst, src, src2)) }
 inst_maclhw_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhw_r_r_r(dst, src, src2)) }
+emit_maclhw_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhw_r_r_r(dst, src, src2)) }
 inst_maclhw_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhw_dot_r_r_r(dst, src, src2)) }
+emit_maclhw_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhw_dot_r_r_r(dst, src, src2)) }
 inst_nmaclhw_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACLHW, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmaclhw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmaclhw_r_r_r(dst, src, src2)) }
+emit_nmaclhw_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmaclhw_r_r_r(dst, src, src2)) }
 inst_nmaclhw_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACLHW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmaclhw_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmaclhw_dot_r_r_r(dst, src, src2)) }
+emit_nmaclhw_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmaclhw_dot_r_r_r(dst, src, src2)) }
 inst_vcmpgtsq_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsq_r_r_r(dst, src, src2)) }
+emit_vcmpgtsq_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsq_r_r_r(dst, src, src2)) }
 inst_vcfpuxws_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCFPUXWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcfpuxws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcfpuxws_r_r_r(dst, src, src2)) }
+emit_vcfpuxws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcfpuxws_r_r_r(dst, src, src2)) }
 inst_maclhwsu_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWSU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwsu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwsu_r_r_r(dst, src, src2)) }
+emit_maclhwsu_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwsu_r_r_r(dst, src, src2)) }
 inst_maclhwsu_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWSU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwsu_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwsu_dot_r_r_r(dst, src, src2)) }
+emit_maclhwsu_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwsu_dot_r_r_r(dst, src, src2)) }
 inst_vcfpsxws_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCFPSXWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcfpsxws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcfpsxws_r_r_r(dst, src, src2)) }
+emit_vcfpsxws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcfpsxws_r_r_r(dst, src, src2)) }
 inst_maclhws_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhws_r_r_r(dst, src, src2)) }
+emit_maclhws_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhws_r_r_r(dst, src, src2)) }
 inst_maclhws_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhws_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhws_dot_r_r_r(dst, src, src2)) }
+emit_maclhws_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhws_dot_r_r_r(dst, src, src2)) }
 inst_nmaclhws_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACLHWS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmaclhws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmaclhws_r_r_r(dst, src, src2)) }
+emit_nmaclhws_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmaclhws_r_r_r(dst, src, src2)) }
 inst_nmaclhws_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACLHWS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmaclhws_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmaclhws_dot_r_r_r(dst, src, src2)) }
+emit_nmaclhws_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmaclhws_dot_r_r_r(dst, src, src2)) }
 inst_machhwuo_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwuo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwuo_r_r_r(dst, src, src2)) }
+emit_machhwuo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwuo_r_r_r(dst, src, src2)) }
 inst_machhwuo_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwuo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwuo_dot_r_r_r(dst, src, src2)) }
+emit_machhwuo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwuo_dot_r_r_r(dst, src, src2)) }
 inst_machhwo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwo_r_r_r(dst, src, src2)) }
+emit_machhwo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwo_r_r_r(dst, src, src2)) }
 inst_machhwo_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwo_dot_r_r_r(dst, src, src2)) }
+emit_machhwo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwo_dot_r_r_r(dst, src, src2)) }
 inst_nmachhwo_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACHHWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmachhwo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmachhwo_r_r_r(dst, src, src2)) }
+emit_nmachhwo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmachhwo_r_r_r(dst, src, src2)) }
 inst_nmachhwo_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACHHWO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmachhwo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmachhwo_dot_r_r_r(dst, src, src2)) }
+emit_nmachhwo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmachhwo_dot_r_r_r(dst, src, src2)) }
 inst_vmr_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VMR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vmr_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vmr_r_r_r(dst, src, src2)) }
+emit_vmr_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vmr_r_r_r(dst, src, src2)) }
 inst_machhwsuo_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWSUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwsuo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwsuo_r_r_r(dst, src, src2)) }
+emit_machhwsuo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwsuo_r_r_r(dst, src, src2)) }
 inst_machhwsuo_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWSUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwsuo_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwsuo_dot_r_r_r(dst, src, src2)) }
+emit_machhwsuo_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwsuo_dot_r_r_r(dst, src, src2)) }
 inst_machhwso_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwso_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwso_r_r_r(dst, src, src2)) }
+emit_machhwso_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwso_r_r_r(dst, src, src2)) }
 inst_machhwso_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACHHWSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_machhwso_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_machhwso_dot_r_r_r(dst, src, src2)) }
+emit_machhwso_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_machhwso_dot_r_r_r(dst, src, src2)) }
 inst_nmachhwso_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACHHWSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmachhwso_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmachhwso_r_r_r(dst, src, src2)) }
+emit_nmachhwso_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmachhwso_r_r_r(dst, src, src2)) }
 inst_nmachhwso_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACHHWSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmachhwso_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmachhwso_dot_r_r_r(dst, src, src2)) }
+emit_nmachhwso_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmachhwso_dot_r_r_r(dst, src, src2)) }
 inst_vsubuqm_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VSUBUQM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vsubuqm_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vsubuqm_r_r_r(dst, src, src2)) }
+emit_vsubuqm_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vsubuqm_r_r_r(dst, src, src2)) }
 inst_vnot_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VNOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vnot_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vnot_r_r_r(dst, src, src2)) }
+emit_vnot_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vnot_r_r_r(dst, src, src2)) }
 inst_vgbbd_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VGBBD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vgbbd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vgbbd_r_r_r(dst, src, src2)) }
+emit_vgbbd_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vgbbd_r_r_r(dst, src, src2)) }
 inst_macchwuo_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwuo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwuo_r_r_r(dst, src, src2)) }
+emit_macchwuo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwuo_r_r_r(dst, src, src2)) }
 inst_macchwuo_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwuo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwuo_dot_r_r_r(dst, src, src2)) }
+emit_macchwuo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwuo_dot_r_r_r(dst, src, src2)) }
 inst_macchwo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwo_r_r_r(dst, src, src2)) }
+emit_macchwo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwo_r_r_r(dst, src, src2)) }
 inst_macchwo_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwo_dot_r_r_r(dst, src, src2)) }
+emit_macchwo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwo_dot_r_r_r(dst, src, src2)) }
 inst_nmacchwo_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACCHWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmacchwo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmacchwo_r_r_r(dst, src, src2)) }
+emit_nmacchwo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmacchwo_r_r_r(dst, src, src2)) }
 inst_nmacchwo_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACCHWO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmacchwo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmacchwo_dot_r_r_r(dst, src, src2)) }
+emit_nmacchwo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmacchwo_dot_r_r_r(dst, src, src2)) }
 inst_macchwsuo_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWSUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwsuo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwsuo_r_r_r(dst, src, src2)) }
+emit_macchwsuo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwsuo_r_r_r(dst, src, src2)) }
 inst_macchwsuo_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWSUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwsuo_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwsuo_dot_r_r_r(dst, src, src2)) }
+emit_macchwsuo_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwsuo_dot_r_r_r(dst, src, src2)) }
 inst_vcmpequq_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPEQUQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpequq_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpequq_dot_r_r_r(dst, src, src2)) }
+emit_vcmpequq_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpequq_dot_r_r_r(dst, src, src2)) }
 inst_macchwso_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwso_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwso_r_r_r(dst, src, src2)) }
+emit_macchwso_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwso_r_r_r(dst, src, src2)) }
 inst_macchwso_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACCHWSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_macchwso_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_macchwso_dot_r_r_r(dst, src, src2)) }
+emit_macchwso_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_macchwso_dot_r_r_r(dst, src, src2)) }
 inst_nmacchwso_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACCHWSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmacchwso_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmacchwso_r_r_r(dst, src, src2)) }
+emit_nmacchwso_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmacchwso_r_r_r(dst, src, src2)) }
 inst_nmacchwso_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACCHWSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmacchwso_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmacchwso_dot_r_r_r(dst, src, src2)) }
+emit_nmacchwso_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmacchwso_dot_r_r_r(dst, src, src2)) }
 inst_vcmpgtuq_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTUQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtuq_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtuq_dot_r_r_r(dst, src, src2)) }
+emit_vcmpgtuq_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtuq_dot_r_r_r(dst, src, src2)) }
 inst_maclhwuo_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwuo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwuo_r_r_r(dst, src, src2)) }
+emit_maclhwuo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwuo_r_r_r(dst, src, src2)) }
 inst_maclhwuo_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwuo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwuo_dot_r_r_r(dst, src, src2)) }
+emit_maclhwuo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwuo_dot_r_r_r(dst, src, src2)) }
 inst_maclhwo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwo_r_r_r(dst, src, src2)) }
+emit_maclhwo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwo_r_r_r(dst, src, src2)) }
 inst_maclhwo_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwo_dot_r_r_r(dst, src, src2)) }
+emit_maclhwo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwo_dot_r_r_r(dst, src, src2)) }
 inst_nmaclhwo_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACLHWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmaclhwo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmaclhwo_r_r_r(dst, src, src2)) }
+emit_nmaclhwo_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmaclhwo_r_r_r(dst, src, src2)) }
 inst_nmaclhwo_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACLHWO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmaclhwo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmaclhwo_dot_r_r_r(dst, src, src2)) }
+emit_nmaclhwo_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmaclhwo_dot_r_r_r(dst, src, src2)) }
 inst_vcmpgtsq_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .VCMPGTSQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_vcmpgtsq_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_vcmpgtsq_dot_r_r_r(dst, src, src2)) }
+emit_vcmpgtsq_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_vcmpgtsq_dot_r_r_r(dst, src, src2)) }
 inst_maclhwsuo_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWSUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwsuo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwsuo_r_r_r(dst, src, src2)) }
+emit_maclhwsuo_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwsuo_r_r_r(dst, src, src2)) }
 inst_maclhwsuo_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWSUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwsuo_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwsuo_dot_r_r_r(dst, src, src2)) }
+emit_maclhwsuo_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwsuo_dot_r_r_r(dst, src, src2)) }
 inst_maclhwso_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwso_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwso_r_r_r(dst, src, src2)) }
+emit_maclhwso_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwso_r_r_r(dst, src, src2)) }
 inst_maclhwso_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MACLHWSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maclhwso_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maclhwso_dot_r_r_r(dst, src, src2)) }
+emit_maclhwso_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maclhwso_dot_r_r_r(dst, src, src2)) }
 inst_nmaclhwso_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACLHWSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmaclhwso_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmaclhwso_r_r_r(dst, src, src2)) }
+emit_nmaclhwso_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmaclhwso_r_r_r(dst, src, src2)) }
 inst_nmaclhwso_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NMACLHWSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nmaclhwso_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nmaclhwso_dot_r_r_r(dst, src, src2)) }
+emit_nmaclhwso_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nmaclhwso_dot_r_r_r(dst, src, src2)) }
 inst_dcbz_l_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBZ_L, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbz_l_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbz_l_r_r_r(dst, src, src2)) }
+emit_dcbz_l_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbz_l_r_r_r(dst, src, src2)) }
 inst_muli_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .MULI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_muli_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_muli_r_r_imm(dst, src, imm)) }
+emit_muli_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_muli_r_r_imm(dst, src, imm)) }
 inst_sfi_r_r_imm                         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SFI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_sfi_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sfi_r_r_imm(dst, src, imm)) }
+emit_sfi_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sfi_r_r_imm(dst, src, imm)) }
 inst_dozi_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DOZI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dozi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dozi_r_r_imm(dst, src, imm)) }
+emit_dozi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dozi_r_r_imm(dst, src, imm)) }
 inst_ai_r_r_imm                          :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .AI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_ai_r_r_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ai_r_r_imm(dst, src, imm)) }
+emit_ai_r_r_imm                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ai_r_r_imm(dst, src, imm)) }
 inst_subic_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SUBIC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_subic_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_subic_r_r_imm(dst, src, imm)) }
+emit_subic_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_subic_r_r_imm(dst, src, imm)) }
 inst_ai_dot_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .AI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_ai_dot_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ai_dot_r_r_imm(dst, src, imm)) }
+emit_ai_dot_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ai_dot_r_r_imm(dst, src, imm)) }
 inst_subic_dot_r_r_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SUBIC_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_subic_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_subic_dot_r_r_imm(dst, src, imm)) }
+emit_subic_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_subic_dot_r_r_imm(dst, src, imm)) }
 inst_lil_r_r_imm                         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LIL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_lil_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_lil_r_r_imm(dst, src, imm)) }
+emit_lil_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_lil_r_r_imm(dst, src, imm)) }
 inst_cal_r_r_imm                         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CAL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_cal_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_cal_r_r_imm(dst, src, imm)) }
+emit_cal_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_cal_r_r_imm(dst, src, imm)) }
 inst_subi_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SUBI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_subi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_subi_r_r_imm(dst, src, imm)) }
+emit_subi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_subi_r_r_imm(dst, src, imm)) }
 inst_liu_r_r_imm                         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LIU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_liu_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_liu_r_r_imm(dst, src, imm)) }
+emit_liu_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_liu_r_r_imm(dst, src, imm)) }
 inst_cau_r_r_imm                         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CAU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_cau_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_cau_r_r_imm(dst, src, imm)) }
+emit_cau_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_cau_r_r_imm(dst, src, imm)) }
 inst_subis_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SUBIS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_subis_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_subis_r_r_imm(dst, src, imm)) }
+emit_subis_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_subis_r_r_imm(dst, src, imm)) }
 inst_crnot_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CRNOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_crnot_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_crnot_r_r_imm(dst, src, imm)) }
+emit_crnot_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_crnot_r_r_imm(dst, src, imm)) }
 inst_rfci_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RFCI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_rfci_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rfci_r_r_imm(dst, src, imm)) }
+emit_rfci_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rfci_r_r_imm(dst, src, imm)) }
 inst_rfscv_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RFSCV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_rfscv_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rfscv_r_r_imm(dst, src, imm)) }
+emit_rfscv_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rfscv_r_r_imm(dst, src, imm)) }
 inst_rfsvc_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RFSVC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_rfsvc_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rfsvc_r_r_imm(dst, src, imm)) }
+emit_rfsvc_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rfsvc_r_r_imm(dst, src, imm)) }
 inst_rfgi_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RFGI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_rfgi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rfgi_r_r_imm(dst, src, imm)) }
+emit_rfgi_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rfgi_r_r_imm(dst, src, imm)) }
 inst_ics_r_r_imm                         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ICS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_ics_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_ics_r_r_imm(dst, src, imm)) }
+emit_ics_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_ics_r_r_imm(dst, src, imm)) }
 inst_crclr_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CRCLR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_crclr_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_crclr_r_r_imm(dst, src, imm)) }
+emit_crclr_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_crclr_r_r_imm(dst, src, imm)) }
 inst_dnh_r_r_imm                         :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DNH, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_dnh_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_dnh_r_r_imm(dst, src, imm)) }
+emit_dnh_r_r_imm                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_dnh_r_r_imm(dst, src, imm)) }
 inst_crset_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CRSET, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_crset_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_crset_r_r_imm(dst, src, imm)) }
+emit_crset_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_crset_r_r_imm(dst, src, imm)) }
 inst_urfid_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .URFID, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_urfid_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_urfid_r_r_imm(dst, src, imm)) }
+emit_urfid_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_urfid_r_r_imm(dst, src, imm)) }
 inst_doze_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .DOZE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_doze_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_doze_r_r_imm(dst, src, imm)) }
+emit_doze_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_doze_r_r_imm(dst, src, imm)) }
 inst_crmove_r_r_imm                      :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .CRMOVE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_crmove_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_crmove_r_r_imm(dst, src, imm)) }
+emit_crmove_r_r_imm                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_crmove_r_r_imm(dst, src, imm)) }
 inst_sleep_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SLEEP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_sleep_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_sleep_r_r_imm(dst, src, imm)) }
+emit_sleep_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_sleep_r_r_imm(dst, src, imm)) }
 inst_rvwinkle_r_r_imm                    :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .RVWINKLE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_rvwinkle_r_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_rvwinkle_r_r_imm(dst, src, imm)) }
+emit_rvwinkle_r_r_imm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_rvwinkle_r_r_imm(dst, src, imm)) }
 inst_oril_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ORIL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_oril_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_oril_r_r_imm(dst, src, imm)) }
+emit_oril_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_oril_r_r_imm(dst, src, imm)) }
 inst_oriu_r_r_imm                        :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ORIU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_oriu_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_oriu_r_r_imm(dst, src, imm)) }
+emit_oriu_r_r_imm                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_oriu_r_r_imm(dst, src, imm)) }
 inst_xoril_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XORIL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xoril_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xoril_r_r_imm(dst, src, imm)) }
+emit_xoril_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xoril_r_r_imm(dst, src, imm)) }
 inst_xoriu_r_r_imm                       :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .XORIU, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_xoriu_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_xoriu_r_r_imm(dst, src, imm)) }
+emit_xoriu_r_r_imm                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_xoriu_r_r_imm(dst, src, imm)) }
 inst_andil_dot_r_r_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ANDIL_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_andil_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_andil_dot_r_r_imm(dst, src, imm)) }
+emit_andil_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_andil_dot_r_r_imm(dst, src, imm)) }
 inst_andiu_dot_r_r_imm                   :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .ANDIU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm), {}}} }
-emit_andiu_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_andiu_dot_r_r_imm(dst, src, imm)) }
+emit_andiu_dot_r_r_imm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append_elem(instructions, inst_andiu_dot_r_r_imm(dst, src, imm)) }
 inst_rotldi_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ROTLDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rotldi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rotldi_dot_r_r_r(dst, src, src2)) }
+emit_rotldi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rotldi_dot_r_r_r(dst, src, src2)) }
 inst_rotrdi_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ROTRDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rotrdi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rotrdi_dot_r_r_r(dst, src, src2)) }
+emit_rotrdi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rotrdi_dot_r_r_r(dst, src, src2)) }
 inst_clrldi_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLRLDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clrldi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clrldi_dot_r_r_r(dst, src, src2)) }
+emit_clrldi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clrldi_dot_r_r_r(dst, src, src2)) }
 inst_srdi_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srdi_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srdi_dot_r_r_r(dst, src, src2)) }
+emit_srdi_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srdi_dot_r_r_r(dst, src, src2)) }
 inst_extrdi_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EXTRDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_extrdi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_extrdi_dot_r_r_r(dst, src, src2)) }
+emit_extrdi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_extrdi_dot_r_r_r(dst, src, src2)) }
 inst_clrrdi_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLRRDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clrrdi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clrrdi_dot_r_r_r(dst, src, src2)) }
+emit_clrrdi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clrrdi_dot_r_r_r(dst, src, src2)) }
 inst_sldi_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sldi_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sldi_dot_r_r_r(dst, src, src2)) }
+emit_sldi_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sldi_dot_r_r_r(dst, src, src2)) }
 inst_extldi_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EXTLDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_extldi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_extldi_dot_r_r_r(dst, src, src2)) }
+emit_extldi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_extldi_dot_r_r_r(dst, src, src2)) }
 inst_clrlsldi_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLRLSLDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clrlsldi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clrlsldi_r_r_r(dst, src, src2)) }
+emit_clrlsldi_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clrlsldi_r_r_r(dst, src, src2)) }
 inst_clrlsldi_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLRLSLDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clrlsldi_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clrlsldi_dot_r_r_r(dst, src, src2)) }
+emit_clrlsldi_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clrlsldi_dot_r_r_r(dst, src, src2)) }
 inst_insrdi_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .INSRDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_insrdi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_insrdi_r_r_r(dst, src, src2)) }
+emit_insrdi_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_insrdi_r_r_r(dst, src, src2)) }
 inst_insrdi_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .INSRDI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_insrdi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_insrdi_dot_r_r_r(dst, src, src2)) }
+emit_insrdi_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_insrdi_dot_r_r_r(dst, src, src2)) }
 inst_rotld_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ROTLD_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rotld_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rotld_dot_r_r_r(dst, src, src2)) }
+emit_rotld_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rotld_dot_r_r_r(dst, src, src2)) }
 inst_t_r_r_r                             :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .T, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_t_r_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_t_r_r_r(dst, src, src2)) }
+emit_t_r_r_r                             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_t_r_r_r(dst, src, src2)) }
 inst_sf_r_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sf_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sf_r_r_r(dst, src, src2)) }
+emit_sf_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sf_r_r_r(dst, src, src2)) }
 inst_sf_dot_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SF_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sf_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sf_dot_r_r_r(dst, src, src2)) }
+emit_sf_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sf_dot_r_r_r(dst, src, src2)) }
 inst_a_dot_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .A_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_a_dot_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_a_dot_r_r_r(dst, src, src2)) }
+emit_a_dot_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_a_dot_r_r_r(dst, src, src2)) }
 inst_lx_r_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lx_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lx_r_r_r(dst, src, src2)) }
+emit_lx_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lx_r_r_r(dst, src, src2)) }
 inst_sl_r_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sl_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sl_r_r_r(dst, src, src2)) }
+emit_sl_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sl_r_r_r(dst, src, src2)) }
 inst_sl_dot_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SL_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sl_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sl_dot_r_r_r(dst, src, src2)) }
+emit_sl_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sl_dot_r_r_r(dst, src, src2)) }
 inst_cntlz_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CNTLZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cntlz_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cntlz_r_r_r(dst, src, src2)) }
+emit_cntlz_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cntlz_r_r_r(dst, src, src2)) }
 inst_cntlz_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CNTLZ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cntlz_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cntlz_dot_r_r_r(dst, src, src2)) }
+emit_cntlz_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cntlz_dot_r_r_r(dst, src, src2)) }
 inst_maskg_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MASKG, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maskg_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maskg_r_r_r(dst, src, src2)) }
+emit_maskg_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maskg_r_r_r(dst, src, src2)) }
 inst_maskg_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MASKG_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maskg_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maskg_dot_r_r_r(dst, src, src2)) }
+emit_maskg_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maskg_dot_r_r_r(dst, src, src2)) }
 inst_ldepx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LDEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ldepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ldepx_r_r_r(dst, src, src2)) }
+emit_ldepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ldepx_r_r_r(dst, src, src2)) }
 inst_waitasec_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WAITASEC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_waitasec_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_waitasec_r_r_r(dst, src, src2)) }
+emit_waitasec_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_waitasec_r_r_r(dst, src, src2)) }
 inst_mviwsplt_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MVIWSPLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mviwsplt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mviwsplt_r_r_r(dst, src, src2)) }
+emit_mviwsplt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mviwsplt_r_r_r(dst, src, src2)) }
 inst_mfvsrd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFVSRD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfvsrd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfvsrd_r_r_r(dst, src, src2)) }
+emit_mfvsrd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfvsrd_r_r_r(dst, src, src2)) }
 inst_eratilx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ERATILX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eratilx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eratilx_r_r_r(dst, src, src2)) }
+emit_eratilx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eratilx_r_r_r(dst, src, src2)) }
 inst_lux_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lux_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lux_r_r_r(dst, src, src2)) }
+emit_lux_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lux_r_r_r(dst, src, src2)) }
 inst_subwus_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBWUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subwus_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subwus_r_r_r(dst, src, src2)) }
+emit_subwus_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subwus_r_r_r(dst, src, src2)) }
 inst_subwus_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBWUS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subwus_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subwus_dot_r_r_r(dst, src, src2)) }
+emit_subwus_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subwus_dot_r_r_r(dst, src, src2)) }
 inst_subdus_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBDUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subdus_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subdus_r_r_r(dst, src, src2)) }
+emit_subdus_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subdus_r_r_r(dst, src, src2)) }
 inst_subdus_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBDUS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subdus_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subdus_dot_r_r_r(dst, src, src2)) }
+emit_subdus_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subdus_dot_r_r_r(dst, src, src2)) }
 inst_subfus_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFUS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfus_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfus_r_r_r(dst, src, src2)) }
+emit_subfus_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfus_r_r_r(dst, src, src2)) }
 inst_subfus_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFUS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfus_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfus_dot_r_r_r(dst, src, src2)) }
+emit_subfus_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfus_dot_r_r_r(dst, src, src2)) }
 inst_dlmzb_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DLMZB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dlmzb_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dlmzb_r_r_r(dst, src, src2)) }
+emit_dlmzb_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dlmzb_r_r_r(dst, src, src2)) }
 inst_dlmzb_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DLMZB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dlmzb_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dlmzb_dot_r_r_r(dst, src, src2)) }
+emit_dlmzb_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dlmzb_dot_r_r_r(dst, src, src2)) }
 inst_dni_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DNI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dni_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dni_r_r_r(dst, src, src2)) }
+emit_dni_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dni_r_r_r(dst, src, src2)) }
 inst_mul_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mul_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mul_r_r_r(dst, src, src2)) }
+emit_mul_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mul_r_r_r(dst, src, src2)) }
 inst_mul_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MUL_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mul_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mul_dot_r_r_r(dst, src, src2)) }
+emit_mul_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mul_dot_r_r_r(dst, src, src2)) }
 inst_mvidsplt_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MVIDSPLT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mvidsplt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mvidsplt_r_r_r(dst, src, src2)) }
+emit_mvidsplt_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mvidsplt_r_r_r(dst, src, src2)) }
 inst_mtsrdin_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTSRDIN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtsrdin_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtsrdin_r_r_r(dst, src, src2)) }
+emit_mtsrdin_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtsrdin_r_r_r(dst, src, src2)) }
 inst_mfvsrwz_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFVSRWZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfvsrwz_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfvsrwz_r_r_r(dst, src, src2)) }
+emit_mfvsrwz_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfvsrwz_r_r_r(dst, src, src2)) }
 inst_clf_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLF, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clf_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clf_r_r_r(dst, src, src2)) }
+emit_clf_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clf_r_r_r(dst, src, src2)) }
 inst_dcbtstls_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBTSTLS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbtstls_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbtstls_r_r_r(dst, src, src2)) }
+emit_dcbtstls_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbtstls_r_r_r(dst, src, src2)) }
 inst_sfe_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfe_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfe_r_r_r(dst, src, src2)) }
+emit_sfe_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfe_r_r_r(dst, src, src2)) }
 inst_sfe_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfe_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfe_dot_r_r_r(dst, src, src2)) }
+emit_sfe_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfe_dot_r_r_r(dst, src, src2)) }
 inst_ae_r_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ae_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ae_r_r_r(dst, src, src2)) }
+emit_ae_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ae_r_r_r(dst, src, src2)) }
 inst_ae_dot_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ae_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ae_dot_r_r_r(dst, src, src2)) }
+emit_ae_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ae_dot_r_r_r(dst, src, src2)) }
 inst_dcbtstlse_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBTSTLSE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbtstlse_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbtstlse_r_r_r(dst, src, src2)) }
+emit_dcbtstlse_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbtstlse_r_r_r(dst, src, src2)) }
 inst_mtsle_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTSLE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtsle_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtsle_r_r_r(dst, src, src2)) }
+emit_mtsle_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtsle_r_r_r(dst, src, src2)) }
 inst_eratsx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ERATSX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eratsx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eratsx_r_r_r(dst, src, src2)) }
+emit_eratsx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eratsx_r_r_r(dst, src, src2)) }
 inst_eratsx_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ERATSX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eratsx_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eratsx_dot_r_r_r(dst, src, src2)) }
+emit_eratsx_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eratsx_dot_r_r_r(dst, src, src2)) }
 inst_stx_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stx_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stx_r_r_r(dst, src, src2)) }
+emit_stx_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stx_r_r_r(dst, src, src2)) }
 inst_slq_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_slq_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_slq_r_r_r(dst, src, src2)) }
+emit_slq_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_slq_r_r_r(dst, src, src2)) }
 inst_slq_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_slq_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_slq_dot_r_r_r(dst, src, src2)) }
+emit_slq_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_slq_dot_r_r_r(dst, src, src2)) }
 inst_sle_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sle_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sle_r_r_r(dst, src, src2)) }
+emit_sle_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sle_r_r_r(dst, src, src2)) }
 inst_sle_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sle_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sle_dot_r_r_r(dst, src, src2)) }
+emit_sle_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sle_dot_r_r_r(dst, src, src2)) }
 inst_stdepx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STDEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stdepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stdepx_r_r_r(dst, src, src2)) }
+emit_stdepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stdepx_r_r_r(dst, src, src2)) }
 inst_dcbtls_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBTLS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbtls_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbtls_r_r_r(dst, src, src2)) }
+emit_dcbtls_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbtls_r_r_r(dst, src, src2)) }
 inst_dcbtlse_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBTLSE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbtlse_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbtlse_r_r_r(dst, src, src2)) }
+emit_dcbtlse_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbtlse_r_r_r(dst, src, src2)) }
 inst_mtvsrd_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTVSRD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtvsrd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtvsrd_r_r_r(dst, src, src2)) }
+emit_mtvsrd_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtvsrd_r_r_r(dst, src, src2)) }
 inst_eratre_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ERATRE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eratre_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eratre_r_r_r(dst, src, src2)) }
+emit_eratre_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eratre_r_r_r(dst, src, src2)) }
 inst_wchkall_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WCHKALL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_wchkall_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_wchkall_r_r_r(dst, src, src2)) }
+emit_wchkall_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_wchkall_r_r_r(dst, src, src2)) }
 inst_stux_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stux_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stux_r_r_r(dst, src, src2)) }
+emit_stux_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stux_r_r_r(dst, src, src2)) }
 inst_sliq_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLIQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sliq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sliq_r_r_r(dst, src, src2)) }
+emit_sliq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sliq_r_r_r(dst, src, src2)) }
 inst_sliq_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLIQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sliq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sliq_dot_r_r_r(dst, src, src2)) }
+emit_sliq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sliq_dot_r_r_r(dst, src, src2)) }
 inst_icblq_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICBLQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_icblq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_icblq_dot_r_r_r(dst, src, src2)) }
+emit_icblq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_icblq_dot_r_r_r(dst, src, src2)) }
 inst_sfze_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFZE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfze_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfze_r_r_r(dst, src, src2)) }
+emit_sfze_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfze_r_r_r(dst, src, src2)) }
 inst_sfze_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFZE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfze_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfze_dot_r_r_r(dst, src, src2)) }
+emit_sfze_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfze_dot_r_r_r(dst, src, src2)) }
 inst_aze_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AZE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_aze_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_aze_r_r_r(dst, src, src2)) }
+emit_aze_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_aze_r_r_r(dst, src, src2)) }
 inst_aze_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AZE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_aze_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_aze_dot_r_r_r(dst, src, src2)) }
+emit_aze_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_aze_dot_r_r_r(dst, src, src2)) }
 inst_mtvsrwa_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTVSRWA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtvsrwa_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtvsrwa_r_r_r(dst, src, src2)) }
+emit_mtvsrwa_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtvsrwa_r_r_r(dst, src, src2)) }
 inst_eratwe_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ERATWE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eratwe_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eratwe_r_r_r(dst, src, src2)) }
+emit_eratwe_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eratwe_r_r_r(dst, src, src2)) }
 inst_ldawx_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LDAWX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ldawx_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ldawx_dot_r_r_r(dst, src, src2)) }
+emit_ldawx_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ldawx_dot_r_r_r(dst, src, src2)) }
 inst_sllq_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLLQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sllq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sllq_r_r_r(dst, src, src2)) }
+emit_sllq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sllq_r_r_r(dst, src, src2)) }
 inst_sllq_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLLQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sllq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sllq_dot_r_r_r(dst, src, src2)) }
+emit_sllq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sllq_dot_r_r_r(dst, src, src2)) }
 inst_sleq_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLEQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sleq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sleq_r_r_r(dst, src, src2)) }
+emit_sleq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sleq_r_r_r(dst, src, src2)) }
 inst_sleq_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLEQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sleq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sleq_dot_r_r_r(dst, src, src2)) }
+emit_sleq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sleq_dot_r_r_r(dst, src, src2)) }
 inst_sfme_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFME, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfme_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfme_r_r_r(dst, src, src2)) }
+emit_sfme_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfme_r_r_r(dst, src, src2)) }
 inst_sfme_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFME_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfme_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfme_dot_r_r_r(dst, src, src2)) }
+emit_sfme_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfme_dot_r_r_r(dst, src, src2)) }
 inst_ame_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AME, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ame_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ame_r_r_r(dst, src, src2)) }
+emit_ame_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ame_r_r_r(dst, src, src2)) }
 inst_ame_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AME_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ame_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ame_dot_r_r_r(dst, src, src2)) }
+emit_ame_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ame_dot_r_r_r(dst, src, src2)) }
 inst_muls_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_muls_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_muls_r_r_r(dst, src, src2)) }
+emit_muls_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_muls_r_r_r(dst, src, src2)) }
 inst_muls_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_muls_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_muls_dot_r_r_r(dst, src, src2)) }
+emit_muls_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_muls_dot_r_r_r(dst, src, src2)) }
 inst_icblce_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICBLCE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_icblce_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_icblce_r_r_r(dst, src, src2)) }
+emit_icblce_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_icblce_r_r_r(dst, src, src2)) }
 inst_mtsri_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTSRI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtsri_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtsri_r_r_r(dst, src, src2)) }
+emit_mtsri_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtsri_r_r_r(dst, src, src2)) }
 inst_mtvsrwz_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTVSRWZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtvsrwz_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtvsrwz_r_r_r(dst, src, src2)) }
+emit_mtvsrwz_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtvsrwz_r_r_r(dst, src, src2)) }
 inst_dcbtstct_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBTSTCT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbtstct_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbtstct_r_r_r(dst, src, src2)) }
+emit_dcbtstct_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbtstct_r_r_r(dst, src, src2)) }
 inst_dcbtstds_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBTSTDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbtstds_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbtstds_r_r_r(dst, src, src2)) }
+emit_dcbtstds_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbtstds_r_r_r(dst, src, src2)) }
 inst_slliq_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLLIQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_slliq_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_slliq_r_r_r(dst, src, src2)) }
+emit_slliq_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_slliq_r_r_r(dst, src, src2)) }
 inst_slliq_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLLIQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_slliq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_slliq_dot_r_r_r(dst, src, src2)) }
+emit_slliq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_slliq_dot_r_r_r(dst, src, src2)) }
 inst_mfdcrx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFDCRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfdcrx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfdcrx_r_r_r(dst, src, src2)) }
+emit_mfdcrx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfdcrx_r_r_r(dst, src, src2)) }
 inst_mfdcrx_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFDCRX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfdcrx_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfdcrx_dot_r_r_r(dst, src, src2)) }
+emit_mfdcrx_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfdcrx_dot_r_r_r(dst, src, src2)) }
 inst_lvexbx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVEXBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvexbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvexbx_r_r_r(dst, src, src2)) }
+emit_lvexbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvexbx_r_r_r(dst, src, src2)) }
 inst_lvepxl_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVEPXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvepxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvepxl_r_r_r(dst, src, src2)) }
+emit_lvepxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvepxl_r_r_r(dst, src, src2)) }
 inst_doz_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_doz_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_doz_r_r_r(dst, src, src2)) }
+emit_doz_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_doz_r_r_r(dst, src, src2)) }
 inst_doz_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOZ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_doz_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_doz_dot_r_r_r(dst, src, src2)) }
+emit_doz_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_doz_dot_r_r_r(dst, src, src2)) }
 inst_cax_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CAX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cax_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cax_r_r_r(dst, src, src2)) }
+emit_cax_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cax_r_r_r(dst, src, src2)) }
 inst_cax_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CAX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cax_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cax_dot_r_r_r(dst, src, src2)) }
+emit_cax_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cax_dot_r_r_r(dst, src, src2)) }
 inst_ehpriv_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EHPRIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ehpriv_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ehpriv_r_r_r(dst, src, src2)) }
+emit_ehpriv_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ehpriv_r_r_r(dst, src, src2)) }
 inst_mfapidi_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFAPIDI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfapidi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfapidi_r_r_r(dst, src, src2)) }
+emit_mfapidi_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfapidi_r_r_r(dst, src, src2)) }
 inst_lscbx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LSCBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lscbx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lscbx_r_r_r(dst, src, src2)) }
+emit_lscbx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lscbx_r_r_r(dst, src, src2)) }
 inst_lscbx_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LSCBX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lscbx_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lscbx_dot_r_r_r(dst, src, src2)) }
+emit_lscbx_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lscbx_dot_r_r_r(dst, src, src2)) }
 inst_dcbtct_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBTCT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbtct_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbtct_r_r_r(dst, src, src2)) }
+emit_dcbtct_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbtct_r_r_r(dst, src, src2)) }
 inst_dcbtds_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBTDS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcbtds_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcbtds_r_r_r(dst, src, src2)) }
+emit_dcbtds_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcbtds_r_r_r(dst, src, src2)) }
 inst_mfdcrux_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFDCRUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfdcrux_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfdcrux_r_r_r(dst, src, src2)) }
+emit_mfdcrux_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfdcrux_r_r_r(dst, src, src2)) }
 inst_lvexhx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVEXHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvexhx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvexhx_r_r_r(dst, src, src2)) }
+emit_lvexhx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvexhx_r_r_r(dst, src, src2)) }
 inst_lvepx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvepx_r_r_r(dst, src, src2)) }
+emit_lvepx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvepx_r_r_r(dst, src, src2)) }
 inst_mfbhrbe_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFBHRBE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfbhrbe_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfbhrbe_r_r_r(dst, src, src2)) }
+emit_mfbhrbe_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfbhrbe_r_r_r(dst, src, src2)) }
 inst_tlbi_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TLBI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_tlbi_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tlbi_r_r_r(dst, src, src2)) }
+emit_tlbi_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tlbi_r_r_r(dst, src, src2)) }
 inst_eciwx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ECIWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_eciwx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_eciwx_r_r_r(dst, src, src2)) }
+emit_eciwx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_eciwx_r_r_r(dst, src, src2)) }
 inst_mfdcr_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFDCR_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfdcr_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfdcr_dot_r_r_r(dst, src, src2)) }
+emit_mfdcr_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfdcr_dot_r_r_r(dst, src, src2)) }
 inst_lvexwx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVEXWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvexwx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvexwx_r_r_r(dst, src, src2)) }
+emit_lvexwx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvexwx_r_r_r(dst, src, src2)) }
 inst_dcread_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCREAD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcread_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcread_r_r_r(dst, src, src2)) }
+emit_dcread_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcread_r_r_r(dst, src, src2)) }
 inst_div_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_r_r_r(dst, src, src2)) }
+emit_div_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_r_r_r(dst, src, src2)) }
 inst_div_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIV_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_div_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_div_dot_r_r_r(dst, src, src2)) }
+emit_div_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_div_dot_r_r_r(dst, src, src2)) }
 inst_mftmr_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFTMR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mftmr_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mftmr_r_r_r(dst, src, src2)) }
+emit_mftmr_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mftmr_r_r_r(dst, src, src2)) }
 inst_abs_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ABS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_abs_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_abs_r_r_r(dst, src, src2)) }
+emit_abs_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_abs_r_r_r(dst, src, src2)) }
 inst_abs_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ABS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_abs_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_abs_dot_r_r_r(dst, src, src2)) }
+emit_abs_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_abs_dot_r_r_r(dst, src, src2)) }
 inst_divs_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divs_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divs_r_r_r(dst, src, src2)) }
+emit_divs_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divs_r_r_r(dst, src, src2)) }
 inst_divs_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divs_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divs_dot_r_r_r(dst, src, src2)) }
+emit_divs_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divs_dot_r_r_r(dst, src, src2)) }
 inst_lxvwsx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LXVWSX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lxvwsx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lxvwsx_r_r_r(dst, src, src2)) }
+emit_lxvwsx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lxvwsx_r_r_r(dst, src, src2)) }
 inst_tlbia_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TLBIA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_tlbia_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tlbia_r_r_r(dst, src, src2)) }
+emit_tlbia_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tlbia_r_r_r(dst, src, src2)) }
 inst_setbc_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SETBC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_setbc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_setbc_r_r_r(dst, src, src2)) }
+emit_setbc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_setbc_r_r_r(dst, src, src2)) }
 inst_mtdcrx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTDCRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtdcrx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtdcrx_r_r_r(dst, src, src2)) }
+emit_mtdcrx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtdcrx_r_r_r(dst, src, src2)) }
 inst_mtdcrx_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTDCRX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtdcrx_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtdcrx_dot_r_r_r(dst, src, src2)) }
+emit_mtdcrx_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtdcrx_dot_r_r_r(dst, src, src2)) }
 inst_stvexbx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVEXBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvexbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvexbx_r_r_r(dst, src, src2)) }
+emit_stvexbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvexbx_r_r_r(dst, src, src2)) }
 inst_dcblc_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBLC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcblc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcblc_r_r_r(dst, src, src2)) }
+emit_dcblc_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcblc_r_r_r(dst, src, src2)) }
 inst_dcblce_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBLCE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcblce_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcblce_r_r_r(dst, src, src2)) }
+emit_dcblce_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcblce_r_r_r(dst, src, src2)) }
 inst_pbt_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .PBT_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_pbt_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_pbt_dot_r_r_r(dst, src, src2)) }
+emit_pbt_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_pbt_dot_r_r_r(dst, src, src2)) }
 inst_icswx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICSWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_icswx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_icswx_r_r_r(dst, src, src2)) }
+emit_icswx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_icswx_r_r_r(dst, src, src2)) }
 inst_icswx_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICSWX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_icswx_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_icswx_dot_r_r_r(dst, src, src2)) }
+emit_icswx_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_icswx_dot_r_r_r(dst, src, src2)) }
 inst_setbcr_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SETBCR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_setbcr_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_setbcr_r_r_r(dst, src, src2)) }
+emit_setbcr_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_setbcr_r_r_r(dst, src, src2)) }
 inst_mtdcrux_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTDCRUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtdcrux_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtdcrux_r_r_r(dst, src, src2)) }
+emit_mtdcrux_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtdcrux_r_r_r(dst, src, src2)) }
 inst_stvexhx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVEXHX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvexhx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvexhx_r_r_r(dst, src, src2)) }
+emit_stvexhx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvexhx_r_r_r(dst, src, src2)) }
 inst_dcblq_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCBLQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcblq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcblq_dot_r_r_r(dst, src, src2)) }
+emit_dcblq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcblq_dot_r_r_r(dst, src, src2)) }
 inst_clrbhrb_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLRBHRB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clrbhrb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clrbhrb_r_r_r(dst, src, src2)) }
+emit_clrbhrb_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clrbhrb_r_r_r(dst, src, src2)) }
 inst_ecowx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ECOWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ecowx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ecowx_r_r_r(dst, src, src2)) }
+emit_ecowx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ecowx_r_r_r(dst, src, src2)) }
 inst_setnbc_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SETNBC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_setnbc_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_setnbc_r_r_r(dst, src, src2)) }
+emit_setnbc_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_setnbc_r_r_r(dst, src, src2)) }
 inst_mtdcr_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTDCR_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mtdcr_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mtdcr_dot_r_r_r(dst, src, src2)) }
+emit_mtdcr_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mtdcr_dot_r_r_r(dst, src, src2)) }
 inst_stvexwx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVEXWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvexwx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvexwx_r_r_r(dst, src, src2)) }
+emit_stvexwx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvexwx_r_r_r(dst, src, src2)) }
 inst_dci_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dci_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dci_r_r_r(dst, src, src2)) }
+emit_dci_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dci_r_r_r(dst, src, src2)) }
 inst_mttmr_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MTTMR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mttmr_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mttmr_r_r_r(dst, src, src2)) }
+emit_mttmr_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mttmr_r_r_r(dst, src, src2)) }
 inst_setnbcr_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SETNBCR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_setnbcr_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_setnbcr_r_r_r(dst, src, src2)) }
+emit_setnbcr_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_setnbcr_r_r_r(dst, src, src2)) }
 inst_dsn_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DSN, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dsn_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dsn_r_r_r(dst, src, src2)) }
+emit_dsn_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dsn_r_r_r(dst, src, src2)) }
 inst_nabs_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NABS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nabs_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nabs_r_r_r(dst, src, src2)) }
+emit_nabs_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nabs_r_r_r(dst, src, src2)) }
 inst_nabs_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NABS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nabs_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nabs_dot_r_r_r(dst, src, src2)) }
+emit_nabs_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nabs_dot_r_r_r(dst, src, src2)) }
 inst_icbtlse_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICBTLSE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_icbtlse_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_icbtlse_r_r_r(dst, src, src2)) }
+emit_icbtlse_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_icbtlse_r_r_r(dst, src, src2)) }
 inst_cli_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_cli_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_cli_r_r_r(dst, src, src2)) }
+emit_cli_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_cli_r_r_r(dst, src, src2)) }
 inst_mcrxr_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MCRXR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mcrxr_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mcrxr_r_r_r(dst, src, src2)) }
+emit_mcrxr_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mcrxr_r_r_r(dst, src, src2)) }
 inst_lbdcbx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LBDCBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lbdcbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lbdcbx_r_r_r(dst, src, src2)) }
+emit_lbdcbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lbdcbx_r_r_r(dst, src, src2)) }
 inst_lbdx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LBDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lbdx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lbdx_r_r_r(dst, src, src2)) }
+emit_lbdx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lbdx_r_r_r(dst, src, src2)) }
 inst_bblels_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BBLELS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bblels_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bblels_r_r_r(dst, src, src2)) }
+emit_bblels_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bblels_r_r_r(dst, src, src2)) }
 inst_lvlx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvlx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvlx_r_r_r(dst, src, src2)) }
+emit_lvlx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvlx_r_r_r(dst, src, src2)) }
 inst_subfco_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFCO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfco_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfco_r_r_r(dst, src, src2)) }
+emit_subfco_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfco_r_r_r(dst, src, src2)) }
 inst_sfo_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfo_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfo_r_r_r(dst, src, src2)) }
+emit_sfo_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfo_r_r_r(dst, src, src2)) }
 inst_subco_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBCO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subco_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subco_r_r_r(dst, src, src2)) }
+emit_subco_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subco_r_r_r(dst, src, src2)) }
 inst_subfco_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFCO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfco_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfco_dot_r_r_r(dst, src, src2)) }
+emit_subfco_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfco_dot_r_r_r(dst, src, src2)) }
 inst_sfo_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfo_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfo_dot_r_r_r(dst, src, src2)) }
+emit_sfo_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfo_dot_r_r_r(dst, src, src2)) }
 inst_subco_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBCO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subco_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subco_dot_r_r_r(dst, src, src2)) }
+emit_subco_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subco_dot_r_r_r(dst, src, src2)) }
 inst_addco_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDCO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addco_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addco_r_r_r(dst, src, src2)) }
+emit_addco_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addco_r_r_r(dst, src, src2)) }
 inst_ao_r_r_r                            :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ao_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ao_r_r_r(dst, src, src2)) }
+emit_ao_r_r_r                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ao_r_r_r(dst, src, src2)) }
 inst_addco_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDCO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addco_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addco_dot_r_r_r(dst, src, src2)) }
+emit_addco_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addco_dot_r_r_r(dst, src, src2)) }
 inst_ao_dot_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ao_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ao_dot_r_r_r(dst, src, src2)) }
+emit_ao_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ao_dot_r_r_r(dst, src, src2)) }
 inst_clcs_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CLCS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_clcs_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_clcs_r_r_r(dst, src, src2)) }
+emit_clcs_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_clcs_r_r_r(dst, src, src2)) }
 inst_lsx_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LSX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lsx_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lsx_r_r_r(dst, src, src2)) }
+emit_lsx_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lsx_r_r_r(dst, src, src2)) }
 inst_lbrx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LBRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lbrx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lbrx_r_r_r(dst, src, src2)) }
+emit_lbrx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lbrx_r_r_r(dst, src, src2)) }
 inst_sr_dot_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SR_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sr_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sr_dot_r_r_r(dst, src, src2)) }
+emit_sr_dot_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sr_dot_r_r_r(dst, src, src2)) }
 inst_rrib_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RRIB, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rrib_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rrib_r_r_r(dst, src, src2)) }
+emit_rrib_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rrib_r_r_r(dst, src, src2)) }
 inst_rrib_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RRIB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rrib_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rrib_dot_r_r_r(dst, src, src2)) }
+emit_rrib_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rrib_dot_r_r_r(dst, src, src2)) }
 inst_maskir_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MASKIR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maskir_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maskir_r_r_r(dst, src, src2)) }
+emit_maskir_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maskir_r_r_r(dst, src, src2)) }
 inst_maskir_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MASKIR_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_maskir_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_maskir_dot_r_r_r(dst, src, src2)) }
+emit_maskir_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_maskir_dot_r_r_r(dst, src, src2)) }
 inst_lhdcbx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LHDCBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lhdcbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lhdcbx_r_r_r(dst, src, src2)) }
+emit_lhdcbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lhdcbx_r_r_r(dst, src, src2)) }
 inst_lhdx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LHDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lhdx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lhdx_r_r_r(dst, src, src2)) }
+emit_lhdx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lhdx_r_r_r(dst, src, src2)) }
 inst_lvtrx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVTRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvtrx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvtrx_r_r_r(dst, src, src2)) }
+emit_lvtrx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvtrx_r_r_r(dst, src, src2)) }
 inst_bbelr_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .BBELR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_bbelr_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_bbelr_r_r_r(dst, src, src2)) }
+emit_bbelr_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_bbelr_r_r_r(dst, src, src2)) }
 inst_lvrx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvrx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvrx_r_r_r(dst, src, src2)) }
+emit_lvrx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvrx_r_r_r(dst, src, src2)) }
 inst_subfo_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfo_r_r_r(dst, src, src2)) }
+emit_subfo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfo_r_r_r(dst, src, src2)) }
 inst_subo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subo_r_r_r(dst, src, src2)) }
+emit_subo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subo_r_r_r(dst, src, src2)) }
 inst_subfo_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfo_dot_r_r_r(dst, src, src2)) }
+emit_subfo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfo_dot_r_r_r(dst, src, src2)) }
 inst_subo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subo_dot_r_r_r(dst, src, src2)) }
+emit_subo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subo_dot_r_r_r(dst, src, src2)) }
 inst_lwdcbx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LWDCBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lwdcbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lwdcbx_r_r_r(dst, src, src2)) }
+emit_lwdcbx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lwdcbx_r_r_r(dst, src, src2)) }
 inst_lwdx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LWDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lwdx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lwdx_r_r_r(dst, src, src2)) }
+emit_lwdx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lwdx_r_r_r(dst, src, src2)) }
 inst_lvtlx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVTLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvtlx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvtlx_r_r_r(dst, src, src2)) }
+emit_lvtlx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvtlx_r_r_r(dst, src, src2)) }
 inst_lsi_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lsi_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lsi_r_r_r(dst, src, src2)) }
+emit_lsi_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lsi_r_r_r(dst, src, src2)) }
 inst_dcs_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dcs_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dcs_r_r_r(dst, src, src2)) }
+emit_dcs_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dcs_r_r_r(dst, src, src2)) }
 inst_mffgpr_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFFGPR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mffgpr_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mffgpr_r_r_r(dst, src, src2)) }
+emit_mffgpr_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mffgpr_r_r_r(dst, src, src2)) }
 inst_lddx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LDDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lddx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lddx_r_r_r(dst, src, src2)) }
+emit_lddx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lddx_r_r_r(dst, src, src2)) }
 inst_lvswx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVSWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvswx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvswx_r_r_r(dst, src, src2)) }
+emit_lvswx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvswx_r_r_r(dst, src, src2)) }
 inst_nego_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NEGO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nego_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nego_r_r_r(dst, src, src2)) }
+emit_nego_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nego_r_r_r(dst, src, src2)) }
 inst_nego_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NEGO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nego_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nego_dot_r_r_r(dst, src, src2)) }
+emit_nego_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nego_dot_r_r_r(dst, src, src2)) }
 inst_mulo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulo_r_r_r(dst, src, src2)) }
+emit_mulo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulo_r_r_r(dst, src, src2)) }
 inst_mulo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulo_dot_r_r_r(dst, src, src2)) }
+emit_mulo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulo_dot_r_r_r(dst, src, src2)) }
 inst_mfsri_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFSRI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mfsri_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mfsri_r_r_r(dst, src, src2)) }
+emit_mfsri_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mfsri_r_r_r(dst, src, src2)) }
 inst_dclst_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCLST, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dclst_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dclst_r_r_r(dst, src, src2)) }
+emit_dclst_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dclst_r_r_r(dst, src, src2)) }
 inst_stbdcbx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STBDCBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stbdcbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stbdcbx_r_r_r(dst, src, src2)) }
+emit_stbdcbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stbdcbx_r_r_r(dst, src, src2)) }
 inst_stbdx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STBDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stbdx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stbdx_r_r_r(dst, src, src2)) }
+emit_stbdx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stbdx_r_r_r(dst, src, src2)) }
 inst_stvlx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvlx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvlx_r_r_r(dst, src, src2)) }
+emit_stvlx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvlx_r_r_r(dst, src, src2)) }
 inst_subfeo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfeo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfeo_r_r_r(dst, src, src2)) }
+emit_subfeo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfeo_r_r_r(dst, src, src2)) }
 inst_sfeo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfeo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfeo_r_r_r(dst, src, src2)) }
+emit_sfeo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfeo_r_r_r(dst, src, src2)) }
 inst_subfeo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfeo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfeo_dot_r_r_r(dst, src, src2)) }
+emit_subfeo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfeo_dot_r_r_r(dst, src, src2)) }
 inst_sfeo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfeo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfeo_dot_r_r_r(dst, src, src2)) }
+emit_sfeo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfeo_dot_r_r_r(dst, src, src2)) }
 inst_addeo_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addeo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addeo_r_r_r(dst, src, src2)) }
+emit_addeo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addeo_r_r_r(dst, src, src2)) }
 inst_aeo_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_aeo_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_aeo_r_r_r(dst, src, src2)) }
+emit_aeo_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_aeo_r_r_r(dst, src, src2)) }
 inst_addeo_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addeo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addeo_dot_r_r_r(dst, src, src2)) }
+emit_addeo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addeo_dot_r_r_r(dst, src, src2)) }
 inst_aeo_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_aeo_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_aeo_dot_r_r_r(dst, src, src2)) }
+emit_aeo_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_aeo_dot_r_r_r(dst, src, src2)) }
 inst_hashstp_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .HASHSTP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_hashstp_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_hashstp_r_r_r(dst, src, src2)) }
+emit_hashstp_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_hashstp_r_r_r(dst, src, src2)) }
 inst_stsx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STSX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stsx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stsx_r_r_r(dst, src, src2)) }
+emit_stsx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stsx_r_r_r(dst, src, src2)) }
 inst_stbrx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STBRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stbrx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stbrx_r_r_r(dst, src, src2)) }
+emit_stbrx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stbrx_r_r_r(dst, src, src2)) }
 inst_srq_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srq_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srq_r_r_r(dst, src, src2)) }
+emit_srq_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srq_r_r_r(dst, src, src2)) }
 inst_srq_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srq_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srq_dot_r_r_r(dst, src, src2)) }
+emit_srq_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srq_dot_r_r_r(dst, src, src2)) }
 inst_sre_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRE, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sre_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sre_r_r_r(dst, src, src2)) }
+emit_sre_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sre_r_r_r(dst, src, src2)) }
 inst_sre_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sre_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sre_dot_r_r_r(dst, src, src2)) }
+emit_sre_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sre_dot_r_r_r(dst, src, src2)) }
 inst_sthdcbx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STHDCBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sthdcbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sthdcbx_r_r_r(dst, src, src2)) }
+emit_sthdcbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sthdcbx_r_r_r(dst, src, src2)) }
 inst_sthdx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STHDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sthdx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sthdx_r_r_r(dst, src, src2)) }
+emit_sthdx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sthdx_r_r_r(dst, src, src2)) }
 inst_stvfrx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVFRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvfrx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvfrx_r_r_r(dst, src, src2)) }
+emit_stvfrx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvfrx_r_r_r(dst, src, src2)) }
 inst_stvrx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVRX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvrx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvrx_r_r_r(dst, src, src2)) }
+emit_stvrx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvrx_r_r_r(dst, src, src2)) }
 inst_hashchkp_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .HASHCHKP, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_hashchkp_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_hashchkp_r_r_r(dst, src, src2)) }
+emit_hashchkp_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_hashchkp_r_r_r(dst, src, src2)) }
 inst_sriq_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRIQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sriq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sriq_r_r_r(dst, src, src2)) }
+emit_sriq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sriq_r_r_r(dst, src, src2)) }
 inst_sriq_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRIQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sriq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sriq_dot_r_r_r(dst, src, src2)) }
+emit_sriq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sriq_dot_r_r_r(dst, src, src2)) }
 inst_stwdcbx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STWDCBX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stwdcbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stwdcbx_r_r_r(dst, src, src2)) }
+emit_stwdcbx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stwdcbx_r_r_r(dst, src, src2)) }
 inst_stwdx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STWDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stwdx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stwdx_r_r_r(dst, src, src2)) }
+emit_stwdx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stwdx_r_r_r(dst, src, src2)) }
 inst_stvflx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVFLX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvflx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvflx_r_r_r(dst, src, src2)) }
+emit_stvflx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvflx_r_r_r(dst, src, src2)) }
 inst_subfzeo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFZEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfzeo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfzeo_r_r_r(dst, src, src2)) }
+emit_subfzeo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfzeo_r_r_r(dst, src, src2)) }
 inst_sfzeo_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFZEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfzeo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfzeo_r_r_r(dst, src, src2)) }
+emit_sfzeo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfzeo_r_r_r(dst, src, src2)) }
 inst_subfzeo_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFZEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfzeo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfzeo_dot_r_r_r(dst, src, src2)) }
+emit_subfzeo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfzeo_dot_r_r_r(dst, src, src2)) }
 inst_sfzeo_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFZEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfzeo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfzeo_dot_r_r_r(dst, src, src2)) }
+emit_sfzeo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfzeo_dot_r_r_r(dst, src, src2)) }
 inst_addzeo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDZEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addzeo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addzeo_r_r_r(dst, src, src2)) }
+emit_addzeo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addzeo_r_r_r(dst, src, src2)) }
 inst_azeo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AZEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_azeo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_azeo_r_r_r(dst, src, src2)) }
+emit_azeo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_azeo_r_r_r(dst, src, src2)) }
 inst_addzeo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDZEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addzeo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addzeo_dot_r_r_r(dst, src, src2)) }
+emit_addzeo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addzeo_dot_r_r_r(dst, src, src2)) }
 inst_azeo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AZEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_azeo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_azeo_dot_r_r_r(dst, src, src2)) }
+emit_azeo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_azeo_dot_r_r_r(dst, src, src2)) }
 inst_hashst_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .HASHST, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_hashst_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_hashst_r_r_r(dst, src, src2)) }
+emit_hashst_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_hashst_r_r_r(dst, src, src2)) }
 inst_stsi_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STSI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stsi_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stsi_r_r_r(dst, src, src2)) }
+emit_stsi_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stsi_r_r_r(dst, src, src2)) }
 inst_srlq_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRLQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srlq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srlq_r_r_r(dst, src, src2)) }
+emit_srlq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srlq_r_r_r(dst, src, src2)) }
 inst_srlq_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRLQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srlq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srlq_dot_r_r_r(dst, src, src2)) }
+emit_srlq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srlq_dot_r_r_r(dst, src, src2)) }
 inst_sreq_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SREQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sreq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sreq_r_r_r(dst, src, src2)) }
+emit_sreq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sreq_r_r_r(dst, src, src2)) }
 inst_sreq_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SREQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sreq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sreq_dot_r_r_r(dst, src, src2)) }
+emit_sreq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sreq_dot_r_r_r(dst, src, src2)) }
 inst_mftgpr_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MFTGPR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mftgpr_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mftgpr_r_r_r(dst, src, src2)) }
+emit_mftgpr_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mftgpr_r_r_r(dst, src, src2)) }
 inst_stddx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STDDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stddx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stddx_r_r_r(dst, src, src2)) }
+emit_stddx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stddx_r_r_r(dst, src, src2)) }
 inst_stvswx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVSWX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvswx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvswx_r_r_r(dst, src, src2)) }
+emit_stvswx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvswx_r_r_r(dst, src, src2)) }
 inst_subfmeo_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFMEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfmeo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfmeo_r_r_r(dst, src, src2)) }
+emit_subfmeo_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfmeo_r_r_r(dst, src, src2)) }
 inst_sfmeo_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFMEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfmeo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfmeo_r_r_r(dst, src, src2)) }
+emit_sfmeo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfmeo_r_r_r(dst, src, src2)) }
 inst_subfmeo_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SUBFMEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_subfmeo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_subfmeo_dot_r_r_r(dst, src, src2)) }
+emit_subfmeo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_subfmeo_dot_r_r_r(dst, src, src2)) }
 inst_sfmeo_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SFMEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sfmeo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sfmeo_dot_r_r_r(dst, src, src2)) }
+emit_sfmeo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sfmeo_dot_r_r_r(dst, src, src2)) }
 inst_mulldo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLDO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulldo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulldo_r_r_r(dst, src, src2)) }
+emit_mulldo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulldo_r_r_r(dst, src, src2)) }
 inst_mulldo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLDO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulldo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulldo_dot_r_r_r(dst, src, src2)) }
+emit_mulldo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulldo_dot_r_r_r(dst, src, src2)) }
 inst_addmeo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDMEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addmeo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addmeo_r_r_r(dst, src, src2)) }
+emit_addmeo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addmeo_r_r_r(dst, src, src2)) }
 inst_ameo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AMEO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ameo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ameo_r_r_r(dst, src, src2)) }
+emit_ameo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ameo_r_r_r(dst, src, src2)) }
 inst_addmeo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDMEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addmeo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addmeo_dot_r_r_r(dst, src, src2)) }
+emit_addmeo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addmeo_dot_r_r_r(dst, src, src2)) }
 inst_ameo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .AMEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ameo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ameo_dot_r_r_r(dst, src, src2)) }
+emit_ameo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ameo_dot_r_r_r(dst, src, src2)) }
 inst_mullwo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullwo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullwo_r_r_r(dst, src, src2)) }
+emit_mullwo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullwo_r_r_r(dst, src, src2)) }
 inst_mulso_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulso_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulso_r_r_r(dst, src, src2)) }
+emit_mulso_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulso_r_r_r(dst, src, src2)) }
 inst_mullwo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULLWO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mullwo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mullwo_dot_r_r_r(dst, src, src2)) }
+emit_mullwo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mullwo_dot_r_r_r(dst, src, src2)) }
 inst_mulso_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .MULSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_mulso_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_mulso_dot_r_r_r(dst, src, src2)) }
+emit_mulso_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_mulso_dot_r_r_r(dst, src, src2)) }
 inst_tsr_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TSR_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_tsr_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tsr_dot_r_r_r(dst, src, src2)) }
+emit_tsr_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tsr_dot_r_r_r(dst, src, src2)) }
 inst_hashchk_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .HASHCHK, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_hashchk_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_hashchk_r_r_r(dst, src, src2)) }
+emit_hashchk_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_hashchk_r_r_r(dst, src, src2)) }
 inst_srliq_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRLIQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srliq_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srliq_r_r_r(dst, src, src2)) }
+emit_srliq_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srliq_r_r_r(dst, src, src2)) }
 inst_srliq_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRLIQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srliq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srliq_dot_r_r_r(dst, src, src2)) }
+emit_srliq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srliq_dot_r_r_r(dst, src, src2)) }
 inst_lvsm_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVSM, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvsm_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvsm_r_r_r(dst, src, src2)) }
+emit_lvsm_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvsm_r_r_r(dst, src, src2)) }
 inst_stvepxl_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVEPXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvepxl_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvepxl_r_r_r(dst, src, src2)) }
+emit_stvepxl_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvepxl_r_r_r(dst, src, src2)) }
 inst_lvlxl_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVLXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvlxl_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvlxl_r_r_r(dst, src, src2)) }
+emit_lvlxl_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvlxl_r_r_r(dst, src, src2)) }
 inst_dozo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOZO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dozo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dozo_r_r_r(dst, src, src2)) }
+emit_dozo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dozo_r_r_r(dst, src, src2)) }
 inst_dozo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DOZO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dozo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dozo_dot_r_r_r(dst, src, src2)) }
+emit_dozo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dozo_dot_r_r_r(dst, src, src2)) }
 inst_addo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addo_r_r_r(dst, src, src2)) }
+emit_addo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addo_r_r_r(dst, src, src2)) }
 inst_caxo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CAXO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_caxo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_caxo_r_r_r(dst, src, src2)) }
+emit_caxo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_caxo_r_r_r(dst, src, src2)) }
 inst_addo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_addo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addo_dot_r_r_r(dst, src, src2)) }
+emit_addo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_addo_dot_r_r_r(dst, src, src2)) }
 inst_caxo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .CAXO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_caxo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_caxo_dot_r_r_r(dst, src, src2)) }
+emit_caxo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_caxo_dot_r_r_r(dst, src, src2)) }
 inst_lfqx_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LFQX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lfqx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lfqx_r_r_r(dst, src, src2)) }
+emit_lfqx_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lfqx_r_r_r(dst, src, src2)) }
 inst_sra_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sra_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sra_r_r_r(dst, src, src2)) }
+emit_sra_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sra_r_r_r(dst, src, src2)) }
 inst_sra_dot_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRA_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sra_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sra_dot_r_r_r(dst, src, src2)) }
+emit_sra_dot_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sra_dot_r_r_r(dst, src, src2)) }
 inst_evlddepx_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVLDDEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evlddepx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evlddepx_r_r_r(dst, src, src2)) }
+emit_evlddepx_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evlddepx_r_r_r(dst, src, src2)) }
 inst_lfddx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LFDDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lfddx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lfddx_r_r_r(dst, src, src2)) }
+emit_lfddx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lfddx_r_r_r(dst, src, src2)) }
 inst_lvtrxl_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVTRXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvtrxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvtrxl_r_r_r(dst, src, src2)) }
+emit_lvtrxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvtrxl_r_r_r(dst, src, src2)) }
 inst_stvepx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvepx_r_r_r(dst, src, src2)) }
+emit_stvepx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvepx_r_r_r(dst, src, src2)) }
 inst_lvrxl_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVRXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvrxl_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvrxl_r_r_r(dst, src, src2)) }
+emit_lvrxl_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvrxl_r_r_r(dst, src, src2)) }
 inst_rac_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RAC, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rac_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rac_r_r_r(dst, src, src2)) }
+emit_rac_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rac_r_r_r(dst, src, src2)) }
 inst_erativax_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ERATIVAX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_erativax_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_erativax_r_r_r(dst, src, src2)) }
+emit_erativax_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_erativax_r_r_r(dst, src, src2)) }
 inst_lfqux_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LFQUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lfqux_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lfqux_r_r_r(dst, src, src2)) }
+emit_lfqux_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lfqux_r_r_r(dst, src, src2)) }
 inst_srai_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srai_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srai_r_r_r(dst, src, src2)) }
+emit_srai_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srai_r_r_r(dst, src, src2)) }
 inst_srai_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAI_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srai_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srai_dot_r_r_r(dst, src, src2)) }
+emit_srai_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srai_dot_r_r_r(dst, src, src2)) }
 inst_lvtlxl_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVTLXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvtlxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvtlxl_r_r_r(dst, src, src2)) }
+emit_lvtlxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvtlxl_r_r_r(dst, src, src2)) }
 inst_divo_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divo_r_r_r(dst, src, src2)) }
+emit_divo_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divo_r_r_r(dst, src, src2)) }
 inst_divo_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divo_dot_r_r_r(dst, src, src2)) }
+emit_divo_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divo_dot_r_r_r(dst, src, src2)) }
 inst_tlbsrx_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TLBSRX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_tlbsrx_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tlbsrx_dot_r_r_r(dst, src, src2)) }
+emit_tlbsrx_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tlbsrx_dot_r_r_r(dst, src, src2)) }
 inst_slbiag_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLBIAG, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_slbiag_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_slbiag_r_r_r(dst, src, src2)) }
+emit_slbiag_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_slbiag_r_r_r(dst, src, src2)) }
 inst_lvswxl_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .LVSWXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_lvswxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_lvswxl_r_r_r(dst, src, src2)) }
+emit_lvswxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_lvswxl_r_r_r(dst, src, src2)) }
 inst_abso_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ABSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_abso_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_abso_r_r_r(dst, src, src2)) }
+emit_abso_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_abso_r_r_r(dst, src, src2)) }
 inst_abso_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ABSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_abso_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_abso_dot_r_r_r(dst, src, src2)) }
+emit_abso_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_abso_dot_r_r_r(dst, src, src2)) }
 inst_divso_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divso_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divso_r_r_r(dst, src, src2)) }
+emit_divso_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divso_r_r_r(dst, src, src2)) }
 inst_divso_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divso_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divso_dot_r_r_r(dst, src, src2)) }
+emit_divso_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divso_dot_r_r_r(dst, src, src2)) }
 inst_rmieg_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .RMIEG, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_rmieg_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_rmieg_r_r_r(dst, src, src2)) }
+emit_rmieg_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_rmieg_r_r_r(dst, src, src2)) }
 inst_stvlxl_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVLXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvlxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvlxl_r_r_r(dst, src, src2)) }
+emit_stvlxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvlxl_r_r_r(dst, src, src2)) }
 inst_divdeuo_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDEUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdeuo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdeuo_dot_r_r_r(dst, src, src2)) }
+emit_divdeuo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdeuo_dot_r_r_r(dst, src, src2)) }
 inst_divweuo_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWEUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divweuo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divweuo_dot_r_r_r(dst, src, src2)) }
+emit_divweuo_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divweuo_dot_r_r_r(dst, src, src2)) }
 inst_tlbsx_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .TLBSX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_tlbsx_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_tlbsx_dot_r_r_r(dst, src, src2)) }
+emit_tlbsx_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_tlbsx_dot_r_r_r(dst, src, src2)) }
 inst_stfqx_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STFQX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stfqx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stfqx_r_r_r(dst, src, src2)) }
+emit_stfqx_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stfqx_r_r_r(dst, src, src2)) }
 inst_sraq_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sraq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sraq_r_r_r(dst, src, src2)) }
+emit_sraq_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sraq_r_r_r(dst, src, src2)) }
 inst_sraq_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sraq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sraq_dot_r_r_r(dst, src, src2)) }
+emit_sraq_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sraq_dot_r_r_r(dst, src, src2)) }
 inst_srea_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SREA, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srea_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srea_r_r_r(dst, src, src2)) }
+emit_srea_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srea_r_r_r(dst, src, src2)) }
 inst_srea_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SREA_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_srea_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_srea_dot_r_r_r(dst, src, src2)) }
+emit_srea_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_srea_dot_r_r_r(dst, src, src2)) }
 inst_exts_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EXTS, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_exts_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_exts_r_r_r(dst, src, src2)) }
+emit_exts_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_exts_r_r_r(dst, src, src2)) }
 inst_exts_dot_r_r_r                      :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EXTS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_exts_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_exts_dot_r_r_r(dst, src, src2)) }
+emit_exts_dot_r_r_r                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_exts_dot_r_r_r(dst, src, src2)) }
 inst_evstddepx_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSTDDEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evstddepx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evstddepx_r_r_r(dst, src, src2)) }
+emit_evstddepx_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evstddepx_r_r_r(dst, src, src2)) }
 inst_stfddx_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STFDDX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stfddx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stfddx_r_r_r(dst, src, src2)) }
+emit_stfddx_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stfddx_r_r_r(dst, src, src2)) }
 inst_stvfrxl_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVFRXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvfrxl_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvfrxl_r_r_r(dst, src, src2)) }
+emit_stvfrxl_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvfrxl_r_r_r(dst, src, src2)) }
 inst_wclrall_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WCLRALL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_wclrall_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_wclrall_r_r_r(dst, src, src2)) }
+emit_wclrall_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_wclrall_r_r_r(dst, src, src2)) }
 inst_wclr_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .WCLR, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_wclr_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_wclr_r_r_r(dst, src, src2)) }
+emit_wclr_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_wclr_r_r_r(dst, src, src2)) }
 inst_stvrxl_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVRXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvrxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvrxl_r_r_r(dst, src, src2)) }
+emit_stvrxl_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvrxl_r_r_r(dst, src, src2)) }
 inst_divdeo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdeo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdeo_dot_r_r_r(dst, src, src2)) }
+emit_divdeo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdeo_dot_r_r_r(dst, src, src2)) }
 inst_divweo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWEO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divweo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divweo_dot_r_r_r(dst, src, src2)) }
+emit_divweo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divweo_dot_r_r_r(dst, src, src2)) }
 inst_icswepx_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICSWEPX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_icswepx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_icswepx_r_r_r(dst, src, src2)) }
+emit_icswepx_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_icswepx_r_r_r(dst, src, src2)) }
 inst_icswepx_dot_r_r_r                   :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICSWEPX_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_icswepx_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_icswepx_dot_r_r_r(dst, src, src2)) }
+emit_icswepx_dot_r_r_r                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_icswepx_dot_r_r_r(dst, src, src2)) }
 inst_stfqux_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STFQUX, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stfqux_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stfqux_r_r_r(dst, src, src2)) }
+emit_stfqux_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stfqux_r_r_r(dst, src, src2)) }
 inst_sraiq_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAIQ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sraiq_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sraiq_r_r_r(dst, src, src2)) }
+emit_sraiq_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sraiq_r_r_r(dst, src, src2)) }
 inst_sraiq_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SRAIQ_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_sraiq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_sraiq_dot_r_r_r(dst, src, src2)) }
+emit_sraiq_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_sraiq_dot_r_r_r(dst, src, src2)) }
 inst_stvflxl_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVFLXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvflxl_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvflxl_r_r_r(dst, src, src2)) }
+emit_stvflxl_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvflxl_r_r_r(dst, src, src2)) }
 inst_ici_r_r_r                           :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICI, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_ici_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_ici_r_r_r(dst, src, src2)) }
+emit_ici_r_r_r                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_ici_r_r_r(dst, src, src2)) }
 inst_divduo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divduo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divduo_r_r_r(dst, src, src2)) }
+emit_divduo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divduo_r_r_r(dst, src, src2)) }
 inst_divduo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divduo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divduo_dot_r_r_r(dst, src, src2)) }
+emit_divduo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divduo_dot_r_r_r(dst, src, src2)) }
 inst_divwuo_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWUO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwuo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwuo_r_r_r(dst, src, src2)) }
+emit_divwuo_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwuo_r_r_r(dst, src, src2)) }
 inst_divwuo_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWUO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwuo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwuo_dot_r_r_r(dst, src, src2)) }
+emit_divwuo_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwuo_dot_r_r_r(dst, src, src2)) }
 inst_slbfee_dot_r_r_r                    :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .SLBFEE_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_slbfee_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_slbfee_dot_r_r_r(dst, src, src2)) }
+emit_slbfee_dot_r_r_r                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_slbfee_dot_r_r_r(dst, src, src2)) }
 inst_stvswxl_r_r_r                       :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .STVSWXL, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_stvswxl_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_stvswxl_r_r_r(dst, src, src2)) }
+emit_stvswxl_r_r_r                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_stvswxl_r_r_r(dst, src, src2)) }
 inst_icread_r_r_r                        :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ICREAD, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_icread_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_icread_r_r_r(dst, src, src2)) }
+emit_icread_r_r_r                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_icread_r_r_r(dst, src, src2)) }
 inst_nabso_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NABSO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nabso_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nabso_r_r_r(dst, src, src2)) }
+emit_nabso_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nabso_r_r_r(dst, src, src2)) }
 inst_nabso_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .NABSO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_nabso_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_nabso_dot_r_r_r(dst, src, src2)) }
+emit_nabso_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_nabso_dot_r_r_r(dst, src, src2)) }
 inst_divdo_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdo_r_r_r(dst, src, src2)) }
+emit_divdo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdo_r_r_r(dst, src, src2)) }
 inst_divdo_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVDO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divdo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divdo_dot_r_r_r(dst, src, src2)) }
+emit_divdo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divdo_dot_r_r_r(dst, src, src2)) }
 inst_divwo_r_r_r                         :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWO, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwo_r_r_r(dst, src, src2)) }
+emit_divwo_r_r_r                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwo_r_r_r(dst, src, src2)) }
 inst_divwo_dot_r_r_r                     :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DIVWO_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_divwo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_divwo_dot_r_r_r(dst, src, src2)) }
+emit_divwo_dot_r_r_r                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_divwo_dot_r_r_r(dst, src, src2)) }
 inst_dclz_r_r_r                          :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .DCLZ, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_dclz_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_dclz_r_r_r(dst, src, src2)) }
+emit_dclz_r_r_r                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_dclz_r_r_r(dst, src, src2)) }
 inst_lu_r_mem                            :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lu_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lu_r_mem(dst, addr)) }
+emit_lu_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lu_r_mem(dst, addr)) }
 inst_st_r_mem                            :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .ST, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_st_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_st_r_mem(dst, addr)) }
+emit_st_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_st_r_mem(dst, addr)) }
 inst_stu_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stu_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stu_r_mem(dst, addr)) }
+emit_stu_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stu_r_mem(dst, addr)) }
 inst_lm_r_mem                            :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LM, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lm_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lm_r_mem(dst, addr)) }
+emit_lm_r_mem                            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lm_r_mem(dst, addr)) }
 inst_stm_r_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STM, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stm_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stm_r_mem(dst, addr)) }
+emit_stm_r_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stm_r_mem(dst, addr)) }
 inst_lfq_fr_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfq_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfq_fr_mem(dst, addr)) }
+emit_lfq_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfq_fr_mem(dst, addr)) }
 inst_lfqu_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .LFQU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_lfqu_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_lfqu_fr_mem(dst, addr)) }
+emit_lfqu_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_lfqu_fr_mem(dst, addr)) }
 inst_stfq_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfq_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfq_fr_mem(dst, addr)) }
+emit_stfq_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfq_fr_mem(dst, addr)) }
 inst_stfqu_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .STFQU, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_stfqu_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_stfqu_fr_mem(dst, addr)) }
+emit_stfqu_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_stfqu_fr_mem(dst, addr)) }
 inst_fcir_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FCIR, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fcir_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fcir_fr_mem(dst, addr)) }
+emit_fcir_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fcir_fr_mem(dst, addr)) }
 inst_fcir_dot_fr_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FCIR_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fcir_dot_fr_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fcir_dot_fr_mem(dst, addr)) }
+emit_fcir_dot_fr_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fcir_dot_fr_mem(dst, addr)) }
 inst_fcirz_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FCIRZ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fcirz_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fcirz_fr_mem(dst, addr)) }
+emit_fcirz_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fcirz_fr_mem(dst, addr)) }
 inst_fcirz_dot_fr_mem                    :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FCIRZ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fcirz_dot_fr_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fcirz_dot_fr_mem(dst, addr)) }
+emit_fcirz_dot_fr_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fcirz_dot_fr_mem(dst, addr)) }
 inst_fd_fr_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FD, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fd_fr_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fd_fr_mem(dst, addr)) }
+emit_fd_fr_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fd_fr_mem(dst, addr)) }
 inst_fd_dot_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FD_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fd_dot_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fd_dot_fr_mem(dst, addr)) }
+emit_fd_dot_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fd_dot_fr_mem(dst, addr)) }
 inst_fs_fr_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FS, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fs_fr_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fs_fr_mem(dst, addr)) }
+emit_fs_fr_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fs_fr_mem(dst, addr)) }
 inst_fs_dot_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fs_dot_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fs_dot_fr_mem(dst, addr)) }
+emit_fs_dot_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fs_dot_fr_mem(dst, addr)) }
 inst_fa_fr_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FA, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fa_fr_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fa_fr_mem(dst, addr)) }
+emit_fa_fr_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fa_fr_mem(dst, addr)) }
 inst_fa_dot_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FA_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fa_dot_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fa_dot_fr_mem(dst, addr)) }
+emit_fa_dot_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fa_dot_fr_mem(dst, addr)) }
 inst_fm_fr_mem                           :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FM, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fm_fr_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fm_fr_mem(dst, addr)) }
+emit_fm_fr_mem                           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fm_fr_mem(dst, addr)) }
 inst_fm_dot_fr_mem                       :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FM_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fm_dot_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fm_dot_fr_mem(dst, addr)) }
+emit_fm_dot_fr_mem                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fm_dot_fr_mem(dst, addr)) }
 inst_fms_fr_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FMS, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fms_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fms_fr_mem(dst, addr)) }
+emit_fms_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fms_fr_mem(dst, addr)) }
 inst_fms_dot_fr_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FMS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fms_dot_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fms_dot_fr_mem(dst, addr)) }
+emit_fms_dot_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fms_dot_fr_mem(dst, addr)) }
 inst_fma_fr_mem                          :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FMA, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fma_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fma_fr_mem(dst, addr)) }
+emit_fma_fr_mem                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fma_fr_mem(dst, addr)) }
 inst_fma_dot_fr_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FMA_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fma_dot_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fma_dot_fr_mem(dst, addr)) }
+emit_fma_dot_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fma_dot_fr_mem(dst, addr)) }
 inst_fnms_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FNMS, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fnms_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fnms_fr_mem(dst, addr)) }
+emit_fnms_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fnms_fr_mem(dst, addr)) }
 inst_fnms_dot_fr_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FNMS_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fnms_dot_fr_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fnms_dot_fr_mem(dst, addr)) }
+emit_fnms_dot_fr_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fnms_dot_fr_mem(dst, addr)) }
 inst_fnma_fr_mem                         :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FNMA, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fnma_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fnma_fr_mem(dst, addr)) }
+emit_fnma_fr_mem                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fnma_fr_mem(dst, addr)) }
 inst_fnma_dot_fr_mem                     :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .FNMA_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_fnma_dot_fr_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_fnma_dot_fr_mem(dst, addr)) }
+emit_fnma_dot_fr_mem                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_fnma_dot_fr_mem(dst, addr)) }
 inst_dtstexq_fr_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .DTSTEXQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_dtstexq_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_dtstexq_fr_mem(dst, addr)) }
+emit_dtstexq_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_dtstexq_fr_mem(dst, addr)) }
 inst_xscmpexpqp_fr_mem                   :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .XSCMPEXPQP, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_xscmpexpqp_fr_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_xscmpexpqp_fr_mem(dst, addr)) }
+emit_xscmpexpqp_fr_mem                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_xscmpexpqp_fr_mem(dst, addr)) }
 inst_dxexq_fr_mem                        :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .DXEXQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_dxexq_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_dxexq_fr_mem(dst, addr)) }
+emit_dxexq_fr_mem                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_dxexq_fr_mem(dst, addr)) }
 inst_dxexq_dot_fr_mem                    :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .DXEXQ_DOT, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_dxexq_dot_fr_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_dxexq_dot_fr_mem(dst, addr)) }
+emit_dxexq_dot_fr_mem                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_dxexq_dot_fr_mem(dst, addr)) }
 inst_dtstsfq_fr_mem                      :: #force_inline proc "contextless" (dst: Register, addr: Memory) -> Instruction { return Instruction{mnemonic = .DTSTSFQ, operand_count = 2, length = 4, ops = {op_reg(dst), op_mem(addr), {}, {}}} }
-emit_dtstsfq_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append(instructions, inst_dtstsfq_fr_mem(dst, addr)) }
+emit_dtstsfq_fr_mem                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, addr: Memory) { append_elem(instructions, inst_dtstsfq_fr_mem(dst, addr)) }
 inst_evseteqb_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETEQB_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evseteqb_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evseteqb_dot_r_r_r(dst, src, src2)) }
+emit_evseteqb_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evseteqb_dot_r_r_r(dst, src, src2)) }
 inst_evseteqh_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETEQH_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evseteqh_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evseteqh_dot_r_r_r(dst, src, src2)) }
+emit_evseteqh_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evseteqh_dot_r_r_r(dst, src, src2)) }
 inst_evseteqw_dot_r_r_r                  :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETEQW_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evseteqw_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evseteqw_dot_r_r_r(dst, src, src2)) }
+emit_evseteqw_dot_r_r_r                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evseteqw_dot_r_r_r(dst, src, src2)) }
 inst_evsetgthu_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTHU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgthu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgthu_dot_r_r_r(dst, src, src2)) }
+emit_evsetgthu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgthu_dot_r_r_r(dst, src, src2)) }
 inst_evsetgths_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTHS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgths_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgths_dot_r_r_r(dst, src, src2)) }
+emit_evsetgths_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgths_dot_r_r_r(dst, src, src2)) }
 inst_evsetgtwu_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgtwu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgtwu_dot_r_r_r(dst, src, src2)) }
+emit_evsetgtwu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgtwu_dot_r_r_r(dst, src, src2)) }
 inst_evsetgtws_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTWS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgtws_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgtws_dot_r_r_r(dst, src, src2)) }
+emit_evsetgtws_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgtws_dot_r_r_r(dst, src, src2)) }
 inst_evsetgtbu_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTBU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgtbu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgtbu_dot_r_r_r(dst, src, src2)) }
+emit_evsetgtbu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgtbu_dot_r_r_r(dst, src, src2)) }
 inst_evsetgtbs_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETGTBS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetgtbs_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetgtbs_dot_r_r_r(dst, src, src2)) }
+emit_evsetgtbs_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetgtbs_dot_r_r_r(dst, src, src2)) }
 inst_evsetltbu_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTBU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetltbu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetltbu_dot_r_r_r(dst, src, src2)) }
+emit_evsetltbu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetltbu_dot_r_r_r(dst, src, src2)) }
 inst_evsetltbs_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTBS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetltbs_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetltbs_dot_r_r_r(dst, src, src2)) }
+emit_evsetltbs_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetltbs_dot_r_r_r(dst, src, src2)) }
 inst_evsetlthu_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTHU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetlthu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetlthu_dot_r_r_r(dst, src, src2)) }
+emit_evsetlthu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetlthu_dot_r_r_r(dst, src, src2)) }
 inst_evsetlths_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTHS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetlths_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetlths_dot_r_r_r(dst, src, src2)) }
+emit_evsetlths_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetlths_dot_r_r_r(dst, src, src2)) }
 inst_evsetltwu_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTWU_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetltwu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetltwu_dot_r_r_r(dst, src, src2)) }
+emit_evsetltwu_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetltwu_dot_r_r_r(dst, src, src2)) }
 inst_evsetltws_dot_r_r_r                 :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .EVSETLTWS_DOT, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} }
-emit_evsetltws_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_evsetltws_dot_r_r_r(dst, src, src2)) }
+emit_evsetltws_dot_r_r_r                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append_elem(instructions, inst_evsetltws_dot_r_r_r(dst, src, src2)) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/ppc/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/ppc/tools/gen_mnemonic_builders.odin
index e27b21154..aff8398f4 100644
--- a/core/rexcode/isa/ppc/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/ppc/tools/gen_mnemonic_builders.odin
@@ -364,7 +364,7 @@ generate_inst_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
 	strings.write_string(sb, " }\n")
 }
 
-// emit_<mnem>_<suffix> :: #force_inline proc(instructions, params) { append(instructions, inst_<...>(args)) }
+// emit_<mnem>_<suffix> :: #force_inline proc(instructions, params) { append_elem(instructions, inst_<...>(args)) }
 generate_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
 	ops := entry.ops
 	names := param_names(ops[:entry.count])
@@ -380,7 +380,7 @@ generate_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
 		strings.write_string(sb, ": ")
 		strings.write_string(sb, op_param_type(entry.ops[i]))
 	}
-	strings.write_string(sb, ") { append(instructions, ")
+	strings.write_string(sb, ") { append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_string(sb, "(")
 	for i in 0..<entry.count {
diff --git a/core/rexcode/isa/ppc_vle/mnemonic_builders.odin b/core/rexcode/isa/ppc_vle/mnemonic_builders.odin
index a60caa834..cbb211937 100644
--- a/core/rexcode/isa/ppc_vle/mnemonic_builders.odin
+++ b/core/rexcode/isa/ppc_vle/mnemonic_builders.odin
@@ -20,449 +20,449 @@ package rexcode_ppc_vle
 // =============================================================================
 
 inst_se_illegal_none      :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_ILLEGAL, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_illegal_none      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_illegal_none()) }
+emit_se_illegal_none      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_illegal_none()) }
 inst_se_isync_none        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_ISYNC, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_isync_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_isync_none()) }
+emit_se_isync_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_isync_none()) }
 inst_se_sc_none           :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_SC, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_sc_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_sc_none()) }
+emit_se_sc_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_sc_none()) }
 inst_se_blr_none          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_BLR, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_blr_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_blr_none()) }
+emit_se_blr_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_blr_none()) }
 inst_se_blrl_none         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_BLRL, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_blrl_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_blrl_none()) }
+emit_se_blrl_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_blrl_none()) }
 inst_se_bctr_none         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_BCTR, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_bctr_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_bctr_none()) }
+emit_se_bctr_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_bctr_none()) }
 inst_se_bctrl_none        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_BCTRL, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_bctrl_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_bctrl_none()) }
+emit_se_bctrl_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_bctrl_none()) }
 inst_se_rfi_none          :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_RFI, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_rfi_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_rfi_none()) }
+emit_se_rfi_none          :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_rfi_none()) }
 inst_se_rfci_none         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_RFCI, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_rfci_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_rfci_none()) }
+emit_se_rfci_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_rfci_none()) }
 inst_se_rfdi_none         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_RFDI, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_rfdi_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_rfdi_none()) }
+emit_se_rfdi_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_rfdi_none()) }
 inst_se_rfmci_none        :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_RFMCI, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_rfmci_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_rfmci_none()) }
+emit_se_rfmci_none        :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_rfmci_none()) }
 inst_se_rfgi_none         :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .SE_RFGI, operand_count = 0, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {{}, {}, {}, {}}} }
-emit_se_rfgi_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_se_rfgi_none()) }
+emit_se_rfgi_none         :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_se_rfgi_none()) }
 inst_se_not_r             :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_NOT, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_not_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_not_r(rd)) }
+emit_se_not_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_not_r(rd)) }
 inst_se_neg_r             :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_NEG, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_neg_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_neg_r(rd)) }
+emit_se_neg_r             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_neg_r(rd)) }
 inst_se_mflr_r            :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_MFLR, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_mflr_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_mflr_r(rd)) }
+emit_se_mflr_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_mflr_r(rd)) }
 inst_se_mtlr_r            :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_MTLR, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_mtlr_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_mtlr_r(rd)) }
+emit_se_mtlr_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_mtlr_r(rd)) }
 inst_se_mfctr_r           :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_MFCTR, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_mfctr_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_mfctr_r(rd)) }
+emit_se_mfctr_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_mfctr_r(rd)) }
 inst_se_mtctr_r           :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_MTCTR, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_mtctr_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_mtctr_r(rd)) }
+emit_se_mtctr_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_mtctr_r(rd)) }
 inst_se_extzb_r           :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_EXTZB, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_extzb_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_extzb_r(rd)) }
+emit_se_extzb_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_extzb_r(rd)) }
 inst_se_extsb_r           :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_EXTSB, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_extsb_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_extsb_r(rd)) }
+emit_se_extsb_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_extsb_r(rd)) }
 inst_se_extzh_r           :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_EXTZH, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_extzh_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_extzh_r(rd)) }
+emit_se_extzh_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_extzh_r(rd)) }
 inst_se_extsh_r           :: #force_inline proc "contextless" (rd: Register) -> Instruction { return Instruction{mnemonic = .SE_EXTSH, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), {}, {}, {}}} }
-emit_se_extsh_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append(instructions, inst_se_extsh_r(rd)) }
+emit_se_extsh_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register) { append_elem(instructions, inst_se_extsh_r(rd)) }
 inst_se_mr_r_r            :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_MR, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_mr_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_mr_r_r(rd, r2)) }
+emit_se_mr_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_mr_r_r(rd, r2)) }
 inst_se_mtar_r_r          :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_MTAR, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_mtar_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_mtar_r_r(rd, r2)) }
+emit_se_mtar_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_mtar_r_r(rd, r2)) }
 inst_se_mfar_r_r          :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_MFAR, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_mfar_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_mfar_r_r(rd, r2)) }
+emit_se_mfar_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_mfar_r_r(rd, r2)) }
 inst_se_add_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_ADD, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_add_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_add_r_r(rd, r2)) }
+emit_se_add_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_add_r_r(rd, r2)) }
 inst_se_mullw_r_r         :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_MULLW, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_mullw_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_mullw_r_r(rd, r2)) }
+emit_se_mullw_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_mullw_r_r(rd, r2)) }
 inst_se_sub_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_SUB, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_sub_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_sub_r_r(rd, r2)) }
+emit_se_sub_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_sub_r_r(rd, r2)) }
 inst_se_subf_r_r          :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_SUBF, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_subf_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_subf_r_r(rd, r2)) }
+emit_se_subf_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_subf_r_r(rd, r2)) }
 inst_se_cmp_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_CMP, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_cmp_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_cmp_r_r(rd, r2)) }
+emit_se_cmp_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_cmp_r_r(rd, r2)) }
 inst_se_cmpl_r_r          :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_CMPL, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_cmpl_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_cmpl_r_r(rd, r2)) }
+emit_se_cmpl_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_cmpl_r_r(rd, r2)) }
 inst_se_cmph_r_r          :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_CMPH, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_cmph_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_cmph_r_r(rd, r2)) }
+emit_se_cmph_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_cmph_r_r(rd, r2)) }
 inst_se_cmphl_r_r         :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_CMPHL, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_cmphl_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_cmphl_r_r(rd, r2)) }
+emit_se_cmphl_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_cmphl_r_r(rd, r2)) }
 inst_se_srw_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_SRW, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_srw_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_srw_r_r(rd, r2)) }
+emit_se_srw_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_srw_r_r(rd, r2)) }
 inst_se_sraw_r_r          :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_SRAW, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_sraw_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_sraw_r_r(rd, r2)) }
+emit_se_sraw_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_sraw_r_r(rd, r2)) }
 inst_se_slw_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_SLW, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_slw_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_slw_r_r(rd, r2)) }
+emit_se_slw_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_slw_r_r(rd, r2)) }
 inst_se_or_r_r            :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_OR, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_or_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_or_r_r(rd, r2)) }
+emit_se_or_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_or_r_r(rd, r2)) }
 inst_se_andc_r_r          :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_ANDC, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_andc_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_andc_r_r(rd, r2)) }
+emit_se_andc_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_andc_r_r(rd, r2)) }
 inst_se_and_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_AND, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_and_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_and_r_r(rd, r2)) }
+emit_se_and_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_and_r_r(rd, r2)) }
 inst_se_and_dot_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_AND_DOT, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_and_dot_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_and_dot_r_r(rd, r2)) }
+emit_se_and_dot_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_and_dot_r_r(rd, r2)) }
 inst_se_addi_r_imm        :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_ADDI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_addi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_addi_r_imm(rd, imm)) }
+emit_se_addi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_addi_r_imm(rd, imm)) }
 inst_se_cmpli_r_imm       :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_CMPLI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_cmpli_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_cmpli_r_imm(rd, imm)) }
+emit_se_cmpli_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_cmpli_r_imm(rd, imm)) }
 inst_se_subi_r_imm        :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_SUBI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_subi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_subi_r_imm(rd, imm)) }
+emit_se_subi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_subi_r_imm(rd, imm)) }
 inst_se_subi_dot_r_imm    :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_SUBI_DOT, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_subi_dot_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_subi_dot_r_imm(rd, imm)) }
+emit_se_subi_dot_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_subi_dot_r_imm(rd, imm)) }
 inst_se_cmpi_r_imm        :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_CMPI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_cmpi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_cmpi_r_imm(rd, imm)) }
+emit_se_cmpi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_cmpi_r_imm(rd, imm)) }
 inst_se_bmaski_r_imm      :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_BMASKI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_bmaski_r_imm      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_bmaski_r_imm(rd, imm)) }
+emit_se_bmaski_r_imm      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_bmaski_r_imm(rd, imm)) }
 inst_se_andi_r_imm        :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_ANDI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_andi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_andi_r_imm(rd, imm)) }
+emit_se_andi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_andi_r_imm(rd, imm)) }
 inst_se_nop_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .SE_NOP, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_se_nop_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_se_nop_r_r(rd, r2)) }
+emit_se_nop_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_se_nop_r_r(rd, r2)) }
 inst_se_li_r_imm          :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_LI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_li_r_imm          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_li_r_imm(rd, imm)) }
+emit_se_li_r_imm          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_li_r_imm(rd, imm)) }
 inst_se_bclri_r_imm       :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_BCLRI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_bclri_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_bclri_r_imm(rd, imm)) }
+emit_se_bclri_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_bclri_r_imm(rd, imm)) }
 inst_se_bgeni_r_imm       :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_BGENI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_bgeni_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_bgeni_r_imm(rd, imm)) }
+emit_se_bgeni_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_bgeni_r_imm(rd, imm)) }
 inst_se_bseti_r_imm       :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_BSETI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_bseti_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_bseti_r_imm(rd, imm)) }
+emit_se_bseti_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_bseti_r_imm(rd, imm)) }
 inst_se_btsti_r_imm       :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_BTSTI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_btsti_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_btsti_r_imm(rd, imm)) }
+emit_se_btsti_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_btsti_r_imm(rd, imm)) }
 inst_se_srwi_r_imm        :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_SRWI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_srwi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_srwi_r_imm(rd, imm)) }
+emit_se_srwi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_srwi_r_imm(rd, imm)) }
 inst_se_srawi_r_imm       :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_SRAWI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_srawi_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_srawi_r_imm(rd, imm)) }
+emit_se_srawi_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_srawi_r_imm(rd, imm)) }
 inst_se_slwi_r_imm        :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .SE_SLWI, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_se_slwi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_se_slwi_r_imm(rd, imm)) }
+emit_se_slwi_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_se_slwi_r_imm(rd, imm)) }
 inst_se_lbz_r_mem         :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SE_LBZ, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_se_lbz_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_se_lbz_r_mem(rd, mem)) }
+emit_se_lbz_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_se_lbz_r_mem(rd, mem)) }
 inst_se_stb_r_mem         :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SE_STB, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_se_stb_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_se_stb_r_mem(rd, mem)) }
+emit_se_stb_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_se_stb_r_mem(rd, mem)) }
 inst_se_lhz_r_mem         :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SE_LHZ, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_se_lhz_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_se_lhz_r_mem(rd, mem)) }
+emit_se_lhz_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_se_lhz_r_mem(rd, mem)) }
 inst_se_sth_r_mem         :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SE_STH, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_se_sth_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_se_sth_r_mem(rd, mem)) }
+emit_se_sth_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_se_sth_r_mem(rd, mem)) }
 inst_se_lwz_r_mem         :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SE_LWZ, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_se_lwz_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_se_lwz_r_mem(rd, mem)) }
+emit_se_lwz_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_se_lwz_r_mem(rd, mem)) }
 inst_se_stw_r_mem         :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .SE_STW, operand_count = 2, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_se_stw_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_se_stw_r_mem(rd, mem)) }
+emit_se_stw_r_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_se_stw_r_mem(rd, mem)) }
 inst_se_bge_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BGE, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bge_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bge_rel(target)) }
+emit_se_bge_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bge_rel(target)) }
 inst_se_bnl_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BNL, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bnl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bnl_rel(target)) }
+emit_se_bnl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bnl_rel(target)) }
 inst_se_ble_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BLE, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_ble_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_ble_rel(target)) }
+emit_se_ble_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_ble_rel(target)) }
 inst_se_bng_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BNG, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bng_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bng_rel(target)) }
+emit_se_bng_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bng_rel(target)) }
 inst_se_bne_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BNE, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bne_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bne_rel(target)) }
+emit_se_bne_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bne_rel(target)) }
 inst_se_bns_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BNS, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bns_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bns_rel(target)) }
+emit_se_bns_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bns_rel(target)) }
 inst_se_bnu_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BNU, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bnu_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bnu_rel(target)) }
+emit_se_bnu_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bnu_rel(target)) }
 inst_se_bf_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BF, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bf_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bf_rel(target)) }
+emit_se_bf_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bf_rel(target)) }
 inst_se_blt_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BLT, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_blt_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_blt_rel(target)) }
+emit_se_blt_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_blt_rel(target)) }
 inst_se_bgt_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BGT, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bgt_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bgt_rel(target)) }
+emit_se_bgt_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bgt_rel(target)) }
 inst_se_beq_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BEQ, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_beq_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_beq_rel(target)) }
+emit_se_beq_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_beq_rel(target)) }
 inst_se_bso_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BSO, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bso_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bso_rel(target)) }
+emit_se_bso_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bso_rel(target)) }
 inst_se_bun_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BUN, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bun_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bun_rel(target)) }
+emit_se_bun_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bun_rel(target)) }
 inst_se_bt_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BT, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bt_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bt_rel(target)) }
+emit_se_bt_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bt_rel(target)) }
 inst_se_bc_bo_crb_rel     :: #force_inline proc "contextless" (imm: i64, imm2: i64, target: u32) -> Instruction { return Instruction{mnemonic = .SE_BC, operand_count = 3, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), op_label(target), {}}} }
-emit_se_bc_bo_crb_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64, target: u32) { append(instructions, inst_se_bc_bo_crb_rel(imm, imm2, target)) }
+emit_se_bc_bo_crb_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64, target: u32) { append_elem(instructions, inst_se_bc_bo_crb_rel(imm, imm2, target)) }
 inst_se_b_rel             :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_B, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_b_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_b_rel(target)) }
+emit_se_b_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_b_rel(target)) }
 inst_se_bl_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .SE_BL, operand_count = 1, length = 2, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_se_bl_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_se_bl_rel(target)) }
+emit_se_bl_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_se_bl_rel(target)) }
 inst_e_lbzu_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LBZU, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lbzu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lbzu_r_r(rd, r2)) }
+emit_e_lbzu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lbzu_r_r(rd, r2)) }
 inst_e_lhau_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LHAU, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lhau_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lhau_r_r(rd, r2)) }
+emit_e_lhau_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lhau_r_r(rd, r2)) }
 inst_e_lhzu_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LHZU, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lhzu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lhzu_r_r(rd, r2)) }
+emit_e_lhzu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lhzu_r_r(rd, r2)) }
 inst_e_lmw_r_r            :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LMW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lmw_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lmw_r_r(rd, r2)) }
+emit_e_lmw_r_r            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lmw_r_r(rd, r2)) }
 inst_e_lwzu_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LWZU, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lwzu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lwzu_r_r(rd, r2)) }
+emit_e_lwzu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lwzu_r_r(rd, r2)) }
 inst_e_stbu_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STBU, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stbu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stbu_r_r(rd, r2)) }
+emit_e_stbu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stbu_r_r(rd, r2)) }
 inst_e_sthu_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STHU, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_sthu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_sthu_r_r(rd, r2)) }
+emit_e_sthu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_sthu_r_r(rd, r2)) }
 inst_e_stwu_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STWU, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stwu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stwu_r_r(rd, r2)) }
+emit_e_stwu_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stwu_r_r(rd, r2)) }
 inst_e_stmw_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STMW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stmw_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stmw_r_r(rd, r2)) }
+emit_e_stmw_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stmw_r_r(rd, r2)) }
 inst_e_lmvgprw_r_r        :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LMVGPRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lmvgprw_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lmvgprw_r_r(rd, r2)) }
+emit_e_lmvgprw_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lmvgprw_r_r(rd, r2)) }
 inst_e_ldmvgprw_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LDMVGPRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_ldmvgprw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_ldmvgprw_r_r(rd, r2)) }
+emit_e_ldmvgprw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_ldmvgprw_r_r(rd, r2)) }
 inst_e_stmvgprw_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STMVGPRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stmvgprw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stmvgprw_r_r(rd, r2)) }
+emit_e_stmvgprw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stmvgprw_r_r(rd, r2)) }
 inst_e_lmvsprw_r_r        :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LMVSPRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lmvsprw_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lmvsprw_r_r(rd, r2)) }
+emit_e_lmvsprw_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lmvsprw_r_r(rd, r2)) }
 inst_e_ldmvsprw_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LDMVSPRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_ldmvsprw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_ldmvsprw_r_r(rd, r2)) }
+emit_e_ldmvsprw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_ldmvsprw_r_r(rd, r2)) }
 inst_e_stmvsprw_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STMVSPRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stmvsprw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stmvsprw_r_r(rd, r2)) }
+emit_e_stmvsprw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stmvsprw_r_r(rd, r2)) }
 inst_e_lmvsrrw_r_r        :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LMVSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lmvsrrw_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lmvsrrw_r_r(rd, r2)) }
+emit_e_lmvsrrw_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lmvsrrw_r_r(rd, r2)) }
 inst_e_ldmvsrrw_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LDMVSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_ldmvsrrw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_ldmvsrrw_r_r(rd, r2)) }
+emit_e_ldmvsrrw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_ldmvsrrw_r_r(rd, r2)) }
 inst_e_stmvsrrw_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STMVSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stmvsrrw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stmvsrrw_r_r(rd, r2)) }
+emit_e_stmvsrrw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stmvsrrw_r_r(rd, r2)) }
 inst_e_lmvcsrrw_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LMVCSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lmvcsrrw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lmvcsrrw_r_r(rd, r2)) }
+emit_e_lmvcsrrw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lmvcsrrw_r_r(rd, r2)) }
 inst_e_ldmvcsrrw_r_r      :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LDMVCSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_ldmvcsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_ldmvcsrrw_r_r(rd, r2)) }
+emit_e_ldmvcsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_ldmvcsrrw_r_r(rd, r2)) }
 inst_e_stmvcsrrw_r_r      :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STMVCSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stmvcsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stmvcsrrw_r_r(rd, r2)) }
+emit_e_stmvcsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stmvcsrrw_r_r(rd, r2)) }
 inst_e_lmvdsrrw_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LMVDSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lmvdsrrw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lmvdsrrw_r_r(rd, r2)) }
+emit_e_lmvdsrrw_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lmvdsrrw_r_r(rd, r2)) }
 inst_e_ldmvdsrrw_r_r      :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LDMVDSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_ldmvdsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_ldmvdsrrw_r_r(rd, r2)) }
+emit_e_ldmvdsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_ldmvdsrrw_r_r(rd, r2)) }
 inst_e_stmvdsrrw_r_r      :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STMVDSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stmvdsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stmvdsrrw_r_r(rd, r2)) }
+emit_e_stmvdsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stmvdsrrw_r_r(rd, r2)) }
 inst_e_lmvmcsrrw_r_r      :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_LMVMCSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_lmvmcsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_lmvmcsrrw_r_r(rd, r2)) }
+emit_e_lmvmcsrrw_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_lmvmcsrrw_r_r(rd, r2)) }
 inst_e_stmvmcsrrw_r_r     :: #force_inline proc "contextless" (rd: Register, r2: Register) -> Instruction { return Instruction{mnemonic = .E_STMVMCSRRW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), {}, {}}} }
-emit_e_stmvmcsrrw_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append(instructions, inst_e_stmvmcsrrw_r_r(rd, r2)) }
+emit_e_stmvmcsrrw_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register) { append_elem(instructions, inst_e_stmvmcsrrw_r_r(rd, r2)) }
 inst_e_add16i_r_r_imm     :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ADD16I, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_add16i_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_add16i_r_r_imm(rd, r2, imm)) }
+emit_e_add16i_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_add16i_r_r_imm(rd, r2, imm)) }
 inst_e_la_r_mem           :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .E_LA, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_e_la_r_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_e_la_r_mem(rd, mem)) }
+emit_e_la_r_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_e_la_r_mem(rd, mem)) }
 inst_e_sub16i_r_r_imm     :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_SUB16I, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_sub16i_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_sub16i_r_r_imm(rd, r2, imm)) }
+emit_e_sub16i_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_sub16i_r_r_imm(rd, r2, imm)) }
 inst_e_lbz_r_mem          :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .E_LBZ, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_e_lbz_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_e_lbz_r_mem(rd, mem)) }
+emit_e_lbz_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_e_lbz_r_mem(rd, mem)) }
 inst_e_stb_r_mem          :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .E_STB, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_e_stb_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_e_stb_r_mem(rd, mem)) }
+emit_e_stb_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_e_stb_r_mem(rd, mem)) }
 inst_e_lha_r_mem          :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .E_LHA, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_e_lha_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_e_lha_r_mem(rd, mem)) }
+emit_e_lha_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_e_lha_r_mem(rd, mem)) }
 inst_e_lwz_r_mem          :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .E_LWZ, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_e_lwz_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_e_lwz_r_mem(rd, mem)) }
+emit_e_lwz_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_e_lwz_r_mem(rd, mem)) }
 inst_e_stw_r_mem          :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .E_STW, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_e_stw_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_e_stw_r_mem(rd, mem)) }
+emit_e_stw_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_e_stw_r_mem(rd, mem)) }
 inst_e_lhz_r_mem          :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .E_LHZ, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_e_lhz_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_e_lhz_r_mem(rd, mem)) }
+emit_e_lhz_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_e_lhz_r_mem(rd, mem)) }
 inst_e_sth_r_mem          :: #force_inline proc "contextless" (rd: Register, mem: Memory) -> Instruction { return Instruction{mnemonic = .E_STH, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_mem(mem), {}, {}}} }
-emit_e_sth_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append(instructions, inst_e_sth_r_mem(rd, mem)) }
+emit_e_sth_r_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, mem: Memory) { append_elem(instructions, inst_e_sth_r_mem(rd, mem)) }
 inst_e_rlwimi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_RLWIMI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_rlwimi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_rlwimi_r_r_r(rd, r2, r3)) }
+emit_e_rlwimi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_rlwimi_r_r_r(rd, r2, r3)) }
 inst_e_inslwi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_INSLWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_inslwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_inslwi_r_r_r(rd, r2, r3)) }
+emit_e_inslwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_inslwi_r_r_r(rd, r2, r3)) }
 inst_e_insrwi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_INSRWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_insrwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_insrwi_r_r_r(rd, r2, r3)) }
+emit_e_insrwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_insrwi_r_r_r(rd, r2, r3)) }
 inst_e_rotlwi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_ROTLWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_rotlwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_rotlwi_r_r_r(rd, r2, r3)) }
+emit_e_rotlwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_rotlwi_r_r_r(rd, r2, r3)) }
 inst_e_rotrwi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_ROTRWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_rotrwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_rotrwi_r_r_r(rd, r2, r3)) }
+emit_e_rotrwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_rotrwi_r_r_r(rd, r2, r3)) }
 inst_e_clrlwi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_CLRLWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_clrlwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_clrlwi_r_r_r(rd, r2, r3)) }
+emit_e_clrlwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_clrlwi_r_r_r(rd, r2, r3)) }
 inst_e_clrrwi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_CLRRWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_clrrwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_clrrwi_r_r_r(rd, r2, r3)) }
+emit_e_clrrwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_clrrwi_r_r_r(rd, r2, r3)) }
 inst_e_rlwinm_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_RLWINM, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_rlwinm_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_rlwinm_r_r_r(rd, r2, r3)) }
+emit_e_rlwinm_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_rlwinm_r_r_r(rd, r2, r3)) }
 inst_e_extlwi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_EXTLWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_extlwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_extlwi_r_r_r(rd, r2, r3)) }
+emit_e_extlwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_extlwi_r_r_r(rd, r2, r3)) }
 inst_e_extrwi_r_r_r       :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_EXTRWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_extrwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_extrwi_r_r_r(rd, r2, r3)) }
+emit_e_extrwi_r_r_r       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_extrwi_r_r_r(rd, r2, r3)) }
 inst_e_clrlslwi_r_r_r     :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_CLRLSLWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_clrlslwi_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_clrlslwi_r_r_r(rd, r2, r3)) }
+emit_e_clrlslwi_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_clrlslwi_r_r_r(rd, r2, r3)) }
 inst_e_cmph_r_r_r         :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_CMPH, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_cmph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_cmph_r_r_r(rd, r2, r3)) }
+emit_e_cmph_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_cmph_r_r_r(rd, r2, r3)) }
 inst_e_sc_r_r_r           :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_SC, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_sc_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_sc_r_r_r(rd, r2, r3)) }
+emit_e_sc_r_r_r           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_sc_r_r_r(rd, r2, r3)) }
 inst_e_cmphl_r_r_r        :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_CMPHL, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_cmphl_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_cmphl_r_r_r(rd, r2, r3)) }
+emit_e_cmphl_r_r_r        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_cmphl_r_r_r(rd, r2, r3)) }
 inst_e_crandc_bo_crb      :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRANDC, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crandc_bo_crb      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crandc_bo_crb(imm, imm2)) }
+emit_e_crandc_bo_crb      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crandc_bo_crb(imm, imm2)) }
 inst_e_crnand_bo_crb      :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRNAND, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crnand_bo_crb      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crnand_bo_crb(imm, imm2)) }
+emit_e_crnand_bo_crb      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crnand_bo_crb(imm, imm2)) }
 inst_e_crnot_bo_crb       :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRNOT, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crnot_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crnot_bo_crb(imm, imm2)) }
+emit_e_crnot_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crnot_bo_crb(imm, imm2)) }
 inst_e_crnor_bo_crb       :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRNOR, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crnor_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crnor_bo_crb(imm, imm2)) }
+emit_e_crnor_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crnor_bo_crb(imm, imm2)) }
 inst_e_crclr_bo_crb       :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRCLR, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crclr_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crclr_bo_crb(imm, imm2)) }
+emit_e_crclr_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crclr_bo_crb(imm, imm2)) }
 inst_e_crxor_bo_crb       :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRXOR, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crxor_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crxor_bo_crb(imm, imm2)) }
+emit_e_crxor_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crxor_bo_crb(imm, imm2)) }
 inst_e_mcrf_bo_crb        :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_MCRF, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_mcrf_bo_crb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_mcrf_bo_crb(imm, imm2)) }
+emit_e_mcrf_bo_crb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_mcrf_bo_crb(imm, imm2)) }
 inst_e_slwi_r_r_r         :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_SLWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_slwi_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_slwi_r_r_r(rd, r2, r3)) }
+emit_e_slwi_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_slwi_r_r_r(rd, r2, r3)) }
 inst_e_slwi_dot_r_r_r     :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_SLWI_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_slwi_dot_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_slwi_dot_r_r_r(rd, r2, r3)) }
+emit_e_slwi_dot_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_slwi_dot_r_r_r(rd, r2, r3)) }
 inst_e_crand_bo_crb       :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRAND, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crand_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crand_bo_crb(imm, imm2)) }
+emit_e_crand_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crand_bo_crb(imm, imm2)) }
 inst_e_rlw_r_r_r          :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_RLW, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_rlw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_rlw_r_r_r(rd, r2, r3)) }
+emit_e_rlw_r_r_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_rlw_r_r_r(rd, r2, r3)) }
 inst_e_rlw_dot_r_r_r      :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_RLW_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_rlw_dot_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_rlw_dot_r_r_r(rd, r2, r3)) }
+emit_e_rlw_dot_r_r_r      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_rlw_dot_r_r_r(rd, r2, r3)) }
 inst_e_crset_bo_crb       :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRSET, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crset_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crset_bo_crb(imm, imm2)) }
+emit_e_crset_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crset_bo_crb(imm, imm2)) }
 inst_e_creqv_bo_crb       :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CREQV, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_creqv_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_creqv_bo_crb(imm, imm2)) }
+emit_e_creqv_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_creqv_bo_crb(imm, imm2)) }
 inst_e_rlwi_r_r_r         :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_RLWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_rlwi_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_rlwi_r_r_r(rd, r2, r3)) }
+emit_e_rlwi_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_rlwi_r_r_r(rd, r2, r3)) }
 inst_e_rlwi_dot_r_r_r     :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_RLWI_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_rlwi_dot_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_rlwi_dot_r_r_r(rd, r2, r3)) }
+emit_e_rlwi_dot_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_rlwi_dot_r_r_r(rd, r2, r3)) }
 inst_e_crorc_bo_crb       :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRORC, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crorc_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crorc_bo_crb(imm, imm2)) }
+emit_e_crorc_bo_crb       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crorc_bo_crb(imm, imm2)) }
 inst_e_crmove_bo_crb      :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CRMOVE, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_crmove_bo_crb      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_crmove_bo_crb(imm, imm2)) }
+emit_e_crmove_bo_crb      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_crmove_bo_crb(imm, imm2)) }
 inst_e_cror_bo_crb        :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .E_CROR, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), {}, {}}} }
-emit_e_cror_bo_crb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_e_cror_bo_crb(imm, imm2)) }
+emit_e_cror_bo_crb        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_e_cror_bo_crb(imm, imm2)) }
 inst_e_srwi_r_r_r         :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_SRWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_srwi_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_srwi_r_r_r(rd, r2, r3)) }
+emit_e_srwi_r_r_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_srwi_r_r_r(rd, r2, r3)) }
 inst_e_srwi_dot_r_r_r     :: #force_inline proc "contextless" (rd: Register, r2: Register, r3: Register) -> Instruction { return Instruction{mnemonic = .E_SRWI_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_reg(r3), {}}} }
-emit_e_srwi_dot_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append(instructions, inst_e_srwi_dot_r_r_r(rd, r2, r3)) }
+emit_e_srwi_dot_r_r_r     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, r3: Register) { append_elem(instructions, inst_e_srwi_dot_r_r_r(rd, r2, r3)) }
 inst_e_bdnz_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BDNZ, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bdnz_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bdnz_rel(target)) }
+emit_e_bdnz_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bdnz_rel(target)) }
 inst_e_bdnzl_rel          :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BDNZL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bdnzl_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bdnzl_rel(target)) }
+emit_e_bdnzl_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bdnzl_rel(target)) }
 inst_e_bdz_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BDZ, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bdz_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bdz_rel(target)) }
+emit_e_bdz_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bdz_rel(target)) }
 inst_e_bdzl_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BDZL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bdzl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bdzl_rel(target)) }
+emit_e_bdzl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bdzl_rel(target)) }
 inst_e_cmpi_crf_r_imm     :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_CMPI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_cmpi_crf_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_cmpi_crf_r_imm(rd, r2, imm)) }
+emit_e_cmpi_crf_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_cmpi_crf_r_imm(rd, r2, imm)) }
 inst_e_cmpwi_crf_r_imm    :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_CMPWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_cmpwi_crf_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_cmpwi_crf_r_imm(rd, r2, imm)) }
+emit_e_cmpwi_crf_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_cmpwi_crf_r_imm(rd, r2, imm)) }
 inst_e_cmpli_crf_r_imm    :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_CMPLI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_cmpli_crf_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_cmpli_crf_r_imm(rd, r2, imm)) }
+emit_e_cmpli_crf_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_cmpli_crf_r_imm(rd, r2, imm)) }
 inst_e_cmplwi_crf_r_imm   :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_CMPLWI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_cmplwi_crf_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_cmplwi_crf_r_imm(rd, r2, imm)) }
+emit_e_cmplwi_crf_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_cmplwi_crf_r_imm(rd, r2, imm)) }
 inst_e_addi_r_r_imm       :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ADDI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_addi_r_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_addi_r_r_imm(rd, r2, imm)) }
+emit_e_addi_r_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_addi_r_r_imm(rd, r2, imm)) }
 inst_e_subi_r_r_imm       :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_SUBI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_subi_r_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_subi_r_r_imm(rd, r2, imm)) }
+emit_e_subi_r_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_subi_r_r_imm(rd, r2, imm)) }
 inst_e_addi_dot_r_r_imm   :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ADDI_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_addi_dot_r_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_addi_dot_r_r_imm(rd, r2, imm)) }
+emit_e_addi_dot_r_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_addi_dot_r_r_imm(rd, r2, imm)) }
 inst_e_addic_r_r_imm      :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ADDIC, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_addic_r_r_imm      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_addic_r_r_imm(rd, r2, imm)) }
+emit_e_addic_r_r_imm      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_addic_r_r_imm(rd, r2, imm)) }
 inst_e_subic_r_r_imm      :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_SUBIC, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_subic_r_r_imm      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_subic_r_r_imm(rd, r2, imm)) }
+emit_e_subic_r_r_imm      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_subic_r_r_imm(rd, r2, imm)) }
 inst_e_addic_dot_r_r_imm  :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ADDIC_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_addic_dot_r_r_imm  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_addic_dot_r_r_imm(rd, r2, imm)) }
+emit_e_addic_dot_r_r_imm  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_addic_dot_r_r_imm(rd, r2, imm)) }
 inst_e_subic_dot_r_r_imm  :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_SUBIC_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_subic_dot_r_r_imm  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_subic_dot_r_r_imm(rd, r2, imm)) }
+emit_e_subic_dot_r_r_imm  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_subic_dot_r_r_imm(rd, r2, imm)) }
 inst_e_mulli_r_r_imm      :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_MULLI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_mulli_r_r_imm      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_mulli_r_r_imm(rd, r2, imm)) }
+emit_e_mulli_r_r_imm      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_mulli_r_r_imm(rd, r2, imm)) }
 inst_e_subfic_r_r_imm     :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_SUBFIC, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_subfic_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_subfic_r_r_imm(rd, r2, imm)) }
+emit_e_subfic_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_subfic_r_r_imm(rd, r2, imm)) }
 inst_e_subfic_dot_r_r_imm :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_SUBFIC_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_subfic_dot_r_r_imm :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_subfic_dot_r_r_imm(rd, r2, imm)) }
+emit_e_subfic_dot_r_r_imm :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_subfic_dot_r_r_imm(rd, r2, imm)) }
 inst_e_andi_r_r_imm       :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ANDI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_andi_r_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_andi_r_r_imm(rd, r2, imm)) }
+emit_e_andi_r_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_andi_r_r_imm(rd, r2, imm)) }
 inst_e_andi_dot_r_r_imm   :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ANDI_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_andi_dot_r_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_andi_dot_r_r_imm(rd, r2, imm)) }
+emit_e_andi_dot_r_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_andi_dot_r_r_imm(rd, r2, imm)) }
 inst_e_nop_r_r_imm        :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_NOP, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_nop_r_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_nop_r_r_imm(rd, r2, imm)) }
+emit_e_nop_r_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_nop_r_r_imm(rd, r2, imm)) }
 inst_e_ori_r_r_imm        :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ORI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_ori_r_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_ori_r_r_imm(rd, r2, imm)) }
+emit_e_ori_r_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_ori_r_r_imm(rd, r2, imm)) }
 inst_e_ori_dot_r_r_imm    :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ORI_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_ori_dot_r_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_ori_dot_r_r_imm(rd, r2, imm)) }
+emit_e_ori_dot_r_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_ori_dot_r_r_imm(rd, r2, imm)) }
 inst_e_xori_r_r_imm       :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_XORI, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_xori_r_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_xori_r_r_imm(rd, r2, imm)) }
+emit_e_xori_r_r_imm       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_xori_r_r_imm(rd, r2, imm)) }
 inst_e_xori_dot_r_r_imm   :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_XORI_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_xori_dot_r_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_xori_dot_r_r_imm(rd, r2, imm)) }
+emit_e_xori_dot_r_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_xori_dot_r_r_imm(rd, r2, imm)) }
 inst_e_lis_r_imm          :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_LIS, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_e_lis_r_imm          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_e_lis_r_imm(rd, imm)) }
+emit_e_lis_r_imm          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_e_lis_r_imm(rd, imm)) }
 inst_e_and2is_dot_r_imm   :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_AND2IS_DOT, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_e_and2is_dot_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_e_and2is_dot_r_imm(rd, imm)) }
+emit_e_and2is_dot_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_e_and2is_dot_r_imm(rd, imm)) }
 inst_e_or2is_r_imm        :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_OR2IS, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_e_or2is_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_e_or2is_r_imm(rd, imm)) }
+emit_e_or2is_r_imm        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_e_or2is_r_imm(rd, imm)) }
 inst_e_and2i_dot_r_imm    :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_AND2I_DOT, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_e_and2i_dot_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_e_and2i_dot_r_imm(rd, imm)) }
+emit_e_and2i_dot_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_e_and2i_dot_r_imm(rd, imm)) }
 inst_e_or2i_r_imm         :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_OR2I, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_e_or2i_r_imm         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_e_or2i_r_imm(rd, imm)) }
+emit_e_or2i_r_imm         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_e_or2i_r_imm(rd, imm)) }
 inst_e_cmphl16i_r_r_imm   :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_CMPHL16I, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_cmphl16i_r_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_cmphl16i_r_r_imm(rd, r2, imm)) }
+emit_e_cmphl16i_r_r_imm   :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_cmphl16i_r_r_imm(rd, r2, imm)) }
 inst_e_cmph16i_r_r_imm    :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_CMPH16I, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_cmph16i_r_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_cmph16i_r_r_imm(rd, r2, imm)) }
+emit_e_cmph16i_r_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_cmph16i_r_r_imm(rd, r2, imm)) }
 inst_e_cmpl16i_r_r_imm    :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_CMPL16I, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_cmpl16i_r_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_cmpl16i_r_r_imm(rd, r2, imm)) }
+emit_e_cmpl16i_r_r_imm    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_cmpl16i_r_r_imm(rd, r2, imm)) }
 inst_e_mull2i_r_r_imm     :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_MULL2I, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_mull2i_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_mull2i_r_r_imm(rd, r2, imm)) }
+emit_e_mull2i_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_mull2i_r_r_imm(rd, r2, imm)) }
 inst_e_cmp16i_r_r_imm     :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_CMP16I, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_cmp16i_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_cmp16i_r_r_imm(rd, r2, imm)) }
+emit_e_cmp16i_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_cmp16i_r_r_imm(rd, r2, imm)) }
 inst_e_sub2is_r_r_imm     :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_SUB2IS, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_sub2is_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_sub2is_r_r_imm(rd, r2, imm)) }
+emit_e_sub2is_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_sub2is_r_r_imm(rd, r2, imm)) }
 inst_e_add2is_r_r_imm     :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ADD2IS, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_add2is_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_add2is_r_r_imm(rd, r2, imm)) }
+emit_e_add2is_r_r_imm     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_add2is_r_r_imm(rd, r2, imm)) }
 inst_e_sub2i_dot_r_r_imm  :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_SUB2I_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_sub2i_dot_r_r_imm  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_sub2i_dot_r_r_imm(rd, r2, imm)) }
+emit_e_sub2i_dot_r_r_imm  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_sub2i_dot_r_r_imm(rd, r2, imm)) }
 inst_e_add2i_dot_r_r_imm  :: #force_inline proc "contextless" (rd: Register, r2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_ADD2I_DOT, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_reg(r2), op_imm(imm), {}}} }
-emit_e_add2i_dot_r_r_imm  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append(instructions, inst_e_add2i_dot_r_r_imm(rd, r2, imm)) }
+emit_e_add2i_dot_r_r_imm  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, r2: Register, imm: i64) { append_elem(instructions, inst_e_add2i_dot_r_r_imm(rd, r2, imm)) }
 inst_e_li_r_imm           :: #force_inline proc "contextless" (rd: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .E_LI, operand_count = 2, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_reg(rd), op_imm(imm), {}, {}}} }
-emit_e_li_r_imm           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append(instructions, inst_e_li_r_imm(rd, imm)) }
+emit_e_li_r_imm           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: Register, imm: i64) { append_elem(instructions, inst_e_li_r_imm(rd, imm)) }
 inst_e_b_rel              :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_B, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_b_rel              :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_b_rel(target)) }
+emit_e_b_rel              :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_b_rel(target)) }
 inst_e_bl_rel             :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bl_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bl_rel(target)) }
+emit_e_bl_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bl_rel(target)) }
 inst_e_bge_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BGE, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bge_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bge_rel(target)) }
+emit_e_bge_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bge_rel(target)) }
 inst_e_bgel_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BGEL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bgel_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bgel_rel(target)) }
+emit_e_bgel_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bgel_rel(target)) }
 inst_e_bnl_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bnl_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bnl_rel(target)) }
+emit_e_bnl_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bnl_rel(target)) }
 inst_e_bnll_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNLL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bnll_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bnll_rel(target)) }
+emit_e_bnll_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bnll_rel(target)) }
 inst_e_blt_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BLT, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_blt_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_blt_rel(target)) }
+emit_e_blt_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_blt_rel(target)) }
 inst_e_bltl_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BLTL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bltl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bltl_rel(target)) }
+emit_e_bltl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bltl_rel(target)) }
 inst_e_bgt_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BGT, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bgt_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bgt_rel(target)) }
+emit_e_bgt_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bgt_rel(target)) }
 inst_e_bgtl_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BGTL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bgtl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bgtl_rel(target)) }
+emit_e_bgtl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bgtl_rel(target)) }
 inst_e_ble_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BLE, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_ble_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_ble_rel(target)) }
+emit_e_ble_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_ble_rel(target)) }
 inst_e_blel_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BLEL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_blel_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_blel_rel(target)) }
+emit_e_blel_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_blel_rel(target)) }
 inst_e_bng_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNG, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bng_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bng_rel(target)) }
+emit_e_bng_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bng_rel(target)) }
 inst_e_bngl_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNGL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bngl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bngl_rel(target)) }
+emit_e_bngl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bngl_rel(target)) }
 inst_e_bne_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNE, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bne_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bne_rel(target)) }
+emit_e_bne_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bne_rel(target)) }
 inst_e_bnel_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNEL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bnel_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bnel_rel(target)) }
+emit_e_bnel_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bnel_rel(target)) }
 inst_e_beq_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BEQ, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_beq_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_beq_rel(target)) }
+emit_e_beq_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_beq_rel(target)) }
 inst_e_beql_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BEQL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_beql_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_beql_rel(target)) }
+emit_e_beql_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_beql_rel(target)) }
 inst_e_bso_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BSO, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bso_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bso_rel(target)) }
+emit_e_bso_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bso_rel(target)) }
 inst_e_bsol_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BSOL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bsol_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bsol_rel(target)) }
+emit_e_bsol_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bsol_rel(target)) }
 inst_e_bun_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BUN, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bun_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bun_rel(target)) }
+emit_e_bun_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bun_rel(target)) }
 inst_e_bunl_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BUNL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bunl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bunl_rel(target)) }
+emit_e_bunl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bunl_rel(target)) }
 inst_e_bns_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNS, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bns_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bns_rel(target)) }
+emit_e_bns_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bns_rel(target)) }
 inst_e_bnsl_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNSL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bnsl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bnsl_rel(target)) }
+emit_e_bnsl_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bnsl_rel(target)) }
 inst_e_bnu_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNU, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bnu_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bnu_rel(target)) }
+emit_e_bnu_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bnu_rel(target)) }
 inst_e_bnul_rel           :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BNUL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bnul_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bnul_rel(target)) }
+emit_e_bnul_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bnul_rel(target)) }
 inst_e_bc_bo_crb_rel      :: #force_inline proc "contextless" (imm: i64, imm2: i64, target: u32) -> Instruction { return Instruction{mnemonic = .E_BC, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), op_label(target), {}}} }
-emit_e_bc_bo_crb_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64, target: u32) { append(instructions, inst_e_bc_bo_crb_rel(imm, imm2, target)) }
+emit_e_bc_bo_crb_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64, target: u32) { append_elem(instructions, inst_e_bc_bo_crb_rel(imm, imm2, target)) }
 inst_e_bcl_bo_crb_rel     :: #force_inline proc "contextless" (imm: i64, imm2: i64, target: u32) -> Instruction { return Instruction{mnemonic = .E_BCL, operand_count = 3, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_imm(imm), op_imm(imm2), op_label(target), {}}} }
-emit_e_bcl_bo_crb_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64, target: u32) { append(instructions, inst_e_bcl_bo_crb_rel(imm, imm2, target)) }
+emit_e_bcl_bo_crb_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64, target: u32) { append_elem(instructions, inst_e_bcl_bo_crb_rel(imm, imm2, target)) }
 inst_e_bf_rel             :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BF, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bf_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bf_rel(target)) }
+emit_e_bf_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bf_rel(target)) }
 inst_e_bfl_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BFL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bfl_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bfl_rel(target)) }
+emit_e_bfl_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bfl_rel(target)) }
 inst_e_bt_rel             :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BT, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_bt_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_bt_rel(target)) }
+emit_e_bt_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_bt_rel(target)) }
 inst_e_btl_rel            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .E_BTL, operand_count = 1, length = 4, mode = .PPC32_VLE, form_id = 1, ops = {op_label(target), {}, {}, {}}} }
-emit_e_btl_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_e_btl_rel(target)) }
+emit_e_btl_rel            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append_elem(instructions, inst_e_btl_rel(target)) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/ppc_vle/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/ppc_vle/tools/gen_mnemonic_builders.odin
index 3c31564e4..3cdc45efb 100644
--- a/core/rexcode/isa/ppc_vle/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/ppc_vle/tools/gen_mnemonic_builders.odin
@@ -420,7 +420,7 @@ generate_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, max_name_pad
 		strings.write_string(sb, ": ")
 		strings.write_string(sb, operand_odin_type(entry.sig.types[i]))
 	}
-	strings.write_string(sb, ") { append(instructions, ")
+	strings.write_string(sb, ") { append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_string(sb, "(")
 	for i in 0..<entry.sig.count {
diff --git a/core/rexcode/isa/riscv/mnemonic_builders.odin b/core/rexcode/isa/riscv/mnemonic_builders.odin
index c02e23bbb..a1793e6f2 100644
--- a/core/rexcode/isa/riscv/mnemonic_builders.odin
+++ b/core/rexcode/isa/riscv/mnemonic_builders.odin
@@ -21,393 +21,567 @@ package rexcode_riscv
 // =============================================================================
 
 inst_lui_gpr_imm20            :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .LUI, operand_count = 2, length = 4, ops = {op_gpr(rd), op_imm(imm, 4), {}, {}}} }
-emit_lui_gpr_imm20            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_lui_gpr_imm20(rd, imm)) }
+emit_lui_gpr_imm20            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_lui_gpr_imm20(rd, imm)) }
 inst_auipc_gpr_imm20          :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .AUIPC, operand_count = 2, length = 4, ops = {op_gpr(rd), op_imm(imm, 4), {}, {}}} }
-emit_auipc_gpr_imm20          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_auipc_gpr_imm20(rd, imm)) }
+emit_auipc_gpr_imm20          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_auipc_gpr_imm20(rd, imm)) }
 inst_jal_gpr_label            :: #force_inline proc "contextless" (rd: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .JAL, operand_count = 2, length = 4, ops = {op_gpr(rd), op_label(label, 4), {}, {}}} }
-emit_jal_gpr_label            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, label: u32) { append(instructions, inst_jal_gpr_label(rd, label)) }
+emit_jal_gpr_label            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, label: u32) { append_elem(instructions, inst_jal_gpr_label(rd, label)) }
 inst_jalr_gpr_gpr_imm12       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .JALR, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_jalr_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_jalr_gpr_gpr_imm12(rd, rs1, imm)) }
+emit_jalr_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_jalr_gpr_gpr_imm12(rd, rs1, imm)) }
 inst_beq_gpr_gpr_label        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .BEQ, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_label(label, 2), {}}} }
-emit_beq_gpr_gpr_label        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append(instructions, inst_beq_gpr_gpr_label(rd, rs1, label)) }
+emit_beq_gpr_gpr_label        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append_elem(instructions, inst_beq_gpr_gpr_label(rd, rs1, label)) }
 inst_bne_gpr_gpr_label        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .BNE, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_label(label, 2), {}}} }
-emit_bne_gpr_gpr_label        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append(instructions, inst_bne_gpr_gpr_label(rd, rs1, label)) }
+emit_bne_gpr_gpr_label        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append_elem(instructions, inst_bne_gpr_gpr_label(rd, rs1, label)) }
 inst_blt_gpr_gpr_label        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .BLT, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_label(label, 2), {}}} }
-emit_blt_gpr_gpr_label        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append(instructions, inst_blt_gpr_gpr_label(rd, rs1, label)) }
+emit_blt_gpr_gpr_label        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append_elem(instructions, inst_blt_gpr_gpr_label(rd, rs1, label)) }
 inst_bge_gpr_gpr_label        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .BGE, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_label(label, 2), {}}} }
-emit_bge_gpr_gpr_label        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append(instructions, inst_bge_gpr_gpr_label(rd, rs1, label)) }
+emit_bge_gpr_gpr_label        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append_elem(instructions, inst_bge_gpr_gpr_label(rd, rs1, label)) }
 inst_bltu_gpr_gpr_label       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .BLTU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_label(label, 2), {}}} }
-emit_bltu_gpr_gpr_label       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append(instructions, inst_bltu_gpr_gpr_label(rd, rs1, label)) }
+emit_bltu_gpr_gpr_label       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append_elem(instructions, inst_bltu_gpr_gpr_label(rd, rs1, label)) }
 inst_bgeu_gpr_gpr_label       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .BGEU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_label(label, 2), {}}} }
-emit_bgeu_gpr_gpr_label       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append(instructions, inst_bgeu_gpr_gpr_label(rd, rs1, label)) }
+emit_bgeu_gpr_gpr_label       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, label: u32) { append_elem(instructions, inst_bgeu_gpr_gpr_label(rd, rs1, label)) }
 inst_lb_gpr_mem               :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LB, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_lb_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_lb_gpr_mem(rd, mem)) }
+emit_lb_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_lb_gpr_mem(rd, mem)) }
 inst_lh_gpr_mem               :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LH, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_lh_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_lh_gpr_mem(rd, mem)) }
+emit_lh_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_lh_gpr_mem(rd, mem)) }
 inst_lw_gpr_mem               :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LW, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_lw_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_lw_gpr_mem(rd, mem)) }
+emit_lw_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_lw_gpr_mem(rd, mem)) }
 inst_lbu_gpr_mem              :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LBU, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_lbu_gpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_lbu_gpr_mem(rd, mem)) }
+emit_lbu_gpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_lbu_gpr_mem(rd, mem)) }
 inst_lhu_gpr_mem              :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LHU, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_lhu_gpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_lhu_gpr_mem(rd, mem)) }
+emit_lhu_gpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_lhu_gpr_mem(rd, mem)) }
 inst_sb_gpr_mem               :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SB, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_sb_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_sb_gpr_mem(rd, mem)) }
+emit_sb_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_sb_gpr_mem(rd, mem)) }
 inst_sh_gpr_mem               :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SH, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_sh_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_sh_gpr_mem(rd, mem)) }
+emit_sh_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_sh_gpr_mem(rd, mem)) }
 inst_sw_gpr_mem               :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SW, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_sw_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_sw_gpr_mem(rd, mem)) }
+emit_sw_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_sw_gpr_mem(rd, mem)) }
 inst_lwu_gpr_mem              :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LWU, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_lwu_gpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_lwu_gpr_mem(rd, mem)) }
+emit_lwu_gpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_lwu_gpr_mem(rd, mem)) }
 inst_ld_gpr_mem               :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LD, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_ld_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_ld_gpr_mem(rd, mem)) }
+emit_ld_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_ld_gpr_mem(rd, mem)) }
 inst_sd_gpr_mem               :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SD, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_sd_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_sd_gpr_mem(rd, mem)) }
+emit_sd_gpr_mem               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_sd_gpr_mem(rd, mem)) }
 inst_addi_gpr_gpr_imm12       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_addi_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_addi_gpr_gpr_imm12(rd, rs1, imm)) }
+emit_addi_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_addi_gpr_gpr_imm12(rd, rs1, imm)) }
 inst_slti_gpr_gpr_imm12       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SLTI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_slti_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_slti_gpr_gpr_imm12(rd, rs1, imm)) }
+emit_slti_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_slti_gpr_gpr_imm12(rd, rs1, imm)) }
 inst_sltiu_gpr_gpr_imm12      :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SLTIU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_sltiu_gpr_gpr_imm12      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_sltiu_gpr_gpr_imm12(rd, rs1, imm)) }
+emit_sltiu_gpr_gpr_imm12      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_sltiu_gpr_gpr_imm12(rd, rs1, imm)) }
 inst_xori_gpr_gpr_imm12       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .XORI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_xori_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_xori_gpr_gpr_imm12(rd, rs1, imm)) }
+emit_xori_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_xori_gpr_gpr_imm12(rd, rs1, imm)) }
 inst_ori_gpr_gpr_imm12        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ORI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_ori_gpr_gpr_imm12        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_ori_gpr_gpr_imm12(rd, rs1, imm)) }
+emit_ori_gpr_gpr_imm12        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_ori_gpr_gpr_imm12(rd, rs1, imm)) }
 inst_andi_gpr_gpr_imm12       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ANDI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_andi_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_andi_gpr_gpr_imm12(rd, rs1, imm)) }
+emit_andi_gpr_gpr_imm12       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_andi_gpr_gpr_imm12(rd, rs1, imm)) }
 inst_slli_gpr_gpr_imm6        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SLLI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
-emit_slli_gpr_gpr_imm6        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_slli_gpr_gpr_imm6(rd, rs1, imm)) }
+emit_slli_gpr_gpr_imm6        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_slli_gpr_gpr_imm6(rd, rs1, imm)) }
 inst_srli_gpr_gpr_imm6        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SRLI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
-emit_srli_gpr_gpr_imm6        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_srli_gpr_gpr_imm6(rd, rs1, imm)) }
+emit_srli_gpr_gpr_imm6        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_srli_gpr_gpr_imm6(rd, rs1, imm)) }
 inst_srai_gpr_gpr_imm6        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SRAI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
-emit_srai_gpr_gpr_imm6        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_srai_gpr_gpr_imm6(rd, rs1, imm)) }
+emit_srai_gpr_gpr_imm6        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_srai_gpr_gpr_imm6(rd, rs1, imm)) }
 inst_addiw_gpr_gpr_imm12      :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .ADDIW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_addiw_gpr_gpr_imm12      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_addiw_gpr_gpr_imm12(rd, rs1, imm)) }
+emit_addiw_gpr_gpr_imm12      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_addiw_gpr_gpr_imm12(rd, rs1, imm)) }
 inst_slliw_gpr_gpr_imm5       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SLLIW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
-emit_slliw_gpr_gpr_imm5       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_slliw_gpr_gpr_imm5(rd, rs1, imm)) }
+emit_slliw_gpr_gpr_imm5       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_slliw_gpr_gpr_imm5(rd, rs1, imm)) }
 inst_srliw_gpr_gpr_imm5       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SRLIW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
-emit_srliw_gpr_gpr_imm5       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_srliw_gpr_gpr_imm5(rd, rs1, imm)) }
+emit_srliw_gpr_gpr_imm5       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_srliw_gpr_gpr_imm5(rd, rs1, imm)) }
 inst_sraiw_gpr_gpr_imm5       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SRAIW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
-emit_sraiw_gpr_gpr_imm5       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_sraiw_gpr_gpr_imm5(rd, rs1, imm)) }
+emit_sraiw_gpr_gpr_imm5       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_sraiw_gpr_gpr_imm5(rd, rs1, imm)) }
 inst_add_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .ADD, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_add_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_add_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_add_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_add_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_sub_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SUB, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_sub_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_sub_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_sub_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sub_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_sll_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SLL, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_sll_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_sll_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_sll_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sll_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_slt_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SLT, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_slt_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_slt_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_slt_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_slt_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_sltu_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SLTU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_sltu_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_sltu_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_sltu_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sltu_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_xor_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .XOR, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_xor_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_xor_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_xor_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_xor_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_srl_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SRL, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_srl_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_srl_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_srl_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_srl_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_sra_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SRA, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_sra_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_sra_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_sra_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sra_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_or_gpr_gpr_gpr           :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .OR, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_or_gpr_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_or_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_or_gpr_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_or_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_and_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .AND, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_and_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_and_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_and_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_and_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_addw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .ADDW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_addw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_addw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_addw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_addw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_subw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SUBW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_subw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_subw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_subw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_subw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_sllw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SLLW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_sllw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_sllw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_sllw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sllw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_srlw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SRLW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_srlw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_srlw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_srlw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_srlw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_sraw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SRAW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_sraw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_sraw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_sraw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sraw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_fence_fence_fence        :: #force_inline proc "contextless" (imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .FENCE, operand_count = 2, length = 4, ops = {op_imm(imm, 1), op_imm(imm2, 1), {}, {}}} }
-emit_fence_fence_fence        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append(instructions, inst_fence_fence_fence(imm, imm2)) }
+emit_fence_fence_fence        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) { append_elem(instructions, inst_fence_fence_fence(imm, imm2)) }
 inst_fence_i_none             :: #force_inline proc "contextless" () -> Instruction { return inst_none(.FENCE_I) }
-emit_fence_i_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fence_i_none()) }
+emit_fence_i_none             :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fence_i_none()) }
 inst_ecall_none               :: #force_inline proc "contextless" () -> Instruction { return inst_none(.ECALL) }
-emit_ecall_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ecall_none()) }
+emit_ecall_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ecall_none()) }
 inst_ebreak_none              :: #force_inline proc "contextless" () -> Instruction { return inst_none(.EBREAK) }
-emit_ebreak_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ebreak_none()) }
+emit_ebreak_none              :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ebreak_none()) }
 inst_csrrw_gpr_csr_gpr        :: #force_inline proc "contextless" (rd: GPR, imm: i64, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CSRRW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_imm(imm, 2), op_gpr(rs1), {}}} }
-emit_csrrw_gpr_csr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, rs1: GPR) { append(instructions, inst_csrrw_gpr_csr_gpr(rd, imm, rs1)) }
+emit_csrrw_gpr_csr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, rs1: GPR) { append_elem(instructions, inst_csrrw_gpr_csr_gpr(rd, imm, rs1)) }
 inst_csrrs_gpr_csr_gpr        :: #force_inline proc "contextless" (rd: GPR, imm: i64, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CSRRS, operand_count = 3, length = 4, ops = {op_gpr(rd), op_imm(imm, 2), op_gpr(rs1), {}}} }
-emit_csrrs_gpr_csr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, rs1: GPR) { append(instructions, inst_csrrs_gpr_csr_gpr(rd, imm, rs1)) }
+emit_csrrs_gpr_csr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, rs1: GPR) { append_elem(instructions, inst_csrrs_gpr_csr_gpr(rd, imm, rs1)) }
 inst_csrrc_gpr_csr_gpr        :: #force_inline proc "contextless" (rd: GPR, imm: i64, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CSRRC, operand_count = 3, length = 4, ops = {op_gpr(rd), op_imm(imm, 2), op_gpr(rs1), {}}} }
-emit_csrrc_gpr_csr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, rs1: GPR) { append(instructions, inst_csrrc_gpr_csr_gpr(rd, imm, rs1)) }
+emit_csrrc_gpr_csr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, rs1: GPR) { append_elem(instructions, inst_csrrc_gpr_csr_gpr(rd, imm, rs1)) }
 inst_csrrwi_gpr_csr_zimm5     :: #force_inline proc "contextless" (rd: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .CSRRWI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_imm(imm, 2), op_imm(imm2, 1), {}}} }
-emit_csrrwi_gpr_csr_zimm5     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, imm2: i64) { append(instructions, inst_csrrwi_gpr_csr_zimm5(rd, imm, imm2)) }
+emit_csrrwi_gpr_csr_zimm5     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_csrrwi_gpr_csr_zimm5(rd, imm, imm2)) }
 inst_csrrsi_gpr_csr_zimm5     :: #force_inline proc "contextless" (rd: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .CSRRSI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_imm(imm, 2), op_imm(imm2, 1), {}}} }
-emit_csrrsi_gpr_csr_zimm5     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, imm2: i64) { append(instructions, inst_csrrsi_gpr_csr_zimm5(rd, imm, imm2)) }
+emit_csrrsi_gpr_csr_zimm5     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_csrrsi_gpr_csr_zimm5(rd, imm, imm2)) }
 inst_csrrci_gpr_csr_zimm5     :: #force_inline proc "contextless" (rd: GPR, imm: i64, imm2: i64) -> Instruction { return Instruction{mnemonic = .CSRRCI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_imm(imm, 2), op_imm(imm2, 1), {}}} }
-emit_csrrci_gpr_csr_zimm5     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, imm2: i64) { append(instructions, inst_csrrci_gpr_csr_zimm5(rd, imm, imm2)) }
+emit_csrrci_gpr_csr_zimm5     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64, imm2: i64) { append_elem(instructions, inst_csrrci_gpr_csr_zimm5(rd, imm, imm2)) }
 inst_mul_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MUL, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_mul_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_mul_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_mul_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_mul_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_mulh_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MULH, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_mulh_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_mulh_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_mulh_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_mulh_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_mulhsu_gpr_gpr_gpr       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MULHSU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_mulhsu_gpr_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_mulhsu_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_mulhsu_gpr_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_mulhsu_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_mulhu_gpr_gpr_gpr        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MULHU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_mulhu_gpr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_mulhu_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_mulhu_gpr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_mulhu_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_div_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .DIV, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_div_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_div_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_div_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_div_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_divu_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .DIVU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_divu_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_divu_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_divu_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_divu_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_rem_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .REM, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_rem_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_rem_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_rem_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_rem_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_remu_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .REMU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_remu_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_remu_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_remu_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_remu_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_mulw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MULW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_mulw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_mulw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_mulw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_mulw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_divw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .DIVW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_divw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_divw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_divw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_divw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_divuw_gpr_gpr_gpr        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .DIVUW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_divuw_gpr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_divuw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_divuw_gpr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_divuw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_remw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .REMW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_remw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_remw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_remw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_remw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_remuw_gpr_gpr_gpr        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .REMUW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
-emit_remuw_gpr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append(instructions, inst_remuw_gpr_gpr_gpr(rd, rs1, rs2)) }
+emit_remuw_gpr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_remuw_gpr_gpr_gpr(rd, rs1, rs2)) }
 inst_lr_w_gpr_mem             :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LR_W, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_lr_w_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_lr_w_gpr_mem(rd, mem)) }
+emit_lr_w_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_lr_w_gpr_mem(rd, mem)) }
 inst_sc_w_gpr_gpr_mem         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SC_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_sc_w_gpr_gpr_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_sc_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_sc_w_gpr_gpr_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_sc_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoswap_w_gpr_gpr_mem    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOSWAP_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoswap_w_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoswap_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoswap_w_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoswap_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoadd_w_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOADD_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoadd_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoadd_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoadd_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoadd_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoxor_w_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOXOR_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoxor_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoxor_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoxor_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoxor_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoand_w_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOAND_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoand_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoand_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoand_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoand_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoor_w_gpr_gpr_mem      :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOOR_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoor_w_gpr_gpr_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoor_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoor_w_gpr_gpr_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoor_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amomin_w_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOMIN_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amomin_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amomin_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amomin_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amomin_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amomax_w_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOMAX_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amomax_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amomax_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amomax_w_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amomax_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amominu_w_gpr_gpr_mem    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOMINU_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amominu_w_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amominu_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amominu_w_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amominu_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amomaxu_w_gpr_gpr_mem    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOMAXU_W, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amomaxu_w_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amomaxu_w_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amomaxu_w_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amomaxu_w_gpr_gpr_mem(rd, rs1, mem)) }
 inst_lr_d_gpr_mem             :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .LR_D, operand_count = 2, length = 4, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_lr_d_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_lr_d_gpr_mem(rd, mem)) }
+emit_lr_d_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_lr_d_gpr_mem(rd, mem)) }
 inst_sc_d_gpr_gpr_mem         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .SC_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_sc_d_gpr_gpr_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_sc_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_sc_d_gpr_gpr_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_sc_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoswap_d_gpr_gpr_mem    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOSWAP_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoswap_d_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoswap_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoswap_d_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoswap_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoadd_d_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOADD_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoadd_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoadd_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoadd_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoadd_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoxor_d_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOXOR_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoxor_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoxor_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoxor_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoxor_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoand_d_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOAND_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoand_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoand_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoand_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoand_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amoor_d_gpr_gpr_mem      :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOOR_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amoor_d_gpr_gpr_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amoor_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amoor_d_gpr_gpr_mem      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amoor_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amomin_d_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOMIN_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amomin_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amomin_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amomin_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amomin_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amomax_d_gpr_gpr_mem     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOMAX_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amomax_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amomax_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amomax_d_gpr_gpr_mem     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amomax_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amominu_d_gpr_gpr_mem    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOMINU_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amominu_d_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amominu_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amominu_d_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amominu_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_amomaxu_d_gpr_gpr_mem    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .AMOMAXU_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_mem(mem), {}}} }
-emit_amomaxu_d_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append(instructions, inst_amomaxu_d_gpr_gpr_mem(rd, rs1, mem)) }
+emit_amomaxu_d_gpr_gpr_mem    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, mem: Memory) { append_elem(instructions, inst_amomaxu_d_gpr_gpr_mem(rd, rs1, mem)) }
 inst_flw_fpr_mem              :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .FLW, operand_count = 2, length = 4, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
-emit_flw_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append(instructions, inst_flw_fpr_mem(rd, mem)) }
+emit_flw_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_flw_fpr_mem(rd, mem)) }
 inst_fsw_fpr_mem              :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .FSW, operand_count = 2, length = 4, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
-emit_fsw_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append(instructions, inst_fsw_fpr_mem(rd, mem)) }
+emit_fsw_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_fsw_fpr_mem(rd, mem)) }
 inst_fmadd_s_fpr_fpr_fpr_fpr  :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FMADD_S, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
-emit_fmadd_s_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append(instructions, inst_fmadd_s_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+emit_fmadd_s_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fmadd_s_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
 inst_fmsub_s_fpr_fpr_fpr_fpr  :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FMSUB_S, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
-emit_fmsub_s_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append(instructions, inst_fmsub_s_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+emit_fmsub_s_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fmsub_s_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
 inst_fnmsub_s_fpr_fpr_fpr_fpr :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FNMSUB_S, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
-emit_fnmsub_s_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append(instructions, inst_fnmsub_s_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+emit_fnmsub_s_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fnmsub_s_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
 inst_fnmadd_s_fpr_fpr_fpr_fpr :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FNMADD_S, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
-emit_fnmadd_s_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append(instructions, inst_fnmadd_s_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+emit_fnmadd_s_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fnmadd_s_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
 inst_fadd_s_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FADD_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fadd_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fadd_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fadd_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fadd_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fsub_s_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSUB_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fsub_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fsub_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fsub_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsub_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fmul_s_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMUL_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fmul_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fmul_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fmul_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmul_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fdiv_s_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FDIV_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fdiv_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fdiv_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fdiv_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fdiv_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fsqrt_s_fpr_fpr          :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FSQRT_S, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fsqrt_s_fpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append(instructions, inst_fsqrt_s_fpr_fpr(rd, rs1)) }
+emit_fsqrt_s_fpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fsqrt_s_fpr_fpr(rd, rs1)) }
 inst_fsgnj_s_fpr_fpr_fpr      :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJ_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fsgnj_s_fpr_fpr_fpr      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fsgnj_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fsgnj_s_fpr_fpr_fpr      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnj_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fsgnjn_s_fpr_fpr_fpr     :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJN_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fsgnjn_s_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fsgnjn_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fsgnjn_s_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnjn_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fsgnjx_s_fpr_fpr_fpr     :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJX_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fsgnjx_s_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fsgnjx_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fsgnjx_s_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnjx_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fmin_s_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMIN_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fmin_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fmin_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fmin_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmin_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fmax_s_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMAX_S, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fmax_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fmax_s_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fmax_s_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmax_s_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fcvt_w_s_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_W_S, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_w_s_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fcvt_w_s_gpr_fpr(rd, rs1)) }
+emit_fcvt_w_s_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_w_s_gpr_fpr(rd, rs1)) }
 inst_fcvt_wu_s_gpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_WU_S, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_wu_s_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fcvt_wu_s_gpr_fpr(rd, rs1)) }
+emit_fcvt_wu_s_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_wu_s_gpr_fpr(rd, rs1)) }
 inst_fmv_x_w_gpr_fpr          :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FMV_X_W, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fmv_x_w_gpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fmv_x_w_gpr_fpr(rd, rs1)) }
+emit_fmv_x_w_gpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fmv_x_w_gpr_fpr(rd, rs1)) }
 inst_feq_s_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FEQ_S, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_feq_s_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append(instructions, inst_feq_s_gpr_fpr_fpr(rd, rs1, rs2)) }
+emit_feq_s_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_feq_s_gpr_fpr_fpr(rd, rs1, rs2)) }
 inst_flt_s_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FLT_S, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_flt_s_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append(instructions, inst_flt_s_gpr_fpr_fpr(rd, rs1, rs2)) }
+emit_flt_s_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_flt_s_gpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fle_s_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FLE_S, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fle_s_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fle_s_gpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fle_s_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fle_s_gpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fclass_s_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCLASS_S, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fclass_s_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fclass_s_gpr_fpr(rd, rs1)) }
+emit_fclass_s_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fclass_s_gpr_fpr(rd, rs1)) }
 inst_fcvt_s_w_fpr_gpr         :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_S_W, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fcvt_s_w_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fcvt_s_w_fpr_gpr(rd, rs1)) }
+emit_fcvt_s_w_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_s_w_fpr_gpr(rd, rs1)) }
 inst_fcvt_s_wu_fpr_gpr        :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_S_WU, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fcvt_s_wu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fcvt_s_wu_fpr_gpr(rd, rs1)) }
+emit_fcvt_s_wu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_s_wu_fpr_gpr(rd, rs1)) }
 inst_fmv_w_x_fpr_gpr          :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FMV_W_X, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fmv_w_x_fpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fmv_w_x_fpr_gpr(rd, rs1)) }
+emit_fmv_w_x_fpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fmv_w_x_fpr_gpr(rd, rs1)) }
 inst_fcvt_l_s_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_L_S, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_l_s_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fcvt_l_s_gpr_fpr(rd, rs1)) }
+emit_fcvt_l_s_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_l_s_gpr_fpr(rd, rs1)) }
 inst_fcvt_lu_s_gpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_LU_S, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_lu_s_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fcvt_lu_s_gpr_fpr(rd, rs1)) }
+emit_fcvt_lu_s_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_lu_s_gpr_fpr(rd, rs1)) }
 inst_fcvt_s_l_fpr_gpr         :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_S_L, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fcvt_s_l_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fcvt_s_l_fpr_gpr(rd, rs1)) }
+emit_fcvt_s_l_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_s_l_fpr_gpr(rd, rs1)) }
 inst_fcvt_s_lu_fpr_gpr        :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_S_LU, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fcvt_s_lu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fcvt_s_lu_fpr_gpr(rd, rs1)) }
+emit_fcvt_s_lu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_s_lu_fpr_gpr(rd, rs1)) }
 inst_fld_fpr_mem              :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .FLD, operand_count = 2, length = 4, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
-emit_fld_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append(instructions, inst_fld_fpr_mem(rd, mem)) }
+emit_fld_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_fld_fpr_mem(rd, mem)) }
 inst_fsd_fpr_mem              :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .FSD, operand_count = 2, length = 4, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
-emit_fsd_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append(instructions, inst_fsd_fpr_mem(rd, mem)) }
+emit_fsd_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_fsd_fpr_mem(rd, mem)) }
 inst_fmadd_d_fpr_fpr_fpr_fpr  :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FMADD_D, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
-emit_fmadd_d_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append(instructions, inst_fmadd_d_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+emit_fmadd_d_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fmadd_d_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
 inst_fmsub_d_fpr_fpr_fpr_fpr  :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FMSUB_D, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
-emit_fmsub_d_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append(instructions, inst_fmsub_d_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+emit_fmsub_d_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fmsub_d_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
 inst_fnmsub_d_fpr_fpr_fpr_fpr :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FNMSUB_D, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
-emit_fnmsub_d_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append(instructions, inst_fnmsub_d_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+emit_fnmsub_d_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fnmsub_d_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
 inst_fnmadd_d_fpr_fpr_fpr_fpr :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FNMADD_D, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
-emit_fnmadd_d_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append(instructions, inst_fnmadd_d_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+emit_fnmadd_d_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fnmadd_d_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
 inst_fadd_d_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FADD_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fadd_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fadd_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fadd_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fadd_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fsub_d_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSUB_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fsub_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fsub_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fsub_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsub_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fmul_d_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMUL_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fmul_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fmul_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fmul_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmul_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fdiv_d_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FDIV_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fdiv_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fdiv_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fdiv_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fdiv_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fsqrt_d_fpr_fpr          :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FSQRT_D, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fsqrt_d_fpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append(instructions, inst_fsqrt_d_fpr_fpr(rd, rs1)) }
+emit_fsqrt_d_fpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fsqrt_d_fpr_fpr(rd, rs1)) }
 inst_fsgnj_d_fpr_fpr_fpr      :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJ_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fsgnj_d_fpr_fpr_fpr      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fsgnj_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fsgnj_d_fpr_fpr_fpr      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnj_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fsgnjn_d_fpr_fpr_fpr     :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJN_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fsgnjn_d_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fsgnjn_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fsgnjn_d_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnjn_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fsgnjx_d_fpr_fpr_fpr     :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJX_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fsgnjx_d_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fsgnjx_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fsgnjx_d_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnjx_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fmin_d_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMIN_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fmin_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fmin_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fmin_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmin_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fmax_d_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMAX_D, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fmax_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fmax_d_fpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fmax_d_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmax_d_fpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fcvt_s_d_fpr_fpr         :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_S_D, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_s_d_fpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append(instructions, inst_fcvt_s_d_fpr_fpr(rd, rs1)) }
+emit_fcvt_s_d_fpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fcvt_s_d_fpr_fpr(rd, rs1)) }
 inst_fcvt_d_s_fpr_fpr         :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_D_S, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_d_s_fpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append(instructions, inst_fcvt_d_s_fpr_fpr(rd, rs1)) }
+emit_fcvt_d_s_fpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fcvt_d_s_fpr_fpr(rd, rs1)) }
 inst_feq_d_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FEQ_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_feq_d_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append(instructions, inst_feq_d_gpr_fpr_fpr(rd, rs1, rs2)) }
+emit_feq_d_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_feq_d_gpr_fpr_fpr(rd, rs1, rs2)) }
 inst_flt_d_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FLT_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_flt_d_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append(instructions, inst_flt_d_gpr_fpr_fpr(rd, rs1, rs2)) }
+emit_flt_d_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_flt_d_gpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fle_d_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FLE_D, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
-emit_fle_d_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append(instructions, inst_fle_d_gpr_fpr_fpr(rd, rs1, rs2)) }
+emit_fle_d_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fle_d_gpr_fpr_fpr(rd, rs1, rs2)) }
 inst_fclass_d_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCLASS_D, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fclass_d_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fclass_d_gpr_fpr(rd, rs1)) }
+emit_fclass_d_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fclass_d_gpr_fpr(rd, rs1)) }
 inst_fcvt_w_d_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_W_D, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_w_d_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fcvt_w_d_gpr_fpr(rd, rs1)) }
+emit_fcvt_w_d_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_w_d_gpr_fpr(rd, rs1)) }
 inst_fcvt_wu_d_gpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_WU_D, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_wu_d_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fcvt_wu_d_gpr_fpr(rd, rs1)) }
+emit_fcvt_wu_d_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_wu_d_gpr_fpr(rd, rs1)) }
 inst_fcvt_d_w_fpr_gpr         :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_D_W, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fcvt_d_w_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fcvt_d_w_fpr_gpr(rd, rs1)) }
+emit_fcvt_d_w_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_d_w_fpr_gpr(rd, rs1)) }
 inst_fcvt_d_wu_fpr_gpr        :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_D_WU, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fcvt_d_wu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fcvt_d_wu_fpr_gpr(rd, rs1)) }
+emit_fcvt_d_wu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_d_wu_fpr_gpr(rd, rs1)) }
 inst_fcvt_l_d_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_L_D, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_l_d_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fcvt_l_d_gpr_fpr(rd, rs1)) }
+emit_fcvt_l_d_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_l_d_gpr_fpr(rd, rs1)) }
 inst_fcvt_lu_d_gpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_LU_D, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fcvt_lu_d_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fcvt_lu_d_gpr_fpr(rd, rs1)) }
+emit_fcvt_lu_d_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_lu_d_gpr_fpr(rd, rs1)) }
 inst_fcvt_d_l_fpr_gpr         :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_D_L, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fcvt_d_l_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fcvt_d_l_fpr_gpr(rd, rs1)) }
+emit_fcvt_d_l_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_d_l_fpr_gpr(rd, rs1)) }
 inst_fcvt_d_lu_fpr_gpr        :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_D_LU, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fcvt_d_lu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fcvt_d_lu_fpr_gpr(rd, rs1)) }
+emit_fcvt_d_lu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_d_lu_fpr_gpr(rd, rs1)) }
 inst_fmv_x_d_gpr_fpr          :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FMV_X_D, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
-emit_fmv_x_d_gpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append(instructions, inst_fmv_x_d_gpr_fpr(rd, rs1)) }
+emit_fmv_x_d_gpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fmv_x_d_gpr_fpr(rd, rs1)) }
 inst_fmv_d_x_fpr_gpr          :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FMV_D_X, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
-emit_fmv_d_x_fpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append(instructions, inst_fmv_d_x_fpr_gpr(rd, rs1)) }
+emit_fmv_d_x_fpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fmv_d_x_fpr_gpr(rd, rs1)) }
 inst_c_nop_none               :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .C_NOP, operand_count = 0, length = 2} }
-emit_c_nop_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_c_nop_none()) }
+emit_c_nop_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_c_nop_none()) }
 inst_c_ebreak_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .C_EBREAK, operand_count = 0, length = 2} }
-emit_c_ebreak_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_c_ebreak_none()) }
+emit_c_ebreak_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_c_ebreak_none()) }
 inst_c_addi4spn_gpr_gpr_imm8u :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ADDI4SPN, operand_count = 3, length = 2, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 2), {}}} }
-emit_c_addi4spn_gpr_gpr_imm8u :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append(instructions, inst_c_addi4spn_gpr_gpr_imm8u(rd, rs1, imm)) }
+emit_c_addi4spn_gpr_gpr_imm8u :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_c_addi4spn_gpr_gpr_imm8u(rd, rs1, imm)) }
 inst_c_lw_gpr_mem             :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_LW, operand_count = 2, length = 2, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_c_lw_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_c_lw_gpr_mem(rd, mem)) }
+emit_c_lw_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_c_lw_gpr_mem(rd, mem)) }
 inst_c_ld_gpr_mem             :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_LD, operand_count = 2, length = 2, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_c_ld_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_c_ld_gpr_mem(rd, mem)) }
+emit_c_ld_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_c_ld_gpr_mem(rd, mem)) }
 inst_c_sw_gpr_mem             :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_SW, operand_count = 2, length = 2, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_c_sw_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_c_sw_gpr_mem(rd, mem)) }
+emit_c_sw_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_c_sw_gpr_mem(rd, mem)) }
 inst_c_sd_gpr_mem             :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_SD, operand_count = 2, length = 2, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_c_sd_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_c_sd_gpr_mem(rd, mem)) }
+emit_c_sd_gpr_mem             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_c_sd_gpr_mem(rd, mem)) }
+inst_c_flw_fpr_mem            :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_FLW, operand_count = 2, length = 2, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
+emit_c_flw_fpr_mem            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_c_flw_fpr_mem(rd, mem)) }
+inst_c_fsw_fpr_mem            :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_FSW, operand_count = 2, length = 2, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
+emit_c_fsw_fpr_mem            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_c_fsw_fpr_mem(rd, mem)) }
 inst_c_fld_fpr_mem            :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_FLD, operand_count = 2, length = 2, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
-emit_c_fld_fpr_mem            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append(instructions, inst_c_fld_fpr_mem(rd, mem)) }
+emit_c_fld_fpr_mem            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_c_fld_fpr_mem(rd, mem)) }
 inst_c_fsd_fpr_mem            :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_FSD, operand_count = 2, length = 2, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
-emit_c_fsd_fpr_mem            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append(instructions, inst_c_fsd_fpr_mem(rd, mem)) }
+emit_c_fsd_fpr_mem            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_c_fsd_fpr_mem(rd, mem)) }
 inst_c_addi_gpr_imm6s         :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ADDI, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_addi_gpr_imm6s         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_addi_gpr_imm6s(rd, imm)) }
+emit_c_addi_gpr_imm6s         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_addi_gpr_imm6s(rd, imm)) }
 inst_c_addiw_gpr_imm6s        :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ADDIW, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_addiw_gpr_imm6s        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_addiw_gpr_imm6s(rd, imm)) }
+emit_c_addiw_gpr_imm6s        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_addiw_gpr_imm6s(rd, imm)) }
 inst_c_li_gpr_imm6s           :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_LI, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_li_gpr_imm6s           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_li_gpr_imm6s(rd, imm)) }
+emit_c_li_gpr_imm6s           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_li_gpr_imm6s(rd, imm)) }
 inst_c_lui_gpr_imm18s         :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_LUI, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_lui_gpr_imm18s         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_lui_gpr_imm18s(rd, imm)) }
+emit_c_lui_gpr_imm18s         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_lui_gpr_imm18s(rd, imm)) }
 inst_c_addi16sp_gpr_imm10s    :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ADDI16SP, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_addi16sp_gpr_imm10s    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_addi16sp_gpr_imm10s(rd, imm)) }
+emit_c_addi16sp_gpr_imm10s    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_addi16sp_gpr_imm10s(rd, imm)) }
 inst_c_srli_gpr_imm6u         :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SRLI, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_srli_gpr_imm6u         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_srli_gpr_imm6u(rd, imm)) }
+emit_c_srli_gpr_imm6u         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_srli_gpr_imm6u(rd, imm)) }
 inst_c_srai_gpr_imm6u         :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SRAI, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_srai_gpr_imm6u         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_srai_gpr_imm6u(rd, imm)) }
+emit_c_srai_gpr_imm6u         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_srai_gpr_imm6u(rd, imm)) }
 inst_c_andi_gpr_imm6s         :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_ANDI, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_andi_gpr_imm6s         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_andi_gpr_imm6s(rd, imm)) }
+emit_c_andi_gpr_imm6s         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_andi_gpr_imm6s(rd, imm)) }
 inst_c_sub_gpr_gpr            :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .C_SUB, operand_count = 2, length = 2, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
-emit_c_sub_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append(instructions, inst_c_sub_gpr_gpr(rd, rs1)) }
+emit_c_sub_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_c_sub_gpr_gpr(rd, rs1)) }
 inst_c_xor_gpr_gpr            :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .C_XOR, operand_count = 2, length = 2, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
-emit_c_xor_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append(instructions, inst_c_xor_gpr_gpr(rd, rs1)) }
+emit_c_xor_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_c_xor_gpr_gpr(rd, rs1)) }
 inst_c_or_gpr_gpr             :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .C_OR, operand_count = 2, length = 2, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
-emit_c_or_gpr_gpr             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append(instructions, inst_c_or_gpr_gpr(rd, rs1)) }
+emit_c_or_gpr_gpr             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_c_or_gpr_gpr(rd, rs1)) }
 inst_c_and_gpr_gpr            :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .C_AND, operand_count = 2, length = 2, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
-emit_c_and_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append(instructions, inst_c_and_gpr_gpr(rd, rs1)) }
+emit_c_and_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_c_and_gpr_gpr(rd, rs1)) }
 inst_c_subw_gpr_gpr           :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .C_SUBW, operand_count = 2, length = 2, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
-emit_c_subw_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append(instructions, inst_c_subw_gpr_gpr(rd, rs1)) }
+emit_c_subw_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_c_subw_gpr_gpr(rd, rs1)) }
 inst_c_addw_gpr_gpr           :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .C_ADDW, operand_count = 2, length = 2, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
-emit_c_addw_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append(instructions, inst_c_addw_gpr_gpr(rd, rs1)) }
+emit_c_addw_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_c_addw_gpr_gpr(rd, rs1)) }
 inst_c_j_label                :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .C_J, operand_count = 1, length = 2, ops = {op_label(label, 4), {}, {}, {}}} }
-emit_c_j_label                :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_c_j_label(label)) }
+emit_c_j_label                :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_c_j_label(label)) }
 inst_c_jal_label              :: #force_inline proc "contextless" (label: u32) -> Instruction { return Instruction{mnemonic = .C_JAL, operand_count = 1, length = 2, ops = {op_label(label, 4), {}, {}, {}}} }
-emit_c_jal_label              :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append(instructions, inst_c_jal_label(label)) }
+emit_c_jal_label              :: #force_inline proc(instructions: ^[dynamic]Instruction, label: u32) { append_elem(instructions, inst_c_jal_label(label)) }
 inst_c_beqz_gpr_label         :: #force_inline proc "contextless" (rd: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .C_BEQZ, operand_count = 2, length = 2, ops = {op_gpr(rd), op_label(label, 2), {}, {}}} }
-emit_c_beqz_gpr_label         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, label: u32) { append(instructions, inst_c_beqz_gpr_label(rd, label)) }
+emit_c_beqz_gpr_label         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, label: u32) { append_elem(instructions, inst_c_beqz_gpr_label(rd, label)) }
 inst_c_bnez_gpr_label         :: #force_inline proc "contextless" (rd: GPR, label: u32) -> Instruction { return Instruction{mnemonic = .C_BNEZ, operand_count = 2, length = 2, ops = {op_gpr(rd), op_label(label, 2), {}, {}}} }
-emit_c_bnez_gpr_label         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, label: u32) { append(instructions, inst_c_bnez_gpr_label(rd, label)) }
+emit_c_bnez_gpr_label         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, label: u32) { append_elem(instructions, inst_c_bnez_gpr_label(rd, label)) }
 inst_c_slli_gpr_imm6u         :: #force_inline proc "contextless" (rd: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .C_SLLI, operand_count = 2, length = 2, ops = {op_gpr(rd), op_imm(imm, 2), {}, {}}} }
-emit_c_slli_gpr_imm6u         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append(instructions, inst_c_slli_gpr_imm6u(rd, imm)) }
+emit_c_slli_gpr_imm6u         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, imm: i64) { append_elem(instructions, inst_c_slli_gpr_imm6u(rd, imm)) }
 inst_c_lwsp_gpr_mem           :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_LWSP, operand_count = 2, length = 2, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_c_lwsp_gpr_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_c_lwsp_gpr_mem(rd, mem)) }
+emit_c_lwsp_gpr_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_c_lwsp_gpr_mem(rd, mem)) }
 inst_c_ldsp_gpr_mem           :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_LDSP, operand_count = 2, length = 2, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_c_ldsp_gpr_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_c_ldsp_gpr_mem(rd, mem)) }
+emit_c_ldsp_gpr_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_c_ldsp_gpr_mem(rd, mem)) }
 inst_c_swsp_gpr_mem           :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_SWSP, operand_count = 2, length = 2, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_c_swsp_gpr_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_c_swsp_gpr_mem(rd, mem)) }
+emit_c_swsp_gpr_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_c_swsp_gpr_mem(rd, mem)) }
 inst_c_sdsp_gpr_mem           :: #force_inline proc "contextless" (rd: GPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_SDSP, operand_count = 2, length = 2, ops = {op_gpr(rd), op_mem(mem), {}, {}}} }
-emit_c_sdsp_gpr_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append(instructions, inst_c_sdsp_gpr_mem(rd, mem)) }
+emit_c_sdsp_gpr_mem           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, mem: Memory) { append_elem(instructions, inst_c_sdsp_gpr_mem(rd, mem)) }
 inst_c_fldsp_fpr_mem          :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_FLDSP, operand_count = 2, length = 2, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
-emit_c_fldsp_fpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append(instructions, inst_c_fldsp_fpr_mem(rd, mem)) }
+emit_c_fldsp_fpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_c_fldsp_fpr_mem(rd, mem)) }
 inst_c_fsdsp_fpr_mem          :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_FSDSP, operand_count = 2, length = 2, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
-emit_c_fsdsp_fpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append(instructions, inst_c_fsdsp_fpr_mem(rd, mem)) }
+emit_c_fsdsp_fpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_c_fsdsp_fpr_mem(rd, mem)) }
 inst_c_jr_gpr                 :: #force_inline proc "contextless" (rd: GPR) -> Instruction { return Instruction{mnemonic = .C_JR, operand_count = 1, length = 2, ops = {op_gpr(rd), {}, {}, {}}} }
-emit_c_jr_gpr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR) { append(instructions, inst_c_jr_gpr(rd)) }
+emit_c_jr_gpr                 :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR) { append_elem(instructions, inst_c_jr_gpr(rd)) }
 inst_c_jalr_gpr               :: #force_inline proc "contextless" (rd: GPR) -> Instruction { return Instruction{mnemonic = .C_JALR, operand_count = 1, length = 2, ops = {op_gpr(rd), {}, {}, {}}} }
-emit_c_jalr_gpr               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR) { append(instructions, inst_c_jalr_gpr(rd)) }
+emit_c_jalr_gpr               :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR) { append_elem(instructions, inst_c_jalr_gpr(rd)) }
 inst_c_mv_gpr_gpr             :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .C_MV, operand_count = 2, length = 2, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
-emit_c_mv_gpr_gpr             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append(instructions, inst_c_mv_gpr_gpr(rd, rs1)) }
+emit_c_mv_gpr_gpr             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_c_mv_gpr_gpr(rd, rs1)) }
 inst_c_add_gpr_gpr            :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .C_ADD, operand_count = 2, length = 2, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
-emit_c_add_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append(instructions, inst_c_add_gpr_gpr(rd, rs1)) }
+emit_c_add_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_c_add_gpr_gpr(rd, rs1)) }
+inst_c_flwsp_fpr_mem          :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_FLWSP, operand_count = 2, length = 2, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
+emit_c_flwsp_fpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_c_flwsp_fpr_mem(rd, mem)) }
+inst_c_fswsp_fpr_mem          :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .C_FSWSP, operand_count = 2, length = 2, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
+emit_c_fswsp_fpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_c_fswsp_fpr_mem(rd, mem)) }
+inst_sh1add_gpr_gpr_gpr       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SH1ADD, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_sh1add_gpr_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sh1add_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_sh2add_gpr_gpr_gpr       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SH2ADD, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_sh2add_gpr_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sh2add_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_sh3add_gpr_gpr_gpr       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SH3ADD, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_sh3add_gpr_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sh3add_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_add_uw_gpr_gpr_gpr       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .ADD_UW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_add_uw_gpr_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_add_uw_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_sh1add_uw_gpr_gpr_gpr    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SH1ADD_UW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_sh1add_uw_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sh1add_uw_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_sh2add_uw_gpr_gpr_gpr    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SH2ADD_UW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_sh2add_uw_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sh2add_uw_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_sh3add_uw_gpr_gpr_gpr    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .SH3ADD_UW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_sh3add_uw_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_sh3add_uw_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_slli_uw_gpr_gpr_imm6     :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .SLLI_UW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
+emit_slli_uw_gpr_gpr_imm6     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_slli_uw_gpr_gpr_imm6(rd, rs1, imm)) }
+inst_andn_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .ANDN, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_andn_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_andn_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_orn_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .ORN, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_orn_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_orn_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_xnor_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .XNOR, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_xnor_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_xnor_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_clz_gpr_gpr              :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CLZ, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_clz_gpr_gpr              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_clz_gpr_gpr(rd, rs1)) }
+inst_ctz_gpr_gpr              :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CTZ, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_ctz_gpr_gpr              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_ctz_gpr_gpr(rd, rs1)) }
+inst_cpop_gpr_gpr             :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CPOP, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_cpop_gpr_gpr             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_cpop_gpr_gpr(rd, rs1)) }
+inst_sext_b_gpr_gpr           :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .SEXT_B, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_sext_b_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_sext_b_gpr_gpr(rd, rs1)) }
+inst_sext_h_gpr_gpr           :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .SEXT_H, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_sext_h_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_sext_h_gpr_gpr(rd, rs1)) }
+inst_zext_h_gpr_gpr           :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .ZEXT_H, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_zext_h_gpr_gpr           :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_zext_h_gpr_gpr(rd, rs1)) }
+inst_min_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MIN, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_min_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_min_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_minu_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MINU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_minu_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_minu_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_max_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MAX, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_max_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_max_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_maxu_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .MAXU, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_maxu_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_maxu_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_rol_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .ROL, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_rol_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_rol_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_ror_gpr_gpr_gpr          :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .ROR, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_ror_gpr_gpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_ror_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_rori_gpr_gpr_imm6        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .RORI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
+emit_rori_gpr_gpr_imm6        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_rori_gpr_gpr_imm6(rd, rs1, imm)) }
+inst_orc_b_gpr_gpr            :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .ORC_B, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_orc_b_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_orc_b_gpr_gpr(rd, rs1)) }
+inst_rev8_gpr_gpr             :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .REV8, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_rev8_gpr_gpr             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_rev8_gpr_gpr(rd, rs1)) }
+inst_clzw_gpr_gpr             :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CLZW, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_clzw_gpr_gpr             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_clzw_gpr_gpr(rd, rs1)) }
+inst_ctzw_gpr_gpr             :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CTZW, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_ctzw_gpr_gpr             :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_ctzw_gpr_gpr(rd, rs1)) }
+inst_cpopw_gpr_gpr            :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .CPOPW, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_cpopw_gpr_gpr            :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_cpopw_gpr_gpr(rd, rs1)) }
+inst_rolw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .ROLW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_rolw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_rolw_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_rorw_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .RORW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_rorw_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_rorw_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_roriw_gpr_gpr_imm5       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .RORIW, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
+emit_roriw_gpr_gpr_imm5       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_roriw_gpr_gpr_imm5(rd, rs1, imm)) }
+inst_clmul_gpr_gpr_gpr        :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .CLMUL, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_clmul_gpr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_clmul_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_clmulh_gpr_gpr_gpr       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .CLMULH, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_clmulh_gpr_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_clmulh_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_clmulr_gpr_gpr_gpr       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .CLMULR, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_clmulr_gpr_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_clmulr_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_bclr_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .BCLR, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_bclr_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_bclr_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_bclri_gpr_gpr_imm6       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .BCLRI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
+emit_bclri_gpr_gpr_imm6       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_bclri_gpr_gpr_imm6(rd, rs1, imm)) }
+inst_bext_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .BEXT, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_bext_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_bext_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_bexti_gpr_gpr_imm6       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .BEXTI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
+emit_bexti_gpr_gpr_imm6       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_bexti_gpr_gpr_imm6(rd, rs1, imm)) }
+inst_binv_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .BINV, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_binv_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_binv_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_binvi_gpr_gpr_imm6       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .BINVI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
+emit_binvi_gpr_gpr_imm6       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_binvi_gpr_gpr_imm6(rd, rs1, imm)) }
+inst_bset_gpr_gpr_gpr         :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .BSET, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_bset_gpr_gpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_bset_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_bseti_gpr_gpr_imm6       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .BSETI, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_imm(imm, 1), {}}} }
+emit_bseti_gpr_gpr_imm6       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, imm: i64) { append_elem(instructions, inst_bseti_gpr_gpr_imm6(rd, rs1, imm)) }
+inst_czero_eqz_gpr_gpr_gpr    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .CZERO_EQZ, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_czero_eqz_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_czero_eqz_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_czero_nez_gpr_gpr_gpr    :: #force_inline proc "contextless" (rd: GPR, rs1: GPR, rs2: GPR) -> Instruction { return Instruction{mnemonic = .CZERO_NEZ, operand_count = 3, length = 4, ops = {op_gpr(rd), op_gpr(rs1), op_gpr(rs2), {}}} }
+emit_czero_nez_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR, rs2: GPR) { append_elem(instructions, inst_czero_nez_gpr_gpr_gpr(rd, rs1, rs2)) }
+inst_flh_fpr_mem              :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .FLH, operand_count = 2, length = 4, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
+emit_flh_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_flh_fpr_mem(rd, mem)) }
+inst_fsh_fpr_mem              :: #force_inline proc "contextless" (rd: FPR, mem: Memory) -> Instruction { return Instruction{mnemonic = .FSH, operand_count = 2, length = 4, ops = {op_fpr(rd), op_mem(mem), {}, {}}} }
+emit_fsh_fpr_mem              :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, mem: Memory) { append_elem(instructions, inst_fsh_fpr_mem(rd, mem)) }
+inst_fmadd_h_fpr_fpr_fpr_fpr  :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FMADD_H, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
+emit_fmadd_h_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fmadd_h_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+inst_fmsub_h_fpr_fpr_fpr_fpr  :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FMSUB_H, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
+emit_fmsub_h_fpr_fpr_fpr_fpr  :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fmsub_h_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+inst_fnmsub_h_fpr_fpr_fpr_fpr :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FNMSUB_H, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
+emit_fnmsub_h_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fnmsub_h_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+inst_fnmadd_h_fpr_fpr_fpr_fpr :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) -> Instruction { return Instruction{mnemonic = .FNMADD_H, operand_count = 4, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), op_fpr(rs3)}} }
+emit_fnmadd_h_fpr_fpr_fpr_fpr :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR, rs3: FPR) { append_elem(instructions, inst_fnmadd_h_fpr_fpr_fpr_fpr(rd, rs1, rs2, rs3)) }
+inst_fadd_h_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FADD_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fadd_h_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fadd_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fsub_h_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSUB_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fsub_h_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsub_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fmul_h_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMUL_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fmul_h_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmul_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fdiv_h_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FDIV_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fdiv_h_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fdiv_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fsqrt_h_fpr_fpr          :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FSQRT_H, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fsqrt_h_fpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fsqrt_h_fpr_fpr(rd, rs1)) }
+inst_fsgnj_h_fpr_fpr_fpr      :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJ_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fsgnj_h_fpr_fpr_fpr      :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnj_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fsgnjn_h_fpr_fpr_fpr     :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJN_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fsgnjn_h_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnjn_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fsgnjx_h_fpr_fpr_fpr     :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FSGNJX_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fsgnjx_h_fpr_fpr_fpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fsgnjx_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fmin_h_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMIN_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fmin_h_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmin_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fmax_h_fpr_fpr_fpr       :: #force_inline proc "contextless" (rd: FPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FMAX_H, operand_count = 3, length = 4, ops = {op_fpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fmax_h_fpr_fpr_fpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fmax_h_fpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fcvt_w_h_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_W_H, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fcvt_w_h_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_w_h_gpr_fpr(rd, rs1)) }
+inst_fcvt_wu_h_gpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_WU_H, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fcvt_wu_h_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_wu_h_gpr_fpr(rd, rs1)) }
+inst_fcvt_l_h_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_L_H, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fcvt_l_h_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_l_h_gpr_fpr(rd, rs1)) }
+inst_fcvt_lu_h_gpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_LU_H, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fcvt_lu_h_gpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fcvt_lu_h_gpr_fpr(rd, rs1)) }
+inst_fcvt_h_w_fpr_gpr         :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_H_W, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
+emit_fcvt_h_w_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_h_w_fpr_gpr(rd, rs1)) }
+inst_fcvt_h_wu_fpr_gpr        :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_H_WU, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
+emit_fcvt_h_wu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_h_wu_fpr_gpr(rd, rs1)) }
+inst_fcvt_h_l_fpr_gpr         :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_H_L, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
+emit_fcvt_h_l_fpr_gpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_h_l_fpr_gpr(rd, rs1)) }
+inst_fcvt_h_lu_fpr_gpr        :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FCVT_H_LU, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
+emit_fcvt_h_lu_fpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fcvt_h_lu_fpr_gpr(rd, rs1)) }
+inst_fcvt_s_h_fpr_fpr         :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_S_H, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fcvt_s_h_fpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fcvt_s_h_fpr_fpr(rd, rs1)) }
+inst_fcvt_h_s_fpr_fpr         :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_H_S, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fcvt_h_s_fpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fcvt_h_s_fpr_fpr(rd, rs1)) }
+inst_fcvt_d_h_fpr_fpr         :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_D_H, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fcvt_d_h_fpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fcvt_d_h_fpr_fpr(rd, rs1)) }
+inst_fcvt_h_d_fpr_fpr         :: #force_inline proc "contextless" (rd: FPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCVT_H_D, operand_count = 2, length = 4, ops = {op_fpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fcvt_h_d_fpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: FPR) { append_elem(instructions, inst_fcvt_h_d_fpr_fpr(rd, rs1)) }
+inst_fmv_x_h_gpr_fpr          :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FMV_X_H, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fmv_x_h_gpr_fpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fmv_x_h_gpr_fpr(rd, rs1)) }
+inst_fmv_h_x_fpr_gpr          :: #force_inline proc "contextless" (rd: FPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .FMV_H_X, operand_count = 2, length = 4, ops = {op_fpr(rd), op_gpr(rs1), {}, {}}} }
+emit_fmv_h_x_fpr_gpr          :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: FPR, rs1: GPR) { append_elem(instructions, inst_fmv_h_x_fpr_gpr(rd, rs1)) }
+inst_fclass_h_gpr_fpr         :: #force_inline proc "contextless" (rd: GPR, rs1: FPR) -> Instruction { return Instruction{mnemonic = .FCLASS_H, operand_count = 2, length = 4, ops = {op_gpr(rd), op_fpr(rs1), {}, {}}} }
+emit_fclass_h_gpr_fpr         :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR) { append_elem(instructions, inst_fclass_h_gpr_fpr(rd, rs1)) }
+inst_feq_h_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FEQ_H, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_feq_h_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_feq_h_gpr_fpr_fpr(rd, rs1, rs2)) }
+inst_flt_h_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FLT_H, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_flt_h_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_flt_h_gpr_fpr_fpr(rd, rs1, rs2)) }
+inst_fle_h_gpr_fpr_fpr        :: #force_inline proc "contextless" (rd: GPR, rs1: FPR, rs2: FPR) -> Instruction { return Instruction{mnemonic = .FLE_H, operand_count = 3, length = 4, ops = {op_gpr(rd), op_fpr(rs1), op_fpr(rs2), {}}} }
+emit_fle_h_gpr_fpr_fpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: FPR, rs2: FPR) { append_elem(instructions, inst_fle_h_gpr_fpr_fpr(rd, rs1, rs2)) }
+inst_mret_none                :: #force_inline proc "contextless" () -> Instruction { return inst_none(.MRET) }
+emit_mret_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_mret_none()) }
+inst_sret_none                :: #force_inline proc "contextless" () -> Instruction { return inst_none(.SRET) }
+emit_sret_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sret_none()) }
+inst_wfi_none                 :: #force_inline proc "contextless" () -> Instruction { return inst_none(.WFI) }
+emit_wfi_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wfi_none()) }
+inst_sfence_vma_gpr_gpr       :: #force_inline proc "contextless" (rd: GPR, rs1: GPR) -> Instruction { return Instruction{mnemonic = .SFENCE_VMA, operand_count = 2, length = 4, ops = {op_gpr(rd), op_gpr(rs1), {}, {}}} }
+emit_sfence_vma_gpr_gpr       :: #force_inline proc(instructions: ^[dynamic]Instruction, rd: GPR, rs1: GPR) { append_elem(instructions, inst_sfence_vma_gpr_gpr(rd, rs1)) }
 
 // =============================================================================
 // Overload Groups
@@ -739,6 +913,10 @@ inst_c_sw                          :: inst_c_sw_gpr_mem
 emit_c_sw                          :: emit_c_sw_gpr_mem
 inst_c_sd                          :: inst_c_sd_gpr_mem
 emit_c_sd                          :: emit_c_sd_gpr_mem
+inst_c_flw                         :: inst_c_flw_fpr_mem
+emit_c_flw                         :: emit_c_flw_fpr_mem
+inst_c_fsw                         :: inst_c_fsw_fpr_mem
+emit_c_fsw                         :: emit_c_fsw_fpr_mem
 inst_c_fld                         :: inst_c_fld_fpr_mem
 emit_c_fld                         :: emit_c_fld_fpr_mem
 inst_c_fsd                         :: inst_c_fsd_fpr_mem
@@ -801,3 +979,173 @@ inst_c_mv                          :: inst_c_mv_gpr_gpr
 emit_c_mv                          :: emit_c_mv_gpr_gpr
 inst_c_add                         :: inst_c_add_gpr_gpr
 emit_c_add                         :: emit_c_add_gpr_gpr
+inst_c_flwsp                       :: inst_c_flwsp_fpr_mem
+emit_c_flwsp                       :: emit_c_flwsp_fpr_mem
+inst_c_fswsp                       :: inst_c_fswsp_fpr_mem
+emit_c_fswsp                       :: emit_c_fswsp_fpr_mem
+inst_sh1add                        :: inst_sh1add_gpr_gpr_gpr
+emit_sh1add                        :: emit_sh1add_gpr_gpr_gpr
+inst_sh2add                        :: inst_sh2add_gpr_gpr_gpr
+emit_sh2add                        :: emit_sh2add_gpr_gpr_gpr
+inst_sh3add                        :: inst_sh3add_gpr_gpr_gpr
+emit_sh3add                        :: emit_sh3add_gpr_gpr_gpr
+inst_add_uw                        :: inst_add_uw_gpr_gpr_gpr
+emit_add_uw                        :: emit_add_uw_gpr_gpr_gpr
+inst_sh1add_uw                     :: inst_sh1add_uw_gpr_gpr_gpr
+emit_sh1add_uw                     :: emit_sh1add_uw_gpr_gpr_gpr
+inst_sh2add_uw                     :: inst_sh2add_uw_gpr_gpr_gpr
+emit_sh2add_uw                     :: emit_sh2add_uw_gpr_gpr_gpr
+inst_sh3add_uw                     :: inst_sh3add_uw_gpr_gpr_gpr
+emit_sh3add_uw                     :: emit_sh3add_uw_gpr_gpr_gpr
+inst_slli_uw                       :: inst_slli_uw_gpr_gpr_imm6
+emit_slli_uw                       :: emit_slli_uw_gpr_gpr_imm6
+inst_andn                          :: inst_andn_gpr_gpr_gpr
+emit_andn                          :: emit_andn_gpr_gpr_gpr
+inst_orn                           :: inst_orn_gpr_gpr_gpr
+emit_orn                           :: emit_orn_gpr_gpr_gpr
+inst_xnor                          :: inst_xnor_gpr_gpr_gpr
+emit_xnor                          :: emit_xnor_gpr_gpr_gpr
+inst_clz                           :: inst_clz_gpr_gpr
+emit_clz                           :: emit_clz_gpr_gpr
+inst_ctz                           :: inst_ctz_gpr_gpr
+emit_ctz                           :: emit_ctz_gpr_gpr
+inst_cpop                          :: inst_cpop_gpr_gpr
+emit_cpop                          :: emit_cpop_gpr_gpr
+inst_sext_b                        :: inst_sext_b_gpr_gpr
+emit_sext_b                        :: emit_sext_b_gpr_gpr
+inst_sext_h                        :: inst_sext_h_gpr_gpr
+emit_sext_h                        :: emit_sext_h_gpr_gpr
+inst_zext_h                        :: inst_zext_h_gpr_gpr
+emit_zext_h                        :: emit_zext_h_gpr_gpr
+inst_min                           :: inst_min_gpr_gpr_gpr
+emit_min                           :: emit_min_gpr_gpr_gpr
+inst_minu                          :: inst_minu_gpr_gpr_gpr
+emit_minu                          :: emit_minu_gpr_gpr_gpr
+inst_max                           :: inst_max_gpr_gpr_gpr
+emit_max                           :: emit_max_gpr_gpr_gpr
+inst_maxu                          :: inst_maxu_gpr_gpr_gpr
+emit_maxu                          :: emit_maxu_gpr_gpr_gpr
+inst_rol                           :: inst_rol_gpr_gpr_gpr
+emit_rol                           :: emit_rol_gpr_gpr_gpr
+inst_ror                           :: inst_ror_gpr_gpr_gpr
+emit_ror                           :: emit_ror_gpr_gpr_gpr
+inst_rori                          :: inst_rori_gpr_gpr_imm6
+emit_rori                          :: emit_rori_gpr_gpr_imm6
+inst_orc_b                         :: inst_orc_b_gpr_gpr
+emit_orc_b                         :: emit_orc_b_gpr_gpr
+inst_rev8                          :: inst_rev8_gpr_gpr
+emit_rev8                          :: emit_rev8_gpr_gpr
+inst_clzw                          :: inst_clzw_gpr_gpr
+emit_clzw                          :: emit_clzw_gpr_gpr
+inst_ctzw                          :: inst_ctzw_gpr_gpr
+emit_ctzw                          :: emit_ctzw_gpr_gpr
+inst_cpopw                         :: inst_cpopw_gpr_gpr
+emit_cpopw                         :: emit_cpopw_gpr_gpr
+inst_rolw                          :: inst_rolw_gpr_gpr_gpr
+emit_rolw                          :: emit_rolw_gpr_gpr_gpr
+inst_rorw                          :: inst_rorw_gpr_gpr_gpr
+emit_rorw                          :: emit_rorw_gpr_gpr_gpr
+inst_roriw                         :: inst_roriw_gpr_gpr_imm5
+emit_roriw                         :: emit_roriw_gpr_gpr_imm5
+inst_clmul                         :: inst_clmul_gpr_gpr_gpr
+emit_clmul                         :: emit_clmul_gpr_gpr_gpr
+inst_clmulh                        :: inst_clmulh_gpr_gpr_gpr
+emit_clmulh                        :: emit_clmulh_gpr_gpr_gpr
+inst_clmulr                        :: inst_clmulr_gpr_gpr_gpr
+emit_clmulr                        :: emit_clmulr_gpr_gpr_gpr
+inst_bclr                          :: inst_bclr_gpr_gpr_gpr
+emit_bclr                          :: emit_bclr_gpr_gpr_gpr
+inst_bclri                         :: inst_bclri_gpr_gpr_imm6
+emit_bclri                         :: emit_bclri_gpr_gpr_imm6
+inst_bext                          :: inst_bext_gpr_gpr_gpr
+emit_bext                          :: emit_bext_gpr_gpr_gpr
+inst_bexti                         :: inst_bexti_gpr_gpr_imm6
+emit_bexti                         :: emit_bexti_gpr_gpr_imm6
+inst_binv                          :: inst_binv_gpr_gpr_gpr
+emit_binv                          :: emit_binv_gpr_gpr_gpr
+inst_binvi                         :: inst_binvi_gpr_gpr_imm6
+emit_binvi                         :: emit_binvi_gpr_gpr_imm6
+inst_bset                          :: inst_bset_gpr_gpr_gpr
+emit_bset                          :: emit_bset_gpr_gpr_gpr
+inst_bseti                         :: inst_bseti_gpr_gpr_imm6
+emit_bseti                         :: emit_bseti_gpr_gpr_imm6
+inst_czero_eqz                     :: inst_czero_eqz_gpr_gpr_gpr
+emit_czero_eqz                     :: emit_czero_eqz_gpr_gpr_gpr
+inst_czero_nez                     :: inst_czero_nez_gpr_gpr_gpr
+emit_czero_nez                     :: emit_czero_nez_gpr_gpr_gpr
+inst_flh                           :: inst_flh_fpr_mem
+emit_flh                           :: emit_flh_fpr_mem
+inst_fsh                           :: inst_fsh_fpr_mem
+emit_fsh                           :: emit_fsh_fpr_mem
+inst_fmadd_h                       :: inst_fmadd_h_fpr_fpr_fpr_fpr
+emit_fmadd_h                       :: emit_fmadd_h_fpr_fpr_fpr_fpr
+inst_fmsub_h                       :: inst_fmsub_h_fpr_fpr_fpr_fpr
+emit_fmsub_h                       :: emit_fmsub_h_fpr_fpr_fpr_fpr
+inst_fnmsub_h                      :: inst_fnmsub_h_fpr_fpr_fpr_fpr
+emit_fnmsub_h                      :: emit_fnmsub_h_fpr_fpr_fpr_fpr
+inst_fnmadd_h                      :: inst_fnmadd_h_fpr_fpr_fpr_fpr
+emit_fnmadd_h                      :: emit_fnmadd_h_fpr_fpr_fpr_fpr
+inst_fadd_h                        :: inst_fadd_h_fpr_fpr_fpr
+emit_fadd_h                        :: emit_fadd_h_fpr_fpr_fpr
+inst_fsub_h                        :: inst_fsub_h_fpr_fpr_fpr
+emit_fsub_h                        :: emit_fsub_h_fpr_fpr_fpr
+inst_fmul_h                        :: inst_fmul_h_fpr_fpr_fpr
+emit_fmul_h                        :: emit_fmul_h_fpr_fpr_fpr
+inst_fdiv_h                        :: inst_fdiv_h_fpr_fpr_fpr
+emit_fdiv_h                        :: emit_fdiv_h_fpr_fpr_fpr
+inst_fsqrt_h                       :: inst_fsqrt_h_fpr_fpr
+emit_fsqrt_h                       :: emit_fsqrt_h_fpr_fpr
+inst_fsgnj_h                       :: inst_fsgnj_h_fpr_fpr_fpr
+emit_fsgnj_h                       :: emit_fsgnj_h_fpr_fpr_fpr
+inst_fsgnjn_h                      :: inst_fsgnjn_h_fpr_fpr_fpr
+emit_fsgnjn_h                      :: emit_fsgnjn_h_fpr_fpr_fpr
+inst_fsgnjx_h                      :: inst_fsgnjx_h_fpr_fpr_fpr
+emit_fsgnjx_h                      :: emit_fsgnjx_h_fpr_fpr_fpr
+inst_fmin_h                        :: inst_fmin_h_fpr_fpr_fpr
+emit_fmin_h                        :: emit_fmin_h_fpr_fpr_fpr
+inst_fmax_h                        :: inst_fmax_h_fpr_fpr_fpr
+emit_fmax_h                        :: emit_fmax_h_fpr_fpr_fpr
+inst_fcvt_w_h                      :: inst_fcvt_w_h_gpr_fpr
+emit_fcvt_w_h                      :: emit_fcvt_w_h_gpr_fpr
+inst_fcvt_wu_h                     :: inst_fcvt_wu_h_gpr_fpr
+emit_fcvt_wu_h                     :: emit_fcvt_wu_h_gpr_fpr
+inst_fcvt_l_h                      :: inst_fcvt_l_h_gpr_fpr
+emit_fcvt_l_h                      :: emit_fcvt_l_h_gpr_fpr
+inst_fcvt_lu_h                     :: inst_fcvt_lu_h_gpr_fpr
+emit_fcvt_lu_h                     :: emit_fcvt_lu_h_gpr_fpr
+inst_fcvt_h_w                      :: inst_fcvt_h_w_fpr_gpr
+emit_fcvt_h_w                      :: emit_fcvt_h_w_fpr_gpr
+inst_fcvt_h_wu                     :: inst_fcvt_h_wu_fpr_gpr
+emit_fcvt_h_wu                     :: emit_fcvt_h_wu_fpr_gpr
+inst_fcvt_h_l                      :: inst_fcvt_h_l_fpr_gpr
+emit_fcvt_h_l                      :: emit_fcvt_h_l_fpr_gpr
+inst_fcvt_h_lu                     :: inst_fcvt_h_lu_fpr_gpr
+emit_fcvt_h_lu                     :: emit_fcvt_h_lu_fpr_gpr
+inst_fcvt_s_h                      :: inst_fcvt_s_h_fpr_fpr
+emit_fcvt_s_h                      :: emit_fcvt_s_h_fpr_fpr
+inst_fcvt_h_s                      :: inst_fcvt_h_s_fpr_fpr
+emit_fcvt_h_s                      :: emit_fcvt_h_s_fpr_fpr
+inst_fcvt_d_h                      :: inst_fcvt_d_h_fpr_fpr
+emit_fcvt_d_h                      :: emit_fcvt_d_h_fpr_fpr
+inst_fcvt_h_d                      :: inst_fcvt_h_d_fpr_fpr
+emit_fcvt_h_d                      :: emit_fcvt_h_d_fpr_fpr
+inst_fmv_x_h                       :: inst_fmv_x_h_gpr_fpr
+emit_fmv_x_h                       :: emit_fmv_x_h_gpr_fpr
+inst_fmv_h_x                       :: inst_fmv_h_x_fpr_gpr
+emit_fmv_h_x                       :: emit_fmv_h_x_fpr_gpr
+inst_fclass_h                      :: inst_fclass_h_gpr_fpr
+emit_fclass_h                      :: emit_fclass_h_gpr_fpr
+inst_feq_h                         :: inst_feq_h_gpr_fpr_fpr
+emit_feq_h                         :: emit_feq_h_gpr_fpr_fpr
+inst_flt_h                         :: inst_flt_h_gpr_fpr_fpr
+emit_flt_h                         :: emit_flt_h_gpr_fpr_fpr
+inst_fle_h                         :: inst_fle_h_gpr_fpr_fpr
+emit_fle_h                         :: emit_fle_h_gpr_fpr_fpr
+inst_mret                          :: inst_mret_none
+emit_mret                          :: emit_mret_none
+inst_sret                          :: inst_sret_none
+emit_sret                          :: emit_sret_none
+inst_wfi                           :: inst_wfi_none
+emit_wfi                           :: emit_wfi_none
+inst_sfence_vma                    :: inst_sfence_vma_gpr_gpr
+emit_sfence_vma                    :: emit_sfence_vma_gpr_gpr
diff --git a/core/rexcode/isa/riscv/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/riscv/tools/gen_mnemonic_builders.odin
index 37aca6413..2aa81ed5e 100644
--- a/core/rexcode/isa/riscv/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/riscv/tools/gen_mnemonic_builders.odin
@@ -305,7 +305,7 @@ write_emit_body :: proc(sb: ^strings.Builder, entry: Proc_Entry) {
 	sig   := entry.sig
 	names := param_names(sig)
 
-	strings.write_string(sb, "append(instructions, ")
+	strings.write_string(sb, "append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_byte(sb, '(')
 	for i in 0..<sig.count {
diff --git a/core/rexcode/isa/rsp/mnemonic_builders.odin b/core/rexcode/isa/rsp/mnemonic_builders.odin
index 903948772..8849e0c48 100644
--- a/core/rexcode/isa/rsp/mnemonic_builders.odin
+++ b/core/rexcode/isa/rsp/mnemonic_builders.odin
@@ -19,237 +19,237 @@ package rexcode_rsp
 // =============================================================================
 
 inst_add_gpr_gpr_gpr     :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .ADD, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_add_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_add_gpr_gpr_gpr(a, b, c)) }
+emit_add_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_add_gpr_gpr_gpr(a, b, c)) }
 inst_addu_gpr_gpr_gpr    :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .ADDU, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_addu_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_addu_gpr_gpr_gpr(a, b, c)) }
+emit_addu_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_addu_gpr_gpr_gpr(a, b, c)) }
 inst_sub_gpr_gpr_gpr     :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .SUB, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_sub_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_sub_gpr_gpr_gpr(a, b, c)) }
+emit_sub_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_sub_gpr_gpr_gpr(a, b, c)) }
 inst_subu_gpr_gpr_gpr    :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .SUBU, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_subu_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_subu_gpr_gpr_gpr(a, b, c)) }
+emit_subu_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_subu_gpr_gpr_gpr(a, b, c)) }
 inst_and_gpr_gpr_gpr     :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .AND, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_and_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_and_gpr_gpr_gpr(a, b, c)) }
+emit_and_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_and_gpr_gpr_gpr(a, b, c)) }
 inst_or_gpr_gpr_gpr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .OR, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_or_gpr_gpr_gpr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_or_gpr_gpr_gpr(a, b, c)) }
+emit_or_gpr_gpr_gpr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_or_gpr_gpr_gpr(a, b, c)) }
 inst_xor_gpr_gpr_gpr     :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .XOR, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_xor_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_xor_gpr_gpr_gpr(a, b, c)) }
+emit_xor_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_xor_gpr_gpr_gpr(a, b, c)) }
 inst_nor_gpr_gpr_gpr     :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .NOR, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_nor_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_nor_gpr_gpr_gpr(a, b, c)) }
+emit_nor_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_nor_gpr_gpr_gpr(a, b, c)) }
 inst_slt_gpr_gpr_gpr     :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .SLT, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_slt_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_slt_gpr_gpr_gpr(a, b, c)) }
+emit_slt_gpr_gpr_gpr     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_slt_gpr_gpr_gpr(a, b, c)) }
 inst_sltu_gpr_gpr_gpr    :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .SLTU, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_sltu_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_sltu_gpr_gpr_gpr(a, b, c)) }
+emit_sltu_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_sltu_gpr_gpr_gpr(a, b, c)) }
 inst_sll_gpr_gpr_imm5    :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .SLL, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 1), {}} } }
-emit_sll_gpr_gpr_imm5    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_sll_gpr_gpr_imm5(a, b, imm)) }
+emit_sll_gpr_gpr_imm5    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_sll_gpr_gpr_imm5(a, b, imm)) }
 inst_srl_gpr_gpr_imm5    :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .SRL, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 1), {}} } }
-emit_srl_gpr_gpr_imm5    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_srl_gpr_gpr_imm5(a, b, imm)) }
+emit_srl_gpr_gpr_imm5    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_srl_gpr_gpr_imm5(a, b, imm)) }
 inst_sra_gpr_gpr_imm5    :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .SRA, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 1), {}} } }
-emit_sra_gpr_gpr_imm5    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_sra_gpr_gpr_imm5(a, b, imm)) }
+emit_sra_gpr_gpr_imm5    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_sra_gpr_gpr_imm5(a, b, imm)) }
 inst_sllv_gpr_gpr_gpr    :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .SLLV, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_sllv_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_sllv_gpr_gpr_gpr(a, b, c)) }
+emit_sllv_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_sllv_gpr_gpr_gpr(a, b, c)) }
 inst_srlv_gpr_gpr_gpr    :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .SRLV, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_srlv_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_srlv_gpr_gpr_gpr(a, b, c)) }
+emit_srlv_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_srlv_gpr_gpr_gpr(a, b, c)) }
 inst_srav_gpr_gpr_gpr    :: #force_inline proc "contextless" (a: Register, b: Register, c: Register) -> Instruction { return Instruction{ mnemonic = .SRAV, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_reg(c), {}} } }
-emit_srav_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append(instructions, inst_srav_gpr_gpr_gpr(a, b, c)) }
+emit_srav_gpr_gpr_gpr    :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register) { append_elem(instructions, inst_srav_gpr_gpr_gpr(a, b, c)) }
 inst_addi_gpr_gpr_imm16  :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .ADDI, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 2), {}} } }
-emit_addi_gpr_gpr_imm16  :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_addi_gpr_gpr_imm16(a, b, imm)) }
+emit_addi_gpr_gpr_imm16  :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_addi_gpr_gpr_imm16(a, b, imm)) }
 inst_addiu_gpr_gpr_imm16 :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .ADDIU, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 2), {}} } }
-emit_addiu_gpr_gpr_imm16 :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_addiu_gpr_gpr_imm16(a, b, imm)) }
+emit_addiu_gpr_gpr_imm16 :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_addiu_gpr_gpr_imm16(a, b, imm)) }
 inst_slti_gpr_gpr_imm16  :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .SLTI, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 2), {}} } }
-emit_slti_gpr_gpr_imm16  :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_slti_gpr_gpr_imm16(a, b, imm)) }
+emit_slti_gpr_gpr_imm16  :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_slti_gpr_gpr_imm16(a, b, imm)) }
 inst_sltiu_gpr_gpr_imm16 :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .SLTIU, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 2), {}} } }
-emit_sltiu_gpr_gpr_imm16 :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_sltiu_gpr_gpr_imm16(a, b, imm)) }
+emit_sltiu_gpr_gpr_imm16 :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_sltiu_gpr_gpr_imm16(a, b, imm)) }
 inst_andi_gpr_gpr_imm16  :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .ANDI, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 2), {}} } }
-emit_andi_gpr_gpr_imm16  :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_andi_gpr_gpr_imm16(a, b, imm)) }
+emit_andi_gpr_gpr_imm16  :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_andi_gpr_gpr_imm16(a, b, imm)) }
 inst_ori_gpr_gpr_imm16   :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .ORI, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 2), {}} } }
-emit_ori_gpr_gpr_imm16   :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_ori_gpr_gpr_imm16(a, b, imm)) }
+emit_ori_gpr_gpr_imm16   :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_ori_gpr_gpr_imm16(a, b, imm)) }
 inst_xori_gpr_gpr_imm16  :: #force_inline proc "contextless" (a: Register, b: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .XORI, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_imm(imm, 2), {}} } }
-emit_xori_gpr_gpr_imm16  :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append(instructions, inst_xori_gpr_gpr_imm16(a, b, imm)) }
+emit_xori_gpr_gpr_imm16  :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, imm: i64) { append_elem(instructions, inst_xori_gpr_gpr_imm16(a, b, imm)) }
 inst_lui_gpr_imm16       :: #force_inline proc "contextless" (a: Register, imm: i64) -> Instruction { return Instruction{ mnemonic = .LUI, operand_count = 2, length = 4, ops = {op_reg(a), op_imm(imm, 2), {}, {}} } }
-emit_lui_gpr_imm16       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, imm: i64) { append(instructions, inst_lui_gpr_imm16(a, imm)) }
+emit_lui_gpr_imm16       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, imm: i64) { append_elem(instructions, inst_lui_gpr_imm16(a, imm)) }
 inst_beq_gpr_gpr_rel     :: #force_inline proc "contextless" (a: Register, b: Register, label_id: u32) -> Instruction { return Instruction{ mnemonic = .BEQ, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_label(label_id), {}} } }
-emit_beq_gpr_gpr_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, label_id: u32) { append(instructions, inst_beq_gpr_gpr_rel(a, b, label_id)) }
+emit_beq_gpr_gpr_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, label_id: u32) { append_elem(instructions, inst_beq_gpr_gpr_rel(a, b, label_id)) }
 inst_bne_gpr_gpr_rel     :: #force_inline proc "contextless" (a: Register, b: Register, label_id: u32) -> Instruction { return Instruction{ mnemonic = .BNE, operand_count = 3, length = 4, ops = {op_reg(a), op_reg(b), op_label(label_id), {}} } }
-emit_bne_gpr_gpr_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, label_id: u32) { append(instructions, inst_bne_gpr_gpr_rel(a, b, label_id)) }
+emit_bne_gpr_gpr_rel     :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, label_id: u32) { append_elem(instructions, inst_bne_gpr_gpr_rel(a, b, label_id)) }
 inst_blez_gpr_rel        :: #force_inline proc "contextless" (a: Register, label_id: u32) -> Instruction { return Instruction{ mnemonic = .BLEZ, operand_count = 2, length = 4, ops = {op_reg(a), op_label(label_id), {}, {}} } }
-emit_blez_gpr_rel        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append(instructions, inst_blez_gpr_rel(a, label_id)) }
+emit_blez_gpr_rel        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append_elem(instructions, inst_blez_gpr_rel(a, label_id)) }
 inst_bgtz_gpr_rel        :: #force_inline proc "contextless" (a: Register, label_id: u32) -> Instruction { return Instruction{ mnemonic = .BGTZ, operand_count = 2, length = 4, ops = {op_reg(a), op_label(label_id), {}, {}} } }
-emit_bgtz_gpr_rel        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append(instructions, inst_bgtz_gpr_rel(a, label_id)) }
+emit_bgtz_gpr_rel        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append_elem(instructions, inst_bgtz_gpr_rel(a, label_id)) }
 inst_bltz_gpr_rel        :: #force_inline proc "contextless" (a: Register, label_id: u32) -> Instruction { return Instruction{ mnemonic = .BLTZ, operand_count = 2, length = 4, ops = {op_reg(a), op_label(label_id), {}, {}} } }
-emit_bltz_gpr_rel        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append(instructions, inst_bltz_gpr_rel(a, label_id)) }
+emit_bltz_gpr_rel        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append_elem(instructions, inst_bltz_gpr_rel(a, label_id)) }
 inst_bgez_gpr_rel        :: #force_inline proc "contextless" (a: Register, label_id: u32) -> Instruction { return Instruction{ mnemonic = .BGEZ, operand_count = 2, length = 4, ops = {op_reg(a), op_label(label_id), {}, {}} } }
-emit_bgez_gpr_rel        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append(instructions, inst_bgez_gpr_rel(a, label_id)) }
+emit_bgez_gpr_rel        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append_elem(instructions, inst_bgez_gpr_rel(a, label_id)) }
 inst_bltzal_gpr_rel      :: #force_inline proc "contextless" (a: Register, label_id: u32) -> Instruction { return Instruction{ mnemonic = .BLTZAL, operand_count = 2, length = 4, ops = {op_reg(a), op_label(label_id), {}, {}} } }
-emit_bltzal_gpr_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append(instructions, inst_bltzal_gpr_rel(a, label_id)) }
+emit_bltzal_gpr_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append_elem(instructions, inst_bltzal_gpr_rel(a, label_id)) }
 inst_bgezal_gpr_rel      :: #force_inline proc "contextless" (a: Register, label_id: u32) -> Instruction { return Instruction{ mnemonic = .BGEZAL, operand_count = 2, length = 4, ops = {op_reg(a), op_label(label_id), {}, {}} } }
-emit_bgezal_gpr_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append(instructions, inst_bgezal_gpr_rel(a, label_id)) }
+emit_bgezal_gpr_rel      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, label_id: u32) { append_elem(instructions, inst_bgezal_gpr_rel(a, label_id)) }
 inst_j_rel               :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return Instruction{ mnemonic = .J, operand_count = 1, length = 4, ops = {op_label(label_id), {}, {}, {}} } }
-emit_j_rel               :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_j_rel(label_id)) }
+emit_j_rel               :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_j_rel(label_id)) }
 inst_jal_rel             :: #force_inline proc "contextless" (label_id: u32) -> Instruction { return Instruction{ mnemonic = .JAL, operand_count = 1, length = 4, ops = {op_label(label_id), {}, {}, {}} } }
-emit_jal_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append(instructions, inst_jal_rel(label_id)) }
+emit_jal_rel             :: #force_inline proc(instructions: ^[dynamic]Instruction, label_id: u32) { append_elem(instructions, inst_jal_rel(label_id)) }
 inst_jr_gpr              :: #force_inline proc "contextless" (a: Register) -> Instruction { return Instruction{ mnemonic = .JR, operand_count = 1, length = 4, ops = {op_reg(a), {}, {}, {}} } }
-emit_jr_gpr              :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register) { append(instructions, inst_jr_gpr(a)) }
+emit_jr_gpr              :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register) { append_elem(instructions, inst_jr_gpr(a)) }
 inst_jalr_gpr_gpr        :: #force_inline proc "contextless" (a: Register, b: Register) -> Instruction { return Instruction{ mnemonic = .JALR, operand_count = 2, length = 4, ops = {op_reg(a), op_reg(b), {}, {}} } }
-emit_jalr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append(instructions, inst_jalr_gpr_gpr(a, b)) }
+emit_jalr_gpr_gpr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append_elem(instructions, inst_jalr_gpr_gpr(a, b)) }
 inst_lb_gpr_mem          :: #force_inline proc "contextless" (a: Register, m: Memory) -> Instruction { return Instruction{ mnemonic = .LB, operand_count = 2, length = 4, ops = {op_reg(a), op_mem(m, 4), {}, {}} } }
-emit_lb_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append(instructions, inst_lb_gpr_mem(a, m)) }
+emit_lb_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append_elem(instructions, inst_lb_gpr_mem(a, m)) }
 inst_lh_gpr_mem          :: #force_inline proc "contextless" (a: Register, m: Memory) -> Instruction { return Instruction{ mnemonic = .LH, operand_count = 2, length = 4, ops = {op_reg(a), op_mem(m, 4), {}, {}} } }
-emit_lh_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append(instructions, inst_lh_gpr_mem(a, m)) }
+emit_lh_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append_elem(instructions, inst_lh_gpr_mem(a, m)) }
 inst_lw_gpr_mem          :: #force_inline proc "contextless" (a: Register, m: Memory) -> Instruction { return Instruction{ mnemonic = .LW, operand_count = 2, length = 4, ops = {op_reg(a), op_mem(m, 4), {}, {}} } }
-emit_lw_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append(instructions, inst_lw_gpr_mem(a, m)) }
+emit_lw_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append_elem(instructions, inst_lw_gpr_mem(a, m)) }
 inst_lbu_gpr_mem         :: #force_inline proc "contextless" (a: Register, m: Memory) -> Instruction { return Instruction{ mnemonic = .LBU, operand_count = 2, length = 4, ops = {op_reg(a), op_mem(m, 4), {}, {}} } }
-emit_lbu_gpr_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append(instructions, inst_lbu_gpr_mem(a, m)) }
+emit_lbu_gpr_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append_elem(instructions, inst_lbu_gpr_mem(a, m)) }
 inst_lhu_gpr_mem         :: #force_inline proc "contextless" (a: Register, m: Memory) -> Instruction { return Instruction{ mnemonic = .LHU, operand_count = 2, length = 4, ops = {op_reg(a), op_mem(m, 4), {}, {}} } }
-emit_lhu_gpr_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append(instructions, inst_lhu_gpr_mem(a, m)) }
+emit_lhu_gpr_mem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append_elem(instructions, inst_lhu_gpr_mem(a, m)) }
 inst_sb_gpr_mem          :: #force_inline proc "contextless" (a: Register, m: Memory) -> Instruction { return Instruction{ mnemonic = .SB, operand_count = 2, length = 4, ops = {op_reg(a), op_mem(m, 4), {}, {}} } }
-emit_sb_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append(instructions, inst_sb_gpr_mem(a, m)) }
+emit_sb_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append_elem(instructions, inst_sb_gpr_mem(a, m)) }
 inst_sh_gpr_mem          :: #force_inline proc "contextless" (a: Register, m: Memory) -> Instruction { return Instruction{ mnemonic = .SH, operand_count = 2, length = 4, ops = {op_reg(a), op_mem(m, 4), {}, {}} } }
-emit_sh_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append(instructions, inst_sh_gpr_mem(a, m)) }
+emit_sh_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append_elem(instructions, inst_sh_gpr_mem(a, m)) }
 inst_sw_gpr_mem          :: #force_inline proc "contextless" (a: Register, m: Memory) -> Instruction { return Instruction{ mnemonic = .SW, operand_count = 2, length = 4, ops = {op_reg(a), op_mem(m, 4), {}, {}} } }
-emit_sw_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append(instructions, inst_sw_gpr_mem(a, m)) }
+emit_sw_gpr_mem          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Memory) { append_elem(instructions, inst_sw_gpr_mem(a, m)) }
 inst_break_imm20         :: #force_inline proc "contextless" (imm: i64) -> Instruction { return Instruction{ mnemonic = .BREAK, operand_count = 1, length = 4, ops = {op_imm(imm, 4), {}, {}, {}} } }
-emit_break_imm20         :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append(instructions, inst_break_imm20(imm)) }
+emit_break_imm20         :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i64) { append_elem(instructions, inst_break_imm20(imm)) }
 inst_nop_none            :: #force_inline proc "contextless" () -> Instruction { return Instruction{ mnemonic = .NOP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}} } }
-emit_nop_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nop_none()) }
+emit_nop_none            :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nop_none()) }
 inst_mfc0_gpr_cp0        :: #force_inline proc "contextless" (a: Register, b: Register) -> Instruction { return Instruction{ mnemonic = .MFC0, operand_count = 2, length = 4, ops = {op_reg(a), op_reg(b), {}, {}} } }
-emit_mfc0_gpr_cp0        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append(instructions, inst_mfc0_gpr_cp0(a, b)) }
+emit_mfc0_gpr_cp0        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append_elem(instructions, inst_mfc0_gpr_cp0(a, b)) }
 inst_mtc0_gpr_cp0        :: #force_inline proc "contextless" (a: Register, b: Register) -> Instruction { return Instruction{ mnemonic = .MTC0, operand_count = 2, length = 4, ops = {op_reg(a), op_reg(b), {}, {}} } }
-emit_mtc0_gpr_cp0        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append(instructions, inst_mtc0_gpr_cp0(a, b)) }
+emit_mtc0_gpr_cp0        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append_elem(instructions, inst_mtc0_gpr_cp0(a, b)) }
 inst_mfc2_gpr_vr         :: #force_inline proc "contextless" (a: Register, b: Register) -> Instruction { return Instruction{ mnemonic = .MFC2, operand_count = 2, length = 4, ops = {op_reg(a), op_vr(b), {}, {}} } }
-emit_mfc2_gpr_vr         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append(instructions, inst_mfc2_gpr_vr(a, b)) }
+emit_mfc2_gpr_vr         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append_elem(instructions, inst_mfc2_gpr_vr(a, b)) }
 inst_mtc2_gpr_vr         :: #force_inline proc "contextless" (a: Register, b: Register) -> Instruction { return Instruction{ mnemonic = .MTC2, operand_count = 2, length = 4, ops = {op_reg(a), op_vr(b), {}, {}} } }
-emit_mtc2_gpr_vr         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append(instructions, inst_mtc2_gpr_vr(a, b)) }
+emit_mtc2_gpr_vr         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append_elem(instructions, inst_mtc2_gpr_vr(a, b)) }
 inst_cfc2_gpr_cp2        :: #force_inline proc "contextless" (a: Register, b: Register) -> Instruction { return Instruction{ mnemonic = .CFC2, operand_count = 2, length = 4, ops = {op_reg(a), op_reg(b), {}, {}} } }
-emit_cfc2_gpr_cp2        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append(instructions, inst_cfc2_gpr_cp2(a, b)) }
+emit_cfc2_gpr_cp2        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append_elem(instructions, inst_cfc2_gpr_cp2(a, b)) }
 inst_ctc2_gpr_cp2        :: #force_inline proc "contextless" (a: Register, b: Register) -> Instruction { return Instruction{ mnemonic = .CTC2, operand_count = 2, length = 4, ops = {op_reg(a), op_reg(b), {}, {}} } }
-emit_ctc2_gpr_cp2        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append(instructions, inst_ctc2_gpr_cp2(a, b)) }
+emit_ctc2_gpr_cp2        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register) { append_elem(instructions, inst_ctc2_gpr_cp2(a, b)) }
 inst_vmulf_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMULF, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmulf_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmulf_vr_vr_vr(a, b, c, element)) }
+emit_vmulf_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmulf_vr_vr_vr(a, b, c, element)) }
 inst_vmulu_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMULU, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmulu_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmulu_vr_vr_vr(a, b, c, element)) }
+emit_vmulu_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmulu_vr_vr_vr(a, b, c, element)) }
 inst_vmudl_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMUDL, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmudl_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmudl_vr_vr_vr(a, b, c, element)) }
+emit_vmudl_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmudl_vr_vr_vr(a, b, c, element)) }
 inst_vmudm_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMUDM, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmudm_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmudm_vr_vr_vr(a, b, c, element)) }
+emit_vmudm_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmudm_vr_vr_vr(a, b, c, element)) }
 inst_vmudn_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMUDN, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmudn_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmudn_vr_vr_vr(a, b, c, element)) }
+emit_vmudn_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmudn_vr_vr_vr(a, b, c, element)) }
 inst_vmudh_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMUDH, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmudh_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmudh_vr_vr_vr(a, b, c, element)) }
+emit_vmudh_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmudh_vr_vr_vr(a, b, c, element)) }
 inst_vmacf_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMACF, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmacf_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmacf_vr_vr_vr(a, b, c, element)) }
+emit_vmacf_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmacf_vr_vr_vr(a, b, c, element)) }
 inst_vmacu_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMACU, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmacu_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmacu_vr_vr_vr(a, b, c, element)) }
+emit_vmacu_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmacu_vr_vr_vr(a, b, c, element)) }
 inst_vmadl_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMADL, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmadl_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmadl_vr_vr_vr(a, b, c, element)) }
+emit_vmadl_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmadl_vr_vr_vr(a, b, c, element)) }
 inst_vmadm_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMADM, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmadm_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmadm_vr_vr_vr(a, b, c, element)) }
+emit_vmadm_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmadm_vr_vr_vr(a, b, c, element)) }
 inst_vmadn_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMADN, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmadn_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmadn_vr_vr_vr(a, b, c, element)) }
+emit_vmadn_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmadn_vr_vr_vr(a, b, c, element)) }
 inst_vmadh_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMADH, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmadh_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmadh_vr_vr_vr(a, b, c, element)) }
+emit_vmadh_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmadh_vr_vr_vr(a, b, c, element)) }
 inst_vadd_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VADD, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vadd_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vadd_vr_vr_vr(a, b, c, element)) }
+emit_vadd_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vadd_vr_vr_vr(a, b, c, element)) }
 inst_vsub_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VSUB, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vsub_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vsub_vr_vr_vr(a, b, c, element)) }
+emit_vsub_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vsub_vr_vr_vr(a, b, c, element)) }
 inst_vabs_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VABS, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vabs_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vabs_vr_vr_vr(a, b, c, element)) }
+emit_vabs_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vabs_vr_vr_vr(a, b, c, element)) }
 inst_vaddc_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VADDC, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vaddc_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vaddc_vr_vr_vr(a, b, c, element)) }
+emit_vaddc_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vaddc_vr_vr_vr(a, b, c, element)) }
 inst_vsubc_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VSUBC, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vsubc_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vsubc_vr_vr_vr(a, b, c, element)) }
+emit_vsubc_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vsubc_vr_vr_vr(a, b, c, element)) }
 inst_vsar_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VSAR, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vsar_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vsar_vr_vr_vr(a, b, c, element)) }
+emit_vsar_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vsar_vr_vr_vr(a, b, c, element)) }
 inst_vlt_vr_vr_vr        :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VLT, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vlt_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vlt_vr_vr_vr(a, b, c, element)) }
+emit_vlt_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vlt_vr_vr_vr(a, b, c, element)) }
 inst_veq_vr_vr_vr        :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VEQ, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_veq_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_veq_vr_vr_vr(a, b, c, element)) }
+emit_veq_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_veq_vr_vr_vr(a, b, c, element)) }
 inst_vne_vr_vr_vr        :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VNE, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vne_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vne_vr_vr_vr(a, b, c, element)) }
+emit_vne_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vne_vr_vr_vr(a, b, c, element)) }
 inst_vge_vr_vr_vr        :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VGE, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vge_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vge_vr_vr_vr(a, b, c, element)) }
+emit_vge_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vge_vr_vr_vr(a, b, c, element)) }
 inst_vcl_vr_vr_vr        :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VCL, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vcl_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vcl_vr_vr_vr(a, b, c, element)) }
+emit_vcl_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vcl_vr_vr_vr(a, b, c, element)) }
 inst_vch_vr_vr_vr        :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VCH, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vch_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vch_vr_vr_vr(a, b, c, element)) }
+emit_vch_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vch_vr_vr_vr(a, b, c, element)) }
 inst_vcr_vr_vr_vr        :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VCR, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vcr_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vcr_vr_vr_vr(a, b, c, element)) }
+emit_vcr_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vcr_vr_vr_vr(a, b, c, element)) }
 inst_vmrg_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMRG, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vmrg_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vmrg_vr_vr_vr(a, b, c, element)) }
+emit_vmrg_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vmrg_vr_vr_vr(a, b, c, element)) }
 inst_vand_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VAND, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vand_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vand_vr_vr_vr(a, b, c, element)) }
+emit_vand_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vand_vr_vr_vr(a, b, c, element)) }
 inst_vnand_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VNAND, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vnand_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vnand_vr_vr_vr(a, b, c, element)) }
+emit_vnand_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vnand_vr_vr_vr(a, b, c, element)) }
 inst_vor_vr_vr_vr        :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VOR, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vor_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vor_vr_vr_vr(a, b, c, element)) }
+emit_vor_vr_vr_vr        :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vor_vr_vr_vr(a, b, c, element)) }
 inst_vnor_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VNOR, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vnor_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vnor_vr_vr_vr(a, b, c, element)) }
+emit_vnor_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vnor_vr_vr_vr(a, b, c, element)) }
 inst_vxor_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VXOR, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vxor_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vxor_vr_vr_vr(a, b, c, element)) }
+emit_vxor_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vxor_vr_vr_vr(a, b, c, element)) }
 inst_vnxor_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VNXOR, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vnxor_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vnxor_vr_vr_vr(a, b, c, element)) }
+emit_vnxor_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vnxor_vr_vr_vr(a, b, c, element)) }
 inst_vrcp_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VRCP, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vrcp_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vrcp_vr_vr_vr(a, b, c, element)) }
+emit_vrcp_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vrcp_vr_vr_vr(a, b, c, element)) }
 inst_vrcpl_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VRCPL, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vrcpl_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vrcpl_vr_vr_vr(a, b, c, element)) }
+emit_vrcpl_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vrcpl_vr_vr_vr(a, b, c, element)) }
 inst_vrcph_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VRCPH, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vrcph_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vrcph_vr_vr_vr(a, b, c, element)) }
+emit_vrcph_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vrcph_vr_vr_vr(a, b, c, element)) }
 inst_vmov_vr_vr          :: #force_inline proc "contextless" (a: Register, b: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VMOV, operand_count = 2, length = 4, ops = {op_vr(a), op_vr(b, element), {}, {}} } }
-emit_vmov_vr_vr          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, element: u8 = 0) { append(instructions, inst_vmov_vr_vr(a, b, element)) }
+emit_vmov_vr_vr          :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, element: u8 = 0) { append_elem(instructions, inst_vmov_vr_vr(a, b, element)) }
 inst_vrsq_vr_vr_vr       :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VRSQ, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vrsq_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vrsq_vr_vr_vr(a, b, c, element)) }
+emit_vrsq_vr_vr_vr       :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vrsq_vr_vr_vr(a, b, c, element)) }
 inst_vrsql_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VRSQL, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vrsql_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vrsql_vr_vr_vr(a, b, c, element)) }
+emit_vrsql_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vrsql_vr_vr_vr(a, b, c, element)) }
 inst_vrsqh_vr_vr_vr      :: #force_inline proc "contextless" (a: Register, b: Register, c: Register, element: u8 = 0) -> Instruction { return Instruction{ mnemonic = .VRSQH, operand_count = 3, length = 4, ops = {op_vr(a), op_vr(b), op_vr(c, element), {}} } }
-emit_vrsqh_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append(instructions, inst_vrsqh_vr_vr_vr(a, b, c, element)) }
+emit_vrsqh_vr_vr_vr      :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, b: Register, c: Register, element: u8 = 0) { append_elem(instructions, inst_vrsqh_vr_vr_vr(a, b, c, element)) }
 inst_vnop_none           :: #force_inline proc "contextless" () -> Instruction { return Instruction{ mnemonic = .VNOP, operand_count = 0, length = 4, ops = {{}, {}, {}, {}} } }
-emit_vnop_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vnop_none()) }
+emit_vnop_none           :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vnop_none()) }
 inst_lbv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LBV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_lbv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_lbv_vr_vmem(a, m)) }
+emit_lbv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_lbv_vr_vmem(a, m)) }
 inst_lsv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LSV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_lsv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_lsv_vr_vmem(a, m)) }
+emit_lsv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_lsv_vr_vmem(a, m)) }
 inst_llv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LLV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_llv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_llv_vr_vmem(a, m)) }
+emit_llv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_llv_vr_vmem(a, m)) }
 inst_ldv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LDV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_ldv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_ldv_vr_vmem(a, m)) }
+emit_ldv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_ldv_vr_vmem(a, m)) }
 inst_lqv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LQV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_lqv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_lqv_vr_vmem(a, m)) }
+emit_lqv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_lqv_vr_vmem(a, m)) }
 inst_lrv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LRV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_lrv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_lrv_vr_vmem(a, m)) }
+emit_lrv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_lrv_vr_vmem(a, m)) }
 inst_lpv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LPV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_lpv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_lpv_vr_vmem(a, m)) }
+emit_lpv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_lpv_vr_vmem(a, m)) }
 inst_luv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LUV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_luv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_luv_vr_vmem(a, m)) }
+emit_luv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_luv_vr_vmem(a, m)) }
 inst_lhv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LHV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_lhv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_lhv_vr_vmem(a, m)) }
+emit_lhv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_lhv_vr_vmem(a, m)) }
 inst_lfv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LFV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_lfv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_lfv_vr_vmem(a, m)) }
+emit_lfv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_lfv_vr_vmem(a, m)) }
 inst_lwv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LWV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_lwv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_lwv_vr_vmem(a, m)) }
+emit_lwv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_lwv_vr_vmem(a, m)) }
 inst_ltv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .LTV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_ltv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_ltv_vr_vmem(a, m)) }
+emit_ltv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_ltv_vr_vmem(a, m)) }
 inst_sbv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SBV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_sbv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_sbv_vr_vmem(a, m)) }
+emit_sbv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_sbv_vr_vmem(a, m)) }
 inst_ssv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SSV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_ssv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_ssv_vr_vmem(a, m)) }
+emit_ssv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_ssv_vr_vmem(a, m)) }
 inst_slv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SLV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_slv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_slv_vr_vmem(a, m)) }
+emit_slv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_slv_vr_vmem(a, m)) }
 inst_sdv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SDV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_sdv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_sdv_vr_vmem(a, m)) }
+emit_sdv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_sdv_vr_vmem(a, m)) }
 inst_sqv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SQV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_sqv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_sqv_vr_vmem(a, m)) }
+emit_sqv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_sqv_vr_vmem(a, m)) }
 inst_srv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SRV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_srv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_srv_vr_vmem(a, m)) }
+emit_srv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_srv_vr_vmem(a, m)) }
 inst_spv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SPV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_spv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_spv_vr_vmem(a, m)) }
+emit_spv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_spv_vr_vmem(a, m)) }
 inst_suv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SUV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_suv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_suv_vr_vmem(a, m)) }
+emit_suv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_suv_vr_vmem(a, m)) }
 inst_shv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SHV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_shv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_shv_vr_vmem(a, m)) }
+emit_shv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_shv_vr_vmem(a, m)) }
 inst_sfv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SFV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_sfv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_sfv_vr_vmem(a, m)) }
+emit_sfv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_sfv_vr_vmem(a, m)) }
 inst_swv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .SWV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_swv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_swv_vr_vmem(a, m)) }
+emit_swv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_swv_vr_vmem(a, m)) }
 inst_stv_vr_vmem         :: #force_inline proc "contextless" (a: Register, m: Vector_Mem) -> Instruction { return Instruction{ mnemonic = .STV, operand_count = 2, length = 4, ops = {op_vr(a), op_vmem(m, 16), {}, {}} } }
-emit_stv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append(instructions, inst_stv_vr_vmem(a, m)) }
+emit_stv_vr_vmem         :: #force_inline proc(instructions: ^[dynamic]Instruction, a: Register, m: Vector_Mem) { append_elem(instructions, inst_stv_vr_vmem(a, m)) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/rsp/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/rsp/tools/gen_mnemonic_builders.odin
index 94c432a55..786f2be18 100644
--- a/core/rexcode/isa/rsp/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/rsp/tools/gen_mnemonic_builders.odin
@@ -408,7 +408,7 @@ generate_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, pad: int) {
 			strings.write_string(sb, " = 0")
 		}
 	}
-	strings.write_string(sb, ") { append(instructions, ")
+	strings.write_string(sb, ") { append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_string(sb, "(")
 	for p, i in params {
diff --git a/core/rexcode/isa/x86/mnemonic_builders.odin b/core/rexcode/isa/x86/mnemonic_builders.odin
index ba96b34f9..643b86135 100644
--- a/core/rexcode/isa/x86/mnemonic_builders.odin
+++ b/core/rexcode/isa/x86/mnemonic_builders.odin
@@ -104,41 +104,41 @@ inst_mov_r64_cr                     :: #force_inline proc "contextless" (dst: GP
 inst_mov_cr_r64                     :: #force_inline proc "contextless" (dst: CREG, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOV, operand_count = 2, ops = {op_creg(dst), op_gpr64(src), {}, {}} }, 30) }
 inst_mov_r64_dr                     :: #force_inline proc "contextless" (dst: GPR64, src: DREG) -> Instruction { return with_hint(Instruction{ mnemonic = .MOV, operand_count = 2, ops = {op_gpr64(dst), op_dreg(src), {}, {}} }, 31) }
 inst_mov_dr_r64                     :: #force_inline proc "contextless" (dst: DREG, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOV, operand_count = 2, ops = {op_dreg(dst), op_gpr64(src), {}, {}} }, 32) }
-emit_mov_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_mov_r8_r8(dst, src)) }
-emit_mov_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_mov_m8_r8(dst, src)) }
-emit_mov_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_mov_r16_r16(dst, src)) }
-emit_mov_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_mov_m16_r16(dst, src)) }
-emit_mov_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_mov_r32_r32(dst, src)) }
-emit_mov_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_mov_m32_r32(dst, src)) }
-emit_mov_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_mov_r64_r64(dst, src)) }
-emit_mov_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_mov_m64_r64(dst, src)) }
-emit_mov_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_mov_r8_m8(dst, src)) }
-emit_mov_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_mov_r16_m16(dst, src)) }
-emit_mov_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_mov_r32_m32(dst, src)) }
-emit_mov_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_mov_r64_m64(dst, src)) }
-emit_mov_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_mov_r8_imm8(dst, imm)) }
-emit_mov_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_mov_r16_imm16(dst, imm)) }
-emit_mov_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_mov_r32_imm32(dst, imm)) }
-emit_mov_r64_imm64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i64) { append(instructions, inst_mov_r64_imm64(dst, imm)) }
-emit_mov_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_mov_m8_imm8(dst, imm)) }
-emit_mov_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_mov_m16_imm16(dst, imm)) }
-emit_mov_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_mov_m32_imm32(dst, imm)) }
-emit_mov_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_mov_r64_imm32(dst, imm)) }
-emit_mov_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_mov_m64_imm32(dst, imm)) }
-emit_mov_r16_sreg                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: SREG) { append(instructions, inst_mov_r16_sreg(dst, src)) }
-emit_mov_m16_sreg                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: SREG) { append(instructions, inst_mov_m16_sreg(dst, src)) }
-emit_mov_r64_sreg                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: SREG) { append(instructions, inst_mov_r64_sreg(dst, src)) }
-emit_mov_m64_sreg                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: SREG) { append(instructions, inst_mov_m64_sreg(dst, src)) }
-emit_mov_sreg_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG, src: GPR16) { append(instructions, inst_mov_sreg_r16(dst, src)) }
-emit_mov_sreg_m16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG, src: Mem16) { append(instructions, inst_mov_sreg_m16(dst, src)) }
-emit_mov_sreg_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG, src: GPR64) { append(instructions, inst_mov_sreg_r64(dst, src)) }
-emit_mov_sreg_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG, src: Mem64) { append(instructions, inst_mov_sreg_m64(dst, src)) }
-emit_mov_r64_cr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: CREG) { append(instructions, inst_mov_r64_cr(dst, src)) }
-emit_mov_cr_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: CREG, src: GPR64) { append(instructions, inst_mov_cr_r64(dst, src)) }
-emit_mov_r64_dr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: DREG) { append(instructions, inst_mov_r64_dr(dst, src)) }
-emit_mov_dr_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: DREG, src: GPR64) { append(instructions, inst_mov_dr_r64(dst, src)) }
+emit_mov_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_mov_r8_r8(dst, src)) }
+emit_mov_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_mov_m8_r8(dst, src)) }
+emit_mov_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_mov_r16_r16(dst, src)) }
+emit_mov_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_mov_m16_r16(dst, src)) }
+emit_mov_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_mov_r32_r32(dst, src)) }
+emit_mov_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_mov_m32_r32(dst, src)) }
+emit_mov_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_mov_r64_r64(dst, src)) }
+emit_mov_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_mov_m64_r64(dst, src)) }
+emit_mov_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_mov_r8_m8(dst, src)) }
+emit_mov_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_mov_r16_m16(dst, src)) }
+emit_mov_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_mov_r32_m32(dst, src)) }
+emit_mov_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_mov_r64_m64(dst, src)) }
+emit_mov_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_mov_r8_imm8(dst, imm)) }
+emit_mov_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_mov_r16_imm16(dst, imm)) }
+emit_mov_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_mov_r32_imm32(dst, imm)) }
+emit_mov_r64_imm64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i64) { append_elem(instructions, inst_mov_r64_imm64(dst, imm)) }
+emit_mov_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_mov_m8_imm8(dst, imm)) }
+emit_mov_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_mov_m16_imm16(dst, imm)) }
+emit_mov_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_mov_m32_imm32(dst, imm)) }
+emit_mov_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_mov_r64_imm32(dst, imm)) }
+emit_mov_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_mov_m64_imm32(dst, imm)) }
+emit_mov_r16_sreg                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: SREG) { append_elem(instructions, inst_mov_r16_sreg(dst, src)) }
+emit_mov_m16_sreg                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: SREG) { append_elem(instructions, inst_mov_m16_sreg(dst, src)) }
+emit_mov_r64_sreg                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: SREG) { append_elem(instructions, inst_mov_r64_sreg(dst, src)) }
+emit_mov_m64_sreg                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: SREG) { append_elem(instructions, inst_mov_m64_sreg(dst, src)) }
+emit_mov_sreg_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG, src: GPR16) { append_elem(instructions, inst_mov_sreg_r16(dst, src)) }
+emit_mov_sreg_m16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG, src: Mem16) { append_elem(instructions, inst_mov_sreg_m16(dst, src)) }
+emit_mov_sreg_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG, src: GPR64) { append_elem(instructions, inst_mov_sreg_r64(dst, src)) }
+emit_mov_sreg_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG, src: Mem64) { append_elem(instructions, inst_mov_sreg_m64(dst, src)) }
+emit_mov_r64_cr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: CREG) { append_elem(instructions, inst_mov_r64_cr(dst, src)) }
+emit_mov_cr_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: CREG, src: GPR64) { append_elem(instructions, inst_mov_cr_r64(dst, src)) }
+emit_mov_r64_dr                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: DREG) { append_elem(instructions, inst_mov_r64_dr(dst, src)) }
+emit_mov_dr_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: DREG, src: GPR64) { append_elem(instructions, inst_mov_dr_r64(dst, src)) }
 inst_movabs_r64_imm64               :: #force_inline proc "contextless" (dst: GPR64, imm: i64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVABS, operand_count = 2, ops = {op_gpr64(dst), op_imm64(imm), {}, {}} }, 33) }
-emit_movabs_r64_imm64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i64) { append(instructions, inst_movabs_r64_imm64(dst, imm)) }
+emit_movabs_r64_imm64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i64) { append_elem(instructions, inst_movabs_r64_imm64(dst, imm)) }
 inst_movzx_r16_r8                   :: #force_inline proc "contextless" (dst: GPR16, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVZX, operand_count = 2, ops = {op_gpr16(dst), op_gpr8(src), {}, {}} }, 42) }
 inst_movzx_r16_m8                   :: #force_inline proc "contextless" (dst: GPR16, src: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVZX, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 1), {}, {}} }, 42) }
 inst_movzx_r32_r8                   :: #force_inline proc "contextless" (dst: GPR32, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVZX, operand_count = 2, ops = {op_gpr32(dst), op_gpr8(src), {}, {}} }, 43) }
@@ -149,16 +149,16 @@ inst_movzx_r32_r16                  :: #force_inline proc "contextless" (dst: GP
 inst_movzx_r32_m16                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVZX, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 2), {}, {}} }, 45) }
 inst_movzx_r64_r16                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVZX, operand_count = 2, ops = {op_gpr64(dst), op_gpr16(src), {}, {}} }, 46) }
 inst_movzx_r64_m16                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVZX, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 2), {}, {}} }, 46) }
-emit_movzx_r16_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR8) { append(instructions, inst_movzx_r16_r8(dst, src)) }
-emit_movzx_r16_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem8) { append(instructions, inst_movzx_r16_m8(dst, src)) }
-emit_movzx_r32_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR8) { append(instructions, inst_movzx_r32_r8(dst, src)) }
-emit_movzx_r32_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem8) { append(instructions, inst_movzx_r32_m8(dst, src)) }
-emit_movzx_r64_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR8) { append(instructions, inst_movzx_r64_r8(dst, src)) }
-emit_movzx_r64_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem8) { append(instructions, inst_movzx_r64_m8(dst, src)) }
-emit_movzx_r32_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR16) { append(instructions, inst_movzx_r32_r16(dst, src)) }
-emit_movzx_r32_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem16) { append(instructions, inst_movzx_r32_m16(dst, src)) }
-emit_movzx_r64_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR16) { append(instructions, inst_movzx_r64_r16(dst, src)) }
-emit_movzx_r64_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem16) { append(instructions, inst_movzx_r64_m16(dst, src)) }
+emit_movzx_r16_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR8) { append_elem(instructions, inst_movzx_r16_r8(dst, src)) }
+emit_movzx_r16_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem8) { append_elem(instructions, inst_movzx_r16_m8(dst, src)) }
+emit_movzx_r32_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR8) { append_elem(instructions, inst_movzx_r32_r8(dst, src)) }
+emit_movzx_r32_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem8) { append_elem(instructions, inst_movzx_r32_m8(dst, src)) }
+emit_movzx_r64_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR8) { append_elem(instructions, inst_movzx_r64_r8(dst, src)) }
+emit_movzx_r64_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem8) { append_elem(instructions, inst_movzx_r64_m8(dst, src)) }
+emit_movzx_r32_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR16) { append_elem(instructions, inst_movzx_r32_r16(dst, src)) }
+emit_movzx_r32_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem16) { append_elem(instructions, inst_movzx_r32_m16(dst, src)) }
+emit_movzx_r64_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR16) { append_elem(instructions, inst_movzx_r64_r16(dst, src)) }
+emit_movzx_r64_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem16) { append_elem(instructions, inst_movzx_r64_m16(dst, src)) }
 inst_movsx_r16_r8                   :: #force_inline proc "contextless" (dst: GPR16, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSX, operand_count = 2, ops = {op_gpr16(dst), op_gpr8(src), {}, {}} }, 47) }
 inst_movsx_r16_m8                   :: #force_inline proc "contextless" (dst: GPR16, src: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSX, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 1), {}, {}} }, 47) }
 inst_movsx_r32_r8                   :: #force_inline proc "contextless" (dst: GPR32, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSX, operand_count = 2, ops = {op_gpr32(dst), op_gpr8(src), {}, {}} }, 48) }
@@ -169,20 +169,20 @@ inst_movsx_r32_r16                  :: #force_inline proc "contextless" (dst: GP
 inst_movsx_r32_m16                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSX, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 2), {}, {}} }, 50) }
 inst_movsx_r64_r16                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSX, operand_count = 2, ops = {op_gpr64(dst), op_gpr16(src), {}, {}} }, 51) }
 inst_movsx_r64_m16                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSX, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 2), {}, {}} }, 51) }
-emit_movsx_r16_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR8) { append(instructions, inst_movsx_r16_r8(dst, src)) }
-emit_movsx_r16_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem8) { append(instructions, inst_movsx_r16_m8(dst, src)) }
-emit_movsx_r32_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR8) { append(instructions, inst_movsx_r32_r8(dst, src)) }
-emit_movsx_r32_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem8) { append(instructions, inst_movsx_r32_m8(dst, src)) }
-emit_movsx_r64_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR8) { append(instructions, inst_movsx_r64_r8(dst, src)) }
-emit_movsx_r64_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem8) { append(instructions, inst_movsx_r64_m8(dst, src)) }
-emit_movsx_r32_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR16) { append(instructions, inst_movsx_r32_r16(dst, src)) }
-emit_movsx_r32_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem16) { append(instructions, inst_movsx_r32_m16(dst, src)) }
-emit_movsx_r64_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR16) { append(instructions, inst_movsx_r64_r16(dst, src)) }
-emit_movsx_r64_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem16) { append(instructions, inst_movsx_r64_m16(dst, src)) }
+emit_movsx_r16_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR8) { append_elem(instructions, inst_movsx_r16_r8(dst, src)) }
+emit_movsx_r16_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem8) { append_elem(instructions, inst_movsx_r16_m8(dst, src)) }
+emit_movsx_r32_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR8) { append_elem(instructions, inst_movsx_r32_r8(dst, src)) }
+emit_movsx_r32_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem8) { append_elem(instructions, inst_movsx_r32_m8(dst, src)) }
+emit_movsx_r64_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR8) { append_elem(instructions, inst_movsx_r64_r8(dst, src)) }
+emit_movsx_r64_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem8) { append_elem(instructions, inst_movsx_r64_m8(dst, src)) }
+emit_movsx_r32_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR16) { append_elem(instructions, inst_movsx_r32_r16(dst, src)) }
+emit_movsx_r32_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem16) { append_elem(instructions, inst_movsx_r32_m16(dst, src)) }
+emit_movsx_r64_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR16) { append_elem(instructions, inst_movsx_r64_r16(dst, src)) }
+emit_movsx_r64_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem16) { append_elem(instructions, inst_movsx_r64_m16(dst, src)) }
 inst_movsxd_r64_r32                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSXD, operand_count = 2, ops = {op_gpr64(dst), op_gpr32(src), {}, {}} }, 52) }
 inst_movsxd_r64_m32                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSXD, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 4), {}, {}} }, 52) }
-emit_movsxd_r64_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR32) { append(instructions, inst_movsxd_r64_r32(dst, src)) }
-emit_movsxd_r64_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append(instructions, inst_movsxd_r64_m32(dst, src)) }
+emit_movsxd_r64_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR32) { append_elem(instructions, inst_movsxd_r64_r32(dst, src)) }
+emit_movsxd_r64_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append_elem(instructions, inst_movsxd_r64_m32(dst, src)) }
 inst_xchg_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .XCHG, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 53) }
 inst_xchg_r32                       :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .XCHG, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 54) }
 inst_xchg_r64                       :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .XCHG, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 55) }
@@ -194,17 +194,17 @@ inst_xchg_r32_r32                   :: #force_inline proc "contextless" (dst: GP
 inst_xchg_m32_r32                   :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .XCHG, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 58) }
 inst_xchg_r64_r64                   :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .XCHG, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 59) }
 inst_xchg_m64_r64                   :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .XCHG, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 59) }
-emit_xchg_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_xchg_r16(dst)) }
-emit_xchg_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_xchg_r32(dst)) }
-emit_xchg_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_xchg_r64(dst)) }
-emit_xchg_r8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_xchg_r8_r8(dst, src)) }
-emit_xchg_m8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_xchg_m8_r8(dst, src)) }
-emit_xchg_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_xchg_r16_r16(dst, src)) }
-emit_xchg_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_xchg_m16_r16(dst, src)) }
-emit_xchg_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_xchg_r32_r32(dst, src)) }
-emit_xchg_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_xchg_m32_r32(dst, src)) }
-emit_xchg_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_xchg_r64_r64(dst, src)) }
-emit_xchg_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_xchg_m64_r64(dst, src)) }
+emit_xchg_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_xchg_r16(dst)) }
+emit_xchg_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_xchg_r32(dst)) }
+emit_xchg_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_xchg_r64(dst)) }
+emit_xchg_r8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_xchg_r8_r8(dst, src)) }
+emit_xchg_m8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_xchg_m8_r8(dst, src)) }
+emit_xchg_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_xchg_r16_r16(dst, src)) }
+emit_xchg_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_xchg_m16_r16(dst, src)) }
+emit_xchg_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_xchg_r32_r32(dst, src)) }
+emit_xchg_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_xchg_m32_r32(dst, src)) }
+emit_xchg_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_xchg_r64_r64(dst, src)) }
+emit_xchg_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_xchg_m64_r64(dst, src)) }
 inst_push_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .PUSH, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 60) }
 inst_push_r64                       :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .PUSH, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 61) }
 inst_push_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .PUSH, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 62) }
@@ -212,29 +212,29 @@ inst_push_m64                       :: #force_inline proc "contextless" (dst: Me
 inst_push_imm16                     :: #force_inline proc "contextless" (imm: i16) -> Instruction { return with_hint(Instruction{ mnemonic = .PUSH, operand_count = 1, ops = {op_imm16(imm), {}, {}, {}} }, 65) }
 inst_push_imm32                     :: #force_inline proc "contextless" (imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .PUSH, operand_count = 1, ops = {op_imm32(imm), {}, {}, {}} }, 66) }
 inst_push_sreg                      :: #force_inline proc "contextless" (dst: SREG) -> Instruction { return with_hint(Instruction{ mnemonic = .PUSH, operand_count = 1, ops = {op_sreg(dst), {}, {}, {}} }, 67) }
-emit_push_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_push_r16(dst)) }
-emit_push_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_push_r64(dst)) }
-emit_push_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_push_m16(dst)) }
-emit_push_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_push_m64(dst)) }
-emit_push_imm16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_push_imm16(imm)) }
-emit_push_imm32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_push_imm32(imm)) }
-emit_push_sreg                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG) { append(instructions, inst_push_sreg(dst)) }
+emit_push_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_push_r16(dst)) }
+emit_push_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_push_r64(dst)) }
+emit_push_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_push_m16(dst)) }
+emit_push_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_push_m64(dst)) }
+emit_push_imm16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_push_imm16(imm)) }
+emit_push_imm32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_push_imm32(imm)) }
+emit_push_sreg                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG) { append_elem(instructions, inst_push_sreg(dst)) }
 inst_pop_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .POP, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 69) }
 inst_pop_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .POP, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 70) }
 inst_pop_m16                        :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .POP, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 71) }
 inst_pop_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .POP, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 72) }
 inst_pop_sreg                       :: #force_inline proc "contextless" (dst: SREG) -> Instruction { return with_hint(Instruction{ mnemonic = .POP, operand_count = 1, ops = {op_sreg(dst), {}, {}, {}} }, 73) }
-emit_pop_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_pop_r16(dst)) }
-emit_pop_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_pop_r64(dst)) }
-emit_pop_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_pop_m16(dst)) }
-emit_pop_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_pop_m64(dst)) }
-emit_pop_sreg                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG) { append(instructions, inst_pop_sreg(dst)) }
+emit_pop_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_pop_r16(dst)) }
+emit_pop_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_pop_r64(dst)) }
+emit_pop_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_pop_m16(dst)) }
+emit_pop_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_pop_m64(dst)) }
+emit_pop_sreg                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: SREG) { append_elem(instructions, inst_pop_sreg(dst)) }
 inst_lea_r16_m                      :: #force_inline proc "contextless" (dst: GPR16, src: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .LEA, operand_count = 2, ops = {op_gpr16(dst), op_mem(src, 0), {}, {}} }, 75) }
 inst_lea_r32_m                      :: #force_inline proc "contextless" (dst: GPR32, src: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .LEA, operand_count = 2, ops = {op_gpr32(dst), op_mem(src, 0), {}, {}} }, 76) }
 inst_lea_r64_m                      :: #force_inline proc "contextless" (dst: GPR64, src: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .LEA, operand_count = 2, ops = {op_gpr64(dst), op_mem(src, 0), {}, {}} }, 77) }
-emit_lea_r16_m                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Memory) { append(instructions, inst_lea_r16_m(dst, src)) }
-emit_lea_r32_m                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Memory) { append(instructions, inst_lea_r32_m(dst, src)) }
-emit_lea_r64_m                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Memory) { append(instructions, inst_lea_r64_m(dst, src)) }
+emit_lea_r16_m                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Memory) { append_elem(instructions, inst_lea_r16_m(dst, src)) }
+emit_lea_r32_m                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Memory) { append_elem(instructions, inst_lea_r32_m(dst, src)) }
+emit_lea_r64_m                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Memory) { append_elem(instructions, inst_lea_r64_m(dst, src)) }
 inst_add_r8_r8                      :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .ADD, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 78) }
 inst_add_m8_r8                      :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .ADD, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 78) }
 inst_add_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .ADD, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 79) }
@@ -258,29 +258,29 @@ inst_add_r32_imm32                  :: #force_inline proc "contextless" (dst: GP
 inst_add_m32_imm32                  :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 92) }
 inst_add_r64_imm32                  :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADD, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 93) }
 inst_add_m64_imm32                  :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 93) }
-emit_add_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_add_r8_r8(dst, src)) }
-emit_add_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_add_m8_r8(dst, src)) }
-emit_add_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_add_r16_r16(dst, src)) }
-emit_add_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_add_m16_r16(dst, src)) }
-emit_add_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_add_r32_r32(dst, src)) }
-emit_add_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_add_m32_r32(dst, src)) }
-emit_add_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_add_r64_r64(dst, src)) }
-emit_add_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_add_m64_r64(dst, src)) }
-emit_add_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_add_r8_m8(dst, src)) }
-emit_add_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_add_r16_m16(dst, src)) }
-emit_add_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_add_r32_m32(dst, src)) }
-emit_add_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_add_r64_m64(dst, src)) }
-emit_add_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_add_imm8(imm)) }
-emit_add_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_add_imm16(imm)) }
-emit_add_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_add_imm32(imm)) }
-emit_add_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_add_r8_imm8(dst, imm)) }
-emit_add_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_add_m8_imm8(dst, imm)) }
-emit_add_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_add_r16_imm16(dst, imm)) }
-emit_add_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_add_m16_imm16(dst, imm)) }
-emit_add_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_add_r32_imm32(dst, imm)) }
-emit_add_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_add_m32_imm32(dst, imm)) }
-emit_add_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_add_r64_imm32(dst, imm)) }
-emit_add_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_add_m64_imm32(dst, imm)) }
+emit_add_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_add_r8_r8(dst, src)) }
+emit_add_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_add_m8_r8(dst, src)) }
+emit_add_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_add_r16_r16(dst, src)) }
+emit_add_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_add_m16_r16(dst, src)) }
+emit_add_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_add_r32_r32(dst, src)) }
+emit_add_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_add_m32_r32(dst, src)) }
+emit_add_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_add_r64_r64(dst, src)) }
+emit_add_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_add_m64_r64(dst, src)) }
+emit_add_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_add_r8_m8(dst, src)) }
+emit_add_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_add_r16_m16(dst, src)) }
+emit_add_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_add_r32_m32(dst, src)) }
+emit_add_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_add_r64_m64(dst, src)) }
+emit_add_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_add_imm8(imm)) }
+emit_add_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_add_imm16(imm)) }
+emit_add_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_add_imm32(imm)) }
+emit_add_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_add_r8_imm8(dst, imm)) }
+emit_add_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_add_m8_imm8(dst, imm)) }
+emit_add_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_add_r16_imm16(dst, imm)) }
+emit_add_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_add_m16_imm16(dst, imm)) }
+emit_add_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_add_r32_imm32(dst, imm)) }
+emit_add_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_add_m32_imm32(dst, imm)) }
+emit_add_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_add_r64_imm32(dst, imm)) }
+emit_add_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_add_m64_imm32(dst, imm)) }
 inst_adc_r8_r8                      :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .ADC, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 97) }
 inst_adc_m8_r8                      :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .ADC, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 97) }
 inst_adc_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .ADC, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 98) }
@@ -304,29 +304,29 @@ inst_adc_r32_imm32                  :: #force_inline proc "contextless" (dst: GP
 inst_adc_m32_imm32                  :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADC, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 111) }
 inst_adc_r64_imm32                  :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADC, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 112) }
 inst_adc_m64_imm32                  :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADC, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 112) }
-emit_adc_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_adc_r8_r8(dst, src)) }
-emit_adc_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_adc_m8_r8(dst, src)) }
-emit_adc_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_adc_r16_r16(dst, src)) }
-emit_adc_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_adc_m16_r16(dst, src)) }
-emit_adc_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_adc_r32_r32(dst, src)) }
-emit_adc_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_adc_m32_r32(dst, src)) }
-emit_adc_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_adc_r64_r64(dst, src)) }
-emit_adc_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_adc_m64_r64(dst, src)) }
-emit_adc_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_adc_r8_m8(dst, src)) }
-emit_adc_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_adc_r16_m16(dst, src)) }
-emit_adc_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_adc_r32_m32(dst, src)) }
-emit_adc_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_adc_r64_m64(dst, src)) }
-emit_adc_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_adc_imm8(imm)) }
-emit_adc_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_adc_imm16(imm)) }
-emit_adc_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_adc_imm32(imm)) }
-emit_adc_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_adc_r8_imm8(dst, imm)) }
-emit_adc_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_adc_m8_imm8(dst, imm)) }
-emit_adc_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_adc_r16_imm16(dst, imm)) }
-emit_adc_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_adc_m16_imm16(dst, imm)) }
-emit_adc_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_adc_r32_imm32(dst, imm)) }
-emit_adc_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_adc_m32_imm32(dst, imm)) }
-emit_adc_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_adc_r64_imm32(dst, imm)) }
-emit_adc_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_adc_m64_imm32(dst, imm)) }
+emit_adc_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_adc_r8_r8(dst, src)) }
+emit_adc_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_adc_m8_r8(dst, src)) }
+emit_adc_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_adc_r16_r16(dst, src)) }
+emit_adc_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_adc_m16_r16(dst, src)) }
+emit_adc_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_adc_r32_r32(dst, src)) }
+emit_adc_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_adc_m32_r32(dst, src)) }
+emit_adc_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_adc_r64_r64(dst, src)) }
+emit_adc_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_adc_m64_r64(dst, src)) }
+emit_adc_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_adc_r8_m8(dst, src)) }
+emit_adc_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_adc_r16_m16(dst, src)) }
+emit_adc_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_adc_r32_m32(dst, src)) }
+emit_adc_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_adc_r64_m64(dst, src)) }
+emit_adc_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_adc_imm8(imm)) }
+emit_adc_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_adc_imm16(imm)) }
+emit_adc_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_adc_imm32(imm)) }
+emit_adc_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_adc_r8_imm8(dst, imm)) }
+emit_adc_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_adc_m8_imm8(dst, imm)) }
+emit_adc_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_adc_r16_imm16(dst, imm)) }
+emit_adc_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_adc_m16_imm16(dst, imm)) }
+emit_adc_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_adc_r32_imm32(dst, imm)) }
+emit_adc_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_adc_m32_imm32(dst, imm)) }
+emit_adc_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_adc_r64_imm32(dst, imm)) }
+emit_adc_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_adc_m64_imm32(dst, imm)) }
 inst_sub_r8_r8                      :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SUB, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 116) }
 inst_sub_m8_r8                      :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SUB, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 116) }
 inst_sub_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .SUB, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 117) }
@@ -350,29 +350,29 @@ inst_sub_r32_imm32                  :: #force_inline proc "contextless" (dst: GP
 inst_sub_m32_imm32                  :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .SUB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 130) }
 inst_sub_r64_imm32                  :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .SUB, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 131) }
 inst_sub_m64_imm32                  :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .SUB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 131) }
-emit_sub_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_sub_r8_r8(dst, src)) }
-emit_sub_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_sub_m8_r8(dst, src)) }
-emit_sub_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_sub_r16_r16(dst, src)) }
-emit_sub_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_sub_m16_r16(dst, src)) }
-emit_sub_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_sub_r32_r32(dst, src)) }
-emit_sub_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_sub_m32_r32(dst, src)) }
-emit_sub_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_sub_r64_r64(dst, src)) }
-emit_sub_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_sub_m64_r64(dst, src)) }
-emit_sub_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_sub_r8_m8(dst, src)) }
-emit_sub_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_sub_r16_m16(dst, src)) }
-emit_sub_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_sub_r32_m32(dst, src)) }
-emit_sub_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_sub_r64_m64(dst, src)) }
-emit_sub_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_sub_imm8(imm)) }
-emit_sub_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_sub_imm16(imm)) }
-emit_sub_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_sub_imm32(imm)) }
-emit_sub_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_sub_r8_imm8(dst, imm)) }
-emit_sub_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_sub_m8_imm8(dst, imm)) }
-emit_sub_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_sub_r16_imm16(dst, imm)) }
-emit_sub_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_sub_m16_imm16(dst, imm)) }
-emit_sub_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_sub_r32_imm32(dst, imm)) }
-emit_sub_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_sub_m32_imm32(dst, imm)) }
-emit_sub_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_sub_r64_imm32(dst, imm)) }
-emit_sub_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_sub_m64_imm32(dst, imm)) }
+emit_sub_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_sub_r8_r8(dst, src)) }
+emit_sub_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_sub_m8_r8(dst, src)) }
+emit_sub_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_sub_r16_r16(dst, src)) }
+emit_sub_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_sub_m16_r16(dst, src)) }
+emit_sub_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_sub_r32_r32(dst, src)) }
+emit_sub_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_sub_m32_r32(dst, src)) }
+emit_sub_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_sub_r64_r64(dst, src)) }
+emit_sub_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_sub_m64_r64(dst, src)) }
+emit_sub_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_sub_r8_m8(dst, src)) }
+emit_sub_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_sub_r16_m16(dst, src)) }
+emit_sub_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_sub_r32_m32(dst, src)) }
+emit_sub_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_sub_r64_m64(dst, src)) }
+emit_sub_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_sub_imm8(imm)) }
+emit_sub_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_sub_imm16(imm)) }
+emit_sub_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_sub_imm32(imm)) }
+emit_sub_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_sub_r8_imm8(dst, imm)) }
+emit_sub_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_sub_m8_imm8(dst, imm)) }
+emit_sub_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_sub_r16_imm16(dst, imm)) }
+emit_sub_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_sub_m16_imm16(dst, imm)) }
+emit_sub_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_sub_r32_imm32(dst, imm)) }
+emit_sub_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_sub_m32_imm32(dst, imm)) }
+emit_sub_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_sub_r64_imm32(dst, imm)) }
+emit_sub_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_sub_m64_imm32(dst, imm)) }
 inst_sbb_r8_r8                      :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SBB, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 135) }
 inst_sbb_m8_r8                      :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SBB, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 135) }
 inst_sbb_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .SBB, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 136) }
@@ -396,29 +396,29 @@ inst_sbb_r32_imm32                  :: #force_inline proc "contextless" (dst: GP
 inst_sbb_m32_imm32                  :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .SBB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 149) }
 inst_sbb_r64_imm32                  :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .SBB, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 150) }
 inst_sbb_m64_imm32                  :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .SBB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 150) }
-emit_sbb_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_sbb_r8_r8(dst, src)) }
-emit_sbb_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_sbb_m8_r8(dst, src)) }
-emit_sbb_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_sbb_r16_r16(dst, src)) }
-emit_sbb_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_sbb_m16_r16(dst, src)) }
-emit_sbb_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_sbb_r32_r32(dst, src)) }
-emit_sbb_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_sbb_m32_r32(dst, src)) }
-emit_sbb_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_sbb_r64_r64(dst, src)) }
-emit_sbb_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_sbb_m64_r64(dst, src)) }
-emit_sbb_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_sbb_r8_m8(dst, src)) }
-emit_sbb_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_sbb_r16_m16(dst, src)) }
-emit_sbb_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_sbb_r32_m32(dst, src)) }
-emit_sbb_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_sbb_r64_m64(dst, src)) }
-emit_sbb_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_sbb_imm8(imm)) }
-emit_sbb_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_sbb_imm16(imm)) }
-emit_sbb_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_sbb_imm32(imm)) }
-emit_sbb_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_sbb_r8_imm8(dst, imm)) }
-emit_sbb_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_sbb_m8_imm8(dst, imm)) }
-emit_sbb_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_sbb_r16_imm16(dst, imm)) }
-emit_sbb_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_sbb_m16_imm16(dst, imm)) }
-emit_sbb_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_sbb_r32_imm32(dst, imm)) }
-emit_sbb_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_sbb_m32_imm32(dst, imm)) }
-emit_sbb_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_sbb_r64_imm32(dst, imm)) }
-emit_sbb_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_sbb_m64_imm32(dst, imm)) }
+emit_sbb_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_sbb_r8_r8(dst, src)) }
+emit_sbb_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_sbb_m8_r8(dst, src)) }
+emit_sbb_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_sbb_r16_r16(dst, src)) }
+emit_sbb_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_sbb_m16_r16(dst, src)) }
+emit_sbb_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_sbb_r32_r32(dst, src)) }
+emit_sbb_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_sbb_m32_r32(dst, src)) }
+emit_sbb_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_sbb_r64_r64(dst, src)) }
+emit_sbb_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_sbb_m64_r64(dst, src)) }
+emit_sbb_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_sbb_r8_m8(dst, src)) }
+emit_sbb_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_sbb_r16_m16(dst, src)) }
+emit_sbb_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_sbb_r32_m32(dst, src)) }
+emit_sbb_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_sbb_r64_m64(dst, src)) }
+emit_sbb_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_sbb_imm8(imm)) }
+emit_sbb_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_sbb_imm16(imm)) }
+emit_sbb_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_sbb_imm32(imm)) }
+emit_sbb_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_sbb_r8_imm8(dst, imm)) }
+emit_sbb_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_sbb_m8_imm8(dst, imm)) }
+emit_sbb_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_sbb_r16_imm16(dst, imm)) }
+emit_sbb_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_sbb_m16_imm16(dst, imm)) }
+emit_sbb_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_sbb_r32_imm32(dst, imm)) }
+emit_sbb_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_sbb_m32_imm32(dst, imm)) }
+emit_sbb_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_sbb_r64_imm32(dst, imm)) }
+emit_sbb_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_sbb_m64_imm32(dst, imm)) }
 inst_mul_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .MUL, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 154) }
 inst_mul_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .MUL, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 154) }
 inst_mul_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .MUL, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 155) }
@@ -427,14 +427,14 @@ inst_mul_r32                        :: #force_inline proc "contextless" (dst: GP
 inst_mul_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MUL, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 156) }
 inst_mul_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .MUL, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 157) }
 inst_mul_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MUL, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 157) }
-emit_mul_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_mul_r8(dst)) }
-emit_mul_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_mul_m8(dst)) }
-emit_mul_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_mul_r16(dst)) }
-emit_mul_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_mul_m16(dst)) }
-emit_mul_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_mul_r32(dst)) }
-emit_mul_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_mul_m32(dst)) }
-emit_mul_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_mul_r64(dst)) }
-emit_mul_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_mul_m64(dst)) }
+emit_mul_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_mul_r8(dst)) }
+emit_mul_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_mul_m8(dst)) }
+emit_mul_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_mul_r16(dst)) }
+emit_mul_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_mul_m16(dst)) }
+emit_mul_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_mul_r32(dst)) }
+emit_mul_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_mul_m32(dst)) }
+emit_mul_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_mul_r64(dst)) }
+emit_mul_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_mul_m64(dst)) }
 inst_imul_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .IMUL, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 158) }
 inst_imul_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .IMUL, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 158) }
 inst_imul_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .IMUL, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 159) }
@@ -455,26 +455,26 @@ inst_imul_r32_r32_imm32             :: #force_inline proc "contextless" (dst: GP
 inst_imul_r32_m32_imm32             :: #force_inline proc "contextless" (dst: GPR32, src: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .IMUL, operand_count = 3, ops = {op_gpr32(dst), op_mem(src.mem, 4), op_imm32(imm), {}} }, 169) }
 inst_imul_r64_r64_imm32             :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .IMUL, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_imm32(imm), {}} }, 170) }
 inst_imul_r64_m64_imm32             :: #force_inline proc "contextless" (dst: GPR64, src: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .IMUL, operand_count = 3, ops = {op_gpr64(dst), op_mem(src.mem, 8), op_imm32(imm), {}} }, 170) }
-emit_imul_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_imul_r8(dst)) }
-emit_imul_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_imul_m8(dst)) }
-emit_imul_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_imul_r16(dst)) }
-emit_imul_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_imul_m16(dst)) }
-emit_imul_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_imul_r32(dst)) }
-emit_imul_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_imul_m32(dst)) }
-emit_imul_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_imul_r64(dst)) }
-emit_imul_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_imul_m64(dst)) }
-emit_imul_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_imul_r16_r16(dst, src)) }
-emit_imul_r16_m16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_imul_r16_m16(dst, src)) }
-emit_imul_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_imul_r32_r32(dst, src)) }
-emit_imul_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_imul_r32_m32(dst, src)) }
-emit_imul_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_imul_r64_r64(dst, src)) }
-emit_imul_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_imul_r64_m64(dst, src)) }
-emit_imul_r16_r16_imm16             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16, imm: i16) { append(instructions, inst_imul_r16_r16_imm16(dst, src, imm)) }
-emit_imul_r16_m16_imm16             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16, imm: i16) { append(instructions, inst_imul_r16_m16_imm16(dst, src, imm)) }
-emit_imul_r32_r32_imm32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, imm: i32) { append(instructions, inst_imul_r32_r32_imm32(dst, src, imm)) }
-emit_imul_r32_m32_imm32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, imm: i32) { append(instructions, inst_imul_r32_m32_imm32(dst, src, imm)) }
-emit_imul_r64_r64_imm32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, imm: i32) { append(instructions, inst_imul_r64_r64_imm32(dst, src, imm)) }
-emit_imul_r64_m64_imm32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, imm: i32) { append(instructions, inst_imul_r64_m64_imm32(dst, src, imm)) }
+emit_imul_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_imul_r8(dst)) }
+emit_imul_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_imul_m8(dst)) }
+emit_imul_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_imul_r16(dst)) }
+emit_imul_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_imul_m16(dst)) }
+emit_imul_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_imul_r32(dst)) }
+emit_imul_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_imul_m32(dst)) }
+emit_imul_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_imul_r64(dst)) }
+emit_imul_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_imul_m64(dst)) }
+emit_imul_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_imul_r16_r16(dst, src)) }
+emit_imul_r16_m16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_imul_r16_m16(dst, src)) }
+emit_imul_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_imul_r32_r32(dst, src)) }
+emit_imul_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_imul_r32_m32(dst, src)) }
+emit_imul_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_imul_r64_r64(dst, src)) }
+emit_imul_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_imul_r64_m64(dst, src)) }
+emit_imul_r16_r16_imm16             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16, imm: i16) { append_elem(instructions, inst_imul_r16_r16_imm16(dst, src, imm)) }
+emit_imul_r16_m16_imm16             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16, imm: i16) { append_elem(instructions, inst_imul_r16_m16_imm16(dst, src, imm)) }
+emit_imul_r32_r32_imm32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, imm: i32) { append_elem(instructions, inst_imul_r32_r32_imm32(dst, src, imm)) }
+emit_imul_r32_m32_imm32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, imm: i32) { append_elem(instructions, inst_imul_r32_m32_imm32(dst, src, imm)) }
+emit_imul_r64_r64_imm32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, imm: i32) { append_elem(instructions, inst_imul_r64_r64_imm32(dst, src, imm)) }
+emit_imul_r64_m64_imm32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, imm: i32) { append_elem(instructions, inst_imul_r64_m64_imm32(dst, src, imm)) }
 inst_div_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .DIV, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 171) }
 inst_div_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .DIV, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 171) }
 inst_div_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .DIV, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 172) }
@@ -483,14 +483,14 @@ inst_div_r32                        :: #force_inline proc "contextless" (dst: GP
 inst_div_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .DIV, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 173) }
 inst_div_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .DIV, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 174) }
 inst_div_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .DIV, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 174) }
-emit_div_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_div_r8(dst)) }
-emit_div_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_div_m8(dst)) }
-emit_div_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_div_r16(dst)) }
-emit_div_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_div_m16(dst)) }
-emit_div_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_div_r32(dst)) }
-emit_div_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_div_m32(dst)) }
-emit_div_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_div_r64(dst)) }
-emit_div_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_div_m64(dst)) }
+emit_div_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_div_r8(dst)) }
+emit_div_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_div_m8(dst)) }
+emit_div_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_div_r16(dst)) }
+emit_div_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_div_m16(dst)) }
+emit_div_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_div_r32(dst)) }
+emit_div_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_div_m32(dst)) }
+emit_div_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_div_r64(dst)) }
+emit_div_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_div_m64(dst)) }
 inst_idiv_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .IDIV, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 175) }
 inst_idiv_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .IDIV, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 175) }
 inst_idiv_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .IDIV, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 176) }
@@ -499,14 +499,14 @@ inst_idiv_r32                       :: #force_inline proc "contextless" (dst: GP
 inst_idiv_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .IDIV, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 177) }
 inst_idiv_r64                       :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .IDIV, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 178) }
 inst_idiv_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .IDIV, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 178) }
-emit_idiv_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_idiv_r8(dst)) }
-emit_idiv_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_idiv_m8(dst)) }
-emit_idiv_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_idiv_r16(dst)) }
-emit_idiv_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_idiv_m16(dst)) }
-emit_idiv_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_idiv_r32(dst)) }
-emit_idiv_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_idiv_m32(dst)) }
-emit_idiv_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_idiv_r64(dst)) }
-emit_idiv_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_idiv_m64(dst)) }
+emit_idiv_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_idiv_r8(dst)) }
+emit_idiv_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_idiv_m8(dst)) }
+emit_idiv_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_idiv_r16(dst)) }
+emit_idiv_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_idiv_m16(dst)) }
+emit_idiv_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_idiv_r32(dst)) }
+emit_idiv_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_idiv_m32(dst)) }
+emit_idiv_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_idiv_r64(dst)) }
+emit_idiv_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_idiv_m64(dst)) }
 inst_inc_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .INC, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 179) }
 inst_inc_r32                        :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .INC, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 180) }
 inst_inc_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .INC, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 181) }
@@ -515,14 +515,14 @@ inst_inc_m16                        :: #force_inline proc "contextless" (dst: Me
 inst_inc_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .INC, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 183) }
 inst_inc_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .INC, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 184) }
 inst_inc_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .INC, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 184) }
-emit_inc_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_inc_r16(dst)) }
-emit_inc_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_inc_r32(dst)) }
-emit_inc_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_inc_r8(dst)) }
-emit_inc_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_inc_m8(dst)) }
-emit_inc_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_inc_m16(dst)) }
-emit_inc_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_inc_m32(dst)) }
-emit_inc_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_inc_r64(dst)) }
-emit_inc_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_inc_m64(dst)) }
+emit_inc_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_inc_r16(dst)) }
+emit_inc_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_inc_r32(dst)) }
+emit_inc_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_inc_r8(dst)) }
+emit_inc_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_inc_m8(dst)) }
+emit_inc_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_inc_m16(dst)) }
+emit_inc_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_inc_m32(dst)) }
+emit_inc_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_inc_r64(dst)) }
+emit_inc_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_inc_m64(dst)) }
 inst_dec_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .DEC, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 185) }
 inst_dec_r32                        :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .DEC, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 186) }
 inst_dec_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .DEC, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 187) }
@@ -531,14 +531,14 @@ inst_dec_m16                        :: #force_inline proc "contextless" (dst: Me
 inst_dec_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .DEC, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 189) }
 inst_dec_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .DEC, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 190) }
 inst_dec_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .DEC, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 190) }
-emit_dec_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_dec_r16(dst)) }
-emit_dec_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_dec_r32(dst)) }
-emit_dec_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_dec_r8(dst)) }
-emit_dec_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_dec_m8(dst)) }
-emit_dec_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_dec_m16(dst)) }
-emit_dec_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_dec_m32(dst)) }
-emit_dec_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_dec_r64(dst)) }
-emit_dec_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_dec_m64(dst)) }
+emit_dec_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_dec_r16(dst)) }
+emit_dec_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_dec_r32(dst)) }
+emit_dec_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_dec_r8(dst)) }
+emit_dec_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_dec_m8(dst)) }
+emit_dec_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_dec_m16(dst)) }
+emit_dec_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_dec_m32(dst)) }
+emit_dec_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_dec_r64(dst)) }
+emit_dec_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_dec_m64(dst)) }
 inst_neg_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .NEG, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 191) }
 inst_neg_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .NEG, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 191) }
 inst_neg_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .NEG, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 192) }
@@ -547,14 +547,14 @@ inst_neg_r32                        :: #force_inline proc "contextless" (dst: GP
 inst_neg_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .NEG, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 193) }
 inst_neg_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .NEG, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 194) }
 inst_neg_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .NEG, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 194) }
-emit_neg_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_neg_r8(dst)) }
-emit_neg_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_neg_m8(dst)) }
-emit_neg_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_neg_r16(dst)) }
-emit_neg_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_neg_m16(dst)) }
-emit_neg_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_neg_r32(dst)) }
-emit_neg_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_neg_m32(dst)) }
-emit_neg_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_neg_r64(dst)) }
-emit_neg_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_neg_m64(dst)) }
+emit_neg_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_neg_r8(dst)) }
+emit_neg_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_neg_m8(dst)) }
+emit_neg_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_neg_r16(dst)) }
+emit_neg_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_neg_m16(dst)) }
+emit_neg_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_neg_r32(dst)) }
+emit_neg_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_neg_m32(dst)) }
+emit_neg_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_neg_r64(dst)) }
+emit_neg_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_neg_m64(dst)) }
 inst_cmp_r8_r8                      :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMP, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 195) }
 inst_cmp_m8_r8                      :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMP, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 195) }
 inst_cmp_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMP, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 196) }
@@ -578,29 +578,29 @@ inst_cmp_r32_imm32                  :: #force_inline proc "contextless" (dst: GP
 inst_cmp_m32_imm32                  :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMP, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 209) }
 inst_cmp_r64_imm32                  :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMP, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 210) }
 inst_cmp_m64_imm32                  :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMP, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 210) }
-emit_cmp_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_cmp_r8_r8(dst, src)) }
-emit_cmp_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_cmp_m8_r8(dst, src)) }
-emit_cmp_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmp_r16_r16(dst, src)) }
-emit_cmp_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_cmp_m16_r16(dst, src)) }
-emit_cmp_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmp_r32_r32(dst, src)) }
-emit_cmp_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_cmp_m32_r32(dst, src)) }
-emit_cmp_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmp_r64_r64(dst, src)) }
-emit_cmp_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_cmp_m64_r64(dst, src)) }
-emit_cmp_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_cmp_r8_m8(dst, src)) }
-emit_cmp_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmp_r16_m16(dst, src)) }
-emit_cmp_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmp_r32_m32(dst, src)) }
-emit_cmp_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmp_r64_m64(dst, src)) }
-emit_cmp_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_cmp_imm8(imm)) }
-emit_cmp_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_cmp_imm16(imm)) }
-emit_cmp_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_cmp_imm32(imm)) }
-emit_cmp_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_cmp_r8_imm8(dst, imm)) }
-emit_cmp_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_cmp_m8_imm8(dst, imm)) }
-emit_cmp_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_cmp_r16_imm16(dst, imm)) }
-emit_cmp_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_cmp_m16_imm16(dst, imm)) }
-emit_cmp_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_cmp_r32_imm32(dst, imm)) }
-emit_cmp_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_cmp_m32_imm32(dst, imm)) }
-emit_cmp_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_cmp_r64_imm32(dst, imm)) }
-emit_cmp_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_cmp_m64_imm32(dst, imm)) }
+emit_cmp_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_cmp_r8_r8(dst, src)) }
+emit_cmp_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_cmp_m8_r8(dst, src)) }
+emit_cmp_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmp_r16_r16(dst, src)) }
+emit_cmp_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_cmp_m16_r16(dst, src)) }
+emit_cmp_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmp_r32_r32(dst, src)) }
+emit_cmp_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_cmp_m32_r32(dst, src)) }
+emit_cmp_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmp_r64_r64(dst, src)) }
+emit_cmp_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_cmp_m64_r64(dst, src)) }
+emit_cmp_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_cmp_r8_m8(dst, src)) }
+emit_cmp_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmp_r16_m16(dst, src)) }
+emit_cmp_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmp_r32_m32(dst, src)) }
+emit_cmp_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmp_r64_m64(dst, src)) }
+emit_cmp_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_cmp_imm8(imm)) }
+emit_cmp_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_cmp_imm16(imm)) }
+emit_cmp_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_cmp_imm32(imm)) }
+emit_cmp_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_cmp_r8_imm8(dst, imm)) }
+emit_cmp_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_cmp_m8_imm8(dst, imm)) }
+emit_cmp_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_cmp_r16_imm16(dst, imm)) }
+emit_cmp_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_cmp_m16_imm16(dst, imm)) }
+emit_cmp_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_cmp_r32_imm32(dst, imm)) }
+emit_cmp_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_cmp_m32_imm32(dst, imm)) }
+emit_cmp_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_cmp_r64_imm32(dst, imm)) }
+emit_cmp_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_cmp_m64_imm32(dst, imm)) }
 inst_and_r8_r8                      :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .AND, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 214) }
 inst_and_m8_r8                      :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .AND, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 214) }
 inst_and_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .AND, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 215) }
@@ -624,29 +624,29 @@ inst_and_r32_imm32                  :: #force_inline proc "contextless" (dst: GP
 inst_and_m32_imm32                  :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .AND, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 228) }
 inst_and_r64_imm32                  :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .AND, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 229) }
 inst_and_m64_imm32                  :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .AND, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 229) }
-emit_and_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_and_r8_r8(dst, src)) }
-emit_and_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_and_m8_r8(dst, src)) }
-emit_and_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_and_r16_r16(dst, src)) }
-emit_and_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_and_m16_r16(dst, src)) }
-emit_and_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_and_r32_r32(dst, src)) }
-emit_and_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_and_m32_r32(dst, src)) }
-emit_and_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_and_r64_r64(dst, src)) }
-emit_and_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_and_m64_r64(dst, src)) }
-emit_and_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_and_r8_m8(dst, src)) }
-emit_and_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_and_r16_m16(dst, src)) }
-emit_and_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_and_r32_m32(dst, src)) }
-emit_and_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_and_r64_m64(dst, src)) }
-emit_and_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_and_imm8(imm)) }
-emit_and_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_and_imm16(imm)) }
-emit_and_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_and_imm32(imm)) }
-emit_and_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_and_r8_imm8(dst, imm)) }
-emit_and_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_and_m8_imm8(dst, imm)) }
-emit_and_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_and_r16_imm16(dst, imm)) }
-emit_and_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_and_m16_imm16(dst, imm)) }
-emit_and_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_and_r32_imm32(dst, imm)) }
-emit_and_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_and_m32_imm32(dst, imm)) }
-emit_and_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_and_r64_imm32(dst, imm)) }
-emit_and_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_and_m64_imm32(dst, imm)) }
+emit_and_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_and_r8_r8(dst, src)) }
+emit_and_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_and_m8_r8(dst, src)) }
+emit_and_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_and_r16_r16(dst, src)) }
+emit_and_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_and_m16_r16(dst, src)) }
+emit_and_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_and_r32_r32(dst, src)) }
+emit_and_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_and_m32_r32(dst, src)) }
+emit_and_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_and_r64_r64(dst, src)) }
+emit_and_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_and_m64_r64(dst, src)) }
+emit_and_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_and_r8_m8(dst, src)) }
+emit_and_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_and_r16_m16(dst, src)) }
+emit_and_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_and_r32_m32(dst, src)) }
+emit_and_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_and_r64_m64(dst, src)) }
+emit_and_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_and_imm8(imm)) }
+emit_and_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_and_imm16(imm)) }
+emit_and_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_and_imm32(imm)) }
+emit_and_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_and_r8_imm8(dst, imm)) }
+emit_and_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_and_m8_imm8(dst, imm)) }
+emit_and_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_and_r16_imm16(dst, imm)) }
+emit_and_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_and_m16_imm16(dst, imm)) }
+emit_and_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_and_r32_imm32(dst, imm)) }
+emit_and_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_and_m32_imm32(dst, imm)) }
+emit_and_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_and_r64_imm32(dst, imm)) }
+emit_and_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_and_m64_imm32(dst, imm)) }
 inst_or_r8_r8                       :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .OR, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 233) }
 inst_or_m8_r8                       :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .OR, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 233) }
 inst_or_r16_r16                     :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .OR, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 234) }
@@ -670,29 +670,29 @@ inst_or_r32_imm32                   :: #force_inline proc "contextless" (dst: GP
 inst_or_m32_imm32                   :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .OR, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 247) }
 inst_or_r64_imm32                   :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .OR, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 248) }
 inst_or_m64_imm32                   :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .OR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 248) }
-emit_or_r8_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_or_r8_r8(dst, src)) }
-emit_or_m8_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_or_m8_r8(dst, src)) }
-emit_or_r16_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_or_r16_r16(dst, src)) }
-emit_or_m16_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_or_m16_r16(dst, src)) }
-emit_or_r32_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_or_r32_r32(dst, src)) }
-emit_or_m32_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_or_m32_r32(dst, src)) }
-emit_or_r64_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_or_r64_r64(dst, src)) }
-emit_or_m64_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_or_m64_r64(dst, src)) }
-emit_or_r8_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_or_r8_m8(dst, src)) }
-emit_or_r16_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_or_r16_m16(dst, src)) }
-emit_or_r32_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_or_r32_m32(dst, src)) }
-emit_or_r64_m64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_or_r64_m64(dst, src)) }
-emit_or_imm8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_or_imm8(imm)) }
-emit_or_imm16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_or_imm16(imm)) }
-emit_or_imm32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_or_imm32(imm)) }
-emit_or_r8_imm8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_or_r8_imm8(dst, imm)) }
-emit_or_m8_imm8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_or_m8_imm8(dst, imm)) }
-emit_or_r16_imm16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_or_r16_imm16(dst, imm)) }
-emit_or_m16_imm16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_or_m16_imm16(dst, imm)) }
-emit_or_r32_imm32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_or_r32_imm32(dst, imm)) }
-emit_or_m32_imm32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_or_m32_imm32(dst, imm)) }
-emit_or_r64_imm32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_or_r64_imm32(dst, imm)) }
-emit_or_m64_imm32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_or_m64_imm32(dst, imm)) }
+emit_or_r8_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_or_r8_r8(dst, src)) }
+emit_or_m8_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_or_m8_r8(dst, src)) }
+emit_or_r16_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_or_r16_r16(dst, src)) }
+emit_or_m16_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_or_m16_r16(dst, src)) }
+emit_or_r32_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_or_r32_r32(dst, src)) }
+emit_or_m32_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_or_m32_r32(dst, src)) }
+emit_or_r64_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_or_r64_r64(dst, src)) }
+emit_or_m64_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_or_m64_r64(dst, src)) }
+emit_or_r8_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_or_r8_m8(dst, src)) }
+emit_or_r16_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_or_r16_m16(dst, src)) }
+emit_or_r32_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_or_r32_m32(dst, src)) }
+emit_or_r64_m64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_or_r64_m64(dst, src)) }
+emit_or_imm8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_or_imm8(imm)) }
+emit_or_imm16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_or_imm16(imm)) }
+emit_or_imm32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_or_imm32(imm)) }
+emit_or_r8_imm8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_or_r8_imm8(dst, imm)) }
+emit_or_m8_imm8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_or_m8_imm8(dst, imm)) }
+emit_or_r16_imm16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_or_r16_imm16(dst, imm)) }
+emit_or_m16_imm16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_or_m16_imm16(dst, imm)) }
+emit_or_r32_imm32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_or_r32_imm32(dst, imm)) }
+emit_or_m32_imm32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_or_m32_imm32(dst, imm)) }
+emit_or_r64_imm32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_or_r64_imm32(dst, imm)) }
+emit_or_m64_imm32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_or_m64_imm32(dst, imm)) }
 inst_xor_r8_r8                      :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .XOR, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 252) }
 inst_xor_m8_r8                      :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .XOR, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 252) }
 inst_xor_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .XOR, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 253) }
@@ -716,29 +716,29 @@ inst_xor_r32_imm32                  :: #force_inline proc "contextless" (dst: GP
 inst_xor_m32_imm32                  :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .XOR, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 266) }
 inst_xor_r64_imm32                  :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .XOR, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 267) }
 inst_xor_m64_imm32                  :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .XOR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 267) }
-emit_xor_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_xor_r8_r8(dst, src)) }
-emit_xor_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_xor_m8_r8(dst, src)) }
-emit_xor_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_xor_r16_r16(dst, src)) }
-emit_xor_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_xor_m16_r16(dst, src)) }
-emit_xor_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_xor_r32_r32(dst, src)) }
-emit_xor_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_xor_m32_r32(dst, src)) }
-emit_xor_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_xor_r64_r64(dst, src)) }
-emit_xor_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_xor_m64_r64(dst, src)) }
-emit_xor_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append(instructions, inst_xor_r8_m8(dst, src)) }
-emit_xor_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_xor_r16_m16(dst, src)) }
-emit_xor_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_xor_r32_m32(dst, src)) }
-emit_xor_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_xor_r64_m64(dst, src)) }
-emit_xor_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_xor_imm8(imm)) }
-emit_xor_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_xor_imm16(imm)) }
-emit_xor_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_xor_imm32(imm)) }
-emit_xor_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_xor_r8_imm8(dst, imm)) }
-emit_xor_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_xor_m8_imm8(dst, imm)) }
-emit_xor_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_xor_r16_imm16(dst, imm)) }
-emit_xor_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_xor_m16_imm16(dst, imm)) }
-emit_xor_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_xor_r32_imm32(dst, imm)) }
-emit_xor_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_xor_m32_imm32(dst, imm)) }
-emit_xor_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_xor_r64_imm32(dst, imm)) }
-emit_xor_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_xor_m64_imm32(dst, imm)) }
+emit_xor_r8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_xor_r8_r8(dst, src)) }
+emit_xor_m8_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_xor_m8_r8(dst, src)) }
+emit_xor_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_xor_r16_r16(dst, src)) }
+emit_xor_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_xor_m16_r16(dst, src)) }
+emit_xor_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_xor_r32_r32(dst, src)) }
+emit_xor_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_xor_m32_r32(dst, src)) }
+emit_xor_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_xor_r64_r64(dst, src)) }
+emit_xor_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_xor_m64_r64(dst, src)) }
+emit_xor_r8_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: Mem8) { append_elem(instructions, inst_xor_r8_m8(dst, src)) }
+emit_xor_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_xor_r16_m16(dst, src)) }
+emit_xor_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_xor_r32_m32(dst, src)) }
+emit_xor_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_xor_r64_m64(dst, src)) }
+emit_xor_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_xor_imm8(imm)) }
+emit_xor_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_xor_imm16(imm)) }
+emit_xor_imm32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_xor_imm32(imm)) }
+emit_xor_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_xor_r8_imm8(dst, imm)) }
+emit_xor_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_xor_m8_imm8(dst, imm)) }
+emit_xor_r16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_xor_r16_imm16(dst, imm)) }
+emit_xor_m16_imm16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_xor_m16_imm16(dst, imm)) }
+emit_xor_r32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_xor_r32_imm32(dst, imm)) }
+emit_xor_m32_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_xor_m32_imm32(dst, imm)) }
+emit_xor_r64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_xor_r64_imm32(dst, imm)) }
+emit_xor_m64_imm32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_xor_m64_imm32(dst, imm)) }
 inst_not_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .NOT, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 271) }
 inst_not_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .NOT, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 271) }
 inst_not_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .NOT, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 272) }
@@ -747,14 +747,14 @@ inst_not_r32                        :: #force_inline proc "contextless" (dst: GP
 inst_not_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .NOT, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 273) }
 inst_not_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .NOT, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 274) }
 inst_not_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .NOT, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 274) }
-emit_not_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_not_r8(dst)) }
-emit_not_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_not_m8(dst)) }
-emit_not_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_not_r16(dst)) }
-emit_not_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_not_m16(dst)) }
-emit_not_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_not_r32(dst)) }
-emit_not_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_not_m32(dst)) }
-emit_not_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_not_r64(dst)) }
-emit_not_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_not_m64(dst)) }
+emit_not_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_not_r8(dst)) }
+emit_not_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_not_m8(dst)) }
+emit_not_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_not_r16(dst)) }
+emit_not_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_not_m16(dst)) }
+emit_not_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_not_r32(dst)) }
+emit_not_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_not_m32(dst)) }
+emit_not_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_not_r64(dst)) }
+emit_not_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_not_m64(dst)) }
 inst_test_r8_r8                     :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .TEST, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 275) }
 inst_test_m8_r8                     :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .TEST, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 275) }
 inst_test_r16_r16                   :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .TEST, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 276) }
@@ -774,25 +774,25 @@ inst_test_r32_imm32                 :: #force_inline proc "contextless" (dst: GP
 inst_test_m32_imm32                 :: #force_inline proc "contextless" (dst: Mem32, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .TEST, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm32(imm), {}, {}} }, 285) }
 inst_test_r64_imm32                 :: #force_inline proc "contextless" (dst: GPR64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .TEST, operand_count = 2, ops = {op_gpr64(dst), op_imm32(imm), {}, {}} }, 286) }
 inst_test_m64_imm32                 :: #force_inline proc "contextless" (dst: Mem64, imm: i32) -> Instruction { return with_hint(Instruction{ mnemonic = .TEST, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm32(imm), {}, {}} }, 286) }
-emit_test_r8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_test_r8_r8(dst, src)) }
-emit_test_m8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_test_m8_r8(dst, src)) }
-emit_test_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_test_r16_r16(dst, src)) }
-emit_test_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_test_m16_r16(dst, src)) }
-emit_test_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_test_r32_r32(dst, src)) }
-emit_test_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_test_m32_r32(dst, src)) }
-emit_test_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_test_r64_r64(dst, src)) }
-emit_test_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_test_m64_r64(dst, src)) }
-emit_test_imm8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_test_imm8(imm)) }
-emit_test_imm16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_test_imm16(imm)) }
-emit_test_imm32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append(instructions, inst_test_imm32(imm)) }
-emit_test_r8_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_test_r8_imm8(dst, imm)) }
-emit_test_m8_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_test_m8_imm8(dst, imm)) }
-emit_test_r16_imm16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append(instructions, inst_test_r16_imm16(dst, imm)) }
-emit_test_m16_imm16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append(instructions, inst_test_m16_imm16(dst, imm)) }
-emit_test_r32_imm32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append(instructions, inst_test_r32_imm32(dst, imm)) }
-emit_test_m32_imm32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append(instructions, inst_test_m32_imm32(dst, imm)) }
-emit_test_r64_imm32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append(instructions, inst_test_r64_imm32(dst, imm)) }
-emit_test_m64_imm32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append(instructions, inst_test_m64_imm32(dst, imm)) }
+emit_test_r8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_test_r8_r8(dst, src)) }
+emit_test_m8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_test_m8_r8(dst, src)) }
+emit_test_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_test_r16_r16(dst, src)) }
+emit_test_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_test_m16_r16(dst, src)) }
+emit_test_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_test_r32_r32(dst, src)) }
+emit_test_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_test_m32_r32(dst, src)) }
+emit_test_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_test_r64_r64(dst, src)) }
+emit_test_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_test_m64_r64(dst, src)) }
+emit_test_imm8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_test_imm8(imm)) }
+emit_test_imm16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_test_imm16(imm)) }
+emit_test_imm32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i32) { append_elem(instructions, inst_test_imm32(imm)) }
+emit_test_r8_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_test_r8_imm8(dst, imm)) }
+emit_test_m8_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_test_m8_imm8(dst, imm)) }
+emit_test_r16_imm16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i16) { append_elem(instructions, inst_test_r16_imm16(dst, imm)) }
+emit_test_m16_imm16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i16) { append_elem(instructions, inst_test_m16_imm16(dst, imm)) }
+emit_test_r32_imm32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i32) { append_elem(instructions, inst_test_r32_imm32(dst, imm)) }
+emit_test_m32_imm32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i32) { append_elem(instructions, inst_test_m32_imm32(dst, imm)) }
+emit_test_r64_imm32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i32) { append_elem(instructions, inst_test_r64_imm32(dst, imm)) }
+emit_test_m64_imm32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i32) { append_elem(instructions, inst_test_m64_imm32(dst, imm)) }
 inst_shl_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHL, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 287) }
 inst_shl_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHL, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 287) }
 inst_shl_r8_imm8                    :: #force_inline proc "contextless" (dst: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHL, operand_count = 2, ops = {op_gpr8(dst), op_imm8(imm), {}, {}} }, 289) }
@@ -809,22 +809,22 @@ inst_shl_r64                        :: #force_inline proc "contextless" (dst: GP
 inst_shl_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHL, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 296) }
 inst_shl_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHL, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 298) }
 inst_shl_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHL, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 298) }
-emit_shl_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_shl_r8(dst)) }
-emit_shl_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_shl_m8(dst)) }
-emit_shl_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_shl_r8_imm8(dst, imm)) }
-emit_shl_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_shl_m8_imm8(dst, imm)) }
-emit_shl_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_shl_r16(dst)) }
-emit_shl_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_shl_m16(dst)) }
-emit_shl_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_shl_r16_imm8(dst, imm)) }
-emit_shl_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_shl_m16_imm8(dst, imm)) }
-emit_shl_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_shl_r32(dst)) }
-emit_shl_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_shl_m32(dst)) }
-emit_shl_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_shl_r32_imm8(dst, imm)) }
-emit_shl_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_shl_m32_imm8(dst, imm)) }
-emit_shl_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_shl_r64(dst)) }
-emit_shl_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_shl_m64(dst)) }
-emit_shl_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_shl_r64_imm8(dst, imm)) }
-emit_shl_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_shl_m64_imm8(dst, imm)) }
+emit_shl_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_shl_r8(dst)) }
+emit_shl_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_shl_m8(dst)) }
+emit_shl_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_shl_r8_imm8(dst, imm)) }
+emit_shl_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_shl_m8_imm8(dst, imm)) }
+emit_shl_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_shl_r16(dst)) }
+emit_shl_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_shl_m16(dst)) }
+emit_shl_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_shl_r16_imm8(dst, imm)) }
+emit_shl_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_shl_m16_imm8(dst, imm)) }
+emit_shl_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_shl_r32(dst)) }
+emit_shl_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_shl_m32(dst)) }
+emit_shl_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_shl_r32_imm8(dst, imm)) }
+emit_shl_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_shl_m32_imm8(dst, imm)) }
+emit_shl_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_shl_r64(dst)) }
+emit_shl_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_shl_m64(dst)) }
+emit_shl_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_shl_r64_imm8(dst, imm)) }
+emit_shl_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_shl_m64_imm8(dst, imm)) }
 inst_shr_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHR, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 299) }
 inst_shr_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHR, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 299) }
 inst_shr_r8_imm8                    :: #force_inline proc "contextless" (dst: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHR, operand_count = 2, ops = {op_gpr8(dst), op_imm8(imm), {}, {}} }, 301) }
@@ -841,22 +841,22 @@ inst_shr_r64                        :: #force_inline proc "contextless" (dst: GP
 inst_shr_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHR, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 308) }
 inst_shr_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHR, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 310) }
 inst_shr_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 310) }
-emit_shr_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_shr_r8(dst)) }
-emit_shr_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_shr_m8(dst)) }
-emit_shr_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_shr_r8_imm8(dst, imm)) }
-emit_shr_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_shr_m8_imm8(dst, imm)) }
-emit_shr_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_shr_r16(dst)) }
-emit_shr_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_shr_m16(dst)) }
-emit_shr_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_shr_r16_imm8(dst, imm)) }
-emit_shr_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_shr_m16_imm8(dst, imm)) }
-emit_shr_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_shr_r32(dst)) }
-emit_shr_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_shr_m32(dst)) }
-emit_shr_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_shr_r32_imm8(dst, imm)) }
-emit_shr_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_shr_m32_imm8(dst, imm)) }
-emit_shr_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_shr_r64(dst)) }
-emit_shr_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_shr_m64(dst)) }
-emit_shr_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_shr_r64_imm8(dst, imm)) }
-emit_shr_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_shr_m64_imm8(dst, imm)) }
+emit_shr_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_shr_r8(dst)) }
+emit_shr_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_shr_m8(dst)) }
+emit_shr_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_shr_r8_imm8(dst, imm)) }
+emit_shr_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_shr_m8_imm8(dst, imm)) }
+emit_shr_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_shr_r16(dst)) }
+emit_shr_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_shr_m16(dst)) }
+emit_shr_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_shr_r16_imm8(dst, imm)) }
+emit_shr_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_shr_m16_imm8(dst, imm)) }
+emit_shr_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_shr_r32(dst)) }
+emit_shr_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_shr_m32(dst)) }
+emit_shr_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_shr_r32_imm8(dst, imm)) }
+emit_shr_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_shr_m32_imm8(dst, imm)) }
+emit_shr_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_shr_r64(dst)) }
+emit_shr_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_shr_m64(dst)) }
+emit_shr_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_shr_r64_imm8(dst, imm)) }
+emit_shr_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_shr_m64_imm8(dst, imm)) }
 inst_sar_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAR, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 311) }
 inst_sar_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAR, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 311) }
 inst_sar_r8_imm8                    :: #force_inline proc "contextless" (dst: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAR, operand_count = 2, ops = {op_gpr8(dst), op_imm8(imm), {}, {}} }, 313) }
@@ -873,22 +873,22 @@ inst_sar_r64                        :: #force_inline proc "contextless" (dst: GP
 inst_sar_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .SAR, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 320) }
 inst_sar_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAR, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 322) }
 inst_sar_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 322) }
-emit_sar_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_sar_r8(dst)) }
-emit_sar_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_sar_m8(dst)) }
-emit_sar_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_sar_r8_imm8(dst, imm)) }
-emit_sar_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_sar_m8_imm8(dst, imm)) }
-emit_sar_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_sar_r16(dst)) }
-emit_sar_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_sar_m16(dst)) }
-emit_sar_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_sar_r16_imm8(dst, imm)) }
-emit_sar_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_sar_m16_imm8(dst, imm)) }
-emit_sar_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_sar_r32(dst)) }
-emit_sar_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_sar_m32(dst)) }
-emit_sar_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_sar_r32_imm8(dst, imm)) }
-emit_sar_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_sar_m32_imm8(dst, imm)) }
-emit_sar_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_sar_r64(dst)) }
-emit_sar_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_sar_m64(dst)) }
-emit_sar_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_sar_r64_imm8(dst, imm)) }
-emit_sar_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_sar_m64_imm8(dst, imm)) }
+emit_sar_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_sar_r8(dst)) }
+emit_sar_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_sar_m8(dst)) }
+emit_sar_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_sar_r8_imm8(dst, imm)) }
+emit_sar_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_sar_m8_imm8(dst, imm)) }
+emit_sar_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_sar_r16(dst)) }
+emit_sar_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_sar_m16(dst)) }
+emit_sar_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_sar_r16_imm8(dst, imm)) }
+emit_sar_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_sar_m16_imm8(dst, imm)) }
+emit_sar_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_sar_r32(dst)) }
+emit_sar_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_sar_m32(dst)) }
+emit_sar_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_sar_r32_imm8(dst, imm)) }
+emit_sar_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_sar_m32_imm8(dst, imm)) }
+emit_sar_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_sar_r64(dst)) }
+emit_sar_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_sar_m64(dst)) }
+emit_sar_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_sar_r64_imm8(dst, imm)) }
+emit_sar_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_sar_m64_imm8(dst, imm)) }
 inst_sal_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAL, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 323) }
 inst_sal_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAL, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 323) }
 inst_sal_r8_imm8                    :: #force_inline proc "contextless" (dst: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAL, operand_count = 2, ops = {op_gpr8(dst), op_imm8(imm), {}, {}} }, 325) }
@@ -905,22 +905,22 @@ inst_sal_r64                        :: #force_inline proc "contextless" (dst: GP
 inst_sal_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .SAL, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 332) }
 inst_sal_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAL, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 334) }
 inst_sal_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SAL, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 334) }
-emit_sal_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_sal_r8(dst)) }
-emit_sal_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_sal_m8(dst)) }
-emit_sal_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_sal_r8_imm8(dst, imm)) }
-emit_sal_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_sal_m8_imm8(dst, imm)) }
-emit_sal_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_sal_r16(dst)) }
-emit_sal_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_sal_m16(dst)) }
-emit_sal_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_sal_r16_imm8(dst, imm)) }
-emit_sal_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_sal_m16_imm8(dst, imm)) }
-emit_sal_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_sal_r32(dst)) }
-emit_sal_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_sal_m32(dst)) }
-emit_sal_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_sal_r32_imm8(dst, imm)) }
-emit_sal_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_sal_m32_imm8(dst, imm)) }
-emit_sal_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_sal_r64(dst)) }
-emit_sal_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_sal_m64(dst)) }
-emit_sal_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_sal_r64_imm8(dst, imm)) }
-emit_sal_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_sal_m64_imm8(dst, imm)) }
+emit_sal_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_sal_r8(dst)) }
+emit_sal_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_sal_m8(dst)) }
+emit_sal_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_sal_r8_imm8(dst, imm)) }
+emit_sal_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_sal_m8_imm8(dst, imm)) }
+emit_sal_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_sal_r16(dst)) }
+emit_sal_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_sal_m16(dst)) }
+emit_sal_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_sal_r16_imm8(dst, imm)) }
+emit_sal_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_sal_m16_imm8(dst, imm)) }
+emit_sal_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_sal_r32(dst)) }
+emit_sal_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_sal_m32(dst)) }
+emit_sal_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_sal_r32_imm8(dst, imm)) }
+emit_sal_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_sal_m32_imm8(dst, imm)) }
+emit_sal_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_sal_r64(dst)) }
+emit_sal_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_sal_m64(dst)) }
+emit_sal_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_sal_r64_imm8(dst, imm)) }
+emit_sal_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_sal_m64_imm8(dst, imm)) }
 inst_rol_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROL, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 335) }
 inst_rol_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROL, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 335) }
 inst_rol_r8_imm8                    :: #force_inline proc "contextless" (dst: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROL, operand_count = 2, ops = {op_gpr8(dst), op_imm8(imm), {}, {}} }, 337) }
@@ -937,22 +937,22 @@ inst_rol_r64                        :: #force_inline proc "contextless" (dst: GP
 inst_rol_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .ROL, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 344) }
 inst_rol_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROL, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 346) }
 inst_rol_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROL, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 346) }
-emit_rol_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_rol_r8(dst)) }
-emit_rol_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_rol_m8(dst)) }
-emit_rol_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_rol_r8_imm8(dst, imm)) }
-emit_rol_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_rol_m8_imm8(dst, imm)) }
-emit_rol_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_rol_r16(dst)) }
-emit_rol_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_rol_m16(dst)) }
-emit_rol_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_rol_r16_imm8(dst, imm)) }
-emit_rol_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_rol_m16_imm8(dst, imm)) }
-emit_rol_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_rol_r32(dst)) }
-emit_rol_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_rol_m32(dst)) }
-emit_rol_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_rol_r32_imm8(dst, imm)) }
-emit_rol_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_rol_m32_imm8(dst, imm)) }
-emit_rol_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rol_r64(dst)) }
-emit_rol_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_rol_m64(dst)) }
-emit_rol_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_rol_r64_imm8(dst, imm)) }
-emit_rol_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_rol_m64_imm8(dst, imm)) }
+emit_rol_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_rol_r8(dst)) }
+emit_rol_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_rol_m8(dst)) }
+emit_rol_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_rol_r8_imm8(dst, imm)) }
+emit_rol_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_rol_m8_imm8(dst, imm)) }
+emit_rol_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_rol_r16(dst)) }
+emit_rol_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_rol_m16(dst)) }
+emit_rol_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_rol_r16_imm8(dst, imm)) }
+emit_rol_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_rol_m16_imm8(dst, imm)) }
+emit_rol_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_rol_r32(dst)) }
+emit_rol_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_rol_m32(dst)) }
+emit_rol_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_rol_r32_imm8(dst, imm)) }
+emit_rol_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_rol_m32_imm8(dst, imm)) }
+emit_rol_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rol_r64(dst)) }
+emit_rol_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_rol_m64(dst)) }
+emit_rol_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_rol_r64_imm8(dst, imm)) }
+emit_rol_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_rol_m64_imm8(dst, imm)) }
 inst_ror_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROR, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 347) }
 inst_ror_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROR, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 347) }
 inst_ror_r8_imm8                    :: #force_inline proc "contextless" (dst: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROR, operand_count = 2, ops = {op_gpr8(dst), op_imm8(imm), {}, {}} }, 349) }
@@ -969,22 +969,22 @@ inst_ror_r64                        :: #force_inline proc "contextless" (dst: GP
 inst_ror_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .ROR, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 356) }
 inst_ror_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROR, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 358) }
 inst_ror_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 358) }
-emit_ror_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_ror_r8(dst)) }
-emit_ror_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_ror_m8(dst)) }
-emit_ror_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_ror_r8_imm8(dst, imm)) }
-emit_ror_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_ror_m8_imm8(dst, imm)) }
-emit_ror_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_ror_r16(dst)) }
-emit_ror_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_ror_m16(dst)) }
-emit_ror_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_ror_r16_imm8(dst, imm)) }
-emit_ror_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_ror_m16_imm8(dst, imm)) }
-emit_ror_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_ror_r32(dst)) }
-emit_ror_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_ror_m32(dst)) }
-emit_ror_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_ror_r32_imm8(dst, imm)) }
-emit_ror_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_ror_m32_imm8(dst, imm)) }
-emit_ror_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_ror_r64(dst)) }
-emit_ror_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_ror_m64(dst)) }
-emit_ror_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_ror_r64_imm8(dst, imm)) }
-emit_ror_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_ror_m64_imm8(dst, imm)) }
+emit_ror_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_ror_r8(dst)) }
+emit_ror_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_ror_m8(dst)) }
+emit_ror_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_ror_r8_imm8(dst, imm)) }
+emit_ror_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_ror_m8_imm8(dst, imm)) }
+emit_ror_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_ror_r16(dst)) }
+emit_ror_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_ror_m16(dst)) }
+emit_ror_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_ror_r16_imm8(dst, imm)) }
+emit_ror_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_ror_m16_imm8(dst, imm)) }
+emit_ror_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_ror_r32(dst)) }
+emit_ror_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_ror_m32(dst)) }
+emit_ror_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_ror_r32_imm8(dst, imm)) }
+emit_ror_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_ror_m32_imm8(dst, imm)) }
+emit_ror_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_ror_r64(dst)) }
+emit_ror_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_ror_m64(dst)) }
+emit_ror_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_ror_r64_imm8(dst, imm)) }
+emit_ror_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_ror_m64_imm8(dst, imm)) }
 inst_rcl_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCL, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 359) }
 inst_rcl_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCL, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 359) }
 inst_rcl_r8_imm8                    :: #force_inline proc "contextless" (dst: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCL, operand_count = 2, ops = {op_gpr8(dst), op_imm8(imm), {}, {}} }, 361) }
@@ -1001,22 +1001,22 @@ inst_rcl_r64                        :: #force_inline proc "contextless" (dst: GP
 inst_rcl_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .RCL, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 368) }
 inst_rcl_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCL, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 370) }
 inst_rcl_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCL, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 370) }
-emit_rcl_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_rcl_r8(dst)) }
-emit_rcl_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_rcl_m8(dst)) }
-emit_rcl_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_rcl_r8_imm8(dst, imm)) }
-emit_rcl_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_rcl_m8_imm8(dst, imm)) }
-emit_rcl_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_rcl_r16(dst)) }
-emit_rcl_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_rcl_m16(dst)) }
-emit_rcl_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_rcl_r16_imm8(dst, imm)) }
-emit_rcl_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_rcl_m16_imm8(dst, imm)) }
-emit_rcl_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_rcl_r32(dst)) }
-emit_rcl_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_rcl_m32(dst)) }
-emit_rcl_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_rcl_r32_imm8(dst, imm)) }
-emit_rcl_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_rcl_m32_imm8(dst, imm)) }
-emit_rcl_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rcl_r64(dst)) }
-emit_rcl_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_rcl_m64(dst)) }
-emit_rcl_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_rcl_r64_imm8(dst, imm)) }
-emit_rcl_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_rcl_m64_imm8(dst, imm)) }
+emit_rcl_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_rcl_r8(dst)) }
+emit_rcl_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_rcl_m8(dst)) }
+emit_rcl_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_rcl_r8_imm8(dst, imm)) }
+emit_rcl_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_rcl_m8_imm8(dst, imm)) }
+emit_rcl_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_rcl_r16(dst)) }
+emit_rcl_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_rcl_m16(dst)) }
+emit_rcl_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_rcl_r16_imm8(dst, imm)) }
+emit_rcl_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_rcl_m16_imm8(dst, imm)) }
+emit_rcl_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_rcl_r32(dst)) }
+emit_rcl_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_rcl_m32(dst)) }
+emit_rcl_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_rcl_r32_imm8(dst, imm)) }
+emit_rcl_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_rcl_m32_imm8(dst, imm)) }
+emit_rcl_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rcl_r64(dst)) }
+emit_rcl_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_rcl_m64(dst)) }
+emit_rcl_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_rcl_r64_imm8(dst, imm)) }
+emit_rcl_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_rcl_m64_imm8(dst, imm)) }
 inst_rcr_r8                         :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCR, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 371) }
 inst_rcr_m8                         :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCR, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 371) }
 inst_rcr_r8_imm8                    :: #force_inline proc "contextless" (dst: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCR, operand_count = 2, ops = {op_gpr8(dst), op_imm8(imm), {}, {}} }, 373) }
@@ -1033,22 +1033,22 @@ inst_rcr_r64                        :: #force_inline proc "contextless" (dst: GP
 inst_rcr_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .RCR, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 380) }
 inst_rcr_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCR, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 382) }
 inst_rcr_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RCR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 382) }
-emit_rcr_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_rcr_r8(dst)) }
-emit_rcr_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_rcr_m8(dst)) }
-emit_rcr_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append(instructions, inst_rcr_r8_imm8(dst, imm)) }
-emit_rcr_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append(instructions, inst_rcr_m8_imm8(dst, imm)) }
-emit_rcr_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_rcr_r16(dst)) }
-emit_rcr_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_rcr_m16(dst)) }
-emit_rcr_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_rcr_r16_imm8(dst, imm)) }
-emit_rcr_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_rcr_m16_imm8(dst, imm)) }
-emit_rcr_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_rcr_r32(dst)) }
-emit_rcr_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_rcr_m32(dst)) }
-emit_rcr_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_rcr_r32_imm8(dst, imm)) }
-emit_rcr_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_rcr_m32_imm8(dst, imm)) }
-emit_rcr_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rcr_r64(dst)) }
-emit_rcr_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_rcr_m64(dst)) }
-emit_rcr_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_rcr_r64_imm8(dst, imm)) }
-emit_rcr_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_rcr_m64_imm8(dst, imm)) }
+emit_rcr_r8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_rcr_r8(dst)) }
+emit_rcr_m8                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_rcr_m8(dst)) }
+emit_rcr_r8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, imm: i8) { append_elem(instructions, inst_rcr_r8_imm8(dst, imm)) }
+emit_rcr_m8_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, imm: i8) { append_elem(instructions, inst_rcr_m8_imm8(dst, imm)) }
+emit_rcr_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_rcr_r16(dst)) }
+emit_rcr_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_rcr_m16(dst)) }
+emit_rcr_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_rcr_r16_imm8(dst, imm)) }
+emit_rcr_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_rcr_m16_imm8(dst, imm)) }
+emit_rcr_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_rcr_r32(dst)) }
+emit_rcr_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_rcr_m32(dst)) }
+emit_rcr_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_rcr_r32_imm8(dst, imm)) }
+emit_rcr_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_rcr_m32_imm8(dst, imm)) }
+emit_rcr_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rcr_r64(dst)) }
+emit_rcr_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_rcr_m64(dst)) }
+emit_rcr_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_rcr_r64_imm8(dst, imm)) }
+emit_rcr_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_rcr_m64_imm8(dst, imm)) }
 inst_shld_r16_r16_imm8              :: #force_inline proc "contextless" (dst: GPR16, src: GPR16, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLD, operand_count = 3, ops = {op_gpr16(dst), op_gpr16(src), op_imm8(imm), {}} }, 383) }
 inst_shld_m16_r16_imm8              :: #force_inline proc "contextless" (dst: Mem16, src: GPR16, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLD, operand_count = 3, ops = {op_mem(dst.mem, 2), op_gpr16(src), op_imm8(imm), {}} }, 383) }
 inst_shld_r32_r32_imm8              :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLD, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_imm8(imm), {}} }, 384) }
@@ -1061,18 +1061,18 @@ inst_shld_r32_r32                   :: #force_inline proc "contextless" (dst: GP
 inst_shld_m32_r32                   :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 387) }
 inst_shld_r64_r64                   :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLD, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 388) }
 inst_shld_m64_r64                   :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 388) }
-emit_shld_r16_r16_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16, imm: i8) { append(instructions, inst_shld_r16_r16_imm8(dst, src, imm)) }
-emit_shld_m16_r16_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16, imm: i8) { append(instructions, inst_shld_m16_r16_imm8(dst, src, imm)) }
-emit_shld_r32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, imm: i8) { append(instructions, inst_shld_r32_r32_imm8(dst, src, imm)) }
-emit_shld_m32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32, imm: i8) { append(instructions, inst_shld_m32_r32_imm8(dst, src, imm)) }
-emit_shld_r64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, imm: i8) { append(instructions, inst_shld_r64_r64_imm8(dst, src, imm)) }
-emit_shld_m64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64, imm: i8) { append(instructions, inst_shld_m64_r64_imm8(dst, src, imm)) }
-emit_shld_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_shld_r16_r16(dst, src)) }
-emit_shld_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_shld_m16_r16(dst, src)) }
-emit_shld_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_shld_r32_r32(dst, src)) }
-emit_shld_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_shld_m32_r32(dst, src)) }
-emit_shld_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_shld_r64_r64(dst, src)) }
-emit_shld_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_shld_m64_r64(dst, src)) }
+emit_shld_r16_r16_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16, imm: i8) { append_elem(instructions, inst_shld_r16_r16_imm8(dst, src, imm)) }
+emit_shld_m16_r16_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16, imm: i8) { append_elem(instructions, inst_shld_m16_r16_imm8(dst, src, imm)) }
+emit_shld_r32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, imm: i8) { append_elem(instructions, inst_shld_r32_r32_imm8(dst, src, imm)) }
+emit_shld_m32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32, imm: i8) { append_elem(instructions, inst_shld_m32_r32_imm8(dst, src, imm)) }
+emit_shld_r64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, imm: i8) { append_elem(instructions, inst_shld_r64_r64_imm8(dst, src, imm)) }
+emit_shld_m64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64, imm: i8) { append_elem(instructions, inst_shld_m64_r64_imm8(dst, src, imm)) }
+emit_shld_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_shld_r16_r16(dst, src)) }
+emit_shld_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_shld_m16_r16(dst, src)) }
+emit_shld_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_shld_r32_r32(dst, src)) }
+emit_shld_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_shld_m32_r32(dst, src)) }
+emit_shld_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_shld_r64_r64(dst, src)) }
+emit_shld_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_shld_m64_r64(dst, src)) }
 inst_shrd_r16_r16_imm8              :: #force_inline proc "contextless" (dst: GPR16, src: GPR16, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRD, operand_count = 3, ops = {op_gpr16(dst), op_gpr16(src), op_imm8(imm), {}} }, 389) }
 inst_shrd_m16_r16_imm8              :: #force_inline proc "contextless" (dst: Mem16, src: GPR16, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRD, operand_count = 3, ops = {op_mem(dst.mem, 2), op_gpr16(src), op_imm8(imm), {}} }, 389) }
 inst_shrd_r32_r32_imm8              :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRD, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_imm8(imm), {}} }, 390) }
@@ -1085,18 +1085,18 @@ inst_shrd_r32_r32                   :: #force_inline proc "contextless" (dst: GP
 inst_shrd_m32_r32                   :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 393) }
 inst_shrd_r64_r64                   :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRD, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 394) }
 inst_shrd_m64_r64                   :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 394) }
-emit_shrd_r16_r16_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16, imm: i8) { append(instructions, inst_shrd_r16_r16_imm8(dst, src, imm)) }
-emit_shrd_m16_r16_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16, imm: i8) { append(instructions, inst_shrd_m16_r16_imm8(dst, src, imm)) }
-emit_shrd_r32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, imm: i8) { append(instructions, inst_shrd_r32_r32_imm8(dst, src, imm)) }
-emit_shrd_m32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32, imm: i8) { append(instructions, inst_shrd_m32_r32_imm8(dst, src, imm)) }
-emit_shrd_r64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, imm: i8) { append(instructions, inst_shrd_r64_r64_imm8(dst, src, imm)) }
-emit_shrd_m64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64, imm: i8) { append(instructions, inst_shrd_m64_r64_imm8(dst, src, imm)) }
-emit_shrd_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_shrd_r16_r16(dst, src)) }
-emit_shrd_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_shrd_m16_r16(dst, src)) }
-emit_shrd_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_shrd_r32_r32(dst, src)) }
-emit_shrd_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_shrd_m32_r32(dst, src)) }
-emit_shrd_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_shrd_r64_r64(dst, src)) }
-emit_shrd_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_shrd_m64_r64(dst, src)) }
+emit_shrd_r16_r16_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16, imm: i8) { append_elem(instructions, inst_shrd_r16_r16_imm8(dst, src, imm)) }
+emit_shrd_m16_r16_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16, imm: i8) { append_elem(instructions, inst_shrd_m16_r16_imm8(dst, src, imm)) }
+emit_shrd_r32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, imm: i8) { append_elem(instructions, inst_shrd_r32_r32_imm8(dst, src, imm)) }
+emit_shrd_m32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32, imm: i8) { append_elem(instructions, inst_shrd_m32_r32_imm8(dst, src, imm)) }
+emit_shrd_r64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, imm: i8) { append_elem(instructions, inst_shrd_r64_r64_imm8(dst, src, imm)) }
+emit_shrd_m64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64, imm: i8) { append_elem(instructions, inst_shrd_m64_r64_imm8(dst, src, imm)) }
+emit_shrd_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_shrd_r16_r16(dst, src)) }
+emit_shrd_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_shrd_m16_r16(dst, src)) }
+emit_shrd_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_shrd_r32_r32(dst, src)) }
+emit_shrd_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_shrd_m32_r32(dst, src)) }
+emit_shrd_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_shrd_r64_r64(dst, src)) }
+emit_shrd_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_shrd_m64_r64(dst, src)) }
 inst_bt_r16_r16                     :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BT, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 395) }
 inst_bt_m16_r16                     :: #force_inline proc "contextless" (dst: Mem16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BT, operand_count = 2, ops = {op_mem(dst.mem, 2), op_gpr16(src), {}, {}} }, 395) }
 inst_bt_r32_r32                     :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BT, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 396) }
@@ -1109,18 +1109,18 @@ inst_bt_r32_imm8                    :: #force_inline proc "contextless" (dst: GP
 inst_bt_m32_imm8                    :: #force_inline proc "contextless" (dst: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BT, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm8(imm), {}, {}} }, 399) }
 inst_bt_r64_imm8                    :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BT, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 400) }
 inst_bt_m64_imm8                    :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BT, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 400) }
-emit_bt_r16_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_bt_r16_r16(dst, src)) }
-emit_bt_m16_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_bt_m16_r16(dst, src)) }
-emit_bt_r32_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_bt_r32_r32(dst, src)) }
-emit_bt_m32_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_bt_m32_r32(dst, src)) }
-emit_bt_r64_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_bt_r64_r64(dst, src)) }
-emit_bt_m64_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_bt_m64_r64(dst, src)) }
-emit_bt_r16_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_bt_r16_imm8(dst, imm)) }
-emit_bt_m16_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_bt_m16_imm8(dst, imm)) }
-emit_bt_r32_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_bt_r32_imm8(dst, imm)) }
-emit_bt_m32_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_bt_m32_imm8(dst, imm)) }
-emit_bt_r64_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_bt_r64_imm8(dst, imm)) }
-emit_bt_m64_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_bt_m64_imm8(dst, imm)) }
+emit_bt_r16_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_bt_r16_r16(dst, src)) }
+emit_bt_m16_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_bt_m16_r16(dst, src)) }
+emit_bt_r32_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_bt_r32_r32(dst, src)) }
+emit_bt_m32_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_bt_m32_r32(dst, src)) }
+emit_bt_r64_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_bt_r64_r64(dst, src)) }
+emit_bt_m64_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_bt_m64_r64(dst, src)) }
+emit_bt_r16_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_bt_r16_imm8(dst, imm)) }
+emit_bt_m16_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_bt_m16_imm8(dst, imm)) }
+emit_bt_r32_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_bt_r32_imm8(dst, imm)) }
+emit_bt_m32_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_bt_m32_imm8(dst, imm)) }
+emit_bt_r64_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_bt_r64_imm8(dst, imm)) }
+emit_bt_m64_imm8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_bt_m64_imm8(dst, imm)) }
 inst_bts_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BTS, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 401) }
 inst_bts_m16_r16                    :: #force_inline proc "contextless" (dst: Mem16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BTS, operand_count = 2, ops = {op_mem(dst.mem, 2), op_gpr16(src), {}, {}} }, 401) }
 inst_bts_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BTS, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 402) }
@@ -1133,18 +1133,18 @@ inst_bts_r32_imm8                   :: #force_inline proc "contextless" (dst: GP
 inst_bts_m32_imm8                   :: #force_inline proc "contextless" (dst: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTS, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm8(imm), {}, {}} }, 405) }
 inst_bts_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTS, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 406) }
 inst_bts_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTS, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 406) }
-emit_bts_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_bts_r16_r16(dst, src)) }
-emit_bts_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_bts_m16_r16(dst, src)) }
-emit_bts_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_bts_r32_r32(dst, src)) }
-emit_bts_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_bts_m32_r32(dst, src)) }
-emit_bts_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_bts_r64_r64(dst, src)) }
-emit_bts_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_bts_m64_r64(dst, src)) }
-emit_bts_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_bts_r16_imm8(dst, imm)) }
-emit_bts_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_bts_m16_imm8(dst, imm)) }
-emit_bts_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_bts_r32_imm8(dst, imm)) }
-emit_bts_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_bts_m32_imm8(dst, imm)) }
-emit_bts_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_bts_r64_imm8(dst, imm)) }
-emit_bts_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_bts_m64_imm8(dst, imm)) }
+emit_bts_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_bts_r16_r16(dst, src)) }
+emit_bts_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_bts_m16_r16(dst, src)) }
+emit_bts_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_bts_r32_r32(dst, src)) }
+emit_bts_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_bts_m32_r32(dst, src)) }
+emit_bts_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_bts_r64_r64(dst, src)) }
+emit_bts_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_bts_m64_r64(dst, src)) }
+emit_bts_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_bts_r16_imm8(dst, imm)) }
+emit_bts_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_bts_m16_imm8(dst, imm)) }
+emit_bts_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_bts_r32_imm8(dst, imm)) }
+emit_bts_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_bts_m32_imm8(dst, imm)) }
+emit_bts_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_bts_r64_imm8(dst, imm)) }
+emit_bts_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_bts_m64_imm8(dst, imm)) }
 inst_btr_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BTR, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 407) }
 inst_btr_m16_r16                    :: #force_inline proc "contextless" (dst: Mem16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BTR, operand_count = 2, ops = {op_mem(dst.mem, 2), op_gpr16(src), {}, {}} }, 407) }
 inst_btr_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BTR, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 408) }
@@ -1157,18 +1157,18 @@ inst_btr_r32_imm8                   :: #force_inline proc "contextless" (dst: GP
 inst_btr_m32_imm8                   :: #force_inline proc "contextless" (dst: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTR, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm8(imm), {}, {}} }, 411) }
 inst_btr_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTR, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 412) }
 inst_btr_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 412) }
-emit_btr_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_btr_r16_r16(dst, src)) }
-emit_btr_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_btr_m16_r16(dst, src)) }
-emit_btr_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_btr_r32_r32(dst, src)) }
-emit_btr_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_btr_m32_r32(dst, src)) }
-emit_btr_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_btr_r64_r64(dst, src)) }
-emit_btr_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_btr_m64_r64(dst, src)) }
-emit_btr_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_btr_r16_imm8(dst, imm)) }
-emit_btr_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_btr_m16_imm8(dst, imm)) }
-emit_btr_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_btr_r32_imm8(dst, imm)) }
-emit_btr_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_btr_m32_imm8(dst, imm)) }
-emit_btr_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_btr_r64_imm8(dst, imm)) }
-emit_btr_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_btr_m64_imm8(dst, imm)) }
+emit_btr_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_btr_r16_r16(dst, src)) }
+emit_btr_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_btr_m16_r16(dst, src)) }
+emit_btr_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_btr_r32_r32(dst, src)) }
+emit_btr_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_btr_m32_r32(dst, src)) }
+emit_btr_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_btr_r64_r64(dst, src)) }
+emit_btr_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_btr_m64_r64(dst, src)) }
+emit_btr_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_btr_r16_imm8(dst, imm)) }
+emit_btr_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_btr_m16_imm8(dst, imm)) }
+emit_btr_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_btr_r32_imm8(dst, imm)) }
+emit_btr_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_btr_m32_imm8(dst, imm)) }
+emit_btr_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_btr_r64_imm8(dst, imm)) }
+emit_btr_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_btr_m64_imm8(dst, imm)) }
 inst_btc_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BTC, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 413) }
 inst_btc_m16_r16                    :: #force_inline proc "contextless" (dst: Mem16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BTC, operand_count = 2, ops = {op_mem(dst.mem, 2), op_gpr16(src), {}, {}} }, 413) }
 inst_btc_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BTC, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 414) }
@@ -1181,822 +1181,822 @@ inst_btc_r32_imm8                   :: #force_inline proc "contextless" (dst: GP
 inst_btc_m32_imm8                   :: #force_inline proc "contextless" (dst: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTC, operand_count = 2, ops = {op_mem(dst.mem, 4), op_imm8(imm), {}, {}} }, 417) }
 inst_btc_r64_imm8                   :: #force_inline proc "contextless" (dst: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTC, operand_count = 2, ops = {op_gpr64(dst), op_imm8(imm), {}, {}} }, 418) }
 inst_btc_m64_imm8                   :: #force_inline proc "contextless" (dst: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BTC, operand_count = 2, ops = {op_mem(dst.mem, 8), op_imm8(imm), {}, {}} }, 418) }
-emit_btc_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_btc_r16_r16(dst, src)) }
-emit_btc_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_btc_m16_r16(dst, src)) }
-emit_btc_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_btc_r32_r32(dst, src)) }
-emit_btc_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_btc_m32_r32(dst, src)) }
-emit_btc_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_btc_r64_r64(dst, src)) }
-emit_btc_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_btc_m64_r64(dst, src)) }
-emit_btc_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append(instructions, inst_btc_r16_imm8(dst, imm)) }
-emit_btc_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append(instructions, inst_btc_m16_imm8(dst, imm)) }
-emit_btc_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append(instructions, inst_btc_r32_imm8(dst, imm)) }
-emit_btc_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append(instructions, inst_btc_m32_imm8(dst, imm)) }
-emit_btc_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append(instructions, inst_btc_r64_imm8(dst, imm)) }
-emit_btc_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append(instructions, inst_btc_m64_imm8(dst, imm)) }
+emit_btc_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_btc_r16_r16(dst, src)) }
+emit_btc_m16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_btc_m16_r16(dst, src)) }
+emit_btc_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_btc_r32_r32(dst, src)) }
+emit_btc_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_btc_m32_r32(dst, src)) }
+emit_btc_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_btc_r64_r64(dst, src)) }
+emit_btc_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_btc_m64_r64(dst, src)) }
+emit_btc_r16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, imm: i8) { append_elem(instructions, inst_btc_r16_imm8(dst, imm)) }
+emit_btc_m16_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, imm: i8) { append_elem(instructions, inst_btc_m16_imm8(dst, imm)) }
+emit_btc_r32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, imm: i8) { append_elem(instructions, inst_btc_r32_imm8(dst, imm)) }
+emit_btc_m32_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, imm: i8) { append_elem(instructions, inst_btc_m32_imm8(dst, imm)) }
+emit_btc_r64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, imm: i8) { append_elem(instructions, inst_btc_r64_imm8(dst, imm)) }
+emit_btc_m64_imm8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, imm: i8) { append_elem(instructions, inst_btc_m64_imm8(dst, imm)) }
 inst_bsf_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BSF, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 419) }
 inst_bsf_r16_m16                    :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .BSF, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 419) }
 inst_bsf_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BSF, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 420) }
 inst_bsf_r32_m32                    :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .BSF, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 420) }
 inst_bsf_r64_r64                    :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BSF, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 421) }
 inst_bsf_r64_m64                    :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .BSF, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 421) }
-emit_bsf_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_bsf_r16_r16(dst, src)) }
-emit_bsf_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_bsf_r16_m16(dst, src)) }
-emit_bsf_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_bsf_r32_r32(dst, src)) }
-emit_bsf_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_bsf_r32_m32(dst, src)) }
-emit_bsf_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_bsf_r64_r64(dst, src)) }
-emit_bsf_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_bsf_r64_m64(dst, src)) }
+emit_bsf_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_bsf_r16_r16(dst, src)) }
+emit_bsf_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_bsf_r16_m16(dst, src)) }
+emit_bsf_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_bsf_r32_r32(dst, src)) }
+emit_bsf_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_bsf_r32_m32(dst, src)) }
+emit_bsf_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_bsf_r64_r64(dst, src)) }
+emit_bsf_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_bsf_r64_m64(dst, src)) }
 inst_bsr_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .BSR, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 422) }
 inst_bsr_r16_m16                    :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .BSR, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 422) }
 inst_bsr_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BSR, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 423) }
 inst_bsr_r32_m32                    :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .BSR, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 423) }
 inst_bsr_r64_r64                    :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BSR, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 424) }
 inst_bsr_r64_m64                    :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .BSR, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 424) }
-emit_bsr_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_bsr_r16_r16(dst, src)) }
-emit_bsr_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_bsr_r16_m16(dst, src)) }
-emit_bsr_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_bsr_r32_r32(dst, src)) }
-emit_bsr_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_bsr_r32_m32(dst, src)) }
-emit_bsr_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_bsr_r64_r64(dst, src)) }
-emit_bsr_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_bsr_r64_m64(dst, src)) }
+emit_bsr_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_bsr_r16_r16(dst, src)) }
+emit_bsr_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_bsr_r16_m16(dst, src)) }
+emit_bsr_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_bsr_r32_r32(dst, src)) }
+emit_bsr_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_bsr_r32_m32(dst, src)) }
+emit_bsr_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_bsr_r64_r64(dst, src)) }
+emit_bsr_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_bsr_r64_m64(dst, src)) }
 inst_popcnt_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .POPCNT, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 425) }
 inst_popcnt_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .POPCNT, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 425) }
 inst_popcnt_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .POPCNT, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 426) }
 inst_popcnt_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .POPCNT, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 426) }
 inst_popcnt_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .POPCNT, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 427) }
 inst_popcnt_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .POPCNT, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 427) }
-emit_popcnt_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_popcnt_r16_r16(dst, src)) }
-emit_popcnt_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_popcnt_r16_m16(dst, src)) }
-emit_popcnt_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_popcnt_r32_r32(dst, src)) }
-emit_popcnt_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_popcnt_r32_m32(dst, src)) }
-emit_popcnt_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_popcnt_r64_r64(dst, src)) }
-emit_popcnt_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_popcnt_r64_m64(dst, src)) }
+emit_popcnt_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_popcnt_r16_r16(dst, src)) }
+emit_popcnt_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_popcnt_r16_m16(dst, src)) }
+emit_popcnt_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_popcnt_r32_r32(dst, src)) }
+emit_popcnt_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_popcnt_r32_m32(dst, src)) }
+emit_popcnt_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_popcnt_r64_r64(dst, src)) }
+emit_popcnt_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_popcnt_r64_m64(dst, src)) }
 inst_lzcnt_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .LZCNT, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 428) }
 inst_lzcnt_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .LZCNT, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 428) }
 inst_lzcnt_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .LZCNT, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 429) }
 inst_lzcnt_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .LZCNT, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 429) }
 inst_lzcnt_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .LZCNT, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 430) }
 inst_lzcnt_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .LZCNT, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 430) }
-emit_lzcnt_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_lzcnt_r16_r16(dst, src)) }
-emit_lzcnt_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_lzcnt_r16_m16(dst, src)) }
-emit_lzcnt_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_lzcnt_r32_r32(dst, src)) }
-emit_lzcnt_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_lzcnt_r32_m32(dst, src)) }
-emit_lzcnt_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_lzcnt_r64_r64(dst, src)) }
-emit_lzcnt_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_lzcnt_r64_m64(dst, src)) }
+emit_lzcnt_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_lzcnt_r16_r16(dst, src)) }
+emit_lzcnt_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_lzcnt_r16_m16(dst, src)) }
+emit_lzcnt_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_lzcnt_r32_r32(dst, src)) }
+emit_lzcnt_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_lzcnt_r32_m32(dst, src)) }
+emit_lzcnt_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_lzcnt_r64_r64(dst, src)) }
+emit_lzcnt_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_lzcnt_r64_m64(dst, src)) }
 inst_tzcnt_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .TZCNT, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 431) }
 inst_tzcnt_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .TZCNT, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 431) }
 inst_tzcnt_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .TZCNT, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 432) }
 inst_tzcnt_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .TZCNT, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 432) }
 inst_tzcnt_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .TZCNT, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 433) }
 inst_tzcnt_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .TZCNT, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 433) }
-emit_tzcnt_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_tzcnt_r16_r16(dst, src)) }
-emit_tzcnt_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_tzcnt_r16_m16(dst, src)) }
-emit_tzcnt_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_tzcnt_r32_r32(dst, src)) }
-emit_tzcnt_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_tzcnt_r32_m32(dst, src)) }
-emit_tzcnt_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_tzcnt_r64_r64(dst, src)) }
-emit_tzcnt_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_tzcnt_r64_m64(dst, src)) }
+emit_tzcnt_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_tzcnt_r16_r16(dst, src)) }
+emit_tzcnt_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_tzcnt_r16_m16(dst, src)) }
+emit_tzcnt_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_tzcnt_r32_r32(dst, src)) }
+emit_tzcnt_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_tzcnt_r32_m32(dst, src)) }
+emit_tzcnt_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_tzcnt_r64_r64(dst, src)) }
+emit_tzcnt_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_tzcnt_r64_m64(dst, src)) }
 inst_jmp_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JMP, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jmp_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JMP, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
 inst_jmp_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .JMP, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 436) }
 inst_jmp_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .JMP, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 436) }
 inst_jmp_m                          :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .JMP, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 437) }
-emit_jmp_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jmp_rel8(offset)) }
-emit_jmp_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jmp_rel32(offset)) }
-emit_jmp_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_jmp_r64(dst)) }
-emit_jmp_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_jmp_m64(dst)) }
-emit_jmp_m                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_jmp_m(dst)) }
+emit_jmp_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jmp_rel8(offset)) }
+emit_jmp_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jmp_rel32(offset)) }
+emit_jmp_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_jmp_r64(dst)) }
+emit_jmp_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_jmp_m64(dst)) }
+emit_jmp_m                          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_jmp_m(dst)) }
 inst_ja_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JA, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_ja_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JA, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_ja_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_ja_rel8(offset)) }
-emit_ja_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_ja_rel32(offset)) }
+emit_ja_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_ja_rel8(offset)) }
+emit_ja_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_ja_rel32(offset)) }
 inst_jae_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JAE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jae_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JAE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jae_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jae_rel8(offset)) }
-emit_jae_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jae_rel32(offset)) }
+emit_jae_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jae_rel8(offset)) }
+emit_jae_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jae_rel32(offset)) }
 inst_jb_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JB, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jb_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JB, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jb_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jb_rel8(offset)) }
-emit_jb_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jb_rel32(offset)) }
+emit_jb_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jb_rel8(offset)) }
+emit_jb_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jb_rel32(offset)) }
 inst_jbe_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JBE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jbe_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JBE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jbe_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jbe_rel8(offset)) }
-emit_jbe_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jbe_rel32(offset)) }
+emit_jbe_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jbe_rel8(offset)) }
+emit_jbe_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jbe_rel32(offset)) }
 inst_jc_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JC, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jc_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JC, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jc_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jc_rel8(offset)) }
-emit_jc_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jc_rel32(offset)) }
+emit_jc_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jc_rel8(offset)) }
+emit_jc_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jc_rel32(offset)) }
 inst_je_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_je_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_je_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_je_rel8(offset)) }
-emit_je_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_je_rel32(offset)) }
+emit_je_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_je_rel8(offset)) }
+emit_je_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_je_rel32(offset)) }
 inst_jz_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JZ, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jz_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JZ, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jz_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jz_rel8(offset)) }
-emit_jz_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jz_rel32(offset)) }
+emit_jz_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jz_rel8(offset)) }
+emit_jz_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jz_rel32(offset)) }
 inst_jg_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JG, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jg_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JG, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jg_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jg_rel8(offset)) }
-emit_jg_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jg_rel32(offset)) }
+emit_jg_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jg_rel8(offset)) }
+emit_jg_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jg_rel32(offset)) }
 inst_jge_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JGE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jge_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JGE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jge_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jge_rel8(offset)) }
-emit_jge_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jge_rel32(offset)) }
+emit_jge_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jge_rel8(offset)) }
+emit_jge_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jge_rel32(offset)) }
 inst_jl_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JL, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jl_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JL, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jl_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jl_rel8(offset)) }
-emit_jl_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jl_rel32(offset)) }
+emit_jl_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jl_rel8(offset)) }
+emit_jl_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jl_rel32(offset)) }
 inst_jle_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JLE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jle_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JLE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jle_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jle_rel8(offset)) }
-emit_jle_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jle_rel32(offset)) }
+emit_jle_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jle_rel8(offset)) }
+emit_jle_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jle_rel32(offset)) }
 inst_jna_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNA, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jna_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNA, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jna_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jna_rel8(offset)) }
-emit_jna_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jna_rel32(offset)) }
+emit_jna_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jna_rel8(offset)) }
+emit_jna_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jna_rel32(offset)) }
 inst_jnae_rel8                      :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNAE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnae_rel32                     :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNAE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnae_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnae_rel8(offset)) }
-emit_jnae_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnae_rel32(offset)) }
+emit_jnae_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnae_rel8(offset)) }
+emit_jnae_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnae_rel32(offset)) }
 inst_jnb_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNB, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnb_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNB, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnb_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnb_rel8(offset)) }
-emit_jnb_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnb_rel32(offset)) }
+emit_jnb_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnb_rel8(offset)) }
+emit_jnb_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnb_rel32(offset)) }
 inst_jnbe_rel8                      :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNBE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnbe_rel32                     :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNBE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnbe_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnbe_rel8(offset)) }
-emit_jnbe_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnbe_rel32(offset)) }
+emit_jnbe_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnbe_rel8(offset)) }
+emit_jnbe_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnbe_rel32(offset)) }
 inst_jnc_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNC, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnc_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNC, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnc_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnc_rel8(offset)) }
-emit_jnc_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnc_rel32(offset)) }
+emit_jnc_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnc_rel8(offset)) }
+emit_jnc_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnc_rel32(offset)) }
 inst_jne_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jne_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jne_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jne_rel8(offset)) }
-emit_jne_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jne_rel32(offset)) }
+emit_jne_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jne_rel8(offset)) }
+emit_jne_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jne_rel32(offset)) }
 inst_jnz_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNZ, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnz_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNZ, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnz_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnz_rel8(offset)) }
-emit_jnz_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnz_rel32(offset)) }
+emit_jnz_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnz_rel8(offset)) }
+emit_jnz_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnz_rel32(offset)) }
 inst_jng_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNG, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jng_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNG, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jng_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jng_rel8(offset)) }
-emit_jng_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jng_rel32(offset)) }
+emit_jng_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jng_rel8(offset)) }
+emit_jng_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jng_rel32(offset)) }
 inst_jnge_rel8                      :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNGE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnge_rel32                     :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNGE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnge_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnge_rel8(offset)) }
-emit_jnge_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnge_rel32(offset)) }
+emit_jnge_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnge_rel8(offset)) }
+emit_jnge_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnge_rel32(offset)) }
 inst_jnl_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNL, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnl_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNL, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnl_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnl_rel8(offset)) }
-emit_jnl_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnl_rel32(offset)) }
+emit_jnl_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnl_rel8(offset)) }
+emit_jnl_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnl_rel32(offset)) }
 inst_jnle_rel8                      :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNLE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnle_rel32                     :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNLE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnle_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnle_rel8(offset)) }
-emit_jnle_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnle_rel32(offset)) }
+emit_jnle_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnle_rel8(offset)) }
+emit_jnle_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnle_rel32(offset)) }
 inst_jno_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNO, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jno_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNO, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jno_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jno_rel8(offset)) }
-emit_jno_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jno_rel32(offset)) }
+emit_jno_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jno_rel8(offset)) }
+emit_jno_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jno_rel32(offset)) }
 inst_jnp_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNP, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jnp_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNP, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jnp_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jnp_rel8(offset)) }
-emit_jnp_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jnp_rel32(offset)) }
+emit_jnp_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jnp_rel8(offset)) }
+emit_jnp_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jnp_rel32(offset)) }
 inst_jns_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JNS, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jns_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JNS, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jns_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jns_rel8(offset)) }
-emit_jns_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jns_rel32(offset)) }
+emit_jns_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jns_rel8(offset)) }
+emit_jns_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jns_rel32(offset)) }
 inst_jo_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JO, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jo_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JO, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jo_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jo_rel8(offset)) }
-emit_jo_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jo_rel32(offset)) }
+emit_jo_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jo_rel8(offset)) }
+emit_jo_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jo_rel32(offset)) }
 inst_jp_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JP, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jp_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JP, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jp_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jp_rel8(offset)) }
-emit_jp_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jp_rel32(offset)) }
+emit_jp_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jp_rel8(offset)) }
+emit_jp_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jp_rel32(offset)) }
 inst_jpe_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JPE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jpe_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JPE, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jpe_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jpe_rel8(offset)) }
-emit_jpe_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jpe_rel32(offset)) }
+emit_jpe_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jpe_rel8(offset)) }
+emit_jpe_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jpe_rel32(offset)) }
 inst_jpo_rel8                       :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JPO, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_jpo_rel32                      :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JPO, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_jpo_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jpo_rel8(offset)) }
-emit_jpo_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_jpo_rel32(offset)) }
+emit_jpo_rel8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jpo_rel8(offset)) }
+emit_jpo_rel32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_jpo_rel32(offset)) }
 inst_js_rel8                        :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JS, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
 inst_js_rel32                       :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .JS, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
-emit_js_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_js_rel8(offset)) }
-emit_js_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_js_rel32(offset)) }
+emit_js_rel8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_js_rel8(offset)) }
+emit_js_rel32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_js_rel32(offset)) }
 inst_jcxz_rel8                      :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JCXZ, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
-emit_jcxz_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jcxz_rel8(offset)) }
+emit_jcxz_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jcxz_rel8(offset)) }
 inst_jecxz_rel8                     :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JECXZ, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
-emit_jecxz_rel8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jecxz_rel8(offset)) }
+emit_jecxz_rel8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jecxz_rel8(offset)) }
 inst_jrcxz_rel8                     :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .JRCXZ, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
-emit_jrcxz_rel8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_jrcxz_rel8(offset)) }
+emit_jrcxz_rel8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_jrcxz_rel8(offset)) }
 inst_loop_rel8                      :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .LOOP, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
-emit_loop_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_loop_rel8(offset)) }
+emit_loop_rel8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_loop_rel8(offset)) }
 inst_loope_rel8                     :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .LOOPE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
-emit_loope_rel8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_loope_rel8(offset)) }
+emit_loope_rel8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_loope_rel8(offset)) }
 inst_loopne_rel8                    :: #force_inline proc "contextless" (offset: i8) -> Instruction { return Instruction{ mnemonic = .LOOPNE, operand_count = 1, ops = {op_rel8(offset), {}, {}, {}} } }
-emit_loopne_rel8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append(instructions, inst_loopne_rel8(offset)) }
+emit_loopne_rel8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i8) { append_elem(instructions, inst_loopne_rel8(offset)) }
 inst_call_rel32                     :: #force_inline proc "contextless" (offset: i32) -> Instruction { return Instruction{ mnemonic = .CALL, operand_count = 1, ops = {op_rel32(offset), {}, {}, {}} } }
 inst_call_r64                       :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CALL, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 507) }
 inst_call_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CALL, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 507) }
 inst_call_m                         :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .CALL, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 508) }
-emit_call_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append(instructions, inst_call_rel32(offset)) }
-emit_call_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_call_r64(dst)) }
-emit_call_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_call_m64(dst)) }
-emit_call_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_call_m(dst)) }
+emit_call_rel32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, offset: i32) { append_elem(instructions, inst_call_rel32(offset)) }
+emit_call_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_call_r64(dst)) }
+emit_call_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_call_m64(dst)) }
+emit_call_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_call_m(dst)) }
 inst_ret_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RET, operand_count = 0, ops = {{}, {}, {}, {}} }, 511) }
 inst_ret_imm16                      :: #force_inline proc "contextless" (imm: i16) -> Instruction { return with_hint(Instruction{ mnemonic = .RET, operand_count = 1, ops = {op_imm16(imm), {}, {}, {}} }, 512) }
-emit_ret_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ret_none()) }
-emit_ret_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append(instructions, inst_ret_imm16(imm)) }
+emit_ret_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ret_none()) }
+emit_ret_imm16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16) { append_elem(instructions, inst_ret_imm16(imm)) }
 inst_iret_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .IRET, operand_count = 0, ops = {{}, {}, {}, {}} }, 513) }
-emit_iret_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_iret_none()) }
+emit_iret_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_iret_none()) }
 inst_iretd_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .IRETD, operand_count = 0, ops = {{}, {}, {}, {}} }, 514) }
-emit_iretd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_iretd_none()) }
+emit_iretd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_iretd_none()) }
 inst_iretq_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .IRETQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 515) }
-emit_iretq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_iretq_none()) }
+emit_iretq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_iretq_none()) }
 inst_int_imm8                       :: #force_inline proc "contextless" (imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .INT, operand_count = 1, ops = {op_imm8(imm), {}, {}, {}} }, 516) }
-emit_int_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_int_imm8(imm)) }
+emit_int_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_int_imm8(imm)) }
 inst_int3_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .INT3, operand_count = 0, ops = {{}, {}, {}, {}} }, 517) }
-emit_int3_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_int3_none()) }
+emit_int3_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_int3_none()) }
 inst_into_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .INTO, operand_count = 0, ops = {{}, {}, {}, {}} }, 518) }
-emit_into_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_into_none()) }
+emit_into_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_into_none()) }
 inst_syscall_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SYSCALL, operand_count = 0, ops = {{}, {}, {}, {}} }, 519) }
-emit_syscall_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_syscall_none()) }
+emit_syscall_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_syscall_none()) }
 inst_sysret_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SYSRET, operand_count = 0, ops = {{}, {}, {}, {}} }, 520) }
-emit_sysret_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sysret_none()) }
+emit_sysret_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sysret_none()) }
 inst_sysenter_none                  :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SYSENTER, operand_count = 0, ops = {{}, {}, {}, {}} }, 521) }
-emit_sysenter_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sysenter_none()) }
+emit_sysenter_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sysenter_none()) }
 inst_sysexit_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SYSEXIT, operand_count = 0, ops = {{}, {}, {}, {}} }, 522) }
-emit_sysexit_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sysexit_none()) }
+emit_sysexit_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sysexit_none()) }
 inst_seta_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETA, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 523) }
 inst_seta_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETA, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 523) }
-emit_seta_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_seta_r8(dst)) }
-emit_seta_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_seta_m8(dst)) }
+emit_seta_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_seta_r8(dst)) }
+emit_seta_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_seta_m8(dst)) }
 inst_setae_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETAE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 524) }
 inst_setae_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETAE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 524) }
-emit_setae_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setae_r8(dst)) }
-emit_setae_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setae_m8(dst)) }
+emit_setae_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setae_r8(dst)) }
+emit_setae_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setae_m8(dst)) }
 inst_setb_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETB, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 525) }
 inst_setb_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETB, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 525) }
-emit_setb_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setb_r8(dst)) }
-emit_setb_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setb_m8(dst)) }
+emit_setb_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setb_r8(dst)) }
+emit_setb_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setb_m8(dst)) }
 inst_setbe_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETBE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 526) }
 inst_setbe_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETBE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 526) }
-emit_setbe_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setbe_r8(dst)) }
-emit_setbe_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setbe_m8(dst)) }
+emit_setbe_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setbe_r8(dst)) }
+emit_setbe_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setbe_m8(dst)) }
 inst_setc_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETC, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 527) }
 inst_setc_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETC, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 527) }
-emit_setc_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setc_r8(dst)) }
-emit_setc_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setc_m8(dst)) }
+emit_setc_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setc_r8(dst)) }
+emit_setc_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setc_m8(dst)) }
 inst_sete_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 528) }
 inst_sete_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 528) }
-emit_sete_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_sete_r8(dst)) }
-emit_sete_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_sete_m8(dst)) }
+emit_sete_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_sete_r8(dst)) }
+emit_sete_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_sete_m8(dst)) }
 inst_setg_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETG, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 529) }
 inst_setg_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETG, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 529) }
-emit_setg_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setg_r8(dst)) }
-emit_setg_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setg_m8(dst)) }
+emit_setg_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setg_r8(dst)) }
+emit_setg_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setg_m8(dst)) }
 inst_setge_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETGE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 530) }
 inst_setge_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETGE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 530) }
-emit_setge_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setge_r8(dst)) }
-emit_setge_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setge_m8(dst)) }
+emit_setge_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setge_r8(dst)) }
+emit_setge_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setge_m8(dst)) }
 inst_setl_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETL, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 531) }
 inst_setl_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETL, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 531) }
-emit_setl_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setl_r8(dst)) }
-emit_setl_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setl_m8(dst)) }
+emit_setl_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setl_r8(dst)) }
+emit_setl_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setl_m8(dst)) }
 inst_setle_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETLE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 532) }
 inst_setle_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETLE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 532) }
-emit_setle_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setle_r8(dst)) }
-emit_setle_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setle_m8(dst)) }
+emit_setle_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setle_r8(dst)) }
+emit_setle_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setle_m8(dst)) }
 inst_setna_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNA, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 533) }
 inst_setna_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNA, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 533) }
-emit_setna_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setna_r8(dst)) }
-emit_setna_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setna_m8(dst)) }
+emit_setna_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setna_r8(dst)) }
+emit_setna_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setna_m8(dst)) }
 inst_setnae_r8                      :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNAE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 534) }
 inst_setnae_m8                      :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNAE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 534) }
-emit_setnae_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnae_r8(dst)) }
-emit_setnae_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnae_m8(dst)) }
+emit_setnae_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnae_r8(dst)) }
+emit_setnae_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnae_m8(dst)) }
 inst_setnb_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNB, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 535) }
 inst_setnb_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNB, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 535) }
-emit_setnb_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnb_r8(dst)) }
-emit_setnb_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnb_m8(dst)) }
+emit_setnb_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnb_r8(dst)) }
+emit_setnb_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnb_m8(dst)) }
 inst_setnbe_r8                      :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNBE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 536) }
 inst_setnbe_m8                      :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNBE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 536) }
-emit_setnbe_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnbe_r8(dst)) }
-emit_setnbe_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnbe_m8(dst)) }
+emit_setnbe_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnbe_r8(dst)) }
+emit_setnbe_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnbe_m8(dst)) }
 inst_setnc_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNC, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 537) }
 inst_setnc_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNC, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 537) }
-emit_setnc_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnc_r8(dst)) }
-emit_setnc_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnc_m8(dst)) }
+emit_setnc_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnc_r8(dst)) }
+emit_setnc_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnc_m8(dst)) }
 inst_setne_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 538) }
 inst_setne_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 538) }
-emit_setne_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setne_r8(dst)) }
-emit_setne_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setne_m8(dst)) }
+emit_setne_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setne_r8(dst)) }
+emit_setne_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setne_m8(dst)) }
 inst_setng_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNG, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 539) }
 inst_setng_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNG, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 539) }
-emit_setng_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setng_r8(dst)) }
-emit_setng_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setng_m8(dst)) }
+emit_setng_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setng_r8(dst)) }
+emit_setng_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setng_m8(dst)) }
 inst_setnge_r8                      :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNGE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 540) }
 inst_setnge_m8                      :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNGE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 540) }
-emit_setnge_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnge_r8(dst)) }
-emit_setnge_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnge_m8(dst)) }
+emit_setnge_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnge_r8(dst)) }
+emit_setnge_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnge_m8(dst)) }
 inst_setnl_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNL, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 541) }
 inst_setnl_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNL, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 541) }
-emit_setnl_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnl_r8(dst)) }
-emit_setnl_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnl_m8(dst)) }
+emit_setnl_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnl_r8(dst)) }
+emit_setnl_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnl_m8(dst)) }
 inst_setnle_r8                      :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNLE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 542) }
 inst_setnle_m8                      :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNLE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 542) }
-emit_setnle_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnle_r8(dst)) }
-emit_setnle_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnle_m8(dst)) }
+emit_setnle_r8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnle_r8(dst)) }
+emit_setnle_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnle_m8(dst)) }
 inst_setno_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNO, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 543) }
 inst_setno_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNO, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 543) }
-emit_setno_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setno_r8(dst)) }
-emit_setno_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setno_m8(dst)) }
+emit_setno_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setno_r8(dst)) }
+emit_setno_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setno_m8(dst)) }
 inst_setnp_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNP, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 544) }
 inst_setnp_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNP, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 544) }
-emit_setnp_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnp_r8(dst)) }
-emit_setnp_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnp_m8(dst)) }
+emit_setnp_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnp_r8(dst)) }
+emit_setnp_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnp_m8(dst)) }
 inst_setns_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNS, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 545) }
 inst_setns_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNS, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 545) }
-emit_setns_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setns_r8(dst)) }
-emit_setns_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setns_m8(dst)) }
+emit_setns_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setns_r8(dst)) }
+emit_setns_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setns_m8(dst)) }
 inst_setnz_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNZ, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 546) }
 inst_setnz_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETNZ, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 546) }
-emit_setnz_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setnz_r8(dst)) }
-emit_setnz_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setnz_m8(dst)) }
+emit_setnz_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setnz_r8(dst)) }
+emit_setnz_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setnz_m8(dst)) }
 inst_seto_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETO, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 547) }
 inst_seto_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETO, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 547) }
-emit_seto_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_seto_r8(dst)) }
-emit_seto_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_seto_m8(dst)) }
+emit_seto_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_seto_r8(dst)) }
+emit_seto_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_seto_m8(dst)) }
 inst_setp_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETP, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 548) }
 inst_setp_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETP, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 548) }
-emit_setp_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setp_r8(dst)) }
-emit_setp_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setp_m8(dst)) }
+emit_setp_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setp_r8(dst)) }
+emit_setp_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setp_m8(dst)) }
 inst_setpe_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETPE, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 549) }
 inst_setpe_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETPE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 549) }
-emit_setpe_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setpe_r8(dst)) }
-emit_setpe_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setpe_m8(dst)) }
+emit_setpe_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setpe_r8(dst)) }
+emit_setpe_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setpe_m8(dst)) }
 inst_setpo_r8                       :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETPO, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 550) }
 inst_setpo_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETPO, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 550) }
-emit_setpo_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setpo_r8(dst)) }
-emit_setpo_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setpo_m8(dst)) }
+emit_setpo_r8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setpo_r8(dst)) }
+emit_setpo_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setpo_m8(dst)) }
 inst_sets_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETS, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 551) }
 inst_sets_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETS, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 551) }
-emit_sets_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_sets_r8(dst)) }
-emit_sets_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_sets_m8(dst)) }
+emit_sets_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_sets_r8(dst)) }
+emit_sets_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_sets_m8(dst)) }
 inst_setz_r8                        :: #force_inline proc "contextless" (dst: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETZ, operand_count = 1, ops = {op_gpr8(dst), {}, {}, {}} }, 552) }
 inst_setz_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .SETZ, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 552) }
-emit_setz_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append(instructions, inst_setz_r8(dst)) }
-emit_setz_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_setz_m8(dst)) }
+emit_setz_r8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8) { append_elem(instructions, inst_setz_r8(dst)) }
+emit_setz_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_setz_m8(dst)) }
 inst_cmova_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVA, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 553) }
 inst_cmova_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVA, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 553) }
 inst_cmova_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVA, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 554) }
 inst_cmova_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVA, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 554) }
 inst_cmova_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVA, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 555) }
 inst_cmova_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVA, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 555) }
-emit_cmova_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmova_r16_r16(dst, src)) }
-emit_cmova_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmova_r16_m16(dst, src)) }
-emit_cmova_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmova_r32_r32(dst, src)) }
-emit_cmova_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmova_r32_m32(dst, src)) }
-emit_cmova_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmova_r64_r64(dst, src)) }
-emit_cmova_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmova_r64_m64(dst, src)) }
+emit_cmova_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmova_r16_r16(dst, src)) }
+emit_cmova_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmova_r16_m16(dst, src)) }
+emit_cmova_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmova_r32_r32(dst, src)) }
+emit_cmova_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmova_r32_m32(dst, src)) }
+emit_cmova_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmova_r64_r64(dst, src)) }
+emit_cmova_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmova_r64_m64(dst, src)) }
 inst_cmovae_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVAE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 556) }
 inst_cmovae_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVAE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 556) }
 inst_cmovae_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVAE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 557) }
 inst_cmovae_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVAE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 557) }
 inst_cmovae_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVAE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 558) }
 inst_cmovae_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVAE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 558) }
-emit_cmovae_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovae_r16_r16(dst, src)) }
-emit_cmovae_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovae_r16_m16(dst, src)) }
-emit_cmovae_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovae_r32_r32(dst, src)) }
-emit_cmovae_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovae_r32_m32(dst, src)) }
-emit_cmovae_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovae_r64_r64(dst, src)) }
-emit_cmovae_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovae_r64_m64(dst, src)) }
+emit_cmovae_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovae_r16_r16(dst, src)) }
+emit_cmovae_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovae_r16_m16(dst, src)) }
+emit_cmovae_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovae_r32_r32(dst, src)) }
+emit_cmovae_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovae_r32_m32(dst, src)) }
+emit_cmovae_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovae_r64_r64(dst, src)) }
+emit_cmovae_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovae_r64_m64(dst, src)) }
 inst_cmovb_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVB, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 559) }
 inst_cmovb_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVB, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 559) }
 inst_cmovb_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVB, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 560) }
 inst_cmovb_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVB, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 560) }
 inst_cmovb_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVB, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 561) }
 inst_cmovb_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVB, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 561) }
-emit_cmovb_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovb_r16_r16(dst, src)) }
-emit_cmovb_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovb_r16_m16(dst, src)) }
-emit_cmovb_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovb_r32_r32(dst, src)) }
-emit_cmovb_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovb_r32_m32(dst, src)) }
-emit_cmovb_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovb_r64_r64(dst, src)) }
-emit_cmovb_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovb_r64_m64(dst, src)) }
+emit_cmovb_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovb_r16_r16(dst, src)) }
+emit_cmovb_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovb_r16_m16(dst, src)) }
+emit_cmovb_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovb_r32_r32(dst, src)) }
+emit_cmovb_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovb_r32_m32(dst, src)) }
+emit_cmovb_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovb_r64_r64(dst, src)) }
+emit_cmovb_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovb_r64_m64(dst, src)) }
 inst_cmovbe_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVBE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 562) }
 inst_cmovbe_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVBE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 562) }
 inst_cmovbe_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVBE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 563) }
 inst_cmovbe_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVBE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 563) }
 inst_cmovbe_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVBE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 564) }
 inst_cmovbe_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVBE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 564) }
-emit_cmovbe_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovbe_r16_r16(dst, src)) }
-emit_cmovbe_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovbe_r16_m16(dst, src)) }
-emit_cmovbe_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovbe_r32_r32(dst, src)) }
-emit_cmovbe_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovbe_r32_m32(dst, src)) }
-emit_cmovbe_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovbe_r64_r64(dst, src)) }
-emit_cmovbe_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovbe_r64_m64(dst, src)) }
+emit_cmovbe_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovbe_r16_r16(dst, src)) }
+emit_cmovbe_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovbe_r16_m16(dst, src)) }
+emit_cmovbe_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovbe_r32_r32(dst, src)) }
+emit_cmovbe_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovbe_r32_m32(dst, src)) }
+emit_cmovbe_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovbe_r64_r64(dst, src)) }
+emit_cmovbe_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovbe_r64_m64(dst, src)) }
 inst_cmovc_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVC, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 565) }
 inst_cmovc_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVC, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 565) }
 inst_cmovc_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVC, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 566) }
 inst_cmovc_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVC, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 566) }
 inst_cmovc_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVC, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 567) }
 inst_cmovc_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVC, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 567) }
-emit_cmovc_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovc_r16_r16(dst, src)) }
-emit_cmovc_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovc_r16_m16(dst, src)) }
-emit_cmovc_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovc_r32_r32(dst, src)) }
-emit_cmovc_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovc_r32_m32(dst, src)) }
-emit_cmovc_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovc_r64_r64(dst, src)) }
-emit_cmovc_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovc_r64_m64(dst, src)) }
+emit_cmovc_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovc_r16_r16(dst, src)) }
+emit_cmovc_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovc_r16_m16(dst, src)) }
+emit_cmovc_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovc_r32_r32(dst, src)) }
+emit_cmovc_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovc_r32_m32(dst, src)) }
+emit_cmovc_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovc_r64_r64(dst, src)) }
+emit_cmovc_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovc_r64_m64(dst, src)) }
 inst_cmove_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 568) }
 inst_cmove_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 568) }
 inst_cmove_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 569) }
 inst_cmove_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 569) }
 inst_cmove_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 570) }
 inst_cmove_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 570) }
-emit_cmove_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmove_r16_r16(dst, src)) }
-emit_cmove_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmove_r16_m16(dst, src)) }
-emit_cmove_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmove_r32_r32(dst, src)) }
-emit_cmove_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmove_r32_m32(dst, src)) }
-emit_cmove_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmove_r64_r64(dst, src)) }
-emit_cmove_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmove_r64_m64(dst, src)) }
+emit_cmove_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmove_r16_r16(dst, src)) }
+emit_cmove_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmove_r16_m16(dst, src)) }
+emit_cmove_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmove_r32_r32(dst, src)) }
+emit_cmove_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmove_r32_m32(dst, src)) }
+emit_cmove_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmove_r64_r64(dst, src)) }
+emit_cmove_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmove_r64_m64(dst, src)) }
 inst_cmovg_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVG, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 571) }
 inst_cmovg_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVG, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 571) }
 inst_cmovg_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVG, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 572) }
 inst_cmovg_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVG, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 572) }
 inst_cmovg_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVG, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 573) }
 inst_cmovg_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVG, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 573) }
-emit_cmovg_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovg_r16_r16(dst, src)) }
-emit_cmovg_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovg_r16_m16(dst, src)) }
-emit_cmovg_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovg_r32_r32(dst, src)) }
-emit_cmovg_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovg_r32_m32(dst, src)) }
-emit_cmovg_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovg_r64_r64(dst, src)) }
-emit_cmovg_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovg_r64_m64(dst, src)) }
+emit_cmovg_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovg_r16_r16(dst, src)) }
+emit_cmovg_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovg_r16_m16(dst, src)) }
+emit_cmovg_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovg_r32_r32(dst, src)) }
+emit_cmovg_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovg_r32_m32(dst, src)) }
+emit_cmovg_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovg_r64_r64(dst, src)) }
+emit_cmovg_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovg_r64_m64(dst, src)) }
 inst_cmovge_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVGE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 574) }
 inst_cmovge_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVGE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 574) }
 inst_cmovge_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVGE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 575) }
 inst_cmovge_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVGE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 575) }
 inst_cmovge_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVGE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 576) }
 inst_cmovge_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVGE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 576) }
-emit_cmovge_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovge_r16_r16(dst, src)) }
-emit_cmovge_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovge_r16_m16(dst, src)) }
-emit_cmovge_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovge_r32_r32(dst, src)) }
-emit_cmovge_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovge_r32_m32(dst, src)) }
-emit_cmovge_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovge_r64_r64(dst, src)) }
-emit_cmovge_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovge_r64_m64(dst, src)) }
+emit_cmovge_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovge_r16_r16(dst, src)) }
+emit_cmovge_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovge_r16_m16(dst, src)) }
+emit_cmovge_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovge_r32_r32(dst, src)) }
+emit_cmovge_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovge_r32_m32(dst, src)) }
+emit_cmovge_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovge_r64_r64(dst, src)) }
+emit_cmovge_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovge_r64_m64(dst, src)) }
 inst_cmovl_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVL, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 577) }
 inst_cmovl_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVL, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 577) }
 inst_cmovl_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVL, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 578) }
 inst_cmovl_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVL, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 578) }
 inst_cmovl_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVL, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 579) }
 inst_cmovl_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVL, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 579) }
-emit_cmovl_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovl_r16_r16(dst, src)) }
-emit_cmovl_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovl_r16_m16(dst, src)) }
-emit_cmovl_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovl_r32_r32(dst, src)) }
-emit_cmovl_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovl_r32_m32(dst, src)) }
-emit_cmovl_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovl_r64_r64(dst, src)) }
-emit_cmovl_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovl_r64_m64(dst, src)) }
+emit_cmovl_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovl_r16_r16(dst, src)) }
+emit_cmovl_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovl_r16_m16(dst, src)) }
+emit_cmovl_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovl_r32_r32(dst, src)) }
+emit_cmovl_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovl_r32_m32(dst, src)) }
+emit_cmovl_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovl_r64_r64(dst, src)) }
+emit_cmovl_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovl_r64_m64(dst, src)) }
 inst_cmovle_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVLE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 580) }
 inst_cmovle_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVLE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 580) }
 inst_cmovle_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVLE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 581) }
 inst_cmovle_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVLE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 581) }
 inst_cmovle_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVLE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 582) }
 inst_cmovle_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVLE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 582) }
-emit_cmovle_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovle_r16_r16(dst, src)) }
-emit_cmovle_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovle_r16_m16(dst, src)) }
-emit_cmovle_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovle_r32_r32(dst, src)) }
-emit_cmovle_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovle_r32_m32(dst, src)) }
-emit_cmovle_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovle_r64_r64(dst, src)) }
-emit_cmovle_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovle_r64_m64(dst, src)) }
+emit_cmovle_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovle_r16_r16(dst, src)) }
+emit_cmovle_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovle_r16_m16(dst, src)) }
+emit_cmovle_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovle_r32_r32(dst, src)) }
+emit_cmovle_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovle_r32_m32(dst, src)) }
+emit_cmovle_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovle_r64_r64(dst, src)) }
+emit_cmovle_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovle_r64_m64(dst, src)) }
 inst_cmovna_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNA, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 583) }
 inst_cmovna_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNA, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 583) }
 inst_cmovna_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNA, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 584) }
 inst_cmovna_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNA, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 584) }
 inst_cmovna_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNA, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 585) }
 inst_cmovna_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNA, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 585) }
-emit_cmovna_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovna_r16_r16(dst, src)) }
-emit_cmovna_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovna_r16_m16(dst, src)) }
-emit_cmovna_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovna_r32_r32(dst, src)) }
-emit_cmovna_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovna_r32_m32(dst, src)) }
-emit_cmovna_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovna_r64_r64(dst, src)) }
-emit_cmovna_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovna_r64_m64(dst, src)) }
+emit_cmovna_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovna_r16_r16(dst, src)) }
+emit_cmovna_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovna_r16_m16(dst, src)) }
+emit_cmovna_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovna_r32_r32(dst, src)) }
+emit_cmovna_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovna_r32_m32(dst, src)) }
+emit_cmovna_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovna_r64_r64(dst, src)) }
+emit_cmovna_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovna_r64_m64(dst, src)) }
 inst_cmovnae_r16_r16                :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNAE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 586) }
 inst_cmovnae_r16_m16                :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNAE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 586) }
 inst_cmovnae_r32_r32                :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNAE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 587) }
 inst_cmovnae_r32_m32                :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNAE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 587) }
 inst_cmovnae_r64_r64                :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNAE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 588) }
 inst_cmovnae_r64_m64                :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNAE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 588) }
-emit_cmovnae_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnae_r16_r16(dst, src)) }
-emit_cmovnae_r16_m16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnae_r16_m16(dst, src)) }
-emit_cmovnae_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnae_r32_r32(dst, src)) }
-emit_cmovnae_r32_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnae_r32_m32(dst, src)) }
-emit_cmovnae_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnae_r64_r64(dst, src)) }
-emit_cmovnae_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnae_r64_m64(dst, src)) }
+emit_cmovnae_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnae_r16_r16(dst, src)) }
+emit_cmovnae_r16_m16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnae_r16_m16(dst, src)) }
+emit_cmovnae_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnae_r32_r32(dst, src)) }
+emit_cmovnae_r32_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnae_r32_m32(dst, src)) }
+emit_cmovnae_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnae_r64_r64(dst, src)) }
+emit_cmovnae_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnae_r64_m64(dst, src)) }
 inst_cmovnb_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNB, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 589) }
 inst_cmovnb_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNB, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 589) }
 inst_cmovnb_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNB, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 590) }
 inst_cmovnb_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNB, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 590) }
 inst_cmovnb_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNB, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 591) }
 inst_cmovnb_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNB, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 591) }
-emit_cmovnb_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnb_r16_r16(dst, src)) }
-emit_cmovnb_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnb_r16_m16(dst, src)) }
-emit_cmovnb_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnb_r32_r32(dst, src)) }
-emit_cmovnb_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnb_r32_m32(dst, src)) }
-emit_cmovnb_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnb_r64_r64(dst, src)) }
-emit_cmovnb_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnb_r64_m64(dst, src)) }
+emit_cmovnb_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnb_r16_r16(dst, src)) }
+emit_cmovnb_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnb_r16_m16(dst, src)) }
+emit_cmovnb_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnb_r32_r32(dst, src)) }
+emit_cmovnb_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnb_r32_m32(dst, src)) }
+emit_cmovnb_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnb_r64_r64(dst, src)) }
+emit_cmovnb_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnb_r64_m64(dst, src)) }
 inst_cmovnbe_r16_r16                :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNBE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 592) }
 inst_cmovnbe_r16_m16                :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNBE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 592) }
 inst_cmovnbe_r32_r32                :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNBE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 593) }
 inst_cmovnbe_r32_m32                :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNBE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 593) }
 inst_cmovnbe_r64_r64                :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNBE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 594) }
 inst_cmovnbe_r64_m64                :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNBE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 594) }
-emit_cmovnbe_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnbe_r16_r16(dst, src)) }
-emit_cmovnbe_r16_m16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnbe_r16_m16(dst, src)) }
-emit_cmovnbe_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnbe_r32_r32(dst, src)) }
-emit_cmovnbe_r32_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnbe_r32_m32(dst, src)) }
-emit_cmovnbe_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnbe_r64_r64(dst, src)) }
-emit_cmovnbe_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnbe_r64_m64(dst, src)) }
+emit_cmovnbe_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnbe_r16_r16(dst, src)) }
+emit_cmovnbe_r16_m16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnbe_r16_m16(dst, src)) }
+emit_cmovnbe_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnbe_r32_r32(dst, src)) }
+emit_cmovnbe_r32_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnbe_r32_m32(dst, src)) }
+emit_cmovnbe_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnbe_r64_r64(dst, src)) }
+emit_cmovnbe_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnbe_r64_m64(dst, src)) }
 inst_cmovnc_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNC, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 595) }
 inst_cmovnc_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNC, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 595) }
 inst_cmovnc_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNC, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 596) }
 inst_cmovnc_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNC, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 596) }
 inst_cmovnc_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNC, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 597) }
 inst_cmovnc_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNC, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 597) }
-emit_cmovnc_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnc_r16_r16(dst, src)) }
-emit_cmovnc_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnc_r16_m16(dst, src)) }
-emit_cmovnc_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnc_r32_r32(dst, src)) }
-emit_cmovnc_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnc_r32_m32(dst, src)) }
-emit_cmovnc_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnc_r64_r64(dst, src)) }
-emit_cmovnc_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnc_r64_m64(dst, src)) }
+emit_cmovnc_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnc_r16_r16(dst, src)) }
+emit_cmovnc_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnc_r16_m16(dst, src)) }
+emit_cmovnc_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnc_r32_r32(dst, src)) }
+emit_cmovnc_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnc_r32_m32(dst, src)) }
+emit_cmovnc_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnc_r64_r64(dst, src)) }
+emit_cmovnc_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnc_r64_m64(dst, src)) }
 inst_cmovne_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 598) }
 inst_cmovne_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 598) }
 inst_cmovne_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 599) }
 inst_cmovne_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 599) }
 inst_cmovne_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 600) }
 inst_cmovne_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 600) }
-emit_cmovne_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovne_r16_r16(dst, src)) }
-emit_cmovne_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovne_r16_m16(dst, src)) }
-emit_cmovne_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovne_r32_r32(dst, src)) }
-emit_cmovne_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovne_r32_m32(dst, src)) }
-emit_cmovne_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovne_r64_r64(dst, src)) }
-emit_cmovne_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovne_r64_m64(dst, src)) }
+emit_cmovne_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovne_r16_r16(dst, src)) }
+emit_cmovne_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovne_r16_m16(dst, src)) }
+emit_cmovne_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovne_r32_r32(dst, src)) }
+emit_cmovne_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovne_r32_m32(dst, src)) }
+emit_cmovne_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovne_r64_r64(dst, src)) }
+emit_cmovne_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovne_r64_m64(dst, src)) }
 inst_cmovng_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNG, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 601) }
 inst_cmovng_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNG, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 601) }
 inst_cmovng_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNG, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 602) }
 inst_cmovng_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNG, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 602) }
 inst_cmovng_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNG, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 603) }
 inst_cmovng_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNG, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 603) }
-emit_cmovng_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovng_r16_r16(dst, src)) }
-emit_cmovng_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovng_r16_m16(dst, src)) }
-emit_cmovng_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovng_r32_r32(dst, src)) }
-emit_cmovng_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovng_r32_m32(dst, src)) }
-emit_cmovng_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovng_r64_r64(dst, src)) }
-emit_cmovng_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovng_r64_m64(dst, src)) }
+emit_cmovng_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovng_r16_r16(dst, src)) }
+emit_cmovng_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovng_r16_m16(dst, src)) }
+emit_cmovng_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovng_r32_r32(dst, src)) }
+emit_cmovng_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovng_r32_m32(dst, src)) }
+emit_cmovng_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovng_r64_r64(dst, src)) }
+emit_cmovng_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovng_r64_m64(dst, src)) }
 inst_cmovnge_r16_r16                :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNGE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 604) }
 inst_cmovnge_r16_m16                :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNGE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 604) }
 inst_cmovnge_r32_r32                :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNGE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 605) }
 inst_cmovnge_r32_m32                :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNGE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 605) }
 inst_cmovnge_r64_r64                :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNGE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 606) }
 inst_cmovnge_r64_m64                :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNGE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 606) }
-emit_cmovnge_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnge_r16_r16(dst, src)) }
-emit_cmovnge_r16_m16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnge_r16_m16(dst, src)) }
-emit_cmovnge_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnge_r32_r32(dst, src)) }
-emit_cmovnge_r32_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnge_r32_m32(dst, src)) }
-emit_cmovnge_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnge_r64_r64(dst, src)) }
-emit_cmovnge_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnge_r64_m64(dst, src)) }
+emit_cmovnge_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnge_r16_r16(dst, src)) }
+emit_cmovnge_r16_m16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnge_r16_m16(dst, src)) }
+emit_cmovnge_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnge_r32_r32(dst, src)) }
+emit_cmovnge_r32_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnge_r32_m32(dst, src)) }
+emit_cmovnge_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnge_r64_r64(dst, src)) }
+emit_cmovnge_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnge_r64_m64(dst, src)) }
 inst_cmovnl_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNL, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 607) }
 inst_cmovnl_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNL, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 607) }
 inst_cmovnl_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNL, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 608) }
 inst_cmovnl_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNL, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 608) }
 inst_cmovnl_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNL, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 609) }
 inst_cmovnl_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNL, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 609) }
-emit_cmovnl_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnl_r16_r16(dst, src)) }
-emit_cmovnl_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnl_r16_m16(dst, src)) }
-emit_cmovnl_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnl_r32_r32(dst, src)) }
-emit_cmovnl_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnl_r32_m32(dst, src)) }
-emit_cmovnl_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnl_r64_r64(dst, src)) }
-emit_cmovnl_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnl_r64_m64(dst, src)) }
+emit_cmovnl_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnl_r16_r16(dst, src)) }
+emit_cmovnl_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnl_r16_m16(dst, src)) }
+emit_cmovnl_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnl_r32_r32(dst, src)) }
+emit_cmovnl_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnl_r32_m32(dst, src)) }
+emit_cmovnl_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnl_r64_r64(dst, src)) }
+emit_cmovnl_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnl_r64_m64(dst, src)) }
 inst_cmovnle_r16_r16                :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNLE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 610) }
 inst_cmovnle_r16_m16                :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNLE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 610) }
 inst_cmovnle_r32_r32                :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNLE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 611) }
 inst_cmovnle_r32_m32                :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNLE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 611) }
 inst_cmovnle_r64_r64                :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNLE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 612) }
 inst_cmovnle_r64_m64                :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNLE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 612) }
-emit_cmovnle_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnle_r16_r16(dst, src)) }
-emit_cmovnle_r16_m16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnle_r16_m16(dst, src)) }
-emit_cmovnle_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnle_r32_r32(dst, src)) }
-emit_cmovnle_r32_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnle_r32_m32(dst, src)) }
-emit_cmovnle_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnle_r64_r64(dst, src)) }
-emit_cmovnle_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnle_r64_m64(dst, src)) }
+emit_cmovnle_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnle_r16_r16(dst, src)) }
+emit_cmovnle_r16_m16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnle_r16_m16(dst, src)) }
+emit_cmovnle_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnle_r32_r32(dst, src)) }
+emit_cmovnle_r32_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnle_r32_m32(dst, src)) }
+emit_cmovnle_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnle_r64_r64(dst, src)) }
+emit_cmovnle_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnle_r64_m64(dst, src)) }
 inst_cmovno_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNO, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 613) }
 inst_cmovno_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNO, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 613) }
 inst_cmovno_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNO, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 614) }
 inst_cmovno_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNO, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 614) }
 inst_cmovno_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNO, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 615) }
 inst_cmovno_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNO, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 615) }
-emit_cmovno_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovno_r16_r16(dst, src)) }
-emit_cmovno_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovno_r16_m16(dst, src)) }
-emit_cmovno_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovno_r32_r32(dst, src)) }
-emit_cmovno_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovno_r32_m32(dst, src)) }
-emit_cmovno_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovno_r64_r64(dst, src)) }
-emit_cmovno_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovno_r64_m64(dst, src)) }
+emit_cmovno_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovno_r16_r16(dst, src)) }
+emit_cmovno_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovno_r16_m16(dst, src)) }
+emit_cmovno_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovno_r32_r32(dst, src)) }
+emit_cmovno_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovno_r32_m32(dst, src)) }
+emit_cmovno_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovno_r64_r64(dst, src)) }
+emit_cmovno_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovno_r64_m64(dst, src)) }
 inst_cmovnp_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNP, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 616) }
 inst_cmovnp_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNP, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 616) }
 inst_cmovnp_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNP, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 617) }
 inst_cmovnp_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNP, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 617) }
 inst_cmovnp_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNP, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 618) }
 inst_cmovnp_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNP, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 618) }
-emit_cmovnp_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnp_r16_r16(dst, src)) }
-emit_cmovnp_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnp_r16_m16(dst, src)) }
-emit_cmovnp_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnp_r32_r32(dst, src)) }
-emit_cmovnp_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnp_r32_m32(dst, src)) }
-emit_cmovnp_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnp_r64_r64(dst, src)) }
-emit_cmovnp_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnp_r64_m64(dst, src)) }
+emit_cmovnp_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnp_r16_r16(dst, src)) }
+emit_cmovnp_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnp_r16_m16(dst, src)) }
+emit_cmovnp_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnp_r32_r32(dst, src)) }
+emit_cmovnp_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnp_r32_m32(dst, src)) }
+emit_cmovnp_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnp_r64_r64(dst, src)) }
+emit_cmovnp_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnp_r64_m64(dst, src)) }
 inst_cmovns_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNS, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 619) }
 inst_cmovns_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNS, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 619) }
 inst_cmovns_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNS, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 620) }
 inst_cmovns_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNS, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 620) }
 inst_cmovns_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNS, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 621) }
 inst_cmovns_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNS, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 621) }
-emit_cmovns_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovns_r16_r16(dst, src)) }
-emit_cmovns_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovns_r16_m16(dst, src)) }
-emit_cmovns_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovns_r32_r32(dst, src)) }
-emit_cmovns_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovns_r32_m32(dst, src)) }
-emit_cmovns_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovns_r64_r64(dst, src)) }
-emit_cmovns_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovns_r64_m64(dst, src)) }
+emit_cmovns_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovns_r16_r16(dst, src)) }
+emit_cmovns_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovns_r16_m16(dst, src)) }
+emit_cmovns_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovns_r32_r32(dst, src)) }
+emit_cmovns_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovns_r32_m32(dst, src)) }
+emit_cmovns_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovns_r64_r64(dst, src)) }
+emit_cmovns_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovns_r64_m64(dst, src)) }
 inst_cmovnz_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNZ, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 622) }
 inst_cmovnz_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNZ, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 622) }
 inst_cmovnz_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNZ, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 623) }
 inst_cmovnz_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNZ, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 623) }
 inst_cmovnz_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNZ, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 624) }
 inst_cmovnz_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVNZ, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 624) }
-emit_cmovnz_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovnz_r16_r16(dst, src)) }
-emit_cmovnz_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovnz_r16_m16(dst, src)) }
-emit_cmovnz_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovnz_r32_r32(dst, src)) }
-emit_cmovnz_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovnz_r32_m32(dst, src)) }
-emit_cmovnz_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovnz_r64_r64(dst, src)) }
-emit_cmovnz_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovnz_r64_m64(dst, src)) }
+emit_cmovnz_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovnz_r16_r16(dst, src)) }
+emit_cmovnz_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovnz_r16_m16(dst, src)) }
+emit_cmovnz_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovnz_r32_r32(dst, src)) }
+emit_cmovnz_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovnz_r32_m32(dst, src)) }
+emit_cmovnz_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovnz_r64_r64(dst, src)) }
+emit_cmovnz_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovnz_r64_m64(dst, src)) }
 inst_cmovo_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVO, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 625) }
 inst_cmovo_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVO, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 625) }
 inst_cmovo_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVO, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 626) }
 inst_cmovo_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVO, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 626) }
 inst_cmovo_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVO, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 627) }
 inst_cmovo_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVO, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 627) }
-emit_cmovo_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovo_r16_r16(dst, src)) }
-emit_cmovo_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovo_r16_m16(dst, src)) }
-emit_cmovo_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovo_r32_r32(dst, src)) }
-emit_cmovo_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovo_r32_m32(dst, src)) }
-emit_cmovo_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovo_r64_r64(dst, src)) }
-emit_cmovo_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovo_r64_m64(dst, src)) }
+emit_cmovo_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovo_r16_r16(dst, src)) }
+emit_cmovo_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovo_r16_m16(dst, src)) }
+emit_cmovo_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovo_r32_r32(dst, src)) }
+emit_cmovo_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovo_r32_m32(dst, src)) }
+emit_cmovo_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovo_r64_r64(dst, src)) }
+emit_cmovo_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovo_r64_m64(dst, src)) }
 inst_cmovp_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVP, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 628) }
 inst_cmovp_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVP, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 628) }
 inst_cmovp_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVP, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 629) }
 inst_cmovp_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVP, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 629) }
 inst_cmovp_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVP, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 630) }
 inst_cmovp_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVP, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 630) }
-emit_cmovp_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovp_r16_r16(dst, src)) }
-emit_cmovp_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovp_r16_m16(dst, src)) }
-emit_cmovp_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovp_r32_r32(dst, src)) }
-emit_cmovp_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovp_r32_m32(dst, src)) }
-emit_cmovp_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovp_r64_r64(dst, src)) }
-emit_cmovp_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovp_r64_m64(dst, src)) }
+emit_cmovp_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovp_r16_r16(dst, src)) }
+emit_cmovp_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovp_r16_m16(dst, src)) }
+emit_cmovp_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovp_r32_r32(dst, src)) }
+emit_cmovp_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovp_r32_m32(dst, src)) }
+emit_cmovp_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovp_r64_r64(dst, src)) }
+emit_cmovp_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovp_r64_m64(dst, src)) }
 inst_cmovpe_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPE, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 631) }
 inst_cmovpe_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 631) }
 inst_cmovpe_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPE, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 632) }
 inst_cmovpe_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 632) }
 inst_cmovpe_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 633) }
 inst_cmovpe_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 633) }
-emit_cmovpe_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovpe_r16_r16(dst, src)) }
-emit_cmovpe_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovpe_r16_m16(dst, src)) }
-emit_cmovpe_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovpe_r32_r32(dst, src)) }
-emit_cmovpe_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovpe_r32_m32(dst, src)) }
-emit_cmovpe_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovpe_r64_r64(dst, src)) }
-emit_cmovpe_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovpe_r64_m64(dst, src)) }
+emit_cmovpe_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovpe_r16_r16(dst, src)) }
+emit_cmovpe_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovpe_r16_m16(dst, src)) }
+emit_cmovpe_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovpe_r32_r32(dst, src)) }
+emit_cmovpe_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovpe_r32_m32(dst, src)) }
+emit_cmovpe_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovpe_r64_r64(dst, src)) }
+emit_cmovpe_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovpe_r64_m64(dst, src)) }
 inst_cmovpo_r16_r16                 :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPO, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 634) }
 inst_cmovpo_r16_m16                 :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPO, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 634) }
 inst_cmovpo_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPO, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 635) }
 inst_cmovpo_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPO, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 635) }
 inst_cmovpo_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPO, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 636) }
 inst_cmovpo_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVPO, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 636) }
-emit_cmovpo_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovpo_r16_r16(dst, src)) }
-emit_cmovpo_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovpo_r16_m16(dst, src)) }
-emit_cmovpo_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovpo_r32_r32(dst, src)) }
-emit_cmovpo_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovpo_r32_m32(dst, src)) }
-emit_cmovpo_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovpo_r64_r64(dst, src)) }
-emit_cmovpo_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovpo_r64_m64(dst, src)) }
+emit_cmovpo_r16_r16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovpo_r16_r16(dst, src)) }
+emit_cmovpo_r16_m16                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovpo_r16_m16(dst, src)) }
+emit_cmovpo_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovpo_r32_r32(dst, src)) }
+emit_cmovpo_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovpo_r32_m32(dst, src)) }
+emit_cmovpo_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovpo_r64_r64(dst, src)) }
+emit_cmovpo_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovpo_r64_m64(dst, src)) }
 inst_cmovs_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVS, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 637) }
 inst_cmovs_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVS, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 637) }
 inst_cmovs_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVS, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 638) }
 inst_cmovs_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVS, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 638) }
 inst_cmovs_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVS, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 639) }
 inst_cmovs_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVS, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 639) }
-emit_cmovs_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovs_r16_r16(dst, src)) }
-emit_cmovs_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovs_r16_m16(dst, src)) }
-emit_cmovs_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovs_r32_r32(dst, src)) }
-emit_cmovs_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovs_r32_m32(dst, src)) }
-emit_cmovs_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovs_r64_r64(dst, src)) }
-emit_cmovs_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovs_r64_m64(dst, src)) }
+emit_cmovs_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovs_r16_r16(dst, src)) }
+emit_cmovs_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovs_r16_m16(dst, src)) }
+emit_cmovs_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovs_r32_r32(dst, src)) }
+emit_cmovs_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovs_r32_m32(dst, src)) }
+emit_cmovs_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovs_r64_r64(dst, src)) }
+emit_cmovs_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovs_r64_m64(dst, src)) }
 inst_cmovz_r16_r16                  :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVZ, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 640) }
 inst_cmovz_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVZ, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 640) }
 inst_cmovz_r32_r32                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVZ, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 641) }
 inst_cmovz_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVZ, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 641) }
 inst_cmovz_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVZ, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 642) }
 inst_cmovz_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMOVZ, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 642) }
-emit_cmovz_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmovz_r16_r16(dst, src)) }
-emit_cmovz_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_cmovz_r16_m16(dst, src)) }
-emit_cmovz_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmovz_r32_r32(dst, src)) }
-emit_cmovz_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cmovz_r32_m32(dst, src)) }
-emit_cmovz_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmovz_r64_r64(dst, src)) }
-emit_cmovz_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cmovz_r64_m64(dst, src)) }
+emit_cmovz_r16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmovz_r16_r16(dst, src)) }
+emit_cmovz_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_cmovz_r16_m16(dst, src)) }
+emit_cmovz_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmovz_r32_r32(dst, src)) }
+emit_cmovz_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cmovz_r32_m32(dst, src)) }
+emit_cmovz_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmovz_r64_r64(dst, src)) }
+emit_cmovz_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cmovz_r64_m64(dst, src)) }
 inst_movs_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MOVS, operand_count = 0, ops = {{}, {}, {}, {}} }, 643) }
-emit_movs_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_movs_none()) }
+emit_movs_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_movs_none()) }
 inst_movsb_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSB, operand_count = 0, ops = {{}, {}, {}, {}} }, 644) }
-emit_movsb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_movsb_none()) }
+emit_movsb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_movsb_none()) }
 inst_movsw_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSW, operand_count = 0, ops = {{}, {}, {}, {}} }, 645) }
-emit_movsw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_movsw_none()) }
+emit_movsw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_movsw_none()) }
 inst_movsd_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSD, operand_count = 0, ops = {{}, {}, {}, {}} }, 646) }
 inst_movsd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 647) }
 inst_movsd_xmm_m64                  :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 647) }
 inst_movsd_m64_xmm                  :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 648) }
-emit_movsd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_movsd_none()) }
-emit_movsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movsd_xmm_xmm(dst, src)) }
-emit_movsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_movsd_xmm_m64(dst, src)) }
-emit_movsd_m64_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_movsd_m64_xmm(dst, src)) }
+emit_movsd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_movsd_none()) }
+emit_movsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movsd_xmm_xmm(dst, src)) }
+emit_movsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_movsd_xmm_m64(dst, src)) }
+emit_movsd_m64_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_movsd_m64_xmm(dst, src)) }
 inst_movsq_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 649) }
-emit_movsq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_movsq_none()) }
+emit_movsq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_movsq_none()) }
 inst_cmps_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CMPS, operand_count = 0, ops = {{}, {}, {}, {}} }, 650) }
-emit_cmps_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cmps_none()) }
+emit_cmps_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cmps_none()) }
 inst_cmpsb_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CMPSB, operand_count = 0, ops = {{}, {}, {}, {}} }, 651) }
-emit_cmpsb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cmpsb_none()) }
+emit_cmpsb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cmpsb_none()) }
 inst_cmpsw_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CMPSW, operand_count = 0, ops = {{}, {}, {}, {}} }, 652) }
-emit_cmpsw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cmpsw_none()) }
+emit_cmpsw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cmpsw_none()) }
 inst_cmpsd_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CMPSD, operand_count = 0, ops = {{}, {}, {}, {}} }, 653) }
 inst_cmpsd_xmm_xmm_imm8             :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 654) }
 inst_cmpsd_xmm_m64_imm8             :: #force_inline proc "contextless" (dst: XMM, src: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPSD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 8), op_imm8(imm), {}} }, 654) }
-emit_cmpsd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cmpsd_none()) }
-emit_cmpsd_xmm_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_cmpsd_xmm_xmm_imm8(dst, src, imm)) }
-emit_cmpsd_xmm_m64_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64, imm: i8) { append(instructions, inst_cmpsd_xmm_m64_imm8(dst, src, imm)) }
+emit_cmpsd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cmpsd_none()) }
+emit_cmpsd_xmm_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_cmpsd_xmm_xmm_imm8(dst, src, imm)) }
+emit_cmpsd_xmm_m64_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64, imm: i8) { append_elem(instructions, inst_cmpsd_xmm_m64_imm8(dst, src, imm)) }
 inst_cmpsq_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CMPSQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 655) }
-emit_cmpsq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cmpsq_none()) }
+emit_cmpsq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cmpsq_none()) }
 inst_scas_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SCAS, operand_count = 0, ops = {{}, {}, {}, {}} }, 656) }
-emit_scas_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_scas_none()) }
+emit_scas_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_scas_none()) }
 inst_scasb_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SCASB, operand_count = 0, ops = {{}, {}, {}, {}} }, 657) }
-emit_scasb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_scasb_none()) }
+emit_scasb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_scasb_none()) }
 inst_scasw_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SCASW, operand_count = 0, ops = {{}, {}, {}, {}} }, 658) }
-emit_scasw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_scasw_none()) }
+emit_scasw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_scasw_none()) }
 inst_scasd_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SCASD, operand_count = 0, ops = {{}, {}, {}, {}} }, 659) }
-emit_scasd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_scasd_none()) }
+emit_scasd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_scasd_none()) }
 inst_scasq_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SCASQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 660) }
-emit_scasq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_scasq_none()) }
+emit_scasq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_scasq_none()) }
 inst_lods_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LODS, operand_count = 0, ops = {{}, {}, {}, {}} }, 661) }
-emit_lods_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lods_none()) }
+emit_lods_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lods_none()) }
 inst_lodsb_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LODSB, operand_count = 0, ops = {{}, {}, {}, {}} }, 662) }
-emit_lodsb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lodsb_none()) }
+emit_lodsb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lodsb_none()) }
 inst_lodsw_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LODSW, operand_count = 0, ops = {{}, {}, {}, {}} }, 663) }
-emit_lodsw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lodsw_none()) }
+emit_lodsw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lodsw_none()) }
 inst_lodsd_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LODSD, operand_count = 0, ops = {{}, {}, {}, {}} }, 664) }
-emit_lodsd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lodsd_none()) }
+emit_lodsd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lodsd_none()) }
 inst_lodsq_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LODSQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 665) }
-emit_lodsq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lodsq_none()) }
+emit_lodsq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lodsq_none()) }
 inst_stos_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STOS, operand_count = 0, ops = {{}, {}, {}, {}} }, 666) }
-emit_stos_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stos_none()) }
+emit_stos_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stos_none()) }
 inst_stosb_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STOSB, operand_count = 0, ops = {{}, {}, {}, {}} }, 667) }
-emit_stosb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stosb_none()) }
+emit_stosb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stosb_none()) }
 inst_stosw_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STOSW, operand_count = 0, ops = {{}, {}, {}, {}} }, 668) }
-emit_stosw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stosw_none()) }
+emit_stosw_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stosw_none()) }
 inst_stosd_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STOSD, operand_count = 0, ops = {{}, {}, {}, {}} }, 669) }
-emit_stosd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stosd_none()) }
+emit_stosd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stosd_none()) }
 inst_stosq_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STOSQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 670) }
-emit_stosq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stosq_none()) }
+emit_stosq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stosq_none()) }
 inst_clc_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CLC, operand_count = 0, ops = {{}, {}, {}, {}} }, 671) }
-emit_clc_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_clc_none()) }
+emit_clc_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_clc_none()) }
 inst_stc_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STC, operand_count = 0, ops = {{}, {}, {}, {}} }, 672) }
-emit_stc_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stc_none()) }
+emit_stc_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stc_none()) }
 inst_cmc_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CMC, operand_count = 0, ops = {{}, {}, {}, {}} }, 673) }
-emit_cmc_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cmc_none()) }
+emit_cmc_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cmc_none()) }
 inst_cld_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CLD, operand_count = 0, ops = {{}, {}, {}, {}} }, 674) }
-emit_cld_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cld_none()) }
+emit_cld_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cld_none()) }
 inst_std_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STD, operand_count = 0, ops = {{}, {}, {}, {}} }, 675) }
-emit_std_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_std_none()) }
+emit_std_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_std_none()) }
 inst_cli_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CLI, operand_count = 0, ops = {{}, {}, {}, {}} }, 676) }
-emit_cli_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cli_none()) }
+emit_cli_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cli_none()) }
 inst_sti_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STI, operand_count = 0, ops = {{}, {}, {}, {}} }, 677) }
-emit_sti_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sti_none()) }
+emit_sti_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sti_none()) }
 inst_lahf_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LAHF, operand_count = 0, ops = {{}, {}, {}, {}} }, 678) }
-emit_lahf_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lahf_none()) }
+emit_lahf_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lahf_none()) }
 inst_sahf_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SAHF, operand_count = 0, ops = {{}, {}, {}, {}} }, 679) }
-emit_sahf_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sahf_none()) }
+emit_sahf_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sahf_none()) }
 inst_pushf_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .PUSHF, operand_count = 0, ops = {{}, {}, {}, {}} }, 680) }
-emit_pushf_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pushf_none()) }
+emit_pushf_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pushf_none()) }
 inst_pushfd_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .PUSHFD, operand_count = 0, ops = {{}, {}, {}, {}} }, 681) }
-emit_pushfd_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pushfd_none()) }
+emit_pushfd_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pushfd_none()) }
 inst_pushfq_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .PUSHFQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 682) }
-emit_pushfq_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pushfq_none()) }
+emit_pushfq_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pushfq_none()) }
 inst_popf_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .POPF, operand_count = 0, ops = {{}, {}, {}, {}} }, 683) }
-emit_popf_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_popf_none()) }
+emit_popf_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_popf_none()) }
 inst_popfd_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .POPFD, operand_count = 0, ops = {{}, {}, {}, {}} }, 684) }
-emit_popfd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_popfd_none()) }
+emit_popfd_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_popfd_none()) }
 inst_popfq_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .POPFQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 685) }
-emit_popfq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_popfq_none()) }
+emit_popfq_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_popfq_none()) }
 inst_nop_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .NOP, operand_count = 0, ops = {{}, {}, {}, {}} }, 686) }
 inst_nop_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .NOP, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 687) }
 inst_nop_m16                        :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .NOP, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 687) }
@@ -2004,215 +2004,215 @@ inst_nop_r32                        :: #force_inline proc "contextless" (dst: GP
 inst_nop_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .NOP, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 688) }
 inst_nop_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .NOP, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 689) }
 inst_nop_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .NOP, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 689) }
-emit_nop_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_nop_none()) }
-emit_nop_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_nop_r16(dst)) }
-emit_nop_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_nop_m16(dst)) }
-emit_nop_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_nop_r32(dst)) }
-emit_nop_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_nop_m32(dst)) }
-emit_nop_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_nop_r64(dst)) }
-emit_nop_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_nop_m64(dst)) }
+emit_nop_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_nop_none()) }
+emit_nop_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_nop_r16(dst)) }
+emit_nop_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_nop_m16(dst)) }
+emit_nop_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_nop_r32(dst)) }
+emit_nop_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_nop_m32(dst)) }
+emit_nop_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_nop_r64(dst)) }
+emit_nop_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_nop_m64(dst)) }
 inst_hlt_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .HLT, operand_count = 0, ops = {{}, {}, {}, {}} }, 690) }
-emit_hlt_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_hlt_none()) }
+emit_hlt_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_hlt_none()) }
 inst_wait_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .WAIT, operand_count = 0, ops = {{}, {}, {}, {}} }, 691) }
-emit_wait_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wait_none()) }
+emit_wait_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wait_none()) }
 inst_lock_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LOCK, operand_count = 0, ops = {{}, {}, {}, {}} }, 692) }
-emit_lock_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lock_none()) }
+emit_lock_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lock_none()) }
 inst_ud0_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .UD0, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 693) }
 inst_ud0_r32_m32                    :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .UD0, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 693) }
-emit_ud0_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_ud0_r32_r32(dst, src)) }
-emit_ud0_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_ud0_r32_m32(dst, src)) }
+emit_ud0_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_ud0_r32_r32(dst, src)) }
+emit_ud0_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_ud0_r32_m32(dst, src)) }
 inst_ud1_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .UD1, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 694) }
 inst_ud1_r32_m32                    :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .UD1, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 694) }
-emit_ud1_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_ud1_r32_r32(dst, src)) }
-emit_ud1_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_ud1_r32_m32(dst, src)) }
+emit_ud1_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_ud1_r32_r32(dst, src)) }
+emit_ud1_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_ud1_r32_m32(dst, src)) }
 inst_ud2_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .UD2, operand_count = 0, ops = {{}, {}, {}, {}} }, 695) }
-emit_ud2_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ud2_none()) }
+emit_ud2_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ud2_none()) }
 inst_cpuid_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CPUID, operand_count = 0, ops = {{}, {}, {}, {}} }, 696) }
-emit_cpuid_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cpuid_none()) }
+emit_cpuid_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cpuid_none()) }
 inst_rdtsc_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RDTSC, operand_count = 0, ops = {{}, {}, {}, {}} }, 697) }
-emit_rdtsc_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rdtsc_none()) }
+emit_rdtsc_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rdtsc_none()) }
 inst_rdtscp_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RDTSCP, operand_count = 0, ops = {{}, {}, {}, {}} }, 698) }
-emit_rdtscp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rdtscp_none()) }
+emit_rdtscp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rdtscp_none()) }
 inst_rdpmc_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RDPMC, operand_count = 0, ops = {{}, {}, {}, {}} }, 699) }
-emit_rdpmc_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rdpmc_none()) }
+emit_rdpmc_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rdpmc_none()) }
 inst_xgetbv_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .XGETBV, operand_count = 0, ops = {{}, {}, {}, {}} }, 700) }
-emit_xgetbv_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xgetbv_none()) }
+emit_xgetbv_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xgetbv_none()) }
 inst_xsetbv_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .XSETBV, operand_count = 0, ops = {{}, {}, {}, {}} }, 701) }
-emit_xsetbv_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xsetbv_none()) }
+emit_xsetbv_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xsetbv_none()) }
 inst_cbw_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CBW, operand_count = 0, ops = {{}, {}, {}, {}} }, 702) }
-emit_cbw_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cbw_none()) }
+emit_cbw_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cbw_none()) }
 inst_cwde_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CWDE, operand_count = 0, ops = {{}, {}, {}, {}} }, 703) }
-emit_cwde_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cwde_none()) }
+emit_cwde_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cwde_none()) }
 inst_cdqe_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CDQE, operand_count = 0, ops = {{}, {}, {}, {}} }, 704) }
-emit_cdqe_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cdqe_none()) }
+emit_cdqe_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cdqe_none()) }
 inst_cwd_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CWD, operand_count = 0, ops = {{}, {}, {}, {}} }, 705) }
-emit_cwd_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cwd_none()) }
+emit_cwd_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cwd_none()) }
 inst_cdq_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CDQ, operand_count = 0, ops = {{}, {}, {}, {}} }, 706) }
-emit_cdq_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cdq_none()) }
+emit_cdq_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cdq_none()) }
 inst_cqo_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CQO, operand_count = 0, ops = {{}, {}, {}, {}} }, 707) }
-emit_cqo_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_cqo_none()) }
+emit_cqo_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_cqo_none()) }
 inst_andn_r32_r32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDN, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 708) }
 inst_andn_r32_r32_m32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDN, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_mem(src2.mem, 4), {}} }, 708) }
 inst_andn_r64_r64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDN, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 709) }
 inst_andn_r64_r64_m64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDN, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_mem(src2.mem, 8), {}} }, 709) }
-emit_andn_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_andn_r32_r32_r32(dst, src, src2)) }
-emit_andn_r32_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: Mem32) { append(instructions, inst_andn_r32_r32_m32(dst, src, src2)) }
-emit_andn_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_andn_r64_r64_r64(dst, src, src2)) }
-emit_andn_r64_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: Mem64) { append(instructions, inst_andn_r64_r64_m64(dst, src, src2)) }
+emit_andn_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_andn_r32_r32_r32(dst, src, src2)) }
+emit_andn_r32_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: Mem32) { append_elem(instructions, inst_andn_r32_r32_m32(dst, src, src2)) }
+emit_andn_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_andn_r64_r64_r64(dst, src, src2)) }
+emit_andn_r64_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: Mem64) { append_elem(instructions, inst_andn_r64_r64_m64(dst, src, src2)) }
 inst_bextr_r32_r32_r32              :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BEXTR, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 710) }
 inst_bextr_r32_m32_r32              :: #force_inline proc "contextless" (dst: GPR32, src: Mem32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BEXTR, operand_count = 3, ops = {op_gpr32(dst), op_mem(src.mem, 4), op_gpr32(src2), {}} }, 710) }
 inst_bextr_r64_r64_r64              :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BEXTR, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 711) }
 inst_bextr_r64_m64_r64              :: #force_inline proc "contextless" (dst: GPR64, src: Mem64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BEXTR, operand_count = 3, ops = {op_gpr64(dst), op_mem(src.mem, 8), op_gpr64(src2), {}} }, 711) }
-emit_bextr_r32_r32_r32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_bextr_r32_r32_r32(dst, src, src2)) }
-emit_bextr_r32_m32_r32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append(instructions, inst_bextr_r32_m32_r32(dst, src, src2)) }
-emit_bextr_r64_r64_r64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_bextr_r64_r64_r64(dst, src, src2)) }
-emit_bextr_r64_m64_r64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append(instructions, inst_bextr_r64_m64_r64(dst, src, src2)) }
+emit_bextr_r32_r32_r32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_bextr_r32_r32_r32(dst, src, src2)) }
+emit_bextr_r32_m32_r32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append_elem(instructions, inst_bextr_r32_m32_r32(dst, src, src2)) }
+emit_bextr_r64_r64_r64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_bextr_r64_r64_r64(dst, src, src2)) }
+emit_bextr_r64_m64_r64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append_elem(instructions, inst_bextr_r64_m64_r64(dst, src, src2)) }
 inst_blsi_r32_r32                   :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSI, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 712) }
 inst_blsi_r32_m32                   :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 712) }
 inst_blsi_r64_r64                   :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSI, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 713) }
 inst_blsi_r64_m64                   :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 713) }
-emit_blsi_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_blsi_r32_r32(dst, src)) }
-emit_blsi_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_blsi_r32_m32(dst, src)) }
-emit_blsi_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_blsi_r64_r64(dst, src)) }
-emit_blsi_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_blsi_r64_m64(dst, src)) }
+emit_blsi_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_blsi_r32_r32(dst, src)) }
+emit_blsi_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_blsi_r32_m32(dst, src)) }
+emit_blsi_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_blsi_r64_r64(dst, src)) }
+emit_blsi_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_blsi_r64_m64(dst, src)) }
 inst_blsmsk_r32_r32                 :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSMSK, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 714) }
 inst_blsmsk_r32_m32                 :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSMSK, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 714) }
 inst_blsmsk_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSMSK, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 715) }
 inst_blsmsk_r64_m64                 :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSMSK, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 715) }
-emit_blsmsk_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_blsmsk_r32_r32(dst, src)) }
-emit_blsmsk_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_blsmsk_r32_m32(dst, src)) }
-emit_blsmsk_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_blsmsk_r64_r64(dst, src)) }
-emit_blsmsk_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_blsmsk_r64_m64(dst, src)) }
+emit_blsmsk_r32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_blsmsk_r32_r32(dst, src)) }
+emit_blsmsk_r32_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_blsmsk_r32_m32(dst, src)) }
+emit_blsmsk_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_blsmsk_r64_r64(dst, src)) }
+emit_blsmsk_r64_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_blsmsk_r64_m64(dst, src)) }
 inst_blsr_r32_r32                   :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSR, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 716) }
 inst_blsr_r32_m32                   :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSR, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 716) }
 inst_blsr_r64_r64                   :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSR, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 717) }
 inst_blsr_r64_m64                   :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .BLSR, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 717) }
-emit_blsr_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_blsr_r32_r32(dst, src)) }
-emit_blsr_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_blsr_r32_m32(dst, src)) }
-emit_blsr_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_blsr_r64_r64(dst, src)) }
-emit_blsr_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_blsr_r64_m64(dst, src)) }
+emit_blsr_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_blsr_r32_r32(dst, src)) }
+emit_blsr_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_blsr_r32_m32(dst, src)) }
+emit_blsr_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_blsr_r64_r64(dst, src)) }
+emit_blsr_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_blsr_r64_m64(dst, src)) }
 inst_bzhi_r32_r32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BZHI, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 718) }
 inst_bzhi_r32_m32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: Mem32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BZHI, operand_count = 3, ops = {op_gpr32(dst), op_mem(src.mem, 4), op_gpr32(src2), {}} }, 718) }
 inst_bzhi_r64_r64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BZHI, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 719) }
 inst_bzhi_r64_m64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: Mem64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BZHI, operand_count = 3, ops = {op_gpr64(dst), op_mem(src.mem, 8), op_gpr64(src2), {}} }, 719) }
-emit_bzhi_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_bzhi_r32_r32_r32(dst, src, src2)) }
-emit_bzhi_r32_m32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append(instructions, inst_bzhi_r32_m32_r32(dst, src, src2)) }
-emit_bzhi_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_bzhi_r64_r64_r64(dst, src, src2)) }
-emit_bzhi_r64_m64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append(instructions, inst_bzhi_r64_m64_r64(dst, src, src2)) }
+emit_bzhi_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_bzhi_r32_r32_r32(dst, src, src2)) }
+emit_bzhi_r32_m32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append_elem(instructions, inst_bzhi_r32_m32_r32(dst, src, src2)) }
+emit_bzhi_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_bzhi_r64_r64_r64(dst, src, src2)) }
+emit_bzhi_r64_m64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append_elem(instructions, inst_bzhi_r64_m64_r64(dst, src, src2)) }
 inst_pdep_r32_r32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .PDEP, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 720) }
 inst_pdep_r32_r32_m32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PDEP, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_mem(src2.mem, 4), {}} }, 720) }
 inst_pdep_r64_r64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .PDEP, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 721) }
 inst_pdep_r64_r64_m64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PDEP, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_mem(src2.mem, 8), {}} }, 721) }
-emit_pdep_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_pdep_r32_r32_r32(dst, src, src2)) }
-emit_pdep_r32_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: Mem32) { append(instructions, inst_pdep_r32_r32_m32(dst, src, src2)) }
-emit_pdep_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_pdep_r64_r64_r64(dst, src, src2)) }
-emit_pdep_r64_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: Mem64) { append(instructions, inst_pdep_r64_r64_m64(dst, src, src2)) }
+emit_pdep_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_pdep_r32_r32_r32(dst, src, src2)) }
+emit_pdep_r32_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: Mem32) { append_elem(instructions, inst_pdep_r32_r32_m32(dst, src, src2)) }
+emit_pdep_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_pdep_r64_r64_r64(dst, src, src2)) }
+emit_pdep_r64_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: Mem64) { append_elem(instructions, inst_pdep_r64_r64_m64(dst, src, src2)) }
 inst_pext_r32_r32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXT, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 722) }
 inst_pext_r32_r32_m32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXT, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_mem(src2.mem, 4), {}} }, 722) }
 inst_pext_r64_r64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXT, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 723) }
 inst_pext_r64_r64_m64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXT, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_mem(src2.mem, 8), {}} }, 723) }
-emit_pext_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_pext_r32_r32_r32(dst, src, src2)) }
-emit_pext_r32_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: Mem32) { append(instructions, inst_pext_r32_r32_m32(dst, src, src2)) }
-emit_pext_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_pext_r64_r64_r64(dst, src, src2)) }
-emit_pext_r64_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: Mem64) { append(instructions, inst_pext_r64_r64_m64(dst, src, src2)) }
+emit_pext_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_pext_r32_r32_r32(dst, src, src2)) }
+emit_pext_r32_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: Mem32) { append_elem(instructions, inst_pext_r32_r32_m32(dst, src, src2)) }
+emit_pext_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_pext_r64_r64_r64(dst, src, src2)) }
+emit_pext_r64_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: Mem64) { append_elem(instructions, inst_pext_r64_r64_m64(dst, src, src2)) }
 inst_rorx_r32_r32_imm8              :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RORX, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_imm8(imm), {}} }, 724) }
 inst_rorx_r32_m32_imm8              :: #force_inline proc "contextless" (dst: GPR32, src: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RORX, operand_count = 3, ops = {op_gpr32(dst), op_mem(src.mem, 4), op_imm8(imm), {}} }, 724) }
 inst_rorx_r64_r64_imm8              :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RORX, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_imm8(imm), {}} }, 725) }
 inst_rorx_r64_m64_imm8              :: #force_inline proc "contextless" (dst: GPR64, src: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .RORX, operand_count = 3, ops = {op_gpr64(dst), op_mem(src.mem, 8), op_imm8(imm), {}} }, 725) }
-emit_rorx_r32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, imm: i8) { append(instructions, inst_rorx_r32_r32_imm8(dst, src, imm)) }
-emit_rorx_r32_m32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, imm: i8) { append(instructions, inst_rorx_r32_m32_imm8(dst, src, imm)) }
-emit_rorx_r64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, imm: i8) { append(instructions, inst_rorx_r64_r64_imm8(dst, src, imm)) }
-emit_rorx_r64_m64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, imm: i8) { append(instructions, inst_rorx_r64_m64_imm8(dst, src, imm)) }
+emit_rorx_r32_r32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, imm: i8) { append_elem(instructions, inst_rorx_r32_r32_imm8(dst, src, imm)) }
+emit_rorx_r32_m32_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, imm: i8) { append_elem(instructions, inst_rorx_r32_m32_imm8(dst, src, imm)) }
+emit_rorx_r64_r64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, imm: i8) { append_elem(instructions, inst_rorx_r64_r64_imm8(dst, src, imm)) }
+emit_rorx_r64_m64_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, imm: i8) { append_elem(instructions, inst_rorx_r64_m64_imm8(dst, src, imm)) }
 inst_sarx_r32_r32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SARX, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 726) }
 inst_sarx_r32_m32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: Mem32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SARX, operand_count = 3, ops = {op_gpr32(dst), op_mem(src.mem, 4), op_gpr32(src2), {}} }, 726) }
 inst_sarx_r64_r64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SARX, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 727) }
 inst_sarx_r64_m64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: Mem64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SARX, operand_count = 3, ops = {op_gpr64(dst), op_mem(src.mem, 8), op_gpr64(src2), {}} }, 727) }
-emit_sarx_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_sarx_r32_r32_r32(dst, src, src2)) }
-emit_sarx_r32_m32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append(instructions, inst_sarx_r32_m32_r32(dst, src, src2)) }
-emit_sarx_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_sarx_r64_r64_r64(dst, src, src2)) }
-emit_sarx_r64_m64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append(instructions, inst_sarx_r64_m64_r64(dst, src, src2)) }
+emit_sarx_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_sarx_r32_r32_r32(dst, src, src2)) }
+emit_sarx_r32_m32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append_elem(instructions, inst_sarx_r32_m32_r32(dst, src, src2)) }
+emit_sarx_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_sarx_r64_r64_r64(dst, src, src2)) }
+emit_sarx_r64_m64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append_elem(instructions, inst_sarx_r64_m64_r64(dst, src, src2)) }
 inst_shlx_r32_r32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLX, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 728) }
 inst_shlx_r32_m32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: Mem32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLX, operand_count = 3, ops = {op_gpr32(dst), op_mem(src.mem, 4), op_gpr32(src2), {}} }, 728) }
 inst_shlx_r64_r64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLX, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 729) }
 inst_shlx_r64_m64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: Mem64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHLX, operand_count = 3, ops = {op_gpr64(dst), op_mem(src.mem, 8), op_gpr64(src2), {}} }, 729) }
-emit_shlx_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_shlx_r32_r32_r32(dst, src, src2)) }
-emit_shlx_r32_m32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append(instructions, inst_shlx_r32_m32_r32(dst, src, src2)) }
-emit_shlx_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_shlx_r64_r64_r64(dst, src, src2)) }
-emit_shlx_r64_m64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append(instructions, inst_shlx_r64_m64_r64(dst, src, src2)) }
+emit_shlx_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_shlx_r32_r32_r32(dst, src, src2)) }
+emit_shlx_r32_m32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append_elem(instructions, inst_shlx_r32_m32_r32(dst, src, src2)) }
+emit_shlx_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_shlx_r64_r64_r64(dst, src, src2)) }
+emit_shlx_r64_m64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append_elem(instructions, inst_shlx_r64_m64_r64(dst, src, src2)) }
 inst_shrx_r32_r32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRX, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 730) }
 inst_shrx_r32_m32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: Mem32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRX, operand_count = 3, ops = {op_gpr32(dst), op_mem(src.mem, 4), op_gpr32(src2), {}} }, 730) }
 inst_shrx_r64_r64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRX, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 731) }
 inst_shrx_r64_m64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: Mem64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SHRX, operand_count = 3, ops = {op_gpr64(dst), op_mem(src.mem, 8), op_gpr64(src2), {}} }, 731) }
-emit_shrx_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_shrx_r32_r32_r32(dst, src, src2)) }
-emit_shrx_r32_m32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append(instructions, inst_shrx_r32_m32_r32(dst, src, src2)) }
-emit_shrx_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_shrx_r64_r64_r64(dst, src, src2)) }
-emit_shrx_r64_m64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append(instructions, inst_shrx_r64_m64_r64(dst, src, src2)) }
+emit_shrx_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_shrx_r32_r32_r32(dst, src, src2)) }
+emit_shrx_r32_m32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32, src2: GPR32) { append_elem(instructions, inst_shrx_r32_m32_r32(dst, src, src2)) }
+emit_shrx_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_shrx_r64_r64_r64(dst, src, src2)) }
+emit_shrx_r64_m64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64, src2: GPR64) { append_elem(instructions, inst_shrx_r64_m64_r64(dst, src, src2)) }
 inst_mulx_r32_r32_r32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .MULX, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_gpr32(src2), {}} }, 732) }
 inst_mulx_r32_r32_m32               :: #force_inline proc "contextless" (dst: GPR32, src: GPR32, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MULX, operand_count = 3, ops = {op_gpr32(dst), op_gpr32(src), op_mem(src2.mem, 4), {}} }, 732) }
 inst_mulx_r64_r64_r64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .MULX, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_gpr64(src2), {}} }, 733) }
 inst_mulx_r64_r64_m64               :: #force_inline proc "contextless" (dst: GPR64, src: GPR64, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MULX, operand_count = 3, ops = {op_gpr64(dst), op_gpr64(src), op_mem(src2.mem, 8), {}} }, 733) }
-emit_mulx_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append(instructions, inst_mulx_r32_r32_r32(dst, src, src2)) }
-emit_mulx_r32_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: Mem32) { append(instructions, inst_mulx_r32_r32_m32(dst, src, src2)) }
-emit_mulx_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append(instructions, inst_mulx_r64_r64_r64(dst, src, src2)) }
-emit_mulx_r64_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: Mem64) { append(instructions, inst_mulx_r64_r64_m64(dst, src, src2)) }
+emit_mulx_r32_r32_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: GPR32) { append_elem(instructions, inst_mulx_r32_r32_r32(dst, src, src2)) }
+emit_mulx_r32_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32, src2: Mem32) { append_elem(instructions, inst_mulx_r32_r32_m32(dst, src, src2)) }
+emit_mulx_r64_r64_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: GPR64) { append_elem(instructions, inst_mulx_r64_r64_r64(dst, src, src2)) }
+emit_mulx_r64_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64, src2: Mem64) { append_elem(instructions, inst_mulx_r64_r64_m64(dst, src, src2)) }
 inst_adcx_r32_r32                   :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADCX, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 734) }
 inst_adcx_r32_m32                   :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADCX, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 734) }
 inst_adcx_r64_r64                   :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .ADCX, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 735) }
 inst_adcx_r64_m64                   :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .ADCX, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 735) }
-emit_adcx_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_adcx_r32_r32(dst, src)) }
-emit_adcx_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_adcx_r32_m32(dst, src)) }
-emit_adcx_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_adcx_r64_r64(dst, src)) }
-emit_adcx_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_adcx_r64_m64(dst, src)) }
+emit_adcx_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_adcx_r32_r32(dst, src)) }
+emit_adcx_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_adcx_r32_m32(dst, src)) }
+emit_adcx_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_adcx_r64_r64(dst, src)) }
+emit_adcx_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_adcx_r64_m64(dst, src)) }
 inst_adox_r32_r32                   :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADOX, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 736) }
 inst_adox_r32_m32                   :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADOX, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 736) }
 inst_adox_r64_r64                   :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .ADOX, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 737) }
 inst_adox_r64_m64                   :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .ADOX, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 737) }
-emit_adox_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_adox_r32_r32(dst, src)) }
-emit_adox_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_adox_r32_m32(dst, src)) }
-emit_adox_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_adox_r64_r64(dst, src)) }
-emit_adox_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_adox_r64_m64(dst, src)) }
+emit_adox_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_adox_r32_r32(dst, src)) }
+emit_adox_r32_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_adox_r32_m32(dst, src)) }
+emit_adox_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_adox_r64_r64(dst, src)) }
+emit_adox_r64_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_adox_r64_m64(dst, src)) }
 inst_movaps_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVAPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 738) }
 inst_movaps_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVAPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 738) }
 inst_movaps_m128_xmm                :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVAPS, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 739) }
-emit_movaps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movaps_xmm_xmm(dst, src)) }
-emit_movaps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movaps_xmm_m128(dst, src)) }
-emit_movaps_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movaps_m128_xmm(dst, src)) }
+emit_movaps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movaps_xmm_xmm(dst, src)) }
+emit_movaps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movaps_xmm_m128(dst, src)) }
+emit_movaps_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movaps_m128_xmm(dst, src)) }
 inst_movups_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVUPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 740) }
 inst_movups_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVUPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 740) }
 inst_movups_m128_xmm                :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVUPS, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 741) }
-emit_movups_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movups_xmm_xmm(dst, src)) }
-emit_movups_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movups_xmm_m128(dst, src)) }
-emit_movups_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movups_m128_xmm(dst, src)) }
+emit_movups_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movups_xmm_xmm(dst, src)) }
+emit_movups_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movups_xmm_m128(dst, src)) }
+emit_movups_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movups_m128_xmm(dst, src)) }
 inst_movapd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVAPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 742) }
 inst_movapd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVAPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 742) }
 inst_movapd_m128_xmm                :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVAPD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 743) }
-emit_movapd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movapd_xmm_xmm(dst, src)) }
-emit_movapd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movapd_xmm_m128(dst, src)) }
-emit_movapd_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movapd_m128_xmm(dst, src)) }
+emit_movapd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movapd_xmm_xmm(dst, src)) }
+emit_movapd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movapd_xmm_m128(dst, src)) }
+emit_movapd_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movapd_m128_xmm(dst, src)) }
 inst_movupd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVUPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 744) }
 inst_movupd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVUPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 744) }
 inst_movupd_m128_xmm                :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVUPD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 745) }
-emit_movupd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movupd_xmm_xmm(dst, src)) }
-emit_movupd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movupd_xmm_m128(dst, src)) }
-emit_movupd_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movupd_m128_xmm(dst, src)) }
+emit_movupd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movupd_xmm_xmm(dst, src)) }
+emit_movupd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movupd_xmm_m128(dst, src)) }
+emit_movupd_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movupd_m128_xmm(dst, src)) }
 inst_movss_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 746) }
 inst_movss_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 746) }
 inst_movss_m32_xmm                  :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSS, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 747) }
-emit_movss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movss_xmm_xmm(dst, src)) }
-emit_movss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_movss_xmm_m32(dst, src)) }
-emit_movss_m32_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_movss_m32_xmm(dst, src)) }
+emit_movss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movss_xmm_xmm(dst, src)) }
+emit_movss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_movss_xmm_m32(dst, src)) }
+emit_movss_m32_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_movss_m32_xmm(dst, src)) }
 inst_movdqa_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDQA, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 748) }
 inst_movdqa_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDQA, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 748) }
 inst_movdqa_m128_xmm                :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDQA, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 749) }
-emit_movdqa_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movdqa_xmm_xmm(dst, src)) }
-emit_movdqa_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movdqa_xmm_m128(dst, src)) }
-emit_movdqa_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movdqa_m128_xmm(dst, src)) }
+emit_movdqa_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movdqa_xmm_xmm(dst, src)) }
+emit_movdqa_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movdqa_xmm_m128(dst, src)) }
+emit_movdqa_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movdqa_m128_xmm(dst, src)) }
 inst_movdqu_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDQU, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 750) }
 inst_movdqu_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDQU, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 750) }
 inst_movdqu_m128_xmm                :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDQU, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 751) }
-emit_movdqu_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movdqu_xmm_xmm(dst, src)) }
-emit_movdqu_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movdqu_xmm_m128(dst, src)) }
-emit_movdqu_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movdqu_m128_xmm(dst, src)) }
+emit_movdqu_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movdqu_xmm_xmm(dst, src)) }
+emit_movdqu_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movdqu_xmm_m128(dst, src)) }
+emit_movdqu_m128_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movdqu_m128_xmm(dst, src)) }
 inst_movq_xmm_xmm                   :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 752) }
 inst_movq_xmm_m64                   :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 752) }
 inst_movq_m64_xmm                   :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVQ, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 753) }
@@ -2221,14 +2221,14 @@ inst_movq_mm_m64                    :: #force_inline proc "contextless" (dst: MM
 inst_movq_m64_mm                    :: #force_inline proc "contextless" (dst: Mem64, src: MM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVQ, operand_count = 2, ops = {op_mem(dst.mem, 8), op_mm(src), {}, {}} }, 755) }
 inst_movq_r64_xmm                   :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVQ, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 756) }
 inst_movq_xmm_r64                   :: #force_inline proc "contextless" (dst: XMM, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVQ, operand_count = 2, ops = {op_xmm(dst), op_gpr64(src), {}, {}} }, 757) }
-emit_movq_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movq_xmm_xmm(dst, src)) }
-emit_movq_xmm_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_movq_xmm_m64(dst, src)) }
-emit_movq_m64_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_movq_m64_xmm(dst, src)) }
-emit_movq_mm_mm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: MM) { append(instructions, inst_movq_mm_mm(dst, src)) }
-emit_movq_mm_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: Mem64) { append(instructions, inst_movq_mm_m64(dst, src)) }
-emit_movq_m64_mm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: MM) { append(instructions, inst_movq_m64_mm(dst, src)) }
-emit_movq_r64_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_movq_r64_xmm(dst, src)) }
-emit_movq_xmm_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64) { append(instructions, inst_movq_xmm_r64(dst, src)) }
+emit_movq_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movq_xmm_xmm(dst, src)) }
+emit_movq_xmm_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_movq_xmm_m64(dst, src)) }
+emit_movq_m64_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_movq_m64_xmm(dst, src)) }
+emit_movq_mm_mm                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: MM) { append_elem(instructions, inst_movq_mm_mm(dst, src)) }
+emit_movq_mm_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: Mem64) { append_elem(instructions, inst_movq_mm_m64(dst, src)) }
+emit_movq_m64_mm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: MM) { append_elem(instructions, inst_movq_m64_mm(dst, src)) }
+emit_movq_r64_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_movq_r64_xmm(dst, src)) }
+emit_movq_xmm_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64) { append_elem(instructions, inst_movq_xmm_r64(dst, src)) }
 inst_movd_xmm_r32                   :: #force_inline proc "contextless" (dst: XMM, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVD, operand_count = 2, ops = {op_xmm(dst), op_gpr32(src), {}, {}} }, 758) }
 inst_movd_xmm_m32                   :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 758) }
 inst_movd_r32_xmm                   :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVD, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 759) }
@@ -2237,924 +2237,924 @@ inst_movd_mm_r32                    :: #force_inline proc "contextless" (dst: MM
 inst_movd_mm_m32                    :: #force_inline proc "contextless" (dst: MM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVD, operand_count = 2, ops = {op_mm(dst), op_mem(src.mem, 4), {}, {}} }, 760) }
 inst_movd_r32_mm                    :: #force_inline proc "contextless" (dst: GPR32, src: MM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVD, operand_count = 2, ops = {op_gpr32(dst), op_mm(src), {}, {}} }, 761) }
 inst_movd_m32_mm                    :: #force_inline proc "contextless" (dst: Mem32, src: MM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_mm(src), {}, {}} }, 761) }
-emit_movd_xmm_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32) { append(instructions, inst_movd_xmm_r32(dst, src)) }
-emit_movd_xmm_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_movd_xmm_m32(dst, src)) }
-emit_movd_r32_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_movd_r32_xmm(dst, src)) }
-emit_movd_m32_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_movd_m32_xmm(dst, src)) }
-emit_movd_mm_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: GPR32) { append(instructions, inst_movd_mm_r32(dst, src)) }
-emit_movd_mm_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: Mem32) { append(instructions, inst_movd_mm_m32(dst, src)) }
-emit_movd_r32_mm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: MM) { append(instructions, inst_movd_r32_mm(dst, src)) }
-emit_movd_m32_mm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: MM) { append(instructions, inst_movd_m32_mm(dst, src)) }
+emit_movd_xmm_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32) { append_elem(instructions, inst_movd_xmm_r32(dst, src)) }
+emit_movd_xmm_m32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_movd_xmm_m32(dst, src)) }
+emit_movd_r32_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_movd_r32_xmm(dst, src)) }
+emit_movd_m32_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_movd_m32_xmm(dst, src)) }
+emit_movd_mm_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: GPR32) { append_elem(instructions, inst_movd_mm_r32(dst, src)) }
+emit_movd_mm_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: Mem32) { append_elem(instructions, inst_movd_mm_m32(dst, src)) }
+emit_movd_r32_mm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: MM) { append_elem(instructions, inst_movd_r32_mm(dst, src)) }
+emit_movd_m32_mm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: MM) { append_elem(instructions, inst_movd_m32_mm(dst, src)) }
 inst_movlps_xmm_m64                 :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVLPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 762) }
 inst_movlps_m64_xmm                 :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVLPS, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 763) }
-emit_movlps_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_movlps_xmm_m64(dst, src)) }
-emit_movlps_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_movlps_m64_xmm(dst, src)) }
+emit_movlps_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_movlps_xmm_m64(dst, src)) }
+emit_movlps_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_movlps_m64_xmm(dst, src)) }
 inst_movhps_xmm_m64                 :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVHPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 764) }
 inst_movhps_m64_xmm                 :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVHPS, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 765) }
-emit_movhps_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_movhps_xmm_m64(dst, src)) }
-emit_movhps_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_movhps_m64_xmm(dst, src)) }
+emit_movhps_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_movhps_xmm_m64(dst, src)) }
+emit_movhps_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_movhps_m64_xmm(dst, src)) }
 inst_movlpd_xmm_m64                 :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVLPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 766) }
 inst_movlpd_m64_xmm                 :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVLPD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 767) }
-emit_movlpd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_movlpd_xmm_m64(dst, src)) }
-emit_movlpd_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_movlpd_m64_xmm(dst, src)) }
+emit_movlpd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_movlpd_xmm_m64(dst, src)) }
+emit_movlpd_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_movlpd_m64_xmm(dst, src)) }
 inst_movhpd_xmm_m64                 :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVHPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 768) }
 inst_movhpd_m64_xmm                 :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVHPD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 769) }
-emit_movhpd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_movhpd_xmm_m64(dst, src)) }
-emit_movhpd_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_movhpd_m64_xmm(dst, src)) }
+emit_movhpd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_movhpd_xmm_m64(dst, src)) }
+emit_movhpd_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_movhpd_m64_xmm(dst, src)) }
 inst_movlhps_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVLHPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 770) }
-emit_movlhps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movlhps_xmm_xmm(dst, src)) }
+emit_movlhps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movlhps_xmm_xmm(dst, src)) }
 inst_movhlps_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVHLPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 771) }
-emit_movhlps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movhlps_xmm_xmm(dst, src)) }
+emit_movhlps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movhlps_xmm_xmm(dst, src)) }
 inst_movmskps_r32_xmm               :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVMSKPS, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 772) }
 inst_movmskps_r64_xmm               :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVMSKPS, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 773) }
-emit_movmskps_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_movmskps_r32_xmm(dst, src)) }
-emit_movmskps_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_movmskps_r64_xmm(dst, src)) }
+emit_movmskps_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_movmskps_r32_xmm(dst, src)) }
+emit_movmskps_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_movmskps_r64_xmm(dst, src)) }
 inst_movmskpd_r32_xmm               :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVMSKPD, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 774) }
 inst_movmskpd_r64_xmm               :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVMSKPD, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 775) }
-emit_movmskpd_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_movmskpd_r32_xmm(dst, src)) }
-emit_movmskpd_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_movmskpd_r64_xmm(dst, src)) }
+emit_movmskpd_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_movmskpd_r32_xmm(dst, src)) }
+emit_movmskpd_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_movmskpd_r64_xmm(dst, src)) }
 inst_movntps_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVNTPS, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 776) }
-emit_movntps_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movntps_m128_xmm(dst, src)) }
+emit_movntps_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movntps_m128_xmm(dst, src)) }
 inst_movntpd_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVNTPD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 777) }
-emit_movntpd_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movntpd_m128_xmm(dst, src)) }
+emit_movntpd_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movntpd_m128_xmm(dst, src)) }
 inst_movntdq_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVNTDQ, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 778) }
-emit_movntdq_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_movntdq_m128_xmm(dst, src)) }
+emit_movntdq_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_movntdq_m128_xmm(dst, src)) }
 inst_movntdqa_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVNTDQA, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 779) }
-emit_movntdqa_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movntdqa_xmm_m128(dst, src)) }
+emit_movntdqa_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movntdqa_xmm_m128(dst, src)) }
 inst_addps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 780) }
 inst_addps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 780) }
-emit_addps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_addps_xmm_xmm(dst, src)) }
-emit_addps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_addps_xmm_m128(dst, src)) }
+emit_addps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_addps_xmm_xmm(dst, src)) }
+emit_addps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_addps_xmm_m128(dst, src)) }
 inst_addpd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 781) }
 inst_addpd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 781) }
-emit_addpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_addpd_xmm_xmm(dst, src)) }
-emit_addpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_addpd_xmm_m128(dst, src)) }
+emit_addpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_addpd_xmm_xmm(dst, src)) }
+emit_addpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_addpd_xmm_m128(dst, src)) }
 inst_addss_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 782) }
 inst_addss_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 782) }
-emit_addss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_addss_xmm_xmm(dst, src)) }
-emit_addss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_addss_xmm_m32(dst, src)) }
+emit_addss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_addss_xmm_xmm(dst, src)) }
+emit_addss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_addss_xmm_m32(dst, src)) }
 inst_addsd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 783) }
 inst_addsd_xmm_m64                  :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 783) }
-emit_addsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_addsd_xmm_xmm(dst, src)) }
-emit_addsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_addsd_xmm_m64(dst, src)) }
+emit_addsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_addsd_xmm_xmm(dst, src)) }
+emit_addsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_addsd_xmm_m64(dst, src)) }
 inst_subps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SUBPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 784) }
 inst_subps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SUBPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 784) }
-emit_subps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_subps_xmm_xmm(dst, src)) }
-emit_subps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_subps_xmm_m128(dst, src)) }
+emit_subps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_subps_xmm_xmm(dst, src)) }
+emit_subps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_subps_xmm_m128(dst, src)) }
 inst_subpd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SUBPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 785) }
 inst_subpd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SUBPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 785) }
-emit_subpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_subpd_xmm_xmm(dst, src)) }
-emit_subpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_subpd_xmm_m128(dst, src)) }
+emit_subpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_subpd_xmm_xmm(dst, src)) }
+emit_subpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_subpd_xmm_m128(dst, src)) }
 inst_subss_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SUBSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 786) }
 inst_subss_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .SUBSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 786) }
-emit_subss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_subss_xmm_xmm(dst, src)) }
-emit_subss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_subss_xmm_m32(dst, src)) }
+emit_subss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_subss_xmm_xmm(dst, src)) }
+emit_subss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_subss_xmm_m32(dst, src)) }
 inst_subsd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SUBSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 787) }
 inst_subsd_xmm_m64                  :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .SUBSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 787) }
-emit_subsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_subsd_xmm_xmm(dst, src)) }
-emit_subsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_subsd_xmm_m64(dst, src)) }
+emit_subsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_subsd_xmm_xmm(dst, src)) }
+emit_subsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_subsd_xmm_m64(dst, src)) }
 inst_mulps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MULPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 788) }
 inst_mulps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MULPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 788) }
-emit_mulps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_mulps_xmm_xmm(dst, src)) }
-emit_mulps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_mulps_xmm_m128(dst, src)) }
+emit_mulps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_mulps_xmm_xmm(dst, src)) }
+emit_mulps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_mulps_xmm_m128(dst, src)) }
 inst_mulpd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MULPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 789) }
 inst_mulpd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MULPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 789) }
-emit_mulpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_mulpd_xmm_xmm(dst, src)) }
-emit_mulpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_mulpd_xmm_m128(dst, src)) }
+emit_mulpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_mulpd_xmm_xmm(dst, src)) }
+emit_mulpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_mulpd_xmm_m128(dst, src)) }
 inst_mulss_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MULSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 790) }
 inst_mulss_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MULSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 790) }
-emit_mulss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_mulss_xmm_xmm(dst, src)) }
-emit_mulss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_mulss_xmm_m32(dst, src)) }
+emit_mulss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_mulss_xmm_xmm(dst, src)) }
+emit_mulss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_mulss_xmm_m32(dst, src)) }
 inst_mulsd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MULSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 791) }
 inst_mulsd_xmm_m64                  :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MULSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 791) }
-emit_mulsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_mulsd_xmm_xmm(dst, src)) }
-emit_mulsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_mulsd_xmm_m64(dst, src)) }
+emit_mulsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_mulsd_xmm_xmm(dst, src)) }
+emit_mulsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_mulsd_xmm_m64(dst, src)) }
 inst_divps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .DIVPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 792) }
 inst_divps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .DIVPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 792) }
-emit_divps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_divps_xmm_xmm(dst, src)) }
-emit_divps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_divps_xmm_m128(dst, src)) }
+emit_divps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_divps_xmm_xmm(dst, src)) }
+emit_divps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_divps_xmm_m128(dst, src)) }
 inst_divpd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .DIVPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 793) }
 inst_divpd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .DIVPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 793) }
-emit_divpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_divpd_xmm_xmm(dst, src)) }
-emit_divpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_divpd_xmm_m128(dst, src)) }
+emit_divpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_divpd_xmm_xmm(dst, src)) }
+emit_divpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_divpd_xmm_m128(dst, src)) }
 inst_divss_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .DIVSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 794) }
 inst_divss_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .DIVSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 794) }
-emit_divss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_divss_xmm_xmm(dst, src)) }
-emit_divss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_divss_xmm_m32(dst, src)) }
+emit_divss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_divss_xmm_xmm(dst, src)) }
+emit_divss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_divss_xmm_m32(dst, src)) }
 inst_divsd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .DIVSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 795) }
 inst_divsd_xmm_m64                  :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .DIVSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 795) }
-emit_divsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_divsd_xmm_xmm(dst, src)) }
-emit_divsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_divsd_xmm_m64(dst, src)) }
+emit_divsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_divsd_xmm_xmm(dst, src)) }
+emit_divsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_divsd_xmm_m64(dst, src)) }
 inst_sqrtps_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SQRTPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 796) }
 inst_sqrtps_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SQRTPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 796) }
-emit_sqrtps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sqrtps_xmm_xmm(dst, src)) }
-emit_sqrtps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_sqrtps_xmm_m128(dst, src)) }
+emit_sqrtps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sqrtps_xmm_xmm(dst, src)) }
+emit_sqrtps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_sqrtps_xmm_m128(dst, src)) }
 inst_sqrtpd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SQRTPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 797) }
 inst_sqrtpd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SQRTPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 797) }
-emit_sqrtpd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sqrtpd_xmm_xmm(dst, src)) }
-emit_sqrtpd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_sqrtpd_xmm_m128(dst, src)) }
+emit_sqrtpd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sqrtpd_xmm_xmm(dst, src)) }
+emit_sqrtpd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_sqrtpd_xmm_m128(dst, src)) }
 inst_sqrtss_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SQRTSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 798) }
 inst_sqrtss_xmm_m32                 :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .SQRTSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 798) }
-emit_sqrtss_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sqrtss_xmm_xmm(dst, src)) }
-emit_sqrtss_xmm_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_sqrtss_xmm_m32(dst, src)) }
+emit_sqrtss_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sqrtss_xmm_xmm(dst, src)) }
+emit_sqrtss_xmm_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_sqrtss_xmm_m32(dst, src)) }
 inst_sqrtsd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SQRTSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 799) }
 inst_sqrtsd_xmm_m64                 :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .SQRTSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 799) }
-emit_sqrtsd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sqrtsd_xmm_xmm(dst, src)) }
-emit_sqrtsd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_sqrtsd_xmm_m64(dst, src)) }
+emit_sqrtsd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sqrtsd_xmm_xmm(dst, src)) }
+emit_sqrtsd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_sqrtsd_xmm_m64(dst, src)) }
 inst_rcpps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .RCPPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 800) }
 inst_rcpps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .RCPPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 800) }
-emit_rcpps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_rcpps_xmm_xmm(dst, src)) }
-emit_rcpps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_rcpps_xmm_m128(dst, src)) }
+emit_rcpps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_rcpps_xmm_xmm(dst, src)) }
+emit_rcpps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_rcpps_xmm_m128(dst, src)) }
 inst_rcpss_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .RCPSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 801) }
 inst_rcpss_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .RCPSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 801) }
-emit_rcpss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_rcpss_xmm_xmm(dst, src)) }
-emit_rcpss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_rcpss_xmm_m32(dst, src)) }
+emit_rcpss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_rcpss_xmm_xmm(dst, src)) }
+emit_rcpss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_rcpss_xmm_m32(dst, src)) }
 inst_rsqrtps_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .RSQRTPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 802) }
 inst_rsqrtps_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .RSQRTPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 802) }
-emit_rsqrtps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_rsqrtps_xmm_xmm(dst, src)) }
-emit_rsqrtps_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_rsqrtps_xmm_m128(dst, src)) }
+emit_rsqrtps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_rsqrtps_xmm_xmm(dst, src)) }
+emit_rsqrtps_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_rsqrtps_xmm_m128(dst, src)) }
 inst_rsqrtss_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .RSQRTSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 803) }
 inst_rsqrtss_xmm_m32                :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .RSQRTSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 803) }
-emit_rsqrtss_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_rsqrtss_xmm_xmm(dst, src)) }
-emit_rsqrtss_xmm_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_rsqrtss_xmm_m32(dst, src)) }
+emit_rsqrtss_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_rsqrtss_xmm_xmm(dst, src)) }
+emit_rsqrtss_xmm_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_rsqrtss_xmm_m32(dst, src)) }
 inst_maxps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MAXPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 804) }
 inst_maxps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MAXPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 804) }
-emit_maxps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_maxps_xmm_xmm(dst, src)) }
-emit_maxps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_maxps_xmm_m128(dst, src)) }
+emit_maxps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_maxps_xmm_xmm(dst, src)) }
+emit_maxps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_maxps_xmm_m128(dst, src)) }
 inst_maxpd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MAXPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 805) }
 inst_maxpd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MAXPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 805) }
-emit_maxpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_maxpd_xmm_xmm(dst, src)) }
-emit_maxpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_maxpd_xmm_m128(dst, src)) }
+emit_maxpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_maxpd_xmm_xmm(dst, src)) }
+emit_maxpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_maxpd_xmm_m128(dst, src)) }
 inst_maxss_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MAXSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 806) }
 inst_maxss_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MAXSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 806) }
-emit_maxss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_maxss_xmm_xmm(dst, src)) }
-emit_maxss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_maxss_xmm_m32(dst, src)) }
+emit_maxss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_maxss_xmm_xmm(dst, src)) }
+emit_maxss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_maxss_xmm_m32(dst, src)) }
 inst_maxsd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MAXSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 807) }
 inst_maxsd_xmm_m64                  :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MAXSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 807) }
-emit_maxsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_maxsd_xmm_xmm(dst, src)) }
-emit_maxsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_maxsd_xmm_m64(dst, src)) }
+emit_maxsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_maxsd_xmm_xmm(dst, src)) }
+emit_maxsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_maxsd_xmm_m64(dst, src)) }
 inst_minps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MINPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 808) }
 inst_minps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MINPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 808) }
-emit_minps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_minps_xmm_xmm(dst, src)) }
-emit_minps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_minps_xmm_m128(dst, src)) }
+emit_minps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_minps_xmm_xmm(dst, src)) }
+emit_minps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_minps_xmm_m128(dst, src)) }
 inst_minpd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MINPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 809) }
 inst_minpd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MINPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 809) }
-emit_minpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_minpd_xmm_xmm(dst, src)) }
-emit_minpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_minpd_xmm_m128(dst, src)) }
+emit_minpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_minpd_xmm_xmm(dst, src)) }
+emit_minpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_minpd_xmm_m128(dst, src)) }
 inst_minss_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MINSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 810) }
 inst_minss_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MINSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 810) }
-emit_minss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_minss_xmm_xmm(dst, src)) }
-emit_minss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_minss_xmm_m32(dst, src)) }
+emit_minss_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_minss_xmm_xmm(dst, src)) }
+emit_minss_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_minss_xmm_m32(dst, src)) }
 inst_minsd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MINSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 811) }
 inst_minsd_xmm_m64                  :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MINSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 811) }
-emit_minsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_minsd_xmm_xmm(dst, src)) }
-emit_minsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_minsd_xmm_m64(dst, src)) }
+emit_minsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_minsd_xmm_xmm(dst, src)) }
+emit_minsd_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_minsd_xmm_m64(dst, src)) }
 inst_andps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 812) }
 inst_andps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 812) }
-emit_andps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_andps_xmm_xmm(dst, src)) }
-emit_andps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_andps_xmm_m128(dst, src)) }
+emit_andps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_andps_xmm_xmm(dst, src)) }
+emit_andps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_andps_xmm_m128(dst, src)) }
 inst_andpd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 813) }
 inst_andpd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 813) }
-emit_andpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_andpd_xmm_xmm(dst, src)) }
-emit_andpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_andpd_xmm_m128(dst, src)) }
+emit_andpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_andpd_xmm_xmm(dst, src)) }
+emit_andpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_andpd_xmm_m128(dst, src)) }
 inst_andnps_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDNPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 814) }
 inst_andnps_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDNPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 814) }
-emit_andnps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_andnps_xmm_xmm(dst, src)) }
-emit_andnps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_andnps_xmm_m128(dst, src)) }
+emit_andnps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_andnps_xmm_xmm(dst, src)) }
+emit_andnps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_andnps_xmm_m128(dst, src)) }
 inst_andnpd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDNPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 815) }
 inst_andnpd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ANDNPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 815) }
-emit_andnpd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_andnpd_xmm_xmm(dst, src)) }
-emit_andnpd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_andnpd_xmm_m128(dst, src)) }
+emit_andnpd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_andnpd_xmm_xmm(dst, src)) }
+emit_andnpd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_andnpd_xmm_m128(dst, src)) }
 inst_orps_xmm_xmm                   :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ORPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 816) }
 inst_orps_xmm_m128                  :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ORPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 816) }
-emit_orps_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_orps_xmm_xmm(dst, src)) }
-emit_orps_xmm_m128                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_orps_xmm_m128(dst, src)) }
+emit_orps_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_orps_xmm_xmm(dst, src)) }
+emit_orps_xmm_m128                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_orps_xmm_m128(dst, src)) }
 inst_orpd_xmm_xmm                   :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ORPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 817) }
 inst_orpd_xmm_m128                  :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ORPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 817) }
-emit_orpd_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_orpd_xmm_xmm(dst, src)) }
-emit_orpd_xmm_m128                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_orpd_xmm_m128(dst, src)) }
+emit_orpd_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_orpd_xmm_xmm(dst, src)) }
+emit_orpd_xmm_m128                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_orpd_xmm_m128(dst, src)) }
 inst_xorps_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .XORPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 818) }
 inst_xorps_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .XORPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 818) }
-emit_xorps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_xorps_xmm_xmm(dst, src)) }
-emit_xorps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_xorps_xmm_m128(dst, src)) }
+emit_xorps_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_xorps_xmm_xmm(dst, src)) }
+emit_xorps_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_xorps_xmm_m128(dst, src)) }
 inst_xorpd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .XORPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 819) }
 inst_xorpd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .XORPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 819) }
-emit_xorpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_xorpd_xmm_xmm(dst, src)) }
-emit_xorpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_xorpd_xmm_m128(dst, src)) }
+emit_xorpd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_xorpd_xmm_xmm(dst, src)) }
+emit_xorpd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_xorpd_xmm_m128(dst, src)) }
 inst_cmpps_xmm_xmm_imm8             :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 820) }
 inst_cmpps_xmm_m128_imm8            :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 820) }
-emit_cmpps_xmm_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_cmpps_xmm_xmm_imm8(dst, src, imm)) }
-emit_cmpps_xmm_m128_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_cmpps_xmm_m128_imm8(dst, src, imm)) }
+emit_cmpps_xmm_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_cmpps_xmm_xmm_imm8(dst, src, imm)) }
+emit_cmpps_xmm_m128_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_cmpps_xmm_m128_imm8(dst, src, imm)) }
 inst_cmppd_xmm_xmm_imm8             :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 821) }
 inst_cmppd_xmm_m128_imm8            :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 821) }
-emit_cmppd_xmm_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_cmppd_xmm_xmm_imm8(dst, src, imm)) }
-emit_cmppd_xmm_m128_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_cmppd_xmm_m128_imm8(dst, src, imm)) }
+emit_cmppd_xmm_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_cmppd_xmm_xmm_imm8(dst, src, imm)) }
+emit_cmppd_xmm_m128_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_cmppd_xmm_m128_imm8(dst, src, imm)) }
 inst_cmpss_xmm_xmm_imm8             :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 822) }
 inst_cmpss_xmm_m32_imm8             :: #force_inline proc "contextless" (dst: XMM, src: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPSS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 4), op_imm8(imm), {}} }, 822) }
-emit_cmpss_xmm_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_cmpss_xmm_xmm_imm8(dst, src, imm)) }
-emit_cmpss_xmm_m32_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32, imm: i8) { append(instructions, inst_cmpss_xmm_m32_imm8(dst, src, imm)) }
+emit_cmpss_xmm_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_cmpss_xmm_xmm_imm8(dst, src, imm)) }
+emit_cmpss_xmm_m32_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32, imm: i8) { append_elem(instructions, inst_cmpss_xmm_m32_imm8(dst, src, imm)) }
 inst_comiss_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .COMISS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 823) }
 inst_comiss_xmm_m32                 :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .COMISS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 823) }
-emit_comiss_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_comiss_xmm_xmm(dst, src)) }
-emit_comiss_xmm_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_comiss_xmm_m32(dst, src)) }
+emit_comiss_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_comiss_xmm_xmm(dst, src)) }
+emit_comiss_xmm_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_comiss_xmm_m32(dst, src)) }
 inst_comisd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .COMISD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 824) }
 inst_comisd_xmm_m64                 :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .COMISD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 824) }
-emit_comisd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_comisd_xmm_xmm(dst, src)) }
-emit_comisd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_comisd_xmm_m64(dst, src)) }
+emit_comisd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_comisd_xmm_xmm(dst, src)) }
+emit_comisd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_comisd_xmm_m64(dst, src)) }
 inst_ucomiss_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .UCOMISS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 825) }
 inst_ucomiss_xmm_m32                :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .UCOMISS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 825) }
-emit_ucomiss_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_ucomiss_xmm_xmm(dst, src)) }
-emit_ucomiss_xmm_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_ucomiss_xmm_m32(dst, src)) }
+emit_ucomiss_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_ucomiss_xmm_xmm(dst, src)) }
+emit_ucomiss_xmm_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_ucomiss_xmm_m32(dst, src)) }
 inst_ucomisd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .UCOMISD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 826) }
 inst_ucomisd_xmm_m64                :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .UCOMISD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 826) }
-emit_ucomisd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_ucomisd_xmm_xmm(dst, src)) }
-emit_ucomisd_xmm_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_ucomisd_xmm_m64(dst, src)) }
+emit_ucomisd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_ucomisd_xmm_xmm(dst, src)) }
+emit_ucomisd_xmm_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_ucomisd_xmm_m64(dst, src)) }
 inst_shufps_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHUFPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 827) }
 inst_shufps_xmm_m128_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHUFPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 827) }
-emit_shufps_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_shufps_xmm_xmm_imm8(dst, src, imm)) }
-emit_shufps_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_shufps_xmm_m128_imm8(dst, src, imm)) }
+emit_shufps_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_shufps_xmm_xmm_imm8(dst, src, imm)) }
+emit_shufps_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_shufps_xmm_m128_imm8(dst, src, imm)) }
 inst_shufpd_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHUFPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 828) }
 inst_shufpd_xmm_m128_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHUFPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 828) }
-emit_shufpd_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_shufpd_xmm_xmm_imm8(dst, src, imm)) }
-emit_shufpd_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_shufpd_xmm_m128_imm8(dst, src, imm)) }
+emit_shufpd_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_shufpd_xmm_xmm_imm8(dst, src, imm)) }
+emit_shufpd_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_shufpd_xmm_m128_imm8(dst, src, imm)) }
 inst_unpcklps_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .UNPCKLPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 829) }
 inst_unpcklps_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .UNPCKLPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 829) }
-emit_unpcklps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_unpcklps_xmm_xmm(dst, src)) }
-emit_unpcklps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_unpcklps_xmm_m128(dst, src)) }
+emit_unpcklps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_unpcklps_xmm_xmm(dst, src)) }
+emit_unpcklps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_unpcklps_xmm_m128(dst, src)) }
 inst_unpckhps_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .UNPCKHPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 830) }
 inst_unpckhps_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .UNPCKHPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 830) }
-emit_unpckhps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_unpckhps_xmm_xmm(dst, src)) }
-emit_unpckhps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_unpckhps_xmm_m128(dst, src)) }
+emit_unpckhps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_unpckhps_xmm_xmm(dst, src)) }
+emit_unpckhps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_unpckhps_xmm_m128(dst, src)) }
 inst_unpcklpd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .UNPCKLPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 831) }
 inst_unpcklpd_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .UNPCKLPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 831) }
-emit_unpcklpd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_unpcklpd_xmm_xmm(dst, src)) }
-emit_unpcklpd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_unpcklpd_xmm_m128(dst, src)) }
+emit_unpcklpd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_unpcklpd_xmm_xmm(dst, src)) }
+emit_unpcklpd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_unpcklpd_xmm_m128(dst, src)) }
 inst_unpckhpd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .UNPCKHPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 832) }
 inst_unpckhpd_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .UNPCKHPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 832) }
-emit_unpckhpd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_unpckhpd_xmm_xmm(dst, src)) }
-emit_unpckhpd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_unpckhpd_xmm_m128(dst, src)) }
+emit_unpckhpd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_unpckhpd_xmm_xmm(dst, src)) }
+emit_unpckhpd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_unpckhpd_xmm_m128(dst, src)) }
 inst_cvtps2pd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTPS2PD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 833) }
 inst_cvtps2pd_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTPS2PD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 833) }
-emit_cvtps2pd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvtps2pd_xmm_xmm(dst, src)) }
-emit_cvtps2pd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_cvtps2pd_xmm_m64(dst, src)) }
+emit_cvtps2pd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvtps2pd_xmm_xmm(dst, src)) }
+emit_cvtps2pd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_cvtps2pd_xmm_m64(dst, src)) }
 inst_cvtpd2ps_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTPD2PS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 834) }
 inst_cvtpd2ps_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTPD2PS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 834) }
-emit_cvtpd2ps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvtpd2ps_xmm_xmm(dst, src)) }
-emit_cvtpd2ps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_cvtpd2ps_xmm_m128(dst, src)) }
+emit_cvtpd2ps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvtpd2ps_xmm_xmm(dst, src)) }
+emit_cvtpd2ps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_cvtpd2ps_xmm_m128(dst, src)) }
 inst_cvtss2sd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSS2SD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 835) }
 inst_cvtss2sd_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSS2SD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 835) }
-emit_cvtss2sd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvtss2sd_xmm_xmm(dst, src)) }
-emit_cvtss2sd_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_cvtss2sd_xmm_m32(dst, src)) }
+emit_cvtss2sd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvtss2sd_xmm_xmm(dst, src)) }
+emit_cvtss2sd_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_cvtss2sd_xmm_m32(dst, src)) }
 inst_cvtsd2ss_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSD2SS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 836) }
 inst_cvtsd2ss_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSD2SS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 836) }
-emit_cvtsd2ss_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvtsd2ss_xmm_xmm(dst, src)) }
-emit_cvtsd2ss_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_cvtsd2ss_xmm_m64(dst, src)) }
+emit_cvtsd2ss_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvtsd2ss_xmm_xmm(dst, src)) }
+emit_cvtsd2ss_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_cvtsd2ss_xmm_m64(dst, src)) }
 inst_cvtps2dq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTPS2DQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 837) }
 inst_cvtps2dq_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTPS2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 837) }
-emit_cvtps2dq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvtps2dq_xmm_xmm(dst, src)) }
-emit_cvtps2dq_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_cvtps2dq_xmm_m128(dst, src)) }
+emit_cvtps2dq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvtps2dq_xmm_xmm(dst, src)) }
+emit_cvtps2dq_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_cvtps2dq_xmm_m128(dst, src)) }
 inst_cvtpd2dq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 838) }
 inst_cvtpd2dq_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 838) }
-emit_cvtpd2dq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvtpd2dq_xmm_xmm(dst, src)) }
-emit_cvtpd2dq_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_cvtpd2dq_xmm_m128(dst, src)) }
+emit_cvtpd2dq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvtpd2dq_xmm_xmm(dst, src)) }
+emit_cvtpd2dq_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_cvtpd2dq_xmm_m128(dst, src)) }
 inst_cvtdq2ps_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTDQ2PS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 839) }
 inst_cvtdq2ps_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTDQ2PS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 839) }
-emit_cvtdq2ps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvtdq2ps_xmm_xmm(dst, src)) }
-emit_cvtdq2ps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_cvtdq2ps_xmm_m128(dst, src)) }
+emit_cvtdq2ps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvtdq2ps_xmm_xmm(dst, src)) }
+emit_cvtdq2ps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_cvtdq2ps_xmm_m128(dst, src)) }
 inst_cvtdq2pd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTDQ2PD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 840) }
 inst_cvtdq2pd_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTDQ2PD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 840) }
-emit_cvtdq2pd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvtdq2pd_xmm_xmm(dst, src)) }
-emit_cvtdq2pd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_cvtdq2pd_xmm_m64(dst, src)) }
+emit_cvtdq2pd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvtdq2pd_xmm_xmm(dst, src)) }
+emit_cvtdq2pd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_cvtdq2pd_xmm_m64(dst, src)) }
 inst_cvtss2si_r32_xmm               :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSS2SI, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 841) }
 inst_cvtss2si_r32_m32               :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSS2SI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 841) }
 inst_cvtss2si_r64_xmm               :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSS2SI, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 842) }
 inst_cvtss2si_r64_m32               :: #force_inline proc "contextless" (dst: GPR64, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSS2SI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 4), {}, {}} }, 842) }
-emit_cvtss2si_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_cvtss2si_r32_xmm(dst, src)) }
-emit_cvtss2si_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cvtss2si_r32_m32(dst, src)) }
-emit_cvtss2si_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_cvtss2si_r64_xmm(dst, src)) }
-emit_cvtss2si_r64_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append(instructions, inst_cvtss2si_r64_m32(dst, src)) }
+emit_cvtss2si_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_cvtss2si_r32_xmm(dst, src)) }
+emit_cvtss2si_r32_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cvtss2si_r32_m32(dst, src)) }
+emit_cvtss2si_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_cvtss2si_r64_xmm(dst, src)) }
+emit_cvtss2si_r64_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append_elem(instructions, inst_cvtss2si_r64_m32(dst, src)) }
 inst_cvtsd2si_r32_xmm               :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSD2SI, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 843) }
 inst_cvtsd2si_r32_m64               :: #force_inline proc "contextless" (dst: GPR32, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSD2SI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 8), {}, {}} }, 843) }
 inst_cvtsd2si_r64_xmm               :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSD2SI, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 844) }
 inst_cvtsd2si_r64_m64               :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSD2SI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 844) }
-emit_cvtsd2si_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_cvtsd2si_r32_xmm(dst, src)) }
-emit_cvtsd2si_r32_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem64) { append(instructions, inst_cvtsd2si_r32_m64(dst, src)) }
-emit_cvtsd2si_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_cvtsd2si_r64_xmm(dst, src)) }
-emit_cvtsd2si_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cvtsd2si_r64_m64(dst, src)) }
+emit_cvtsd2si_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_cvtsd2si_r32_xmm(dst, src)) }
+emit_cvtsd2si_r32_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem64) { append_elem(instructions, inst_cvtsd2si_r32_m64(dst, src)) }
+emit_cvtsd2si_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_cvtsd2si_r64_xmm(dst, src)) }
+emit_cvtsd2si_r64_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cvtsd2si_r64_m64(dst, src)) }
 inst_cvtsi2ss_xmm_r32               :: #force_inline proc "contextless" (dst: XMM, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSI2SS, operand_count = 2, ops = {op_xmm(dst), op_gpr32(src), {}, {}} }, 845) }
 inst_cvtsi2ss_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSI2SS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 845) }
 inst_cvtsi2ss_xmm_r64               :: #force_inline proc "contextless" (dst: XMM, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSI2SS, operand_count = 2, ops = {op_xmm(dst), op_gpr64(src), {}, {}} }, 846) }
 inst_cvtsi2ss_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSI2SS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 846) }
-emit_cvtsi2ss_xmm_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32) { append(instructions, inst_cvtsi2ss_xmm_r32(dst, src)) }
-emit_cvtsi2ss_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_cvtsi2ss_xmm_m32(dst, src)) }
-emit_cvtsi2ss_xmm_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64) { append(instructions, inst_cvtsi2ss_xmm_r64(dst, src)) }
-emit_cvtsi2ss_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_cvtsi2ss_xmm_m64(dst, src)) }
+emit_cvtsi2ss_xmm_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32) { append_elem(instructions, inst_cvtsi2ss_xmm_r32(dst, src)) }
+emit_cvtsi2ss_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_cvtsi2ss_xmm_m32(dst, src)) }
+emit_cvtsi2ss_xmm_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64) { append_elem(instructions, inst_cvtsi2ss_xmm_r64(dst, src)) }
+emit_cvtsi2ss_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_cvtsi2ss_xmm_m64(dst, src)) }
 inst_cvtsi2sd_xmm_r32               :: #force_inline proc "contextless" (dst: XMM, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSI2SD, operand_count = 2, ops = {op_xmm(dst), op_gpr32(src), {}, {}} }, 847) }
 inst_cvtsi2sd_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSI2SD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 847) }
 inst_cvtsi2sd_xmm_r64               :: #force_inline proc "contextless" (dst: XMM, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSI2SD, operand_count = 2, ops = {op_xmm(dst), op_gpr64(src), {}, {}} }, 848) }
 inst_cvtsi2sd_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTSI2SD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 848) }
-emit_cvtsi2sd_xmm_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32) { append(instructions, inst_cvtsi2sd_xmm_r32(dst, src)) }
-emit_cvtsi2sd_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_cvtsi2sd_xmm_m32(dst, src)) }
-emit_cvtsi2sd_xmm_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64) { append(instructions, inst_cvtsi2sd_xmm_r64(dst, src)) }
-emit_cvtsi2sd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_cvtsi2sd_xmm_m64(dst, src)) }
+emit_cvtsi2sd_xmm_r32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32) { append_elem(instructions, inst_cvtsi2sd_xmm_r32(dst, src)) }
+emit_cvtsi2sd_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_cvtsi2sd_xmm_m32(dst, src)) }
+emit_cvtsi2sd_xmm_r64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64) { append_elem(instructions, inst_cvtsi2sd_xmm_r64(dst, src)) }
+emit_cvtsi2sd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_cvtsi2sd_xmm_m64(dst, src)) }
 inst_cvttps2dq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTPS2DQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 849) }
 inst_cvttps2dq_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTPS2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 849) }
-emit_cvttps2dq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvttps2dq_xmm_xmm(dst, src)) }
-emit_cvttps2dq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_cvttps2dq_xmm_m128(dst, src)) }
+emit_cvttps2dq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvttps2dq_xmm_xmm(dst, src)) }
+emit_cvttps2dq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_cvttps2dq_xmm_m128(dst, src)) }
 inst_cvttpd2dq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 850) }
 inst_cvttpd2dq_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 850) }
-emit_cvttpd2dq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_cvttpd2dq_xmm_xmm(dst, src)) }
-emit_cvttpd2dq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_cvttpd2dq_xmm_m128(dst, src)) }
+emit_cvttpd2dq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_cvttpd2dq_xmm_xmm(dst, src)) }
+emit_cvttpd2dq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_cvttpd2dq_xmm_m128(dst, src)) }
 inst_cvttss2si_r32_xmm              :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTSS2SI, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 851) }
 inst_cvttss2si_r32_m32              :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTSS2SI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 851) }
 inst_cvttss2si_r64_xmm              :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTSS2SI, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 852) }
 inst_cvttss2si_r64_m32              :: #force_inline proc "contextless" (dst: GPR64, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTSS2SI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 4), {}, {}} }, 852) }
-emit_cvttss2si_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_cvttss2si_r32_xmm(dst, src)) }
-emit_cvttss2si_r32_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_cvttss2si_r32_m32(dst, src)) }
-emit_cvttss2si_r64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_cvttss2si_r64_xmm(dst, src)) }
-emit_cvttss2si_r64_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append(instructions, inst_cvttss2si_r64_m32(dst, src)) }
+emit_cvttss2si_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_cvttss2si_r32_xmm(dst, src)) }
+emit_cvttss2si_r32_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_cvttss2si_r32_m32(dst, src)) }
+emit_cvttss2si_r64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_cvttss2si_r64_xmm(dst, src)) }
+emit_cvttss2si_r64_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append_elem(instructions, inst_cvttss2si_r64_m32(dst, src)) }
 inst_cvttsd2si_r32_xmm              :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTSD2SI, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 853) }
 inst_cvttsd2si_r32_m64              :: #force_inline proc "contextless" (dst: GPR32, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTSD2SI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 8), {}, {}} }, 853) }
 inst_cvttsd2si_r64_xmm              :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTSD2SI, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 854) }
 inst_cvttsd2si_r64_m64              :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CVTTSD2SI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 854) }
-emit_cvttsd2si_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_cvttsd2si_r32_xmm(dst, src)) }
-emit_cvttsd2si_r32_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem64) { append(instructions, inst_cvttsd2si_r32_m64(dst, src)) }
-emit_cvttsd2si_r64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_cvttsd2si_r64_xmm(dst, src)) }
-emit_cvttsd2si_r64_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_cvttsd2si_r64_m64(dst, src)) }
+emit_cvttsd2si_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_cvttsd2si_r32_xmm(dst, src)) }
+emit_cvttsd2si_r32_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem64) { append_elem(instructions, inst_cvttsd2si_r32_m64(dst, src)) }
+emit_cvttsd2si_r64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_cvttsd2si_r64_xmm(dst, src)) }
+emit_cvttsd2si_r64_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_cvttsd2si_r64_m64(dst, src)) }
 inst_paddb_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 855) }
 inst_paddb_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 855) }
-emit_paddb_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_paddb_xmm_xmm(dst, src)) }
-emit_paddb_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_paddb_xmm_m128(dst, src)) }
+emit_paddb_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_paddb_xmm_xmm(dst, src)) }
+emit_paddb_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_paddb_xmm_m128(dst, src)) }
 inst_paddw_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 856) }
 inst_paddw_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 856) }
-emit_paddw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_paddw_xmm_xmm(dst, src)) }
-emit_paddw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_paddw_xmm_m128(dst, src)) }
+emit_paddw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_paddw_xmm_xmm(dst, src)) }
+emit_paddw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_paddw_xmm_m128(dst, src)) }
 inst_paddd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 857) }
 inst_paddd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 857) }
-emit_paddd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_paddd_xmm_xmm(dst, src)) }
-emit_paddd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_paddd_xmm_m128(dst, src)) }
+emit_paddd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_paddd_xmm_xmm(dst, src)) }
+emit_paddd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_paddd_xmm_m128(dst, src)) }
 inst_paddq_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 858) }
 inst_paddq_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 858) }
-emit_paddq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_paddq_xmm_xmm(dst, src)) }
-emit_paddq_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_paddq_xmm_m128(dst, src)) }
+emit_paddq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_paddq_xmm_xmm(dst, src)) }
+emit_paddq_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_paddq_xmm_m128(dst, src)) }
 inst_psubb_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 859) }
 inst_psubb_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 859) }
-emit_psubb_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psubb_xmm_xmm(dst, src)) }
-emit_psubb_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psubb_xmm_m128(dst, src)) }
+emit_psubb_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psubb_xmm_xmm(dst, src)) }
+emit_psubb_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psubb_xmm_m128(dst, src)) }
 inst_psubw_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 860) }
 inst_psubw_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 860) }
-emit_psubw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psubw_xmm_xmm(dst, src)) }
-emit_psubw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psubw_xmm_m128(dst, src)) }
+emit_psubw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psubw_xmm_xmm(dst, src)) }
+emit_psubw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psubw_xmm_m128(dst, src)) }
 inst_psubd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 861) }
 inst_psubd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 861) }
-emit_psubd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psubd_xmm_xmm(dst, src)) }
-emit_psubd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psubd_xmm_m128(dst, src)) }
+emit_psubd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psubd_xmm_xmm(dst, src)) }
+emit_psubd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psubd_xmm_m128(dst, src)) }
 inst_psubq_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 862) }
 inst_psubq_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 862) }
-emit_psubq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psubq_xmm_xmm(dst, src)) }
-emit_psubq_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psubq_xmm_m128(dst, src)) }
+emit_psubq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psubq_xmm_xmm(dst, src)) }
+emit_psubq_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psubq_xmm_m128(dst, src)) }
 inst_paddsb_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDSB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 863) }
 inst_paddsb_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDSB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 863) }
-emit_paddsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_paddsb_xmm_xmm(dst, src)) }
-emit_paddsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_paddsb_xmm_m128(dst, src)) }
+emit_paddsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_paddsb_xmm_xmm(dst, src)) }
+emit_paddsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_paddsb_xmm_m128(dst, src)) }
 inst_paddsw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 864) }
 inst_paddsw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 864) }
-emit_paddsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_paddsw_xmm_xmm(dst, src)) }
-emit_paddsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_paddsw_xmm_m128(dst, src)) }
+emit_paddsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_paddsw_xmm_xmm(dst, src)) }
+emit_paddsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_paddsw_xmm_m128(dst, src)) }
 inst_paddusb_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDUSB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 865) }
 inst_paddusb_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDUSB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 865) }
-emit_paddusb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_paddusb_xmm_xmm(dst, src)) }
-emit_paddusb_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_paddusb_xmm_m128(dst, src)) }
+emit_paddusb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_paddusb_xmm_xmm(dst, src)) }
+emit_paddusb_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_paddusb_xmm_m128(dst, src)) }
 inst_paddusw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDUSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 866) }
 inst_paddusw_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PADDUSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 866) }
-emit_paddusw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_paddusw_xmm_xmm(dst, src)) }
-emit_paddusw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_paddusw_xmm_m128(dst, src)) }
+emit_paddusw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_paddusw_xmm_xmm(dst, src)) }
+emit_paddusw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_paddusw_xmm_m128(dst, src)) }
 inst_psubsb_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBSB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 867) }
 inst_psubsb_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBSB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 867) }
-emit_psubsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psubsb_xmm_xmm(dst, src)) }
-emit_psubsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psubsb_xmm_m128(dst, src)) }
+emit_psubsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psubsb_xmm_xmm(dst, src)) }
+emit_psubsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psubsb_xmm_m128(dst, src)) }
 inst_psubsw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 868) }
 inst_psubsw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 868) }
-emit_psubsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psubsw_xmm_xmm(dst, src)) }
-emit_psubsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psubsw_xmm_m128(dst, src)) }
+emit_psubsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psubsw_xmm_xmm(dst, src)) }
+emit_psubsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psubsw_xmm_m128(dst, src)) }
 inst_psubusb_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBUSB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 869) }
 inst_psubusb_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBUSB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 869) }
-emit_psubusb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psubusb_xmm_xmm(dst, src)) }
-emit_psubusb_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psubusb_xmm_m128(dst, src)) }
+emit_psubusb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psubusb_xmm_xmm(dst, src)) }
+emit_psubusb_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psubusb_xmm_m128(dst, src)) }
 inst_psubusw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBUSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 870) }
 inst_psubusw_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSUBUSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 870) }
-emit_psubusw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psubusw_xmm_xmm(dst, src)) }
-emit_psubusw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psubusw_xmm_m128(dst, src)) }
+emit_psubusw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psubusw_xmm_xmm(dst, src)) }
+emit_psubusw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psubusw_xmm_m128(dst, src)) }
 inst_pmullw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULLW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 871) }
 inst_pmullw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULLW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 871) }
-emit_pmullw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmullw_xmm_xmm(dst, src)) }
-emit_pmullw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmullw_xmm_m128(dst, src)) }
+emit_pmullw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmullw_xmm_xmm(dst, src)) }
+emit_pmullw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmullw_xmm_m128(dst, src)) }
 inst_pmulhw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULHW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 872) }
 inst_pmulhw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULHW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 872) }
-emit_pmulhw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmulhw_xmm_xmm(dst, src)) }
-emit_pmulhw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmulhw_xmm_m128(dst, src)) }
+emit_pmulhw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmulhw_xmm_xmm(dst, src)) }
+emit_pmulhw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmulhw_xmm_m128(dst, src)) }
 inst_pmulhuw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULHUW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 873) }
 inst_pmulhuw_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULHUW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 873) }
-emit_pmulhuw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmulhuw_xmm_xmm(dst, src)) }
-emit_pmulhuw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmulhuw_xmm_m128(dst, src)) }
+emit_pmulhuw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmulhuw_xmm_xmm(dst, src)) }
+emit_pmulhuw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmulhuw_xmm_m128(dst, src)) }
 inst_pmuludq_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULUDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 874) }
 inst_pmuludq_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULUDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 874) }
-emit_pmuludq_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmuludq_xmm_xmm(dst, src)) }
-emit_pmuludq_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmuludq_xmm_m128(dst, src)) }
+emit_pmuludq_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmuludq_xmm_xmm(dst, src)) }
+emit_pmuludq_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmuludq_xmm_m128(dst, src)) }
 inst_pmaddwd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMADDWD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 875) }
 inst_pmaddwd_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMADDWD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 875) }
-emit_pmaddwd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmaddwd_xmm_xmm(dst, src)) }
-emit_pmaddwd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmaddwd_xmm_m128(dst, src)) }
+emit_pmaddwd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmaddwd_xmm_xmm(dst, src)) }
+emit_pmaddwd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmaddwd_xmm_m128(dst, src)) }
 inst_pand_xmm_xmm                   :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PAND, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 876) }
 inst_pand_xmm_m128                  :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PAND, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 876) }
-emit_pand_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pand_xmm_xmm(dst, src)) }
-emit_pand_xmm_m128                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pand_xmm_m128(dst, src)) }
+emit_pand_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pand_xmm_xmm(dst, src)) }
+emit_pand_xmm_m128                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pand_xmm_m128(dst, src)) }
 inst_pandn_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PANDN, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 877) }
 inst_pandn_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PANDN, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 877) }
-emit_pandn_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pandn_xmm_xmm(dst, src)) }
-emit_pandn_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pandn_xmm_m128(dst, src)) }
+emit_pandn_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pandn_xmm_xmm(dst, src)) }
+emit_pandn_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pandn_xmm_m128(dst, src)) }
 inst_por_xmm_xmm                    :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .POR, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 878) }
 inst_por_xmm_m128                   :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .POR, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 878) }
-emit_por_xmm_xmm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_por_xmm_xmm(dst, src)) }
-emit_por_xmm_m128                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_por_xmm_m128(dst, src)) }
+emit_por_xmm_xmm                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_por_xmm_xmm(dst, src)) }
+emit_por_xmm_m128                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_por_xmm_m128(dst, src)) }
 inst_pxor_xmm_xmm                   :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PXOR, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 879) }
 inst_pxor_xmm_m128                  :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PXOR, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 879) }
-emit_pxor_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pxor_xmm_xmm(dst, src)) }
-emit_pxor_xmm_m128                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pxor_xmm_m128(dst, src)) }
+emit_pxor_xmm_xmm                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pxor_xmm_xmm(dst, src)) }
+emit_pxor_xmm_m128                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pxor_xmm_m128(dst, src)) }
 inst_psllw_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 880) }
 inst_psllw_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 880) }
 inst_psllw_xmm_imm8                 :: #force_inline proc "contextless" (dst: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLW, operand_count = 2, ops = {op_xmm(dst), op_imm8(imm), {}, {}} }, 881) }
-emit_psllw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psllw_xmm_xmm(dst, src)) }
-emit_psllw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psllw_xmm_m128(dst, src)) }
-emit_psllw_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append(instructions, inst_psllw_xmm_imm8(dst, imm)) }
+emit_psllw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psllw_xmm_xmm(dst, src)) }
+emit_psllw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psllw_xmm_m128(dst, src)) }
+emit_psllw_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append_elem(instructions, inst_psllw_xmm_imm8(dst, imm)) }
 inst_pslld_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 882) }
 inst_pslld_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 882) }
 inst_pslld_xmm_imm8                 :: #force_inline proc "contextless" (dst: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLD, operand_count = 2, ops = {op_xmm(dst), op_imm8(imm), {}, {}} }, 883) }
-emit_pslld_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pslld_xmm_xmm(dst, src)) }
-emit_pslld_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pslld_xmm_m128(dst, src)) }
-emit_pslld_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append(instructions, inst_pslld_xmm_imm8(dst, imm)) }
+emit_pslld_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pslld_xmm_xmm(dst, src)) }
+emit_pslld_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pslld_xmm_m128(dst, src)) }
+emit_pslld_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append_elem(instructions, inst_pslld_xmm_imm8(dst, imm)) }
 inst_psllq_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 884) }
 inst_psllq_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 884) }
 inst_psllq_xmm_imm8                 :: #force_inline proc "contextless" (dst: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSLLQ, operand_count = 2, ops = {op_xmm(dst), op_imm8(imm), {}, {}} }, 885) }
-emit_psllq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psllq_xmm_xmm(dst, src)) }
-emit_psllq_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psllq_xmm_m128(dst, src)) }
-emit_psllq_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append(instructions, inst_psllq_xmm_imm8(dst, imm)) }
+emit_psllq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psllq_xmm_xmm(dst, src)) }
+emit_psllq_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psllq_xmm_m128(dst, src)) }
+emit_psllq_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append_elem(instructions, inst_psllq_xmm_imm8(dst, imm)) }
 inst_psrlw_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 886) }
 inst_psrlw_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 886) }
 inst_psrlw_xmm_imm8                 :: #force_inline proc "contextless" (dst: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLW, operand_count = 2, ops = {op_xmm(dst), op_imm8(imm), {}, {}} }, 887) }
-emit_psrlw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psrlw_xmm_xmm(dst, src)) }
-emit_psrlw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psrlw_xmm_m128(dst, src)) }
-emit_psrlw_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append(instructions, inst_psrlw_xmm_imm8(dst, imm)) }
+emit_psrlw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psrlw_xmm_xmm(dst, src)) }
+emit_psrlw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psrlw_xmm_m128(dst, src)) }
+emit_psrlw_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append_elem(instructions, inst_psrlw_xmm_imm8(dst, imm)) }
 inst_psrld_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 888) }
 inst_psrld_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 888) }
 inst_psrld_xmm_imm8                 :: #force_inline proc "contextless" (dst: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLD, operand_count = 2, ops = {op_xmm(dst), op_imm8(imm), {}, {}} }, 889) }
-emit_psrld_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psrld_xmm_xmm(dst, src)) }
-emit_psrld_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psrld_xmm_m128(dst, src)) }
-emit_psrld_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append(instructions, inst_psrld_xmm_imm8(dst, imm)) }
+emit_psrld_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psrld_xmm_xmm(dst, src)) }
+emit_psrld_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psrld_xmm_m128(dst, src)) }
+emit_psrld_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append_elem(instructions, inst_psrld_xmm_imm8(dst, imm)) }
 inst_psrlq_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 890) }
 inst_psrlq_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 890) }
 inst_psrlq_xmm_imm8                 :: #force_inline proc "contextless" (dst: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRLQ, operand_count = 2, ops = {op_xmm(dst), op_imm8(imm), {}, {}} }, 891) }
-emit_psrlq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psrlq_xmm_xmm(dst, src)) }
-emit_psrlq_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psrlq_xmm_m128(dst, src)) }
-emit_psrlq_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append(instructions, inst_psrlq_xmm_imm8(dst, imm)) }
+emit_psrlq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psrlq_xmm_xmm(dst, src)) }
+emit_psrlq_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psrlq_xmm_m128(dst, src)) }
+emit_psrlq_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append_elem(instructions, inst_psrlq_xmm_imm8(dst, imm)) }
 inst_psraw_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRAW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 892) }
 inst_psraw_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRAW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 892) }
 inst_psraw_xmm_imm8                 :: #force_inline proc "contextless" (dst: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRAW, operand_count = 2, ops = {op_xmm(dst), op_imm8(imm), {}, {}} }, 893) }
-emit_psraw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psraw_xmm_xmm(dst, src)) }
-emit_psraw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psraw_xmm_m128(dst, src)) }
-emit_psraw_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append(instructions, inst_psraw_xmm_imm8(dst, imm)) }
+emit_psraw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psraw_xmm_xmm(dst, src)) }
+emit_psraw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psraw_xmm_m128(dst, src)) }
+emit_psraw_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append_elem(instructions, inst_psraw_xmm_imm8(dst, imm)) }
 inst_psrad_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRAD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 894) }
 inst_psrad_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRAD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 894) }
 inst_psrad_xmm_imm8                 :: #force_inline proc "contextless" (dst: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSRAD, operand_count = 2, ops = {op_xmm(dst), op_imm8(imm), {}, {}} }, 895) }
-emit_psrad_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psrad_xmm_xmm(dst, src)) }
-emit_psrad_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psrad_xmm_m128(dst, src)) }
-emit_psrad_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append(instructions, inst_psrad_xmm_imm8(dst, imm)) }
+emit_psrad_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psrad_xmm_xmm(dst, src)) }
+emit_psrad_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psrad_xmm_m128(dst, src)) }
+emit_psrad_xmm_imm8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, imm: i8) { append_elem(instructions, inst_psrad_xmm_imm8(dst, imm)) }
 inst_pcmpeqb_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPEQB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 896) }
 inst_pcmpeqb_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPEQB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 896) }
-emit_pcmpeqb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pcmpeqb_xmm_xmm(dst, src)) }
-emit_pcmpeqb_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pcmpeqb_xmm_m128(dst, src)) }
+emit_pcmpeqb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pcmpeqb_xmm_xmm(dst, src)) }
+emit_pcmpeqb_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pcmpeqb_xmm_m128(dst, src)) }
 inst_pcmpeqw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPEQW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 897) }
 inst_pcmpeqw_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPEQW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 897) }
-emit_pcmpeqw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pcmpeqw_xmm_xmm(dst, src)) }
-emit_pcmpeqw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pcmpeqw_xmm_m128(dst, src)) }
+emit_pcmpeqw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pcmpeqw_xmm_xmm(dst, src)) }
+emit_pcmpeqw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pcmpeqw_xmm_m128(dst, src)) }
 inst_pcmpeqd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPEQD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 898) }
 inst_pcmpeqd_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPEQD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 898) }
-emit_pcmpeqd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pcmpeqd_xmm_xmm(dst, src)) }
-emit_pcmpeqd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pcmpeqd_xmm_m128(dst, src)) }
+emit_pcmpeqd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pcmpeqd_xmm_xmm(dst, src)) }
+emit_pcmpeqd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pcmpeqd_xmm_m128(dst, src)) }
 inst_pcmpgtb_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPGTB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 899) }
 inst_pcmpgtb_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPGTB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 899) }
-emit_pcmpgtb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pcmpgtb_xmm_xmm(dst, src)) }
-emit_pcmpgtb_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pcmpgtb_xmm_m128(dst, src)) }
+emit_pcmpgtb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pcmpgtb_xmm_xmm(dst, src)) }
+emit_pcmpgtb_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pcmpgtb_xmm_m128(dst, src)) }
 inst_pcmpgtw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPGTW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 900) }
 inst_pcmpgtw_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPGTW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 900) }
-emit_pcmpgtw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pcmpgtw_xmm_xmm(dst, src)) }
-emit_pcmpgtw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pcmpgtw_xmm_m128(dst, src)) }
+emit_pcmpgtw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pcmpgtw_xmm_xmm(dst, src)) }
+emit_pcmpgtw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pcmpgtw_xmm_m128(dst, src)) }
 inst_pcmpgtd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPGTD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 901) }
 inst_pcmpgtd_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPGTD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 901) }
-emit_pcmpgtd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pcmpgtd_xmm_xmm(dst, src)) }
-emit_pcmpgtd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pcmpgtd_xmm_m128(dst, src)) }
+emit_pcmpgtd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pcmpgtd_xmm_xmm(dst, src)) }
+emit_pcmpgtd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pcmpgtd_xmm_m128(dst, src)) }
 inst_packsswb_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PACKSSWB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 902) }
 inst_packsswb_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PACKSSWB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 902) }
-emit_packsswb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_packsswb_xmm_xmm(dst, src)) }
-emit_packsswb_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_packsswb_xmm_m128(dst, src)) }
+emit_packsswb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_packsswb_xmm_xmm(dst, src)) }
+emit_packsswb_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_packsswb_xmm_m128(dst, src)) }
 inst_packssdw_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PACKSSDW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 903) }
 inst_packssdw_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PACKSSDW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 903) }
-emit_packssdw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_packssdw_xmm_xmm(dst, src)) }
-emit_packssdw_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_packssdw_xmm_m128(dst, src)) }
+emit_packssdw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_packssdw_xmm_xmm(dst, src)) }
+emit_packssdw_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_packssdw_xmm_m128(dst, src)) }
 inst_packuswb_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PACKUSWB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 904) }
 inst_packuswb_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PACKUSWB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 904) }
-emit_packuswb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_packuswb_xmm_xmm(dst, src)) }
-emit_packuswb_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_packuswb_xmm_m128(dst, src)) }
+emit_packuswb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_packuswb_xmm_xmm(dst, src)) }
+emit_packuswb_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_packuswb_xmm_m128(dst, src)) }
 inst_punpcklbw_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKLBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 905) }
 inst_punpcklbw_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKLBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 905) }
-emit_punpcklbw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_punpcklbw_xmm_xmm(dst, src)) }
-emit_punpcklbw_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_punpcklbw_xmm_m128(dst, src)) }
+emit_punpcklbw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_punpcklbw_xmm_xmm(dst, src)) }
+emit_punpcklbw_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_punpcklbw_xmm_m128(dst, src)) }
 inst_punpcklwd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKLWD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 906) }
 inst_punpcklwd_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKLWD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 906) }
-emit_punpcklwd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_punpcklwd_xmm_xmm(dst, src)) }
-emit_punpcklwd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_punpcklwd_xmm_m128(dst, src)) }
+emit_punpcklwd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_punpcklwd_xmm_xmm(dst, src)) }
+emit_punpcklwd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_punpcklwd_xmm_m128(dst, src)) }
 inst_punpckldq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKLDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 907) }
 inst_punpckldq_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKLDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 907) }
-emit_punpckldq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_punpckldq_xmm_xmm(dst, src)) }
-emit_punpckldq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_punpckldq_xmm_m128(dst, src)) }
+emit_punpckldq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_punpckldq_xmm_xmm(dst, src)) }
+emit_punpckldq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_punpckldq_xmm_m128(dst, src)) }
 inst_punpcklqdq_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKLQDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 908) }
 inst_punpcklqdq_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKLQDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 908) }
-emit_punpcklqdq_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_punpcklqdq_xmm_xmm(dst, src)) }
-emit_punpcklqdq_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_punpcklqdq_xmm_m128(dst, src)) }
+emit_punpcklqdq_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_punpcklqdq_xmm_xmm(dst, src)) }
+emit_punpcklqdq_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_punpcklqdq_xmm_m128(dst, src)) }
 inst_punpckhbw_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKHBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 909) }
 inst_punpckhbw_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKHBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 909) }
-emit_punpckhbw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_punpckhbw_xmm_xmm(dst, src)) }
-emit_punpckhbw_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_punpckhbw_xmm_m128(dst, src)) }
+emit_punpckhbw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_punpckhbw_xmm_xmm(dst, src)) }
+emit_punpckhbw_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_punpckhbw_xmm_m128(dst, src)) }
 inst_punpckhwd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKHWD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 910) }
 inst_punpckhwd_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKHWD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 910) }
-emit_punpckhwd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_punpckhwd_xmm_xmm(dst, src)) }
-emit_punpckhwd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_punpckhwd_xmm_m128(dst, src)) }
+emit_punpckhwd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_punpckhwd_xmm_xmm(dst, src)) }
+emit_punpckhwd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_punpckhwd_xmm_m128(dst, src)) }
 inst_punpckhdq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKHDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 911) }
 inst_punpckhdq_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKHDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 911) }
-emit_punpckhdq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_punpckhdq_xmm_xmm(dst, src)) }
-emit_punpckhdq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_punpckhdq_xmm_m128(dst, src)) }
+emit_punpckhdq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_punpckhdq_xmm_xmm(dst, src)) }
+emit_punpckhdq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_punpckhdq_xmm_m128(dst, src)) }
 inst_punpckhqdq_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKHQDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 912) }
 inst_punpckhqdq_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PUNPCKHQDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 912) }
-emit_punpckhqdq_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_punpckhqdq_xmm_xmm(dst, src)) }
-emit_punpckhqdq_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_punpckhqdq_xmm_m128(dst, src)) }
+emit_punpckhqdq_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_punpckhqdq_xmm_xmm(dst, src)) }
+emit_punpckhqdq_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_punpckhqdq_xmm_m128(dst, src)) }
 inst_pshufd_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 913) }
 inst_pshufd_xmm_m128_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 913) }
-emit_pshufd_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pshufd_xmm_xmm_imm8(dst, src, imm)) }
-emit_pshufd_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pshufd_xmm_m128_imm8(dst, src, imm)) }
+emit_pshufd_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pshufd_xmm_xmm_imm8(dst, src, imm)) }
+emit_pshufd_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pshufd_xmm_m128_imm8(dst, src, imm)) }
 inst_pshufhw_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFHW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 914) }
 inst_pshufhw_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFHW, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 914) }
-emit_pshufhw_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pshufhw_xmm_xmm_imm8(dst, src, imm)) }
-emit_pshufhw_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pshufhw_xmm_m128_imm8(dst, src, imm)) }
+emit_pshufhw_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pshufhw_xmm_xmm_imm8(dst, src, imm)) }
+emit_pshufhw_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pshufhw_xmm_m128_imm8(dst, src, imm)) }
 inst_pshuflw_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 915) }
 inst_pshuflw_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFLW, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 915) }
-emit_pshuflw_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pshuflw_xmm_xmm_imm8(dst, src, imm)) }
-emit_pshuflw_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pshuflw_xmm_m128_imm8(dst, src, imm)) }
+emit_pshuflw_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pshuflw_xmm_xmm_imm8(dst, src, imm)) }
+emit_pshuflw_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pshuflw_xmm_m128_imm8(dst, src, imm)) }
 inst_pshufw_mm_mm_imm8              :: #force_inline proc "contextless" (dst: MM, src: MM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFW, operand_count = 3, ops = {op_mm(dst), op_mm(src), op_imm8(imm), {}} }, 916) }
 inst_pshufw_mm_m64_imm8             :: #force_inline proc "contextless" (dst: MM, src: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFW, operand_count = 3, ops = {op_mm(dst), op_mem(src.mem, 8), op_imm8(imm), {}} }, 916) }
-emit_pshufw_mm_mm_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: MM, imm: i8) { append(instructions, inst_pshufw_mm_mm_imm8(dst, src, imm)) }
-emit_pshufw_mm_m64_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: Mem64, imm: i8) { append(instructions, inst_pshufw_mm_m64_imm8(dst, src, imm)) }
+emit_pshufw_mm_mm_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: MM, imm: i8) { append_elem(instructions, inst_pshufw_mm_mm_imm8(dst, src, imm)) }
+emit_pshufw_mm_m64_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: MM, src: Mem64, imm: i8) { append_elem(instructions, inst_pshufw_mm_m64_imm8(dst, src, imm)) }
 inst_pextrw_r32_xmm_imm8            :: #force_inline proc "contextless" (dst: GPR32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXTRW, operand_count = 3, ops = {op_gpr32(dst), op_xmm(src), op_imm8(imm), {}} }, 917) }
 inst_pextrw_r64_xmm_imm8            :: #force_inline proc "contextless" (dst: GPR64, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXTRW, operand_count = 3, ops = {op_gpr64(dst), op_xmm(src), op_imm8(imm), {}} }, 918) }
-emit_pextrw_r32_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append(instructions, inst_pextrw_r32_xmm_imm8(dst, src, imm)) }
-emit_pextrw_r64_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM, imm: i8) { append(instructions, inst_pextrw_r64_xmm_imm8(dst, src, imm)) }
+emit_pextrw_r32_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append_elem(instructions, inst_pextrw_r32_xmm_imm8(dst, src, imm)) }
+emit_pextrw_r64_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM, imm: i8) { append_elem(instructions, inst_pextrw_r64_xmm_imm8(dst, src, imm)) }
 inst_pinsrw_xmm_r32_imm8            :: #force_inline proc "contextless" (dst: XMM, src: GPR32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PINSRW, operand_count = 3, ops = {op_xmm(dst), op_gpr32(src), op_imm8(imm), {}} }, 919) }
 inst_pinsrw_xmm_m16_imm8            :: #force_inline proc "contextless" (dst: XMM, src: Mem16, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PINSRW, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 2), op_imm8(imm), {}} }, 920) }
-emit_pinsrw_xmm_r32_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32, imm: i8) { append(instructions, inst_pinsrw_xmm_r32_imm8(dst, src, imm)) }
-emit_pinsrw_xmm_m16_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem16, imm: i8) { append(instructions, inst_pinsrw_xmm_m16_imm8(dst, src, imm)) }
+emit_pinsrw_xmm_r32_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32, imm: i8) { append_elem(instructions, inst_pinsrw_xmm_r32_imm8(dst, src, imm)) }
+emit_pinsrw_xmm_m16_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem16, imm: i8) { append_elem(instructions, inst_pinsrw_xmm_m16_imm8(dst, src, imm)) }
 inst_pmovmskb_r32_xmm               :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVMSKB, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 921) }
 inst_pmovmskb_r64_xmm               :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVMSKB, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 922) }
-emit_pmovmskb_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_pmovmskb_r32_xmm(dst, src)) }
-emit_pmovmskb_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_pmovmskb_r64_xmm(dst, src)) }
+emit_pmovmskb_r32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_pmovmskb_r32_xmm(dst, src)) }
+emit_pmovmskb_r64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_pmovmskb_r64_xmm(dst, src)) }
 inst_pavgb_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PAVGB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 923) }
 inst_pavgb_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PAVGB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 923) }
-emit_pavgb_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pavgb_xmm_xmm(dst, src)) }
-emit_pavgb_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pavgb_xmm_m128(dst, src)) }
+emit_pavgb_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pavgb_xmm_xmm(dst, src)) }
+emit_pavgb_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pavgb_xmm_m128(dst, src)) }
 inst_pavgw_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PAVGW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 924) }
 inst_pavgw_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PAVGW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 924) }
-emit_pavgw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pavgw_xmm_xmm(dst, src)) }
-emit_pavgw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pavgw_xmm_m128(dst, src)) }
+emit_pavgw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pavgw_xmm_xmm(dst, src)) }
+emit_pavgw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pavgw_xmm_m128(dst, src)) }
 inst_pmaxub_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXUB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 925) }
 inst_pmaxub_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXUB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 925) }
-emit_pmaxub_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmaxub_xmm_xmm(dst, src)) }
-emit_pmaxub_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmaxub_xmm_m128(dst, src)) }
+emit_pmaxub_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmaxub_xmm_xmm(dst, src)) }
+emit_pmaxub_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmaxub_xmm_m128(dst, src)) }
 inst_pmaxsw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 926) }
 inst_pmaxsw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 926) }
-emit_pmaxsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmaxsw_xmm_xmm(dst, src)) }
-emit_pmaxsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmaxsw_xmm_m128(dst, src)) }
+emit_pmaxsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmaxsw_xmm_xmm(dst, src)) }
+emit_pmaxsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmaxsw_xmm_m128(dst, src)) }
 inst_pminub_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINUB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 927) }
 inst_pminub_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINUB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 927) }
-emit_pminub_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pminub_xmm_xmm(dst, src)) }
-emit_pminub_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pminub_xmm_m128(dst, src)) }
+emit_pminub_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pminub_xmm_xmm(dst, src)) }
+emit_pminub_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pminub_xmm_m128(dst, src)) }
 inst_pminsw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 928) }
 inst_pminsw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 928) }
-emit_pminsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pminsw_xmm_xmm(dst, src)) }
-emit_pminsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pminsw_xmm_m128(dst, src)) }
+emit_pminsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pminsw_xmm_xmm(dst, src)) }
+emit_pminsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pminsw_xmm_m128(dst, src)) }
 inst_psadbw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSADBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 929) }
 inst_psadbw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSADBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 929) }
-emit_psadbw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psadbw_xmm_xmm(dst, src)) }
-emit_psadbw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psadbw_xmm_m128(dst, src)) }
+emit_psadbw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psadbw_xmm_xmm(dst, src)) }
+emit_psadbw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psadbw_xmm_m128(dst, src)) }
 inst_maskmovdqu_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MASKMOVDQU, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 930) }
-emit_maskmovdqu_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_maskmovdqu_xmm_xmm(dst, src)) }
+emit_maskmovdqu_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_maskmovdqu_xmm_xmm(dst, src)) }
 inst_lfence_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LFENCE, operand_count = 0, ops = {{}, {}, {}, {}} }, 931) }
-emit_lfence_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_lfence_none()) }
+emit_lfence_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_lfence_none()) }
 inst_sfence_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SFENCE, operand_count = 0, ops = {{}, {}, {}, {}} }, 932) }
-emit_sfence_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_sfence_none()) }
+emit_sfence_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_sfence_none()) }
 inst_mfence_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MFENCE, operand_count = 0, ops = {{}, {}, {}, {}} }, 933) }
-emit_mfence_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_mfence_none()) }
+emit_mfence_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_mfence_none()) }
 inst_pause_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .PAUSE, operand_count = 0, ops = {{}, {}, {}, {}} }, 934) }
-emit_pause_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pause_none()) }
+emit_pause_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pause_none()) }
 inst_clflush_m8                     :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .CLFLUSH, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 935) }
-emit_clflush_m8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_clflush_m8(dst)) }
+emit_clflush_m8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_clflush_m8(dst)) }
 inst_addsubps_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDSUBPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 936) }
 inst_addsubps_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDSUBPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 936) }
-emit_addsubps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_addsubps_xmm_xmm(dst, src)) }
-emit_addsubps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_addsubps_xmm_m128(dst, src)) }
+emit_addsubps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_addsubps_xmm_xmm(dst, src)) }
+emit_addsubps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_addsubps_xmm_m128(dst, src)) }
 inst_addsubpd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDSUBPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 937) }
 inst_addsubpd_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .ADDSUBPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 937) }
-emit_addsubpd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_addsubpd_xmm_xmm(dst, src)) }
-emit_addsubpd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_addsubpd_xmm_m128(dst, src)) }
+emit_addsubpd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_addsubpd_xmm_xmm(dst, src)) }
+emit_addsubpd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_addsubpd_xmm_m128(dst, src)) }
 inst_haddps_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .HADDPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 938) }
 inst_haddps_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .HADDPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 938) }
-emit_haddps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_haddps_xmm_xmm(dst, src)) }
-emit_haddps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_haddps_xmm_m128(dst, src)) }
+emit_haddps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_haddps_xmm_xmm(dst, src)) }
+emit_haddps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_haddps_xmm_m128(dst, src)) }
 inst_haddpd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .HADDPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 939) }
 inst_haddpd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .HADDPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 939) }
-emit_haddpd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_haddpd_xmm_xmm(dst, src)) }
-emit_haddpd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_haddpd_xmm_m128(dst, src)) }
+emit_haddpd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_haddpd_xmm_xmm(dst, src)) }
+emit_haddpd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_haddpd_xmm_m128(dst, src)) }
 inst_hsubps_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .HSUBPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 940) }
 inst_hsubps_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .HSUBPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 940) }
-emit_hsubps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_hsubps_xmm_xmm(dst, src)) }
-emit_hsubps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_hsubps_xmm_m128(dst, src)) }
+emit_hsubps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_hsubps_xmm_xmm(dst, src)) }
+emit_hsubps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_hsubps_xmm_m128(dst, src)) }
 inst_hsubpd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .HSUBPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 941) }
 inst_hsubpd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .HSUBPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 941) }
-emit_hsubpd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_hsubpd_xmm_xmm(dst, src)) }
-emit_hsubpd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_hsubpd_xmm_m128(dst, src)) }
+emit_hsubpd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_hsubpd_xmm_xmm(dst, src)) }
+emit_hsubpd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_hsubpd_xmm_m128(dst, src)) }
 inst_movddup_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDDUP, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 942) }
 inst_movddup_xmm_m64                :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDDUP, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 942) }
-emit_movddup_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movddup_xmm_xmm(dst, src)) }
-emit_movddup_xmm_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_movddup_xmm_m64(dst, src)) }
+emit_movddup_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movddup_xmm_xmm(dst, src)) }
+emit_movddup_xmm_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_movddup_xmm_m64(dst, src)) }
 inst_movsldup_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSLDUP, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 943) }
 inst_movsldup_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSLDUP, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 943) }
-emit_movsldup_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movsldup_xmm_xmm(dst, src)) }
-emit_movsldup_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movsldup_xmm_m128(dst, src)) }
+emit_movsldup_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movsldup_xmm_xmm(dst, src)) }
+emit_movsldup_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movsldup_xmm_m128(dst, src)) }
 inst_movshdup_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSHDUP, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 944) }
 inst_movshdup_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVSHDUP, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 944) }
-emit_movshdup_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_movshdup_xmm_xmm(dst, src)) }
-emit_movshdup_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_movshdup_xmm_m128(dst, src)) }
+emit_movshdup_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_movshdup_xmm_xmm(dst, src)) }
+emit_movshdup_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_movshdup_xmm_m128(dst, src)) }
 inst_lddqu_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .LDDQU, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 945) }
-emit_lddqu_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_lddqu_xmm_m128(dst, src)) }
+emit_lddqu_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_lddqu_xmm_m128(dst, src)) }
 inst_pshufb_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 946) }
 inst_pshufb_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSHUFB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 946) }
-emit_pshufb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pshufb_xmm_xmm(dst, src)) }
-emit_pshufb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pshufb_xmm_m128(dst, src)) }
+emit_pshufb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pshufb_xmm_xmm(dst, src)) }
+emit_pshufb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pshufb_xmm_m128(dst, src)) }
 inst_phaddw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PHADDW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 947) }
 inst_phaddw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PHADDW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 947) }
-emit_phaddw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_phaddw_xmm_xmm(dst, src)) }
-emit_phaddw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_phaddw_xmm_m128(dst, src)) }
+emit_phaddw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_phaddw_xmm_xmm(dst, src)) }
+emit_phaddw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_phaddw_xmm_m128(dst, src)) }
 inst_phaddd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PHADDD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 948) }
 inst_phaddd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PHADDD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 948) }
-emit_phaddd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_phaddd_xmm_xmm(dst, src)) }
-emit_phaddd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_phaddd_xmm_m128(dst, src)) }
+emit_phaddd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_phaddd_xmm_xmm(dst, src)) }
+emit_phaddd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_phaddd_xmm_m128(dst, src)) }
 inst_phaddsw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PHADDSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 949) }
 inst_phaddsw_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PHADDSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 949) }
-emit_phaddsw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_phaddsw_xmm_xmm(dst, src)) }
-emit_phaddsw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_phaddsw_xmm_m128(dst, src)) }
+emit_phaddsw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_phaddsw_xmm_xmm(dst, src)) }
+emit_phaddsw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_phaddsw_xmm_m128(dst, src)) }
 inst_phsubw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PHSUBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 950) }
 inst_phsubw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PHSUBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 950) }
-emit_phsubw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_phsubw_xmm_xmm(dst, src)) }
-emit_phsubw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_phsubw_xmm_m128(dst, src)) }
+emit_phsubw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_phsubw_xmm_xmm(dst, src)) }
+emit_phsubw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_phsubw_xmm_m128(dst, src)) }
 inst_phsubd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PHSUBD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 951) }
 inst_phsubd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PHSUBD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 951) }
-emit_phsubd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_phsubd_xmm_xmm(dst, src)) }
-emit_phsubd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_phsubd_xmm_m128(dst, src)) }
+emit_phsubd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_phsubd_xmm_xmm(dst, src)) }
+emit_phsubd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_phsubd_xmm_m128(dst, src)) }
 inst_phsubsw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PHSUBSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 952) }
 inst_phsubsw_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PHSUBSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 952) }
-emit_phsubsw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_phsubsw_xmm_xmm(dst, src)) }
-emit_phsubsw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_phsubsw_xmm_m128(dst, src)) }
+emit_phsubsw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_phsubsw_xmm_xmm(dst, src)) }
+emit_phsubsw_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_phsubsw_xmm_m128(dst, src)) }
 inst_pmaddubsw_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMADDUBSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 953) }
 inst_pmaddubsw_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMADDUBSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 953) }
-emit_pmaddubsw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmaddubsw_xmm_xmm(dst, src)) }
-emit_pmaddubsw_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmaddubsw_xmm_m128(dst, src)) }
+emit_pmaddubsw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmaddubsw_xmm_xmm(dst, src)) }
+emit_pmaddubsw_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmaddubsw_xmm_m128(dst, src)) }
 inst_pmulhrsw_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULHRSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 954) }
 inst_pmulhrsw_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULHRSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 954) }
-emit_pmulhrsw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmulhrsw_xmm_xmm(dst, src)) }
-emit_pmulhrsw_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmulhrsw_xmm_m128(dst, src)) }
+emit_pmulhrsw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmulhrsw_xmm_xmm(dst, src)) }
+emit_pmulhrsw_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmulhrsw_xmm_m128(dst, src)) }
 inst_psignb_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSIGNB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 955) }
 inst_psignb_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSIGNB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 955) }
-emit_psignb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psignb_xmm_xmm(dst, src)) }
-emit_psignb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psignb_xmm_m128(dst, src)) }
+emit_psignb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psignb_xmm_xmm(dst, src)) }
+emit_psignb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psignb_xmm_m128(dst, src)) }
 inst_psignw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSIGNW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 956) }
 inst_psignw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSIGNW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 956) }
-emit_psignw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psignw_xmm_xmm(dst, src)) }
-emit_psignw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psignw_xmm_m128(dst, src)) }
+emit_psignw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psignw_xmm_xmm(dst, src)) }
+emit_psignw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psignw_xmm_m128(dst, src)) }
 inst_psignd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PSIGND, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 957) }
 inst_psignd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PSIGND, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 957) }
-emit_psignd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_psignd_xmm_xmm(dst, src)) }
-emit_psignd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_psignd_xmm_m128(dst, src)) }
+emit_psignd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_psignd_xmm_xmm(dst, src)) }
+emit_psignd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_psignd_xmm_m128(dst, src)) }
 inst_pabsb_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PABSB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 958) }
 inst_pabsb_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PABSB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 958) }
-emit_pabsb_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pabsb_xmm_xmm(dst, src)) }
-emit_pabsb_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pabsb_xmm_m128(dst, src)) }
+emit_pabsb_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pabsb_xmm_xmm(dst, src)) }
+emit_pabsb_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pabsb_xmm_m128(dst, src)) }
 inst_pabsw_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PABSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 959) }
 inst_pabsw_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PABSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 959) }
-emit_pabsw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pabsw_xmm_xmm(dst, src)) }
-emit_pabsw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pabsw_xmm_m128(dst, src)) }
+emit_pabsw_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pabsw_xmm_xmm(dst, src)) }
+emit_pabsw_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pabsw_xmm_m128(dst, src)) }
 inst_pabsd_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PABSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 960) }
 inst_pabsd_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PABSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 960) }
-emit_pabsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pabsd_xmm_xmm(dst, src)) }
-emit_pabsd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pabsd_xmm_m128(dst, src)) }
+emit_pabsd_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pabsd_xmm_xmm(dst, src)) }
+emit_pabsd_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pabsd_xmm_m128(dst, src)) }
 inst_palignr_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PALIGNR, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 961) }
 inst_palignr_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PALIGNR, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 961) }
-emit_palignr_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_palignr_xmm_xmm_imm8(dst, src, imm)) }
-emit_palignr_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_palignr_xmm_m128_imm8(dst, src, imm)) }
+emit_palignr_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_palignr_xmm_xmm_imm8(dst, src, imm)) }
+emit_palignr_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_palignr_xmm_m128_imm8(dst, src, imm)) }
 inst_blendps_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BLENDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 962) }
 inst_blendps_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BLENDPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 962) }
-emit_blendps_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_blendps_xmm_xmm_imm8(dst, src, imm)) }
-emit_blendps_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_blendps_xmm_m128_imm8(dst, src, imm)) }
+emit_blendps_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_blendps_xmm_xmm_imm8(dst, src, imm)) }
+emit_blendps_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_blendps_xmm_m128_imm8(dst, src, imm)) }
 inst_blendpd_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BLENDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 963) }
 inst_blendpd_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .BLENDPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 963) }
-emit_blendpd_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_blendpd_xmm_xmm_imm8(dst, src, imm)) }
-emit_blendpd_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_blendpd_xmm_m128_imm8(dst, src, imm)) }
+emit_blendpd_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_blendpd_xmm_xmm_imm8(dst, src, imm)) }
+emit_blendpd_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_blendpd_xmm_m128_imm8(dst, src, imm)) }
 inst_blendvps_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .BLENDVPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 964) }
 inst_blendvps_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .BLENDVPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 964) }
-emit_blendvps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_blendvps_xmm_xmm(dst, src)) }
-emit_blendvps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_blendvps_xmm_m128(dst, src)) }
+emit_blendvps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_blendvps_xmm_xmm(dst, src)) }
+emit_blendvps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_blendvps_xmm_m128(dst, src)) }
 inst_blendvpd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .BLENDVPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 965) }
 inst_blendvpd_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .BLENDVPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 965) }
-emit_blendvpd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_blendvpd_xmm_xmm(dst, src)) }
-emit_blendvpd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_blendvpd_xmm_m128(dst, src)) }
+emit_blendvpd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_blendvpd_xmm_xmm(dst, src)) }
+emit_blendvpd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_blendvpd_xmm_m128(dst, src)) }
 inst_pblendw_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PBLENDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 966) }
 inst_pblendw_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PBLENDW, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 966) }
-emit_pblendw_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pblendw_xmm_xmm_imm8(dst, src, imm)) }
-emit_pblendw_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pblendw_xmm_m128_imm8(dst, src, imm)) }
+emit_pblendw_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pblendw_xmm_xmm_imm8(dst, src, imm)) }
+emit_pblendw_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pblendw_xmm_m128_imm8(dst, src, imm)) }
 inst_pblendvb_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PBLENDVB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 967) }
 inst_pblendvb_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PBLENDVB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 967) }
-emit_pblendvb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pblendvb_xmm_xmm(dst, src)) }
-emit_pblendvb_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pblendvb_xmm_m128(dst, src)) }
+emit_pblendvb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pblendvb_xmm_xmm(dst, src)) }
+emit_pblendvb_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pblendvb_xmm_m128(dst, src)) }
 inst_dpps_xmm_xmm_imm8              :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .DPPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 968) }
 inst_dpps_xmm_m128_imm8             :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .DPPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 968) }
-emit_dpps_xmm_xmm_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_dpps_xmm_xmm_imm8(dst, src, imm)) }
-emit_dpps_xmm_m128_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_dpps_xmm_m128_imm8(dst, src, imm)) }
+emit_dpps_xmm_xmm_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_dpps_xmm_xmm_imm8(dst, src, imm)) }
+emit_dpps_xmm_m128_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_dpps_xmm_m128_imm8(dst, src, imm)) }
 inst_dppd_xmm_xmm_imm8              :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .DPPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 969) }
 inst_dppd_xmm_m128_imm8             :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .DPPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 969) }
-emit_dppd_xmm_xmm_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_dppd_xmm_xmm_imm8(dst, src, imm)) }
-emit_dppd_xmm_m128_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_dppd_xmm_m128_imm8(dst, src, imm)) }
+emit_dppd_xmm_xmm_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_dppd_xmm_xmm_imm8(dst, src, imm)) }
+emit_dppd_xmm_m128_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_dppd_xmm_m128_imm8(dst, src, imm)) }
 inst_extractps_r32_xmm_imm8         :: #force_inline proc "contextless" (dst: GPR32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .EXTRACTPS, operand_count = 3, ops = {op_gpr32(dst), op_xmm(src), op_imm8(imm), {}} }, 970) }
 inst_extractps_m32_xmm_imm8         :: #force_inline proc "contextless" (dst: Mem32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .EXTRACTPS, operand_count = 3, ops = {op_mem(dst.mem, 4), op_xmm(src), op_imm8(imm), {}} }, 970) }
-emit_extractps_r32_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append(instructions, inst_extractps_r32_xmm_imm8(dst, src, imm)) }
-emit_extractps_m32_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM, imm: i8) { append(instructions, inst_extractps_m32_xmm_imm8(dst, src, imm)) }
+emit_extractps_r32_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append_elem(instructions, inst_extractps_r32_xmm_imm8(dst, src, imm)) }
+emit_extractps_m32_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM, imm: i8) { append_elem(instructions, inst_extractps_m32_xmm_imm8(dst, src, imm)) }
 inst_insertps_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .INSERTPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 971) }
 inst_insertps_xmm_m32_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .INSERTPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 4), op_imm8(imm), {}} }, 971) }
-emit_insertps_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_insertps_xmm_xmm_imm8(dst, src, imm)) }
-emit_insertps_xmm_m32_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32, imm: i8) { append(instructions, inst_insertps_xmm_m32_imm8(dst, src, imm)) }
+emit_insertps_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_insertps_xmm_xmm_imm8(dst, src, imm)) }
+emit_insertps_xmm_m32_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32, imm: i8) { append_elem(instructions, inst_insertps_xmm_m32_imm8(dst, src, imm)) }
 inst_mpsadbw_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .MPSADBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 972) }
 inst_mpsadbw_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .MPSADBW, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 972) }
-emit_mpsadbw_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_mpsadbw_xmm_xmm_imm8(dst, src, imm)) }
-emit_mpsadbw_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_mpsadbw_xmm_m128_imm8(dst, src, imm)) }
+emit_mpsadbw_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_mpsadbw_xmm_xmm_imm8(dst, src, imm)) }
+emit_mpsadbw_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_mpsadbw_xmm_m128_imm8(dst, src, imm)) }
 inst_packusdw_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PACKUSDW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 973) }
 inst_packusdw_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PACKUSDW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 973) }
-emit_packusdw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_packusdw_xmm_xmm(dst, src)) }
-emit_packusdw_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_packusdw_xmm_m128(dst, src)) }
+emit_packusdw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_packusdw_xmm_xmm(dst, src)) }
+emit_packusdw_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_packusdw_xmm_m128(dst, src)) }
 inst_pextrb_r8_xmm_imm8             :: #force_inline proc "contextless" (dst: GPR8, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXTRB, operand_count = 3, ops = {op_gpr8(dst), op_xmm(src), op_imm8(imm), {}} }, 974) }
 inst_pextrb_m8_xmm_imm8             :: #force_inline proc "contextless" (dst: Mem8, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXTRB, operand_count = 3, ops = {op_mem(dst.mem, 1), op_xmm(src), op_imm8(imm), {}} }, 974) }
-emit_pextrb_r8_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: XMM, imm: i8) { append(instructions, inst_pextrb_r8_xmm_imm8(dst, src, imm)) }
-emit_pextrb_m8_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: XMM, imm: i8) { append(instructions, inst_pextrb_m8_xmm_imm8(dst, src, imm)) }
+emit_pextrb_r8_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: XMM, imm: i8) { append_elem(instructions, inst_pextrb_r8_xmm_imm8(dst, src, imm)) }
+emit_pextrb_m8_xmm_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: XMM, imm: i8) { append_elem(instructions, inst_pextrb_m8_xmm_imm8(dst, src, imm)) }
 inst_pextrd_r32_xmm_imm8            :: #force_inline proc "contextless" (dst: GPR32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXTRD, operand_count = 3, ops = {op_gpr32(dst), op_xmm(src), op_imm8(imm), {}} }, 975) }
 inst_pextrd_m32_xmm_imm8            :: #force_inline proc "contextless" (dst: Mem32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXTRD, operand_count = 3, ops = {op_mem(dst.mem, 4), op_xmm(src), op_imm8(imm), {}} }, 975) }
-emit_pextrd_r32_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append(instructions, inst_pextrd_r32_xmm_imm8(dst, src, imm)) }
-emit_pextrd_m32_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM, imm: i8) { append(instructions, inst_pextrd_m32_xmm_imm8(dst, src, imm)) }
+emit_pextrd_r32_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append_elem(instructions, inst_pextrd_r32_xmm_imm8(dst, src, imm)) }
+emit_pextrd_m32_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM, imm: i8) { append_elem(instructions, inst_pextrd_m32_xmm_imm8(dst, src, imm)) }
 inst_pextrq_r64_xmm_imm8            :: #force_inline proc "contextless" (dst: GPR64, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXTRQ, operand_count = 3, ops = {op_gpr64(dst), op_xmm(src), op_imm8(imm), {}} }, 976) }
 inst_pextrq_m64_xmm_imm8            :: #force_inline proc "contextless" (dst: Mem64, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PEXTRQ, operand_count = 3, ops = {op_mem(dst.mem, 8), op_xmm(src), op_imm8(imm), {}} }, 976) }
-emit_pextrq_r64_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM, imm: i8) { append(instructions, inst_pextrq_r64_xmm_imm8(dst, src, imm)) }
-emit_pextrq_m64_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM, imm: i8) { append(instructions, inst_pextrq_m64_xmm_imm8(dst, src, imm)) }
+emit_pextrq_r64_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM, imm: i8) { append_elem(instructions, inst_pextrq_r64_xmm_imm8(dst, src, imm)) }
+emit_pextrq_m64_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM, imm: i8) { append_elem(instructions, inst_pextrq_m64_xmm_imm8(dst, src, imm)) }
 inst_phminposuw_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PHMINPOSUW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 977) }
 inst_phminposuw_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PHMINPOSUW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 977) }
-emit_phminposuw_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_phminposuw_xmm_xmm(dst, src)) }
-emit_phminposuw_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_phminposuw_xmm_m128(dst, src)) }
+emit_phminposuw_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_phminposuw_xmm_xmm(dst, src)) }
+emit_phminposuw_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_phminposuw_xmm_m128(dst, src)) }
 inst_pinsrb_xmm_r8_imm8             :: #force_inline proc "contextless" (dst: XMM, src: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PINSRB, operand_count = 3, ops = {op_xmm(dst), op_gpr8(src), op_imm8(imm), {}} }, 978) }
 inst_pinsrb_xmm_m8_imm8             :: #force_inline proc "contextless" (dst: XMM, src: Mem8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PINSRB, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 1), op_imm8(imm), {}} }, 978) }
-emit_pinsrb_xmm_r8_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR8, imm: i8) { append(instructions, inst_pinsrb_xmm_r8_imm8(dst, src, imm)) }
-emit_pinsrb_xmm_m8_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem8, imm: i8) { append(instructions, inst_pinsrb_xmm_m8_imm8(dst, src, imm)) }
+emit_pinsrb_xmm_r8_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR8, imm: i8) { append_elem(instructions, inst_pinsrb_xmm_r8_imm8(dst, src, imm)) }
+emit_pinsrb_xmm_m8_imm8             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem8, imm: i8) { append_elem(instructions, inst_pinsrb_xmm_m8_imm8(dst, src, imm)) }
 inst_pinsrd_xmm_r32_imm8            :: #force_inline proc "contextless" (dst: XMM, src: GPR32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PINSRD, operand_count = 3, ops = {op_xmm(dst), op_gpr32(src), op_imm8(imm), {}} }, 979) }
 inst_pinsrd_xmm_m32_imm8            :: #force_inline proc "contextless" (dst: XMM, src: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PINSRD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 4), op_imm8(imm), {}} }, 979) }
-emit_pinsrd_xmm_r32_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32, imm: i8) { append(instructions, inst_pinsrd_xmm_r32_imm8(dst, src, imm)) }
-emit_pinsrd_xmm_m32_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32, imm: i8) { append(instructions, inst_pinsrd_xmm_m32_imm8(dst, src, imm)) }
+emit_pinsrd_xmm_r32_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32, imm: i8) { append_elem(instructions, inst_pinsrd_xmm_r32_imm8(dst, src, imm)) }
+emit_pinsrd_xmm_m32_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32, imm: i8) { append_elem(instructions, inst_pinsrd_xmm_m32_imm8(dst, src, imm)) }
 inst_pinsrq_xmm_r64_imm8            :: #force_inline proc "contextless" (dst: XMM, src: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PINSRQ, operand_count = 3, ops = {op_xmm(dst), op_gpr64(src), op_imm8(imm), {}} }, 980) }
 inst_pinsrq_xmm_m64_imm8            :: #force_inline proc "contextless" (dst: XMM, src: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PINSRQ, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 8), op_imm8(imm), {}} }, 980) }
-emit_pinsrq_xmm_r64_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64, imm: i8) { append(instructions, inst_pinsrq_xmm_r64_imm8(dst, src, imm)) }
-emit_pinsrq_xmm_m64_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64, imm: i8) { append(instructions, inst_pinsrq_xmm_m64_imm8(dst, src, imm)) }
+emit_pinsrq_xmm_r64_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64, imm: i8) { append_elem(instructions, inst_pinsrq_xmm_r64_imm8(dst, src, imm)) }
+emit_pinsrq_xmm_m64_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64, imm: i8) { append_elem(instructions, inst_pinsrq_xmm_m64_imm8(dst, src, imm)) }
 inst_pmaxsb_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXSB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 981) }
 inst_pmaxsb_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXSB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 981) }
-emit_pmaxsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmaxsb_xmm_xmm(dst, src)) }
-emit_pmaxsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmaxsb_xmm_m128(dst, src)) }
+emit_pmaxsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmaxsb_xmm_xmm(dst, src)) }
+emit_pmaxsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmaxsb_xmm_m128(dst, src)) }
 inst_pmaxsd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 982) }
 inst_pmaxsd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 982) }
-emit_pmaxsd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmaxsd_xmm_xmm(dst, src)) }
-emit_pmaxsd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmaxsd_xmm_m128(dst, src)) }
+emit_pmaxsd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmaxsd_xmm_xmm(dst, src)) }
+emit_pmaxsd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmaxsd_xmm_m128(dst, src)) }
 inst_pmaxuw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXUW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 983) }
 inst_pmaxuw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXUW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 983) }
-emit_pmaxuw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmaxuw_xmm_xmm(dst, src)) }
-emit_pmaxuw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmaxuw_xmm_m128(dst, src)) }
+emit_pmaxuw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmaxuw_xmm_xmm(dst, src)) }
+emit_pmaxuw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmaxuw_xmm_m128(dst, src)) }
 inst_pmaxud_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXUD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 984) }
 inst_pmaxud_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMAXUD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 984) }
-emit_pmaxud_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmaxud_xmm_xmm(dst, src)) }
-emit_pmaxud_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmaxud_xmm_m128(dst, src)) }
+emit_pmaxud_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmaxud_xmm_xmm(dst, src)) }
+emit_pmaxud_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmaxud_xmm_m128(dst, src)) }
 inst_pminsb_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINSB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 985) }
 inst_pminsb_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINSB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 985) }
-emit_pminsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pminsb_xmm_xmm(dst, src)) }
-emit_pminsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pminsb_xmm_m128(dst, src)) }
+emit_pminsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pminsb_xmm_xmm(dst, src)) }
+emit_pminsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pminsb_xmm_m128(dst, src)) }
 inst_pminsd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 986) }
 inst_pminsd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 986) }
-emit_pminsd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pminsd_xmm_xmm(dst, src)) }
-emit_pminsd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pminsd_xmm_m128(dst, src)) }
+emit_pminsd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pminsd_xmm_xmm(dst, src)) }
+emit_pminsd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pminsd_xmm_m128(dst, src)) }
 inst_pminuw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINUW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 987) }
 inst_pminuw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINUW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 987) }
-emit_pminuw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pminuw_xmm_xmm(dst, src)) }
-emit_pminuw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pminuw_xmm_m128(dst, src)) }
+emit_pminuw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pminuw_xmm_xmm(dst, src)) }
+emit_pminuw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pminuw_xmm_m128(dst, src)) }
 inst_pminud_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINUD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 988) }
 inst_pminud_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMINUD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 988) }
-emit_pminud_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pminud_xmm_xmm(dst, src)) }
-emit_pminud_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pminud_xmm_m128(dst, src)) }
+emit_pminud_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pminud_xmm_xmm(dst, src)) }
+emit_pminud_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pminud_xmm_m128(dst, src)) }
 inst_pmovsxbw_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 989) }
 inst_pmovsxbw_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 989) }
-emit_pmovsxbw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovsxbw_xmm_xmm(dst, src)) }
-emit_pmovsxbw_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_pmovsxbw_xmm_m64(dst, src)) }
+emit_pmovsxbw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovsxbw_xmm_xmm(dst, src)) }
+emit_pmovsxbw_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_pmovsxbw_xmm_m64(dst, src)) }
 inst_pmovsxbd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXBD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 990) }
 inst_pmovsxbd_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXBD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 990) }
-emit_pmovsxbd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovsxbd_xmm_xmm(dst, src)) }
-emit_pmovsxbd_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_pmovsxbd_xmm_m32(dst, src)) }
+emit_pmovsxbd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovsxbd_xmm_xmm(dst, src)) }
+emit_pmovsxbd_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_pmovsxbd_xmm_m32(dst, src)) }
 inst_pmovsxbq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXBQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 991) }
 inst_pmovsxbq_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXBQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 991) }
-emit_pmovsxbq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovsxbq_xmm_xmm(dst, src)) }
-emit_pmovsxbq_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_pmovsxbq_xmm_m32(dst, src)) }
+emit_pmovsxbq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovsxbq_xmm_xmm(dst, src)) }
+emit_pmovsxbq_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_pmovsxbq_xmm_m32(dst, src)) }
 inst_pmovsxwd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXWD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 992) }
 inst_pmovsxwd_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXWD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 992) }
-emit_pmovsxwd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovsxwd_xmm_xmm(dst, src)) }
-emit_pmovsxwd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_pmovsxwd_xmm_m64(dst, src)) }
+emit_pmovsxwd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovsxwd_xmm_xmm(dst, src)) }
+emit_pmovsxwd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_pmovsxwd_xmm_m64(dst, src)) }
 inst_pmovsxwq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXWQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 993) }
 inst_pmovsxwq_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXWQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 993) }
-emit_pmovsxwq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovsxwq_xmm_xmm(dst, src)) }
-emit_pmovsxwq_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_pmovsxwq_xmm_m32(dst, src)) }
+emit_pmovsxwq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovsxwq_xmm_xmm(dst, src)) }
+emit_pmovsxwq_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_pmovsxwq_xmm_m32(dst, src)) }
 inst_pmovsxdq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 994) }
 inst_pmovsxdq_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVSXDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 994) }
-emit_pmovsxdq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovsxdq_xmm_xmm(dst, src)) }
-emit_pmovsxdq_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_pmovsxdq_xmm_m64(dst, src)) }
+emit_pmovsxdq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovsxdq_xmm_xmm(dst, src)) }
+emit_pmovsxdq_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_pmovsxdq_xmm_m64(dst, src)) }
 inst_pmovzxbw_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 995) }
 inst_pmovzxbw_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 995) }
-emit_pmovzxbw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovzxbw_xmm_xmm(dst, src)) }
-emit_pmovzxbw_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_pmovzxbw_xmm_m64(dst, src)) }
+emit_pmovzxbw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovzxbw_xmm_xmm(dst, src)) }
+emit_pmovzxbw_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_pmovzxbw_xmm_m64(dst, src)) }
 inst_pmovzxbd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXBD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 996) }
 inst_pmovzxbd_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXBD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 996) }
-emit_pmovzxbd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovzxbd_xmm_xmm(dst, src)) }
-emit_pmovzxbd_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_pmovzxbd_xmm_m32(dst, src)) }
+emit_pmovzxbd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovzxbd_xmm_xmm(dst, src)) }
+emit_pmovzxbd_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_pmovzxbd_xmm_m32(dst, src)) }
 inst_pmovzxbq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXBQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 997) }
 inst_pmovzxbq_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXBQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 997) }
-emit_pmovzxbq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovzxbq_xmm_xmm(dst, src)) }
-emit_pmovzxbq_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_pmovzxbq_xmm_m32(dst, src)) }
+emit_pmovzxbq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovzxbq_xmm_xmm(dst, src)) }
+emit_pmovzxbq_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_pmovzxbq_xmm_m32(dst, src)) }
 inst_pmovzxwd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXWD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 998) }
 inst_pmovzxwd_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXWD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 998) }
-emit_pmovzxwd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovzxwd_xmm_xmm(dst, src)) }
-emit_pmovzxwd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_pmovzxwd_xmm_m64(dst, src)) }
+emit_pmovzxwd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovzxwd_xmm_xmm(dst, src)) }
+emit_pmovzxwd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_pmovzxwd_xmm_m64(dst, src)) }
 inst_pmovzxwq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXWQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 999) }
 inst_pmovzxwq_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXWQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 999) }
-emit_pmovzxwq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovzxwq_xmm_xmm(dst, src)) }
-emit_pmovzxwq_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_pmovzxwq_xmm_m32(dst, src)) }
+emit_pmovzxwq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovzxwq_xmm_xmm(dst, src)) }
+emit_pmovzxwq_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_pmovzxwq_xmm_m32(dst, src)) }
 inst_pmovzxdq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1000) }
 inst_pmovzxdq_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PMOVZXDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1000) }
-emit_pmovzxdq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmovzxdq_xmm_xmm(dst, src)) }
-emit_pmovzxdq_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_pmovzxdq_xmm_m64(dst, src)) }
+emit_pmovzxdq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmovzxdq_xmm_xmm(dst, src)) }
+emit_pmovzxdq_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_pmovzxdq_xmm_m64(dst, src)) }
 inst_pmuldq_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1001) }
 inst_pmuldq_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1001) }
-emit_pmuldq_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmuldq_xmm_xmm(dst, src)) }
-emit_pmuldq_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmuldq_xmm_m128(dst, src)) }
+emit_pmuldq_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmuldq_xmm_xmm(dst, src)) }
+emit_pmuldq_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmuldq_xmm_m128(dst, src)) }
 inst_pmulld_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULLD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1002) }
 inst_pmulld_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PMULLD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1002) }
-emit_pmulld_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pmulld_xmm_xmm(dst, src)) }
-emit_pmulld_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pmulld_xmm_m128(dst, src)) }
+emit_pmulld_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pmulld_xmm_xmm(dst, src)) }
+emit_pmulld_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pmulld_xmm_m128(dst, src)) }
 inst_ptest_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PTEST, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1003) }
 inst_ptest_xmm_m128                 :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PTEST, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1003) }
-emit_ptest_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_ptest_xmm_xmm(dst, src)) }
-emit_ptest_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_ptest_xmm_m128(dst, src)) }
+emit_ptest_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_ptest_xmm_xmm(dst, src)) }
+emit_ptest_xmm_m128                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_ptest_xmm_m128(dst, src)) }
 inst_roundps_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROUNDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1004) }
 inst_roundps_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROUNDPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1004) }
-emit_roundps_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_roundps_xmm_xmm_imm8(dst, src, imm)) }
-emit_roundps_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_roundps_xmm_m128_imm8(dst, src, imm)) }
+emit_roundps_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_roundps_xmm_xmm_imm8(dst, src, imm)) }
+emit_roundps_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_roundps_xmm_m128_imm8(dst, src, imm)) }
 inst_roundpd_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROUNDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1005) }
 inst_roundpd_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROUNDPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1005) }
-emit_roundpd_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_roundpd_xmm_xmm_imm8(dst, src, imm)) }
-emit_roundpd_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_roundpd_xmm_m128_imm8(dst, src, imm)) }
+emit_roundpd_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_roundpd_xmm_xmm_imm8(dst, src, imm)) }
+emit_roundpd_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_roundpd_xmm_m128_imm8(dst, src, imm)) }
 inst_roundss_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROUNDSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1006) }
 inst_roundss_xmm_m32_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROUNDSS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 4), op_imm8(imm), {}} }, 1006) }
-emit_roundss_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_roundss_xmm_xmm_imm8(dst, src, imm)) }
-emit_roundss_xmm_m32_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32, imm: i8) { append(instructions, inst_roundss_xmm_m32_imm8(dst, src, imm)) }
+emit_roundss_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_roundss_xmm_xmm_imm8(dst, src, imm)) }
+emit_roundss_xmm_m32_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32, imm: i8) { append_elem(instructions, inst_roundss_xmm_m32_imm8(dst, src, imm)) }
 inst_roundsd_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROUNDSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1007) }
 inst_roundsd_xmm_m64_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ROUNDSD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 8), op_imm8(imm), {}} }, 1007) }
-emit_roundsd_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_roundsd_xmm_xmm_imm8(dst, src, imm)) }
-emit_roundsd_xmm_m64_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64, imm: i8) { append(instructions, inst_roundsd_xmm_m64_imm8(dst, src, imm)) }
+emit_roundsd_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_roundsd_xmm_xmm_imm8(dst, src, imm)) }
+emit_roundsd_xmm_m64_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64, imm: i8) { append_elem(instructions, inst_roundsd_xmm_m64_imm8(dst, src, imm)) }
 inst_pcmpeqq_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPEQQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1008) }
 inst_pcmpeqq_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPEQQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1008) }
-emit_pcmpeqq_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pcmpeqq_xmm_xmm(dst, src)) }
-emit_pcmpeqq_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pcmpeqq_xmm_m128(dst, src)) }
+emit_pcmpeqq_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pcmpeqq_xmm_xmm(dst, src)) }
+emit_pcmpeqq_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pcmpeqq_xmm_m128(dst, src)) }
 inst_crc32_r32_r8                   :: #force_inline proc "contextless" (dst: GPR32, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .CRC32, operand_count = 2, ops = {op_gpr32(dst), op_gpr8(src), {}, {}} }, 1009) }
 inst_crc32_r32_m8                   :: #force_inline proc "contextless" (dst: GPR32, src: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .CRC32, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 1), {}, {}} }, 1009) }
 inst_crc32_r32_r16                  :: #force_inline proc "contextless" (dst: GPR32, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CRC32, operand_count = 2, ops = {op_gpr32(dst), op_gpr16(src), {}, {}} }, 1010) }
@@ -3165,2322 +3165,2322 @@ inst_crc32_r64_r8                   :: #force_inline proc "contextless" (dst: GP
 inst_crc32_r64_m8                   :: #force_inline proc "contextless" (dst: GPR64, src: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .CRC32, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 1), {}, {}} }, 1012) }
 inst_crc32_r64_r64                  :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CRC32, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 1013) }
 inst_crc32_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CRC32, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 1013) }
-emit_crc32_r32_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR8) { append(instructions, inst_crc32_r32_r8(dst, src)) }
-emit_crc32_r32_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem8) { append(instructions, inst_crc32_r32_m8(dst, src)) }
-emit_crc32_r32_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR16) { append(instructions, inst_crc32_r32_r16(dst, src)) }
-emit_crc32_r32_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem16) { append(instructions, inst_crc32_r32_m16(dst, src)) }
-emit_crc32_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_crc32_r32_r32(dst, src)) }
-emit_crc32_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_crc32_r32_m32(dst, src)) }
-emit_crc32_r64_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR8) { append(instructions, inst_crc32_r64_r8(dst, src)) }
-emit_crc32_r64_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem8) { append(instructions, inst_crc32_r64_m8(dst, src)) }
-emit_crc32_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_crc32_r64_r64(dst, src)) }
-emit_crc32_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_crc32_r64_m64(dst, src)) }
+emit_crc32_r32_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR8) { append_elem(instructions, inst_crc32_r32_r8(dst, src)) }
+emit_crc32_r32_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem8) { append_elem(instructions, inst_crc32_r32_m8(dst, src)) }
+emit_crc32_r32_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR16) { append_elem(instructions, inst_crc32_r32_r16(dst, src)) }
+emit_crc32_r32_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem16) { append_elem(instructions, inst_crc32_r32_m16(dst, src)) }
+emit_crc32_r32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_crc32_r32_r32(dst, src)) }
+emit_crc32_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_crc32_r32_m32(dst, src)) }
+emit_crc32_r64_r8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR8) { append_elem(instructions, inst_crc32_r64_r8(dst, src)) }
+emit_crc32_r64_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem8) { append_elem(instructions, inst_crc32_r64_m8(dst, src)) }
+emit_crc32_r64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_crc32_r64_r64(dst, src)) }
+emit_crc32_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_crc32_r64_m64(dst, src)) }
 inst_pcmpestri_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPESTRI, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1014) }
 inst_pcmpestri_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPESTRI, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1014) }
-emit_pcmpestri_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pcmpestri_xmm_xmm_imm8(dst, src, imm)) }
-emit_pcmpestri_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pcmpestri_xmm_m128_imm8(dst, src, imm)) }
+emit_pcmpestri_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pcmpestri_xmm_xmm_imm8(dst, src, imm)) }
+emit_pcmpestri_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pcmpestri_xmm_m128_imm8(dst, src, imm)) }
 inst_pcmpestrm_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPESTRM, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1015) }
 inst_pcmpestrm_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPESTRM, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1015) }
-emit_pcmpestrm_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pcmpestrm_xmm_xmm_imm8(dst, src, imm)) }
-emit_pcmpestrm_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pcmpestrm_xmm_m128_imm8(dst, src, imm)) }
+emit_pcmpestrm_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pcmpestrm_xmm_xmm_imm8(dst, src, imm)) }
+emit_pcmpestrm_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pcmpestrm_xmm_m128_imm8(dst, src, imm)) }
 inst_pcmpistri_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPISTRI, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1016) }
 inst_pcmpistri_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPISTRI, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1016) }
-emit_pcmpistri_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pcmpistri_xmm_xmm_imm8(dst, src, imm)) }
-emit_pcmpistri_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pcmpistri_xmm_m128_imm8(dst, src, imm)) }
+emit_pcmpistri_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pcmpistri_xmm_xmm_imm8(dst, src, imm)) }
+emit_pcmpistri_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pcmpistri_xmm_m128_imm8(dst, src, imm)) }
 inst_pcmpistrm_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPISTRM, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1017) }
 inst_pcmpistrm_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPISTRM, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1017) }
-emit_pcmpistrm_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pcmpistrm_xmm_xmm_imm8(dst, src, imm)) }
-emit_pcmpistrm_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pcmpistrm_xmm_m128_imm8(dst, src, imm)) }
+emit_pcmpistrm_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pcmpistrm_xmm_xmm_imm8(dst, src, imm)) }
+emit_pcmpistrm_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pcmpistrm_xmm_m128_imm8(dst, src, imm)) }
 inst_pcmpgtq_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPGTQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1018) }
 inst_pcmpgtq_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .PCMPGTQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1018) }
-emit_pcmpgtq_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_pcmpgtq_xmm_xmm(dst, src)) }
-emit_pcmpgtq_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_pcmpgtq_xmm_m128(dst, src)) }
+emit_pcmpgtq_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_pcmpgtq_xmm_xmm(dst, src)) }
+emit_pcmpgtq_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_pcmpgtq_xmm_m128(dst, src)) }
 inst_pclmulqdq_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCLMULQDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1019) }
 inst_pclmulqdq_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .PCLMULQDQ, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1019) }
-emit_pclmulqdq_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_pclmulqdq_xmm_xmm_imm8(dst, src, imm)) }
-emit_pclmulqdq_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_pclmulqdq_xmm_m128_imm8(dst, src, imm)) }
+emit_pclmulqdq_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_pclmulqdq_xmm_xmm_imm8(dst, src, imm)) }
+emit_pclmulqdq_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_pclmulqdq_xmm_m128_imm8(dst, src, imm)) }
 inst_aesdec_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .AESDEC, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1020) }
 inst_aesdec_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .AESDEC, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1020) }
-emit_aesdec_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_aesdec_xmm_xmm(dst, src)) }
-emit_aesdec_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_aesdec_xmm_m128(dst, src)) }
+emit_aesdec_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_aesdec_xmm_xmm(dst, src)) }
+emit_aesdec_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_aesdec_xmm_m128(dst, src)) }
 inst_aesdeclast_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .AESDECLAST, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1021) }
 inst_aesdeclast_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .AESDECLAST, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1021) }
-emit_aesdeclast_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_aesdeclast_xmm_xmm(dst, src)) }
-emit_aesdeclast_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_aesdeclast_xmm_m128(dst, src)) }
+emit_aesdeclast_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_aesdeclast_xmm_xmm(dst, src)) }
+emit_aesdeclast_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_aesdeclast_xmm_m128(dst, src)) }
 inst_aesenc_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .AESENC, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1022) }
 inst_aesenc_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .AESENC, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1022) }
-emit_aesenc_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_aesenc_xmm_xmm(dst, src)) }
-emit_aesenc_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_aesenc_xmm_m128(dst, src)) }
+emit_aesenc_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_aesenc_xmm_xmm(dst, src)) }
+emit_aesenc_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_aesenc_xmm_m128(dst, src)) }
 inst_aesenclast_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .AESENCLAST, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1023) }
 inst_aesenclast_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .AESENCLAST, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1023) }
-emit_aesenclast_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_aesenclast_xmm_xmm(dst, src)) }
-emit_aesenclast_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_aesenclast_xmm_m128(dst, src)) }
+emit_aesenclast_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_aesenclast_xmm_xmm(dst, src)) }
+emit_aesenclast_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_aesenclast_xmm_m128(dst, src)) }
 inst_aesimc_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .AESIMC, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1024) }
 inst_aesimc_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .AESIMC, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1024) }
-emit_aesimc_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_aesimc_xmm_xmm(dst, src)) }
-emit_aesimc_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_aesimc_xmm_m128(dst, src)) }
+emit_aesimc_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_aesimc_xmm_xmm(dst, src)) }
+emit_aesimc_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_aesimc_xmm_m128(dst, src)) }
 inst_aeskeygenassist_xmm_xmm_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .AESKEYGENASSIST, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1025) }
 inst_aeskeygenassist_xmm_m128_imm8  :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .AESKEYGENASSIST, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1025) }
-emit_aeskeygenassist_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_aeskeygenassist_xmm_xmm_imm8(dst, src, imm)) }
-emit_aeskeygenassist_xmm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_aeskeygenassist_xmm_m128_imm8(dst, src, imm)) }
+emit_aeskeygenassist_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_aeskeygenassist_xmm_xmm_imm8(dst, src, imm)) }
+emit_aeskeygenassist_xmm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_aeskeygenassist_xmm_m128_imm8(dst, src, imm)) }
 inst_sha1msg1_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA1MSG1, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1026) }
 inst_sha1msg1_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA1MSG1, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1026) }
-emit_sha1msg1_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sha1msg1_xmm_xmm(dst, src)) }
-emit_sha1msg1_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_sha1msg1_xmm_m128(dst, src)) }
+emit_sha1msg1_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sha1msg1_xmm_xmm(dst, src)) }
+emit_sha1msg1_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_sha1msg1_xmm_m128(dst, src)) }
 inst_sha1msg2_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA1MSG2, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1027) }
 inst_sha1msg2_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA1MSG2, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1027) }
-emit_sha1msg2_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sha1msg2_xmm_xmm(dst, src)) }
-emit_sha1msg2_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_sha1msg2_xmm_m128(dst, src)) }
+emit_sha1msg2_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sha1msg2_xmm_xmm(dst, src)) }
+emit_sha1msg2_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_sha1msg2_xmm_m128(dst, src)) }
 inst_sha1nexte_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA1NEXTE, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1028) }
 inst_sha1nexte_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA1NEXTE, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1028) }
-emit_sha1nexte_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sha1nexte_xmm_xmm(dst, src)) }
-emit_sha1nexte_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_sha1nexte_xmm_m128(dst, src)) }
+emit_sha1nexte_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sha1nexte_xmm_xmm(dst, src)) }
+emit_sha1nexte_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_sha1nexte_xmm_m128(dst, src)) }
 inst_sha1rnds4_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA1RNDS4, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1029) }
 inst_sha1rnds4_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA1RNDS4, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1029) }
-emit_sha1rnds4_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_sha1rnds4_xmm_xmm_imm8(dst, src, imm)) }
-emit_sha1rnds4_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_sha1rnds4_xmm_m128_imm8(dst, src, imm)) }
+emit_sha1rnds4_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_sha1rnds4_xmm_xmm_imm8(dst, src, imm)) }
+emit_sha1rnds4_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_sha1rnds4_xmm_m128_imm8(dst, src, imm)) }
 inst_sha256msg1_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA256MSG1, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1030) }
 inst_sha256msg1_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA256MSG1, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1030) }
-emit_sha256msg1_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sha256msg1_xmm_xmm(dst, src)) }
-emit_sha256msg1_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_sha256msg1_xmm_m128(dst, src)) }
+emit_sha256msg1_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sha256msg1_xmm_xmm(dst, src)) }
+emit_sha256msg1_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_sha256msg1_xmm_m128(dst, src)) }
 inst_sha256msg2_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA256MSG2, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1031) }
 inst_sha256msg2_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA256MSG2, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1031) }
-emit_sha256msg2_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sha256msg2_xmm_xmm(dst, src)) }
-emit_sha256msg2_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_sha256msg2_xmm_m128(dst, src)) }
+emit_sha256msg2_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sha256msg2_xmm_xmm(dst, src)) }
+emit_sha256msg2_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_sha256msg2_xmm_m128(dst, src)) }
 inst_sha256rnds2_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA256RNDS2, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1032) }
 inst_sha256rnds2_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .SHA256RNDS2, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1032) }
-emit_sha256rnds2_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_sha256rnds2_xmm_xmm(dst, src)) }
-emit_sha256rnds2_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_sha256rnds2_xmm_m128(dst, src)) }
+emit_sha256rnds2_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_sha256rnds2_xmm_xmm(dst, src)) }
+emit_sha256rnds2_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_sha256rnds2_xmm_m128(dst, src)) }
 inst_vaddps_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1033) }
 inst_vaddps_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1033) }
 inst_vaddps_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1034) }
 inst_vaddps_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1034) }
-emit_vaddps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaddps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaddps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vaddps_xmm_xmm_m128(dst, src, src2)) }
-emit_vaddps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vaddps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vaddps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vaddps_ymm_ymm_m256(dst, src, src2)) }
+emit_vaddps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaddps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaddps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vaddps_xmm_xmm_m128(dst, src, src2)) }
+emit_vaddps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vaddps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vaddps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vaddps_ymm_ymm_m256(dst, src, src2)) }
 inst_vaddpd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1035) }
 inst_vaddpd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1035) }
 inst_vaddpd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1036) }
 inst_vaddpd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1036) }
-emit_vaddpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaddpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaddpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vaddpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vaddpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vaddpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vaddpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vaddpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vaddpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaddpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaddpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vaddpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vaddpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vaddpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vaddpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vaddpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vaddss_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1037) }
 inst_vaddss_xmm_xmm_m32             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1037) }
-emit_vaddss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaddss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaddss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vaddss_xmm_xmm_m32(dst, src, src2)) }
+emit_vaddss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaddss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaddss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vaddss_xmm_xmm_m32(dst, src, src2)) }
 inst_vaddsd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1038) }
 inst_vaddsd_xmm_xmm_m64             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1038) }
-emit_vaddsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaddsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaddsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vaddsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vaddsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaddsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaddsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vaddsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vsubps_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1039) }
 inst_vsubps_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1039) }
 inst_vsubps_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1040) }
 inst_vsubps_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1040) }
-emit_vsubps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vsubps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vsubps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vsubps_xmm_xmm_m128(dst, src, src2)) }
-emit_vsubps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vsubps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vsubps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vsubps_ymm_ymm_m256(dst, src, src2)) }
+emit_vsubps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vsubps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vsubps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vsubps_xmm_xmm_m128(dst, src, src2)) }
+emit_vsubps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vsubps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vsubps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vsubps_ymm_ymm_m256(dst, src, src2)) }
 inst_vsubpd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1041) }
 inst_vsubpd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1041) }
 inst_vsubpd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1042) }
 inst_vsubpd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1042) }
-emit_vsubpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vsubpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vsubpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vsubpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vsubpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vsubpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vsubpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vsubpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vsubpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vsubpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vsubpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vsubpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vsubpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vsubpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vsubpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vsubpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vsubss_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1043) }
 inst_vsubss_xmm_xmm_m32             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1043) }
-emit_vsubss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vsubss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vsubss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vsubss_xmm_xmm_m32(dst, src, src2)) }
+emit_vsubss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vsubss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vsubss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vsubss_xmm_xmm_m32(dst, src, src2)) }
 inst_vsubsd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1044) }
 inst_vsubsd_xmm_xmm_m64             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VSUBSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1044) }
-emit_vsubsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vsubsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vsubsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vsubsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vsubsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vsubsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vsubsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vsubsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vmulps_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1045) }
 inst_vmulps_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1045) }
 inst_vmulps_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1046) }
 inst_vmulps_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1046) }
-emit_vmulps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmulps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vmulps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vmulps_xmm_xmm_m128(dst, src, src2)) }
-emit_vmulps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vmulps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vmulps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vmulps_ymm_ymm_m256(dst, src, src2)) }
+emit_vmulps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmulps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmulps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vmulps_xmm_xmm_m128(dst, src, src2)) }
+emit_vmulps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vmulps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vmulps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vmulps_ymm_ymm_m256(dst, src, src2)) }
 inst_vmulpd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1047) }
 inst_vmulpd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1047) }
 inst_vmulpd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1048) }
 inst_vmulpd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1048) }
-emit_vmulpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmulpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vmulpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vmulpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vmulpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vmulpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vmulpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vmulpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vmulpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmulpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmulpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vmulpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vmulpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vmulpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vmulpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vmulpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vmulss_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1049) }
 inst_vmulss_xmm_xmm_m32             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1049) }
-emit_vmulss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmulss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vmulss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vmulss_xmm_xmm_m32(dst, src, src2)) }
+emit_vmulss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmulss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmulss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vmulss_xmm_xmm_m32(dst, src, src2)) }
 inst_vmulsd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1050) }
 inst_vmulsd_xmm_xmm_m64             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMULSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1050) }
-emit_vmulsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmulsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vmulsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vmulsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vmulsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmulsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmulsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vmulsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vdivps_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1051) }
 inst_vdivps_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1051) }
 inst_vdivps_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1052) }
 inst_vdivps_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1052) }
-emit_vdivps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vdivps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vdivps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vdivps_xmm_xmm_m128(dst, src, src2)) }
-emit_vdivps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vdivps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vdivps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vdivps_ymm_ymm_m256(dst, src, src2)) }
+emit_vdivps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vdivps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vdivps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vdivps_xmm_xmm_m128(dst, src, src2)) }
+emit_vdivps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vdivps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vdivps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vdivps_ymm_ymm_m256(dst, src, src2)) }
 inst_vdivpd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1053) }
 inst_vdivpd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1053) }
 inst_vdivpd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1054) }
 inst_vdivpd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1054) }
-emit_vdivpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vdivpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vdivpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vdivpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vdivpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vdivpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vdivpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vdivpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vdivpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vdivpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vdivpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vdivpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vdivpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vdivpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vdivpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vdivpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vdivss_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1055) }
 inst_vdivss_xmm_xmm_m32             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1055) }
-emit_vdivss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vdivss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vdivss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vdivss_xmm_xmm_m32(dst, src, src2)) }
+emit_vdivss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vdivss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vdivss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vdivss_xmm_xmm_m32(dst, src, src2)) }
 inst_vdivsd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1056) }
 inst_vdivsd_xmm_xmm_m64             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VDIVSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1056) }
-emit_vdivsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vdivsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vdivsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vdivsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vdivsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vdivsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vdivsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vdivsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vsqrtps_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1057) }
 inst_vsqrtps_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1057) }
 inst_vsqrtps_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1058) }
 inst_vsqrtps_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTPS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1058) }
-emit_vsqrtps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vsqrtps_xmm_xmm(dst, src)) }
-emit_vsqrtps_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vsqrtps_xmm_m128(dst, src)) }
-emit_vsqrtps_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vsqrtps_ymm_ymm(dst, src)) }
-emit_vsqrtps_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vsqrtps_ymm_m256(dst, src)) }
+emit_vsqrtps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vsqrtps_xmm_xmm(dst, src)) }
+emit_vsqrtps_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vsqrtps_xmm_m128(dst, src)) }
+emit_vsqrtps_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vsqrtps_ymm_ymm(dst, src)) }
+emit_vsqrtps_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vsqrtps_ymm_m256(dst, src)) }
 inst_vsqrtpd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1059) }
 inst_vsqrtpd_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1059) }
 inst_vsqrtpd_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTPD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1060) }
 inst_vsqrtpd_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTPD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1060) }
-emit_vsqrtpd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vsqrtpd_xmm_xmm(dst, src)) }
-emit_vsqrtpd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vsqrtpd_xmm_m128(dst, src)) }
-emit_vsqrtpd_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vsqrtpd_ymm_ymm(dst, src)) }
-emit_vsqrtpd_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vsqrtpd_ymm_m256(dst, src)) }
+emit_vsqrtpd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vsqrtpd_xmm_xmm(dst, src)) }
+emit_vsqrtpd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vsqrtpd_xmm_m128(dst, src)) }
+emit_vsqrtpd_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vsqrtpd_ymm_ymm(dst, src)) }
+emit_vsqrtpd_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vsqrtpd_ymm_m256(dst, src)) }
 inst_vsqrtss_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1061) }
 inst_vsqrtss_xmm_xmm_m32            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1061) }
-emit_vsqrtss_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vsqrtss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vsqrtss_xmm_xmm_m32            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vsqrtss_xmm_xmm_m32(dst, src, src2)) }
+emit_vsqrtss_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vsqrtss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vsqrtss_xmm_xmm_m32            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vsqrtss_xmm_xmm_m32(dst, src, src2)) }
 inst_vsqrtsd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1062) }
 inst_vsqrtsd_xmm_xmm_m64            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VSQRTSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1062) }
-emit_vsqrtsd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vsqrtsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vsqrtsd_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vsqrtsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vsqrtsd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vsqrtsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vsqrtsd_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vsqrtsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vrcpps_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCPPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1063) }
 inst_vrcpps_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCPPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1063) }
 inst_vrcpps_ymm_ymm                 :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCPPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1064) }
 inst_vrcpps_ymm_m256                :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCPPS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1064) }
-emit_vrcpps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vrcpps_xmm_xmm(dst, src)) }
-emit_vrcpps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vrcpps_xmm_m128(dst, src)) }
-emit_vrcpps_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vrcpps_ymm_ymm(dst, src)) }
-emit_vrcpps_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vrcpps_ymm_m256(dst, src)) }
+emit_vrcpps_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vrcpps_xmm_xmm(dst, src)) }
+emit_vrcpps_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vrcpps_xmm_m128(dst, src)) }
+emit_vrcpps_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vrcpps_ymm_ymm(dst, src)) }
+emit_vrcpps_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vrcpps_ymm_m256(dst, src)) }
 inst_vrcpss_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCPSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1065) }
 inst_vrcpss_xmm_xmm_m32             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCPSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1065) }
-emit_vrcpss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vrcpss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vrcpss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vrcpss_xmm_xmm_m32(dst, src, src2)) }
+emit_vrcpss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vrcpss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vrcpss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vrcpss_xmm_xmm_m32(dst, src, src2)) }
 inst_vrsqrtps_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRTPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1066) }
 inst_vrsqrtps_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRTPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1066) }
 inst_vrsqrtps_ymm_ymm               :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRTPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1067) }
 inst_vrsqrtps_ymm_m256              :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRTPS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1067) }
-emit_vrsqrtps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vrsqrtps_xmm_xmm(dst, src)) }
-emit_vrsqrtps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vrsqrtps_xmm_m128(dst, src)) }
-emit_vrsqrtps_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vrsqrtps_ymm_ymm(dst, src)) }
-emit_vrsqrtps_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vrsqrtps_ymm_m256(dst, src)) }
+emit_vrsqrtps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vrsqrtps_xmm_xmm(dst, src)) }
+emit_vrsqrtps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vrsqrtps_xmm_m128(dst, src)) }
+emit_vrsqrtps_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vrsqrtps_ymm_ymm(dst, src)) }
+emit_vrsqrtps_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vrsqrtps_ymm_m256(dst, src)) }
 inst_vrsqrtss_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRTSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1068) }
 inst_vrsqrtss_xmm_xmm_m32           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRTSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1068) }
-emit_vrsqrtss_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vrsqrtss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vrsqrtss_xmm_xmm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vrsqrtss_xmm_xmm_m32(dst, src, src2)) }
+emit_vrsqrtss_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vrsqrtss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vrsqrtss_xmm_xmm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vrsqrtss_xmm_xmm_m32(dst, src, src2)) }
 inst_vmaxps_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1069) }
 inst_vmaxps_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1069) }
 inst_vmaxps_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1070) }
 inst_vmaxps_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1070) }
-emit_vmaxps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmaxps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vmaxps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vmaxps_xmm_xmm_m128(dst, src, src2)) }
-emit_vmaxps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vmaxps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vmaxps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vmaxps_ymm_ymm_m256(dst, src, src2)) }
+emit_vmaxps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmaxps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmaxps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vmaxps_xmm_xmm_m128(dst, src, src2)) }
+emit_vmaxps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vmaxps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vmaxps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vmaxps_ymm_ymm_m256(dst, src, src2)) }
 inst_vmaxpd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1071) }
 inst_vmaxpd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1071) }
 inst_vmaxpd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1072) }
 inst_vmaxpd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1072) }
-emit_vmaxpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmaxpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vmaxpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vmaxpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vmaxpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vmaxpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vmaxpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vmaxpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vmaxpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmaxpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmaxpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vmaxpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vmaxpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vmaxpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vmaxpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vmaxpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vmaxss_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1073) }
 inst_vmaxss_xmm_xmm_m32             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1073) }
-emit_vmaxss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmaxss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vmaxss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vmaxss_xmm_xmm_m32(dst, src, src2)) }
+emit_vmaxss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmaxss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmaxss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vmaxss_xmm_xmm_m32(dst, src, src2)) }
 inst_vmaxsd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1074) }
 inst_vmaxsd_xmm_xmm_m64             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMAXSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1074) }
-emit_vmaxsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmaxsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vmaxsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vmaxsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vmaxsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmaxsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmaxsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vmaxsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vminps_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1075) }
 inst_vminps_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1075) }
 inst_vminps_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1076) }
 inst_vminps_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1076) }
-emit_vminps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vminps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vminps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vminps_xmm_xmm_m128(dst, src, src2)) }
-emit_vminps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vminps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vminps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vminps_ymm_ymm_m256(dst, src, src2)) }
+emit_vminps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vminps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vminps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vminps_xmm_xmm_m128(dst, src, src2)) }
+emit_vminps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vminps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vminps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vminps_ymm_ymm_m256(dst, src, src2)) }
 inst_vminpd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1077) }
 inst_vminpd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1077) }
 inst_vminpd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1078) }
 inst_vminpd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1078) }
-emit_vminpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vminpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vminpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vminpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vminpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vminpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vminpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vminpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vminpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vminpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vminpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vminpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vminpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vminpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vminpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vminpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vminss_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1079) }
 inst_vminss_xmm_xmm_m32             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1079) }
-emit_vminss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vminss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vminss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vminss_xmm_xmm_m32(dst, src, src2)) }
+emit_vminss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vminss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vminss_xmm_xmm_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vminss_xmm_xmm_m32(dst, src, src2)) }
 inst_vminsd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1080) }
 inst_vminsd_xmm_xmm_m64             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMINSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1080) }
-emit_vminsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vminsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vminsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vminsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vminsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vminsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vminsd_xmm_xmm_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vminsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vandps_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1081) }
 inst_vandps_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1081) }
 inst_vandps_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1082) }
 inst_vandps_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1082) }
-emit_vandps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vandps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vandps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vandps_xmm_xmm_m128(dst, src, src2)) }
-emit_vandps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vandps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vandps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vandps_ymm_ymm_m256(dst, src, src2)) }
+emit_vandps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vandps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vandps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vandps_xmm_xmm_m128(dst, src, src2)) }
+emit_vandps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vandps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vandps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vandps_ymm_ymm_m256(dst, src, src2)) }
 inst_vandpd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1083) }
 inst_vandpd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1083) }
 inst_vandpd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1084) }
 inst_vandpd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1084) }
-emit_vandpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vandpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vandpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vandpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vandpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vandpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vandpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vandpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vandpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vandpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vandpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vandpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vandpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vandpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vandpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vandpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vandnps_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDNPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1085) }
 inst_vandnps_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDNPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1085) }
 inst_vandnps_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDNPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1086) }
 inst_vandnps_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDNPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1086) }
-emit_vandnps_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vandnps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vandnps_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vandnps_xmm_xmm_m128(dst, src, src2)) }
-emit_vandnps_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vandnps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vandnps_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vandnps_ymm_ymm_m256(dst, src, src2)) }
+emit_vandnps_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vandnps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vandnps_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vandnps_xmm_xmm_m128(dst, src, src2)) }
+emit_vandnps_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vandnps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vandnps_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vandnps_ymm_ymm_m256(dst, src, src2)) }
 inst_vandnpd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDNPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1087) }
 inst_vandnpd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDNPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1087) }
 inst_vandnpd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDNPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1088) }
 inst_vandnpd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VANDNPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1088) }
-emit_vandnpd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vandnpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vandnpd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vandnpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vandnpd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vandnpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vandnpd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vandnpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vandnpd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vandnpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vandnpd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vandnpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vandnpd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vandnpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vandnpd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vandnpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vorps_xmm_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VORPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1089) }
 inst_vorps_xmm_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VORPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1089) }
 inst_vorps_ymm_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VORPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1090) }
 inst_vorps_ymm_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VORPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1090) }
-emit_vorps_xmm_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vorps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vorps_xmm_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vorps_xmm_xmm_m128(dst, src, src2)) }
-emit_vorps_ymm_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vorps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vorps_ymm_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vorps_ymm_ymm_m256(dst, src, src2)) }
+emit_vorps_xmm_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vorps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vorps_xmm_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vorps_xmm_xmm_m128(dst, src, src2)) }
+emit_vorps_ymm_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vorps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vorps_ymm_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vorps_ymm_ymm_m256(dst, src, src2)) }
 inst_vorpd_xmm_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VORPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1091) }
 inst_vorpd_xmm_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VORPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1091) }
 inst_vorpd_ymm_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VORPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1092) }
 inst_vorpd_ymm_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VORPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1092) }
-emit_vorpd_xmm_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vorpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vorpd_xmm_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vorpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vorpd_ymm_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vorpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vorpd_ymm_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vorpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vorpd_xmm_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vorpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vorpd_xmm_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vorpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vorpd_ymm_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vorpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vorpd_ymm_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vorpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vxorps_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VXORPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1093) }
 inst_vxorps_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VXORPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1093) }
 inst_vxorps_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VXORPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1094) }
 inst_vxorps_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VXORPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1094) }
-emit_vxorps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vxorps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vxorps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vxorps_xmm_xmm_m128(dst, src, src2)) }
-emit_vxorps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vxorps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vxorps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vxorps_ymm_ymm_m256(dst, src, src2)) }
+emit_vxorps_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vxorps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vxorps_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vxorps_xmm_xmm_m128(dst, src, src2)) }
+emit_vxorps_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vxorps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vxorps_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vxorps_ymm_ymm_m256(dst, src, src2)) }
 inst_vxorpd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VXORPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1095) }
 inst_vxorpd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VXORPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1095) }
 inst_vxorpd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VXORPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1096) }
 inst_vxorpd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VXORPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1096) }
-emit_vxorpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vxorpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vxorpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vxorpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vxorpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vxorpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vxorpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vxorpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vxorpd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vxorpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vxorpd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vxorpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vxorpd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vxorpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vxorpd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vxorpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vcmpps_xmm_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1097) }
 inst_vcmpps_xmm_xmm_m128_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1097) }
 inst_vcmpps_ymm_ymm_ymm_imm8        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1098) }
 inst_vcmpps_ymm_ymm_m256_imm8       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1098) }
-emit_vcmpps_xmm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vcmpps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vcmpps_xmm_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vcmpps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vcmpps_ymm_ymm_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vcmpps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vcmpps_ymm_ymm_m256_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vcmpps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vcmpps_xmm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vcmpps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vcmpps_xmm_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vcmpps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vcmpps_ymm_ymm_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vcmpps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vcmpps_ymm_ymm_m256_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vcmpps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vcmppd_xmm_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1099) }
 inst_vcmppd_xmm_xmm_m128_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1099) }
 inst_vcmppd_ymm_ymm_ymm_imm8        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1100) }
 inst_vcmppd_ymm_ymm_m256_imm8       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1100) }
-emit_vcmppd_xmm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vcmppd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vcmppd_xmm_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vcmppd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vcmppd_ymm_ymm_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vcmppd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vcmppd_ymm_ymm_m256_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vcmppd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vcmppd_xmm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vcmppd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vcmppd_xmm_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vcmppd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vcmppd_ymm_ymm_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vcmppd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vcmppd_ymm_ymm_m256_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vcmppd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vcmpss_xmm_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPSS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1101) }
 inst_vcmpss_xmm_xmm_m32_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPSS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 1101) }
-emit_vcmpss_xmm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vcmpss_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vcmpss_xmm_xmm_m32_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vcmpss_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vcmpss_xmm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vcmpss_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vcmpss_xmm_xmm_m32_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vcmpss_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vcmpsd_xmm_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPSD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1102) }
 inst_vcmpsd_xmm_xmm_m64_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCMPSD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), op_imm8(imm)} }, 1102) }
-emit_vcmpsd_xmm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vcmpsd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vcmpsd_xmm_xmm_m64_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append(instructions, inst_vcmpsd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
+emit_vcmpsd_xmm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vcmpsd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vcmpsd_xmm_xmm_m64_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append_elem(instructions, inst_vcmpsd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
 inst_vcomiss_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMISS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1103) }
 inst_vcomiss_xmm_m32                :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMISS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1103) }
-emit_vcomiss_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcomiss_xmm_xmm(dst, src)) }
-emit_vcomiss_xmm_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vcomiss_xmm_m32(dst, src)) }
+emit_vcomiss_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcomiss_xmm_xmm(dst, src)) }
+emit_vcomiss_xmm_m32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vcomiss_xmm_m32(dst, src)) }
 inst_vcomisd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMISD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1104) }
 inst_vcomisd_xmm_m64                :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMISD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1104) }
-emit_vcomisd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcomisd_xmm_xmm(dst, src)) }
-emit_vcomisd_xmm_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vcomisd_xmm_m64(dst, src)) }
+emit_vcomisd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcomisd_xmm_xmm(dst, src)) }
+emit_vcomisd_xmm_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vcomisd_xmm_m64(dst, src)) }
 inst_vucomiss_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUCOMISS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1105) }
 inst_vucomiss_xmm_m32               :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VUCOMISS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1105) }
-emit_vucomiss_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vucomiss_xmm_xmm(dst, src)) }
-emit_vucomiss_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vucomiss_xmm_m32(dst, src)) }
+emit_vucomiss_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vucomiss_xmm_xmm(dst, src)) }
+emit_vucomiss_xmm_m32               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vucomiss_xmm_m32(dst, src)) }
 inst_vucomisd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUCOMISD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1106) }
 inst_vucomisd_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VUCOMISD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1106) }
-emit_vucomisd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vucomisd_xmm_xmm(dst, src)) }
-emit_vucomisd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vucomisd_xmm_m64(dst, src)) }
+emit_vucomisd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vucomisd_xmm_xmm(dst, src)) }
+emit_vucomisd_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vucomisd_xmm_m64(dst, src)) }
 inst_vshufps_xmm_xmm_xmm_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VSHUFPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1107) }
 inst_vshufps_xmm_xmm_m128_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VSHUFPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1107) }
 inst_vshufps_ymm_ymm_ymm_imm8       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VSHUFPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1108) }
 inst_vshufps_ymm_ymm_m256_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VSHUFPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1108) }
-emit_vshufps_xmm_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vshufps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vshufps_xmm_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vshufps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vshufps_ymm_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vshufps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vshufps_ymm_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vshufps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vshufps_xmm_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vshufps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vshufps_xmm_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vshufps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vshufps_ymm_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vshufps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vshufps_ymm_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vshufps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vshufpd_xmm_xmm_xmm_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VSHUFPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1109) }
 inst_vshufpd_xmm_xmm_m128_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VSHUFPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1109) }
 inst_vshufpd_ymm_ymm_ymm_imm8       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VSHUFPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1110) }
 inst_vshufpd_ymm_ymm_m256_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VSHUFPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1110) }
-emit_vshufpd_xmm_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vshufpd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vshufpd_xmm_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vshufpd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vshufpd_ymm_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vshufpd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vshufpd_ymm_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vshufpd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vshufpd_xmm_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vshufpd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vshufpd_xmm_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vshufpd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vshufpd_ymm_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vshufpd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vshufpd_ymm_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vshufpd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vunpcklps_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKLPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1111) }
 inst_vunpcklps_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKLPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1111) }
 inst_vunpcklps_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKLPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1112) }
 inst_vunpcklps_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKLPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1112) }
-emit_vunpcklps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vunpcklps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vunpcklps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vunpcklps_xmm_xmm_m128(dst, src, src2)) }
-emit_vunpcklps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vunpcklps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vunpcklps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vunpcklps_ymm_ymm_m256(dst, src, src2)) }
+emit_vunpcklps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vunpcklps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vunpcklps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vunpcklps_xmm_xmm_m128(dst, src, src2)) }
+emit_vunpcklps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vunpcklps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vunpcklps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vunpcklps_ymm_ymm_m256(dst, src, src2)) }
 inst_vunpckhps_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKHPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1113) }
 inst_vunpckhps_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKHPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1113) }
 inst_vunpckhps_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKHPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1114) }
 inst_vunpckhps_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKHPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1114) }
-emit_vunpckhps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vunpckhps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vunpckhps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vunpckhps_xmm_xmm_m128(dst, src, src2)) }
-emit_vunpckhps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vunpckhps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vunpckhps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vunpckhps_ymm_ymm_m256(dst, src, src2)) }
+emit_vunpckhps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vunpckhps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vunpckhps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vunpckhps_xmm_xmm_m128(dst, src, src2)) }
+emit_vunpckhps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vunpckhps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vunpckhps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vunpckhps_ymm_ymm_m256(dst, src, src2)) }
 inst_vunpcklpd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKLPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1115) }
 inst_vunpcklpd_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKLPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1115) }
 inst_vunpcklpd_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKLPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1116) }
 inst_vunpcklpd_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKLPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1116) }
-emit_vunpcklpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vunpcklpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vunpcklpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vunpcklpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vunpcklpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vunpcklpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vunpcklpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vunpcklpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vunpcklpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vunpcklpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vunpcklpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vunpcklpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vunpcklpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vunpcklpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vunpcklpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vunpcklpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vunpckhpd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKHPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1117) }
 inst_vunpckhpd_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKHPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1117) }
 inst_vunpckhpd_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKHPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1118) }
 inst_vunpckhpd_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VUNPCKHPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1118) }
-emit_vunpckhpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vunpckhpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vunpckhpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vunpckhpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vunpckhpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vunpckhpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vunpckhpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vunpckhpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vunpckhpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vunpckhpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vunpckhpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vunpckhpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vunpckhpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vunpckhpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vunpckhpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vunpckhpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vblendps_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1119) }
 inst_vblendps_xmm_xmm_m128_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1119) }
 inst_vblendps_ymm_ymm_ymm_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1120) }
 inst_vblendps_ymm_ymm_m256_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1120) }
-emit_vblendps_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vblendps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vblendps_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vblendps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vblendps_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vblendps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vblendps_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vblendps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vblendps_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vblendps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vblendps_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vblendps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vblendps_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vblendps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vblendps_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vblendps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vblendpd_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1121) }
 inst_vblendpd_xmm_xmm_m128_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1121) }
 inst_vblendpd_ymm_ymm_ymm_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1122) }
 inst_vblendpd_ymm_ymm_m256_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1122) }
-emit_vblendpd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vblendpd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vblendpd_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vblendpd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vblendpd_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vblendpd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vblendpd_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vblendpd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vblendpd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vblendpd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vblendpd_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vblendpd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vblendpd_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vblendpd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vblendpd_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vblendpd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vblendvps_xmm_xmm_xmm_xmm      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, src3: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDVPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_xmm(src3)} }, 1123) }
 inst_vblendvps_xmm_xmm_m128_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, src3: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDVPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_xmm(src3)} }, 1123) }
 inst_vblendvps_ymm_ymm_ymm_ymm      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, src3: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDVPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_ymm(src3)} }, 1124) }
 inst_vblendvps_ymm_ymm_m256_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, src3: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDVPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_ymm(src3)} }, 1124) }
-emit_vblendvps_xmm_xmm_xmm_xmm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, src3: XMM) { append(instructions, inst_vblendvps_xmm_xmm_xmm_xmm(dst, src, src2, src3)) }
-emit_vblendvps_xmm_xmm_m128_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, src3: XMM) { append(instructions, inst_vblendvps_xmm_xmm_m128_xmm(dst, src, src2, src3)) }
-emit_vblendvps_ymm_ymm_ymm_ymm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, src3: YMM) { append(instructions, inst_vblendvps_ymm_ymm_ymm_ymm(dst, src, src2, src3)) }
-emit_vblendvps_ymm_ymm_m256_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, src3: YMM) { append(instructions, inst_vblendvps_ymm_ymm_m256_ymm(dst, src, src2, src3)) }
+emit_vblendvps_xmm_xmm_xmm_xmm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, src3: XMM) { append_elem(instructions, inst_vblendvps_xmm_xmm_xmm_xmm(dst, src, src2, src3)) }
+emit_vblendvps_xmm_xmm_m128_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, src3: XMM) { append_elem(instructions, inst_vblendvps_xmm_xmm_m128_xmm(dst, src, src2, src3)) }
+emit_vblendvps_ymm_ymm_ymm_ymm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, src3: YMM) { append_elem(instructions, inst_vblendvps_ymm_ymm_ymm_ymm(dst, src, src2, src3)) }
+emit_vblendvps_ymm_ymm_m256_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, src3: YMM) { append_elem(instructions, inst_vblendvps_ymm_ymm_m256_ymm(dst, src, src2, src3)) }
 inst_vblendvpd_xmm_xmm_xmm_xmm      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, src3: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDVPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_xmm(src3)} }, 1125) }
 inst_vblendvpd_xmm_xmm_m128_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, src3: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDVPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_xmm(src3)} }, 1125) }
 inst_vblendvpd_ymm_ymm_ymm_ymm      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, src3: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDVPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_ymm(src3)} }, 1126) }
 inst_vblendvpd_ymm_ymm_m256_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, src3: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDVPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_ymm(src3)} }, 1126) }
-emit_vblendvpd_xmm_xmm_xmm_xmm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, src3: XMM) { append(instructions, inst_vblendvpd_xmm_xmm_xmm_xmm(dst, src, src2, src3)) }
-emit_vblendvpd_xmm_xmm_m128_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, src3: XMM) { append(instructions, inst_vblendvpd_xmm_xmm_m128_xmm(dst, src, src2, src3)) }
-emit_vblendvpd_ymm_ymm_ymm_ymm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, src3: YMM) { append(instructions, inst_vblendvpd_ymm_ymm_ymm_ymm(dst, src, src2, src3)) }
-emit_vblendvpd_ymm_ymm_m256_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, src3: YMM) { append(instructions, inst_vblendvpd_ymm_ymm_m256_ymm(dst, src, src2, src3)) }
+emit_vblendvpd_xmm_xmm_xmm_xmm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, src3: XMM) { append_elem(instructions, inst_vblendvpd_xmm_xmm_xmm_xmm(dst, src, src2, src3)) }
+emit_vblendvpd_xmm_xmm_m128_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, src3: XMM) { append_elem(instructions, inst_vblendvpd_xmm_xmm_m128_xmm(dst, src, src2, src3)) }
+emit_vblendvpd_ymm_ymm_ymm_ymm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, src3: YMM) { append_elem(instructions, inst_vblendvpd_ymm_ymm_ymm_ymm(dst, src, src2, src3)) }
+emit_vblendvpd_ymm_ymm_m256_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, src3: YMM) { append_elem(instructions, inst_vblendvpd_ymm_ymm_m256_ymm(dst, src, src2, src3)) }
 inst_vdpps_xmm_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDPPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1127) }
 inst_vdpps_xmm_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDPPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1127) }
 inst_vdpps_ymm_ymm_ymm_imm8         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDPPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1128) }
 inst_vdpps_ymm_ymm_m256_imm8        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDPPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1128) }
-emit_vdpps_xmm_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vdpps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vdpps_xmm_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vdpps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vdpps_ymm_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vdpps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vdpps_ymm_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vdpps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vdpps_xmm_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vdpps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vdpps_xmm_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vdpps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vdpps_ymm_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vdpps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vdpps_ymm_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vdpps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vdppd_xmm_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDPPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1129) }
 inst_vdppd_xmm_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDPPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1129) }
-emit_vdppd_xmm_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vdppd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vdppd_xmm_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vdppd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vdppd_xmm_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vdppd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vdppd_xmm_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vdppd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
 inst_vroundps_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1130) }
 inst_vroundps_xmm_m128_imm8         :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1130) }
 inst_vroundps_ymm_ymm_imm8          :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1131) }
 inst_vroundps_ymm_m256_imm8         :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDPS, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1131) }
-emit_vroundps_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vroundps_xmm_xmm_imm8(dst, src, imm)) }
-emit_vroundps_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vroundps_xmm_m128_imm8(dst, src, imm)) }
-emit_vroundps_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vroundps_ymm_ymm_imm8(dst, src, imm)) }
-emit_vroundps_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vroundps_ymm_m256_imm8(dst, src, imm)) }
+emit_vroundps_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vroundps_xmm_xmm_imm8(dst, src, imm)) }
+emit_vroundps_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vroundps_xmm_m128_imm8(dst, src, imm)) }
+emit_vroundps_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vroundps_ymm_ymm_imm8(dst, src, imm)) }
+emit_vroundps_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vroundps_ymm_m256_imm8(dst, src, imm)) }
 inst_vroundpd_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1132) }
 inst_vroundpd_xmm_m128_imm8         :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1132) }
 inst_vroundpd_ymm_ymm_imm8          :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1133) }
 inst_vroundpd_ymm_m256_imm8         :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDPD, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1133) }
-emit_vroundpd_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vroundpd_xmm_xmm_imm8(dst, src, imm)) }
-emit_vroundpd_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vroundpd_xmm_m128_imm8(dst, src, imm)) }
-emit_vroundpd_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vroundpd_ymm_ymm_imm8(dst, src, imm)) }
-emit_vroundpd_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vroundpd_ymm_m256_imm8(dst, src, imm)) }
+emit_vroundpd_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vroundpd_xmm_xmm_imm8(dst, src, imm)) }
+emit_vroundpd_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vroundpd_xmm_m128_imm8(dst, src, imm)) }
+emit_vroundpd_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vroundpd_ymm_ymm_imm8(dst, src, imm)) }
+emit_vroundpd_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vroundpd_ymm_m256_imm8(dst, src, imm)) }
 inst_vroundss_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDSS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1134) }
 inst_vroundss_xmm_xmm_m32_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDSS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 1134) }
-emit_vroundss_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vroundss_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vroundss_xmm_xmm_m32_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vroundss_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vroundss_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vroundss_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vroundss_xmm_xmm_m32_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vroundss_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vroundsd_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDSD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1135) }
 inst_vroundsd_xmm_xmm_m64_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VROUNDSD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), op_imm8(imm)} }, 1135) }
-emit_vroundsd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vroundsd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vroundsd_xmm_xmm_m64_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append(instructions, inst_vroundsd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
+emit_vroundsd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vroundsd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vroundsd_xmm_xmm_m64_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append_elem(instructions, inst_vroundsd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
 inst_vextractps_r32_xmm_imm8        :: #force_inline proc "contextless" (dst: GPR32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXTRACTPS, operand_count = 3, ops = {op_gpr32(dst), op_xmm(src), op_imm8(imm), {}} }, 1136) }
 inst_vextractps_m32_xmm_imm8        :: #force_inline proc "contextless" (dst: Mem32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXTRACTPS, operand_count = 3, ops = {op_mem(dst.mem, 4), op_xmm(src), op_imm8(imm), {}} }, 1136) }
-emit_vextractps_r32_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append(instructions, inst_vextractps_r32_xmm_imm8(dst, src, imm)) }
-emit_vextractps_m32_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM, imm: i8) { append(instructions, inst_vextractps_m32_xmm_imm8(dst, src, imm)) }
+emit_vextractps_r32_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append_elem(instructions, inst_vextractps_r32_xmm_imm8(dst, src, imm)) }
+emit_vextractps_m32_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM, imm: i8) { append_elem(instructions, inst_vextractps_m32_xmm_imm8(dst, src, imm)) }
 inst_vinsertps_xmm_xmm_xmm_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VINSERTPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1137) }
 inst_vinsertps_xmm_xmm_m32_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VINSERTPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 1137) }
-emit_vinsertps_xmm_xmm_xmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vinsertps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vinsertps_xmm_xmm_m32_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vinsertps_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vinsertps_xmm_xmm_xmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vinsertps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vinsertps_xmm_xmm_m32_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vinsertps_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vmovaps_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1138) }
 inst_vmovaps_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1138) }
 inst_vmovaps_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPS, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1139) }
 inst_vmovaps_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1140) }
 inst_vmovaps_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1140) }
 inst_vmovaps_m256_ymm               :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPS, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1141) }
-emit_vmovaps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovaps_xmm_xmm(dst, src)) }
-emit_vmovaps_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovaps_xmm_m128(dst, src)) }
-emit_vmovaps_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovaps_m128_xmm(dst, src)) }
-emit_vmovaps_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovaps_ymm_ymm(dst, src)) }
-emit_vmovaps_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovaps_ymm_m256(dst, src)) }
-emit_vmovaps_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovaps_m256_ymm(dst, src)) }
+emit_vmovaps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovaps_xmm_xmm(dst, src)) }
+emit_vmovaps_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovaps_xmm_m128(dst, src)) }
+emit_vmovaps_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovaps_m128_xmm(dst, src)) }
+emit_vmovaps_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovaps_ymm_ymm(dst, src)) }
+emit_vmovaps_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovaps_ymm_m256(dst, src)) }
+emit_vmovaps_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovaps_m256_ymm(dst, src)) }
 inst_vmovups_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1142) }
 inst_vmovups_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1142) }
 inst_vmovups_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPS, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1143) }
 inst_vmovups_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1144) }
 inst_vmovups_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1144) }
 inst_vmovups_m256_ymm               :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPS, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1145) }
-emit_vmovups_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovups_xmm_xmm(dst, src)) }
-emit_vmovups_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovups_xmm_m128(dst, src)) }
-emit_vmovups_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovups_m128_xmm(dst, src)) }
-emit_vmovups_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovups_ymm_ymm(dst, src)) }
-emit_vmovups_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovups_ymm_m256(dst, src)) }
-emit_vmovups_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovups_m256_ymm(dst, src)) }
+emit_vmovups_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovups_xmm_xmm(dst, src)) }
+emit_vmovups_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovups_xmm_m128(dst, src)) }
+emit_vmovups_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovups_m128_xmm(dst, src)) }
+emit_vmovups_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovups_ymm_ymm(dst, src)) }
+emit_vmovups_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovups_ymm_m256(dst, src)) }
+emit_vmovups_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovups_m256_ymm(dst, src)) }
 inst_vmovapd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1146) }
 inst_vmovapd_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1146) }
 inst_vmovapd_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1147) }
 inst_vmovapd_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1148) }
 inst_vmovapd_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1148) }
 inst_vmovapd_m256_ymm               :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVAPD, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1149) }
-emit_vmovapd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovapd_xmm_xmm(dst, src)) }
-emit_vmovapd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovapd_xmm_m128(dst, src)) }
-emit_vmovapd_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovapd_m128_xmm(dst, src)) }
-emit_vmovapd_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovapd_ymm_ymm(dst, src)) }
-emit_vmovapd_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovapd_ymm_m256(dst, src)) }
-emit_vmovapd_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovapd_m256_ymm(dst, src)) }
+emit_vmovapd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovapd_xmm_xmm(dst, src)) }
+emit_vmovapd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovapd_xmm_m128(dst, src)) }
+emit_vmovapd_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovapd_m128_xmm(dst, src)) }
+emit_vmovapd_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovapd_ymm_ymm(dst, src)) }
+emit_vmovapd_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovapd_ymm_m256(dst, src)) }
+emit_vmovapd_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovapd_m256_ymm(dst, src)) }
 inst_vmovupd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1150) }
 inst_vmovupd_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1150) }
 inst_vmovupd_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1151) }
 inst_vmovupd_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1152) }
 inst_vmovupd_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1152) }
 inst_vmovupd_m256_ymm               :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVUPD, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1153) }
-emit_vmovupd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovupd_xmm_xmm(dst, src)) }
-emit_vmovupd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovupd_xmm_m128(dst, src)) }
-emit_vmovupd_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovupd_m128_xmm(dst, src)) }
-emit_vmovupd_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovupd_ymm_ymm(dst, src)) }
-emit_vmovupd_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovupd_ymm_m256(dst, src)) }
-emit_vmovupd_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovupd_m256_ymm(dst, src)) }
+emit_vmovupd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovupd_xmm_xmm(dst, src)) }
+emit_vmovupd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovupd_xmm_m128(dst, src)) }
+emit_vmovupd_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovupd_m128_xmm(dst, src)) }
+emit_vmovupd_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovupd_ymm_ymm(dst, src)) }
+emit_vmovupd_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovupd_ymm_m256(dst, src)) }
+emit_vmovupd_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovupd_m256_ymm(dst, src)) }
 inst_vmovss_xmm_m32                 :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1154) }
 inst_vmovss_m32_xmm                 :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSS, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1155) }
 inst_vmovss_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1156) }
-emit_vmovss_xmm_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vmovss_xmm_m32(dst, src)) }
-emit_vmovss_m32_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vmovss_m32_xmm(dst, src)) }
-emit_vmovss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmovss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmovss_xmm_m32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vmovss_xmm_m32(dst, src)) }
+emit_vmovss_m32_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vmovss_m32_xmm(dst, src)) }
+emit_vmovss_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmovss_xmm_xmm_xmm(dst, src, src2)) }
 inst_vmovsd_xmm_m64                 :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1157) }
 inst_vmovsd_m64_xmm                 :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1158) }
 inst_vmovsd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1159) }
-emit_vmovsd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vmovsd_xmm_m64(dst, src)) }
-emit_vmovsd_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vmovsd_m64_xmm(dst, src)) }
-emit_vmovsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmovsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmovsd_xmm_m64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vmovsd_xmm_m64(dst, src)) }
+emit_vmovsd_m64_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vmovsd_m64_xmm(dst, src)) }
+emit_vmovsd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmovsd_xmm_xmm_xmm(dst, src, src2)) }
 inst_vmovdqa_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1160) }
 inst_vmovdqa_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1160) }
 inst_vmovdqa_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1161) }
 inst_vmovdqa_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1162) }
 inst_vmovdqa_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1162) }
 inst_vmovdqa_m256_ymm               :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1163) }
-emit_vmovdqa_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovdqa_xmm_xmm(dst, src)) }
-emit_vmovdqa_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovdqa_xmm_m128(dst, src)) }
-emit_vmovdqa_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovdqa_m128_xmm(dst, src)) }
-emit_vmovdqa_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovdqa_ymm_ymm(dst, src)) }
-emit_vmovdqa_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovdqa_ymm_m256(dst, src)) }
-emit_vmovdqa_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovdqa_m256_ymm(dst, src)) }
+emit_vmovdqa_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovdqa_xmm_xmm(dst, src)) }
+emit_vmovdqa_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovdqa_xmm_m128(dst, src)) }
+emit_vmovdqa_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovdqa_m128_xmm(dst, src)) }
+emit_vmovdqa_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovdqa_ymm_ymm(dst, src)) }
+emit_vmovdqa_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovdqa_ymm_m256(dst, src)) }
+emit_vmovdqa_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovdqa_m256_ymm(dst, src)) }
 inst_vmovdqu_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1164) }
 inst_vmovdqu_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1164) }
 inst_vmovdqu_m128_xmm               :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1165) }
 inst_vmovdqu_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1166) }
 inst_vmovdqu_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1166) }
 inst_vmovdqu_m256_ymm               :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1167) }
-emit_vmovdqu_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovdqu_xmm_xmm(dst, src)) }
-emit_vmovdqu_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovdqu_xmm_m128(dst, src)) }
-emit_vmovdqu_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovdqu_m128_xmm(dst, src)) }
-emit_vmovdqu_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovdqu_ymm_ymm(dst, src)) }
-emit_vmovdqu_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovdqu_ymm_m256(dst, src)) }
-emit_vmovdqu_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovdqu_m256_ymm(dst, src)) }
+emit_vmovdqu_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovdqu_xmm_xmm(dst, src)) }
+emit_vmovdqu_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovdqu_xmm_m128(dst, src)) }
+emit_vmovdqu_m128_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovdqu_m128_xmm(dst, src)) }
+emit_vmovdqu_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovdqu_ymm_ymm(dst, src)) }
+emit_vmovdqu_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovdqu_ymm_m256(dst, src)) }
+emit_vmovdqu_m256_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovdqu_m256_ymm(dst, src)) }
 inst_vmovq_xmm_xmm                  :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1168) }
 inst_vmovq_xmm_m64                  :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1168) }
 inst_vmovq_m64_xmm                  :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVQ, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1169) }
 inst_vmovq_xmm_r64                  :: #force_inline proc "contextless" (dst: XMM, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVQ, operand_count = 2, ops = {op_xmm(dst), op_gpr64(src), {}, {}} }, 1170) }
 inst_vmovq_r64_xmm                  :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVQ, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 1171) }
-emit_vmovq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovq_xmm_xmm(dst, src)) }
-emit_vmovq_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vmovq_xmm_m64(dst, src)) }
-emit_vmovq_m64_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vmovq_m64_xmm(dst, src)) }
-emit_vmovq_xmm_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64) { append(instructions, inst_vmovq_xmm_r64(dst, src)) }
-emit_vmovq_r64_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_vmovq_r64_xmm(dst, src)) }
+emit_vmovq_xmm_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovq_xmm_xmm(dst, src)) }
+emit_vmovq_xmm_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vmovq_xmm_m64(dst, src)) }
+emit_vmovq_m64_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vmovq_m64_xmm(dst, src)) }
+emit_vmovq_xmm_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR64) { append_elem(instructions, inst_vmovq_xmm_r64(dst, src)) }
+emit_vmovq_r64_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_vmovq_r64_xmm(dst, src)) }
 inst_vmovd_xmm_r32                  :: #force_inline proc "contextless" (dst: XMM, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVD, operand_count = 2, ops = {op_xmm(dst), op_gpr32(src), {}, {}} }, 1172) }
 inst_vmovd_xmm_m32                  :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1172) }
 inst_vmovd_r32_xmm                  :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVD, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 1173) }
 inst_vmovd_m32_xmm                  :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1173) }
-emit_vmovd_xmm_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32) { append(instructions, inst_vmovd_xmm_r32(dst, src)) }
-emit_vmovd_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vmovd_xmm_m32(dst, src)) }
-emit_vmovd_r32_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_vmovd_r32_xmm(dst, src)) }
-emit_vmovd_m32_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vmovd_m32_xmm(dst, src)) }
+emit_vmovd_xmm_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: GPR32) { append_elem(instructions, inst_vmovd_xmm_r32(dst, src)) }
+emit_vmovd_xmm_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vmovd_xmm_m32(dst, src)) }
+emit_vmovd_r32_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_vmovd_r32_xmm(dst, src)) }
+emit_vmovd_m32_xmm                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vmovd_m32_xmm(dst, src)) }
 inst_vmovlps_xmm_xmm_m64            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVLPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1174) }
 inst_vmovlps_m64_xmm                :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVLPS, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1175) }
-emit_vmovlps_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vmovlps_xmm_xmm_m64(dst, src, src2)) }
-emit_vmovlps_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vmovlps_m64_xmm(dst, src)) }
+emit_vmovlps_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vmovlps_xmm_xmm_m64(dst, src, src2)) }
+emit_vmovlps_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vmovlps_m64_xmm(dst, src)) }
 inst_vmovhps_xmm_xmm_m64            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVHPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1176) }
 inst_vmovhps_m64_xmm                :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVHPS, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1177) }
-emit_vmovhps_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vmovhps_xmm_xmm_m64(dst, src, src2)) }
-emit_vmovhps_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vmovhps_m64_xmm(dst, src)) }
+emit_vmovhps_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vmovhps_xmm_xmm_m64(dst, src, src2)) }
+emit_vmovhps_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vmovhps_m64_xmm(dst, src)) }
 inst_vmovlpd_xmm_xmm_m64            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVLPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1178) }
 inst_vmovlpd_m64_xmm                :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVLPD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1179) }
-emit_vmovlpd_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vmovlpd_xmm_xmm_m64(dst, src, src2)) }
-emit_vmovlpd_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vmovlpd_m64_xmm(dst, src)) }
+emit_vmovlpd_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vmovlpd_xmm_xmm_m64(dst, src, src2)) }
+emit_vmovlpd_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vmovlpd_m64_xmm(dst, src)) }
 inst_vmovhpd_xmm_xmm_m64            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVHPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1180) }
 inst_vmovhpd_m64_xmm                :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVHPD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1181) }
-emit_vmovhpd_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vmovhpd_xmm_xmm_m64(dst, src, src2)) }
-emit_vmovhpd_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vmovhpd_m64_xmm(dst, src)) }
+emit_vmovhpd_xmm_xmm_m64            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vmovhpd_xmm_xmm_m64(dst, src, src2)) }
+emit_vmovhpd_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vmovhpd_m64_xmm(dst, src)) }
 inst_vmovlhps_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVLHPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1182) }
-emit_vmovlhps_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmovlhps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmovlhps_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmovlhps_xmm_xmm_xmm(dst, src, src2)) }
 inst_vmovhlps_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVHLPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1183) }
-emit_vmovhlps_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vmovhlps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vmovhlps_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vmovhlps_xmm_xmm_xmm(dst, src, src2)) }
 inst_vmovmskps_r32_xmm              :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVMSKPS, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 1184) }
 inst_vmovmskps_r32_ymm              :: #force_inline proc "contextless" (dst: GPR32, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVMSKPS, operand_count = 2, ops = {op_gpr32(dst), op_ymm(src), {}, {}} }, 1185) }
-emit_vmovmskps_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_vmovmskps_r32_xmm(dst, src)) }
-emit_vmovmskps_r32_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: YMM) { append(instructions, inst_vmovmskps_r32_ymm(dst, src)) }
+emit_vmovmskps_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_vmovmskps_r32_xmm(dst, src)) }
+emit_vmovmskps_r32_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: YMM) { append_elem(instructions, inst_vmovmskps_r32_ymm(dst, src)) }
 inst_vmovmskpd_r32_xmm              :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVMSKPD, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 1186) }
 inst_vmovmskpd_r32_ymm              :: #force_inline proc "contextless" (dst: GPR32, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVMSKPD, operand_count = 2, ops = {op_gpr32(dst), op_ymm(src), {}, {}} }, 1187) }
-emit_vmovmskpd_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_vmovmskpd_r32_xmm(dst, src)) }
-emit_vmovmskpd_r32_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: YMM) { append(instructions, inst_vmovmskpd_r32_ymm(dst, src)) }
+emit_vmovmskpd_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_vmovmskpd_r32_xmm(dst, src)) }
+emit_vmovmskpd_r32_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: YMM) { append_elem(instructions, inst_vmovmskpd_r32_ymm(dst, src)) }
 inst_vmovntps_m128_xmm              :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTPS, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1188) }
 inst_vmovntps_m256_ymm              :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTPS, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1189) }
-emit_vmovntps_m128_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovntps_m128_xmm(dst, src)) }
-emit_vmovntps_m256_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovntps_m256_ymm(dst, src)) }
+emit_vmovntps_m128_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovntps_m128_xmm(dst, src)) }
+emit_vmovntps_m256_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovntps_m256_ymm(dst, src)) }
 inst_vmovntpd_m128_xmm              :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTPD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1190) }
 inst_vmovntpd_m256_ymm              :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTPD, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1191) }
-emit_vmovntpd_m128_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovntpd_m128_xmm(dst, src)) }
-emit_vmovntpd_m256_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovntpd_m256_ymm(dst, src)) }
+emit_vmovntpd_m128_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovntpd_m128_xmm(dst, src)) }
+emit_vmovntpd_m256_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovntpd_m256_ymm(dst, src)) }
 inst_vmovntdq_m128_xmm              :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTDQ, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1192) }
 inst_vmovntdq_m256_ymm              :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTDQ, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1193) }
 inst_vmovntdq_m512_zmm              :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTDQ, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1194) }
-emit_vmovntdq_m128_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovntdq_m128_xmm(dst, src)) }
-emit_vmovntdq_m256_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovntdq_m256_ymm(dst, src)) }
-emit_vmovntdq_m512_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vmovntdq_m512_zmm(dst, src)) }
+emit_vmovntdq_m128_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovntdq_m128_xmm(dst, src)) }
+emit_vmovntdq_m256_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovntdq_m256_ymm(dst, src)) }
+emit_vmovntdq_m512_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vmovntdq_m512_zmm(dst, src)) }
 inst_vmovntdqa_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTDQA, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1195) }
 inst_vmovntdqa_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTDQA, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1196) }
 inst_vmovntdqa_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVNTDQA, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1197) }
-emit_vmovntdqa_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovntdqa_xmm_m128(dst, src)) }
-emit_vmovntdqa_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovntdqa_ymm_m256(dst, src)) }
-emit_vmovntdqa_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vmovntdqa_zmm_m512(dst, src)) }
+emit_vmovntdqa_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovntdqa_xmm_m128(dst, src)) }
+emit_vmovntdqa_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovntdqa_ymm_m256(dst, src)) }
+emit_vmovntdqa_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vmovntdqa_zmm_m512(dst, src)) }
 inst_vaddsubps_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSUBPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1198) }
 inst_vaddsubps_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSUBPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1198) }
 inst_vaddsubps_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSUBPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1199) }
 inst_vaddsubps_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSUBPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1199) }
-emit_vaddsubps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaddsubps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaddsubps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vaddsubps_xmm_xmm_m128(dst, src, src2)) }
-emit_vaddsubps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vaddsubps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vaddsubps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vaddsubps_ymm_ymm_m256(dst, src, src2)) }
+emit_vaddsubps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaddsubps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaddsubps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vaddsubps_xmm_xmm_m128(dst, src, src2)) }
+emit_vaddsubps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vaddsubps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vaddsubps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vaddsubps_ymm_ymm_m256(dst, src, src2)) }
 inst_vaddsubpd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSUBPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1200) }
 inst_vaddsubpd_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSUBPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1200) }
 inst_vaddsubpd_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSUBPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1201) }
 inst_vaddsubpd_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VADDSUBPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1201) }
-emit_vaddsubpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaddsubpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaddsubpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vaddsubpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vaddsubpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vaddsubpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vaddsubpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vaddsubpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vaddsubpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaddsubpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaddsubpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vaddsubpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vaddsubpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vaddsubpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vaddsubpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vaddsubpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vhaddps_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VHADDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1202) }
 inst_vhaddps_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VHADDPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1202) }
 inst_vhaddps_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VHADDPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1203) }
 inst_vhaddps_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VHADDPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1203) }
-emit_vhaddps_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vhaddps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vhaddps_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vhaddps_xmm_xmm_m128(dst, src, src2)) }
-emit_vhaddps_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vhaddps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vhaddps_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vhaddps_ymm_ymm_m256(dst, src, src2)) }
+emit_vhaddps_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vhaddps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vhaddps_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vhaddps_xmm_xmm_m128(dst, src, src2)) }
+emit_vhaddps_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vhaddps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vhaddps_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vhaddps_ymm_ymm_m256(dst, src, src2)) }
 inst_vhaddpd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VHADDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1204) }
 inst_vhaddpd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VHADDPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1204) }
 inst_vhaddpd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VHADDPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1205) }
 inst_vhaddpd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VHADDPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1205) }
-emit_vhaddpd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vhaddpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vhaddpd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vhaddpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vhaddpd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vhaddpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vhaddpd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vhaddpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vhaddpd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vhaddpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vhaddpd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vhaddpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vhaddpd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vhaddpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vhaddpd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vhaddpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vhsubps_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VHSUBPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1206) }
 inst_vhsubps_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VHSUBPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1206) }
 inst_vhsubps_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VHSUBPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1207) }
 inst_vhsubps_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VHSUBPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1207) }
-emit_vhsubps_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vhsubps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vhsubps_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vhsubps_xmm_xmm_m128(dst, src, src2)) }
-emit_vhsubps_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vhsubps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vhsubps_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vhsubps_ymm_ymm_m256(dst, src, src2)) }
+emit_vhsubps_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vhsubps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vhsubps_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vhsubps_xmm_xmm_m128(dst, src, src2)) }
+emit_vhsubps_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vhsubps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vhsubps_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vhsubps_ymm_ymm_m256(dst, src, src2)) }
 inst_vhsubpd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VHSUBPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1208) }
 inst_vhsubpd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VHSUBPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1208) }
 inst_vhsubpd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VHSUBPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1209) }
 inst_vhsubpd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VHSUBPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1209) }
-emit_vhsubpd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vhsubpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vhsubpd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vhsubpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vhsubpd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vhsubpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vhsubpd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vhsubpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vhsubpd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vhsubpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vhsubpd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vhsubpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vhsubpd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vhsubpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vhsubpd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vhsubpd_ymm_ymm_m256(dst, src, src2)) }
 inst_vlddqu_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VLDDQU, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1210) }
 inst_vlddqu_ymm_m256                :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VLDDQU, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1211) }
-emit_vlddqu_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vlddqu_xmm_m128(dst, src)) }
-emit_vlddqu_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vlddqu_ymm_m256(dst, src)) }
+emit_vlddqu_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vlddqu_xmm_m128(dst, src)) }
+emit_vlddqu_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vlddqu_ymm_m256(dst, src)) }
 inst_vmovddup_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDDUP, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1212) }
 inst_vmovddup_xmm_m64               :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDDUP, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1212) }
 inst_vmovddup_ymm_ymm               :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDDUP, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1213) }
 inst_vmovddup_ymm_m256              :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDDUP, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1213) }
-emit_vmovddup_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovddup_xmm_xmm(dst, src)) }
-emit_vmovddup_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vmovddup_xmm_m64(dst, src)) }
-emit_vmovddup_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovddup_ymm_ymm(dst, src)) }
-emit_vmovddup_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovddup_ymm_m256(dst, src)) }
+emit_vmovddup_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovddup_xmm_xmm(dst, src)) }
+emit_vmovddup_xmm_m64               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vmovddup_xmm_m64(dst, src)) }
+emit_vmovddup_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovddup_ymm_ymm(dst, src)) }
+emit_vmovddup_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovddup_ymm_m256(dst, src)) }
 inst_vmovsldup_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSLDUP, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1214) }
 inst_vmovsldup_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSLDUP, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1214) }
 inst_vmovsldup_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSLDUP, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1215) }
 inst_vmovsldup_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSLDUP, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1215) }
-emit_vmovsldup_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovsldup_xmm_xmm(dst, src)) }
-emit_vmovsldup_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovsldup_xmm_m128(dst, src)) }
-emit_vmovsldup_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovsldup_ymm_ymm(dst, src)) }
-emit_vmovsldup_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovsldup_ymm_m256(dst, src)) }
+emit_vmovsldup_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovsldup_xmm_xmm(dst, src)) }
+emit_vmovsldup_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovsldup_xmm_m128(dst, src)) }
+emit_vmovsldup_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovsldup_ymm_ymm(dst, src)) }
+emit_vmovsldup_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovsldup_ymm_m256(dst, src)) }
 inst_vmovshdup_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSHDUP, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1216) }
 inst_vmovshdup_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSHDUP, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1216) }
 inst_vmovshdup_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSHDUP, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1217) }
 inst_vmovshdup_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVSHDUP, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1217) }
-emit_vmovshdup_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovshdup_xmm_xmm(dst, src)) }
-emit_vmovshdup_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovshdup_xmm_m128(dst, src)) }
-emit_vmovshdup_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovshdup_ymm_ymm(dst, src)) }
-emit_vmovshdup_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovshdup_ymm_m256(dst, src)) }
+emit_vmovshdup_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovshdup_xmm_xmm(dst, src)) }
+emit_vmovshdup_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovshdup_xmm_m128(dst, src)) }
+emit_vmovshdup_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovshdup_ymm_ymm(dst, src)) }
+emit_vmovshdup_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovshdup_ymm_m256(dst, src)) }
 inst_vpcmpestri_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPESTRI, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1218) }
 inst_vpcmpestri_xmm_m128_imm8       :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPESTRI, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1218) }
-emit_vpcmpestri_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpcmpestri_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpcmpestri_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vpcmpestri_xmm_m128_imm8(dst, src, imm)) }
+emit_vpcmpestri_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpcmpestri_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpcmpestri_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpestri_xmm_m128_imm8(dst, src, imm)) }
 inst_vpcmpestrm_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPESTRM, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1219) }
 inst_vpcmpestrm_xmm_m128_imm8       :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPESTRM, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1219) }
-emit_vpcmpestrm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpcmpestrm_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpcmpestrm_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vpcmpestrm_xmm_m128_imm8(dst, src, imm)) }
+emit_vpcmpestrm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpcmpestrm_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpcmpestrm_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpestrm_xmm_m128_imm8(dst, src, imm)) }
 inst_vpcmpistri_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPISTRI, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1220) }
 inst_vpcmpistri_xmm_m128_imm8       :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPISTRI, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1220) }
-emit_vpcmpistri_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpcmpistri_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpcmpistri_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vpcmpistri_xmm_m128_imm8(dst, src, imm)) }
+emit_vpcmpistri_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpcmpistri_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpcmpistri_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpistri_xmm_m128_imm8(dst, src, imm)) }
 inst_vpcmpistrm_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPISTRM, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1221) }
 inst_vpcmpistrm_xmm_m128_imm8       :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPISTRM, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1221) }
-emit_vpcmpistrm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpcmpistrm_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpcmpistrm_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vpcmpistrm_xmm_m128_imm8(dst, src, imm)) }
+emit_vpcmpistrm_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpcmpistrm_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpcmpistrm_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpistrm_xmm_m128_imm8(dst, src, imm)) }
 inst_vpbroadcastb_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1222) }
 inst_vpbroadcastb_ymm_xmm           :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTB, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1223) }
 inst_vpbroadcastb_xmm_m8            :: #force_inline proc "contextless" (dst: XMM, src: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 1), {}, {}} }, 1224) }
 inst_vpbroadcastb_ymm_m8            :: #force_inline proc "contextless" (dst: YMM, src: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTB, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 1), {}, {}} }, 1225) }
-emit_vpbroadcastb_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpbroadcastb_xmm_xmm(dst, src)) }
-emit_vpbroadcastb_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpbroadcastb_ymm_xmm(dst, src)) }
-emit_vpbroadcastb_xmm_m8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem8) { append(instructions, inst_vpbroadcastb_xmm_m8(dst, src)) }
-emit_vpbroadcastb_ymm_m8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem8) { append(instructions, inst_vpbroadcastb_ymm_m8(dst, src)) }
+emit_vpbroadcastb_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpbroadcastb_xmm_xmm(dst, src)) }
+emit_vpbroadcastb_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpbroadcastb_ymm_xmm(dst, src)) }
+emit_vpbroadcastb_xmm_m8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem8) { append_elem(instructions, inst_vpbroadcastb_xmm_m8(dst, src)) }
+emit_vpbroadcastb_ymm_m8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem8) { append_elem(instructions, inst_vpbroadcastb_ymm_m8(dst, src)) }
 inst_vpbroadcastw_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1226) }
 inst_vpbroadcastw_ymm_xmm           :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTW, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1227) }
 inst_vpbroadcastw_xmm_m16           :: #force_inline proc "contextless" (dst: XMM, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 2), {}, {}} }, 1228) }
 inst_vpbroadcastw_ymm_m16           :: #force_inline proc "contextless" (dst: YMM, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTW, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 2), {}, {}} }, 1229) }
-emit_vpbroadcastw_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpbroadcastw_xmm_xmm(dst, src)) }
-emit_vpbroadcastw_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpbroadcastw_ymm_xmm(dst, src)) }
-emit_vpbroadcastw_xmm_m16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem16) { append(instructions, inst_vpbroadcastw_xmm_m16(dst, src)) }
-emit_vpbroadcastw_ymm_m16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem16) { append(instructions, inst_vpbroadcastw_ymm_m16(dst, src)) }
+emit_vpbroadcastw_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpbroadcastw_xmm_xmm(dst, src)) }
+emit_vpbroadcastw_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpbroadcastw_ymm_xmm(dst, src)) }
+emit_vpbroadcastw_xmm_m16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem16) { append_elem(instructions, inst_vpbroadcastw_xmm_m16(dst, src)) }
+emit_vpbroadcastw_ymm_m16           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem16) { append_elem(instructions, inst_vpbroadcastw_ymm_m16(dst, src)) }
 inst_vpbroadcastd_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1230) }
 inst_vpbroadcastd_ymm_xmm           :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTD, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1231) }
 inst_vpbroadcastd_xmm_m32           :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1232) }
 inst_vpbroadcastd_ymm_m32           :: #force_inline proc "contextless" (dst: YMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 4), {}, {}} }, 1233) }
-emit_vpbroadcastd_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpbroadcastd_xmm_xmm(dst, src)) }
-emit_vpbroadcastd_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpbroadcastd_ymm_xmm(dst, src)) }
-emit_vpbroadcastd_xmm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vpbroadcastd_xmm_m32(dst, src)) }
-emit_vpbroadcastd_ymm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem32) { append(instructions, inst_vpbroadcastd_ymm_m32(dst, src)) }
+emit_vpbroadcastd_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpbroadcastd_xmm_xmm(dst, src)) }
+emit_vpbroadcastd_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpbroadcastd_ymm_xmm(dst, src)) }
+emit_vpbroadcastd_xmm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vpbroadcastd_xmm_m32(dst, src)) }
+emit_vpbroadcastd_ymm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem32) { append_elem(instructions, inst_vpbroadcastd_ymm_m32(dst, src)) }
 inst_vpbroadcastq_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1234) }
 inst_vpbroadcastq_ymm_xmm           :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTQ, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1235) }
 inst_vpbroadcastq_xmm_m64           :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1236) }
 inst_vpbroadcastq_ymm_m64           :: #force_inline proc "contextless" (dst: YMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBROADCASTQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 8), {}, {}} }, 1237) }
-emit_vpbroadcastq_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpbroadcastq_xmm_xmm(dst, src)) }
-emit_vpbroadcastq_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpbroadcastq_ymm_xmm(dst, src)) }
-emit_vpbroadcastq_xmm_m64           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vpbroadcastq_xmm_m64(dst, src)) }
-emit_vpbroadcastq_ymm_m64           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append(instructions, inst_vpbroadcastq_ymm_m64(dst, src)) }
+emit_vpbroadcastq_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpbroadcastq_xmm_xmm(dst, src)) }
+emit_vpbroadcastq_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpbroadcastq_ymm_xmm(dst, src)) }
+emit_vpbroadcastq_xmm_m64           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vpbroadcastq_xmm_m64(dst, src)) }
+emit_vpbroadcastq_ymm_m64           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append_elem(instructions, inst_vpbroadcastq_ymm_m64(dst, src)) }
 inst_vcvtps2pd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1238) }
 inst_vcvtps2pd_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1238) }
 inst_vcvtps2pd_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PD, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1239) }
 inst_vcvtps2pd_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1239) }
-emit_vcvtps2pd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvtps2pd_xmm_xmm(dst, src)) }
-emit_vcvtps2pd_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vcvtps2pd_xmm_m64(dst, src)) }
-emit_vcvtps2pd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vcvtps2pd_ymm_xmm(dst, src)) }
-emit_vcvtps2pd_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vcvtps2pd_ymm_m128(dst, src)) }
+emit_vcvtps2pd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvtps2pd_xmm_xmm(dst, src)) }
+emit_vcvtps2pd_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vcvtps2pd_xmm_m64(dst, src)) }
+emit_vcvtps2pd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vcvtps2pd_ymm_xmm(dst, src)) }
+emit_vcvtps2pd_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vcvtps2pd_ymm_m128(dst, src)) }
 inst_vcvtpd2ps_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPD2PS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1240) }
 inst_vcvtpd2ps_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPD2PS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1240) }
 inst_vcvtpd2ps_xmm_ymm              :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPD2PS, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1241) }
 inst_vcvtpd2ps_xmm_m256             :: #force_inline proc "contextless" (dst: XMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPD2PS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 32), {}, {}} }, 1241) }
-emit_vcvtpd2ps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvtpd2ps_xmm_xmm(dst, src)) }
-emit_vcvtpd2ps_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vcvtpd2ps_xmm_m128(dst, src)) }
-emit_vcvtpd2ps_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vcvtpd2ps_xmm_ymm(dst, src)) }
-emit_vcvtpd2ps_xmm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem256) { append(instructions, inst_vcvtpd2ps_xmm_m256(dst, src)) }
+emit_vcvtpd2ps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvtpd2ps_xmm_xmm(dst, src)) }
+emit_vcvtpd2ps_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vcvtpd2ps_xmm_m128(dst, src)) }
+emit_vcvtpd2ps_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vcvtpd2ps_xmm_ymm(dst, src)) }
+emit_vcvtpd2ps_xmm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem256) { append_elem(instructions, inst_vcvtpd2ps_xmm_m256(dst, src)) }
 inst_vcvtss2sd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSS2SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1242) }
 inst_vcvtss2sd_xmm_xmm_m32          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSS2SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1242) }
-emit_vcvtss2sd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vcvtss2sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vcvtss2sd_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vcvtss2sd_xmm_xmm_m32(dst, src, src2)) }
+emit_vcvtss2sd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vcvtss2sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vcvtss2sd_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vcvtss2sd_xmm_xmm_m32(dst, src, src2)) }
 inst_vcvtsd2ss_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSD2SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1243) }
 inst_vcvtsd2ss_xmm_xmm_m64          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSD2SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1243) }
-emit_vcvtsd2ss_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vcvtsd2ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vcvtsd2ss_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vcvtsd2ss_xmm_xmm_m64(dst, src, src2)) }
+emit_vcvtsd2ss_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vcvtsd2ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vcvtsd2ss_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vcvtsd2ss_xmm_xmm_m64(dst, src, src2)) }
 inst_vcvtps2dq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2DQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1244) }
 inst_vcvtps2dq_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1244) }
 inst_vcvtps2dq_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2DQ, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1245) }
 inst_vcvtps2dq_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2DQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1245) }
-emit_vcvtps2dq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvtps2dq_xmm_xmm(dst, src)) }
-emit_vcvtps2dq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vcvtps2dq_xmm_m128(dst, src)) }
-emit_vcvtps2dq_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vcvtps2dq_ymm_ymm(dst, src)) }
-emit_vcvtps2dq_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vcvtps2dq_ymm_m256(dst, src)) }
+emit_vcvtps2dq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvtps2dq_xmm_xmm(dst, src)) }
+emit_vcvtps2dq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vcvtps2dq_xmm_m128(dst, src)) }
+emit_vcvtps2dq_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vcvtps2dq_ymm_ymm(dst, src)) }
+emit_vcvtps2dq_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vcvtps2dq_ymm_m256(dst, src)) }
 inst_vcvtpd2dq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1246) }
 inst_vcvtpd2dq_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1246) }
 inst_vcvtpd2dq_xmm_ymm              :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1247) }
 inst_vcvtpd2dq_xmm_m256             :: #force_inline proc "contextless" (dst: XMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 32), {}, {}} }, 1247) }
-emit_vcvtpd2dq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvtpd2dq_xmm_xmm(dst, src)) }
-emit_vcvtpd2dq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vcvtpd2dq_xmm_m128(dst, src)) }
-emit_vcvtpd2dq_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vcvtpd2dq_xmm_ymm(dst, src)) }
-emit_vcvtpd2dq_xmm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem256) { append(instructions, inst_vcvtpd2dq_xmm_m256(dst, src)) }
+emit_vcvtpd2dq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvtpd2dq_xmm_xmm(dst, src)) }
+emit_vcvtpd2dq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vcvtpd2dq_xmm_m128(dst, src)) }
+emit_vcvtpd2dq_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vcvtpd2dq_xmm_ymm(dst, src)) }
+emit_vcvtpd2dq_xmm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem256) { append_elem(instructions, inst_vcvtpd2dq_xmm_m256(dst, src)) }
 inst_vcvtdq2ps_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTDQ2PS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1248) }
 inst_vcvtdq2ps_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTDQ2PS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1248) }
 inst_vcvtdq2ps_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTDQ2PS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1249) }
 inst_vcvtdq2ps_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTDQ2PS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1249) }
-emit_vcvtdq2ps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvtdq2ps_xmm_xmm(dst, src)) }
-emit_vcvtdq2ps_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vcvtdq2ps_xmm_m128(dst, src)) }
-emit_vcvtdq2ps_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vcvtdq2ps_ymm_ymm(dst, src)) }
-emit_vcvtdq2ps_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vcvtdq2ps_ymm_m256(dst, src)) }
+emit_vcvtdq2ps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvtdq2ps_xmm_xmm(dst, src)) }
+emit_vcvtdq2ps_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vcvtdq2ps_xmm_m128(dst, src)) }
+emit_vcvtdq2ps_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vcvtdq2ps_ymm_ymm(dst, src)) }
+emit_vcvtdq2ps_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vcvtdq2ps_ymm_m256(dst, src)) }
 inst_vcvtdq2pd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTDQ2PD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1250) }
 inst_vcvtdq2pd_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTDQ2PD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1250) }
 inst_vcvtdq2pd_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTDQ2PD, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1251) }
 inst_vcvtdq2pd_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTDQ2PD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1251) }
-emit_vcvtdq2pd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvtdq2pd_xmm_xmm(dst, src)) }
-emit_vcvtdq2pd_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vcvtdq2pd_xmm_m64(dst, src)) }
-emit_vcvtdq2pd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vcvtdq2pd_ymm_xmm(dst, src)) }
-emit_vcvtdq2pd_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vcvtdq2pd_ymm_m128(dst, src)) }
+emit_vcvtdq2pd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvtdq2pd_xmm_xmm(dst, src)) }
+emit_vcvtdq2pd_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vcvtdq2pd_xmm_m64(dst, src)) }
+emit_vcvtdq2pd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vcvtdq2pd_ymm_xmm(dst, src)) }
+emit_vcvtdq2pd_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vcvtdq2pd_ymm_m128(dst, src)) }
 inst_vcvtss2si_r32_xmm              :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSS2SI, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 1252) }
 inst_vcvtss2si_r32_m32              :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSS2SI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 1252) }
 inst_vcvtss2si_r64_xmm              :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSS2SI, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 1253) }
 inst_vcvtss2si_r64_m32              :: #force_inline proc "contextless" (dst: GPR64, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSS2SI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 4), {}, {}} }, 1253) }
-emit_vcvtss2si_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_vcvtss2si_r32_xmm(dst, src)) }
-emit_vcvtss2si_r32_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_vcvtss2si_r32_m32(dst, src)) }
-emit_vcvtss2si_r64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_vcvtss2si_r64_xmm(dst, src)) }
-emit_vcvtss2si_r64_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append(instructions, inst_vcvtss2si_r64_m32(dst, src)) }
+emit_vcvtss2si_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_vcvtss2si_r32_xmm(dst, src)) }
+emit_vcvtss2si_r32_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_vcvtss2si_r32_m32(dst, src)) }
+emit_vcvtss2si_r64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_vcvtss2si_r64_xmm(dst, src)) }
+emit_vcvtss2si_r64_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append_elem(instructions, inst_vcvtss2si_r64_m32(dst, src)) }
 inst_vcvtsd2si_r32_xmm              :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSD2SI, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 1254) }
 inst_vcvtsd2si_r32_m64              :: #force_inline proc "contextless" (dst: GPR32, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSD2SI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 8), {}, {}} }, 1254) }
 inst_vcvtsd2si_r64_xmm              :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSD2SI, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 1255) }
 inst_vcvtsd2si_r64_m64              :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSD2SI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 1255) }
-emit_vcvtsd2si_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_vcvtsd2si_r32_xmm(dst, src)) }
-emit_vcvtsd2si_r32_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem64) { append(instructions, inst_vcvtsd2si_r32_m64(dst, src)) }
-emit_vcvtsd2si_r64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_vcvtsd2si_r64_xmm(dst, src)) }
-emit_vcvtsd2si_r64_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_vcvtsd2si_r64_m64(dst, src)) }
+emit_vcvtsd2si_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_vcvtsd2si_r32_xmm(dst, src)) }
+emit_vcvtsd2si_r32_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem64) { append_elem(instructions, inst_vcvtsd2si_r32_m64(dst, src)) }
+emit_vcvtsd2si_r64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_vcvtsd2si_r64_xmm(dst, src)) }
+emit_vcvtsd2si_r64_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_vcvtsd2si_r64_m64(dst, src)) }
 inst_vcvtsi2ss_xmm_xmm_r32          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSI2SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_gpr32(src2), {}} }, 1256) }
 inst_vcvtsi2ss_xmm_xmm_m32          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSI2SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1256) }
 inst_vcvtsi2ss_xmm_xmm_r64          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSI2SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_gpr64(src2), {}} }, 1257) }
 inst_vcvtsi2ss_xmm_xmm_m64          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSI2SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1257) }
-emit_vcvtsi2ss_xmm_xmm_r32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR32) { append(instructions, inst_vcvtsi2ss_xmm_xmm_r32(dst, src, src2)) }
-emit_vcvtsi2ss_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vcvtsi2ss_xmm_xmm_m32(dst, src, src2)) }
-emit_vcvtsi2ss_xmm_xmm_r64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR64) { append(instructions, inst_vcvtsi2ss_xmm_xmm_r64(dst, src, src2)) }
-emit_vcvtsi2ss_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vcvtsi2ss_xmm_xmm_m64(dst, src, src2)) }
+emit_vcvtsi2ss_xmm_xmm_r32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR32) { append_elem(instructions, inst_vcvtsi2ss_xmm_xmm_r32(dst, src, src2)) }
+emit_vcvtsi2ss_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vcvtsi2ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vcvtsi2ss_xmm_xmm_r64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR64) { append_elem(instructions, inst_vcvtsi2ss_xmm_xmm_r64(dst, src, src2)) }
+emit_vcvtsi2ss_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vcvtsi2ss_xmm_xmm_m64(dst, src, src2)) }
 inst_vcvtsi2sd_xmm_xmm_r32          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSI2SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_gpr32(src2), {}} }, 1258) }
 inst_vcvtsi2sd_xmm_xmm_m32          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSI2SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1258) }
 inst_vcvtsi2sd_xmm_xmm_r64          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSI2SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_gpr64(src2), {}} }, 1259) }
 inst_vcvtsi2sd_xmm_xmm_m64          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTSI2SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1259) }
-emit_vcvtsi2sd_xmm_xmm_r32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR32) { append(instructions, inst_vcvtsi2sd_xmm_xmm_r32(dst, src, src2)) }
-emit_vcvtsi2sd_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vcvtsi2sd_xmm_xmm_m32(dst, src, src2)) }
-emit_vcvtsi2sd_xmm_xmm_r64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR64) { append(instructions, inst_vcvtsi2sd_xmm_xmm_r64(dst, src, src2)) }
-emit_vcvtsi2sd_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vcvtsi2sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vcvtsi2sd_xmm_xmm_r32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR32) { append_elem(instructions, inst_vcvtsi2sd_xmm_xmm_r32(dst, src, src2)) }
+emit_vcvtsi2sd_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vcvtsi2sd_xmm_xmm_m32(dst, src, src2)) }
+emit_vcvtsi2sd_xmm_xmm_r64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR64) { append_elem(instructions, inst_vcvtsi2sd_xmm_xmm_r64(dst, src, src2)) }
+emit_vcvtsi2sd_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vcvtsi2sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vcvttps2dq_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTPS2DQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1260) }
 inst_vcvttps2dq_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTPS2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1260) }
 inst_vcvttps2dq_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTPS2DQ, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1261) }
 inst_vcvttps2dq_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTPS2DQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1261) }
-emit_vcvttps2dq_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvttps2dq_xmm_xmm(dst, src)) }
-emit_vcvttps2dq_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vcvttps2dq_xmm_m128(dst, src)) }
-emit_vcvttps2dq_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vcvttps2dq_ymm_ymm(dst, src)) }
-emit_vcvttps2dq_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vcvttps2dq_ymm_m256(dst, src)) }
+emit_vcvttps2dq_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvttps2dq_xmm_xmm(dst, src)) }
+emit_vcvttps2dq_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vcvttps2dq_xmm_m128(dst, src)) }
+emit_vcvttps2dq_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vcvttps2dq_ymm_ymm(dst, src)) }
+emit_vcvttps2dq_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vcvttps2dq_ymm_m256(dst, src)) }
 inst_vcvttpd2dq_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1262) }
 inst_vcvttpd2dq_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1262) }
 inst_vcvttpd2dq_xmm_ymm             :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1263) }
 inst_vcvttpd2dq_xmm_m256            :: #force_inline proc "contextless" (dst: XMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTPD2DQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 32), {}, {}} }, 1263) }
-emit_vcvttpd2dq_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvttpd2dq_xmm_xmm(dst, src)) }
-emit_vcvttpd2dq_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vcvttpd2dq_xmm_m128(dst, src)) }
-emit_vcvttpd2dq_xmm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vcvttpd2dq_xmm_ymm(dst, src)) }
-emit_vcvttpd2dq_xmm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem256) { append(instructions, inst_vcvttpd2dq_xmm_m256(dst, src)) }
+emit_vcvttpd2dq_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvttpd2dq_xmm_xmm(dst, src)) }
+emit_vcvttpd2dq_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vcvttpd2dq_xmm_m128(dst, src)) }
+emit_vcvttpd2dq_xmm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vcvttpd2dq_xmm_ymm(dst, src)) }
+emit_vcvttpd2dq_xmm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem256) { append_elem(instructions, inst_vcvttpd2dq_xmm_m256(dst, src)) }
 inst_vcvttss2si_r32_xmm             :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTSS2SI, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 1264) }
 inst_vcvttss2si_r32_m32             :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTSS2SI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 1264) }
 inst_vcvttss2si_r64_xmm             :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTSS2SI, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 1265) }
 inst_vcvttss2si_r64_m32             :: #force_inline proc "contextless" (dst: GPR64, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTSS2SI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 4), {}, {}} }, 1265) }
-emit_vcvttss2si_r32_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_vcvttss2si_r32_xmm(dst, src)) }
-emit_vcvttss2si_r32_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_vcvttss2si_r32_m32(dst, src)) }
-emit_vcvttss2si_r64_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_vcvttss2si_r64_xmm(dst, src)) }
-emit_vcvttss2si_r64_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append(instructions, inst_vcvttss2si_r64_m32(dst, src)) }
+emit_vcvttss2si_r32_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_vcvttss2si_r32_xmm(dst, src)) }
+emit_vcvttss2si_r32_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_vcvttss2si_r32_m32(dst, src)) }
+emit_vcvttss2si_r64_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_vcvttss2si_r64_xmm(dst, src)) }
+emit_vcvttss2si_r64_m32             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem32) { append_elem(instructions, inst_vcvttss2si_r64_m32(dst, src)) }
 inst_vcvttsd2si_r32_xmm             :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTSD2SI, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 1266) }
 inst_vcvttsd2si_r32_m64             :: #force_inline proc "contextless" (dst: GPR32, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTSD2SI, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 8), {}, {}} }, 1266) }
 inst_vcvttsd2si_r64_xmm             :: #force_inline proc "contextless" (dst: GPR64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTSD2SI, operand_count = 2, ops = {op_gpr64(dst), op_xmm(src), {}, {}} }, 1267) }
 inst_vcvttsd2si_r64_m64             :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTTSD2SI, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 1267) }
-emit_vcvttsd2si_r32_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_vcvttsd2si_r32_xmm(dst, src)) }
-emit_vcvttsd2si_r32_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem64) { append(instructions, inst_vcvttsd2si_r32_m64(dst, src)) }
-emit_vcvttsd2si_r64_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append(instructions, inst_vcvttsd2si_r64_xmm(dst, src)) }
-emit_vcvttsd2si_r64_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_vcvttsd2si_r64_m64(dst, src)) }
+emit_vcvttsd2si_r32_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_vcvttsd2si_r32_xmm(dst, src)) }
+emit_vcvttsd2si_r32_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem64) { append_elem(instructions, inst_vcvttsd2si_r32_m64(dst, src)) }
+emit_vcvttsd2si_r64_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM) { append_elem(instructions, inst_vcvttsd2si_r64_xmm(dst, src)) }
+emit_vcvttsd2si_r64_m64             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_vcvttsd2si_r64_m64(dst, src)) }
 inst_vpaddb_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1268) }
 inst_vpaddb_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1268) }
 inst_vpaddb_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1269) }
 inst_vpaddb_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1269) }
-emit_vpaddb_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpaddb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpaddb_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpaddb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpaddb_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpaddb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpaddb_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpaddb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpaddb_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpaddb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpaddb_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpaddb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpaddb_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpaddb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpaddb_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpaddb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpaddw_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1270) }
 inst_vpaddw_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1270) }
 inst_vpaddw_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1271) }
 inst_vpaddw_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1271) }
-emit_vpaddw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpaddw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpaddw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpaddw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpaddw_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpaddw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpaddw_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpaddw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpaddw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpaddw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpaddw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpaddw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpaddw_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpaddw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpaddw_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpaddw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpaddd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1272) }
 inst_vpaddd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1272) }
 inst_vpaddd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1273) }
 inst_vpaddd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1273) }
-emit_vpaddd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpaddd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpaddd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpaddd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpaddd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpaddd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpaddd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpaddd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpaddd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpaddd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpaddd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpaddd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpaddd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpaddd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpaddd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpaddd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpaddq_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1274) }
 inst_vpaddq_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1274) }
 inst_vpaddq_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1275) }
 inst_vpaddq_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPADDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1275) }
-emit_vpaddq_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpaddq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpaddq_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpaddq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpaddq_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpaddq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpaddq_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpaddq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpaddq_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpaddq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpaddq_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpaddq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpaddq_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpaddq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpaddq_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpaddq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsubb_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1276) }
 inst_vpsubb_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1276) }
 inst_vpsubb_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1277) }
 inst_vpsubb_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1277) }
-emit_vpsubb_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsubb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsubb_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsubb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsubb_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsubb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsubb_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsubb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsubb_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsubb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsubb_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsubb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsubb_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsubb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsubb_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsubb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsubw_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1278) }
 inst_vpsubw_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1278) }
 inst_vpsubw_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1279) }
 inst_vpsubw_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1279) }
-emit_vpsubw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsubw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsubw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsubw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsubw_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsubw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsubw_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsubw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsubw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsubw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsubw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsubw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsubw_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsubw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsubw_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsubw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsubd_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1280) }
 inst_vpsubd_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1280) }
 inst_vpsubd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1281) }
 inst_vpsubd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1281) }
-emit_vpsubd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsubd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsubd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsubd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsubd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsubd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsubd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsubd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsubd_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsubd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsubd_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsubd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsubd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsubd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsubd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsubd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsubq_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1282) }
 inst_vpsubq_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1282) }
 inst_vpsubq_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1283) }
 inst_vpsubq_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSUBQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1283) }
-emit_vpsubq_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsubq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsubq_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsubq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsubq_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsubq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsubq_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsubq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsubq_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsubq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsubq_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsubq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsubq_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsubq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsubq_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsubq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmullw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1284) }
 inst_vpmullw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1284) }
 inst_vpmullw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1285) }
 inst_vpmullw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1285) }
-emit_vpmullw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmullw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmullw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmullw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmullw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmullw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmullw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmullw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmullw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmullw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmullw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmullw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmullw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmullw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmullw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmullw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmulhw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1286) }
 inst_vpmulhw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1286) }
 inst_vpmulhw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1287) }
 inst_vpmulhw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1287) }
-emit_vpmulhw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmulhw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmulhw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmulhw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmulhw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmulhw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmulhw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmulhw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmulhw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmulhw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmulhw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmulhw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmulhw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmulhw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmulhw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmulhw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmulhuw_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHUW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1288) }
 inst_vpmulhuw_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHUW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1288) }
 inst_vpmulhuw_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHUW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1289) }
 inst_vpmulhuw_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHUW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1289) }
-emit_vpmulhuw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmulhuw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmulhuw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmulhuw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmulhuw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmulhuw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmulhuw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmulhuw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmulhuw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmulhuw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmulhuw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmulhuw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmulhuw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmulhuw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmulhuw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmulhuw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmuludq_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULUDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1290) }
 inst_vpmuludq_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULUDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1290) }
 inst_vpmuludq_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULUDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1291) }
 inst_vpmuludq_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULUDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1291) }
-emit_vpmuludq_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmuludq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmuludq_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmuludq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmuludq_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmuludq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmuludq_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmuludq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmuludq_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmuludq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmuludq_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmuludq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmuludq_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmuludq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmuludq_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmuludq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmaddwd_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMADDWD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1292) }
 inst_vpmaddwd_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMADDWD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1292) }
 inst_vpmaddwd_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMADDWD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1293) }
 inst_vpmaddwd_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMADDWD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1293) }
-emit_vpmaddwd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmaddwd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmaddwd_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmaddwd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmaddwd_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmaddwd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmaddwd_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmaddwd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmaddwd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmaddwd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmaddwd_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmaddwd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmaddwd_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmaddwd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmaddwd_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmaddwd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpand_xmm_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPAND, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1294) }
 inst_vpand_xmm_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPAND, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1294) }
 inst_vpand_ymm_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPAND, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1295) }
 inst_vpand_ymm_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPAND, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1295) }
-emit_vpand_xmm_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpand_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpand_xmm_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpand_xmm_xmm_m128(dst, src, src2)) }
-emit_vpand_ymm_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpand_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpand_ymm_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpand_ymm_ymm_m256(dst, src, src2)) }
+emit_vpand_xmm_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpand_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpand_xmm_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpand_xmm_xmm_m128(dst, src, src2)) }
+emit_vpand_ymm_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpand_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpand_ymm_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpand_ymm_ymm_m256(dst, src, src2)) }
 inst_vpandn_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPANDN, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1296) }
 inst_vpandn_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPANDN, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1296) }
 inst_vpandn_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPANDN, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1297) }
 inst_vpandn_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPANDN, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1297) }
-emit_vpandn_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpandn_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpandn_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpandn_xmm_xmm_m128(dst, src, src2)) }
-emit_vpandn_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpandn_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpandn_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpandn_ymm_ymm_m256(dst, src, src2)) }
+emit_vpandn_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpandn_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpandn_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpandn_xmm_xmm_m128(dst, src, src2)) }
+emit_vpandn_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpandn_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpandn_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpandn_ymm_ymm_m256(dst, src, src2)) }
 inst_vpor_xmm_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPOR, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1298) }
 inst_vpor_xmm_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPOR, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1298) }
 inst_vpor_ymm_ymm_ymm               :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPOR, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1299) }
 inst_vpor_ymm_ymm_m256              :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPOR, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1299) }
-emit_vpor_xmm_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpor_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpor_xmm_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpor_xmm_xmm_m128(dst, src, src2)) }
-emit_vpor_ymm_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpor_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpor_ymm_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpor_ymm_ymm_m256(dst, src, src2)) }
+emit_vpor_xmm_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpor_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpor_xmm_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpor_xmm_xmm_m128(dst, src, src2)) }
+emit_vpor_ymm_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpor_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpor_ymm_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpor_ymm_ymm_m256(dst, src, src2)) }
 inst_vpxor_xmm_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPXOR, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1300) }
 inst_vpxor_xmm_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPXOR, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1300) }
 inst_vpxor_ymm_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPXOR, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1301) }
 inst_vpxor_ymm_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPXOR, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1301) }
-emit_vpxor_xmm_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpxor_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpxor_xmm_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpxor_xmm_xmm_m128(dst, src, src2)) }
-emit_vpxor_ymm_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpxor_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpxor_ymm_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpxor_ymm_ymm_m256(dst, src, src2)) }
+emit_vpxor_xmm_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpxor_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpxor_xmm_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpxor_xmm_xmm_m128(dst, src, src2)) }
+emit_vpxor_ymm_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpxor_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpxor_ymm_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpxor_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsllw_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1302) }
 inst_vpsllw_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1302) }
 inst_vpsllw_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1303) }
 inst_vpsllw_ymm_ymm_xmm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), {}} }, 1304) }
 inst_vpsllw_ymm_ymm_m128            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), {}} }, 1304) }
 inst_vpsllw_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1305) }
-emit_vpsllw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsllw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsllw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsllw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsllw_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpsllw_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpsllw_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append(instructions, inst_vpsllw_ymm_ymm_xmm(dst, src, src2)) }
-emit_vpsllw_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append(instructions, inst_vpsllw_ymm_ymm_m128(dst, src, src2)) }
-emit_vpsllw_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpsllw_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpsllw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsllw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsllw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsllw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsllw_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpsllw_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpsllw_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append_elem(instructions, inst_vpsllw_ymm_ymm_xmm(dst, src, src2)) }
+emit_vpsllw_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append_elem(instructions, inst_vpsllw_ymm_ymm_m128(dst, src, src2)) }
+emit_vpsllw_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpsllw_ymm_ymm_imm8(dst, src, imm)) }
 inst_vpslld_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1306) }
 inst_vpslld_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1306) }
 inst_vpslld_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1307) }
 inst_vpslld_ymm_ymm_xmm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), {}} }, 1308) }
 inst_vpslld_ymm_ymm_m128            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), {}} }, 1308) }
 inst_vpslld_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1309) }
-emit_vpslld_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpslld_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpslld_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpslld_xmm_xmm_m128(dst, src, src2)) }
-emit_vpslld_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpslld_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpslld_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append(instructions, inst_vpslld_ymm_ymm_xmm(dst, src, src2)) }
-emit_vpslld_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append(instructions, inst_vpslld_ymm_ymm_m128(dst, src, src2)) }
-emit_vpslld_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpslld_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpslld_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpslld_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpslld_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpslld_xmm_xmm_m128(dst, src, src2)) }
+emit_vpslld_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpslld_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpslld_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append_elem(instructions, inst_vpslld_ymm_ymm_xmm(dst, src, src2)) }
+emit_vpslld_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append_elem(instructions, inst_vpslld_ymm_ymm_m128(dst, src, src2)) }
+emit_vpslld_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpslld_ymm_ymm_imm8(dst, src, imm)) }
 inst_vpsllq_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1310) }
 inst_vpsllq_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1310) }
 inst_vpsllq_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1311) }
 inst_vpsllq_ymm_ymm_xmm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), {}} }, 1312) }
 inst_vpsllq_ymm_ymm_m128            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), {}} }, 1312) }
 inst_vpsllq_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1313) }
-emit_vpsllq_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsllq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsllq_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsllq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsllq_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpsllq_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpsllq_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append(instructions, inst_vpsllq_ymm_ymm_xmm(dst, src, src2)) }
-emit_vpsllq_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append(instructions, inst_vpsllq_ymm_ymm_m128(dst, src, src2)) }
-emit_vpsllq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpsllq_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpsllq_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsllq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsllq_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsllq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsllq_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpsllq_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpsllq_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append_elem(instructions, inst_vpsllq_ymm_ymm_xmm(dst, src, src2)) }
+emit_vpsllq_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append_elem(instructions, inst_vpsllq_ymm_ymm_m128(dst, src, src2)) }
+emit_vpsllq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpsllq_ymm_ymm_imm8(dst, src, imm)) }
 inst_vpsrlw_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1314) }
 inst_vpsrlw_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1314) }
 inst_vpsrlw_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1315) }
 inst_vpsrlw_ymm_ymm_xmm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), {}} }, 1316) }
 inst_vpsrlw_ymm_ymm_m128            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), {}} }, 1316) }
 inst_vpsrlw_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1317) }
-emit_vpsrlw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsrlw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsrlw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsrlw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsrlw_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpsrlw_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpsrlw_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append(instructions, inst_vpsrlw_ymm_ymm_xmm(dst, src, src2)) }
-emit_vpsrlw_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append(instructions, inst_vpsrlw_ymm_ymm_m128(dst, src, src2)) }
-emit_vpsrlw_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpsrlw_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpsrlw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsrlw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsrlw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsrlw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsrlw_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpsrlw_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpsrlw_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append_elem(instructions, inst_vpsrlw_ymm_ymm_xmm(dst, src, src2)) }
+emit_vpsrlw_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append_elem(instructions, inst_vpsrlw_ymm_ymm_m128(dst, src, src2)) }
+emit_vpsrlw_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpsrlw_ymm_ymm_imm8(dst, src, imm)) }
 inst_vpsrld_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1318) }
 inst_vpsrld_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1318) }
 inst_vpsrld_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1319) }
 inst_vpsrld_ymm_ymm_xmm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), {}} }, 1320) }
 inst_vpsrld_ymm_ymm_m128            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), {}} }, 1320) }
 inst_vpsrld_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1321) }
-emit_vpsrld_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsrld_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsrld_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsrld_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsrld_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpsrld_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpsrld_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append(instructions, inst_vpsrld_ymm_ymm_xmm(dst, src, src2)) }
-emit_vpsrld_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append(instructions, inst_vpsrld_ymm_ymm_m128(dst, src, src2)) }
-emit_vpsrld_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpsrld_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpsrld_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsrld_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsrld_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsrld_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsrld_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpsrld_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpsrld_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append_elem(instructions, inst_vpsrld_ymm_ymm_xmm(dst, src, src2)) }
+emit_vpsrld_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append_elem(instructions, inst_vpsrld_ymm_ymm_m128(dst, src, src2)) }
+emit_vpsrld_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpsrld_ymm_ymm_imm8(dst, src, imm)) }
 inst_vpsrlq_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1322) }
 inst_vpsrlq_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1322) }
 inst_vpsrlq_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1323) }
 inst_vpsrlq_ymm_ymm_xmm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), {}} }, 1324) }
 inst_vpsrlq_ymm_ymm_m128            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), {}} }, 1324) }
 inst_vpsrlq_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1325) }
-emit_vpsrlq_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsrlq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsrlq_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsrlq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsrlq_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpsrlq_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpsrlq_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append(instructions, inst_vpsrlq_ymm_ymm_xmm(dst, src, src2)) }
-emit_vpsrlq_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append(instructions, inst_vpsrlq_ymm_ymm_m128(dst, src, src2)) }
-emit_vpsrlq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpsrlq_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpsrlq_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsrlq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsrlq_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsrlq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsrlq_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpsrlq_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpsrlq_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append_elem(instructions, inst_vpsrlq_ymm_ymm_xmm(dst, src, src2)) }
+emit_vpsrlq_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append_elem(instructions, inst_vpsrlq_ymm_ymm_m128(dst, src, src2)) }
+emit_vpsrlq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpsrlq_ymm_ymm_imm8(dst, src, imm)) }
 inst_vpsraw_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1326) }
 inst_vpsraw_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1326) }
 inst_vpsraw_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1327) }
 inst_vpsraw_ymm_ymm_xmm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), {}} }, 1328) }
 inst_vpsraw_ymm_ymm_m128            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), {}} }, 1328) }
 inst_vpsraw_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1329) }
-emit_vpsraw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsraw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsraw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsraw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsraw_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpsraw_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpsraw_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append(instructions, inst_vpsraw_ymm_ymm_xmm(dst, src, src2)) }
-emit_vpsraw_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append(instructions, inst_vpsraw_ymm_ymm_m128(dst, src, src2)) }
-emit_vpsraw_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpsraw_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpsraw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsraw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsraw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsraw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsraw_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpsraw_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpsraw_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append_elem(instructions, inst_vpsraw_ymm_ymm_xmm(dst, src, src2)) }
+emit_vpsraw_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append_elem(instructions, inst_vpsraw_ymm_ymm_m128(dst, src, src2)) }
+emit_vpsraw_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpsraw_ymm_ymm_imm8(dst, src, imm)) }
 inst_vpsrad_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1330) }
 inst_vpsrad_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1330) }
 inst_vpsrad_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1331) }
 inst_vpsrad_ymm_ymm_xmm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), {}} }, 1332) }
 inst_vpsrad_ymm_ymm_m128            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), {}} }, 1332) }
 inst_vpsrad_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1333) }
-emit_vpsrad_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsrad_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsrad_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsrad_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsrad_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpsrad_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpsrad_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append(instructions, inst_vpsrad_ymm_ymm_xmm(dst, src, src2)) }
-emit_vpsrad_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append(instructions, inst_vpsrad_ymm_ymm_m128(dst, src, src2)) }
-emit_vpsrad_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpsrad_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpsrad_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsrad_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsrad_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsrad_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsrad_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpsrad_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpsrad_ymm_ymm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM) { append_elem(instructions, inst_vpsrad_ymm_ymm_xmm(dst, src, src2)) }
+emit_vpsrad_ymm_ymm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128) { append_elem(instructions, inst_vpsrad_ymm_ymm_m128(dst, src, src2)) }
+emit_vpsrad_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpsrad_ymm_ymm_imm8(dst, src, imm)) }
 inst_vpcmpeqb_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1334) }
 inst_vpcmpeqb_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1334) }
 inst_vpcmpeqb_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1335) }
 inst_vpcmpeqb_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1335) }
-emit_vpcmpeqb_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpcmpeqb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpcmpeqb_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpcmpeqb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpcmpeqb_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpcmpeqb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpcmpeqb_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpcmpeqb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpcmpeqb_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpcmpeqb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpcmpeqb_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpcmpeqb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpcmpeqb_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpcmpeqb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpcmpeqb_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpcmpeqb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpcmpeqw_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1336) }
 inst_vpcmpeqw_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1336) }
 inst_vpcmpeqw_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1337) }
 inst_vpcmpeqw_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1337) }
-emit_vpcmpeqw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpcmpeqw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpcmpeqw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpcmpeqw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpcmpeqw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpcmpeqw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpcmpeqw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpcmpeqw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpcmpeqw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpcmpeqw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpcmpeqw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpcmpeqw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpcmpeqw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpcmpeqw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpcmpeqw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpcmpeqw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpcmpeqd_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1338) }
 inst_vpcmpeqd_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1338) }
 inst_vpcmpeqd_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1339) }
 inst_vpcmpeqd_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1339) }
-emit_vpcmpeqd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpcmpeqd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpcmpeqd_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpcmpeqd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpcmpeqd_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpcmpeqd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpcmpeqd_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpcmpeqd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpcmpeqd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpcmpeqd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpcmpeqd_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpcmpeqd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpcmpeqd_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpcmpeqd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpcmpeqd_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpcmpeqd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpcmpeqq_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1340) }
 inst_vpcmpeqq_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1340) }
 inst_vpcmpeqq_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1341) }
 inst_vpcmpeqq_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPEQQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1341) }
-emit_vpcmpeqq_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpcmpeqq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpcmpeqq_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpcmpeqq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpcmpeqq_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpcmpeqq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpcmpeqq_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpcmpeqq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpcmpeqq_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpcmpeqq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpcmpeqq_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpcmpeqq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpcmpeqq_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpcmpeqq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpcmpeqq_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpcmpeqq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpcmpgtb_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1342) }
 inst_vpcmpgtb_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1342) }
 inst_vpcmpgtb_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1343) }
 inst_vpcmpgtb_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1343) }
-emit_vpcmpgtb_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpcmpgtb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpcmpgtb_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpcmpgtb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpcmpgtb_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpcmpgtb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpcmpgtb_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpcmpgtb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpcmpgtb_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpcmpgtb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpcmpgtb_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpcmpgtb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpcmpgtb_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpcmpgtb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpcmpgtb_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpcmpgtb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpcmpgtw_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1344) }
 inst_vpcmpgtw_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1344) }
 inst_vpcmpgtw_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1345) }
 inst_vpcmpgtw_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1345) }
-emit_vpcmpgtw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpcmpgtw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpcmpgtw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpcmpgtw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpcmpgtw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpcmpgtw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpcmpgtw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpcmpgtw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpcmpgtw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpcmpgtw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpcmpgtw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpcmpgtw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpcmpgtw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpcmpgtw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpcmpgtw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpcmpgtw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpcmpgtd_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1346) }
 inst_vpcmpgtd_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1346) }
 inst_vpcmpgtd_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1347) }
 inst_vpcmpgtd_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1347) }
-emit_vpcmpgtd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpcmpgtd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpcmpgtd_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpcmpgtd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpcmpgtd_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpcmpgtd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpcmpgtd_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpcmpgtd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpcmpgtd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpcmpgtd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpcmpgtd_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpcmpgtd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpcmpgtd_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpcmpgtd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpcmpgtd_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpcmpgtd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpcmpgtq_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1348) }
 inst_vpcmpgtq_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1348) }
 inst_vpcmpgtq_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1349) }
 inst_vpcmpgtq_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPGTQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1349) }
-emit_vpcmpgtq_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpcmpgtq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpcmpgtq_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpcmpgtq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpcmpgtq_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpcmpgtq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpcmpgtq_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpcmpgtq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpcmpgtq_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpcmpgtq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpcmpgtq_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpcmpgtq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpcmpgtq_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpcmpgtq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpcmpgtq_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpcmpgtq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpacksswb_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKSSWB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1350) }
 inst_vpacksswb_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKSSWB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1350) }
 inst_vpacksswb_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKSSWB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1351) }
 inst_vpacksswb_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKSSWB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1351) }
-emit_vpacksswb_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpacksswb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpacksswb_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpacksswb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpacksswb_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpacksswb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpacksswb_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpacksswb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpacksswb_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpacksswb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpacksswb_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpacksswb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpacksswb_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpacksswb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpacksswb_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpacksswb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpackssdw_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKSSDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1352) }
 inst_vpackssdw_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKSSDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1352) }
 inst_vpackssdw_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKSSDW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1353) }
 inst_vpackssdw_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKSSDW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1353) }
-emit_vpackssdw_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpackssdw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpackssdw_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpackssdw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpackssdw_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpackssdw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpackssdw_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpackssdw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpackssdw_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpackssdw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpackssdw_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpackssdw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpackssdw_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpackssdw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpackssdw_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpackssdw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpackuswb_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKUSWB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1354) }
 inst_vpackuswb_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKUSWB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1354) }
 inst_vpackuswb_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKUSWB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1355) }
 inst_vpackuswb_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKUSWB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1355) }
-emit_vpackuswb_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpackuswb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpackuswb_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpackuswb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpackuswb_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpackuswb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpackuswb_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpackuswb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpackuswb_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpackuswb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpackuswb_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpackuswb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpackuswb_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpackuswb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpackuswb_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpackuswb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpackusdw_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKUSDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1356) }
 inst_vpackusdw_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKUSDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1356) }
 inst_vpackusdw_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKUSDW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1357) }
 inst_vpackusdw_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPACKUSDW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1357) }
-emit_vpackusdw_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpackusdw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpackusdw_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpackusdw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpackusdw_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpackusdw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpackusdw_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpackusdw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpackusdw_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpackusdw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpackusdw_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpackusdw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpackusdw_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpackusdw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpackusdw_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpackusdw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpunpcklbw_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1358) }
 inst_vpunpcklbw_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1358) }
 inst_vpunpcklbw_ymm_ymm_ymm         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLBW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1359) }
 inst_vpunpcklbw_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLBW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1359) }
-emit_vpunpcklbw_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpunpcklbw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpunpcklbw_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpunpcklbw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpunpcklbw_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpunpcklbw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpunpcklbw_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpunpcklbw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpunpcklbw_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpunpcklbw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpunpcklbw_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpunpcklbw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpunpcklbw_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpunpcklbw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpunpcklbw_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpunpcklbw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpunpcklwd_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLWD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1360) }
 inst_vpunpcklwd_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLWD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1360) }
 inst_vpunpcklwd_ymm_ymm_ymm         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLWD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1361) }
 inst_vpunpcklwd_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLWD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1361) }
-emit_vpunpcklwd_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpunpcklwd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpunpcklwd_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpunpcklwd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpunpcklwd_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpunpcklwd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpunpcklwd_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpunpcklwd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpunpcklwd_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpunpcklwd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpunpcklwd_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpunpcklwd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpunpcklwd_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpunpcklwd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpunpcklwd_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpunpcklwd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpunpckldq_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1362) }
 inst_vpunpckldq_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1362) }
 inst_vpunpckldq_ymm_ymm_ymm         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1363) }
 inst_vpunpckldq_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1363) }
-emit_vpunpckldq_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpunpckldq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpunpckldq_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpunpckldq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpunpckldq_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpunpckldq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpunpckldq_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpunpckldq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpunpckldq_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpunpckldq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpunpckldq_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpunpckldq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpunpckldq_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpunpckldq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpunpckldq_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpunpckldq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpunpcklqdq_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLQDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1364) }
 inst_vpunpcklqdq_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLQDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1364) }
 inst_vpunpcklqdq_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLQDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1365) }
 inst_vpunpcklqdq_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKLQDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1365) }
-emit_vpunpcklqdq_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpunpcklqdq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpunpcklqdq_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpunpcklqdq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpunpcklqdq_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpunpcklqdq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpunpcklqdq_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpunpcklqdq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpunpcklqdq_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpunpcklqdq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpunpcklqdq_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpunpcklqdq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpunpcklqdq_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpunpcklqdq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpunpcklqdq_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpunpcklqdq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpunpckhbw_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1366) }
 inst_vpunpckhbw_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1366) }
 inst_vpunpckhbw_ymm_ymm_ymm         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHBW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1367) }
 inst_vpunpckhbw_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHBW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1367) }
-emit_vpunpckhbw_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpunpckhbw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpunpckhbw_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpunpckhbw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpunpckhbw_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpunpckhbw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpunpckhbw_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpunpckhbw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpunpckhbw_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpunpckhbw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpunpckhbw_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpunpckhbw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpunpckhbw_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpunpckhbw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpunpckhbw_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpunpckhbw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpunpckhwd_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHWD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1368) }
 inst_vpunpckhwd_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHWD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1368) }
 inst_vpunpckhwd_ymm_ymm_ymm         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHWD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1369) }
 inst_vpunpckhwd_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHWD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1369) }
-emit_vpunpckhwd_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpunpckhwd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpunpckhwd_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpunpckhwd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpunpckhwd_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpunpckhwd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpunpckhwd_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpunpckhwd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpunpckhwd_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpunpckhwd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpunpckhwd_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpunpckhwd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpunpckhwd_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpunpckhwd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpunpckhwd_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpunpckhwd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpunpckhdq_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1370) }
 inst_vpunpckhdq_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1370) }
 inst_vpunpckhdq_ymm_ymm_ymm         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1371) }
 inst_vpunpckhdq_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1371) }
-emit_vpunpckhdq_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpunpckhdq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpunpckhdq_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpunpckhdq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpunpckhdq_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpunpckhdq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpunpckhdq_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpunpckhdq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpunpckhdq_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpunpckhdq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpunpckhdq_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpunpckhdq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpunpckhdq_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpunpckhdq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpunpckhdq_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpunpckhdq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpunpckhqdq_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHQDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1372) }
 inst_vpunpckhqdq_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHQDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1372) }
 inst_vpunpckhqdq_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHQDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1373) }
 inst_vpunpckhqdq_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPUNPCKHQDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1373) }
-emit_vpunpckhqdq_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpunpckhqdq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpunpckhqdq_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpunpckhqdq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpunpckhqdq_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpunpckhqdq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpunpckhqdq_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpunpckhqdq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpunpckhqdq_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpunpckhqdq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpunpckhqdq_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpunpckhqdq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpunpckhqdq_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpunpckhqdq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpunpckhqdq_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpunpckhqdq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpshufd_xmm_xmm_imm8           :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1374) }
 inst_vpshufd_xmm_m128_imm8          :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1374) }
 inst_vpshufd_ymm_ymm_imm8           :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1375) }
 inst_vpshufd_ymm_m256_imm8          :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFD, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1375) }
-emit_vpshufd_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpshufd_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpshufd_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vpshufd_xmm_m128_imm8(dst, src, imm)) }
-emit_vpshufd_ymm_ymm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpshufd_ymm_ymm_imm8(dst, src, imm)) }
-emit_vpshufd_ymm_m256_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vpshufd_ymm_m256_imm8(dst, src, imm)) }
+emit_vpshufd_xmm_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpshufd_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpshufd_xmm_m128_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vpshufd_xmm_m128_imm8(dst, src, imm)) }
+emit_vpshufd_ymm_ymm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpshufd_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpshufd_ymm_m256_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vpshufd_ymm_m256_imm8(dst, src, imm)) }
 inst_vpshufhw_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFHW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1376) }
 inst_vpshufhw_xmm_m128_imm8         :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFHW, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1376) }
 inst_vpshufhw_ymm_ymm_imm8          :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFHW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1377) }
 inst_vpshufhw_ymm_m256_imm8         :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFHW, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1377) }
-emit_vpshufhw_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpshufhw_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpshufhw_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vpshufhw_xmm_m128_imm8(dst, src, imm)) }
-emit_vpshufhw_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpshufhw_ymm_ymm_imm8(dst, src, imm)) }
-emit_vpshufhw_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vpshufhw_ymm_m256_imm8(dst, src, imm)) }
+emit_vpshufhw_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpshufhw_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpshufhw_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vpshufhw_xmm_m128_imm8(dst, src, imm)) }
+emit_vpshufhw_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpshufhw_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpshufhw_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vpshufhw_ymm_m256_imm8(dst, src, imm)) }
 inst_vpshuflw_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFLW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1378) }
 inst_vpshuflw_xmm_m128_imm8         :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFLW, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1378) }
 inst_vpshuflw_ymm_ymm_imm8          :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFLW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1379) }
 inst_vpshuflw_ymm_m256_imm8         :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFLW, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1379) }
-emit_vpshuflw_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vpshuflw_xmm_xmm_imm8(dst, src, imm)) }
-emit_vpshuflw_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vpshuflw_xmm_m128_imm8(dst, src, imm)) }
-emit_vpshuflw_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpshuflw_ymm_ymm_imm8(dst, src, imm)) }
-emit_vpshuflw_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vpshuflw_ymm_m256_imm8(dst, src, imm)) }
+emit_vpshuflw_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vpshuflw_xmm_xmm_imm8(dst, src, imm)) }
+emit_vpshuflw_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vpshuflw_xmm_m128_imm8(dst, src, imm)) }
+emit_vpshuflw_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpshuflw_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpshuflw_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vpshuflw_ymm_m256_imm8(dst, src, imm)) }
 inst_vpextrb_r8_xmm_imm8            :: #force_inline proc "contextless" (dst: GPR8, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRB, operand_count = 3, ops = {op_gpr8(dst), op_xmm(src), op_imm8(imm), {}} }, 1380) }
 inst_vpextrb_m8_xmm_imm8            :: #force_inline proc "contextless" (dst: Mem8, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRB, operand_count = 3, ops = {op_mem(dst.mem, 1), op_xmm(src), op_imm8(imm), {}} }, 1380) }
-emit_vpextrb_r8_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: XMM, imm: i8) { append(instructions, inst_vpextrb_r8_xmm_imm8(dst, src, imm)) }
-emit_vpextrb_m8_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: XMM, imm: i8) { append(instructions, inst_vpextrb_m8_xmm_imm8(dst, src, imm)) }
+emit_vpextrb_r8_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrb_r8_xmm_imm8(dst, src, imm)) }
+emit_vpextrb_m8_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrb_m8_xmm_imm8(dst, src, imm)) }
 inst_vpextrw_r32_xmm_imm8           :: #force_inline proc "contextless" (dst: GPR32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRW, operand_count = 3, ops = {op_gpr32(dst), op_xmm(src), op_imm8(imm), {}} }, 1381) }
 inst_vpextrw_r16_xmm_imm8           :: #force_inline proc "contextless" (dst: GPR16, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRW, operand_count = 3, ops = {op_gpr16(dst), op_xmm(src), op_imm8(imm), {}} }, 1382) }
 inst_vpextrw_m16_xmm_imm8           :: #force_inline proc "contextless" (dst: Mem16, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRW, operand_count = 3, ops = {op_mem(dst.mem, 2), op_xmm(src), op_imm8(imm), {}} }, 1382) }
-emit_vpextrw_r32_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append(instructions, inst_vpextrw_r32_xmm_imm8(dst, src, imm)) }
-emit_vpextrw_r16_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: XMM, imm: i8) { append(instructions, inst_vpextrw_r16_xmm_imm8(dst, src, imm)) }
-emit_vpextrw_m16_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: XMM, imm: i8) { append(instructions, inst_vpextrw_m16_xmm_imm8(dst, src, imm)) }
+emit_vpextrw_r32_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrw_r32_xmm_imm8(dst, src, imm)) }
+emit_vpextrw_r16_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrw_r16_xmm_imm8(dst, src, imm)) }
+emit_vpextrw_m16_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrw_m16_xmm_imm8(dst, src, imm)) }
 inst_vpextrd_r32_xmm_imm8           :: #force_inline proc "contextless" (dst: GPR32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRD, operand_count = 3, ops = {op_gpr32(dst), op_xmm(src), op_imm8(imm), {}} }, 1383) }
 inst_vpextrd_m32_xmm_imm8           :: #force_inline proc "contextless" (dst: Mem32, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRD, operand_count = 3, ops = {op_mem(dst.mem, 4), op_xmm(src), op_imm8(imm), {}} }, 1383) }
-emit_vpextrd_r32_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append(instructions, inst_vpextrd_r32_xmm_imm8(dst, src, imm)) }
-emit_vpextrd_m32_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM, imm: i8) { append(instructions, inst_vpextrd_m32_xmm_imm8(dst, src, imm)) }
+emit_vpextrd_r32_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrd_r32_xmm_imm8(dst, src, imm)) }
+emit_vpextrd_m32_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrd_m32_xmm_imm8(dst, src, imm)) }
 inst_vpextrq_r64_xmm_imm8           :: #force_inline proc "contextless" (dst: GPR64, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRQ, operand_count = 3, ops = {op_gpr64(dst), op_xmm(src), op_imm8(imm), {}} }, 1384) }
 inst_vpextrq_m64_xmm_imm8           :: #force_inline proc "contextless" (dst: Mem64, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXTRQ, operand_count = 3, ops = {op_mem(dst.mem, 8), op_xmm(src), op_imm8(imm), {}} }, 1384) }
-emit_vpextrq_r64_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM, imm: i8) { append(instructions, inst_vpextrq_r64_xmm_imm8(dst, src, imm)) }
-emit_vpextrq_m64_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM, imm: i8) { append(instructions, inst_vpextrq_m64_xmm_imm8(dst, src, imm)) }
+emit_vpextrq_r64_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrq_r64_xmm_imm8(dst, src, imm)) }
+emit_vpextrq_m64_xmm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM, imm: i8) { append_elem(instructions, inst_vpextrq_m64_xmm_imm8(dst, src, imm)) }
 inst_vpinsrb_xmm_xmm_r8_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: GPR8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPINSRB, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_gpr8(src2), op_imm8(imm)} }, 1385) }
 inst_vpinsrb_xmm_xmm_m8_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem8, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPINSRB, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 1), op_imm8(imm)} }, 1385) }
-emit_vpinsrb_xmm_xmm_r8_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR8, imm: i8) { append(instructions, inst_vpinsrb_xmm_xmm_r8_imm8(dst, src, src2, imm)) }
-emit_vpinsrb_xmm_xmm_m8_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem8, imm: i8) { append(instructions, inst_vpinsrb_xmm_xmm_m8_imm8(dst, src, src2, imm)) }
+emit_vpinsrb_xmm_xmm_r8_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR8, imm: i8) { append_elem(instructions, inst_vpinsrb_xmm_xmm_r8_imm8(dst, src, src2, imm)) }
+emit_vpinsrb_xmm_xmm_m8_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem8, imm: i8) { append_elem(instructions, inst_vpinsrb_xmm_xmm_m8_imm8(dst, src, src2, imm)) }
 inst_vpinsrw_xmm_xmm_r16_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: GPR16, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPINSRW, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_gpr16(src2), op_imm8(imm)} }, 1386) }
 inst_vpinsrw_xmm_xmm_m16_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem16, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPINSRW, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 2), op_imm8(imm)} }, 1386) }
-emit_vpinsrw_xmm_xmm_r16_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR16, imm: i8) { append(instructions, inst_vpinsrw_xmm_xmm_r16_imm8(dst, src, src2, imm)) }
-emit_vpinsrw_xmm_xmm_m16_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem16, imm: i8) { append(instructions, inst_vpinsrw_xmm_xmm_m16_imm8(dst, src, src2, imm)) }
+emit_vpinsrw_xmm_xmm_r16_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR16, imm: i8) { append_elem(instructions, inst_vpinsrw_xmm_xmm_r16_imm8(dst, src, src2, imm)) }
+emit_vpinsrw_xmm_xmm_m16_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem16, imm: i8) { append_elem(instructions, inst_vpinsrw_xmm_xmm_m16_imm8(dst, src, src2, imm)) }
 inst_vpinsrd_xmm_xmm_r32_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: GPR32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPINSRD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_gpr32(src2), op_imm8(imm)} }, 1387) }
 inst_vpinsrd_xmm_xmm_m32_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPINSRD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 1387) }
-emit_vpinsrd_xmm_xmm_r32_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR32, imm: i8) { append(instructions, inst_vpinsrd_xmm_xmm_r32_imm8(dst, src, src2, imm)) }
-emit_vpinsrd_xmm_xmm_m32_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vpinsrd_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vpinsrd_xmm_xmm_r32_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR32, imm: i8) { append_elem(instructions, inst_vpinsrd_xmm_xmm_r32_imm8(dst, src, src2, imm)) }
+emit_vpinsrd_xmm_xmm_m32_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vpinsrd_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vpinsrq_xmm_xmm_r64_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: GPR64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPINSRQ, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_gpr64(src2), op_imm8(imm)} }, 1388) }
 inst_vpinsrq_xmm_xmm_m64_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPINSRQ, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), op_imm8(imm)} }, 1388) }
-emit_vpinsrq_xmm_xmm_r64_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR64, imm: i8) { append(instructions, inst_vpinsrq_xmm_xmm_r64_imm8(dst, src, src2, imm)) }
-emit_vpinsrq_xmm_xmm_m64_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append(instructions, inst_vpinsrq_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
+emit_vpinsrq_xmm_xmm_r64_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: GPR64, imm: i8) { append_elem(instructions, inst_vpinsrq_xmm_xmm_r64_imm8(dst, src, src2, imm)) }
+emit_vpinsrq_xmm_xmm_m64_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append_elem(instructions, inst_vpinsrq_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
 inst_vpmovmskb_r32_xmm              :: #force_inline proc "contextless" (dst: GPR32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVMSKB, operand_count = 2, ops = {op_gpr32(dst), op_xmm(src), {}, {}} }, 1389) }
 inst_vpmovmskb_r32_ymm              :: #force_inline proc "contextless" (dst: GPR32, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVMSKB, operand_count = 2, ops = {op_gpr32(dst), op_ymm(src), {}, {}} }, 1390) }
-emit_vpmovmskb_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append(instructions, inst_vpmovmskb_r32_xmm(dst, src)) }
-emit_vpmovmskb_r32_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: YMM) { append(instructions, inst_vpmovmskb_r32_ymm(dst, src)) }
+emit_vpmovmskb_r32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: XMM) { append_elem(instructions, inst_vpmovmskb_r32_xmm(dst, src)) }
+emit_vpmovmskb_r32_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: YMM) { append_elem(instructions, inst_vpmovmskb_r32_ymm(dst, src)) }
 inst_vptest_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTEST, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1391) }
 inst_vptest_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTEST, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1391) }
 inst_vptest_ymm_ymm                 :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTEST, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1392) }
 inst_vptest_ymm_m256                :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTEST, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1392) }
-emit_vptest_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vptest_xmm_xmm(dst, src)) }
-emit_vptest_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vptest_xmm_m128(dst, src)) }
-emit_vptest_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vptest_ymm_ymm(dst, src)) }
-emit_vptest_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vptest_ymm_m256(dst, src)) }
+emit_vptest_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vptest_xmm_xmm(dst, src)) }
+emit_vptest_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vptest_xmm_m128(dst, src)) }
+emit_vptest_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vptest_ymm_ymm(dst, src)) }
+emit_vptest_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vptest_ymm_m256(dst, src)) }
 inst_vpshufb_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1393) }
 inst_vpshufb_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1393) }
 inst_vpshufb_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1394) }
 inst_vpshufb_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSHUFB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1394) }
-emit_vpshufb_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpshufb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpshufb_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpshufb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpshufb_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpshufb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpshufb_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpshufb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpshufb_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpshufb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpshufb_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpshufb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpshufb_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpshufb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpshufb_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpshufb_ymm_ymm_m256(dst, src, src2)) }
 inst_vphaddw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1395) }
 inst_vphaddw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1395) }
 inst_vphaddw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1396) }
 inst_vphaddw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1396) }
-emit_vphaddw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vphaddw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vphaddw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vphaddw_xmm_xmm_m128(dst, src, src2)) }
-emit_vphaddw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vphaddw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vphaddw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vphaddw_ymm_ymm_m256(dst, src, src2)) }
+emit_vphaddw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vphaddw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vphaddw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vphaddw_xmm_xmm_m128(dst, src, src2)) }
+emit_vphaddw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vphaddw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vphaddw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vphaddw_ymm_ymm_m256(dst, src, src2)) }
 inst_vphaddd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1397) }
 inst_vphaddd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1397) }
 inst_vphaddd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1398) }
 inst_vphaddd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1398) }
-emit_vphaddd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vphaddd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vphaddd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vphaddd_xmm_xmm_m128(dst, src, src2)) }
-emit_vphaddd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vphaddd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vphaddd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vphaddd_ymm_ymm_m256(dst, src, src2)) }
+emit_vphaddd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vphaddd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vphaddd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vphaddd_xmm_xmm_m128(dst, src, src2)) }
+emit_vphaddd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vphaddd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vphaddd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vphaddd_ymm_ymm_m256(dst, src, src2)) }
 inst_vphaddsw_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDSW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1399) }
 inst_vphaddsw_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDSW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1399) }
 inst_vphaddsw_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDSW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1400) }
 inst_vphaddsw_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHADDSW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1400) }
-emit_vphaddsw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vphaddsw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vphaddsw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vphaddsw_xmm_xmm_m128(dst, src, src2)) }
-emit_vphaddsw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vphaddsw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vphaddsw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vphaddsw_ymm_ymm_m256(dst, src, src2)) }
+emit_vphaddsw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vphaddsw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vphaddsw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vphaddsw_xmm_xmm_m128(dst, src, src2)) }
+emit_vphaddsw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vphaddsw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vphaddsw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vphaddsw_ymm_ymm_m256(dst, src, src2)) }
 inst_vphsubw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1401) }
 inst_vphsubw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1401) }
 inst_vphsubw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1402) }
 inst_vphsubw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1402) }
-emit_vphsubw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vphsubw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vphsubw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vphsubw_xmm_xmm_m128(dst, src, src2)) }
-emit_vphsubw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vphsubw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vphsubw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vphsubw_ymm_ymm_m256(dst, src, src2)) }
+emit_vphsubw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vphsubw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vphsubw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vphsubw_xmm_xmm_m128(dst, src, src2)) }
+emit_vphsubw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vphsubw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vphsubw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vphsubw_ymm_ymm_m256(dst, src, src2)) }
 inst_vphsubd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1403) }
 inst_vphsubd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1403) }
 inst_vphsubd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1404) }
 inst_vphsubd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1404) }
-emit_vphsubd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vphsubd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vphsubd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vphsubd_xmm_xmm_m128(dst, src, src2)) }
-emit_vphsubd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vphsubd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vphsubd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vphsubd_ymm_ymm_m256(dst, src, src2)) }
+emit_vphsubd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vphsubd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vphsubd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vphsubd_xmm_xmm_m128(dst, src, src2)) }
+emit_vphsubd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vphsubd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vphsubd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vphsubd_ymm_ymm_m256(dst, src, src2)) }
 inst_vphsubsw_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBSW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1405) }
 inst_vphsubsw_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBSW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1405) }
 inst_vphsubsw_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBSW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1406) }
 inst_vphsubsw_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHSUBSW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1406) }
-emit_vphsubsw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vphsubsw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vphsubsw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vphsubsw_xmm_xmm_m128(dst, src, src2)) }
-emit_vphsubsw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vphsubsw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vphsubsw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vphsubsw_ymm_ymm_m256(dst, src, src2)) }
+emit_vphsubsw_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vphsubsw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vphsubsw_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vphsubsw_xmm_xmm_m128(dst, src, src2)) }
+emit_vphsubsw_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vphsubsw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vphsubsw_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vphsubsw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmaddubsw_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMADDUBSW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1407) }
 inst_vpmaddubsw_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMADDUBSW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1407) }
 inst_vpmaddubsw_ymm_ymm_ymm         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMADDUBSW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1408) }
 inst_vpmaddubsw_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMADDUBSW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1408) }
-emit_vpmaddubsw_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmaddubsw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmaddubsw_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmaddubsw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmaddubsw_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmaddubsw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmaddubsw_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmaddubsw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmaddubsw_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmaddubsw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmaddubsw_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmaddubsw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmaddubsw_ymm_ymm_ymm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmaddubsw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmaddubsw_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmaddubsw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmulhrsw_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHRSW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1409) }
 inst_vpmulhrsw_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHRSW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1409) }
 inst_vpmulhrsw_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHRSW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1410) }
 inst_vpmulhrsw_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULHRSW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1410) }
-emit_vpmulhrsw_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmulhrsw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmulhrsw_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmulhrsw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmulhrsw_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmulhrsw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmulhrsw_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmulhrsw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmulhrsw_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmulhrsw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmulhrsw_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmulhrsw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmulhrsw_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmulhrsw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmulhrsw_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmulhrsw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsignb_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGNB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1411) }
 inst_vpsignb_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGNB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1411) }
 inst_vpsignb_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGNB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1412) }
 inst_vpsignb_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGNB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1412) }
-emit_vpsignb_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsignb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsignb_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsignb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsignb_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsignb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsignb_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsignb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsignb_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsignb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsignb_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsignb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsignb_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsignb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsignb_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsignb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsignw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGNW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1413) }
 inst_vpsignw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGNW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1413) }
 inst_vpsignw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGNW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1414) }
 inst_vpsignw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGNW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1414) }
-emit_vpsignw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsignw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsignw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsignw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsignw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsignw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsignw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsignw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsignw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsignw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsignw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsignw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsignw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsignw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsignw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsignw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsignd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGND, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1415) }
 inst_vpsignd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGND, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1415) }
 inst_vpsignd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGND, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1416) }
 inst_vpsignd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSIGND, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1416) }
-emit_vpsignd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsignd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsignd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsignd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsignd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsignd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsignd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsignd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsignd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsignd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsignd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsignd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsignd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsignd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsignd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsignd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpabsb_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1417) }
 inst_vpabsb_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSB, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1417) }
 inst_vpabsb_ymm_ymm                 :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSB, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1418) }
 inst_vpabsb_ymm_m256                :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSB, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1418) }
-emit_vpabsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpabsb_xmm_xmm(dst, src)) }
-emit_vpabsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vpabsb_xmm_m128(dst, src)) }
-emit_vpabsb_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpabsb_ymm_ymm(dst, src)) }
-emit_vpabsb_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vpabsb_ymm_m256(dst, src)) }
+emit_vpabsb_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpabsb_xmm_xmm(dst, src)) }
+emit_vpabsb_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vpabsb_xmm_m128(dst, src)) }
+emit_vpabsb_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpabsb_ymm_ymm(dst, src)) }
+emit_vpabsb_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vpabsb_ymm_m256(dst, src)) }
 inst_vpabsw_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1419) }
 inst_vpabsw_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1419) }
 inst_vpabsw_ymm_ymm                 :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSW, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1420) }
 inst_vpabsw_ymm_m256                :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSW, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1420) }
-emit_vpabsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpabsw_xmm_xmm(dst, src)) }
-emit_vpabsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vpabsw_xmm_m128(dst, src)) }
-emit_vpabsw_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpabsw_ymm_ymm(dst, src)) }
-emit_vpabsw_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vpabsw_ymm_m256(dst, src)) }
+emit_vpabsw_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpabsw_xmm_xmm(dst, src)) }
+emit_vpabsw_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vpabsw_xmm_m128(dst, src)) }
+emit_vpabsw_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpabsw_ymm_ymm(dst, src)) }
+emit_vpabsw_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vpabsw_ymm_m256(dst, src)) }
 inst_vpabsd_xmm_xmm                 :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1421) }
 inst_vpabsd_xmm_m128                :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1421) }
 inst_vpabsd_ymm_ymm                 :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1422) }
 inst_vpabsd_ymm_m256                :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPABSD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1422) }
-emit_vpabsd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpabsd_xmm_xmm(dst, src)) }
-emit_vpabsd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vpabsd_xmm_m128(dst, src)) }
-emit_vpabsd_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpabsd_ymm_ymm(dst, src)) }
-emit_vpabsd_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vpabsd_ymm_m256(dst, src)) }
+emit_vpabsd_xmm_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpabsd_xmm_xmm(dst, src)) }
+emit_vpabsd_xmm_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vpabsd_xmm_m128(dst, src)) }
+emit_vpabsd_ymm_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpabsd_ymm_ymm(dst, src)) }
+emit_vpabsd_ymm_m256                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vpabsd_ymm_m256(dst, src)) }
 inst_vpalignr_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPALIGNR, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1423) }
 inst_vpalignr_xmm_xmm_m128_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPALIGNR, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1423) }
 inst_vpalignr_ymm_ymm_ymm_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPALIGNR, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1424) }
 inst_vpalignr_ymm_ymm_m256_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPALIGNR, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1424) }
-emit_vpalignr_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpalignr_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpalignr_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpalignr_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpalignr_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpalignr_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpalignr_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpalignr_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpalignr_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpalignr_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpalignr_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpalignr_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpalignr_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpalignr_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpalignr_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpalignr_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vpblendw_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDW, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1425) }
 inst_vpblendw_xmm_xmm_m128_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDW, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1425) }
 inst_vpblendw_ymm_ymm_ymm_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDW, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1426) }
 inst_vpblendw_ymm_ymm_m256_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDW, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1426) }
-emit_vpblendw_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpblendw_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpblendw_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpblendw_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpblendw_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpblendw_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpblendw_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpblendw_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpblendw_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpblendw_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpblendw_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpblendw_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpblendw_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpblendw_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpblendw_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpblendw_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vpblendvb_xmm_xmm_xmm_xmm      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, src3: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDVB, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_xmm(src3)} }, 1427) }
 inst_vpblendvb_xmm_xmm_m128_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, src3: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDVB, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_xmm(src3)} }, 1427) }
 inst_vpblendvb_ymm_ymm_ymm_ymm      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, src3: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDVB, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_ymm(src3)} }, 1428) }
 inst_vpblendvb_ymm_ymm_m256_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, src3: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDVB, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_ymm(src3)} }, 1428) }
-emit_vpblendvb_xmm_xmm_xmm_xmm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, src3: XMM) { append(instructions, inst_vpblendvb_xmm_xmm_xmm_xmm(dst, src, src2, src3)) }
-emit_vpblendvb_xmm_xmm_m128_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, src3: XMM) { append(instructions, inst_vpblendvb_xmm_xmm_m128_xmm(dst, src, src2, src3)) }
-emit_vpblendvb_ymm_ymm_ymm_ymm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, src3: YMM) { append(instructions, inst_vpblendvb_ymm_ymm_ymm_ymm(dst, src, src2, src3)) }
-emit_vpblendvb_ymm_ymm_m256_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, src3: YMM) { append(instructions, inst_vpblendvb_ymm_ymm_m256_ymm(dst, src, src2, src3)) }
+emit_vpblendvb_xmm_xmm_xmm_xmm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, src3: XMM) { append_elem(instructions, inst_vpblendvb_xmm_xmm_xmm_xmm(dst, src, src2, src3)) }
+emit_vpblendvb_xmm_xmm_m128_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, src3: XMM) { append_elem(instructions, inst_vpblendvb_xmm_xmm_m128_xmm(dst, src, src2, src3)) }
+emit_vpblendvb_ymm_ymm_ymm_ymm      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, src3: YMM) { append_elem(instructions, inst_vpblendvb_ymm_ymm_ymm_ymm(dst, src, src2, src3)) }
+emit_vpblendvb_ymm_ymm_m256_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, src3: YMM) { append_elem(instructions, inst_vpblendvb_ymm_ymm_m256_ymm(dst, src, src2, src3)) }
 inst_vmpsadbw_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VMPSADBW, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1429) }
 inst_vmpsadbw_xmm_xmm_m128_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VMPSADBW, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1429) }
 inst_vmpsadbw_ymm_ymm_ymm_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VMPSADBW, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1430) }
 inst_vmpsadbw_ymm_ymm_m256_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VMPSADBW, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1430) }
-emit_vmpsadbw_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vmpsadbw_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vmpsadbw_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vmpsadbw_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vmpsadbw_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vmpsadbw_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vmpsadbw_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vmpsadbw_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vmpsadbw_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vmpsadbw_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vmpsadbw_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vmpsadbw_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vmpsadbw_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vmpsadbw_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vmpsadbw_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vmpsadbw_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vphminposuw_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHMINPOSUW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1431) }
 inst_vphminposuw_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPHMINPOSUW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1431) }
-emit_vphminposuw_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vphminposuw_xmm_xmm(dst, src)) }
-emit_vphminposuw_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vphminposuw_xmm_m128(dst, src)) }
+emit_vphminposuw_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vphminposuw_xmm_xmm(dst, src)) }
+emit_vphminposuw_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vphminposuw_xmm_m128(dst, src)) }
 inst_vpmaxsb_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXSB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1432) }
 inst_vpmaxsb_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXSB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1432) }
 inst_vpmaxsb_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXSB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1433) }
 inst_vpmaxsb_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXSB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1433) }
-emit_vpmaxsb_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmaxsb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmaxsb_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmaxsb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmaxsb_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmaxsb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmaxsb_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmaxsb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmaxsb_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmaxsb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmaxsb_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmaxsb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmaxsb_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmaxsb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmaxsb_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmaxsb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmaxsd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1434) }
 inst_vpmaxsd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1434) }
 inst_vpmaxsd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXSD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1435) }
 inst_vpmaxsd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXSD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1435) }
-emit_vpmaxsd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmaxsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmaxsd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmaxsd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmaxsd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmaxsd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmaxsd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmaxsd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmaxsd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmaxsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmaxsd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmaxsd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmaxsd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmaxsd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmaxsd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmaxsd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmaxuw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXUW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1436) }
 inst_vpmaxuw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXUW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1436) }
 inst_vpmaxuw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXUW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1437) }
 inst_vpmaxuw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXUW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1437) }
-emit_vpmaxuw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmaxuw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmaxuw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmaxuw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmaxuw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmaxuw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmaxuw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmaxuw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmaxuw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmaxuw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmaxuw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmaxuw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmaxuw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmaxuw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmaxuw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmaxuw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmaxud_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXUD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1438) }
 inst_vpmaxud_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXUD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1438) }
 inst_vpmaxud_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXUD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1439) }
 inst_vpmaxud_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMAXUD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1439) }
-emit_vpmaxud_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmaxud_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmaxud_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmaxud_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmaxud_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmaxud_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmaxud_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmaxud_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmaxud_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmaxud_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmaxud_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmaxud_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmaxud_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmaxud_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmaxud_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmaxud_ymm_ymm_m256(dst, src, src2)) }
 inst_vpminsb_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINSB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1440) }
 inst_vpminsb_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINSB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1440) }
 inst_vpminsb_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINSB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1441) }
 inst_vpminsb_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINSB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1441) }
-emit_vpminsb_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpminsb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpminsb_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpminsb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpminsb_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpminsb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpminsb_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpminsb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpminsb_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpminsb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpminsb_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpminsb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpminsb_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpminsb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpminsb_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpminsb_ymm_ymm_m256(dst, src, src2)) }
 inst_vpminsd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1442) }
 inst_vpminsd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1442) }
 inst_vpminsd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINSD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1443) }
 inst_vpminsd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINSD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1443) }
-emit_vpminsd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpminsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpminsd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpminsd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpminsd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpminsd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpminsd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpminsd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpminsd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpminsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpminsd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpminsd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpminsd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpminsd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpminsd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpminsd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpminuw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINUW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1444) }
 inst_vpminuw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINUW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1444) }
 inst_vpminuw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINUW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1445) }
 inst_vpminuw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINUW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1445) }
-emit_vpminuw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpminuw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpminuw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpminuw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpminuw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpminuw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpminuw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpminuw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpminuw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpminuw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpminuw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpminuw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpminuw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpminuw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpminuw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpminuw_ymm_ymm_m256(dst, src, src2)) }
 inst_vpminud_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINUD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1446) }
 inst_vpminud_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINUD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1446) }
 inst_vpminud_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINUD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1447) }
 inst_vpminud_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMINUD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1447) }
-emit_vpminud_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpminud_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpminud_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpminud_xmm_xmm_m128(dst, src, src2)) }
-emit_vpminud_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpminud_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpminud_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpminud_ymm_ymm_m256(dst, src, src2)) }
+emit_vpminud_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpminud_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpminud_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpminud_xmm_xmm_m128(dst, src, src2)) }
+emit_vpminud_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpminud_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpminud_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpminud_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmovsxbw_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1448) }
 inst_vpmovsxbw_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1448) }
 inst_vpmovsxbw_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBW, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1449) }
 inst_vpmovsxbw_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBW, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1449) }
-emit_vpmovsxbw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsxbw_xmm_xmm(dst, src)) }
-emit_vpmovsxbw_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vpmovsxbw_xmm_m64(dst, src)) }
-emit_vpmovsxbw_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovsxbw_ymm_xmm(dst, src)) }
-emit_vpmovsxbw_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vpmovsxbw_ymm_m128(dst, src)) }
+emit_vpmovsxbw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsxbw_xmm_xmm(dst, src)) }
+emit_vpmovsxbw_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vpmovsxbw_xmm_m64(dst, src)) }
+emit_vpmovsxbw_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovsxbw_ymm_xmm(dst, src)) }
+emit_vpmovsxbw_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vpmovsxbw_ymm_m128(dst, src)) }
 inst_vpmovsxbd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1450) }
 inst_vpmovsxbd_xmm_m32              :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1450) }
 inst_vpmovsxbd_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBD, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1451) }
 inst_vpmovsxbd_ymm_m64              :: #force_inline proc "contextless" (dst: YMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 8), {}, {}} }, 1451) }
-emit_vpmovsxbd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsxbd_xmm_xmm(dst, src)) }
-emit_vpmovsxbd_xmm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vpmovsxbd_xmm_m32(dst, src)) }
-emit_vpmovsxbd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovsxbd_ymm_xmm(dst, src)) }
-emit_vpmovsxbd_ymm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append(instructions, inst_vpmovsxbd_ymm_m64(dst, src)) }
+emit_vpmovsxbd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsxbd_xmm_xmm(dst, src)) }
+emit_vpmovsxbd_xmm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vpmovsxbd_xmm_m32(dst, src)) }
+emit_vpmovsxbd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovsxbd_ymm_xmm(dst, src)) }
+emit_vpmovsxbd_ymm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append_elem(instructions, inst_vpmovsxbd_ymm_m64(dst, src)) }
 inst_vpmovsxbq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1452) }
 inst_vpmovsxbq_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBQ, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1453) }
 inst_vpmovsxbq_ymm_m32              :: #force_inline proc "contextless" (dst: YMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXBQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 4), {}, {}} }, 1453) }
-emit_vpmovsxbq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsxbq_xmm_xmm(dst, src)) }
-emit_vpmovsxbq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovsxbq_ymm_xmm(dst, src)) }
-emit_vpmovsxbq_ymm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem32) { append(instructions, inst_vpmovsxbq_ymm_m32(dst, src)) }
+emit_vpmovsxbq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsxbq_xmm_xmm(dst, src)) }
+emit_vpmovsxbq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovsxbq_ymm_xmm(dst, src)) }
+emit_vpmovsxbq_ymm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem32) { append_elem(instructions, inst_vpmovsxbq_ymm_m32(dst, src)) }
 inst_vpmovsxwd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXWD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1454) }
 inst_vpmovsxwd_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXWD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1454) }
 inst_vpmovsxwd_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXWD, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1455) }
 inst_vpmovsxwd_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXWD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1455) }
-emit_vpmovsxwd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsxwd_xmm_xmm(dst, src)) }
-emit_vpmovsxwd_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vpmovsxwd_xmm_m64(dst, src)) }
-emit_vpmovsxwd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovsxwd_ymm_xmm(dst, src)) }
-emit_vpmovsxwd_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vpmovsxwd_ymm_m128(dst, src)) }
+emit_vpmovsxwd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsxwd_xmm_xmm(dst, src)) }
+emit_vpmovsxwd_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vpmovsxwd_xmm_m64(dst, src)) }
+emit_vpmovsxwd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovsxwd_ymm_xmm(dst, src)) }
+emit_vpmovsxwd_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vpmovsxwd_ymm_m128(dst, src)) }
 inst_vpmovsxwq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXWQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1456) }
 inst_vpmovsxwq_xmm_m32              :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXWQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1456) }
 inst_vpmovsxwq_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXWQ, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1457) }
 inst_vpmovsxwq_ymm_m64              :: #force_inline proc "contextless" (dst: YMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXWQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 8), {}, {}} }, 1457) }
-emit_vpmovsxwq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsxwq_xmm_xmm(dst, src)) }
-emit_vpmovsxwq_xmm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vpmovsxwq_xmm_m32(dst, src)) }
-emit_vpmovsxwq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovsxwq_ymm_xmm(dst, src)) }
-emit_vpmovsxwq_ymm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append(instructions, inst_vpmovsxwq_ymm_m64(dst, src)) }
+emit_vpmovsxwq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsxwq_xmm_xmm(dst, src)) }
+emit_vpmovsxwq_xmm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vpmovsxwq_xmm_m32(dst, src)) }
+emit_vpmovsxwq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovsxwq_ymm_xmm(dst, src)) }
+emit_vpmovsxwq_ymm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append_elem(instructions, inst_vpmovsxwq_ymm_m64(dst, src)) }
 inst_vpmovsxdq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1458) }
 inst_vpmovsxdq_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1458) }
 inst_vpmovsxdq_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXDQ, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1459) }
 inst_vpmovsxdq_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSXDQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1459) }
-emit_vpmovsxdq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsxdq_xmm_xmm(dst, src)) }
-emit_vpmovsxdq_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vpmovsxdq_xmm_m64(dst, src)) }
-emit_vpmovsxdq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovsxdq_ymm_xmm(dst, src)) }
-emit_vpmovsxdq_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vpmovsxdq_ymm_m128(dst, src)) }
+emit_vpmovsxdq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsxdq_xmm_xmm(dst, src)) }
+emit_vpmovsxdq_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vpmovsxdq_xmm_m64(dst, src)) }
+emit_vpmovsxdq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovsxdq_ymm_xmm(dst, src)) }
+emit_vpmovsxdq_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vpmovsxdq_ymm_m128(dst, src)) }
 inst_vpmovzxbw_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1460) }
 inst_vpmovzxbw_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBW, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1460) }
 inst_vpmovzxbw_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBW, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1461) }
 inst_vpmovzxbw_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBW, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1461) }
-emit_vpmovzxbw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovzxbw_xmm_xmm(dst, src)) }
-emit_vpmovzxbw_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vpmovzxbw_xmm_m64(dst, src)) }
-emit_vpmovzxbw_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovzxbw_ymm_xmm(dst, src)) }
-emit_vpmovzxbw_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vpmovzxbw_ymm_m128(dst, src)) }
+emit_vpmovzxbw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovzxbw_xmm_xmm(dst, src)) }
+emit_vpmovzxbw_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vpmovzxbw_xmm_m64(dst, src)) }
+emit_vpmovzxbw_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovzxbw_ymm_xmm(dst, src)) }
+emit_vpmovzxbw_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vpmovzxbw_ymm_m128(dst, src)) }
 inst_vpmovzxbd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1462) }
 inst_vpmovzxbd_xmm_m32              :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1462) }
 inst_vpmovzxbd_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBD, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1463) }
 inst_vpmovzxbd_ymm_m64              :: #force_inline proc "contextless" (dst: YMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 8), {}, {}} }, 1463) }
-emit_vpmovzxbd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovzxbd_xmm_xmm(dst, src)) }
-emit_vpmovzxbd_xmm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vpmovzxbd_xmm_m32(dst, src)) }
-emit_vpmovzxbd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovzxbd_ymm_xmm(dst, src)) }
-emit_vpmovzxbd_ymm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append(instructions, inst_vpmovzxbd_ymm_m64(dst, src)) }
+emit_vpmovzxbd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovzxbd_xmm_xmm(dst, src)) }
+emit_vpmovzxbd_xmm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vpmovzxbd_xmm_m32(dst, src)) }
+emit_vpmovzxbd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovzxbd_ymm_xmm(dst, src)) }
+emit_vpmovzxbd_ymm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append_elem(instructions, inst_vpmovzxbd_ymm_m64(dst, src)) }
 inst_vpmovzxbq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1464) }
 inst_vpmovzxbq_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBQ, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1465) }
 inst_vpmovzxbq_ymm_m32              :: #force_inline proc "contextless" (dst: YMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXBQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 4), {}, {}} }, 1465) }
-emit_vpmovzxbq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovzxbq_xmm_xmm(dst, src)) }
-emit_vpmovzxbq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovzxbq_ymm_xmm(dst, src)) }
-emit_vpmovzxbq_ymm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem32) { append(instructions, inst_vpmovzxbq_ymm_m32(dst, src)) }
+emit_vpmovzxbq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovzxbq_xmm_xmm(dst, src)) }
+emit_vpmovzxbq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovzxbq_ymm_xmm(dst, src)) }
+emit_vpmovzxbq_ymm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem32) { append_elem(instructions, inst_vpmovzxbq_ymm_m32(dst, src)) }
 inst_vpmovzxwd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXWD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1466) }
 inst_vpmovzxwd_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXWD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1466) }
 inst_vpmovzxwd_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXWD, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1467) }
 inst_vpmovzxwd_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXWD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1467) }
-emit_vpmovzxwd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovzxwd_xmm_xmm(dst, src)) }
-emit_vpmovzxwd_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vpmovzxwd_xmm_m64(dst, src)) }
-emit_vpmovzxwd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovzxwd_ymm_xmm(dst, src)) }
-emit_vpmovzxwd_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vpmovzxwd_ymm_m128(dst, src)) }
+emit_vpmovzxwd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovzxwd_xmm_xmm(dst, src)) }
+emit_vpmovzxwd_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vpmovzxwd_xmm_m64(dst, src)) }
+emit_vpmovzxwd_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovzxwd_ymm_xmm(dst, src)) }
+emit_vpmovzxwd_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vpmovzxwd_ymm_m128(dst, src)) }
 inst_vpmovzxwq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXWQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1468) }
 inst_vpmovzxwq_xmm_m32              :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXWQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1468) }
 inst_vpmovzxwq_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXWQ, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1469) }
 inst_vpmovzxwq_ymm_m64              :: #force_inline proc "contextless" (dst: YMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXWQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 8), {}, {}} }, 1469) }
-emit_vpmovzxwq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovzxwq_xmm_xmm(dst, src)) }
-emit_vpmovzxwq_xmm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vpmovzxwq_xmm_m32(dst, src)) }
-emit_vpmovzxwq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovzxwq_ymm_xmm(dst, src)) }
-emit_vpmovzxwq_ymm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append(instructions, inst_vpmovzxwq_ymm_m64(dst, src)) }
+emit_vpmovzxwq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovzxwq_xmm_xmm(dst, src)) }
+emit_vpmovzxwq_xmm_m32              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vpmovzxwq_xmm_m32(dst, src)) }
+emit_vpmovzxwq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovzxwq_ymm_xmm(dst, src)) }
+emit_vpmovzxwq_ymm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append_elem(instructions, inst_vpmovzxwq_ymm_m64(dst, src)) }
 inst_vpmovzxdq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1470) }
 inst_vpmovzxdq_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1470) }
 inst_vpmovzxdq_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXDQ, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1471) }
 inst_vpmovzxdq_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVZXDQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1471) }
-emit_vpmovzxdq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovzxdq_xmm_xmm(dst, src)) }
-emit_vpmovzxdq_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vpmovzxdq_xmm_m64(dst, src)) }
-emit_vpmovzxdq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vpmovzxdq_ymm_xmm(dst, src)) }
-emit_vpmovzxdq_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vpmovzxdq_ymm_m128(dst, src)) }
+emit_vpmovzxdq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovzxdq_xmm_xmm(dst, src)) }
+emit_vpmovzxdq_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vpmovzxdq_xmm_m64(dst, src)) }
+emit_vpmovzxdq_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vpmovzxdq_ymm_xmm(dst, src)) }
+emit_vpmovzxdq_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vpmovzxdq_ymm_m128(dst, src)) }
 inst_vpmuldq_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1472) }
 inst_vpmuldq_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULDQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1472) }
 inst_vpmuldq_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1473) }
 inst_vpmuldq_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULDQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1473) }
-emit_vpmuldq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmuldq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmuldq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmuldq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmuldq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmuldq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmuldq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmuldq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmuldq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmuldq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmuldq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmuldq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmuldq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmuldq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmuldq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmuldq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmulld_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1474) }
 inst_vpmulld_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1474) }
 inst_vpmulld_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1475) }
 inst_vpmulld_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1475) }
-emit_vpmulld_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmulld_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmulld_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmulld_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmulld_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmulld_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmulld_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmulld_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmulld_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmulld_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmulld_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmulld_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmulld_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmulld_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmulld_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmulld_ymm_ymm_m256(dst, src, src2)) }
 inst_vmaskmovdqu_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVDQU, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1476) }
-emit_vmaskmovdqu_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmaskmovdqu_xmm_xmm(dst, src)) }
+emit_vmaskmovdqu_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmaskmovdqu_xmm_xmm(dst, src)) }
 inst_vpclmulqdq_xmm_xmm_xmm_imm8    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCLMULQDQ, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1477) }
 inst_vpclmulqdq_xmm_xmm_m128_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCLMULQDQ, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1477) }
 inst_vpclmulqdq_ymm_ymm_ymm_imm8    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCLMULQDQ, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1478) }
 inst_vpclmulqdq_ymm_ymm_m256_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCLMULQDQ, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1478) }
-emit_vpclmulqdq_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpclmulqdq_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpclmulqdq_xmm_xmm_m128_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpclmulqdq_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpclmulqdq_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpclmulqdq_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpclmulqdq_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpclmulqdq_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpclmulqdq_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpclmulqdq_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpclmulqdq_xmm_xmm_m128_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpclmulqdq_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpclmulqdq_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpclmulqdq_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpclmulqdq_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpclmulqdq_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vaesdec_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESDEC, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1479) }
 inst_vaesdec_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESDEC, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1479) }
-emit_vaesdec_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaesdec_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaesdec_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vaesdec_xmm_xmm_m128(dst, src, src2)) }
+emit_vaesdec_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaesdec_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaesdec_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vaesdec_xmm_xmm_m128(dst, src, src2)) }
 inst_vaesdeclast_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESDECLAST, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1480) }
 inst_vaesdeclast_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESDECLAST, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1480) }
-emit_vaesdeclast_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaesdeclast_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaesdeclast_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vaesdeclast_xmm_xmm_m128(dst, src, src2)) }
+emit_vaesdeclast_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaesdeclast_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaesdeclast_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vaesdeclast_xmm_xmm_m128(dst, src, src2)) }
 inst_vaesenc_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESENC, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1481) }
 inst_vaesenc_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESENC, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1481) }
-emit_vaesenc_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaesenc_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaesenc_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vaesenc_xmm_xmm_m128(dst, src, src2)) }
+emit_vaesenc_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaesenc_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaesenc_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vaesenc_xmm_xmm_m128(dst, src, src2)) }
 inst_vaesenclast_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESENCLAST, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1482) }
 inst_vaesenclast_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESENCLAST, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1482) }
-emit_vaesenclast_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vaesenclast_xmm_xmm_xmm(dst, src, src2)) }
-emit_vaesenclast_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vaesenclast_xmm_xmm_m128(dst, src, src2)) }
+emit_vaesenclast_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vaesenclast_xmm_xmm_xmm(dst, src, src2)) }
+emit_vaesenclast_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vaesenclast_xmm_xmm_m128(dst, src, src2)) }
 inst_vaesimc_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESIMC, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1483) }
 inst_vaesimc_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESIMC, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1483) }
-emit_vaesimc_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vaesimc_xmm_xmm(dst, src)) }
-emit_vaesimc_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vaesimc_xmm_m128(dst, src)) }
+emit_vaesimc_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vaesimc_xmm_xmm(dst, src)) }
+emit_vaesimc_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vaesimc_xmm_m128(dst, src)) }
 inst_vaeskeygenassist_xmm_xmm_imm8  :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESKEYGENASSIST, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1484) }
 inst_vaeskeygenassist_xmm_m128_imm8 :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VAESKEYGENASSIST, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1484) }
-emit_vaeskeygenassist_xmm_xmm_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vaeskeygenassist_xmm_xmm_imm8(dst, src, imm)) }
-emit_vaeskeygenassist_xmm_m128_imm8 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vaeskeygenassist_xmm_m128_imm8(dst, src, imm)) }
+emit_vaeskeygenassist_xmm_xmm_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vaeskeygenassist_xmm_xmm_imm8(dst, src, imm)) }
+emit_vaeskeygenassist_xmm_m128_imm8 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vaeskeygenassist_xmm_m128_imm8(dst, src, imm)) }
 inst_vbroadcastss_xmm_m32           :: #force_inline proc "contextless" (dst: XMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VBROADCASTSS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 4), {}, {}} }, 1485) }
 inst_vbroadcastss_ymm_m32           :: #force_inline proc "contextless" (dst: YMM, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VBROADCASTSS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 4), {}, {}} }, 1486) }
 inst_vbroadcastss_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBROADCASTSS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1487) }
 inst_vbroadcastss_ymm_xmm           :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBROADCASTSS, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1488) }
-emit_vbroadcastss_xmm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append(instructions, inst_vbroadcastss_xmm_m32(dst, src)) }
-emit_vbroadcastss_ymm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem32) { append(instructions, inst_vbroadcastss_ymm_m32(dst, src)) }
-emit_vbroadcastss_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vbroadcastss_xmm_xmm(dst, src)) }
-emit_vbroadcastss_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vbroadcastss_ymm_xmm(dst, src)) }
+emit_vbroadcastss_xmm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem32) { append_elem(instructions, inst_vbroadcastss_xmm_m32(dst, src)) }
+emit_vbroadcastss_ymm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem32) { append_elem(instructions, inst_vbroadcastss_ymm_m32(dst, src)) }
+emit_vbroadcastss_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vbroadcastss_xmm_xmm(dst, src)) }
+emit_vbroadcastss_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vbroadcastss_ymm_xmm(dst, src)) }
 inst_vbroadcastsd_ymm_m64           :: #force_inline proc "contextless" (dst: YMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VBROADCASTSD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 8), {}, {}} }, 1489) }
 inst_vbroadcastsd_ymm_xmm           :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBROADCASTSD, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1490) }
-emit_vbroadcastsd_ymm_m64           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append(instructions, inst_vbroadcastsd_ymm_m64(dst, src)) }
-emit_vbroadcastsd_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vbroadcastsd_ymm_xmm(dst, src)) }
+emit_vbroadcastsd_ymm_m64           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem64) { append_elem(instructions, inst_vbroadcastsd_ymm_m64(dst, src)) }
+emit_vbroadcastsd_ymm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vbroadcastsd_ymm_xmm(dst, src)) }
 inst_vbroadcastf128_ymm_m128        :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VBROADCASTF128, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1491) }
-emit_vbroadcastf128_ymm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vbroadcastf128_ymm_m128(dst, src)) }
+emit_vbroadcastf128_ymm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vbroadcastf128_ymm_m128(dst, src)) }
 inst_vextractf128_xmm_ymm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXTRACTF128, operand_count = 3, ops = {op_xmm(dst), op_ymm(src), op_imm8(imm), {}} }, 1492) }
 inst_vextractf128_m128_ymm_imm8     :: #force_inline proc "contextless" (dst: Mem128, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXTRACTF128, operand_count = 3, ops = {op_mem(dst.mem, 16), op_ymm(src), op_imm8(imm), {}} }, 1492) }
-emit_vextractf128_xmm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM, imm: i8) { append(instructions, inst_vextractf128_xmm_ymm_imm8(dst, src, imm)) }
-emit_vextractf128_m128_ymm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM, imm: i8) { append(instructions, inst_vextractf128_m128_ymm_imm8(dst, src, imm)) }
+emit_vextractf128_xmm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM, imm: i8) { append_elem(instructions, inst_vextractf128_xmm_ymm_imm8(dst, src, imm)) }
+emit_vextractf128_m128_ymm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM, imm: i8) { append_elem(instructions, inst_vextractf128_m128_ymm_imm8(dst, src, imm)) }
 inst_vinsertf128_ymm_ymm_xmm_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VINSERTF128, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), op_imm8(imm)} }, 1493) }
 inst_vinsertf128_ymm_ymm_m128_imm8  :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VINSERTF128, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1493) }
-emit_vinsertf128_ymm_ymm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM, imm: i8) { append(instructions, inst_vinsertf128_ymm_ymm_xmm_imm8(dst, src, src2, imm)) }
-emit_vinsertf128_ymm_ymm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128, imm: i8) { append(instructions, inst_vinsertf128_ymm_ymm_m128_imm8(dst, src, src2, imm)) }
+emit_vinsertf128_ymm_ymm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vinsertf128_ymm_ymm_xmm_imm8(dst, src, src2, imm)) }
+emit_vinsertf128_ymm_ymm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vinsertf128_ymm_ymm_m128_imm8(dst, src, src2, imm)) }
 inst_vperm2f128_ymm_ymm_ymm_imm8    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERM2F128, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1494) }
 inst_vperm2f128_ymm_ymm_m256_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERM2F128, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1494) }
-emit_vperm2f128_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vperm2f128_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vperm2f128_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vperm2f128_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vperm2f128_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vperm2f128_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vperm2f128_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vperm2f128_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vmaskmovps_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1495) }
 inst_vmaskmovps_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1496) }
 inst_vmaskmovps_m128_xmm_xmm        :: #force_inline proc "contextless" (dst: Mem128, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVPS, operand_count = 3, ops = {op_mem(dst.mem, 16), op_xmm(src), op_xmm(src2), {}} }, 1497) }
 inst_vmaskmovps_m256_ymm_ymm        :: #force_inline proc "contextless" (dst: Mem256, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVPS, operand_count = 3, ops = {op_mem(dst.mem, 32), op_ymm(src), op_ymm(src2), {}} }, 1498) }
-emit_vmaskmovps_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vmaskmovps_xmm_xmm_m128(dst, src, src2)) }
-emit_vmaskmovps_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vmaskmovps_ymm_ymm_m256(dst, src, src2)) }
-emit_vmaskmovps_m128_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM, src2: XMM) { append(instructions, inst_vmaskmovps_m128_xmm_xmm(dst, src, src2)) }
-emit_vmaskmovps_m256_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM, src2: YMM) { append(instructions, inst_vmaskmovps_m256_ymm_ymm(dst, src, src2)) }
+emit_vmaskmovps_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vmaskmovps_xmm_xmm_m128(dst, src, src2)) }
+emit_vmaskmovps_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vmaskmovps_ymm_ymm_m256(dst, src, src2)) }
+emit_vmaskmovps_m128_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM, src2: XMM) { append_elem(instructions, inst_vmaskmovps_m128_xmm_xmm(dst, src, src2)) }
+emit_vmaskmovps_m256_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM, src2: YMM) { append_elem(instructions, inst_vmaskmovps_m256_ymm_ymm(dst, src, src2)) }
 inst_vmaskmovpd_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1499) }
 inst_vmaskmovpd_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1500) }
 inst_vmaskmovpd_m128_xmm_xmm        :: #force_inline proc "contextless" (dst: Mem128, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVPD, operand_count = 3, ops = {op_mem(dst.mem, 16), op_xmm(src), op_xmm(src2), {}} }, 1501) }
 inst_vmaskmovpd_m256_ymm_ymm        :: #force_inline proc "contextless" (dst: Mem256, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMASKMOVPD, operand_count = 3, ops = {op_mem(dst.mem, 32), op_ymm(src), op_ymm(src2), {}} }, 1502) }
-emit_vmaskmovpd_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vmaskmovpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vmaskmovpd_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vmaskmovpd_ymm_ymm_m256(dst, src, src2)) }
-emit_vmaskmovpd_m128_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM, src2: XMM) { append(instructions, inst_vmaskmovpd_m128_xmm_xmm(dst, src, src2)) }
-emit_vmaskmovpd_m256_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM, src2: YMM) { append(instructions, inst_vmaskmovpd_m256_ymm_ymm(dst, src, src2)) }
+emit_vmaskmovpd_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vmaskmovpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vmaskmovpd_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vmaskmovpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vmaskmovpd_m128_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM, src2: XMM) { append_elem(instructions, inst_vmaskmovpd_m128_xmm_xmm(dst, src, src2)) }
+emit_vmaskmovpd_m256_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM, src2: YMM) { append_elem(instructions, inst_vmaskmovpd_m256_ymm_ymm(dst, src, src2)) }
 inst_vtestps_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VTESTPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1503) }
 inst_vtestps_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VTESTPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1503) }
 inst_vtestps_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VTESTPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1504) }
 inst_vtestps_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VTESTPS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1504) }
-emit_vtestps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vtestps_xmm_xmm(dst, src)) }
-emit_vtestps_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vtestps_xmm_m128(dst, src)) }
-emit_vtestps_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vtestps_ymm_ymm(dst, src)) }
-emit_vtestps_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vtestps_ymm_m256(dst, src)) }
+emit_vtestps_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vtestps_xmm_xmm(dst, src)) }
+emit_vtestps_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vtestps_xmm_m128(dst, src)) }
+emit_vtestps_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vtestps_ymm_ymm(dst, src)) }
+emit_vtestps_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vtestps_ymm_m256(dst, src)) }
 inst_vtestpd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VTESTPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1505) }
 inst_vtestpd_xmm_m128               :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VTESTPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1505) }
 inst_vtestpd_ymm_ymm                :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VTESTPD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1506) }
 inst_vtestpd_ymm_m256               :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VTESTPD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1506) }
-emit_vtestpd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vtestpd_xmm_xmm(dst, src)) }
-emit_vtestpd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vtestpd_xmm_m128(dst, src)) }
-emit_vtestpd_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vtestpd_ymm_ymm(dst, src)) }
-emit_vtestpd_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vtestpd_ymm_m256(dst, src)) }
+emit_vtestpd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vtestpd_xmm_xmm(dst, src)) }
+emit_vtestpd_xmm_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vtestpd_xmm_m128(dst, src)) }
+emit_vtestpd_ymm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vtestpd_ymm_ymm(dst, src)) }
+emit_vtestpd_ymm_m256               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vtestpd_ymm_m256(dst, src)) }
 inst_vzeroall_none                  :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VZEROALL, operand_count = 0, ops = {{}, {}, {}, {}} }, 1507) }
-emit_vzeroall_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vzeroall_none()) }
+emit_vzeroall_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vzeroall_none()) }
 inst_vzeroupper_none                :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VZEROUPPER, operand_count = 0, ops = {{}, {}, {}, {}} }, 1508) }
-emit_vzeroupper_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vzeroupper_none()) }
+emit_vzeroupper_none                :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vzeroupper_none()) }
 inst_vbroadcasti128_ymm_m128        :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VBROADCASTI128, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1509) }
-emit_vbroadcasti128_ymm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vbroadcasti128_ymm_m128(dst, src)) }
+emit_vbroadcasti128_ymm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vbroadcasti128_ymm_m128(dst, src)) }
 inst_vextracti128_xmm_ymm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXTRACTI128, operand_count = 3, ops = {op_xmm(dst), op_ymm(src), op_imm8(imm), {}} }, 1510) }
 inst_vextracti128_m128_ymm_imm8     :: #force_inline proc "contextless" (dst: Mem128, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXTRACTI128, operand_count = 3, ops = {op_mem(dst.mem, 16), op_ymm(src), op_imm8(imm), {}} }, 1510) }
-emit_vextracti128_xmm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM, imm: i8) { append(instructions, inst_vextracti128_xmm_ymm_imm8(dst, src, imm)) }
-emit_vextracti128_m128_ymm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM, imm: i8) { append(instructions, inst_vextracti128_m128_ymm_imm8(dst, src, imm)) }
+emit_vextracti128_xmm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM, imm: i8) { append_elem(instructions, inst_vextracti128_xmm_ymm_imm8(dst, src, imm)) }
+emit_vextracti128_m128_ymm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM, imm: i8) { append_elem(instructions, inst_vextracti128_m128_ymm_imm8(dst, src, imm)) }
 inst_vinserti128_ymm_ymm_xmm_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VINSERTI128, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_xmm(src2), op_imm8(imm)} }, 1511) }
 inst_vinserti128_ymm_ymm_m128_imm8  :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VINSERTI128, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1511) }
-emit_vinserti128_ymm_ymm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM, imm: i8) { append(instructions, inst_vinserti128_ymm_ymm_xmm_imm8(dst, src, src2, imm)) }
-emit_vinserti128_ymm_ymm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128, imm: i8) { append(instructions, inst_vinserti128_ymm_ymm_m128_imm8(dst, src, src2, imm)) }
+emit_vinserti128_ymm_ymm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vinserti128_ymm_ymm_xmm_imm8(dst, src, src2, imm)) }
+emit_vinserti128_ymm_ymm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vinserti128_ymm_ymm_m128_imm8(dst, src, src2, imm)) }
 inst_vperm2i128_ymm_ymm_ymm_imm8    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERM2I128, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1512) }
 inst_vperm2i128_ymm_ymm_m256_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERM2I128, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1512) }
-emit_vperm2i128_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vperm2i128_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vperm2i128_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vperm2i128_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vperm2i128_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vperm2i128_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vperm2i128_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vperm2i128_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vpermd_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1513) }
 inst_vpermd_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1513) }
-emit_vpermd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermd_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermd_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpermps_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1514) }
 inst_vpermps_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1514) }
-emit_vpermps_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermps_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermps_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermps_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermps_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermps_ymm_ymm_m256(dst, src, src2)) }
 inst_vpermq_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1515) }
 inst_vpermq_ymm_m256_imm8           :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMQ, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1515) }
-emit_vpermq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpermq_ymm_ymm_imm8(dst, src, imm)) }
-emit_vpermq_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vpermq_ymm_m256_imm8(dst, src, imm)) }
+emit_vpermq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpermq_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpermq_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vpermq_ymm_m256_imm8(dst, src, imm)) }
 inst_vpermpd_ymm_ymm_imm8           :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1516) }
 inst_vpermpd_ymm_m256_imm8          :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMPD, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1516) }
-emit_vpermpd_ymm_ymm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vpermpd_ymm_ymm_imm8(dst, src, imm)) }
-emit_vpermpd_ymm_m256_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vpermpd_ymm_m256_imm8(dst, src, imm)) }
+emit_vpermpd_ymm_ymm_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vpermpd_ymm_ymm_imm8(dst, src, imm)) }
+emit_vpermpd_ymm_m256_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vpermpd_ymm_m256_imm8(dst, src, imm)) }
 inst_vpblendd_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1517) }
 inst_vpblendd_xmm_xmm_m128_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1517) }
 inst_vpblendd_ymm_ymm_ymm_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1518) }
 inst_vpblendd_ymm_ymm_m256_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1518) }
-emit_vpblendd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpblendd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpblendd_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpblendd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpblendd_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpblendd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpblendd_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpblendd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpblendd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpblendd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpblendd_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpblendd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpblendd_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpblendd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpblendd_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpblendd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
 inst_vpsllvd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1519) }
 inst_vpsllvd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1519) }
 inst_vpsllvd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1520) }
 inst_vpsllvd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1520) }
-emit_vpsllvd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsllvd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsllvd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsllvd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsllvd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsllvd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsllvd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsllvd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsllvd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsllvd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsllvd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsllvd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsllvd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsllvd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsllvd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsllvd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsllvq_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1521) }
 inst_vpsllvq_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1521) }
 inst_vpsllvq_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1522) }
 inst_vpsllvq_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1522) }
-emit_vpsllvq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsllvq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsllvq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsllvq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsllvq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsllvq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsllvq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsllvq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsllvq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsllvq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsllvq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsllvq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsllvq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsllvq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsllvq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsllvq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsrlvd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1523) }
 inst_vpsrlvd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1523) }
 inst_vpsrlvd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1524) }
 inst_vpsrlvd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1524) }
-emit_vpsrlvd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsrlvd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsrlvd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsrlvd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsrlvd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsrlvd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsrlvd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsrlvd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsrlvd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsrlvd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsrlvd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsrlvd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsrlvd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsrlvd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsrlvd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsrlvd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsrlvq_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1525) }
 inst_vpsrlvq_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1525) }
 inst_vpsrlvq_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1526) }
 inst_vpsrlvq_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1526) }
-emit_vpsrlvq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsrlvq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsrlvq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsrlvq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsrlvq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsrlvq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsrlvq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsrlvq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsrlvq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsrlvq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsrlvq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsrlvq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsrlvq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsrlvq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsrlvq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsrlvq_ymm_ymm_m256(dst, src, src2)) }
 inst_vpsravd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1527) }
 inst_vpsravd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1527) }
 inst_vpsravd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1528) }
 inst_vpsravd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1528) }
-emit_vpsravd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsravd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsravd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsravd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsravd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsravd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsravd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsravd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsravd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsravd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsravd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsravd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsravd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsravd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsravd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsravd_ymm_ymm_m256(dst, src, src2)) }
 inst_vpmaskmovd_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMASKMOVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1529) }
 inst_vpmaskmovd_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMASKMOVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1530) }
 inst_vpmaskmovd_m128_xmm_xmm        :: #force_inline proc "contextless" (dst: Mem128, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMASKMOVD, operand_count = 3, ops = {op_mem(dst.mem, 16), op_xmm(src), op_xmm(src2), {}} }, 1531) }
 inst_vpmaskmovd_m256_ymm_ymm        :: #force_inline proc "contextless" (dst: Mem256, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMASKMOVD, operand_count = 3, ops = {op_mem(dst.mem, 32), op_ymm(src), op_ymm(src2), {}} }, 1532) }
-emit_vpmaskmovd_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmaskmovd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmaskmovd_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmaskmovd_ymm_ymm_m256(dst, src, src2)) }
-emit_vpmaskmovd_m128_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM, src2: XMM) { append(instructions, inst_vpmaskmovd_m128_xmm_xmm(dst, src, src2)) }
-emit_vpmaskmovd_m256_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM, src2: YMM) { append(instructions, inst_vpmaskmovd_m256_ymm_ymm(dst, src, src2)) }
+emit_vpmaskmovd_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmaskmovd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmaskmovd_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmaskmovd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmaskmovd_m128_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmaskmovd_m128_xmm_xmm(dst, src, src2)) }
+emit_vpmaskmovd_m256_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmaskmovd_m256_ymm_ymm(dst, src, src2)) }
 inst_vpmaskmovq_xmm_xmm_m128        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMASKMOVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1533) }
 inst_vpmaskmovq_ymm_ymm_m256        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMASKMOVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1534) }
 inst_vpmaskmovq_m128_xmm_xmm        :: #force_inline proc "contextless" (dst: Mem128, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMASKMOVQ, operand_count = 3, ops = {op_mem(dst.mem, 16), op_xmm(src), op_xmm(src2), {}} }, 1535) }
 inst_vpmaskmovq_m256_ymm_ymm        :: #force_inline proc "contextless" (dst: Mem256, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMASKMOVQ, operand_count = 3, ops = {op_mem(dst.mem, 32), op_ymm(src), op_ymm(src2), {}} }, 1536) }
-emit_vpmaskmovq_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmaskmovq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmaskmovq_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmaskmovq_ymm_ymm_m256(dst, src, src2)) }
-emit_vpmaskmovq_m128_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM, src2: XMM) { append(instructions, inst_vpmaskmovq_m128_xmm_xmm(dst, src, src2)) }
-emit_vpmaskmovq_m256_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM, src2: YMM) { append(instructions, inst_vpmaskmovq_m256_ymm_ymm(dst, src, src2)) }
+emit_vpmaskmovq_xmm_xmm_m128        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmaskmovq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmaskmovq_ymm_ymm_m256        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmaskmovq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmaskmovq_m128_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmaskmovq_m128_xmm_xmm(dst, src, src2)) }
+emit_vpmaskmovq_m256_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmaskmovq_m256_ymm_ymm(dst, src, src2)) }
 inst_vgatherdps_xmm_m_xmm           :: #force_inline proc "contextless" (dst: XMM, src: Memory, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGATHERDPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src, 0), op_xmm(src2), {}} }, 1537) }
 inst_vgatherdps_ymm_m_ymm           :: #force_inline proc "contextless" (dst: YMM, src: Memory, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGATHERDPS, operand_count = 3, ops = {op_ymm(dst), op_mem(src, 0), op_ymm(src2), {}} }, 1538) }
-emit_vgatherdps_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append(instructions, inst_vgatherdps_xmm_m_xmm(dst, src, src2)) }
-emit_vgatherdps_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append(instructions, inst_vgatherdps_ymm_m_ymm(dst, src, src2)) }
+emit_vgatherdps_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append_elem(instructions, inst_vgatherdps_xmm_m_xmm(dst, src, src2)) }
+emit_vgatherdps_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append_elem(instructions, inst_vgatherdps_ymm_m_ymm(dst, src, src2)) }
 inst_vgatherdpd_xmm_m_xmm           :: #force_inline proc "contextless" (dst: XMM, src: Memory, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGATHERDPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src, 0), op_xmm(src2), {}} }, 1539) }
 inst_vgatherdpd_ymm_m_ymm           :: #force_inline proc "contextless" (dst: YMM, src: Memory, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGATHERDPD, operand_count = 3, ops = {op_ymm(dst), op_mem(src, 0), op_ymm(src2), {}} }, 1540) }
-emit_vgatherdpd_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append(instructions, inst_vgatherdpd_xmm_m_xmm(dst, src, src2)) }
-emit_vgatherdpd_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append(instructions, inst_vgatherdpd_ymm_m_ymm(dst, src, src2)) }
+emit_vgatherdpd_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append_elem(instructions, inst_vgatherdpd_xmm_m_xmm(dst, src, src2)) }
+emit_vgatherdpd_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append_elem(instructions, inst_vgatherdpd_ymm_m_ymm(dst, src, src2)) }
 inst_vgatherqps_xmm_m_xmm           :: #force_inline proc "contextless" (dst: XMM, src: Memory, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGATHERQPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src, 0), op_xmm(src2), {}} }, 1541) }
-emit_vgatherqps_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append(instructions, inst_vgatherqps_xmm_m_xmm(dst, src, src2)) }
+emit_vgatherqps_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append_elem(instructions, inst_vgatherqps_xmm_m_xmm(dst, src, src2)) }
 inst_vgatherqpd_xmm_m_xmm           :: #force_inline proc "contextless" (dst: XMM, src: Memory, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGATHERQPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src, 0), op_xmm(src2), {}} }, 1543) }
 inst_vgatherqpd_ymm_m_ymm           :: #force_inline proc "contextless" (dst: YMM, src: Memory, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGATHERQPD, operand_count = 3, ops = {op_ymm(dst), op_mem(src, 0), op_ymm(src2), {}} }, 1544) }
-emit_vgatherqpd_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append(instructions, inst_vgatherqpd_xmm_m_xmm(dst, src, src2)) }
-emit_vgatherqpd_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append(instructions, inst_vgatherqpd_ymm_m_ymm(dst, src, src2)) }
+emit_vgatherqpd_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append_elem(instructions, inst_vgatherqpd_xmm_m_xmm(dst, src, src2)) }
+emit_vgatherqpd_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append_elem(instructions, inst_vgatherqpd_ymm_m_ymm(dst, src, src2)) }
 inst_vpgatherdd_xmm_m_xmm           :: #force_inline proc "contextless" (dst: XMM, src: Memory, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPGATHERDD, operand_count = 3, ops = {op_xmm(dst), op_mem(src, 0), op_xmm(src2), {}} }, 1545) }
 inst_vpgatherdd_ymm_m_ymm           :: #force_inline proc "contextless" (dst: YMM, src: Memory, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPGATHERDD, operand_count = 3, ops = {op_ymm(dst), op_mem(src, 0), op_ymm(src2), {}} }, 1546) }
-emit_vpgatherdd_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append(instructions, inst_vpgatherdd_xmm_m_xmm(dst, src, src2)) }
-emit_vpgatherdd_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append(instructions, inst_vpgatherdd_ymm_m_ymm(dst, src, src2)) }
+emit_vpgatherdd_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append_elem(instructions, inst_vpgatherdd_xmm_m_xmm(dst, src, src2)) }
+emit_vpgatherdd_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append_elem(instructions, inst_vpgatherdd_ymm_m_ymm(dst, src, src2)) }
 inst_vpgatherdq_xmm_m_xmm           :: #force_inline proc "contextless" (dst: XMM, src: Memory, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPGATHERDQ, operand_count = 3, ops = {op_xmm(dst), op_mem(src, 0), op_xmm(src2), {}} }, 1547) }
 inst_vpgatherdq_ymm_m_ymm           :: #force_inline proc "contextless" (dst: YMM, src: Memory, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPGATHERDQ, operand_count = 3, ops = {op_ymm(dst), op_mem(src, 0), op_ymm(src2), {}} }, 1548) }
-emit_vpgatherdq_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append(instructions, inst_vpgatherdq_xmm_m_xmm(dst, src, src2)) }
-emit_vpgatherdq_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append(instructions, inst_vpgatherdq_ymm_m_ymm(dst, src, src2)) }
+emit_vpgatherdq_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append_elem(instructions, inst_vpgatherdq_xmm_m_xmm(dst, src, src2)) }
+emit_vpgatherdq_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append_elem(instructions, inst_vpgatherdq_ymm_m_ymm(dst, src, src2)) }
 inst_vpgatherqd_xmm_m_xmm           :: #force_inline proc "contextless" (dst: XMM, src: Memory, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPGATHERQD, operand_count = 3, ops = {op_xmm(dst), op_mem(src, 0), op_xmm(src2), {}} }, 1549) }
-emit_vpgatherqd_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append(instructions, inst_vpgatherqd_xmm_m_xmm(dst, src, src2)) }
+emit_vpgatherqd_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append_elem(instructions, inst_vpgatherqd_xmm_m_xmm(dst, src, src2)) }
 inst_vpgatherqq_xmm_m_xmm           :: #force_inline proc "contextless" (dst: XMM, src: Memory, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPGATHERQQ, operand_count = 3, ops = {op_xmm(dst), op_mem(src, 0), op_xmm(src2), {}} }, 1551) }
 inst_vpgatherqq_ymm_m_ymm           :: #force_inline proc "contextless" (dst: YMM, src: Memory, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPGATHERQQ, operand_count = 3, ops = {op_ymm(dst), op_mem(src, 0), op_ymm(src2), {}} }, 1552) }
-emit_vpgatherqq_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append(instructions, inst_vpgatherqq_xmm_m_xmm(dst, src, src2)) }
-emit_vpgatherqq_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append(instructions, inst_vpgatherqq_ymm_m_ymm(dst, src, src2)) }
+emit_vpgatherqq_xmm_m_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Memory, src2: XMM) { append_elem(instructions, inst_vpgatherqq_xmm_m_xmm(dst, src, src2)) }
+emit_vpgatherqq_ymm_m_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Memory, src2: YMM) { append_elem(instructions, inst_vpgatherqq_ymm_m_ymm(dst, src, src2)) }
 inst_vfmadd132ps_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1553) }
 inst_vfmadd132ps_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1553) }
 inst_vfmadd132ps_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1554) }
 inst_vfmadd132ps_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1554) }
-emit_vfmadd132ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd132ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd132ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmadd132ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmadd132ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmadd132ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmadd132ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmadd132ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmadd132ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd132ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd132ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmadd132ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmadd132ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmadd132ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmadd132ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmadd132ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmadd213ps_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1555) }
 inst_vfmadd213ps_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1555) }
 inst_vfmadd213ps_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1556) }
 inst_vfmadd213ps_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1556) }
-emit_vfmadd213ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd213ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd213ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmadd213ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmadd213ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmadd213ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmadd213ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmadd213ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmadd213ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd213ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd213ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmadd213ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmadd213ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmadd213ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmadd213ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmadd213ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmadd231ps_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1557) }
 inst_vfmadd231ps_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1557) }
 inst_vfmadd231ps_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1558) }
 inst_vfmadd231ps_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1558) }
-emit_vfmadd231ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd231ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd231ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmadd231ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmadd231ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmadd231ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmadd231ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmadd231ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmadd231ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd231ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd231ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmadd231ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmadd231ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmadd231ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmadd231ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmadd231ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmadd132pd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1559) }
 inst_vfmadd132pd_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1559) }
 inst_vfmadd132pd_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1560) }
 inst_vfmadd132pd_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1560) }
-emit_vfmadd132pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd132pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd132pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmadd132pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmadd132pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmadd132pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmadd132pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmadd132pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmadd132pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd132pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd132pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmadd132pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmadd132pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmadd132pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmadd132pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmadd132pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmadd213pd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1561) }
 inst_vfmadd213pd_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1561) }
 inst_vfmadd213pd_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1562) }
 inst_vfmadd213pd_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1562) }
-emit_vfmadd213pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd213pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd213pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmadd213pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmadd213pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmadd213pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmadd213pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmadd213pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmadd213pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd213pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd213pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmadd213pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmadd213pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmadd213pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmadd213pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmadd213pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmadd231pd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1563) }
 inst_vfmadd231pd_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1563) }
 inst_vfmadd231pd_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1564) }
 inst_vfmadd231pd_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1564) }
-emit_vfmadd231pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd231pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd231pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmadd231pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmadd231pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmadd231pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmadd231pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmadd231pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmadd231pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd231pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd231pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmadd231pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmadd231pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmadd231pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmadd231pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmadd231pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmadd132ss_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1565) }
 inst_vfmadd132ss_xmm_xmm_m32        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1565) }
-emit_vfmadd132ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd132ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd132ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfmadd132ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfmadd132ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd132ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd132ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfmadd132ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfmadd213ss_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1566) }
 inst_vfmadd213ss_xmm_xmm_m32        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1566) }
-emit_vfmadd213ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd213ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd213ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfmadd213ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfmadd213ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd213ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd213ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfmadd213ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfmadd231ss_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1567) }
 inst_vfmadd231ss_xmm_xmm_m32        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1567) }
-emit_vfmadd231ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd231ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd231ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfmadd231ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfmadd231ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd231ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd231ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfmadd231ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfmadd132sd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1568) }
 inst_vfmadd132sd_xmm_xmm_m64        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD132SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1568) }
-emit_vfmadd132sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd132sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd132sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfmadd132sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfmadd132sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd132sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd132sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfmadd132sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfmadd213sd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1569) }
 inst_vfmadd213sd_xmm_xmm_m64        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD213SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1569) }
-emit_vfmadd213sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd213sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd213sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfmadd213sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfmadd213sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd213sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd213sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfmadd213sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfmadd231sd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1570) }
 inst_vfmadd231sd_xmm_xmm_m64        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADD231SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1570) }
-emit_vfmadd231sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmadd231sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmadd231sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfmadd231sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfmadd231sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmadd231sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmadd231sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfmadd231sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfmsub132ps_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1571) }
 inst_vfmsub132ps_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1571) }
 inst_vfmsub132ps_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1572) }
 inst_vfmsub132ps_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1572) }
-emit_vfmsub132ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub132ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub132ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsub132ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsub132ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsub132ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsub132ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsub132ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsub132ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub132ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub132ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsub132ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsub132ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsub132ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsub132ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsub132ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsub213ps_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1573) }
 inst_vfmsub213ps_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1573) }
 inst_vfmsub213ps_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1574) }
 inst_vfmsub213ps_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1574) }
-emit_vfmsub213ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub213ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub213ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsub213ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsub213ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsub213ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsub213ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsub213ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsub213ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub213ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub213ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsub213ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsub213ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsub213ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsub213ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsub213ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsub231ps_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1575) }
 inst_vfmsub231ps_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1575) }
 inst_vfmsub231ps_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1576) }
 inst_vfmsub231ps_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1576) }
-emit_vfmsub231ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub231ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub231ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsub231ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsub231ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsub231ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsub231ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsub231ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsub231ps_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub231ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub231ps_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsub231ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsub231ps_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsub231ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsub231ps_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsub231ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsub132pd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1577) }
 inst_vfmsub132pd_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1577) }
 inst_vfmsub132pd_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1578) }
 inst_vfmsub132pd_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1578) }
-emit_vfmsub132pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub132pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub132pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsub132pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsub132pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsub132pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsub132pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsub132pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsub132pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub132pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub132pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsub132pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsub132pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsub132pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsub132pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsub132pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsub213pd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1579) }
 inst_vfmsub213pd_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1579) }
 inst_vfmsub213pd_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1580) }
 inst_vfmsub213pd_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1580) }
-emit_vfmsub213pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub213pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub213pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsub213pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsub213pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsub213pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsub213pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsub213pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsub213pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub213pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub213pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsub213pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsub213pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsub213pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsub213pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsub213pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsub231pd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1581) }
 inst_vfmsub231pd_xmm_xmm_m128       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1581) }
 inst_vfmsub231pd_ymm_ymm_ymm        :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1582) }
 inst_vfmsub231pd_ymm_ymm_m256       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1582) }
-emit_vfmsub231pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub231pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub231pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsub231pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsub231pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsub231pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsub231pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsub231pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsub231pd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub231pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub231pd_xmm_xmm_m128       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsub231pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsub231pd_ymm_ymm_ymm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsub231pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsub231pd_ymm_ymm_m256       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsub231pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsub132ss_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1583) }
 inst_vfmsub132ss_xmm_xmm_m32        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1583) }
-emit_vfmsub132ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub132ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub132ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfmsub132ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfmsub132ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub132ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub132ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfmsub132ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfmsub213ss_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1584) }
 inst_vfmsub213ss_xmm_xmm_m32        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1584) }
-emit_vfmsub213ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub213ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub213ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfmsub213ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfmsub213ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub213ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub213ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfmsub213ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfmsub231ss_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1585) }
 inst_vfmsub231ss_xmm_xmm_m32        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1585) }
-emit_vfmsub231ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub231ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub231ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfmsub231ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfmsub231ss_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub231ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub231ss_xmm_xmm_m32        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfmsub231ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfmsub132sd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1586) }
 inst_vfmsub132sd_xmm_xmm_m64        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB132SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1586) }
-emit_vfmsub132sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub132sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub132sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfmsub132sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfmsub132sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub132sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub132sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfmsub132sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfmsub213sd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1587) }
 inst_vfmsub213sd_xmm_xmm_m64        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB213SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1587) }
-emit_vfmsub213sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub213sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub213sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfmsub213sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfmsub213sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub213sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub213sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfmsub213sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfmsub231sd_xmm_xmm_xmm        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1588) }
 inst_vfmsub231sd_xmm_xmm_m64        :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUB231SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1588) }
-emit_vfmsub231sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsub231sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsub231sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfmsub231sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfmsub231sd_xmm_xmm_xmm        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsub231sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsub231sd_xmm_xmm_m64        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfmsub231sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfnmadd132ps_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1589) }
 inst_vfnmadd132ps_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1589) }
 inst_vfnmadd132ps_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1590) }
 inst_vfnmadd132ps_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1590) }
-emit_vfnmadd132ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd132ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd132ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmadd132ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmadd132ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmadd132ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmadd132ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmadd132ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmadd132ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd132ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd132ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmadd132ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmadd132ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmadd132ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmadd132ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmadd132ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmadd213ps_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1591) }
 inst_vfnmadd213ps_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1591) }
 inst_vfnmadd213ps_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1592) }
 inst_vfnmadd213ps_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1592) }
-emit_vfnmadd213ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd213ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd213ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmadd213ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmadd213ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmadd213ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmadd213ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmadd213ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmadd213ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd213ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd213ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmadd213ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmadd213ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmadd213ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmadd213ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmadd213ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmadd231ps_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1593) }
 inst_vfnmadd231ps_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1593) }
 inst_vfnmadd231ps_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1594) }
 inst_vfnmadd231ps_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1594) }
-emit_vfnmadd231ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd231ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd231ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmadd231ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmadd231ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmadd231ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmadd231ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmadd231ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmadd231ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd231ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd231ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmadd231ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmadd231ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmadd231ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmadd231ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmadd231ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmadd132pd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1595) }
 inst_vfnmadd132pd_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1595) }
 inst_vfnmadd132pd_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1596) }
 inst_vfnmadd132pd_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1596) }
-emit_vfnmadd132pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd132pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd132pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmadd132pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmadd132pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmadd132pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmadd132pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmadd132pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmadd132pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd132pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd132pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmadd132pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmadd132pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmadd132pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmadd132pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmadd132pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmadd213pd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1597) }
 inst_vfnmadd213pd_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1597) }
 inst_vfnmadd213pd_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1598) }
 inst_vfnmadd213pd_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1598) }
-emit_vfnmadd213pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd213pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd213pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmadd213pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmadd213pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmadd213pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmadd213pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmadd213pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmadd213pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd213pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd213pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmadd213pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmadd213pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmadd213pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmadd213pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmadd213pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmadd231pd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1599) }
 inst_vfnmadd231pd_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1599) }
 inst_vfnmadd231pd_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1600) }
 inst_vfnmadd231pd_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1600) }
-emit_vfnmadd231pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd231pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd231pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmadd231pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmadd231pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmadd231pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmadd231pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmadd231pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmadd231pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd231pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd231pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmadd231pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmadd231pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmadd231pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmadd231pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmadd231pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmadd132ss_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1601) }
 inst_vfnmadd132ss_xmm_xmm_m32       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1601) }
-emit_vfnmadd132ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd132ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd132ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfnmadd132ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfnmadd132ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd132ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd132ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfnmadd132ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfnmadd213ss_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1602) }
 inst_vfnmadd213ss_xmm_xmm_m32       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1602) }
-emit_vfnmadd213ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd213ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd213ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfnmadd213ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfnmadd213ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd213ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd213ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfnmadd213ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfnmadd231ss_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1603) }
 inst_vfnmadd231ss_xmm_xmm_m32       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1603) }
-emit_vfnmadd231ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd231ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd231ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfnmadd231ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfnmadd231ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd231ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd231ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfnmadd231ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfnmadd132sd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1604) }
 inst_vfnmadd132sd_xmm_xmm_m64       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD132SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1604) }
-emit_vfnmadd132sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd132sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd132sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfnmadd132sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfnmadd132sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd132sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd132sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfnmadd132sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfnmadd213sd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1605) }
 inst_vfnmadd213sd_xmm_xmm_m64       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD213SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1605) }
-emit_vfnmadd213sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd213sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd213sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfnmadd213sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfnmadd213sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd213sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd213sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfnmadd213sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfnmadd231sd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1606) }
 inst_vfnmadd231sd_xmm_xmm_m64       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMADD231SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1606) }
-emit_vfnmadd231sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmadd231sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmadd231sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfnmadd231sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfnmadd231sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmadd231sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmadd231sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfnmadd231sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfnmsub132ps_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1607) }
 inst_vfnmsub132ps_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1607) }
 inst_vfnmsub132ps_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1608) }
 inst_vfnmsub132ps_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1608) }
-emit_vfnmsub132ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub132ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub132ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmsub132ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmsub132ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmsub132ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmsub132ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmsub132ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmsub132ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub132ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub132ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmsub132ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmsub132ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmsub132ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmsub132ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmsub132ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmsub213ps_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1609) }
 inst_vfnmsub213ps_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1609) }
 inst_vfnmsub213ps_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1610) }
 inst_vfnmsub213ps_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1610) }
-emit_vfnmsub213ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub213ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub213ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmsub213ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmsub213ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmsub213ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmsub213ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmsub213ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmsub213ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub213ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub213ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmsub213ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmsub213ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmsub213ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmsub213ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmsub213ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmsub231ps_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1611) }
 inst_vfnmsub231ps_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1611) }
 inst_vfnmsub231ps_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1612) }
 inst_vfnmsub231ps_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1612) }
-emit_vfnmsub231ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub231ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub231ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmsub231ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmsub231ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmsub231ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmsub231ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmsub231ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmsub231ps_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub231ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub231ps_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmsub231ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmsub231ps_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmsub231ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmsub231ps_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmsub231ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmsub132pd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1613) }
 inst_vfnmsub132pd_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1613) }
 inst_vfnmsub132pd_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1614) }
 inst_vfnmsub132pd_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1614) }
-emit_vfnmsub132pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub132pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub132pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmsub132pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmsub132pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmsub132pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmsub132pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmsub132pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmsub132pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub132pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub132pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmsub132pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmsub132pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmsub132pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmsub132pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmsub132pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmsub213pd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1615) }
 inst_vfnmsub213pd_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1615) }
 inst_vfnmsub213pd_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1616) }
 inst_vfnmsub213pd_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1616) }
-emit_vfnmsub213pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub213pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub213pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmsub213pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmsub213pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmsub213pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmsub213pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmsub213pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmsub213pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub213pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub213pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmsub213pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmsub213pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmsub213pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmsub213pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmsub213pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmsub231pd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1617) }
 inst_vfnmsub231pd_xmm_xmm_m128      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1617) }
 inst_vfnmsub231pd_ymm_ymm_ymm       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1618) }
 inst_vfnmsub231pd_ymm_ymm_m256      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1618) }
-emit_vfnmsub231pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub231pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub231pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfnmsub231pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfnmsub231pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfnmsub231pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfnmsub231pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfnmsub231pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfnmsub231pd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub231pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub231pd_xmm_xmm_m128      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfnmsub231pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfnmsub231pd_ymm_ymm_ymm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfnmsub231pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfnmsub231pd_ymm_ymm_m256      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfnmsub231pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfnmsub132ss_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1619) }
 inst_vfnmsub132ss_xmm_xmm_m32       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1619) }
-emit_vfnmsub132ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub132ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub132ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfnmsub132ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfnmsub132ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub132ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub132ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfnmsub132ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfnmsub213ss_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1620) }
 inst_vfnmsub213ss_xmm_xmm_m32       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1620) }
-emit_vfnmsub213ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub213ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub213ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfnmsub213ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfnmsub213ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub213ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub213ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfnmsub213ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfnmsub231ss_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1621) }
 inst_vfnmsub231ss_xmm_xmm_m32       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 1621) }
-emit_vfnmsub231ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub231ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub231ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vfnmsub231ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vfnmsub231ss_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub231ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub231ss_xmm_xmm_m32       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vfnmsub231ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vfnmsub132sd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1622) }
 inst_vfnmsub132sd_xmm_xmm_m64       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB132SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1622) }
-emit_vfnmsub132sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub132sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub132sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfnmsub132sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfnmsub132sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub132sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub132sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfnmsub132sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfnmsub213sd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1623) }
 inst_vfnmsub213sd_xmm_xmm_m64       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB213SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1623) }
-emit_vfnmsub213sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub213sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub213sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfnmsub213sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfnmsub213sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub213sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub213sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfnmsub213sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfnmsub231sd_xmm_xmm_xmm       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1624) }
 inst_vfnmsub231sd_xmm_xmm_m64       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VFNMSUB231SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 1624) }
-emit_vfnmsub231sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfnmsub231sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfnmsub231sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vfnmsub231sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vfnmsub231sd_xmm_xmm_xmm       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfnmsub231sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfnmsub231sd_xmm_xmm_m64       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vfnmsub231sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vfmaddsub132ps_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1625) }
 inst_vfmaddsub132ps_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1625) }
 inst_vfmaddsub132ps_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1626) }
 inst_vfmaddsub132ps_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1626) }
-emit_vfmaddsub132ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmaddsub132ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmaddsub132ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmaddsub132ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmaddsub132ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmaddsub132ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmaddsub132ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmaddsub132ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmaddsub132ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmaddsub132ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmaddsub132ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmaddsub132ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmaddsub132ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmaddsub132ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmaddsub132ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmaddsub132ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmaddsub213ps_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1627) }
 inst_vfmaddsub213ps_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1627) }
 inst_vfmaddsub213ps_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1628) }
 inst_vfmaddsub213ps_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1628) }
-emit_vfmaddsub213ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmaddsub213ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmaddsub213ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmaddsub213ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmaddsub213ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmaddsub213ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmaddsub213ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmaddsub213ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmaddsub213ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmaddsub213ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmaddsub213ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmaddsub213ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmaddsub213ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmaddsub213ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmaddsub213ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmaddsub213ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmaddsub231ps_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1629) }
 inst_vfmaddsub231ps_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1629) }
 inst_vfmaddsub231ps_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1630) }
 inst_vfmaddsub231ps_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1630) }
-emit_vfmaddsub231ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmaddsub231ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmaddsub231ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmaddsub231ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmaddsub231ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmaddsub231ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmaddsub231ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmaddsub231ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmaddsub231ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmaddsub231ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmaddsub231ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmaddsub231ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmaddsub231ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmaddsub231ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmaddsub231ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmaddsub231ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmaddsub132pd_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1631) }
 inst_vfmaddsub132pd_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1631) }
 inst_vfmaddsub132pd_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1632) }
 inst_vfmaddsub132pd_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1632) }
-emit_vfmaddsub132pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmaddsub132pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmaddsub132pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmaddsub132pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmaddsub132pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmaddsub132pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmaddsub132pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmaddsub132pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmaddsub132pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmaddsub132pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmaddsub132pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmaddsub132pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmaddsub132pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmaddsub132pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmaddsub132pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmaddsub132pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmaddsub213pd_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1633) }
 inst_vfmaddsub213pd_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1633) }
 inst_vfmaddsub213pd_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1634) }
 inst_vfmaddsub213pd_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1634) }
-emit_vfmaddsub213pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmaddsub213pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmaddsub213pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmaddsub213pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmaddsub213pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmaddsub213pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmaddsub213pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmaddsub213pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmaddsub213pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmaddsub213pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmaddsub213pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmaddsub213pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmaddsub213pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmaddsub213pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmaddsub213pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmaddsub213pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmaddsub231pd_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1635) }
 inst_vfmaddsub231pd_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1635) }
 inst_vfmaddsub231pd_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1636) }
 inst_vfmaddsub231pd_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMADDSUB231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1636) }
-emit_vfmaddsub231pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmaddsub231pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmaddsub231pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmaddsub231pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmaddsub231pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmaddsub231pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmaddsub231pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmaddsub231pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmaddsub231pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmaddsub231pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmaddsub231pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmaddsub231pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmaddsub231pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmaddsub231pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmaddsub231pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmaddsub231pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsubadd132ps_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1637) }
 inst_vfmsubadd132ps_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD132PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1637) }
 inst_vfmsubadd132ps_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1638) }
 inst_vfmsubadd132ps_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD132PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1638) }
-emit_vfmsubadd132ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsubadd132ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsubadd132ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsubadd132ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsubadd132ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsubadd132ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsubadd132ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsubadd132ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsubadd132ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsubadd132ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsubadd132ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsubadd132ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsubadd132ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsubadd132ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsubadd132ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsubadd132ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsubadd213ps_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1639) }
 inst_vfmsubadd213ps_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD213PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1639) }
 inst_vfmsubadd213ps_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1640) }
 inst_vfmsubadd213ps_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD213PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1640) }
-emit_vfmsubadd213ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsubadd213ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsubadd213ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsubadd213ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsubadd213ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsubadd213ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsubadd213ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsubadd213ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsubadd213ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsubadd213ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsubadd213ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsubadd213ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsubadd213ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsubadd213ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsubadd213ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsubadd213ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsubadd231ps_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1641) }
 inst_vfmsubadd231ps_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD231PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1641) }
 inst_vfmsubadd231ps_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1642) }
 inst_vfmsubadd231ps_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD231PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1642) }
-emit_vfmsubadd231ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsubadd231ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsubadd231ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsubadd231ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsubadd231ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsubadd231ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsubadd231ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsubadd231ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsubadd231ps_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsubadd231ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsubadd231ps_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsubadd231ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsubadd231ps_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsubadd231ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsubadd231ps_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsubadd231ps_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsubadd132pd_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1643) }
 inst_vfmsubadd132pd_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD132PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1643) }
 inst_vfmsubadd132pd_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1644) }
 inst_vfmsubadd132pd_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD132PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1644) }
-emit_vfmsubadd132pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsubadd132pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsubadd132pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsubadd132pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsubadd132pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsubadd132pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsubadd132pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsubadd132pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsubadd132pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsubadd132pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsubadd132pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsubadd132pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsubadd132pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsubadd132pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsubadd132pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsubadd132pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsubadd213pd_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1645) }
 inst_vfmsubadd213pd_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD213PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1645) }
 inst_vfmsubadd213pd_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1646) }
 inst_vfmsubadd213pd_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD213PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1646) }
-emit_vfmsubadd213pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsubadd213pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsubadd213pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsubadd213pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsubadd213pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsubadd213pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsubadd213pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsubadd213pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsubadd213pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsubadd213pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsubadd213pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsubadd213pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsubadd213pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsubadd213pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsubadd213pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsubadd213pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vfmsubadd231pd_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1647) }
 inst_vfmsubadd231pd_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD231PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1647) }
 inst_vfmsubadd231pd_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1648) }
 inst_vfmsubadd231pd_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VFMSUBADD231PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1648) }
-emit_vfmsubadd231pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vfmsubadd231pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vfmsubadd231pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vfmsubadd231pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vfmsubadd231pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vfmsubadd231pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vfmsubadd231pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vfmsubadd231pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vfmsubadd231pd_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vfmsubadd231pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vfmsubadd231pd_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vfmsubadd231pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vfmsubadd231pd_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vfmsubadd231pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vfmsubadd231pd_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vfmsubadd231pd_ymm_ymm_m256(dst, src, src2)) }
 inst_vcvtph2ps_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPH2PS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1649) }
 inst_vcvtph2ps_xmm_m64              :: #force_inline proc "contextless" (dst: XMM, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPH2PS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 8), {}, {}} }, 1649) }
 inst_vcvtph2ps_ymm_xmm              :: #force_inline proc "contextless" (dst: YMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPH2PS, operand_count = 2, ops = {op_ymm(dst), op_xmm(src), {}, {}} }, 1650) }
 inst_vcvtph2ps_ymm_m128             :: #force_inline proc "contextless" (dst: YMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPH2PS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 16), {}, {}} }, 1650) }
 inst_vcvtph2ps_zmm_ymm              :: #force_inline proc "contextless" (dst: ZMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPH2PS, operand_count = 2, ops = {op_zmm(dst), op_ymm(src), {}, {}} }, 1651) }
 inst_vcvtph2ps_zmm_m256             :: #force_inline proc "contextless" (dst: ZMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPH2PS, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 32), {}, {}} }, 1651) }
-emit_vcvtph2ps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcvtph2ps_xmm_xmm(dst, src)) }
-emit_vcvtph2ps_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append(instructions, inst_vcvtph2ps_xmm_m64(dst, src)) }
-emit_vcvtph2ps_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append(instructions, inst_vcvtph2ps_ymm_xmm(dst, src)) }
-emit_vcvtph2ps_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append(instructions, inst_vcvtph2ps_ymm_m128(dst, src)) }
-emit_vcvtph2ps_zmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: YMM) { append(instructions, inst_vcvtph2ps_zmm_ymm(dst, src)) }
-emit_vcvtph2ps_zmm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem256) { append(instructions, inst_vcvtph2ps_zmm_m256(dst, src)) }
+emit_vcvtph2ps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcvtph2ps_xmm_xmm(dst, src)) }
+emit_vcvtph2ps_xmm_m64              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem64) { append_elem(instructions, inst_vcvtph2ps_xmm_m64(dst, src)) }
+emit_vcvtph2ps_ymm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: XMM) { append_elem(instructions, inst_vcvtph2ps_ymm_xmm(dst, src)) }
+emit_vcvtph2ps_ymm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem128) { append_elem(instructions, inst_vcvtph2ps_ymm_m128(dst, src)) }
+emit_vcvtph2ps_zmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: YMM) { append_elem(instructions, inst_vcvtph2ps_zmm_ymm(dst, src)) }
+emit_vcvtph2ps_zmm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem256) { append_elem(instructions, inst_vcvtph2ps_zmm_m256(dst, src)) }
 inst_vcvtps2ph_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PH, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1652) }
 inst_vcvtps2ph_m64_xmm_imm8         :: #force_inline proc "contextless" (dst: Mem64, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PH, operand_count = 3, ops = {op_mem(dst.mem, 8), op_xmm(src), op_imm8(imm), {}} }, 1652) }
 inst_vcvtps2ph_xmm_ymm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PH, operand_count = 3, ops = {op_xmm(dst), op_ymm(src), op_imm8(imm), {}} }, 1653) }
 inst_vcvtps2ph_m128_ymm_imm8        :: #force_inline proc "contextless" (dst: Mem128, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PH, operand_count = 3, ops = {op_mem(dst.mem, 16), op_ymm(src), op_imm8(imm), {}} }, 1653) }
 inst_vcvtps2ph_ymm_zmm_imm8         :: #force_inline proc "contextless" (dst: YMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PH, operand_count = 3, ops = {op_ymm(dst), op_zmm(src), op_imm8(imm), {}} }, 1654) }
 inst_vcvtps2ph_m256_zmm_imm8        :: #force_inline proc "contextless" (dst: Mem256, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VCVTPS2PH, operand_count = 3, ops = {op_mem(dst.mem, 32), op_zmm(src), op_imm8(imm), {}} }, 1654) }
-emit_vcvtps2ph_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vcvtps2ph_xmm_xmm_imm8(dst, src, imm)) }
-emit_vcvtps2ph_m64_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM, imm: i8) { append(instructions, inst_vcvtps2ph_m64_xmm_imm8(dst, src, imm)) }
-emit_vcvtps2ph_xmm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM, imm: i8) { append(instructions, inst_vcvtps2ph_xmm_ymm_imm8(dst, src, imm)) }
-emit_vcvtps2ph_m128_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM, imm: i8) { append(instructions, inst_vcvtps2ph_m128_ymm_imm8(dst, src, imm)) }
-emit_vcvtps2ph_ymm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM, imm: i8) { append(instructions, inst_vcvtps2ph_ymm_zmm_imm8(dst, src, imm)) }
-emit_vcvtps2ph_m256_zmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM, imm: i8) { append(instructions, inst_vcvtps2ph_m256_zmm_imm8(dst, src, imm)) }
+emit_vcvtps2ph_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vcvtps2ph_xmm_xmm_imm8(dst, src, imm)) }
+emit_vcvtps2ph_m64_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM, imm: i8) { append_elem(instructions, inst_vcvtps2ph_m64_xmm_imm8(dst, src, imm)) }
+emit_vcvtps2ph_xmm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM, imm: i8) { append_elem(instructions, inst_vcvtps2ph_xmm_ymm_imm8(dst, src, imm)) }
+emit_vcvtps2ph_m128_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM, imm: i8) { append_elem(instructions, inst_vcvtps2ph_m128_ymm_imm8(dst, src, imm)) }
+emit_vcvtps2ph_ymm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vcvtps2ph_ymm_zmm_imm8(dst, src, imm)) }
+emit_vcvtps2ph_m256_zmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM, imm: i8) { append_elem(instructions, inst_vcvtps2ph_m256_zmm_imm8(dst, src, imm)) }
 inst_vmovdqa32_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA32, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1655) }
 inst_vmovdqa32_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA32, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1655) }
 inst_vmovdqa32_m128_xmm             :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA32, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1656) }
@@ -5490,15 +5490,15 @@ inst_vmovdqa32_m256_ymm             :: #force_inline proc "contextless" (dst: Me
 inst_vmovdqa32_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA32, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1659) }
 inst_vmovdqa32_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA32, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1659) }
 inst_vmovdqa32_m512_zmm             :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA32, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1660) }
-emit_vmovdqa32_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovdqa32_xmm_xmm(dst, src)) }
-emit_vmovdqa32_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovdqa32_xmm_m128(dst, src)) }
-emit_vmovdqa32_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovdqa32_m128_xmm(dst, src)) }
-emit_vmovdqa32_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovdqa32_ymm_ymm(dst, src)) }
-emit_vmovdqa32_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovdqa32_ymm_m256(dst, src)) }
-emit_vmovdqa32_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovdqa32_m256_ymm(dst, src)) }
-emit_vmovdqa32_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vmovdqa32_zmm_zmm(dst, src)) }
-emit_vmovdqa32_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vmovdqa32_zmm_m512(dst, src)) }
-emit_vmovdqa32_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vmovdqa32_m512_zmm(dst, src)) }
+emit_vmovdqa32_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovdqa32_xmm_xmm(dst, src)) }
+emit_vmovdqa32_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovdqa32_xmm_m128(dst, src)) }
+emit_vmovdqa32_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovdqa32_m128_xmm(dst, src)) }
+emit_vmovdqa32_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovdqa32_ymm_ymm(dst, src)) }
+emit_vmovdqa32_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovdqa32_ymm_m256(dst, src)) }
+emit_vmovdqa32_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovdqa32_m256_ymm(dst, src)) }
+emit_vmovdqa32_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vmovdqa32_zmm_zmm(dst, src)) }
+emit_vmovdqa32_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vmovdqa32_zmm_m512(dst, src)) }
+emit_vmovdqa32_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vmovdqa32_m512_zmm(dst, src)) }
 inst_vmovdqa64_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA64, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1661) }
 inst_vmovdqa64_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA64, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1661) }
 inst_vmovdqa64_m128_xmm             :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA64, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1662) }
@@ -5508,15 +5508,15 @@ inst_vmovdqa64_m256_ymm             :: #force_inline proc "contextless" (dst: Me
 inst_vmovdqa64_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA64, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1665) }
 inst_vmovdqa64_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA64, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1665) }
 inst_vmovdqa64_m512_zmm             :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQA64, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1666) }
-emit_vmovdqa64_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovdqa64_xmm_xmm(dst, src)) }
-emit_vmovdqa64_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovdqa64_xmm_m128(dst, src)) }
-emit_vmovdqa64_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovdqa64_m128_xmm(dst, src)) }
-emit_vmovdqa64_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovdqa64_ymm_ymm(dst, src)) }
-emit_vmovdqa64_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovdqa64_ymm_m256(dst, src)) }
-emit_vmovdqa64_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovdqa64_m256_ymm(dst, src)) }
-emit_vmovdqa64_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vmovdqa64_zmm_zmm(dst, src)) }
-emit_vmovdqa64_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vmovdqa64_zmm_m512(dst, src)) }
-emit_vmovdqa64_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vmovdqa64_m512_zmm(dst, src)) }
+emit_vmovdqa64_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovdqa64_xmm_xmm(dst, src)) }
+emit_vmovdqa64_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovdqa64_xmm_m128(dst, src)) }
+emit_vmovdqa64_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovdqa64_m128_xmm(dst, src)) }
+emit_vmovdqa64_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovdqa64_ymm_ymm(dst, src)) }
+emit_vmovdqa64_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovdqa64_ymm_m256(dst, src)) }
+emit_vmovdqa64_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovdqa64_m256_ymm(dst, src)) }
+emit_vmovdqa64_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vmovdqa64_zmm_zmm(dst, src)) }
+emit_vmovdqa64_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vmovdqa64_zmm_m512(dst, src)) }
+emit_vmovdqa64_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vmovdqa64_m512_zmm(dst, src)) }
 inst_vmovdqu8_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU8, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1667) }
 inst_vmovdqu8_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU8, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1667) }
 inst_vmovdqu8_m128_xmm              :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU8, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1668) }
@@ -5526,15 +5526,15 @@ inst_vmovdqu8_m256_ymm              :: #force_inline proc "contextless" (dst: Me
 inst_vmovdqu8_zmm_zmm               :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU8, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1671) }
 inst_vmovdqu8_zmm_m512              :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU8, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1671) }
 inst_vmovdqu8_m512_zmm              :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU8, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1672) }
-emit_vmovdqu8_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovdqu8_xmm_xmm(dst, src)) }
-emit_vmovdqu8_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovdqu8_xmm_m128(dst, src)) }
-emit_vmovdqu8_m128_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovdqu8_m128_xmm(dst, src)) }
-emit_vmovdqu8_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovdqu8_ymm_ymm(dst, src)) }
-emit_vmovdqu8_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovdqu8_ymm_m256(dst, src)) }
-emit_vmovdqu8_m256_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovdqu8_m256_ymm(dst, src)) }
-emit_vmovdqu8_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vmovdqu8_zmm_zmm(dst, src)) }
-emit_vmovdqu8_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vmovdqu8_zmm_m512(dst, src)) }
-emit_vmovdqu8_m512_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vmovdqu8_m512_zmm(dst, src)) }
+emit_vmovdqu8_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovdqu8_xmm_xmm(dst, src)) }
+emit_vmovdqu8_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovdqu8_xmm_m128(dst, src)) }
+emit_vmovdqu8_m128_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovdqu8_m128_xmm(dst, src)) }
+emit_vmovdqu8_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovdqu8_ymm_ymm(dst, src)) }
+emit_vmovdqu8_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovdqu8_ymm_m256(dst, src)) }
+emit_vmovdqu8_m256_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovdqu8_m256_ymm(dst, src)) }
+emit_vmovdqu8_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vmovdqu8_zmm_zmm(dst, src)) }
+emit_vmovdqu8_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vmovdqu8_zmm_m512(dst, src)) }
+emit_vmovdqu8_m512_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vmovdqu8_m512_zmm(dst, src)) }
 inst_vmovdqu16_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU16, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1673) }
 inst_vmovdqu16_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU16, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1673) }
 inst_vmovdqu16_m128_xmm             :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU16, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1674) }
@@ -5544,15 +5544,15 @@ inst_vmovdqu16_m256_ymm             :: #force_inline proc "contextless" (dst: Me
 inst_vmovdqu16_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU16, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1677) }
 inst_vmovdqu16_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU16, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1677) }
 inst_vmovdqu16_m512_zmm             :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU16, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1678) }
-emit_vmovdqu16_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovdqu16_xmm_xmm(dst, src)) }
-emit_vmovdqu16_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovdqu16_xmm_m128(dst, src)) }
-emit_vmovdqu16_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovdqu16_m128_xmm(dst, src)) }
-emit_vmovdqu16_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovdqu16_ymm_ymm(dst, src)) }
-emit_vmovdqu16_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovdqu16_ymm_m256(dst, src)) }
-emit_vmovdqu16_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovdqu16_m256_ymm(dst, src)) }
-emit_vmovdqu16_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vmovdqu16_zmm_zmm(dst, src)) }
-emit_vmovdqu16_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vmovdqu16_zmm_m512(dst, src)) }
-emit_vmovdqu16_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vmovdqu16_m512_zmm(dst, src)) }
+emit_vmovdqu16_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovdqu16_xmm_xmm(dst, src)) }
+emit_vmovdqu16_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovdqu16_xmm_m128(dst, src)) }
+emit_vmovdqu16_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovdqu16_m128_xmm(dst, src)) }
+emit_vmovdqu16_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovdqu16_ymm_ymm(dst, src)) }
+emit_vmovdqu16_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovdqu16_ymm_m256(dst, src)) }
+emit_vmovdqu16_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovdqu16_m256_ymm(dst, src)) }
+emit_vmovdqu16_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vmovdqu16_zmm_zmm(dst, src)) }
+emit_vmovdqu16_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vmovdqu16_zmm_m512(dst, src)) }
+emit_vmovdqu16_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vmovdqu16_m512_zmm(dst, src)) }
 inst_vmovdqu32_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU32, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1679) }
 inst_vmovdqu32_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU32, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1679) }
 inst_vmovdqu32_m128_xmm             :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU32, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1680) }
@@ -5562,15 +5562,15 @@ inst_vmovdqu32_m256_ymm             :: #force_inline proc "contextless" (dst: Me
 inst_vmovdqu32_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU32, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1683) }
 inst_vmovdqu32_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU32, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1683) }
 inst_vmovdqu32_m512_zmm             :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU32, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1684) }
-emit_vmovdqu32_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovdqu32_xmm_xmm(dst, src)) }
-emit_vmovdqu32_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovdqu32_xmm_m128(dst, src)) }
-emit_vmovdqu32_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovdqu32_m128_xmm(dst, src)) }
-emit_vmovdqu32_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovdqu32_ymm_ymm(dst, src)) }
-emit_vmovdqu32_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovdqu32_ymm_m256(dst, src)) }
-emit_vmovdqu32_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovdqu32_m256_ymm(dst, src)) }
-emit_vmovdqu32_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vmovdqu32_zmm_zmm(dst, src)) }
-emit_vmovdqu32_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vmovdqu32_zmm_m512(dst, src)) }
-emit_vmovdqu32_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vmovdqu32_m512_zmm(dst, src)) }
+emit_vmovdqu32_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovdqu32_xmm_xmm(dst, src)) }
+emit_vmovdqu32_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovdqu32_xmm_m128(dst, src)) }
+emit_vmovdqu32_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovdqu32_m128_xmm(dst, src)) }
+emit_vmovdqu32_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovdqu32_ymm_ymm(dst, src)) }
+emit_vmovdqu32_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovdqu32_ymm_m256(dst, src)) }
+emit_vmovdqu32_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovdqu32_m256_ymm(dst, src)) }
+emit_vmovdqu32_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vmovdqu32_zmm_zmm(dst, src)) }
+emit_vmovdqu32_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vmovdqu32_zmm_m512(dst, src)) }
+emit_vmovdqu32_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vmovdqu32_m512_zmm(dst, src)) }
 inst_vmovdqu64_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU64, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1685) }
 inst_vmovdqu64_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU64, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1685) }
 inst_vmovdqu64_m128_xmm             :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU64, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1686) }
@@ -5580,2087 +5580,2087 @@ inst_vmovdqu64_m256_ymm             :: #force_inline proc "contextless" (dst: Me
 inst_vmovdqu64_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU64, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1689) }
 inst_vmovdqu64_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU64, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1689) }
 inst_vmovdqu64_m512_zmm             :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VMOVDQU64, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1690) }
-emit_vmovdqu64_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vmovdqu64_xmm_xmm(dst, src)) }
-emit_vmovdqu64_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vmovdqu64_xmm_m128(dst, src)) }
-emit_vmovdqu64_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vmovdqu64_m128_xmm(dst, src)) }
-emit_vmovdqu64_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vmovdqu64_ymm_ymm(dst, src)) }
-emit_vmovdqu64_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vmovdqu64_ymm_m256(dst, src)) }
-emit_vmovdqu64_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vmovdqu64_m256_ymm(dst, src)) }
-emit_vmovdqu64_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vmovdqu64_zmm_zmm(dst, src)) }
-emit_vmovdqu64_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vmovdqu64_zmm_m512(dst, src)) }
-emit_vmovdqu64_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vmovdqu64_m512_zmm(dst, src)) }
+emit_vmovdqu64_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vmovdqu64_xmm_xmm(dst, src)) }
+emit_vmovdqu64_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vmovdqu64_xmm_m128(dst, src)) }
+emit_vmovdqu64_m128_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vmovdqu64_m128_xmm(dst, src)) }
+emit_vmovdqu64_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vmovdqu64_ymm_ymm(dst, src)) }
+emit_vmovdqu64_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vmovdqu64_ymm_m256(dst, src)) }
+emit_vmovdqu64_m256_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vmovdqu64_m256_ymm(dst, src)) }
+emit_vmovdqu64_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vmovdqu64_zmm_zmm(dst, src)) }
+emit_vmovdqu64_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vmovdqu64_zmm_m512(dst, src)) }
+emit_vmovdqu64_m512_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vmovdqu64_m512_zmm(dst, src)) }
 inst_vpblendmb_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1691) }
 inst_vpblendmb_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1691) }
 inst_vpblendmb_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1692) }
 inst_vpblendmb_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1692) }
 inst_vpblendmb_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMB, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1693) }
 inst_vpblendmb_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMB, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1693) }
-emit_vpblendmb_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpblendmb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpblendmb_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpblendmb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpblendmb_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpblendmb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpblendmb_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpblendmb_ymm_ymm_m256(dst, src, src2)) }
-emit_vpblendmb_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpblendmb_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpblendmb_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpblendmb_zmm_zmm_m512(dst, src, src2)) }
+emit_vpblendmb_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpblendmb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpblendmb_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpblendmb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpblendmb_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpblendmb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpblendmb_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpblendmb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpblendmb_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpblendmb_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpblendmb_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpblendmb_zmm_zmm_m512(dst, src, src2)) }
 inst_vpblendmw_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1694) }
 inst_vpblendmw_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1694) }
 inst_vpblendmw_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1695) }
 inst_vpblendmw_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1695) }
 inst_vpblendmw_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1696) }
 inst_vpblendmw_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1696) }
-emit_vpblendmw_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpblendmw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpblendmw_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpblendmw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpblendmw_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpblendmw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpblendmw_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpblendmw_ymm_ymm_m256(dst, src, src2)) }
-emit_vpblendmw_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpblendmw_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpblendmw_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpblendmw_zmm_zmm_m512(dst, src, src2)) }
+emit_vpblendmw_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpblendmw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpblendmw_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpblendmw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpblendmw_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpblendmw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpblendmw_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpblendmw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpblendmw_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpblendmw_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpblendmw_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpblendmw_zmm_zmm_m512(dst, src, src2)) }
 inst_vpblendmd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1697) }
 inst_vpblendmd_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1697) }
 inst_vpblendmd_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1698) }
 inst_vpblendmd_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1698) }
 inst_vpblendmd_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1699) }
 inst_vpblendmd_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1699) }
-emit_vpblendmd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpblendmd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpblendmd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpblendmd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpblendmd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpblendmd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpblendmd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpblendmd_ymm_ymm_m256(dst, src, src2)) }
-emit_vpblendmd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpblendmd_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpblendmd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpblendmd_zmm_zmm_m512(dst, src, src2)) }
+emit_vpblendmd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpblendmd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpblendmd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpblendmd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpblendmd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpblendmd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpblendmd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpblendmd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpblendmd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpblendmd_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpblendmd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpblendmd_zmm_zmm_m512(dst, src, src2)) }
 inst_vpblendmq_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1700) }
 inst_vpblendmq_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1700) }
 inst_vpblendmq_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1701) }
 inst_vpblendmq_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1701) }
 inst_vpblendmq_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1702) }
 inst_vpblendmq_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPBLENDMQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1702) }
-emit_vpblendmq_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpblendmq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpblendmq_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpblendmq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpblendmq_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpblendmq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpblendmq_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpblendmq_ymm_ymm_m256(dst, src, src2)) }
-emit_vpblendmq_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpblendmq_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpblendmq_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpblendmq_zmm_zmm_m512(dst, src, src2)) }
+emit_vpblendmq_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpblendmq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpblendmq_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpblendmq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpblendmq_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpblendmq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpblendmq_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpblendmq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpblendmq_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpblendmq_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpblendmq_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpblendmq_zmm_zmm_m512(dst, src, src2)) }
 inst_vblendmps_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1703) }
 inst_vblendmps_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1703) }
 inst_vblendmps_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1704) }
 inst_vblendmps_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1704) }
 inst_vblendmps_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1705) }
 inst_vblendmps_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1705) }
-emit_vblendmps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vblendmps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vblendmps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vblendmps_xmm_xmm_m128(dst, src, src2)) }
-emit_vblendmps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vblendmps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vblendmps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vblendmps_ymm_ymm_m256(dst, src, src2)) }
-emit_vblendmps_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vblendmps_zmm_zmm_zmm(dst, src, src2)) }
-emit_vblendmps_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vblendmps_zmm_zmm_m512(dst, src, src2)) }
+emit_vblendmps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vblendmps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vblendmps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vblendmps_xmm_xmm_m128(dst, src, src2)) }
+emit_vblendmps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vblendmps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vblendmps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vblendmps_ymm_ymm_m256(dst, src, src2)) }
+emit_vblendmps_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vblendmps_zmm_zmm_zmm(dst, src, src2)) }
+emit_vblendmps_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vblendmps_zmm_zmm_m512(dst, src, src2)) }
 inst_vblendmpd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1706) }
 inst_vblendmpd_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1706) }
 inst_vblendmpd_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1707) }
 inst_vblendmpd_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1707) }
 inst_vblendmpd_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1708) }
 inst_vblendmpd_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VBLENDMPD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1708) }
-emit_vblendmpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vblendmpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vblendmpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vblendmpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vblendmpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vblendmpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vblendmpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vblendmpd_ymm_ymm_m256(dst, src, src2)) }
-emit_vblendmpd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vblendmpd_zmm_zmm_zmm(dst, src, src2)) }
-emit_vblendmpd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vblendmpd_zmm_zmm_m512(dst, src, src2)) }
+emit_vblendmpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vblendmpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vblendmpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vblendmpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vblendmpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vblendmpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vblendmpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vblendmpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vblendmpd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vblendmpd_zmm_zmm_zmm(dst, src, src2)) }
+emit_vblendmpd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vblendmpd_zmm_zmm_m512(dst, src, src2)) }
 inst_vpcmpb_k_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPB, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1709) }
 inst_vpcmpb_k_xmm_m128_imm8         :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPB, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1709) }
 inst_vpcmpb_k_ymm_ymm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPB, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1710) }
 inst_vpcmpb_k_ymm_m256_imm8         :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPB, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1710) }
 inst_vpcmpb_k_zmm_zmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPB, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1711) }
 inst_vpcmpb_k_zmm_m512_imm8         :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPB, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1711) }
-emit_vpcmpb_k_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpcmpb_k_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpb_k_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpcmpb_k_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpcmpb_k_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpcmpb_k_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpcmpb_k_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpcmpb_k_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpcmpb_k_zmm_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpcmpb_k_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpb_k_zmm_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpcmpb_k_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpcmpb_k_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpcmpb_k_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpb_k_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpb_k_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpcmpb_k_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpcmpb_k_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpcmpb_k_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpcmpb_k_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpcmpb_k_zmm_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpcmpb_k_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpb_k_zmm_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpcmpb_k_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpcmpub_k_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUB, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1712) }
 inst_vpcmpub_k_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUB, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1712) }
 inst_vpcmpub_k_ymm_ymm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUB, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1713) }
 inst_vpcmpub_k_ymm_m256_imm8        :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUB, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1713) }
 inst_vpcmpub_k_zmm_zmm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUB, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1714) }
 inst_vpcmpub_k_zmm_m512_imm8        :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUB, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1714) }
-emit_vpcmpub_k_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpcmpub_k_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpub_k_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpcmpub_k_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpcmpub_k_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpcmpub_k_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpcmpub_k_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpcmpub_k_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpcmpub_k_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpcmpub_k_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpub_k_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpcmpub_k_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpcmpub_k_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpcmpub_k_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpub_k_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpub_k_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpcmpub_k_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpcmpub_k_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpcmpub_k_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpcmpub_k_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpcmpub_k_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpcmpub_k_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpub_k_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpcmpub_k_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpcmpw_k_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPW, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1715) }
 inst_vpcmpw_k_xmm_m128_imm8         :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPW, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1715) }
 inst_vpcmpw_k_ymm_ymm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPW, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1716) }
 inst_vpcmpw_k_ymm_m256_imm8         :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPW, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1716) }
 inst_vpcmpw_k_zmm_zmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPW, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1717) }
 inst_vpcmpw_k_zmm_m512_imm8         :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPW, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1717) }
-emit_vpcmpw_k_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpcmpw_k_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpw_k_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpcmpw_k_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpcmpw_k_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpcmpw_k_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpcmpw_k_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpcmpw_k_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpcmpw_k_zmm_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpcmpw_k_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpw_k_zmm_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpcmpw_k_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpcmpw_k_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpcmpw_k_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpw_k_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpw_k_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpcmpw_k_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpcmpw_k_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpcmpw_k_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpcmpw_k_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpcmpw_k_zmm_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpcmpw_k_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpw_k_zmm_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpcmpw_k_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpcmpuw_k_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUW, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1718) }
 inst_vpcmpuw_k_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUW, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1718) }
 inst_vpcmpuw_k_ymm_ymm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUW, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1719) }
 inst_vpcmpuw_k_ymm_m256_imm8        :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUW, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1719) }
 inst_vpcmpuw_k_zmm_zmm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUW, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1720) }
 inst_vpcmpuw_k_zmm_m512_imm8        :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUW, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1720) }
-emit_vpcmpuw_k_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpcmpuw_k_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpuw_k_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpcmpuw_k_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpcmpuw_k_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpcmpuw_k_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpcmpuw_k_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpcmpuw_k_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpcmpuw_k_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpcmpuw_k_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpuw_k_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpcmpuw_k_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpcmpuw_k_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpcmpuw_k_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpuw_k_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpuw_k_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpcmpuw_k_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpcmpuw_k_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpcmpuw_k_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpcmpuw_k_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpcmpuw_k_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpcmpuw_k_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpuw_k_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpcmpuw_k_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpcmpd_k_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPD, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1721) }
 inst_vpcmpd_k_xmm_m128_imm8         :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPD, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1721) }
 inst_vpcmpd_k_ymm_ymm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPD, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1722) }
 inst_vpcmpd_k_ymm_m256_imm8         :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPD, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1722) }
 inst_vpcmpd_k_zmm_zmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPD, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1723) }
 inst_vpcmpd_k_zmm_m512_imm8         :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPD, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1723) }
-emit_vpcmpd_k_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpcmpd_k_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpd_k_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpcmpd_k_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpcmpd_k_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpcmpd_k_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpcmpd_k_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpcmpd_k_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpcmpd_k_zmm_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpcmpd_k_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpd_k_zmm_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpcmpd_k_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpcmpd_k_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpcmpd_k_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpd_k_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpd_k_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpcmpd_k_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpcmpd_k_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpcmpd_k_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpcmpd_k_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpcmpd_k_zmm_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpcmpd_k_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpd_k_zmm_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpcmpd_k_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpcmpud_k_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUD, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1724) }
 inst_vpcmpud_k_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUD, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1724) }
 inst_vpcmpud_k_ymm_ymm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUD, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1725) }
 inst_vpcmpud_k_ymm_m256_imm8        :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUD, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1725) }
 inst_vpcmpud_k_zmm_zmm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUD, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1726) }
 inst_vpcmpud_k_zmm_m512_imm8        :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUD, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1726) }
-emit_vpcmpud_k_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpcmpud_k_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpud_k_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpcmpud_k_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpcmpud_k_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpcmpud_k_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpcmpud_k_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpcmpud_k_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpcmpud_k_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpcmpud_k_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpud_k_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpcmpud_k_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpcmpud_k_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpcmpud_k_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpud_k_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpud_k_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpcmpud_k_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpcmpud_k_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpcmpud_k_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpcmpud_k_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpcmpud_k_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpcmpud_k_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpud_k_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpcmpud_k_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpcmpq_k_xmm_xmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPQ, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1727) }
 inst_vpcmpq_k_xmm_m128_imm8         :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPQ, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1727) }
 inst_vpcmpq_k_ymm_ymm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPQ, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1728) }
 inst_vpcmpq_k_ymm_m256_imm8         :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPQ, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1728) }
 inst_vpcmpq_k_zmm_zmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPQ, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1729) }
 inst_vpcmpq_k_zmm_m512_imm8         :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPQ, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1729) }
-emit_vpcmpq_k_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpcmpq_k_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpq_k_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpcmpq_k_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpcmpq_k_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpcmpq_k_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpcmpq_k_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpcmpq_k_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpcmpq_k_zmm_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpcmpq_k_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpq_k_zmm_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpcmpq_k_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpcmpq_k_xmm_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpcmpq_k_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpq_k_xmm_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpq_k_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpcmpq_k_ymm_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpcmpq_k_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpcmpq_k_ymm_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpcmpq_k_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpcmpq_k_zmm_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpcmpq_k_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpq_k_zmm_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpcmpq_k_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpcmpuq_k_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUQ, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1730) }
 inst_vpcmpuq_k_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUQ, operand_count = 4, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1730) }
 inst_vpcmpuq_k_ymm_ymm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUQ, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1731) }
 inst_vpcmpuq_k_ymm_m256_imm8        :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUQ, operand_count = 4, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1731) }
 inst_vpcmpuq_k_zmm_zmm_imm8         :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUQ, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1732) }
 inst_vpcmpuq_k_zmm_m512_imm8        :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCMPUQ, operand_count = 4, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1732) }
-emit_vpcmpuq_k_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpcmpuq_k_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpuq_k_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpcmpuq_k_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpcmpuq_k_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpcmpuq_k_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpcmpuq_k_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpcmpuq_k_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpcmpuq_k_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpcmpuq_k_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpcmpuq_k_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpcmpuq_k_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpcmpuq_k_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpcmpuq_k_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpuq_k_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpcmpuq_k_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpcmpuq_k_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpcmpuq_k_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpcmpuq_k_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpcmpuq_k_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpcmpuq_k_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpcmpuq_k_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpcmpuq_k_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpcmpuq_k_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vptestmb_k_xmm_xmm             :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMB, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), {}} }, 1733) }
 inst_vptestmb_k_xmm_m128            :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMB, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1733) }
 inst_vptestmb_k_ymm_ymm             :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMB, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), {}} }, 1734) }
 inst_vptestmb_k_ymm_m256            :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMB, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1734) }
 inst_vptestmb_k_zmm_zmm             :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMB, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), {}} }, 1735) }
 inst_vptestmb_k_zmm_m512            :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMB, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1735) }
-emit_vptestmb_k_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append(instructions, inst_vptestmb_k_xmm_xmm(dst, src, src2)) }
-emit_vptestmb_k_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append(instructions, inst_vptestmb_k_xmm_m128(dst, src, src2)) }
-emit_vptestmb_k_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append(instructions, inst_vptestmb_k_ymm_ymm(dst, src, src2)) }
-emit_vptestmb_k_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append(instructions, inst_vptestmb_k_ymm_m256(dst, src, src2)) }
-emit_vptestmb_k_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append(instructions, inst_vptestmb_k_zmm_zmm(dst, src, src2)) }
-emit_vptestmb_k_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append(instructions, inst_vptestmb_k_zmm_m512(dst, src, src2)) }
+emit_vptestmb_k_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append_elem(instructions, inst_vptestmb_k_xmm_xmm(dst, src, src2)) }
+emit_vptestmb_k_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append_elem(instructions, inst_vptestmb_k_xmm_m128(dst, src, src2)) }
+emit_vptestmb_k_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append_elem(instructions, inst_vptestmb_k_ymm_ymm(dst, src, src2)) }
+emit_vptestmb_k_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append_elem(instructions, inst_vptestmb_k_ymm_m256(dst, src, src2)) }
+emit_vptestmb_k_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vptestmb_k_zmm_zmm(dst, src, src2)) }
+emit_vptestmb_k_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vptestmb_k_zmm_m512(dst, src, src2)) }
 inst_vptestmw_k_xmm_xmm             :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMW, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), {}} }, 1736) }
 inst_vptestmw_k_xmm_m128            :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMW, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1736) }
 inst_vptestmw_k_ymm_ymm             :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMW, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), {}} }, 1737) }
 inst_vptestmw_k_ymm_m256            :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMW, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1737) }
 inst_vptestmw_k_zmm_zmm             :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMW, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), {}} }, 1738) }
 inst_vptestmw_k_zmm_m512            :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMW, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1738) }
-emit_vptestmw_k_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append(instructions, inst_vptestmw_k_xmm_xmm(dst, src, src2)) }
-emit_vptestmw_k_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append(instructions, inst_vptestmw_k_xmm_m128(dst, src, src2)) }
-emit_vptestmw_k_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append(instructions, inst_vptestmw_k_ymm_ymm(dst, src, src2)) }
-emit_vptestmw_k_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append(instructions, inst_vptestmw_k_ymm_m256(dst, src, src2)) }
-emit_vptestmw_k_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append(instructions, inst_vptestmw_k_zmm_zmm(dst, src, src2)) }
-emit_vptestmw_k_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append(instructions, inst_vptestmw_k_zmm_m512(dst, src, src2)) }
+emit_vptestmw_k_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append_elem(instructions, inst_vptestmw_k_xmm_xmm(dst, src, src2)) }
+emit_vptestmw_k_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append_elem(instructions, inst_vptestmw_k_xmm_m128(dst, src, src2)) }
+emit_vptestmw_k_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append_elem(instructions, inst_vptestmw_k_ymm_ymm(dst, src, src2)) }
+emit_vptestmw_k_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append_elem(instructions, inst_vptestmw_k_ymm_m256(dst, src, src2)) }
+emit_vptestmw_k_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vptestmw_k_zmm_zmm(dst, src, src2)) }
+emit_vptestmw_k_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vptestmw_k_zmm_m512(dst, src, src2)) }
 inst_vptestmd_k_xmm_xmm             :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMD, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), {}} }, 1739) }
 inst_vptestmd_k_xmm_m128            :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMD, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1739) }
 inst_vptestmd_k_ymm_ymm             :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMD, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), {}} }, 1740) }
 inst_vptestmd_k_ymm_m256            :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMD, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1740) }
 inst_vptestmd_k_zmm_zmm             :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMD, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), {}} }, 1741) }
 inst_vptestmd_k_zmm_m512            :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMD, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1741) }
-emit_vptestmd_k_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append(instructions, inst_vptestmd_k_xmm_xmm(dst, src, src2)) }
-emit_vptestmd_k_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append(instructions, inst_vptestmd_k_xmm_m128(dst, src, src2)) }
-emit_vptestmd_k_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append(instructions, inst_vptestmd_k_ymm_ymm(dst, src, src2)) }
-emit_vptestmd_k_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append(instructions, inst_vptestmd_k_ymm_m256(dst, src, src2)) }
-emit_vptestmd_k_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append(instructions, inst_vptestmd_k_zmm_zmm(dst, src, src2)) }
-emit_vptestmd_k_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append(instructions, inst_vptestmd_k_zmm_m512(dst, src, src2)) }
+emit_vptestmd_k_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append_elem(instructions, inst_vptestmd_k_xmm_xmm(dst, src, src2)) }
+emit_vptestmd_k_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append_elem(instructions, inst_vptestmd_k_xmm_m128(dst, src, src2)) }
+emit_vptestmd_k_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append_elem(instructions, inst_vptestmd_k_ymm_ymm(dst, src, src2)) }
+emit_vptestmd_k_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append_elem(instructions, inst_vptestmd_k_ymm_m256(dst, src, src2)) }
+emit_vptestmd_k_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vptestmd_k_zmm_zmm(dst, src, src2)) }
+emit_vptestmd_k_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vptestmd_k_zmm_m512(dst, src, src2)) }
 inst_vptestmq_k_xmm_xmm             :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMQ, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), {}} }, 1742) }
 inst_vptestmq_k_xmm_m128            :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMQ, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1742) }
 inst_vptestmq_k_ymm_ymm             :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMQ, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), {}} }, 1743) }
 inst_vptestmq_k_ymm_m256            :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMQ, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1743) }
 inst_vptestmq_k_zmm_zmm             :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMQ, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), {}} }, 1744) }
 inst_vptestmq_k_zmm_m512            :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTMQ, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1744) }
-emit_vptestmq_k_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append(instructions, inst_vptestmq_k_xmm_xmm(dst, src, src2)) }
-emit_vptestmq_k_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append(instructions, inst_vptestmq_k_xmm_m128(dst, src, src2)) }
-emit_vptestmq_k_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append(instructions, inst_vptestmq_k_ymm_ymm(dst, src, src2)) }
-emit_vptestmq_k_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append(instructions, inst_vptestmq_k_ymm_m256(dst, src, src2)) }
-emit_vptestmq_k_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append(instructions, inst_vptestmq_k_zmm_zmm(dst, src, src2)) }
-emit_vptestmq_k_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append(instructions, inst_vptestmq_k_zmm_m512(dst, src, src2)) }
+emit_vptestmq_k_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append_elem(instructions, inst_vptestmq_k_xmm_xmm(dst, src, src2)) }
+emit_vptestmq_k_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append_elem(instructions, inst_vptestmq_k_xmm_m128(dst, src, src2)) }
+emit_vptestmq_k_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append_elem(instructions, inst_vptestmq_k_ymm_ymm(dst, src, src2)) }
+emit_vptestmq_k_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append_elem(instructions, inst_vptestmq_k_ymm_m256(dst, src, src2)) }
+emit_vptestmq_k_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vptestmq_k_zmm_zmm(dst, src, src2)) }
+emit_vptestmq_k_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vptestmq_k_zmm_m512(dst, src, src2)) }
 inst_vptestnmb_k_xmm_xmm            :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMB, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), {}} }, 1745) }
 inst_vptestnmb_k_xmm_m128           :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMB, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1745) }
 inst_vptestnmb_k_ymm_ymm            :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMB, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), {}} }, 1746) }
 inst_vptestnmb_k_ymm_m256           :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMB, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1746) }
 inst_vptestnmb_k_zmm_zmm            :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMB, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), {}} }, 1747) }
 inst_vptestnmb_k_zmm_m512           :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMB, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1747) }
-emit_vptestnmb_k_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append(instructions, inst_vptestnmb_k_xmm_xmm(dst, src, src2)) }
-emit_vptestnmb_k_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append(instructions, inst_vptestnmb_k_xmm_m128(dst, src, src2)) }
-emit_vptestnmb_k_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append(instructions, inst_vptestnmb_k_ymm_ymm(dst, src, src2)) }
-emit_vptestnmb_k_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append(instructions, inst_vptestnmb_k_ymm_m256(dst, src, src2)) }
-emit_vptestnmb_k_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append(instructions, inst_vptestnmb_k_zmm_zmm(dst, src, src2)) }
-emit_vptestnmb_k_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append(instructions, inst_vptestnmb_k_zmm_m512(dst, src, src2)) }
+emit_vptestnmb_k_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append_elem(instructions, inst_vptestnmb_k_xmm_xmm(dst, src, src2)) }
+emit_vptestnmb_k_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append_elem(instructions, inst_vptestnmb_k_xmm_m128(dst, src, src2)) }
+emit_vptestnmb_k_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append_elem(instructions, inst_vptestnmb_k_ymm_ymm(dst, src, src2)) }
+emit_vptestnmb_k_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append_elem(instructions, inst_vptestnmb_k_ymm_m256(dst, src, src2)) }
+emit_vptestnmb_k_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vptestnmb_k_zmm_zmm(dst, src, src2)) }
+emit_vptestnmb_k_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vptestnmb_k_zmm_m512(dst, src, src2)) }
 inst_vptestnmw_k_xmm_xmm            :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMW, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), {}} }, 1748) }
 inst_vptestnmw_k_xmm_m128           :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMW, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1748) }
 inst_vptestnmw_k_ymm_ymm            :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMW, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), {}} }, 1749) }
 inst_vptestnmw_k_ymm_m256           :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMW, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1749) }
 inst_vptestnmw_k_zmm_zmm            :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMW, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), {}} }, 1750) }
 inst_vptestnmw_k_zmm_m512           :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMW, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1750) }
-emit_vptestnmw_k_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append(instructions, inst_vptestnmw_k_xmm_xmm(dst, src, src2)) }
-emit_vptestnmw_k_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append(instructions, inst_vptestnmw_k_xmm_m128(dst, src, src2)) }
-emit_vptestnmw_k_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append(instructions, inst_vptestnmw_k_ymm_ymm(dst, src, src2)) }
-emit_vptestnmw_k_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append(instructions, inst_vptestnmw_k_ymm_m256(dst, src, src2)) }
-emit_vptestnmw_k_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append(instructions, inst_vptestnmw_k_zmm_zmm(dst, src, src2)) }
-emit_vptestnmw_k_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append(instructions, inst_vptestnmw_k_zmm_m512(dst, src, src2)) }
+emit_vptestnmw_k_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append_elem(instructions, inst_vptestnmw_k_xmm_xmm(dst, src, src2)) }
+emit_vptestnmw_k_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append_elem(instructions, inst_vptestnmw_k_xmm_m128(dst, src, src2)) }
+emit_vptestnmw_k_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append_elem(instructions, inst_vptestnmw_k_ymm_ymm(dst, src, src2)) }
+emit_vptestnmw_k_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append_elem(instructions, inst_vptestnmw_k_ymm_m256(dst, src, src2)) }
+emit_vptestnmw_k_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vptestnmw_k_zmm_zmm(dst, src, src2)) }
+emit_vptestnmw_k_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vptestnmw_k_zmm_m512(dst, src, src2)) }
 inst_vptestnmd_k_xmm_xmm            :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMD, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), {}} }, 1751) }
 inst_vptestnmd_k_xmm_m128           :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMD, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1751) }
 inst_vptestnmd_k_ymm_ymm            :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMD, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), {}} }, 1752) }
 inst_vptestnmd_k_ymm_m256           :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMD, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1752) }
 inst_vptestnmd_k_zmm_zmm            :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMD, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), {}} }, 1753) }
 inst_vptestnmd_k_zmm_m512           :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMD, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1753) }
-emit_vptestnmd_k_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append(instructions, inst_vptestnmd_k_xmm_xmm(dst, src, src2)) }
-emit_vptestnmd_k_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append(instructions, inst_vptestnmd_k_xmm_m128(dst, src, src2)) }
-emit_vptestnmd_k_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append(instructions, inst_vptestnmd_k_ymm_ymm(dst, src, src2)) }
-emit_vptestnmd_k_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append(instructions, inst_vptestnmd_k_ymm_m256(dst, src, src2)) }
-emit_vptestnmd_k_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append(instructions, inst_vptestnmd_k_zmm_zmm(dst, src, src2)) }
-emit_vptestnmd_k_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append(instructions, inst_vptestnmd_k_zmm_m512(dst, src, src2)) }
+emit_vptestnmd_k_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append_elem(instructions, inst_vptestnmd_k_xmm_xmm(dst, src, src2)) }
+emit_vptestnmd_k_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append_elem(instructions, inst_vptestnmd_k_xmm_m128(dst, src, src2)) }
+emit_vptestnmd_k_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append_elem(instructions, inst_vptestnmd_k_ymm_ymm(dst, src, src2)) }
+emit_vptestnmd_k_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append_elem(instructions, inst_vptestnmd_k_ymm_m256(dst, src, src2)) }
+emit_vptestnmd_k_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vptestnmd_k_zmm_zmm(dst, src, src2)) }
+emit_vptestnmd_k_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vptestnmd_k_zmm_m512(dst, src, src2)) }
 inst_vptestnmq_k_xmm_xmm            :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMQ, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_xmm(src2), {}} }, 1754) }
 inst_vptestnmq_k_xmm_m128           :: #force_inline proc "contextless" (dst: KREG, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMQ, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1754) }
 inst_vptestnmq_k_ymm_ymm            :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMQ, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_ymm(src2), {}} }, 1755) }
 inst_vptestnmq_k_ymm_m256           :: #force_inline proc "contextless" (dst: KREG, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMQ, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1755) }
 inst_vptestnmq_k_zmm_zmm            :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMQ, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_zmm(src2), {}} }, 1756) }
 inst_vptestnmq_k_zmm_m512           :: #force_inline proc "contextless" (dst: KREG, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTESTNMQ, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1756) }
-emit_vptestnmq_k_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append(instructions, inst_vptestnmq_k_xmm_xmm(dst, src, src2)) }
-emit_vptestnmq_k_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append(instructions, inst_vptestnmq_k_xmm_m128(dst, src, src2)) }
-emit_vptestnmq_k_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append(instructions, inst_vptestnmq_k_ymm_ymm(dst, src, src2)) }
-emit_vptestnmq_k_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append(instructions, inst_vptestnmq_k_ymm_m256(dst, src, src2)) }
-emit_vptestnmq_k_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append(instructions, inst_vptestnmq_k_zmm_zmm(dst, src, src2)) }
-emit_vptestnmq_k_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append(instructions, inst_vptestnmq_k_zmm_m512(dst, src, src2)) }
+emit_vptestnmq_k_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: XMM) { append_elem(instructions, inst_vptestnmq_k_xmm_xmm(dst, src, src2)) }
+emit_vptestnmq_k_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, src2: Mem128) { append_elem(instructions, inst_vptestnmq_k_xmm_m128(dst, src, src2)) }
+emit_vptestnmq_k_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: YMM) { append_elem(instructions, inst_vptestnmq_k_ymm_ymm(dst, src, src2)) }
+emit_vptestnmq_k_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, src2: Mem256) { append_elem(instructions, inst_vptestnmq_k_ymm_m256(dst, src, src2)) }
+emit_vptestnmq_k_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vptestnmq_k_zmm_zmm(dst, src, src2)) }
+emit_vptestnmq_k_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vptestnmq_k_zmm_m512(dst, src, src2)) }
 inst_vpcompressd_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1757) }
 inst_vpcompressd_m128_xmm           :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1757) }
 inst_vpcompressd_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1758) }
 inst_vpcompressd_m256_ymm           :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSD, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1758) }
 inst_vpcompressd_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1759) }
 inst_vpcompressd_m512_zmm           :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSD, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1759) }
-emit_vpcompressd_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpcompressd_xmm_xmm(dst, src)) }
-emit_vpcompressd_m128_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vpcompressd_m128_xmm(dst, src)) }
-emit_vpcompressd_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpcompressd_ymm_ymm(dst, src)) }
-emit_vpcompressd_m256_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vpcompressd_m256_ymm(dst, src)) }
-emit_vpcompressd_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vpcompressd_zmm_zmm(dst, src)) }
-emit_vpcompressd_m512_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vpcompressd_m512_zmm(dst, src)) }
+emit_vpcompressd_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpcompressd_xmm_xmm(dst, src)) }
+emit_vpcompressd_m128_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vpcompressd_m128_xmm(dst, src)) }
+emit_vpcompressd_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpcompressd_ymm_ymm(dst, src)) }
+emit_vpcompressd_m256_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vpcompressd_m256_ymm(dst, src)) }
+emit_vpcompressd_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vpcompressd_zmm_zmm(dst, src)) }
+emit_vpcompressd_m512_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vpcompressd_m512_zmm(dst, src)) }
 inst_vpcompressq_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1760) }
 inst_vpcompressq_m128_xmm           :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSQ, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1760) }
 inst_vpcompressq_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSQ, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1761) }
 inst_vpcompressq_m256_ymm           :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSQ, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1761) }
 inst_vpcompressq_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSQ, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1762) }
 inst_vpcompressq_m512_zmm           :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCOMPRESSQ, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1762) }
-emit_vpcompressq_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpcompressq_xmm_xmm(dst, src)) }
-emit_vpcompressq_m128_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vpcompressq_m128_xmm(dst, src)) }
-emit_vpcompressq_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpcompressq_ymm_ymm(dst, src)) }
-emit_vpcompressq_m256_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vpcompressq_m256_ymm(dst, src)) }
-emit_vpcompressq_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vpcompressq_zmm_zmm(dst, src)) }
-emit_vpcompressq_m512_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vpcompressq_m512_zmm(dst, src)) }
+emit_vpcompressq_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpcompressq_xmm_xmm(dst, src)) }
+emit_vpcompressq_m128_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vpcompressq_m128_xmm(dst, src)) }
+emit_vpcompressq_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpcompressq_ymm_ymm(dst, src)) }
+emit_vpcompressq_m256_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vpcompressq_m256_ymm(dst, src)) }
+emit_vpcompressq_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vpcompressq_zmm_zmm(dst, src)) }
+emit_vpcompressq_m512_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vpcompressq_m512_zmm(dst, src)) }
 inst_vcompressps_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1763) }
 inst_vcompressps_m128_xmm           :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPS, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1763) }
 inst_vcompressps_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1764) }
 inst_vcompressps_m256_ymm           :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPS, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1764) }
 inst_vcompressps_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPS, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1765) }
 inst_vcompressps_m512_zmm           :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPS, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1765) }
-emit_vcompressps_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcompressps_xmm_xmm(dst, src)) }
-emit_vcompressps_m128_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vcompressps_m128_xmm(dst, src)) }
-emit_vcompressps_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vcompressps_ymm_ymm(dst, src)) }
-emit_vcompressps_m256_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vcompressps_m256_ymm(dst, src)) }
-emit_vcompressps_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vcompressps_zmm_zmm(dst, src)) }
-emit_vcompressps_m512_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vcompressps_m512_zmm(dst, src)) }
+emit_vcompressps_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcompressps_xmm_xmm(dst, src)) }
+emit_vcompressps_m128_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vcompressps_m128_xmm(dst, src)) }
+emit_vcompressps_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vcompressps_ymm_ymm(dst, src)) }
+emit_vcompressps_m256_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vcompressps_m256_ymm(dst, src)) }
+emit_vcompressps_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vcompressps_zmm_zmm(dst, src)) }
+emit_vcompressps_m512_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vcompressps_m512_zmm(dst, src)) }
 inst_vcompresspd_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1766) }
 inst_vcompresspd_m128_xmm           :: #force_inline proc "contextless" (dst: Mem128, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_xmm(src), {}, {}} }, 1766) }
 inst_vcompresspd_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1767) }
 inst_vcompresspd_m256_ymm           :: #force_inline proc "contextless" (dst: Mem256, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPD, operand_count = 2, ops = {op_mem(dst.mem, 32), op_ymm(src), {}, {}} }, 1767) }
 inst_vcompresspd_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1768) }
 inst_vcompresspd_m512_zmm           :: #force_inline proc "contextless" (dst: Mem512, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VCOMPRESSPD, operand_count = 2, ops = {op_mem(dst.mem, 64), op_zmm(src), {}, {}} }, 1768) }
-emit_vcompresspd_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vcompresspd_xmm_xmm(dst, src)) }
-emit_vcompresspd_m128_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append(instructions, inst_vcompresspd_m128_xmm(dst, src)) }
-emit_vcompresspd_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vcompresspd_ymm_ymm(dst, src)) }
-emit_vcompresspd_m256_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append(instructions, inst_vcompresspd_m256_ymm(dst, src)) }
-emit_vcompresspd_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vcompresspd_zmm_zmm(dst, src)) }
-emit_vcompresspd_m512_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append(instructions, inst_vcompresspd_m512_zmm(dst, src)) }
+emit_vcompresspd_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vcompresspd_xmm_xmm(dst, src)) }
+emit_vcompresspd_m128_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: XMM) { append_elem(instructions, inst_vcompresspd_m128_xmm(dst, src)) }
+emit_vcompresspd_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vcompresspd_ymm_ymm(dst, src)) }
+emit_vcompresspd_m256_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: YMM) { append_elem(instructions, inst_vcompresspd_m256_ymm(dst, src)) }
+emit_vcompresspd_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vcompresspd_zmm_zmm(dst, src)) }
+emit_vcompresspd_m512_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512, src: ZMM) { append_elem(instructions, inst_vcompresspd_m512_zmm(dst, src)) }
 inst_vpexpandd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1769) }
 inst_vpexpandd_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1769) }
 inst_vpexpandd_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1770) }
 inst_vpexpandd_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1770) }
 inst_vpexpandd_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1771) }
 inst_vpexpandd_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDD, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1771) }
-emit_vpexpandd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpexpandd_xmm_xmm(dst, src)) }
-emit_vpexpandd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vpexpandd_xmm_m128(dst, src)) }
-emit_vpexpandd_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpexpandd_ymm_ymm(dst, src)) }
-emit_vpexpandd_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vpexpandd_ymm_m256(dst, src)) }
-emit_vpexpandd_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vpexpandd_zmm_zmm(dst, src)) }
-emit_vpexpandd_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vpexpandd_zmm_m512(dst, src)) }
+emit_vpexpandd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpexpandd_xmm_xmm(dst, src)) }
+emit_vpexpandd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vpexpandd_xmm_m128(dst, src)) }
+emit_vpexpandd_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpexpandd_ymm_ymm(dst, src)) }
+emit_vpexpandd_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vpexpandd_ymm_m256(dst, src)) }
+emit_vpexpandd_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vpexpandd_zmm_zmm(dst, src)) }
+emit_vpexpandd_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vpexpandd_zmm_m512(dst, src)) }
 inst_vpexpandq_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1772) }
 inst_vpexpandq_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1772) }
 inst_vpexpandq_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDQ, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1773) }
 inst_vpexpandq_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1773) }
 inst_vpexpandq_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDQ, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1774) }
 inst_vpexpandq_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPEXPANDQ, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1774) }
-emit_vpexpandq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpexpandq_xmm_xmm(dst, src)) }
-emit_vpexpandq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vpexpandq_xmm_m128(dst, src)) }
-emit_vpexpandq_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpexpandq_ymm_ymm(dst, src)) }
-emit_vpexpandq_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vpexpandq_ymm_m256(dst, src)) }
-emit_vpexpandq_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vpexpandq_zmm_zmm(dst, src)) }
-emit_vpexpandq_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vpexpandq_zmm_m512(dst, src)) }
+emit_vpexpandq_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpexpandq_xmm_xmm(dst, src)) }
+emit_vpexpandq_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vpexpandq_xmm_m128(dst, src)) }
+emit_vpexpandq_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpexpandq_ymm_ymm(dst, src)) }
+emit_vpexpandq_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vpexpandq_ymm_m256(dst, src)) }
+emit_vpexpandq_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vpexpandq_zmm_zmm(dst, src)) }
+emit_vpexpandq_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vpexpandq_zmm_m512(dst, src)) }
 inst_vexpandps_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1775) }
 inst_vexpandps_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1775) }
 inst_vexpandps_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1776) }
 inst_vexpandps_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1776) }
 inst_vexpandps_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPS, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1777) }
 inst_vexpandps_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPS, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1777) }
-emit_vexpandps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vexpandps_xmm_xmm(dst, src)) }
-emit_vexpandps_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vexpandps_xmm_m128(dst, src)) }
-emit_vexpandps_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vexpandps_ymm_ymm(dst, src)) }
-emit_vexpandps_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vexpandps_ymm_m256(dst, src)) }
-emit_vexpandps_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vexpandps_zmm_zmm(dst, src)) }
-emit_vexpandps_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vexpandps_zmm_m512(dst, src)) }
+emit_vexpandps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vexpandps_xmm_xmm(dst, src)) }
+emit_vexpandps_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vexpandps_xmm_m128(dst, src)) }
+emit_vexpandps_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vexpandps_ymm_ymm(dst, src)) }
+emit_vexpandps_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vexpandps_ymm_m256(dst, src)) }
+emit_vexpandps_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vexpandps_zmm_zmm(dst, src)) }
+emit_vexpandps_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vexpandps_zmm_m512(dst, src)) }
 inst_vexpandpd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1778) }
 inst_vexpandpd_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1778) }
 inst_vexpandpd_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1779) }
 inst_vexpandpd_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1779) }
 inst_vexpandpd_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1780) }
 inst_vexpandpd_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VEXPANDPD, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1780) }
-emit_vexpandpd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vexpandpd_xmm_xmm(dst, src)) }
-emit_vexpandpd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vexpandpd_xmm_m128(dst, src)) }
-emit_vexpandpd_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vexpandpd_ymm_ymm(dst, src)) }
-emit_vexpandpd_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vexpandpd_ymm_m256(dst, src)) }
-emit_vexpandpd_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vexpandpd_zmm_zmm(dst, src)) }
-emit_vexpandpd_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vexpandpd_zmm_m512(dst, src)) }
+emit_vexpandpd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vexpandpd_xmm_xmm(dst, src)) }
+emit_vexpandpd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vexpandpd_xmm_m128(dst, src)) }
+emit_vexpandpd_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vexpandpd_ymm_ymm(dst, src)) }
+emit_vexpandpd_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vexpandpd_ymm_m256(dst, src)) }
+emit_vexpandpd_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vexpandpd_zmm_zmm(dst, src)) }
+emit_vexpandpd_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vexpandpd_zmm_m512(dst, src)) }
 inst_vpconflictd_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1781) }
 inst_vpconflictd_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1781) }
 inst_vpconflictd_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1782) }
 inst_vpconflictd_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1782) }
 inst_vpconflictd_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1783) }
 inst_vpconflictd_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTD, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1783) }
-emit_vpconflictd_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpconflictd_xmm_xmm(dst, src)) }
-emit_vpconflictd_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vpconflictd_xmm_m128(dst, src)) }
-emit_vpconflictd_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpconflictd_ymm_ymm(dst, src)) }
-emit_vpconflictd_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vpconflictd_ymm_m256(dst, src)) }
-emit_vpconflictd_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vpconflictd_zmm_zmm(dst, src)) }
-emit_vpconflictd_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vpconflictd_zmm_m512(dst, src)) }
+emit_vpconflictd_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpconflictd_xmm_xmm(dst, src)) }
+emit_vpconflictd_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vpconflictd_xmm_m128(dst, src)) }
+emit_vpconflictd_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpconflictd_ymm_ymm(dst, src)) }
+emit_vpconflictd_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vpconflictd_ymm_m256(dst, src)) }
+emit_vpconflictd_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vpconflictd_zmm_zmm(dst, src)) }
+emit_vpconflictd_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vpconflictd_zmm_m512(dst, src)) }
 inst_vpconflictq_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1784) }
 inst_vpconflictq_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1784) }
 inst_vpconflictq_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTQ, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1785) }
 inst_vpconflictq_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1785) }
 inst_vpconflictq_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTQ, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1786) }
 inst_vpconflictq_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPCONFLICTQ, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1786) }
-emit_vpconflictq_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpconflictq_xmm_xmm(dst, src)) }
-emit_vpconflictq_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vpconflictq_xmm_m128(dst, src)) }
-emit_vpconflictq_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vpconflictq_ymm_ymm(dst, src)) }
-emit_vpconflictq_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vpconflictq_ymm_m256(dst, src)) }
-emit_vpconflictq_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vpconflictq_zmm_zmm(dst, src)) }
-emit_vpconflictq_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vpconflictq_zmm_m512(dst, src)) }
+emit_vpconflictq_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpconflictq_xmm_xmm(dst, src)) }
+emit_vpconflictq_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vpconflictq_xmm_m128(dst, src)) }
+emit_vpconflictq_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vpconflictq_ymm_ymm(dst, src)) }
+emit_vpconflictq_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vpconflictq_ymm_m256(dst, src)) }
+emit_vpconflictq_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vpconflictq_zmm_zmm(dst, src)) }
+emit_vpconflictq_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vpconflictq_zmm_m512(dst, src)) }
 inst_vplzcntd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1787) }
 inst_vplzcntd_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1787) }
 inst_vplzcntd_ymm_ymm               :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1788) }
 inst_vplzcntd_ymm_m256              :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1788) }
 inst_vplzcntd_zmm_zmm               :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1789) }
 inst_vplzcntd_zmm_m512              :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTD, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1789) }
-emit_vplzcntd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vplzcntd_xmm_xmm(dst, src)) }
-emit_vplzcntd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vplzcntd_xmm_m128(dst, src)) }
-emit_vplzcntd_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vplzcntd_ymm_ymm(dst, src)) }
-emit_vplzcntd_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vplzcntd_ymm_m256(dst, src)) }
-emit_vplzcntd_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vplzcntd_zmm_zmm(dst, src)) }
-emit_vplzcntd_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vplzcntd_zmm_m512(dst, src)) }
+emit_vplzcntd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vplzcntd_xmm_xmm(dst, src)) }
+emit_vplzcntd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vplzcntd_xmm_m128(dst, src)) }
+emit_vplzcntd_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vplzcntd_ymm_ymm(dst, src)) }
+emit_vplzcntd_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vplzcntd_ymm_m256(dst, src)) }
+emit_vplzcntd_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vplzcntd_zmm_zmm(dst, src)) }
+emit_vplzcntd_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vplzcntd_zmm_m512(dst, src)) }
 inst_vplzcntq_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTQ, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1790) }
 inst_vplzcntq_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTQ, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1790) }
 inst_vplzcntq_ymm_ymm               :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTQ, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1791) }
 inst_vplzcntq_ymm_m256              :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTQ, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1791) }
 inst_vplzcntq_zmm_zmm               :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTQ, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1792) }
 inst_vplzcntq_zmm_m512              :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPLZCNTQ, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1792) }
-emit_vplzcntq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vplzcntq_xmm_xmm(dst, src)) }
-emit_vplzcntq_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vplzcntq_xmm_m128(dst, src)) }
-emit_vplzcntq_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vplzcntq_ymm_ymm(dst, src)) }
-emit_vplzcntq_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vplzcntq_ymm_m256(dst, src)) }
-emit_vplzcntq_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vplzcntq_zmm_zmm(dst, src)) }
-emit_vplzcntq_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vplzcntq_zmm_m512(dst, src)) }
+emit_vplzcntq_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vplzcntq_xmm_xmm(dst, src)) }
+emit_vplzcntq_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vplzcntq_xmm_m128(dst, src)) }
+emit_vplzcntq_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vplzcntq_ymm_ymm(dst, src)) }
+emit_vplzcntq_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vplzcntq_ymm_m256(dst, src)) }
+emit_vplzcntq_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vplzcntq_zmm_zmm(dst, src)) }
+emit_vplzcntq_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vplzcntq_zmm_m512(dst, src)) }
 inst_vpermi2b_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2B, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1793) }
 inst_vpermi2b_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2B, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1793) }
 inst_vpermi2b_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2B, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1794) }
 inst_vpermi2b_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2B, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1794) }
 inst_vpermi2b_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2B, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1795) }
 inst_vpermi2b_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2B, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1795) }
-emit_vpermi2b_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermi2b_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermi2b_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermi2b_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermi2b_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermi2b_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermi2b_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermi2b_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermi2b_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermi2b_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermi2b_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermi2b_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermi2b_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermi2b_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermi2b_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermi2b_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermi2b_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermi2b_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermi2b_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermi2b_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermi2b_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermi2b_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermi2b_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermi2b_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermi2w_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2W, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1796) }
 inst_vpermi2w_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2W, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1796) }
 inst_vpermi2w_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2W, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1797) }
 inst_vpermi2w_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2W, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1797) }
 inst_vpermi2w_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2W, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1798) }
 inst_vpermi2w_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2W, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1798) }
-emit_vpermi2w_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermi2w_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermi2w_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermi2w_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermi2w_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermi2w_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermi2w_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermi2w_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermi2w_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermi2w_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermi2w_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermi2w_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermi2w_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermi2w_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermi2w_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermi2w_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermi2w_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermi2w_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermi2w_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermi2w_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermi2w_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermi2w_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermi2w_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermi2w_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermi2d_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2D, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1799) }
 inst_vpermi2d_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2D, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1799) }
 inst_vpermi2d_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2D, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1800) }
 inst_vpermi2d_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2D, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1800) }
 inst_vpermi2d_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2D, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1801) }
 inst_vpermi2d_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2D, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1801) }
-emit_vpermi2d_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermi2d_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermi2d_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermi2d_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermi2d_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermi2d_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermi2d_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermi2d_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermi2d_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermi2d_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermi2d_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermi2d_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermi2d_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermi2d_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermi2d_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermi2d_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermi2d_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermi2d_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermi2d_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermi2d_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermi2d_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermi2d_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermi2d_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermi2d_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermi2q_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2Q, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1802) }
 inst_vpermi2q_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2Q, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1802) }
 inst_vpermi2q_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2Q, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1803) }
 inst_vpermi2q_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2Q, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1803) }
 inst_vpermi2q_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2Q, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1804) }
 inst_vpermi2q_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2Q, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1804) }
-emit_vpermi2q_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermi2q_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermi2q_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermi2q_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermi2q_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermi2q_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermi2q_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermi2q_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermi2q_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermi2q_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermi2q_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermi2q_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermi2q_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermi2q_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermi2q_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermi2q_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermi2q_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermi2q_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermi2q_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermi2q_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermi2q_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermi2q_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermi2q_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermi2q_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermi2ps_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1805) }
 inst_vpermi2ps_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1805) }
 inst_vpermi2ps_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1806) }
 inst_vpermi2ps_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1806) }
 inst_vpermi2ps_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1807) }
 inst_vpermi2ps_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1807) }
-emit_vpermi2ps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermi2ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermi2ps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermi2ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermi2ps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermi2ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermi2ps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermi2ps_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermi2ps_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermi2ps_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermi2ps_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermi2ps_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermi2ps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermi2ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermi2ps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermi2ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermi2ps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermi2ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermi2ps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermi2ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermi2ps_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermi2ps_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermi2ps_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermi2ps_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermi2pd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1808) }
 inst_vpermi2pd_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1808) }
 inst_vpermi2pd_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1809) }
 inst_vpermi2pd_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1809) }
 inst_vpermi2pd_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1810) }
 inst_vpermi2pd_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMI2PD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1810) }
-emit_vpermi2pd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermi2pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermi2pd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermi2pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermi2pd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermi2pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermi2pd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermi2pd_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermi2pd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermi2pd_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermi2pd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermi2pd_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermi2pd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermi2pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermi2pd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermi2pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermi2pd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermi2pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermi2pd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermi2pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermi2pd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermi2pd_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermi2pd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermi2pd_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermt2b_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2B, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1811) }
 inst_vpermt2b_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2B, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1811) }
 inst_vpermt2b_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2B, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1812) }
 inst_vpermt2b_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2B, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1812) }
 inst_vpermt2b_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2B, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1813) }
 inst_vpermt2b_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2B, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1813) }
-emit_vpermt2b_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermt2b_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermt2b_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermt2b_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermt2b_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermt2b_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermt2b_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermt2b_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermt2b_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermt2b_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermt2b_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermt2b_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermt2b_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermt2b_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermt2b_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermt2b_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermt2b_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermt2b_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermt2b_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermt2b_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermt2b_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermt2b_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermt2b_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermt2b_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermt2w_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2W, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1814) }
 inst_vpermt2w_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2W, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1814) }
 inst_vpermt2w_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2W, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1815) }
 inst_vpermt2w_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2W, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1815) }
 inst_vpermt2w_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2W, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1816) }
 inst_vpermt2w_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2W, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1816) }
-emit_vpermt2w_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermt2w_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermt2w_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermt2w_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermt2w_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermt2w_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermt2w_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermt2w_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermt2w_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermt2w_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermt2w_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermt2w_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermt2w_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermt2w_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermt2w_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermt2w_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermt2w_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermt2w_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermt2w_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermt2w_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermt2w_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermt2w_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermt2w_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermt2w_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermt2d_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2D, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1817) }
 inst_vpermt2d_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2D, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1817) }
 inst_vpermt2d_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2D, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1818) }
 inst_vpermt2d_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2D, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1818) }
 inst_vpermt2d_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2D, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1819) }
 inst_vpermt2d_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2D, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1819) }
-emit_vpermt2d_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermt2d_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermt2d_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermt2d_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermt2d_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermt2d_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermt2d_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermt2d_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermt2d_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermt2d_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermt2d_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermt2d_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermt2d_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermt2d_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermt2d_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermt2d_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermt2d_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermt2d_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermt2d_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermt2d_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermt2d_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermt2d_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermt2d_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermt2d_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermt2q_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2Q, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1820) }
 inst_vpermt2q_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2Q, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1820) }
 inst_vpermt2q_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2Q, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1821) }
 inst_vpermt2q_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2Q, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1821) }
 inst_vpermt2q_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2Q, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1822) }
 inst_vpermt2q_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2Q, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1822) }
-emit_vpermt2q_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermt2q_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermt2q_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermt2q_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermt2q_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermt2q_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermt2q_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermt2q_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermt2q_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermt2q_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermt2q_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermt2q_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermt2q_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermt2q_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermt2q_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermt2q_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermt2q_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermt2q_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermt2q_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermt2q_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermt2q_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermt2q_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermt2q_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermt2q_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermt2ps_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1823) }
 inst_vpermt2ps_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1823) }
 inst_vpermt2ps_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1824) }
 inst_vpermt2ps_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1824) }
 inst_vpermt2ps_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1825) }
 inst_vpermt2ps_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1825) }
-emit_vpermt2ps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermt2ps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermt2ps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermt2ps_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermt2ps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermt2ps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermt2ps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermt2ps_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermt2ps_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermt2ps_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermt2ps_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermt2ps_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermt2ps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermt2ps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermt2ps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermt2ps_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermt2ps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermt2ps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermt2ps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermt2ps_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermt2ps_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermt2ps_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermt2ps_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermt2ps_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermt2pd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1826) }
 inst_vpermt2pd_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1826) }
 inst_vpermt2pd_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1827) }
 inst_vpermt2pd_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1827) }
 inst_vpermt2pd_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1828) }
 inst_vpermt2pd_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMT2PD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1828) }
-emit_vpermt2pd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermt2pd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermt2pd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermt2pd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermt2pd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermt2pd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermt2pd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermt2pd_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermt2pd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermt2pd_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermt2pd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermt2pd_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermt2pd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermt2pd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermt2pd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermt2pd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermt2pd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermt2pd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermt2pd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermt2pd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermt2pd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermt2pd_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermt2pd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermt2pd_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermb_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1829) }
 inst_vpermb_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1829) }
 inst_vpermb_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1830) }
 inst_vpermb_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1830) }
 inst_vpermb_zmm_zmm_zmm             :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMB, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1831) }
 inst_vpermb_zmm_zmm_m512            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMB, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1831) }
-emit_vpermb_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermb_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermb_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermb_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermb_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermb_zmm_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermb_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermb_zmm_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermb_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermb_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermb_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermb_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermb_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermb_zmm_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermb_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermb_zmm_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermb_zmm_zmm_m512(dst, src, src2)) }
 inst_vpermw_xmm_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1832) }
 inst_vpermw_xmm_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1832) }
 inst_vpermw_ymm_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1833) }
 inst_vpermw_ymm_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1833) }
 inst_vpermw_zmm_zmm_zmm             :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1834) }
 inst_vpermw_zmm_zmm_m512            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPERMW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1834) }
-emit_vpermw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpermw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpermw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpermw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpermw_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpermw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpermw_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpermw_ymm_ymm_m256(dst, src, src2)) }
-emit_vpermw_zmm_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpermw_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpermw_zmm_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpermw_zmm_zmm_m512(dst, src, src2)) }
+emit_vpermw_xmm_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpermw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpermw_xmm_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpermw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpermw_ymm_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpermw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpermw_ymm_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpermw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpermw_zmm_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpermw_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpermw_zmm_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpermw_zmm_zmm_m512(dst, src, src2)) }
 inst_vpmovb2m_k_xmm                 :: #force_inline proc "contextless" (dst: KREG, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVB2M, operand_count = 2, ops = {op_kreg(dst), op_xmm(src), {}, {}} }, 1835) }
 inst_vpmovb2m_k_ymm                 :: #force_inline proc "contextless" (dst: KREG, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVB2M, operand_count = 2, ops = {op_kreg(dst), op_ymm(src), {}, {}} }, 1836) }
 inst_vpmovb2m_k_zmm                 :: #force_inline proc "contextless" (dst: KREG, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVB2M, operand_count = 2, ops = {op_kreg(dst), op_zmm(src), {}, {}} }, 1837) }
-emit_vpmovb2m_k_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM) { append(instructions, inst_vpmovb2m_k_xmm(dst, src)) }
-emit_vpmovb2m_k_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM) { append(instructions, inst_vpmovb2m_k_ymm(dst, src)) }
-emit_vpmovb2m_k_zmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM) { append(instructions, inst_vpmovb2m_k_zmm(dst, src)) }
+emit_vpmovb2m_k_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM) { append_elem(instructions, inst_vpmovb2m_k_xmm(dst, src)) }
+emit_vpmovb2m_k_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM) { append_elem(instructions, inst_vpmovb2m_k_ymm(dst, src)) }
+emit_vpmovb2m_k_zmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM) { append_elem(instructions, inst_vpmovb2m_k_zmm(dst, src)) }
 inst_vpmovw2m_k_xmm                 :: #force_inline proc "contextless" (dst: KREG, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVW2M, operand_count = 2, ops = {op_kreg(dst), op_xmm(src), {}, {}} }, 1838) }
 inst_vpmovw2m_k_ymm                 :: #force_inline proc "contextless" (dst: KREG, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVW2M, operand_count = 2, ops = {op_kreg(dst), op_ymm(src), {}, {}} }, 1839) }
 inst_vpmovw2m_k_zmm                 :: #force_inline proc "contextless" (dst: KREG, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVW2M, operand_count = 2, ops = {op_kreg(dst), op_zmm(src), {}, {}} }, 1840) }
-emit_vpmovw2m_k_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM) { append(instructions, inst_vpmovw2m_k_xmm(dst, src)) }
-emit_vpmovw2m_k_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM) { append(instructions, inst_vpmovw2m_k_ymm(dst, src)) }
-emit_vpmovw2m_k_zmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM) { append(instructions, inst_vpmovw2m_k_zmm(dst, src)) }
+emit_vpmovw2m_k_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM) { append_elem(instructions, inst_vpmovw2m_k_xmm(dst, src)) }
+emit_vpmovw2m_k_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM) { append_elem(instructions, inst_vpmovw2m_k_ymm(dst, src)) }
+emit_vpmovw2m_k_zmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM) { append_elem(instructions, inst_vpmovw2m_k_zmm(dst, src)) }
 inst_vpmovd2m_k_xmm                 :: #force_inline proc "contextless" (dst: KREG, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVD2M, operand_count = 2, ops = {op_kreg(dst), op_xmm(src), {}, {}} }, 1841) }
 inst_vpmovd2m_k_ymm                 :: #force_inline proc "contextless" (dst: KREG, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVD2M, operand_count = 2, ops = {op_kreg(dst), op_ymm(src), {}, {}} }, 1842) }
 inst_vpmovd2m_k_zmm                 :: #force_inline proc "contextless" (dst: KREG, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVD2M, operand_count = 2, ops = {op_kreg(dst), op_zmm(src), {}, {}} }, 1843) }
-emit_vpmovd2m_k_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM) { append(instructions, inst_vpmovd2m_k_xmm(dst, src)) }
-emit_vpmovd2m_k_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM) { append(instructions, inst_vpmovd2m_k_ymm(dst, src)) }
-emit_vpmovd2m_k_zmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM) { append(instructions, inst_vpmovd2m_k_zmm(dst, src)) }
+emit_vpmovd2m_k_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM) { append_elem(instructions, inst_vpmovd2m_k_xmm(dst, src)) }
+emit_vpmovd2m_k_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM) { append_elem(instructions, inst_vpmovd2m_k_ymm(dst, src)) }
+emit_vpmovd2m_k_zmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM) { append_elem(instructions, inst_vpmovd2m_k_zmm(dst, src)) }
 inst_vpmovq2m_k_xmm                 :: #force_inline proc "contextless" (dst: KREG, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQ2M, operand_count = 2, ops = {op_kreg(dst), op_xmm(src), {}, {}} }, 1844) }
 inst_vpmovq2m_k_ymm                 :: #force_inline proc "contextless" (dst: KREG, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQ2M, operand_count = 2, ops = {op_kreg(dst), op_ymm(src), {}, {}} }, 1845) }
 inst_vpmovq2m_k_zmm                 :: #force_inline proc "contextless" (dst: KREG, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQ2M, operand_count = 2, ops = {op_kreg(dst), op_zmm(src), {}, {}} }, 1846) }
-emit_vpmovq2m_k_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM) { append(instructions, inst_vpmovq2m_k_xmm(dst, src)) }
-emit_vpmovq2m_k_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM) { append(instructions, inst_vpmovq2m_k_ymm(dst, src)) }
-emit_vpmovq2m_k_zmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM) { append(instructions, inst_vpmovq2m_k_zmm(dst, src)) }
+emit_vpmovq2m_k_xmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM) { append_elem(instructions, inst_vpmovq2m_k_xmm(dst, src)) }
+emit_vpmovq2m_k_ymm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM) { append_elem(instructions, inst_vpmovq2m_k_ymm(dst, src)) }
+emit_vpmovq2m_k_zmm                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM) { append_elem(instructions, inst_vpmovq2m_k_zmm(dst, src)) }
 inst_vpmovm2b_xmm_k                 :: #force_inline proc "contextless" (dst: XMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2B, operand_count = 2, ops = {op_xmm(dst), op_kreg(src), {}, {}} }, 1847) }
 inst_vpmovm2b_ymm_k                 :: #force_inline proc "contextless" (dst: YMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2B, operand_count = 2, ops = {op_ymm(dst), op_kreg(src), {}, {}} }, 1848) }
 inst_vpmovm2b_zmm_k                 :: #force_inline proc "contextless" (dst: ZMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2B, operand_count = 2, ops = {op_zmm(dst), op_kreg(src), {}, {}} }, 1849) }
-emit_vpmovm2b_xmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: KREG) { append(instructions, inst_vpmovm2b_xmm_k(dst, src)) }
-emit_vpmovm2b_ymm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: KREG) { append(instructions, inst_vpmovm2b_ymm_k(dst, src)) }
-emit_vpmovm2b_zmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: KREG) { append(instructions, inst_vpmovm2b_zmm_k(dst, src)) }
+emit_vpmovm2b_xmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: KREG) { append_elem(instructions, inst_vpmovm2b_xmm_k(dst, src)) }
+emit_vpmovm2b_ymm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: KREG) { append_elem(instructions, inst_vpmovm2b_ymm_k(dst, src)) }
+emit_vpmovm2b_zmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: KREG) { append_elem(instructions, inst_vpmovm2b_zmm_k(dst, src)) }
 inst_vpmovm2w_xmm_k                 :: #force_inline proc "contextless" (dst: XMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2W, operand_count = 2, ops = {op_xmm(dst), op_kreg(src), {}, {}} }, 1850) }
 inst_vpmovm2w_ymm_k                 :: #force_inline proc "contextless" (dst: YMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2W, operand_count = 2, ops = {op_ymm(dst), op_kreg(src), {}, {}} }, 1851) }
 inst_vpmovm2w_zmm_k                 :: #force_inline proc "contextless" (dst: ZMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2W, operand_count = 2, ops = {op_zmm(dst), op_kreg(src), {}, {}} }, 1852) }
-emit_vpmovm2w_xmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: KREG) { append(instructions, inst_vpmovm2w_xmm_k(dst, src)) }
-emit_vpmovm2w_ymm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: KREG) { append(instructions, inst_vpmovm2w_ymm_k(dst, src)) }
-emit_vpmovm2w_zmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: KREG) { append(instructions, inst_vpmovm2w_zmm_k(dst, src)) }
+emit_vpmovm2w_xmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: KREG) { append_elem(instructions, inst_vpmovm2w_xmm_k(dst, src)) }
+emit_vpmovm2w_ymm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: KREG) { append_elem(instructions, inst_vpmovm2w_ymm_k(dst, src)) }
+emit_vpmovm2w_zmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: KREG) { append_elem(instructions, inst_vpmovm2w_zmm_k(dst, src)) }
 inst_vpmovm2d_xmm_k                 :: #force_inline proc "contextless" (dst: XMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2D, operand_count = 2, ops = {op_xmm(dst), op_kreg(src), {}, {}} }, 1853) }
 inst_vpmovm2d_ymm_k                 :: #force_inline proc "contextless" (dst: YMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2D, operand_count = 2, ops = {op_ymm(dst), op_kreg(src), {}, {}} }, 1854) }
 inst_vpmovm2d_zmm_k                 :: #force_inline proc "contextless" (dst: ZMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2D, operand_count = 2, ops = {op_zmm(dst), op_kreg(src), {}, {}} }, 1855) }
-emit_vpmovm2d_xmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: KREG) { append(instructions, inst_vpmovm2d_xmm_k(dst, src)) }
-emit_vpmovm2d_ymm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: KREG) { append(instructions, inst_vpmovm2d_ymm_k(dst, src)) }
-emit_vpmovm2d_zmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: KREG) { append(instructions, inst_vpmovm2d_zmm_k(dst, src)) }
+emit_vpmovm2d_xmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: KREG) { append_elem(instructions, inst_vpmovm2d_xmm_k(dst, src)) }
+emit_vpmovm2d_ymm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: KREG) { append_elem(instructions, inst_vpmovm2d_ymm_k(dst, src)) }
+emit_vpmovm2d_zmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: KREG) { append_elem(instructions, inst_vpmovm2d_zmm_k(dst, src)) }
 inst_vpmovm2q_xmm_k                 :: #force_inline proc "contextless" (dst: XMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2Q, operand_count = 2, ops = {op_xmm(dst), op_kreg(src), {}, {}} }, 1856) }
 inst_vpmovm2q_ymm_k                 :: #force_inline proc "contextless" (dst: YMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2Q, operand_count = 2, ops = {op_ymm(dst), op_kreg(src), {}, {}} }, 1857) }
 inst_vpmovm2q_zmm_k                 :: #force_inline proc "contextless" (dst: ZMM, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVM2Q, operand_count = 2, ops = {op_zmm(dst), op_kreg(src), {}, {}} }, 1858) }
-emit_vpmovm2q_xmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: KREG) { append(instructions, inst_vpmovm2q_xmm_k(dst, src)) }
-emit_vpmovm2q_ymm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: KREG) { append(instructions, inst_vpmovm2q_ymm_k(dst, src)) }
-emit_vpmovm2q_zmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: KREG) { append(instructions, inst_vpmovm2q_zmm_k(dst, src)) }
+emit_vpmovm2q_xmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: KREG) { append_elem(instructions, inst_vpmovm2q_xmm_k(dst, src)) }
+emit_vpmovm2q_ymm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: KREG) { append_elem(instructions, inst_vpmovm2q_ymm_k(dst, src)) }
+emit_vpmovm2q_zmm_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: KREG) { append_elem(instructions, inst_vpmovm2q_zmm_k(dst, src)) }
 inst_vpmovqb_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1859) }
 inst_vpmovqb_m32_xmm                :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1859) }
 inst_vpmovqb_xmm_ymm                :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1860) }
 inst_vpmovqb_m32_ymm                :: #force_inline proc "contextless" (dst: Mem32, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_ymm(src), {}, {}} }, 1860) }
 inst_vpmovqb_xmm_zmm                :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQB, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1861) }
 inst_vpmovqb_m64_zmm                :: #force_inline proc "contextless" (dst: Mem64, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_zmm(src), {}, {}} }, 1861) }
-emit_vpmovqb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovqb_xmm_xmm(dst, src)) }
-emit_vpmovqb_m32_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovqb_m32_xmm(dst, src)) }
-emit_vpmovqb_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovqb_xmm_ymm(dst, src)) }
-emit_vpmovqb_m32_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: YMM) { append(instructions, inst_vpmovqb_m32_ymm(dst, src)) }
-emit_vpmovqb_xmm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovqb_xmm_zmm(dst, src)) }
-emit_vpmovqb_m64_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: ZMM) { append(instructions, inst_vpmovqb_m64_zmm(dst, src)) }
+emit_vpmovqb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovqb_xmm_xmm(dst, src)) }
+emit_vpmovqb_m32_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovqb_m32_xmm(dst, src)) }
+emit_vpmovqb_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovqb_xmm_ymm(dst, src)) }
+emit_vpmovqb_m32_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: YMM) { append_elem(instructions, inst_vpmovqb_m32_ymm(dst, src)) }
+emit_vpmovqb_xmm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovqb_xmm_zmm(dst, src)) }
+emit_vpmovqb_m64_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: ZMM) { append_elem(instructions, inst_vpmovqb_m64_zmm(dst, src)) }
 inst_vpmovsqb_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1862) }
 inst_vpmovsqb_m32_xmm               :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1862) }
 inst_vpmovsqb_xmm_ymm               :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1863) }
 inst_vpmovsqb_m32_ymm               :: #force_inline proc "contextless" (dst: Mem32, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_ymm(src), {}, {}} }, 1863) }
 inst_vpmovsqb_xmm_zmm               :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQB, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1864) }
 inst_vpmovsqb_m64_zmm               :: #force_inline proc "contextless" (dst: Mem64, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_zmm(src), {}, {}} }, 1864) }
-emit_vpmovsqb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsqb_xmm_xmm(dst, src)) }
-emit_vpmovsqb_m32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovsqb_m32_xmm(dst, src)) }
-emit_vpmovsqb_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovsqb_xmm_ymm(dst, src)) }
-emit_vpmovsqb_m32_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: YMM) { append(instructions, inst_vpmovsqb_m32_ymm(dst, src)) }
-emit_vpmovsqb_xmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovsqb_xmm_zmm(dst, src)) }
-emit_vpmovsqb_m64_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: ZMM) { append(instructions, inst_vpmovsqb_m64_zmm(dst, src)) }
+emit_vpmovsqb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsqb_xmm_xmm(dst, src)) }
+emit_vpmovsqb_m32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovsqb_m32_xmm(dst, src)) }
+emit_vpmovsqb_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovsqb_xmm_ymm(dst, src)) }
+emit_vpmovsqb_m32_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: YMM) { append_elem(instructions, inst_vpmovsqb_m32_ymm(dst, src)) }
+emit_vpmovsqb_xmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovsqb_xmm_zmm(dst, src)) }
+emit_vpmovsqb_m64_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: ZMM) { append_elem(instructions, inst_vpmovsqb_m64_zmm(dst, src)) }
 inst_vpmovusqb_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1865) }
 inst_vpmovusqb_m32_xmm              :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1865) }
 inst_vpmovusqb_xmm_ymm              :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1866) }
 inst_vpmovusqb_m32_ymm              :: #force_inline proc "contextless" (dst: Mem32, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_ymm(src), {}, {}} }, 1866) }
 inst_vpmovusqb_xmm_zmm              :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQB, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1867) }
 inst_vpmovusqb_m64_zmm              :: #force_inline proc "contextless" (dst: Mem64, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_zmm(src), {}, {}} }, 1867) }
-emit_vpmovusqb_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovusqb_xmm_xmm(dst, src)) }
-emit_vpmovusqb_m32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovusqb_m32_xmm(dst, src)) }
-emit_vpmovusqb_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovusqb_xmm_ymm(dst, src)) }
-emit_vpmovusqb_m32_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: YMM) { append(instructions, inst_vpmovusqb_m32_ymm(dst, src)) }
-emit_vpmovusqb_xmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovusqb_xmm_zmm(dst, src)) }
-emit_vpmovusqb_m64_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: ZMM) { append(instructions, inst_vpmovusqb_m64_zmm(dst, src)) }
+emit_vpmovusqb_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovusqb_xmm_xmm(dst, src)) }
+emit_vpmovusqb_m32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovusqb_m32_xmm(dst, src)) }
+emit_vpmovusqb_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovusqb_xmm_ymm(dst, src)) }
+emit_vpmovusqb_m32_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: YMM) { append_elem(instructions, inst_vpmovusqb_m32_ymm(dst, src)) }
+emit_vpmovusqb_xmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovusqb_xmm_zmm(dst, src)) }
+emit_vpmovusqb_m64_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: ZMM) { append_elem(instructions, inst_vpmovusqb_m64_zmm(dst, src)) }
 inst_vpmovqw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1868) }
 inst_vpmovqw_m32_xmm                :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQW, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1868) }
 inst_vpmovqw_xmm_ymm                :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQW, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1869) }
 inst_vpmovqw_m64_ymm                :: #force_inline proc "contextless" (dst: Mem64, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQW, operand_count = 2, ops = {op_mem(dst.mem, 8), op_ymm(src), {}, {}} }, 1869) }
 inst_vpmovqw_xmm_zmm                :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQW, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1870) }
 inst_vpmovqw_m128_zmm               :: #force_inline proc "contextless" (dst: Mem128, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQW, operand_count = 2, ops = {op_mem(dst.mem, 16), op_zmm(src), {}, {}} }, 1870) }
-emit_vpmovqw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovqw_xmm_xmm(dst, src)) }
-emit_vpmovqw_m32_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovqw_m32_xmm(dst, src)) }
-emit_vpmovqw_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovqw_xmm_ymm(dst, src)) }
-emit_vpmovqw_m64_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append(instructions, inst_vpmovqw_m64_ymm(dst, src)) }
-emit_vpmovqw_xmm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovqw_xmm_zmm(dst, src)) }
-emit_vpmovqw_m128_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append(instructions, inst_vpmovqw_m128_zmm(dst, src)) }
+emit_vpmovqw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovqw_xmm_xmm(dst, src)) }
+emit_vpmovqw_m32_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovqw_m32_xmm(dst, src)) }
+emit_vpmovqw_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovqw_xmm_ymm(dst, src)) }
+emit_vpmovqw_m64_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append_elem(instructions, inst_vpmovqw_m64_ymm(dst, src)) }
+emit_vpmovqw_xmm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovqw_xmm_zmm(dst, src)) }
+emit_vpmovqw_m128_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append_elem(instructions, inst_vpmovqw_m128_zmm(dst, src)) }
 inst_vpmovsqw_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1871) }
 inst_vpmovsqw_m32_xmm               :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQW, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1871) }
 inst_vpmovsqw_xmm_ymm               :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQW, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1872) }
 inst_vpmovsqw_m64_ymm               :: #force_inline proc "contextless" (dst: Mem64, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQW, operand_count = 2, ops = {op_mem(dst.mem, 8), op_ymm(src), {}, {}} }, 1872) }
 inst_vpmovsqw_xmm_zmm               :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQW, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1873) }
 inst_vpmovsqw_m128_zmm              :: #force_inline proc "contextless" (dst: Mem128, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQW, operand_count = 2, ops = {op_mem(dst.mem, 16), op_zmm(src), {}, {}} }, 1873) }
-emit_vpmovsqw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsqw_xmm_xmm(dst, src)) }
-emit_vpmovsqw_m32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovsqw_m32_xmm(dst, src)) }
-emit_vpmovsqw_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovsqw_xmm_ymm(dst, src)) }
-emit_vpmovsqw_m64_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append(instructions, inst_vpmovsqw_m64_ymm(dst, src)) }
-emit_vpmovsqw_xmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovsqw_xmm_zmm(dst, src)) }
-emit_vpmovsqw_m128_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append(instructions, inst_vpmovsqw_m128_zmm(dst, src)) }
+emit_vpmovsqw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsqw_xmm_xmm(dst, src)) }
+emit_vpmovsqw_m32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovsqw_m32_xmm(dst, src)) }
+emit_vpmovsqw_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovsqw_xmm_ymm(dst, src)) }
+emit_vpmovsqw_m64_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append_elem(instructions, inst_vpmovsqw_m64_ymm(dst, src)) }
+emit_vpmovsqw_xmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovsqw_xmm_zmm(dst, src)) }
+emit_vpmovsqw_m128_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append_elem(instructions, inst_vpmovsqw_m128_zmm(dst, src)) }
 inst_vpmovusqw_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1874) }
 inst_vpmovusqw_m32_xmm              :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQW, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1874) }
 inst_vpmovusqw_xmm_ymm              :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQW, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1875) }
 inst_vpmovusqw_m64_ymm              :: #force_inline proc "contextless" (dst: Mem64, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQW, operand_count = 2, ops = {op_mem(dst.mem, 8), op_ymm(src), {}, {}} }, 1875) }
 inst_vpmovusqw_xmm_zmm              :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQW, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1876) }
 inst_vpmovusqw_m128_zmm             :: #force_inline proc "contextless" (dst: Mem128, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQW, operand_count = 2, ops = {op_mem(dst.mem, 16), op_zmm(src), {}, {}} }, 1876) }
-emit_vpmovusqw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovusqw_xmm_xmm(dst, src)) }
-emit_vpmovusqw_m32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovusqw_m32_xmm(dst, src)) }
-emit_vpmovusqw_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovusqw_xmm_ymm(dst, src)) }
-emit_vpmovusqw_m64_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append(instructions, inst_vpmovusqw_m64_ymm(dst, src)) }
-emit_vpmovusqw_xmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovusqw_xmm_zmm(dst, src)) }
-emit_vpmovusqw_m128_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append(instructions, inst_vpmovusqw_m128_zmm(dst, src)) }
+emit_vpmovusqw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovusqw_xmm_xmm(dst, src)) }
+emit_vpmovusqw_m32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovusqw_m32_xmm(dst, src)) }
+emit_vpmovusqw_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovusqw_xmm_ymm(dst, src)) }
+emit_vpmovusqw_m64_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append_elem(instructions, inst_vpmovusqw_m64_ymm(dst, src)) }
+emit_vpmovusqw_xmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovusqw_xmm_zmm(dst, src)) }
+emit_vpmovusqw_m128_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append_elem(instructions, inst_vpmovusqw_m128_zmm(dst, src)) }
 inst_vpmovqd_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1877) }
 inst_vpmovqd_m64_xmm                :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1877) }
 inst_vpmovqd_xmm_ymm                :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQD, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1878) }
 inst_vpmovqd_m128_ymm               :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1878) }
 inst_vpmovqd_ymm_zmm                :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQD, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1879) }
 inst_vpmovqd_m256_zmm               :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVQD, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1879) }
-emit_vpmovqd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovqd_xmm_xmm(dst, src)) }
-emit_vpmovqd_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovqd_m64_xmm(dst, src)) }
-emit_vpmovqd_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovqd_xmm_ymm(dst, src)) }
-emit_vpmovqd_m128_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovqd_m128_ymm(dst, src)) }
-emit_vpmovqd_ymm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovqd_ymm_zmm(dst, src)) }
-emit_vpmovqd_m256_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovqd_m256_zmm(dst, src)) }
+emit_vpmovqd_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovqd_xmm_xmm(dst, src)) }
+emit_vpmovqd_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovqd_m64_xmm(dst, src)) }
+emit_vpmovqd_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovqd_xmm_ymm(dst, src)) }
+emit_vpmovqd_m128_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovqd_m128_ymm(dst, src)) }
+emit_vpmovqd_ymm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovqd_ymm_zmm(dst, src)) }
+emit_vpmovqd_m256_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovqd_m256_zmm(dst, src)) }
 inst_vpmovsqd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1880) }
 inst_vpmovsqd_m64_xmm               :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1880) }
 inst_vpmovsqd_xmm_ymm               :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQD, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1881) }
 inst_vpmovsqd_m128_ymm              :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1881) }
 inst_vpmovsqd_ymm_zmm               :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQD, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1882) }
 inst_vpmovsqd_m256_zmm              :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSQD, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1882) }
-emit_vpmovsqd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsqd_xmm_xmm(dst, src)) }
-emit_vpmovsqd_m64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovsqd_m64_xmm(dst, src)) }
-emit_vpmovsqd_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovsqd_xmm_ymm(dst, src)) }
-emit_vpmovsqd_m128_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovsqd_m128_ymm(dst, src)) }
-emit_vpmovsqd_ymm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovsqd_ymm_zmm(dst, src)) }
-emit_vpmovsqd_m256_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovsqd_m256_zmm(dst, src)) }
+emit_vpmovsqd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsqd_xmm_xmm(dst, src)) }
+emit_vpmovsqd_m64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovsqd_m64_xmm(dst, src)) }
+emit_vpmovsqd_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovsqd_xmm_ymm(dst, src)) }
+emit_vpmovsqd_m128_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovsqd_m128_ymm(dst, src)) }
+emit_vpmovsqd_ymm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovsqd_ymm_zmm(dst, src)) }
+emit_vpmovsqd_m256_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovsqd_m256_zmm(dst, src)) }
 inst_vpmovusqd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1883) }
 inst_vpmovusqd_m64_xmm              :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1883) }
 inst_vpmovusqd_xmm_ymm              :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQD, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1884) }
 inst_vpmovusqd_m128_ymm             :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQD, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1884) }
 inst_vpmovusqd_ymm_zmm              :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQD, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1885) }
 inst_vpmovusqd_m256_zmm             :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSQD, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1885) }
-emit_vpmovusqd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovusqd_xmm_xmm(dst, src)) }
-emit_vpmovusqd_m64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovusqd_m64_xmm(dst, src)) }
-emit_vpmovusqd_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovusqd_xmm_ymm(dst, src)) }
-emit_vpmovusqd_m128_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovusqd_m128_ymm(dst, src)) }
-emit_vpmovusqd_ymm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovusqd_ymm_zmm(dst, src)) }
-emit_vpmovusqd_m256_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovusqd_m256_zmm(dst, src)) }
+emit_vpmovusqd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovusqd_xmm_xmm(dst, src)) }
+emit_vpmovusqd_m64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovusqd_m64_xmm(dst, src)) }
+emit_vpmovusqd_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovusqd_xmm_ymm(dst, src)) }
+emit_vpmovusqd_m128_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovusqd_m128_ymm(dst, src)) }
+emit_vpmovusqd_ymm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovusqd_ymm_zmm(dst, src)) }
+emit_vpmovusqd_m256_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovusqd_m256_zmm(dst, src)) }
 inst_vpmovdb_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1886) }
 inst_vpmovdb_m32_xmm                :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1886) }
 inst_vpmovdb_xmm_ymm                :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1887) }
 inst_vpmovdb_m64_ymm                :: #force_inline proc "contextless" (dst: Mem64, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_ymm(src), {}, {}} }, 1887) }
 inst_vpmovdb_xmm_zmm                :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDB, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1888) }
 inst_vpmovdb_m128_zmm               :: #force_inline proc "contextless" (dst: Mem128, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDB, operand_count = 2, ops = {op_mem(dst.mem, 16), op_zmm(src), {}, {}} }, 1888) }
-emit_vpmovdb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovdb_xmm_xmm(dst, src)) }
-emit_vpmovdb_m32_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovdb_m32_xmm(dst, src)) }
-emit_vpmovdb_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovdb_xmm_ymm(dst, src)) }
-emit_vpmovdb_m64_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append(instructions, inst_vpmovdb_m64_ymm(dst, src)) }
-emit_vpmovdb_xmm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovdb_xmm_zmm(dst, src)) }
-emit_vpmovdb_m128_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append(instructions, inst_vpmovdb_m128_zmm(dst, src)) }
+emit_vpmovdb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovdb_xmm_xmm(dst, src)) }
+emit_vpmovdb_m32_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovdb_m32_xmm(dst, src)) }
+emit_vpmovdb_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovdb_xmm_ymm(dst, src)) }
+emit_vpmovdb_m64_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append_elem(instructions, inst_vpmovdb_m64_ymm(dst, src)) }
+emit_vpmovdb_xmm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovdb_xmm_zmm(dst, src)) }
+emit_vpmovdb_m128_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append_elem(instructions, inst_vpmovdb_m128_zmm(dst, src)) }
 inst_vpmovsdb_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1889) }
 inst_vpmovsdb_m32_xmm               :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1889) }
 inst_vpmovsdb_xmm_ymm               :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1890) }
 inst_vpmovsdb_m64_ymm               :: #force_inline proc "contextless" (dst: Mem64, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_ymm(src), {}, {}} }, 1890) }
 inst_vpmovsdb_xmm_zmm               :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDB, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1891) }
 inst_vpmovsdb_m128_zmm              :: #force_inline proc "contextless" (dst: Mem128, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDB, operand_count = 2, ops = {op_mem(dst.mem, 16), op_zmm(src), {}, {}} }, 1891) }
-emit_vpmovsdb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsdb_xmm_xmm(dst, src)) }
-emit_vpmovsdb_m32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovsdb_m32_xmm(dst, src)) }
-emit_vpmovsdb_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovsdb_xmm_ymm(dst, src)) }
-emit_vpmovsdb_m64_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append(instructions, inst_vpmovsdb_m64_ymm(dst, src)) }
-emit_vpmovsdb_xmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovsdb_xmm_zmm(dst, src)) }
-emit_vpmovsdb_m128_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append(instructions, inst_vpmovsdb_m128_zmm(dst, src)) }
+emit_vpmovsdb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsdb_xmm_xmm(dst, src)) }
+emit_vpmovsdb_m32_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovsdb_m32_xmm(dst, src)) }
+emit_vpmovsdb_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovsdb_xmm_ymm(dst, src)) }
+emit_vpmovsdb_m64_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append_elem(instructions, inst_vpmovsdb_m64_ymm(dst, src)) }
+emit_vpmovsdb_xmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovsdb_xmm_zmm(dst, src)) }
+emit_vpmovsdb_m128_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append_elem(instructions, inst_vpmovsdb_m128_zmm(dst, src)) }
 inst_vpmovusdb_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1892) }
 inst_vpmovusdb_m32_xmm              :: #force_inline proc "contextless" (dst: Mem32, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDB, operand_count = 2, ops = {op_mem(dst.mem, 4), op_xmm(src), {}, {}} }, 1892) }
 inst_vpmovusdb_xmm_ymm              :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1893) }
 inst_vpmovusdb_m64_ymm              :: #force_inline proc "contextless" (dst: Mem64, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_ymm(src), {}, {}} }, 1893) }
 inst_vpmovusdb_xmm_zmm              :: #force_inline proc "contextless" (dst: XMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDB, operand_count = 2, ops = {op_xmm(dst), op_zmm(src), {}, {}} }, 1894) }
 inst_vpmovusdb_m128_zmm             :: #force_inline proc "contextless" (dst: Mem128, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDB, operand_count = 2, ops = {op_mem(dst.mem, 16), op_zmm(src), {}, {}} }, 1894) }
-emit_vpmovusdb_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovusdb_xmm_xmm(dst, src)) }
-emit_vpmovusdb_m32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append(instructions, inst_vpmovusdb_m32_xmm(dst, src)) }
-emit_vpmovusdb_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovusdb_xmm_ymm(dst, src)) }
-emit_vpmovusdb_m64_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append(instructions, inst_vpmovusdb_m64_ymm(dst, src)) }
-emit_vpmovusdb_xmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append(instructions, inst_vpmovusdb_xmm_zmm(dst, src)) }
-emit_vpmovusdb_m128_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append(instructions, inst_vpmovusdb_m128_zmm(dst, src)) }
+emit_vpmovusdb_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovusdb_xmm_xmm(dst, src)) }
+emit_vpmovusdb_m32_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: XMM) { append_elem(instructions, inst_vpmovusdb_m32_xmm(dst, src)) }
+emit_vpmovusdb_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovusdb_xmm_ymm(dst, src)) }
+emit_vpmovusdb_m64_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: YMM) { append_elem(instructions, inst_vpmovusdb_m64_ymm(dst, src)) }
+emit_vpmovusdb_xmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: ZMM) { append_elem(instructions, inst_vpmovusdb_xmm_zmm(dst, src)) }
+emit_vpmovusdb_m128_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: ZMM) { append_elem(instructions, inst_vpmovusdb_m128_zmm(dst, src)) }
 inst_vpmovdw_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1895) }
 inst_vpmovdw_m64_xmm                :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDW, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1895) }
 inst_vpmovdw_xmm_ymm                :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDW, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1896) }
 inst_vpmovdw_m128_ymm               :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDW, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1896) }
 inst_vpmovdw_ymm_zmm                :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDW, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1897) }
 inst_vpmovdw_m256_zmm               :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVDW, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1897) }
-emit_vpmovdw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovdw_xmm_xmm(dst, src)) }
-emit_vpmovdw_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovdw_m64_xmm(dst, src)) }
-emit_vpmovdw_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovdw_xmm_ymm(dst, src)) }
-emit_vpmovdw_m128_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovdw_m128_ymm(dst, src)) }
-emit_vpmovdw_ymm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovdw_ymm_zmm(dst, src)) }
-emit_vpmovdw_m256_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovdw_m256_zmm(dst, src)) }
+emit_vpmovdw_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovdw_xmm_xmm(dst, src)) }
+emit_vpmovdw_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovdw_m64_xmm(dst, src)) }
+emit_vpmovdw_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovdw_xmm_ymm(dst, src)) }
+emit_vpmovdw_m128_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovdw_m128_ymm(dst, src)) }
+emit_vpmovdw_ymm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovdw_ymm_zmm(dst, src)) }
+emit_vpmovdw_m256_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovdw_m256_zmm(dst, src)) }
 inst_vpmovsdw_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1898) }
 inst_vpmovsdw_m64_xmm               :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDW, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1898) }
 inst_vpmovsdw_xmm_ymm               :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDW, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1899) }
 inst_vpmovsdw_m128_ymm              :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDW, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1899) }
 inst_vpmovsdw_ymm_zmm               :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDW, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1900) }
 inst_vpmovsdw_m256_zmm              :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSDW, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1900) }
-emit_vpmovsdw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovsdw_xmm_xmm(dst, src)) }
-emit_vpmovsdw_m64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovsdw_m64_xmm(dst, src)) }
-emit_vpmovsdw_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovsdw_xmm_ymm(dst, src)) }
-emit_vpmovsdw_m128_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovsdw_m128_ymm(dst, src)) }
-emit_vpmovsdw_ymm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovsdw_ymm_zmm(dst, src)) }
-emit_vpmovsdw_m256_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovsdw_m256_zmm(dst, src)) }
+emit_vpmovsdw_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovsdw_xmm_xmm(dst, src)) }
+emit_vpmovsdw_m64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovsdw_m64_xmm(dst, src)) }
+emit_vpmovsdw_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovsdw_xmm_ymm(dst, src)) }
+emit_vpmovsdw_m128_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovsdw_m128_ymm(dst, src)) }
+emit_vpmovsdw_ymm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovsdw_ymm_zmm(dst, src)) }
+emit_vpmovsdw_m256_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovsdw_m256_zmm(dst, src)) }
 inst_vpmovusdw_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDW, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1901) }
 inst_vpmovusdw_m64_xmm              :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDW, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1901) }
 inst_vpmovusdw_xmm_ymm              :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDW, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1902) }
 inst_vpmovusdw_m128_ymm             :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDW, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1902) }
 inst_vpmovusdw_ymm_zmm              :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDW, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1903) }
 inst_vpmovusdw_m256_zmm             :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSDW, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1903) }
-emit_vpmovusdw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovusdw_xmm_xmm(dst, src)) }
-emit_vpmovusdw_m64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovusdw_m64_xmm(dst, src)) }
-emit_vpmovusdw_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovusdw_xmm_ymm(dst, src)) }
-emit_vpmovusdw_m128_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovusdw_m128_ymm(dst, src)) }
-emit_vpmovusdw_ymm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovusdw_ymm_zmm(dst, src)) }
-emit_vpmovusdw_m256_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovusdw_m256_zmm(dst, src)) }
+emit_vpmovusdw_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovusdw_xmm_xmm(dst, src)) }
+emit_vpmovusdw_m64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovusdw_m64_xmm(dst, src)) }
+emit_vpmovusdw_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovusdw_xmm_ymm(dst, src)) }
+emit_vpmovusdw_m128_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovusdw_m128_ymm(dst, src)) }
+emit_vpmovusdw_ymm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovusdw_ymm_zmm(dst, src)) }
+emit_vpmovusdw_m256_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovusdw_m256_zmm(dst, src)) }
 inst_vpmovwb_xmm_xmm                :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVWB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1904) }
 inst_vpmovwb_m64_xmm                :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVWB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1904) }
 inst_vpmovwb_xmm_ymm                :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVWB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1905) }
 inst_vpmovwb_m128_ymm               :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVWB, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1905) }
 inst_vpmovwb_ymm_zmm                :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVWB, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1906) }
 inst_vpmovwb_m256_zmm               :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVWB, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1906) }
-emit_vpmovwb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovwb_xmm_xmm(dst, src)) }
-emit_vpmovwb_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovwb_m64_xmm(dst, src)) }
-emit_vpmovwb_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovwb_xmm_ymm(dst, src)) }
-emit_vpmovwb_m128_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovwb_m128_ymm(dst, src)) }
-emit_vpmovwb_ymm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovwb_ymm_zmm(dst, src)) }
-emit_vpmovwb_m256_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovwb_m256_zmm(dst, src)) }
+emit_vpmovwb_xmm_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovwb_xmm_xmm(dst, src)) }
+emit_vpmovwb_m64_xmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovwb_m64_xmm(dst, src)) }
+emit_vpmovwb_xmm_ymm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovwb_xmm_ymm(dst, src)) }
+emit_vpmovwb_m128_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovwb_m128_ymm(dst, src)) }
+emit_vpmovwb_ymm_zmm                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovwb_ymm_zmm(dst, src)) }
+emit_vpmovwb_m256_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovwb_m256_zmm(dst, src)) }
 inst_vpmovswb_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSWB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1907) }
 inst_vpmovswb_m64_xmm               :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSWB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1907) }
 inst_vpmovswb_xmm_ymm               :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSWB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1908) }
 inst_vpmovswb_m128_ymm              :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSWB, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1908) }
 inst_vpmovswb_ymm_zmm               :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSWB, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1909) }
 inst_vpmovswb_m256_zmm              :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVSWB, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1909) }
-emit_vpmovswb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovswb_xmm_xmm(dst, src)) }
-emit_vpmovswb_m64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovswb_m64_xmm(dst, src)) }
-emit_vpmovswb_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovswb_xmm_ymm(dst, src)) }
-emit_vpmovswb_m128_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovswb_m128_ymm(dst, src)) }
-emit_vpmovswb_ymm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovswb_ymm_zmm(dst, src)) }
-emit_vpmovswb_m256_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovswb_m256_zmm(dst, src)) }
+emit_vpmovswb_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovswb_xmm_xmm(dst, src)) }
+emit_vpmovswb_m64_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovswb_m64_xmm(dst, src)) }
+emit_vpmovswb_xmm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovswb_xmm_ymm(dst, src)) }
+emit_vpmovswb_m128_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovswb_m128_ymm(dst, src)) }
+emit_vpmovswb_ymm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovswb_ymm_zmm(dst, src)) }
+emit_vpmovswb_m256_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovswb_m256_zmm(dst, src)) }
 inst_vpmovuswb_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSWB, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1910) }
 inst_vpmovuswb_m64_xmm              :: #force_inline proc "contextless" (dst: Mem64, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSWB, operand_count = 2, ops = {op_mem(dst.mem, 8), op_xmm(src), {}, {}} }, 1910) }
 inst_vpmovuswb_xmm_ymm              :: #force_inline proc "contextless" (dst: XMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSWB, operand_count = 2, ops = {op_xmm(dst), op_ymm(src), {}, {}} }, 1911) }
 inst_vpmovuswb_m128_ymm             :: #force_inline proc "contextless" (dst: Mem128, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSWB, operand_count = 2, ops = {op_mem(dst.mem, 16), op_ymm(src), {}, {}} }, 1911) }
 inst_vpmovuswb_ymm_zmm              :: #force_inline proc "contextless" (dst: YMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSWB, operand_count = 2, ops = {op_ymm(dst), op_zmm(src), {}, {}} }, 1912) }
 inst_vpmovuswb_m256_zmm             :: #force_inline proc "contextless" (dst: Mem256, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMOVUSWB, operand_count = 2, ops = {op_mem(dst.mem, 32), op_zmm(src), {}, {}} }, 1912) }
-emit_vpmovuswb_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vpmovuswb_xmm_xmm(dst, src)) }
-emit_vpmovuswb_m64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append(instructions, inst_vpmovuswb_m64_xmm(dst, src)) }
-emit_vpmovuswb_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append(instructions, inst_vpmovuswb_xmm_ymm(dst, src)) }
-emit_vpmovuswb_m128_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append(instructions, inst_vpmovuswb_m128_ymm(dst, src)) }
-emit_vpmovuswb_ymm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append(instructions, inst_vpmovuswb_ymm_zmm(dst, src)) }
-emit_vpmovuswb_m256_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append(instructions, inst_vpmovuswb_m256_zmm(dst, src)) }
+emit_vpmovuswb_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vpmovuswb_xmm_xmm(dst, src)) }
+emit_vpmovuswb_m64_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: XMM) { append_elem(instructions, inst_vpmovuswb_m64_xmm(dst, src)) }
+emit_vpmovuswb_xmm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: YMM) { append_elem(instructions, inst_vpmovuswb_xmm_ymm(dst, src)) }
+emit_vpmovuswb_m128_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128, src: YMM) { append_elem(instructions, inst_vpmovuswb_m128_ymm(dst, src)) }
+emit_vpmovuswb_ymm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: ZMM) { append_elem(instructions, inst_vpmovuswb_ymm_zmm(dst, src)) }
+emit_vpmovuswb_m256_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem256, src: ZMM) { append_elem(instructions, inst_vpmovuswb_m256_zmm(dst, src)) }
 inst_vprold_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1913) }
 inst_vprold_xmm_m128_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1913) }
 inst_vprold_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1914) }
 inst_vprold_ymm_m256_imm8           :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLD, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1914) }
 inst_vprold_zmm_zmm_imm8            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 1915) }
 inst_vprold_zmm_m512_imm8           :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLD, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 1915) }
-emit_vprold_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vprold_xmm_xmm_imm8(dst, src, imm)) }
-emit_vprold_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vprold_xmm_m128_imm8(dst, src, imm)) }
-emit_vprold_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vprold_ymm_ymm_imm8(dst, src, imm)) }
-emit_vprold_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vprold_ymm_m256_imm8(dst, src, imm)) }
-emit_vprold_zmm_zmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vprold_zmm_zmm_imm8(dst, src, imm)) }
-emit_vprold_zmm_m512_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vprold_zmm_m512_imm8(dst, src, imm)) }
+emit_vprold_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vprold_xmm_xmm_imm8(dst, src, imm)) }
+emit_vprold_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vprold_xmm_m128_imm8(dst, src, imm)) }
+emit_vprold_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vprold_ymm_ymm_imm8(dst, src, imm)) }
+emit_vprold_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vprold_ymm_m256_imm8(dst, src, imm)) }
+emit_vprold_zmm_zmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vprold_zmm_zmm_imm8(dst, src, imm)) }
+emit_vprold_zmm_m512_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vprold_zmm_m512_imm8(dst, src, imm)) }
 inst_vprolq_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1916) }
 inst_vprolq_xmm_m128_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLQ, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1916) }
 inst_vprolq_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1917) }
 inst_vprolq_ymm_m256_imm8           :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLQ, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1917) }
 inst_vprolq_zmm_zmm_imm8            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 1918) }
 inst_vprolq_zmm_m512_imm8           :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLQ, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 1918) }
-emit_vprolq_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vprolq_xmm_xmm_imm8(dst, src, imm)) }
-emit_vprolq_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vprolq_xmm_m128_imm8(dst, src, imm)) }
-emit_vprolq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vprolq_ymm_ymm_imm8(dst, src, imm)) }
-emit_vprolq_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vprolq_ymm_m256_imm8(dst, src, imm)) }
-emit_vprolq_zmm_zmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vprolq_zmm_zmm_imm8(dst, src, imm)) }
-emit_vprolq_zmm_m512_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vprolq_zmm_m512_imm8(dst, src, imm)) }
+emit_vprolq_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vprolq_xmm_xmm_imm8(dst, src, imm)) }
+emit_vprolq_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vprolq_xmm_m128_imm8(dst, src, imm)) }
+emit_vprolq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vprolq_ymm_ymm_imm8(dst, src, imm)) }
+emit_vprolq_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vprolq_ymm_m256_imm8(dst, src, imm)) }
+emit_vprolq_zmm_zmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vprolq_zmm_zmm_imm8(dst, src, imm)) }
+emit_vprolq_zmm_m512_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vprolq_zmm_m512_imm8(dst, src, imm)) }
 inst_vprolvd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1919) }
 inst_vprolvd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1919) }
 inst_vprolvd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1920) }
 inst_vprolvd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1920) }
 inst_vprolvd_zmm_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1921) }
 inst_vprolvd_zmm_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1921) }
-emit_vprolvd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vprolvd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vprolvd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vprolvd_xmm_xmm_m128(dst, src, src2)) }
-emit_vprolvd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vprolvd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vprolvd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vprolvd_ymm_ymm_m256(dst, src, src2)) }
-emit_vprolvd_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vprolvd_zmm_zmm_zmm(dst, src, src2)) }
-emit_vprolvd_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vprolvd_zmm_zmm_m512(dst, src, src2)) }
+emit_vprolvd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vprolvd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vprolvd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vprolvd_xmm_xmm_m128(dst, src, src2)) }
+emit_vprolvd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vprolvd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vprolvd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vprolvd_ymm_ymm_m256(dst, src, src2)) }
+emit_vprolvd_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vprolvd_zmm_zmm_zmm(dst, src, src2)) }
+emit_vprolvd_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vprolvd_zmm_zmm_m512(dst, src, src2)) }
 inst_vprolvq_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1922) }
 inst_vprolvq_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1922) }
 inst_vprolvq_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1923) }
 inst_vprolvq_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1923) }
 inst_vprolvq_zmm_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1924) }
 inst_vprolvq_zmm_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPROLVQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1924) }
-emit_vprolvq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vprolvq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vprolvq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vprolvq_xmm_xmm_m128(dst, src, src2)) }
-emit_vprolvq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vprolvq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vprolvq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vprolvq_ymm_ymm_m256(dst, src, src2)) }
-emit_vprolvq_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vprolvq_zmm_zmm_zmm(dst, src, src2)) }
-emit_vprolvq_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vprolvq_zmm_zmm_m512(dst, src, src2)) }
+emit_vprolvq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vprolvq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vprolvq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vprolvq_xmm_xmm_m128(dst, src, src2)) }
+emit_vprolvq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vprolvq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vprolvq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vprolvq_ymm_ymm_m256(dst, src, src2)) }
+emit_vprolvq_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vprolvq_zmm_zmm_zmm(dst, src, src2)) }
+emit_vprolvq_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vprolvq_zmm_zmm_m512(dst, src, src2)) }
 inst_vprord_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1925) }
 inst_vprord_xmm_m128_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1925) }
 inst_vprord_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1926) }
 inst_vprord_ymm_m256_imm8           :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORD, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1926) }
 inst_vprord_zmm_zmm_imm8            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 1927) }
 inst_vprord_zmm_m512_imm8           :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORD, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 1927) }
-emit_vprord_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vprord_xmm_xmm_imm8(dst, src, imm)) }
-emit_vprord_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vprord_xmm_m128_imm8(dst, src, imm)) }
-emit_vprord_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vprord_ymm_ymm_imm8(dst, src, imm)) }
-emit_vprord_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vprord_ymm_m256_imm8(dst, src, imm)) }
-emit_vprord_zmm_zmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vprord_zmm_zmm_imm8(dst, src, imm)) }
-emit_vprord_zmm_m512_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vprord_zmm_m512_imm8(dst, src, imm)) }
+emit_vprord_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vprord_xmm_xmm_imm8(dst, src, imm)) }
+emit_vprord_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vprord_xmm_m128_imm8(dst, src, imm)) }
+emit_vprord_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vprord_ymm_ymm_imm8(dst, src, imm)) }
+emit_vprord_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vprord_ymm_m256_imm8(dst, src, imm)) }
+emit_vprord_zmm_zmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vprord_zmm_zmm_imm8(dst, src, imm)) }
+emit_vprord_zmm_m512_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vprord_zmm_m512_imm8(dst, src, imm)) }
 inst_vprorq_xmm_xmm_imm8            :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1928) }
 inst_vprorq_xmm_m128_imm8           :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORQ, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1928) }
 inst_vprorq_ymm_ymm_imm8            :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1929) }
 inst_vprorq_ymm_m256_imm8           :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORQ, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1929) }
 inst_vprorq_zmm_zmm_imm8            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 1930) }
 inst_vprorq_zmm_m512_imm8           :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORQ, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 1930) }
-emit_vprorq_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vprorq_xmm_xmm_imm8(dst, src, imm)) }
-emit_vprorq_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vprorq_xmm_m128_imm8(dst, src, imm)) }
-emit_vprorq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vprorq_ymm_ymm_imm8(dst, src, imm)) }
-emit_vprorq_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vprorq_ymm_m256_imm8(dst, src, imm)) }
-emit_vprorq_zmm_zmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vprorq_zmm_zmm_imm8(dst, src, imm)) }
-emit_vprorq_zmm_m512_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vprorq_zmm_m512_imm8(dst, src, imm)) }
+emit_vprorq_xmm_xmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vprorq_xmm_xmm_imm8(dst, src, imm)) }
+emit_vprorq_xmm_m128_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vprorq_xmm_m128_imm8(dst, src, imm)) }
+emit_vprorq_ymm_ymm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vprorq_ymm_ymm_imm8(dst, src, imm)) }
+emit_vprorq_ymm_m256_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vprorq_ymm_m256_imm8(dst, src, imm)) }
+emit_vprorq_zmm_zmm_imm8            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vprorq_zmm_zmm_imm8(dst, src, imm)) }
+emit_vprorq_zmm_m512_imm8           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vprorq_zmm_m512_imm8(dst, src, imm)) }
 inst_vprorvd_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1931) }
 inst_vprorvd_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1931) }
 inst_vprorvd_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1932) }
 inst_vprorvd_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1932) }
 inst_vprorvd_zmm_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1933) }
 inst_vprorvd_zmm_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1933) }
-emit_vprorvd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vprorvd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vprorvd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vprorvd_xmm_xmm_m128(dst, src, src2)) }
-emit_vprorvd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vprorvd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vprorvd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vprorvd_ymm_ymm_m256(dst, src, src2)) }
-emit_vprorvd_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vprorvd_zmm_zmm_zmm(dst, src, src2)) }
-emit_vprorvd_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vprorvd_zmm_zmm_m512(dst, src, src2)) }
+emit_vprorvd_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vprorvd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vprorvd_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vprorvd_xmm_xmm_m128(dst, src, src2)) }
+emit_vprorvd_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vprorvd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vprorvd_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vprorvd_ymm_ymm_m256(dst, src, src2)) }
+emit_vprorvd_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vprorvd_zmm_zmm_zmm(dst, src, src2)) }
+emit_vprorvd_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vprorvd_zmm_zmm_m512(dst, src, src2)) }
 inst_vprorvq_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1934) }
 inst_vprorvq_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1934) }
 inst_vprorvq_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1935) }
 inst_vprorvq_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1935) }
 inst_vprorvq_zmm_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1936) }
 inst_vprorvq_zmm_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPRORVQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1936) }
-emit_vprorvq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vprorvq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vprorvq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vprorvq_xmm_xmm_m128(dst, src, src2)) }
-emit_vprorvq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vprorvq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vprorvq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vprorvq_ymm_ymm_m256(dst, src, src2)) }
-emit_vprorvq_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vprorvq_zmm_zmm_zmm(dst, src, src2)) }
-emit_vprorvq_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vprorvq_zmm_zmm_m512(dst, src, src2)) }
+emit_vprorvq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vprorvq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vprorvq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vprorvq_xmm_xmm_m128(dst, src, src2)) }
+emit_vprorvq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vprorvq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vprorvq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vprorvq_ymm_ymm_m256(dst, src, src2)) }
+emit_vprorvq_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vprorvq_zmm_zmm_zmm(dst, src, src2)) }
+emit_vprorvq_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vprorvq_zmm_zmm_m512(dst, src, src2)) }
 inst_vpscatterdd_m_xmm              :: #force_inline proc "contextless" (dst: Memory, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERDD, operand_count = 2, ops = {op_mem(dst, 0), op_xmm(src), {}, {}} }, 1937) }
 inst_vpscatterdd_m_ymm              :: #force_inline proc "contextless" (dst: Memory, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERDD, operand_count = 2, ops = {op_mem(dst, 0), op_ymm(src), {}, {}} }, 1938) }
 inst_vpscatterdd_m_zmm              :: #force_inline proc "contextless" (dst: Memory, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERDD, operand_count = 2, ops = {op_mem(dst, 0), op_zmm(src), {}, {}} }, 1939) }
-emit_vpscatterdd_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append(instructions, inst_vpscatterdd_m_xmm(dst, src)) }
-emit_vpscatterdd_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append(instructions, inst_vpscatterdd_m_ymm(dst, src)) }
-emit_vpscatterdd_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append(instructions, inst_vpscatterdd_m_zmm(dst, src)) }
+emit_vpscatterdd_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append_elem(instructions, inst_vpscatterdd_m_xmm(dst, src)) }
+emit_vpscatterdd_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append_elem(instructions, inst_vpscatterdd_m_ymm(dst, src)) }
+emit_vpscatterdd_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append_elem(instructions, inst_vpscatterdd_m_zmm(dst, src)) }
 inst_vpscatterdq_m_xmm              :: #force_inline proc "contextless" (dst: Memory, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERDQ, operand_count = 2, ops = {op_mem(dst, 0), op_xmm(src), {}, {}} }, 1940) }
 inst_vpscatterdq_m_ymm              :: #force_inline proc "contextless" (dst: Memory, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERDQ, operand_count = 2, ops = {op_mem(dst, 0), op_ymm(src), {}, {}} }, 1941) }
 inst_vpscatterdq_m_zmm              :: #force_inline proc "contextless" (dst: Memory, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERDQ, operand_count = 2, ops = {op_mem(dst, 0), op_zmm(src), {}, {}} }, 1942) }
-emit_vpscatterdq_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append(instructions, inst_vpscatterdq_m_xmm(dst, src)) }
-emit_vpscatterdq_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append(instructions, inst_vpscatterdq_m_ymm(dst, src)) }
-emit_vpscatterdq_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append(instructions, inst_vpscatterdq_m_zmm(dst, src)) }
+emit_vpscatterdq_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append_elem(instructions, inst_vpscatterdq_m_xmm(dst, src)) }
+emit_vpscatterdq_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append_elem(instructions, inst_vpscatterdq_m_ymm(dst, src)) }
+emit_vpscatterdq_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append_elem(instructions, inst_vpscatterdq_m_zmm(dst, src)) }
 inst_vpscatterqd_m_xmm              :: #force_inline proc "contextless" (dst: Memory, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERQD, operand_count = 2, ops = {op_mem(dst, 0), op_xmm(src), {}, {}} }, 1943) }
 inst_vpscatterqd_m_ymm              :: #force_inline proc "contextless" (dst: Memory, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERQD, operand_count = 2, ops = {op_mem(dst, 0), op_ymm(src), {}, {}} }, 1945) }
-emit_vpscatterqd_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append(instructions, inst_vpscatterqd_m_xmm(dst, src)) }
-emit_vpscatterqd_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append(instructions, inst_vpscatterqd_m_ymm(dst, src)) }
+emit_vpscatterqd_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append_elem(instructions, inst_vpscatterqd_m_xmm(dst, src)) }
+emit_vpscatterqd_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append_elem(instructions, inst_vpscatterqd_m_ymm(dst, src)) }
 inst_vpscatterqq_m_xmm              :: #force_inline proc "contextless" (dst: Memory, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERQQ, operand_count = 2, ops = {op_mem(dst, 0), op_xmm(src), {}, {}} }, 1946) }
 inst_vpscatterqq_m_ymm              :: #force_inline proc "contextless" (dst: Memory, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERQQ, operand_count = 2, ops = {op_mem(dst, 0), op_ymm(src), {}, {}} }, 1947) }
 inst_vpscatterqq_m_zmm              :: #force_inline proc "contextless" (dst: Memory, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSCATTERQQ, operand_count = 2, ops = {op_mem(dst, 0), op_zmm(src), {}, {}} }, 1948) }
-emit_vpscatterqq_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append(instructions, inst_vpscatterqq_m_xmm(dst, src)) }
-emit_vpscatterqq_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append(instructions, inst_vpscatterqq_m_ymm(dst, src)) }
-emit_vpscatterqq_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append(instructions, inst_vpscatterqq_m_zmm(dst, src)) }
+emit_vpscatterqq_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append_elem(instructions, inst_vpscatterqq_m_xmm(dst, src)) }
+emit_vpscatterqq_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append_elem(instructions, inst_vpscatterqq_m_ymm(dst, src)) }
+emit_vpscatterqq_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append_elem(instructions, inst_vpscatterqq_m_zmm(dst, src)) }
 inst_vscatterdps_m_xmm              :: #force_inline proc "contextless" (dst: Memory, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERDPS, operand_count = 2, ops = {op_mem(dst, 0), op_xmm(src), {}, {}} }, 1949) }
 inst_vscatterdps_m_ymm              :: #force_inline proc "contextless" (dst: Memory, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERDPS, operand_count = 2, ops = {op_mem(dst, 0), op_ymm(src), {}, {}} }, 1950) }
 inst_vscatterdps_m_zmm              :: #force_inline proc "contextless" (dst: Memory, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERDPS, operand_count = 2, ops = {op_mem(dst, 0), op_zmm(src), {}, {}} }, 1951) }
-emit_vscatterdps_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append(instructions, inst_vscatterdps_m_xmm(dst, src)) }
-emit_vscatterdps_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append(instructions, inst_vscatterdps_m_ymm(dst, src)) }
-emit_vscatterdps_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append(instructions, inst_vscatterdps_m_zmm(dst, src)) }
+emit_vscatterdps_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append_elem(instructions, inst_vscatterdps_m_xmm(dst, src)) }
+emit_vscatterdps_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append_elem(instructions, inst_vscatterdps_m_ymm(dst, src)) }
+emit_vscatterdps_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append_elem(instructions, inst_vscatterdps_m_zmm(dst, src)) }
 inst_vscatterdpd_m_xmm              :: #force_inline proc "contextless" (dst: Memory, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERDPD, operand_count = 2, ops = {op_mem(dst, 0), op_xmm(src), {}, {}} }, 1952) }
 inst_vscatterdpd_m_ymm              :: #force_inline proc "contextless" (dst: Memory, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERDPD, operand_count = 2, ops = {op_mem(dst, 0), op_ymm(src), {}, {}} }, 1953) }
 inst_vscatterdpd_m_zmm              :: #force_inline proc "contextless" (dst: Memory, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERDPD, operand_count = 2, ops = {op_mem(dst, 0), op_zmm(src), {}, {}} }, 1954) }
-emit_vscatterdpd_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append(instructions, inst_vscatterdpd_m_xmm(dst, src)) }
-emit_vscatterdpd_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append(instructions, inst_vscatterdpd_m_ymm(dst, src)) }
-emit_vscatterdpd_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append(instructions, inst_vscatterdpd_m_zmm(dst, src)) }
+emit_vscatterdpd_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append_elem(instructions, inst_vscatterdpd_m_xmm(dst, src)) }
+emit_vscatterdpd_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append_elem(instructions, inst_vscatterdpd_m_ymm(dst, src)) }
+emit_vscatterdpd_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append_elem(instructions, inst_vscatterdpd_m_zmm(dst, src)) }
 inst_vscatterqps_m_xmm              :: #force_inline proc "contextless" (dst: Memory, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERQPS, operand_count = 2, ops = {op_mem(dst, 0), op_xmm(src), {}, {}} }, 1955) }
 inst_vscatterqps_m_ymm              :: #force_inline proc "contextless" (dst: Memory, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERQPS, operand_count = 2, ops = {op_mem(dst, 0), op_ymm(src), {}, {}} }, 1957) }
-emit_vscatterqps_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append(instructions, inst_vscatterqps_m_xmm(dst, src)) }
-emit_vscatterqps_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append(instructions, inst_vscatterqps_m_ymm(dst, src)) }
+emit_vscatterqps_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append_elem(instructions, inst_vscatterqps_m_xmm(dst, src)) }
+emit_vscatterqps_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append_elem(instructions, inst_vscatterqps_m_ymm(dst, src)) }
 inst_vscatterqpd_m_xmm              :: #force_inline proc "contextless" (dst: Memory, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERQPD, operand_count = 2, ops = {op_mem(dst, 0), op_xmm(src), {}, {}} }, 1958) }
 inst_vscatterqpd_m_ymm              :: #force_inline proc "contextless" (dst: Memory, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERQPD, operand_count = 2, ops = {op_mem(dst, 0), op_ymm(src), {}, {}} }, 1959) }
 inst_vscatterqpd_m_zmm              :: #force_inline proc "contextless" (dst: Memory, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCATTERQPD, operand_count = 2, ops = {op_mem(dst, 0), op_zmm(src), {}, {}} }, 1960) }
-emit_vscatterqpd_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append(instructions, inst_vscatterqpd_m_xmm(dst, src)) }
-emit_vscatterqpd_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append(instructions, inst_vscatterqpd_m_ymm(dst, src)) }
-emit_vscatterqpd_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append(instructions, inst_vscatterqpd_m_zmm(dst, src)) }
+emit_vscatterqpd_m_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: XMM) { append_elem(instructions, inst_vscatterqpd_m_xmm(dst, src)) }
+emit_vscatterqpd_m_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: YMM) { append_elem(instructions, inst_vscatterqpd_m_ymm(dst, src)) }
+emit_vscatterqpd_m_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory, src: ZMM) { append_elem(instructions, inst_vscatterqpd_m_zmm(dst, src)) }
 inst_vpsravq_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1961) }
 inst_vpsravq_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVQ, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1961) }
 inst_vpsravq_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1962) }
 inst_vpsravq_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVQ, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1962) }
 inst_vpsravq_zmm_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1963) }
 inst_vpsravq_zmm_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVQ, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1963) }
-emit_vpsravq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsravq_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsravq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsravq_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsravq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsravq_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsravq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsravq_ymm_ymm_m256(dst, src, src2)) }
-emit_vpsravq_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpsravq_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpsravq_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpsravq_zmm_zmm_m512(dst, src, src2)) }
+emit_vpsravq_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsravq_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsravq_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsravq_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsravq_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsravq_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsravq_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsravq_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsravq_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpsravq_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpsravq_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpsravq_zmm_zmm_m512(dst, src, src2)) }
 inst_vpsravw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1964) }
 inst_vpsravw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1964) }
 inst_vpsravw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1965) }
 inst_vpsravw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1965) }
 inst_vpsravw_zmm_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1966) }
 inst_vpsravw_zmm_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRAVW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1966) }
-emit_vpsravw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsravw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsravw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsravw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsravw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsravw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsravw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsravw_ymm_ymm_m256(dst, src, src2)) }
-emit_vpsravw_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpsravw_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpsravw_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpsravw_zmm_zmm_m512(dst, src, src2)) }
+emit_vpsravw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsravw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsravw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsravw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsravw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsravw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsravw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsravw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsravw_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpsravw_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpsravw_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpsravw_zmm_zmm_m512(dst, src, src2)) }
 inst_vpsllvw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1967) }
 inst_vpsllvw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1967) }
 inst_vpsllvw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1968) }
 inst_vpsllvw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1968) }
 inst_vpsllvw_zmm_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1969) }
 inst_vpsllvw_zmm_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSLLVW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1969) }
-emit_vpsllvw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsllvw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsllvw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsllvw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsllvw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsllvw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsllvw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsllvw_ymm_ymm_m256(dst, src, src2)) }
-emit_vpsllvw_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpsllvw_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpsllvw_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpsllvw_zmm_zmm_m512(dst, src, src2)) }
+emit_vpsllvw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsllvw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsllvw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsllvw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsllvw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsllvw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsllvw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsllvw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsllvw_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpsllvw_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpsllvw_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpsllvw_zmm_zmm_m512(dst, src, src2)) }
 inst_vpsrlvw_xmm_xmm_xmm            :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 1970) }
 inst_vpsrlvw_xmm_xmm_m128           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVW, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 1970) }
 inst_vpsrlvw_ymm_ymm_ymm            :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 1971) }
 inst_vpsrlvw_ymm_ymm_m256           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVW, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 1971) }
 inst_vpsrlvw_zmm_zmm_zmm            :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 1972) }
 inst_vpsrlvw_zmm_zmm_m512           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPSRLVW, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 1972) }
-emit_vpsrlvw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpsrlvw_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpsrlvw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpsrlvw_xmm_xmm_m128(dst, src, src2)) }
-emit_vpsrlvw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpsrlvw_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpsrlvw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpsrlvw_ymm_ymm_m256(dst, src, src2)) }
-emit_vpsrlvw_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpsrlvw_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpsrlvw_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpsrlvw_zmm_zmm_m512(dst, src, src2)) }
+emit_vpsrlvw_xmm_xmm_xmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpsrlvw_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpsrlvw_xmm_xmm_m128           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpsrlvw_xmm_xmm_m128(dst, src, src2)) }
+emit_vpsrlvw_ymm_ymm_ymm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpsrlvw_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpsrlvw_ymm_ymm_m256           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpsrlvw_ymm_ymm_m256(dst, src, src2)) }
+emit_vpsrlvw_zmm_zmm_zmm            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpsrlvw_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpsrlvw_zmm_zmm_m512           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpsrlvw_zmm_zmm_m512(dst, src, src2)) }
 inst_vrangeps_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1973) }
 inst_vrangeps_xmm_xmm_m128_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1973) }
 inst_vrangeps_ymm_ymm_ymm_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1974) }
 inst_vrangeps_ymm_ymm_m256_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1974) }
 inst_vrangeps_zmm_zmm_zmm_imm8      :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPS, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1975) }
 inst_vrangeps_zmm_zmm_m512_imm8     :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPS, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1975) }
-emit_vrangeps_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vrangeps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vrangeps_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vrangeps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vrangeps_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vrangeps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vrangeps_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vrangeps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vrangeps_zmm_zmm_zmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vrangeps_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vrangeps_zmm_zmm_m512_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vrangeps_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vrangeps_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vrangeps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vrangeps_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vrangeps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vrangeps_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vrangeps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vrangeps_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vrangeps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vrangeps_zmm_zmm_zmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vrangeps_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vrangeps_zmm_zmm_m512_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vrangeps_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vrangepd_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1976) }
 inst_vrangepd_xmm_xmm_m128_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 1976) }
 inst_vrangepd_ymm_ymm_ymm_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 1977) }
 inst_vrangepd_ymm_ymm_m256_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 1977) }
 inst_vrangepd_zmm_zmm_zmm_imm8      :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPD, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 1978) }
 inst_vrangepd_zmm_zmm_m512_imm8     :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGEPD, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 1978) }
-emit_vrangepd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vrangepd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vrangepd_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vrangepd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vrangepd_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vrangepd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vrangepd_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vrangepd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vrangepd_zmm_zmm_zmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vrangepd_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vrangepd_zmm_zmm_m512_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vrangepd_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vrangepd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vrangepd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vrangepd_xmm_xmm_m128_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vrangepd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vrangepd_ymm_ymm_ymm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vrangepd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vrangepd_ymm_ymm_m256_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vrangepd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vrangepd_zmm_zmm_zmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vrangepd_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vrangepd_zmm_zmm_m512_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vrangepd_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vrangess_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGESS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1979) }
 inst_vrangess_xmm_xmm_m32_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGESS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 1979) }
-emit_vrangess_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vrangess_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vrangess_xmm_xmm_m32_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vrangess_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vrangess_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vrangess_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vrangess_xmm_xmm_m32_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vrangess_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vrangesd_xmm_xmm_xmm_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGESD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1980) }
 inst_vrangesd_xmm_xmm_m64_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRANGESD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), op_imm8(imm)} }, 1980) }
-emit_vrangesd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vrangesd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vrangesd_xmm_xmm_m64_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append(instructions, inst_vrangesd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
+emit_vrangesd_xmm_xmm_xmm_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vrangesd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vrangesd_xmm_xmm_m64_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append_elem(instructions, inst_vrangesd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
 inst_vreduceps_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1981) }
 inst_vreduceps_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1981) }
 inst_vreduceps_ymm_ymm_imm8         :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1982) }
 inst_vreduceps_ymm_m256_imm8        :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPS, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1982) }
 inst_vreduceps_zmm_zmm_imm8         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 1983) }
 inst_vreduceps_zmm_m512_imm8        :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPS, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 1983) }
-emit_vreduceps_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vreduceps_xmm_xmm_imm8(dst, src, imm)) }
-emit_vreduceps_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vreduceps_xmm_m128_imm8(dst, src, imm)) }
-emit_vreduceps_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vreduceps_ymm_ymm_imm8(dst, src, imm)) }
-emit_vreduceps_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vreduceps_ymm_m256_imm8(dst, src, imm)) }
-emit_vreduceps_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vreduceps_zmm_zmm_imm8(dst, src, imm)) }
-emit_vreduceps_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vreduceps_zmm_m512_imm8(dst, src, imm)) }
+emit_vreduceps_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vreduceps_xmm_xmm_imm8(dst, src, imm)) }
+emit_vreduceps_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vreduceps_xmm_m128_imm8(dst, src, imm)) }
+emit_vreduceps_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vreduceps_ymm_ymm_imm8(dst, src, imm)) }
+emit_vreduceps_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vreduceps_ymm_m256_imm8(dst, src, imm)) }
+emit_vreduceps_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vreduceps_zmm_zmm_imm8(dst, src, imm)) }
+emit_vreduceps_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vreduceps_zmm_m512_imm8(dst, src, imm)) }
 inst_vreducepd_xmm_xmm_imm8         :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1984) }
 inst_vreducepd_xmm_m128_imm8        :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1984) }
 inst_vreducepd_ymm_ymm_imm8         :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1985) }
 inst_vreducepd_ymm_m256_imm8        :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPD, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1985) }
 inst_vreducepd_zmm_zmm_imm8         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 1986) }
 inst_vreducepd_zmm_m512_imm8        :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCEPD, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 1986) }
-emit_vreducepd_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vreducepd_xmm_xmm_imm8(dst, src, imm)) }
-emit_vreducepd_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vreducepd_xmm_m128_imm8(dst, src, imm)) }
-emit_vreducepd_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vreducepd_ymm_ymm_imm8(dst, src, imm)) }
-emit_vreducepd_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vreducepd_ymm_m256_imm8(dst, src, imm)) }
-emit_vreducepd_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vreducepd_zmm_zmm_imm8(dst, src, imm)) }
-emit_vreducepd_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vreducepd_zmm_m512_imm8(dst, src, imm)) }
+emit_vreducepd_xmm_xmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vreducepd_xmm_xmm_imm8(dst, src, imm)) }
+emit_vreducepd_xmm_m128_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vreducepd_xmm_m128_imm8(dst, src, imm)) }
+emit_vreducepd_ymm_ymm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vreducepd_ymm_ymm_imm8(dst, src, imm)) }
+emit_vreducepd_ymm_m256_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vreducepd_ymm_m256_imm8(dst, src, imm)) }
+emit_vreducepd_zmm_zmm_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vreducepd_zmm_zmm_imm8(dst, src, imm)) }
+emit_vreducepd_zmm_m512_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vreducepd_zmm_m512_imm8(dst, src, imm)) }
 inst_vreducess_xmm_xmm_xmm_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCESS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1987) }
 inst_vreducess_xmm_xmm_m32_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCESS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 1987) }
-emit_vreducess_xmm_xmm_xmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vreducess_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vreducess_xmm_xmm_m32_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vreducess_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vreducess_xmm_xmm_xmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vreducess_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vreducess_xmm_xmm_m32_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vreducess_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vreducesd_xmm_xmm_xmm_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCESD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1988) }
 inst_vreducesd_xmm_xmm_m64_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VREDUCESD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), op_imm8(imm)} }, 1988) }
-emit_vreducesd_xmm_xmm_xmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vreducesd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vreducesd_xmm_xmm_m64_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append(instructions, inst_vreducesd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
+emit_vreducesd_xmm_xmm_xmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vreducesd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vreducesd_xmm_xmm_m64_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append_elem(instructions, inst_vreducesd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
 inst_vrndscaleps_xmm_xmm_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1989) }
 inst_vrndscaleps_xmm_m128_imm8      :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1989) }
 inst_vrndscaleps_ymm_ymm_imm8       :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1990) }
 inst_vrndscaleps_ymm_m256_imm8      :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPS, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1990) }
 inst_vrndscaleps_zmm_zmm_imm8       :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 1991) }
 inst_vrndscaleps_zmm_m512_imm8      :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPS, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 1991) }
-emit_vrndscaleps_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vrndscaleps_xmm_xmm_imm8(dst, src, imm)) }
-emit_vrndscaleps_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vrndscaleps_xmm_m128_imm8(dst, src, imm)) }
-emit_vrndscaleps_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vrndscaleps_ymm_ymm_imm8(dst, src, imm)) }
-emit_vrndscaleps_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vrndscaleps_ymm_m256_imm8(dst, src, imm)) }
-emit_vrndscaleps_zmm_zmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vrndscaleps_zmm_zmm_imm8(dst, src, imm)) }
-emit_vrndscaleps_zmm_m512_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vrndscaleps_zmm_m512_imm8(dst, src, imm)) }
+emit_vrndscaleps_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vrndscaleps_xmm_xmm_imm8(dst, src, imm)) }
+emit_vrndscaleps_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vrndscaleps_xmm_m128_imm8(dst, src, imm)) }
+emit_vrndscaleps_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vrndscaleps_ymm_ymm_imm8(dst, src, imm)) }
+emit_vrndscaleps_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vrndscaleps_ymm_m256_imm8(dst, src, imm)) }
+emit_vrndscaleps_zmm_zmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vrndscaleps_zmm_zmm_imm8(dst, src, imm)) }
+emit_vrndscaleps_zmm_m512_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vrndscaleps_zmm_m512_imm8(dst, src, imm)) }
 inst_vrndscalepd_xmm_xmm_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 1992) }
 inst_vrndscalepd_xmm_m128_imm8      :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 1992) }
 inst_vrndscalepd_ymm_ymm_imm8       :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 1993) }
 inst_vrndscalepd_ymm_m256_imm8      :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPD, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 1993) }
 inst_vrndscalepd_zmm_zmm_imm8       :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 1994) }
 inst_vrndscalepd_zmm_m512_imm8      :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALEPD, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 1994) }
-emit_vrndscalepd_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vrndscalepd_xmm_xmm_imm8(dst, src, imm)) }
-emit_vrndscalepd_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vrndscalepd_xmm_m128_imm8(dst, src, imm)) }
-emit_vrndscalepd_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vrndscalepd_ymm_ymm_imm8(dst, src, imm)) }
-emit_vrndscalepd_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vrndscalepd_ymm_m256_imm8(dst, src, imm)) }
-emit_vrndscalepd_zmm_zmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vrndscalepd_zmm_zmm_imm8(dst, src, imm)) }
-emit_vrndscalepd_zmm_m512_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vrndscalepd_zmm_m512_imm8(dst, src, imm)) }
+emit_vrndscalepd_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vrndscalepd_xmm_xmm_imm8(dst, src, imm)) }
+emit_vrndscalepd_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vrndscalepd_xmm_m128_imm8(dst, src, imm)) }
+emit_vrndscalepd_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vrndscalepd_ymm_ymm_imm8(dst, src, imm)) }
+emit_vrndscalepd_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vrndscalepd_ymm_m256_imm8(dst, src, imm)) }
+emit_vrndscalepd_zmm_zmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vrndscalepd_zmm_zmm_imm8(dst, src, imm)) }
+emit_vrndscalepd_zmm_m512_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vrndscalepd_zmm_m512_imm8(dst, src, imm)) }
 inst_vrndscaless_xmm_xmm_xmm_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALESS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1995) }
 inst_vrndscaless_xmm_xmm_m32_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALESS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 1995) }
-emit_vrndscaless_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vrndscaless_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vrndscaless_xmm_xmm_m32_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vrndscaless_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vrndscaless_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vrndscaless_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vrndscaless_xmm_xmm_m32_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vrndscaless_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vrndscalesd_xmm_xmm_xmm_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALESD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 1996) }
 inst_vrndscalesd_xmm_xmm_m64_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VRNDSCALESD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), op_imm8(imm)} }, 1996) }
-emit_vrndscalesd_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vrndscalesd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vrndscalesd_xmm_xmm_m64_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append(instructions, inst_vrndscalesd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
+emit_vrndscalesd_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vrndscalesd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vrndscalesd_xmm_xmm_m64_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append_elem(instructions, inst_vrndscalesd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
 inst_vrsqrt14ps_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 1997) }
 inst_vrsqrt14ps_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 1997) }
 inst_vrsqrt14ps_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 1998) }
 inst_vrsqrt14ps_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 1998) }
 inst_vrsqrt14ps_zmm_zmm             :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PS, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 1999) }
 inst_vrsqrt14ps_zmm_m512            :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PS, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 1999) }
-emit_vrsqrt14ps_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vrsqrt14ps_xmm_xmm(dst, src)) }
-emit_vrsqrt14ps_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vrsqrt14ps_xmm_m128(dst, src)) }
-emit_vrsqrt14ps_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vrsqrt14ps_ymm_ymm(dst, src)) }
-emit_vrsqrt14ps_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vrsqrt14ps_ymm_m256(dst, src)) }
-emit_vrsqrt14ps_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vrsqrt14ps_zmm_zmm(dst, src)) }
-emit_vrsqrt14ps_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vrsqrt14ps_zmm_m512(dst, src)) }
+emit_vrsqrt14ps_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vrsqrt14ps_xmm_xmm(dst, src)) }
+emit_vrsqrt14ps_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vrsqrt14ps_xmm_m128(dst, src)) }
+emit_vrsqrt14ps_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vrsqrt14ps_ymm_ymm(dst, src)) }
+emit_vrsqrt14ps_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vrsqrt14ps_ymm_m256(dst, src)) }
+emit_vrsqrt14ps_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vrsqrt14ps_zmm_zmm(dst, src)) }
+emit_vrsqrt14ps_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vrsqrt14ps_zmm_m512(dst, src)) }
 inst_vrsqrt14pd_xmm_xmm             :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 2000) }
 inst_vrsqrt14pd_xmm_m128            :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 2000) }
 inst_vrsqrt14pd_ymm_ymm             :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 2001) }
 inst_vrsqrt14pd_ymm_m256            :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 2001) }
 inst_vrsqrt14pd_zmm_zmm             :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 2002) }
 inst_vrsqrt14pd_zmm_m512            :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14PD, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 2002) }
-emit_vrsqrt14pd_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vrsqrt14pd_xmm_xmm(dst, src)) }
-emit_vrsqrt14pd_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vrsqrt14pd_xmm_m128(dst, src)) }
-emit_vrsqrt14pd_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vrsqrt14pd_ymm_ymm(dst, src)) }
-emit_vrsqrt14pd_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vrsqrt14pd_ymm_m256(dst, src)) }
-emit_vrsqrt14pd_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vrsqrt14pd_zmm_zmm(dst, src)) }
-emit_vrsqrt14pd_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vrsqrt14pd_zmm_m512(dst, src)) }
+emit_vrsqrt14pd_xmm_xmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vrsqrt14pd_xmm_xmm(dst, src)) }
+emit_vrsqrt14pd_xmm_m128            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vrsqrt14pd_xmm_m128(dst, src)) }
+emit_vrsqrt14pd_ymm_ymm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vrsqrt14pd_ymm_ymm(dst, src)) }
+emit_vrsqrt14pd_ymm_m256            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vrsqrt14pd_ymm_m256(dst, src)) }
+emit_vrsqrt14pd_zmm_zmm             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vrsqrt14pd_zmm_zmm(dst, src)) }
+emit_vrsqrt14pd_zmm_m512            :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vrsqrt14pd_zmm_m512(dst, src)) }
 inst_vrsqrt14ss_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2003) }
 inst_vrsqrt14ss_xmm_xmm_m32         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 2003) }
-emit_vrsqrt14ss_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vrsqrt14ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vrsqrt14ss_xmm_xmm_m32         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vrsqrt14ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vrsqrt14ss_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vrsqrt14ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vrsqrt14ss_xmm_xmm_m32         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vrsqrt14ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vrsqrt14sd_xmm_xmm_xmm         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2004) }
 inst_vrsqrt14sd_xmm_xmm_m64         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VRSQRT14SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 2004) }
-emit_vrsqrt14sd_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vrsqrt14sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vrsqrt14sd_xmm_xmm_m64         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vrsqrt14sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vrsqrt14sd_xmm_xmm_xmm         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vrsqrt14sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vrsqrt14sd_xmm_xmm_m64         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vrsqrt14sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vrcp14ps_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 2005) }
 inst_vrcp14ps_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 2005) }
 inst_vrcp14ps_ymm_ymm               :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 2006) }
 inst_vrcp14ps_ymm_m256              :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 2006) }
 inst_vrcp14ps_zmm_zmm               :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PS, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 2007) }
 inst_vrcp14ps_zmm_m512              :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PS, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 2007) }
-emit_vrcp14ps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vrcp14ps_xmm_xmm(dst, src)) }
-emit_vrcp14ps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vrcp14ps_xmm_m128(dst, src)) }
-emit_vrcp14ps_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vrcp14ps_ymm_ymm(dst, src)) }
-emit_vrcp14ps_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vrcp14ps_ymm_m256(dst, src)) }
-emit_vrcp14ps_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vrcp14ps_zmm_zmm(dst, src)) }
-emit_vrcp14ps_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vrcp14ps_zmm_m512(dst, src)) }
+emit_vrcp14ps_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vrcp14ps_xmm_xmm(dst, src)) }
+emit_vrcp14ps_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vrcp14ps_xmm_m128(dst, src)) }
+emit_vrcp14ps_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vrcp14ps_ymm_ymm(dst, src)) }
+emit_vrcp14ps_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vrcp14ps_ymm_m256(dst, src)) }
+emit_vrcp14ps_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vrcp14ps_zmm_zmm(dst, src)) }
+emit_vrcp14ps_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vrcp14ps_zmm_m512(dst, src)) }
 inst_vrcp14pd_xmm_xmm               :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 2008) }
 inst_vrcp14pd_xmm_m128              :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 2008) }
 inst_vrcp14pd_ymm_ymm               :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 2009) }
 inst_vrcp14pd_ymm_m256              :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 2009) }
 inst_vrcp14pd_zmm_zmm               :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 2010) }
 inst_vrcp14pd_zmm_m512              :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14PD, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 2010) }
-emit_vrcp14pd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vrcp14pd_xmm_xmm(dst, src)) }
-emit_vrcp14pd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vrcp14pd_xmm_m128(dst, src)) }
-emit_vrcp14pd_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vrcp14pd_ymm_ymm(dst, src)) }
-emit_vrcp14pd_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vrcp14pd_ymm_m256(dst, src)) }
-emit_vrcp14pd_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vrcp14pd_zmm_zmm(dst, src)) }
-emit_vrcp14pd_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vrcp14pd_zmm_m512(dst, src)) }
+emit_vrcp14pd_xmm_xmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vrcp14pd_xmm_xmm(dst, src)) }
+emit_vrcp14pd_xmm_m128              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vrcp14pd_xmm_m128(dst, src)) }
+emit_vrcp14pd_ymm_ymm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vrcp14pd_ymm_ymm(dst, src)) }
+emit_vrcp14pd_ymm_m256              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vrcp14pd_ymm_m256(dst, src)) }
+emit_vrcp14pd_zmm_zmm               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vrcp14pd_zmm_zmm(dst, src)) }
+emit_vrcp14pd_zmm_m512              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vrcp14pd_zmm_m512(dst, src)) }
 inst_vrcp14ss_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2011) }
 inst_vrcp14ss_xmm_xmm_m32           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14SS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 2011) }
-emit_vrcp14ss_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vrcp14ss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vrcp14ss_xmm_xmm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vrcp14ss_xmm_xmm_m32(dst, src, src2)) }
+emit_vrcp14ss_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vrcp14ss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vrcp14ss_xmm_xmm_m32           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vrcp14ss_xmm_xmm_m32(dst, src, src2)) }
 inst_vrcp14sd_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2012) }
 inst_vrcp14sd_xmm_xmm_m64           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VRCP14SD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 2012) }
-emit_vrcp14sd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vrcp14sd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vrcp14sd_xmm_xmm_m64           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vrcp14sd_xmm_xmm_m64(dst, src, src2)) }
+emit_vrcp14sd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vrcp14sd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vrcp14sd_xmm_xmm_m64           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vrcp14sd_xmm_xmm_m64(dst, src, src2)) }
 inst_vscalefps_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2013) }
 inst_vscalefps_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 2013) }
 inst_vscalefps_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 2014) }
 inst_vscalefps_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 2014) }
 inst_vscalefps_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 2015) }
 inst_vscalefps_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 2015) }
-emit_vscalefps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vscalefps_xmm_xmm_xmm(dst, src, src2)) }
-emit_vscalefps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vscalefps_xmm_xmm_m128(dst, src, src2)) }
-emit_vscalefps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vscalefps_ymm_ymm_ymm(dst, src, src2)) }
-emit_vscalefps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vscalefps_ymm_ymm_m256(dst, src, src2)) }
-emit_vscalefps_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vscalefps_zmm_zmm_zmm(dst, src, src2)) }
-emit_vscalefps_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vscalefps_zmm_zmm_m512(dst, src, src2)) }
+emit_vscalefps_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vscalefps_xmm_xmm_xmm(dst, src, src2)) }
+emit_vscalefps_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vscalefps_xmm_xmm_m128(dst, src, src2)) }
+emit_vscalefps_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vscalefps_ymm_ymm_ymm(dst, src, src2)) }
+emit_vscalefps_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vscalefps_ymm_ymm_m256(dst, src, src2)) }
+emit_vscalefps_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vscalefps_zmm_zmm_zmm(dst, src, src2)) }
+emit_vscalefps_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vscalefps_zmm_zmm_m512(dst, src, src2)) }
 inst_vscalefpd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2016) }
 inst_vscalefpd_xmm_xmm_m128         :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 2016) }
 inst_vscalefpd_ymm_ymm_ymm          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 2017) }
 inst_vscalefpd_ymm_ymm_m256         :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 2017) }
 inst_vscalefpd_zmm_zmm_zmm          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 2018) }
 inst_vscalefpd_zmm_zmm_m512         :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFPD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 2018) }
-emit_vscalefpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vscalefpd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vscalefpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vscalefpd_xmm_xmm_m128(dst, src, src2)) }
-emit_vscalefpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vscalefpd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vscalefpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vscalefpd_ymm_ymm_m256(dst, src, src2)) }
-emit_vscalefpd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vscalefpd_zmm_zmm_zmm(dst, src, src2)) }
-emit_vscalefpd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vscalefpd_zmm_zmm_m512(dst, src, src2)) }
+emit_vscalefpd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vscalefpd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vscalefpd_xmm_xmm_m128         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vscalefpd_xmm_xmm_m128(dst, src, src2)) }
+emit_vscalefpd_ymm_ymm_ymm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vscalefpd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vscalefpd_ymm_ymm_m256         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vscalefpd_ymm_ymm_m256(dst, src, src2)) }
+emit_vscalefpd_zmm_zmm_zmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vscalefpd_zmm_zmm_zmm(dst, src, src2)) }
+emit_vscalefpd_zmm_zmm_m512         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vscalefpd_zmm_zmm_m512(dst, src, src2)) }
 inst_vscalefss_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2019) }
 inst_vscalefss_xmm_xmm_m32          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 2019) }
-emit_vscalefss_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vscalefss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vscalefss_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vscalefss_xmm_xmm_m32(dst, src, src2)) }
+emit_vscalefss_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vscalefss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vscalefss_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vscalefss_xmm_xmm_m32(dst, src, src2)) }
 inst_vscalefsd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2020) }
 inst_vscalefsd_xmm_xmm_m64          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VSCALEFSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 2020) }
-emit_vscalefsd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vscalefsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vscalefsd_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vscalefsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vscalefsd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vscalefsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vscalefsd_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vscalefsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vgetexpps_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPS, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 2021) }
 inst_vgetexpps_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPS, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 2021) }
 inst_vgetexpps_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPS, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 2022) }
 inst_vgetexpps_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPS, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 2022) }
 inst_vgetexpps_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPS, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 2023) }
 inst_vgetexpps_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPS, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 2023) }
-emit_vgetexpps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vgetexpps_xmm_xmm(dst, src)) }
-emit_vgetexpps_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vgetexpps_xmm_m128(dst, src)) }
-emit_vgetexpps_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vgetexpps_ymm_ymm(dst, src)) }
-emit_vgetexpps_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vgetexpps_ymm_m256(dst, src)) }
-emit_vgetexpps_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vgetexpps_zmm_zmm(dst, src)) }
-emit_vgetexpps_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vgetexpps_zmm_m512(dst, src)) }
+emit_vgetexpps_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vgetexpps_xmm_xmm(dst, src)) }
+emit_vgetexpps_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vgetexpps_xmm_m128(dst, src)) }
+emit_vgetexpps_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vgetexpps_ymm_ymm(dst, src)) }
+emit_vgetexpps_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vgetexpps_ymm_m256(dst, src)) }
+emit_vgetexpps_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vgetexpps_zmm_zmm(dst, src)) }
+emit_vgetexpps_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vgetexpps_zmm_m512(dst, src)) }
 inst_vgetexppd_xmm_xmm              :: #force_inline proc "contextless" (dst: XMM, src: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPD, operand_count = 2, ops = {op_xmm(dst), op_xmm(src), {}, {}} }, 2024) }
 inst_vgetexppd_xmm_m128             :: #force_inline proc "contextless" (dst: XMM, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPD, operand_count = 2, ops = {op_xmm(dst), op_mem(src.mem, 16), {}, {}} }, 2024) }
 inst_vgetexppd_ymm_ymm              :: #force_inline proc "contextless" (dst: YMM, src: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPD, operand_count = 2, ops = {op_ymm(dst), op_ymm(src), {}, {}} }, 2025) }
 inst_vgetexppd_ymm_m256             :: #force_inline proc "contextless" (dst: YMM, src: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPD, operand_count = 2, ops = {op_ymm(dst), op_mem(src.mem, 32), {}, {}} }, 2025) }
 inst_vgetexppd_zmm_zmm              :: #force_inline proc "contextless" (dst: ZMM, src: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPD, operand_count = 2, ops = {op_zmm(dst), op_zmm(src), {}, {}} }, 2026) }
 inst_vgetexppd_zmm_m512             :: #force_inline proc "contextless" (dst: ZMM, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPPD, operand_count = 2, ops = {op_zmm(dst), op_mem(src.mem, 64), {}, {}} }, 2026) }
-emit_vgetexppd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append(instructions, inst_vgetexppd_xmm_xmm(dst, src)) }
-emit_vgetexppd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append(instructions, inst_vgetexppd_xmm_m128(dst, src)) }
-emit_vgetexppd_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append(instructions, inst_vgetexppd_ymm_ymm(dst, src)) }
-emit_vgetexppd_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append(instructions, inst_vgetexppd_ymm_m256(dst, src)) }
-emit_vgetexppd_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append(instructions, inst_vgetexppd_zmm_zmm(dst, src)) }
-emit_vgetexppd_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append(instructions, inst_vgetexppd_zmm_m512(dst, src)) }
+emit_vgetexppd_xmm_xmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM) { append_elem(instructions, inst_vgetexppd_xmm_xmm(dst, src)) }
+emit_vgetexppd_xmm_m128             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128) { append_elem(instructions, inst_vgetexppd_xmm_m128(dst, src)) }
+emit_vgetexppd_ymm_ymm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM) { append_elem(instructions, inst_vgetexppd_ymm_ymm(dst, src)) }
+emit_vgetexppd_ymm_m256             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256) { append_elem(instructions, inst_vgetexppd_ymm_m256(dst, src)) }
+emit_vgetexppd_zmm_zmm              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM) { append_elem(instructions, inst_vgetexppd_zmm_zmm(dst, src)) }
+emit_vgetexppd_zmm_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512) { append_elem(instructions, inst_vgetexppd_zmm_m512(dst, src)) }
 inst_vgetexpss_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2027) }
 inst_vgetexpss_xmm_xmm_m32          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPSS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), {}} }, 2027) }
-emit_vgetexpss_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vgetexpss_xmm_xmm_xmm(dst, src, src2)) }
-emit_vgetexpss_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append(instructions, inst_vgetexpss_xmm_xmm_m32(dst, src, src2)) }
+emit_vgetexpss_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vgetexpss_xmm_xmm_xmm(dst, src, src2)) }
+emit_vgetexpss_xmm_xmm_m32          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32) { append_elem(instructions, inst_vgetexpss_xmm_xmm_m32(dst, src, src2)) }
 inst_vgetexpsd_xmm_xmm_xmm          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2028) }
 inst_vgetexpsd_xmm_xmm_m64          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETEXPSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), {}} }, 2028) }
-emit_vgetexpsd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vgetexpsd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vgetexpsd_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append(instructions, inst_vgetexpsd_xmm_xmm_m64(dst, src, src2)) }
+emit_vgetexpsd_xmm_xmm_xmm          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vgetexpsd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vgetexpsd_xmm_xmm_m64          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64) { append_elem(instructions, inst_vgetexpsd_xmm_xmm_m64(dst, src, src2)) }
 inst_vgetmantps_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPS, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 2029) }
 inst_vgetmantps_xmm_m128_imm8       :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPS, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 2029) }
 inst_vgetmantps_ymm_ymm_imm8        :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPS, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 2030) }
 inst_vgetmantps_ymm_m256_imm8       :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPS, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 2030) }
 inst_vgetmantps_zmm_zmm_imm8        :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPS, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 2031) }
 inst_vgetmantps_zmm_m512_imm8       :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPS, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 2031) }
-emit_vgetmantps_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vgetmantps_xmm_xmm_imm8(dst, src, imm)) }
-emit_vgetmantps_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vgetmantps_xmm_m128_imm8(dst, src, imm)) }
-emit_vgetmantps_ymm_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vgetmantps_ymm_ymm_imm8(dst, src, imm)) }
-emit_vgetmantps_ymm_m256_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vgetmantps_ymm_m256_imm8(dst, src, imm)) }
-emit_vgetmantps_zmm_zmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vgetmantps_zmm_zmm_imm8(dst, src, imm)) }
-emit_vgetmantps_zmm_m512_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vgetmantps_zmm_m512_imm8(dst, src, imm)) }
+emit_vgetmantps_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vgetmantps_xmm_xmm_imm8(dst, src, imm)) }
+emit_vgetmantps_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vgetmantps_xmm_m128_imm8(dst, src, imm)) }
+emit_vgetmantps_ymm_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vgetmantps_ymm_ymm_imm8(dst, src, imm)) }
+emit_vgetmantps_ymm_m256_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vgetmantps_ymm_m256_imm8(dst, src, imm)) }
+emit_vgetmantps_zmm_zmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vgetmantps_zmm_zmm_imm8(dst, src, imm)) }
+emit_vgetmantps_zmm_m512_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vgetmantps_zmm_m512_imm8(dst, src, imm)) }
 inst_vgetmantpd_xmm_xmm_imm8        :: #force_inline proc "contextless" (dst: XMM, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_imm8(imm), {}} }, 2032) }
 inst_vgetmantpd_xmm_m128_imm8       :: #force_inline proc "contextless" (dst: XMM, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPD, operand_count = 3, ops = {op_xmm(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 2032) }
 inst_vgetmantpd_ymm_ymm_imm8        :: #force_inline proc "contextless" (dst: YMM, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_imm8(imm), {}} }, 2033) }
 inst_vgetmantpd_ymm_m256_imm8       :: #force_inline proc "contextless" (dst: YMM, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPD, operand_count = 3, ops = {op_ymm(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 2033) }
 inst_vgetmantpd_zmm_zmm_imm8        :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_imm8(imm), {}} }, 2034) }
 inst_vgetmantpd_zmm_m512_imm8       :: #force_inline proc "contextless" (dst: ZMM, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTPD, operand_count = 3, ops = {op_zmm(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 2034) }
-emit_vgetmantpd_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append(instructions, inst_vgetmantpd_xmm_xmm_imm8(dst, src, imm)) }
-emit_vgetmantpd_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append(instructions, inst_vgetmantpd_xmm_m128_imm8(dst, src, imm)) }
-emit_vgetmantpd_ymm_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append(instructions, inst_vgetmantpd_ymm_ymm_imm8(dst, src, imm)) }
-emit_vgetmantpd_ymm_m256_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append(instructions, inst_vgetmantpd_ymm_m256_imm8(dst, src, imm)) }
-emit_vgetmantpd_zmm_zmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append(instructions, inst_vgetmantpd_zmm_zmm_imm8(dst, src, imm)) }
-emit_vgetmantpd_zmm_m512_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append(instructions, inst_vgetmantpd_zmm_m512_imm8(dst, src, imm)) }
+emit_vgetmantpd_xmm_xmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, imm: i8) { append_elem(instructions, inst_vgetmantpd_xmm_xmm_imm8(dst, src, imm)) }
+emit_vgetmantpd_xmm_m128_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: Mem128, imm: i8) { append_elem(instructions, inst_vgetmantpd_xmm_m128_imm8(dst, src, imm)) }
+emit_vgetmantpd_ymm_ymm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, imm: i8) { append_elem(instructions, inst_vgetmantpd_ymm_ymm_imm8(dst, src, imm)) }
+emit_vgetmantpd_ymm_m256_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: Mem256, imm: i8) { append_elem(instructions, inst_vgetmantpd_ymm_m256_imm8(dst, src, imm)) }
+emit_vgetmantpd_zmm_zmm_imm8        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, imm: i8) { append_elem(instructions, inst_vgetmantpd_zmm_zmm_imm8(dst, src, imm)) }
+emit_vgetmantpd_zmm_m512_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: Mem512, imm: i8) { append_elem(instructions, inst_vgetmantpd_zmm_m512_imm8(dst, src, imm)) }
 inst_vgetmantss_xmm_xmm_xmm_imm8    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTSS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2035) }
 inst_vgetmantss_xmm_xmm_m32_imm8    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTSS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 2035) }
-emit_vgetmantss_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vgetmantss_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vgetmantss_xmm_xmm_m32_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vgetmantss_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vgetmantss_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vgetmantss_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vgetmantss_xmm_xmm_m32_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vgetmantss_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vgetmantsd_xmm_xmm_xmm_imm8    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTSD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2036) }
 inst_vgetmantsd_xmm_xmm_m64_imm8    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VGETMANTSD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), op_imm8(imm)} }, 2036) }
-emit_vgetmantsd_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vgetmantsd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vgetmantsd_xmm_xmm_m64_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append(instructions, inst_vgetmantsd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
+emit_vgetmantsd_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vgetmantsd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vgetmantsd_xmm_xmm_m64_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append_elem(instructions, inst_vgetmantsd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
 inst_vfixupimmps_xmm_xmm_xmm_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2037) }
 inst_vfixupimmps_xmm_xmm_m128_imm8  :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 2037) }
 inst_vfixupimmps_ymm_ymm_ymm_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 2038) }
 inst_vfixupimmps_ymm_ymm_m256_imm8  :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPS, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 2038) }
 inst_vfixupimmps_zmm_zmm_zmm_imm8   :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPS, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 2039) }
 inst_vfixupimmps_zmm_zmm_m512_imm8  :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPS, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 2039) }
-emit_vfixupimmps_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vfixupimmps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vfixupimmps_xmm_xmm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vfixupimmps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vfixupimmps_ymm_ymm_ymm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vfixupimmps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vfixupimmps_ymm_ymm_m256_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vfixupimmps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vfixupimmps_zmm_zmm_zmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vfixupimmps_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vfixupimmps_zmm_zmm_m512_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vfixupimmps_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vfixupimmps_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vfixupimmps_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vfixupimmps_xmm_xmm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vfixupimmps_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vfixupimmps_ymm_ymm_ymm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vfixupimmps_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vfixupimmps_ymm_ymm_m256_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vfixupimmps_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vfixupimmps_zmm_zmm_zmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vfixupimmps_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vfixupimmps_zmm_zmm_m512_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vfixupimmps_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vfixupimmpd_xmm_xmm_xmm_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2040) }
 inst_vfixupimmpd_xmm_xmm_m128_imm8  :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 2040) }
 inst_vfixupimmpd_ymm_ymm_ymm_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 2041) }
 inst_vfixupimmpd_ymm_ymm_m256_imm8  :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 2041) }
 inst_vfixupimmpd_zmm_zmm_zmm_imm8   :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPD, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 2042) }
 inst_vfixupimmpd_zmm_zmm_m512_imm8  :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMPD, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 2042) }
-emit_vfixupimmpd_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vfixupimmpd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vfixupimmpd_xmm_xmm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vfixupimmpd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vfixupimmpd_ymm_ymm_ymm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vfixupimmpd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vfixupimmpd_ymm_ymm_m256_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vfixupimmpd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vfixupimmpd_zmm_zmm_zmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vfixupimmpd_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vfixupimmpd_zmm_zmm_m512_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vfixupimmpd_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vfixupimmpd_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vfixupimmpd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vfixupimmpd_xmm_xmm_m128_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vfixupimmpd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vfixupimmpd_ymm_ymm_ymm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vfixupimmpd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vfixupimmpd_ymm_ymm_m256_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vfixupimmpd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vfixupimmpd_zmm_zmm_zmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vfixupimmpd_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vfixupimmpd_zmm_zmm_m512_imm8  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vfixupimmpd_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vfixupimmss_xmm_xmm_xmm_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMSS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2043) }
 inst_vfixupimmss_xmm_xmm_m32_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMSS, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 4), op_imm8(imm)} }, 2043) }
-emit_vfixupimmss_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vfixupimmss_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vfixupimmss_xmm_xmm_m32_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append(instructions, inst_vfixupimmss_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
+emit_vfixupimmss_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vfixupimmss_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vfixupimmss_xmm_xmm_m32_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem32, imm: i8) { append_elem(instructions, inst_vfixupimmss_xmm_xmm_m32_imm8(dst, src, src2, imm)) }
 inst_vfixupimmsd_xmm_xmm_xmm_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMSD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2044) }
 inst_vfixupimmsd_xmm_xmm_m64_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFIXUPIMMSD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 8), op_imm8(imm)} }, 2044) }
-emit_vfixupimmsd_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vfixupimmsd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vfixupimmsd_xmm_xmm_m64_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append(instructions, inst_vfixupimmsd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
+emit_vfixupimmsd_xmm_xmm_xmm_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vfixupimmsd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vfixupimmsd_xmm_xmm_m64_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem64, imm: i8) { append_elem(instructions, inst_vfixupimmsd_xmm_xmm_m64_imm8(dst, src, src2, imm)) }
 inst_vfpclassps_k_xmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPS, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_imm8(imm), {}} }, 2045) }
 inst_vfpclassps_k_m128_imm8         :: #force_inline proc "contextless" (dst: KREG, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPS, operand_count = 3, ops = {op_kreg(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 2045) }
 inst_vfpclassps_k_ymm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPS, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_imm8(imm), {}} }, 2046) }
 inst_vfpclassps_k_m256_imm8         :: #force_inline proc "contextless" (dst: KREG, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPS, operand_count = 3, ops = {op_kreg(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 2046) }
 inst_vfpclassps_k_zmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPS, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_imm8(imm), {}} }, 2047) }
 inst_vfpclassps_k_m512_imm8         :: #force_inline proc "contextless" (dst: KREG, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPS, operand_count = 3, ops = {op_kreg(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 2047) }
-emit_vfpclassps_k_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, imm: i8) { append(instructions, inst_vfpclassps_k_xmm_imm8(dst, src, imm)) }
-emit_vfpclassps_k_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem128, imm: i8) { append(instructions, inst_vfpclassps_k_m128_imm8(dst, src, imm)) }
-emit_vfpclassps_k_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, imm: i8) { append(instructions, inst_vfpclassps_k_ymm_imm8(dst, src, imm)) }
-emit_vfpclassps_k_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem256, imm: i8) { append(instructions, inst_vfpclassps_k_m256_imm8(dst, src, imm)) }
-emit_vfpclassps_k_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, imm: i8) { append(instructions, inst_vfpclassps_k_zmm_imm8(dst, src, imm)) }
-emit_vfpclassps_k_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem512, imm: i8) { append(instructions, inst_vfpclassps_k_m512_imm8(dst, src, imm)) }
+emit_vfpclassps_k_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, imm: i8) { append_elem(instructions, inst_vfpclassps_k_xmm_imm8(dst, src, imm)) }
+emit_vfpclassps_k_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem128, imm: i8) { append_elem(instructions, inst_vfpclassps_k_m128_imm8(dst, src, imm)) }
+emit_vfpclassps_k_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, imm: i8) { append_elem(instructions, inst_vfpclassps_k_ymm_imm8(dst, src, imm)) }
+emit_vfpclassps_k_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem256, imm: i8) { append_elem(instructions, inst_vfpclassps_k_m256_imm8(dst, src, imm)) }
+emit_vfpclassps_k_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, imm: i8) { append_elem(instructions, inst_vfpclassps_k_zmm_imm8(dst, src, imm)) }
+emit_vfpclassps_k_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem512, imm: i8) { append_elem(instructions, inst_vfpclassps_k_m512_imm8(dst, src, imm)) }
 inst_vfpclasspd_k_xmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPD, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_imm8(imm), {}} }, 2048) }
 inst_vfpclasspd_k_m128_imm8         :: #force_inline proc "contextless" (dst: KREG, src: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPD, operand_count = 3, ops = {op_kreg(dst), op_mem(src.mem, 16), op_imm8(imm), {}} }, 2048) }
 inst_vfpclasspd_k_ymm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPD, operand_count = 3, ops = {op_kreg(dst), op_ymm(src), op_imm8(imm), {}} }, 2049) }
 inst_vfpclasspd_k_m256_imm8         :: #force_inline proc "contextless" (dst: KREG, src: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPD, operand_count = 3, ops = {op_kreg(dst), op_mem(src.mem, 32), op_imm8(imm), {}} }, 2049) }
 inst_vfpclasspd_k_zmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPD, operand_count = 3, ops = {op_kreg(dst), op_zmm(src), op_imm8(imm), {}} }, 2050) }
 inst_vfpclasspd_k_m512_imm8         :: #force_inline proc "contextless" (dst: KREG, src: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSPD, operand_count = 3, ops = {op_kreg(dst), op_mem(src.mem, 64), op_imm8(imm), {}} }, 2050) }
-emit_vfpclasspd_k_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, imm: i8) { append(instructions, inst_vfpclasspd_k_xmm_imm8(dst, src, imm)) }
-emit_vfpclasspd_k_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem128, imm: i8) { append(instructions, inst_vfpclasspd_k_m128_imm8(dst, src, imm)) }
-emit_vfpclasspd_k_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, imm: i8) { append(instructions, inst_vfpclasspd_k_ymm_imm8(dst, src, imm)) }
-emit_vfpclasspd_k_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem256, imm: i8) { append(instructions, inst_vfpclasspd_k_m256_imm8(dst, src, imm)) }
-emit_vfpclasspd_k_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, imm: i8) { append(instructions, inst_vfpclasspd_k_zmm_imm8(dst, src, imm)) }
-emit_vfpclasspd_k_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem512, imm: i8) { append(instructions, inst_vfpclasspd_k_m512_imm8(dst, src, imm)) }
+emit_vfpclasspd_k_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, imm: i8) { append_elem(instructions, inst_vfpclasspd_k_xmm_imm8(dst, src, imm)) }
+emit_vfpclasspd_k_m128_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem128, imm: i8) { append_elem(instructions, inst_vfpclasspd_k_m128_imm8(dst, src, imm)) }
+emit_vfpclasspd_k_ymm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: YMM, imm: i8) { append_elem(instructions, inst_vfpclasspd_k_ymm_imm8(dst, src, imm)) }
+emit_vfpclasspd_k_m256_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem256, imm: i8) { append_elem(instructions, inst_vfpclasspd_k_m256_imm8(dst, src, imm)) }
+emit_vfpclasspd_k_zmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: ZMM, imm: i8) { append_elem(instructions, inst_vfpclasspd_k_zmm_imm8(dst, src, imm)) }
+emit_vfpclasspd_k_m512_imm8         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem512, imm: i8) { append_elem(instructions, inst_vfpclasspd_k_m512_imm8(dst, src, imm)) }
 inst_vfpclassss_k_xmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSSS, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_imm8(imm), {}} }, 2051) }
 inst_vfpclassss_k_m32_imm8          :: #force_inline proc "contextless" (dst: KREG, src: Mem32, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSSS, operand_count = 3, ops = {op_kreg(dst), op_mem(src.mem, 4), op_imm8(imm), {}} }, 2051) }
-emit_vfpclassss_k_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, imm: i8) { append(instructions, inst_vfpclassss_k_xmm_imm8(dst, src, imm)) }
-emit_vfpclassss_k_m32_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem32, imm: i8) { append(instructions, inst_vfpclassss_k_m32_imm8(dst, src, imm)) }
+emit_vfpclassss_k_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, imm: i8) { append_elem(instructions, inst_vfpclassss_k_xmm_imm8(dst, src, imm)) }
+emit_vfpclassss_k_m32_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem32, imm: i8) { append_elem(instructions, inst_vfpclassss_k_m32_imm8(dst, src, imm)) }
 inst_vfpclasssd_k_xmm_imm8          :: #force_inline proc "contextless" (dst: KREG, src: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSSD, operand_count = 3, ops = {op_kreg(dst), op_xmm(src), op_imm8(imm), {}} }, 2052) }
 inst_vfpclasssd_k_m64_imm8          :: #force_inline proc "contextless" (dst: KREG, src: Mem64, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VFPCLASSSD, operand_count = 3, ops = {op_kreg(dst), op_mem(src.mem, 8), op_imm8(imm), {}} }, 2052) }
-emit_vfpclasssd_k_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, imm: i8) { append(instructions, inst_vfpclasssd_k_xmm_imm8(dst, src, imm)) }
-emit_vfpclasssd_k_m64_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem64, imm: i8) { append(instructions, inst_vfpclasssd_k_m64_imm8(dst, src, imm)) }
+emit_vfpclasssd_k_xmm_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: XMM, imm: i8) { append_elem(instructions, inst_vfpclasssd_k_xmm_imm8(dst, src, imm)) }
+emit_vfpclasssd_k_m64_imm8          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem64, imm: i8) { append_elem(instructions, inst_vfpclasssd_k_m64_imm8(dst, src, imm)) }
 inst_valignq_xmm_xmm_xmm_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGNQ, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2053) }
 inst_valignq_xmm_xmm_m128_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGNQ, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 2053) }
 inst_valignq_ymm_ymm_ymm_imm8       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGNQ, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 2054) }
 inst_valignq_ymm_ymm_m256_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGNQ, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 2054) }
 inst_valignq_zmm_zmm_zmm_imm8       :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGNQ, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 2055) }
 inst_valignq_zmm_zmm_m512_imm8      :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGNQ, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 2055) }
-emit_valignq_xmm_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_valignq_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_valignq_xmm_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_valignq_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_valignq_ymm_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_valignq_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_valignq_ymm_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_valignq_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_valignq_zmm_zmm_zmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_valignq_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_valignq_zmm_zmm_m512_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_valignq_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_valignq_xmm_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_valignq_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_valignq_xmm_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_valignq_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_valignq_ymm_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_valignq_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_valignq_ymm_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_valignq_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_valignq_zmm_zmm_zmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_valignq_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_valignq_zmm_zmm_m512_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_valignq_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_valignd_xmm_xmm_xmm_imm8       :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGND, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2056) }
 inst_valignd_xmm_xmm_m128_imm8      :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGND, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 2056) }
 inst_valignd_ymm_ymm_ymm_imm8       :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGND, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 2057) }
 inst_valignd_ymm_ymm_m256_imm8      :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGND, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 2057) }
 inst_valignd_zmm_zmm_zmm_imm8       :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGND, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 2058) }
 inst_valignd_zmm_zmm_m512_imm8      :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VALIGND, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 2058) }
-emit_valignd_xmm_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_valignd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_valignd_xmm_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_valignd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_valignd_ymm_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_valignd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_valignd_ymm_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_valignd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_valignd_zmm_zmm_zmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_valignd_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_valignd_zmm_zmm_m512_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_valignd_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_valignd_xmm_xmm_xmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_valignd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_valignd_xmm_xmm_m128_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_valignd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_valignd_ymm_ymm_ymm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_valignd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_valignd_ymm_ymm_m256_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_valignd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_valignd_zmm_zmm_zmm_imm8       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_valignd_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_valignd_zmm_zmm_m512_imm8      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_valignd_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vdbpsadbw_xmm_xmm_xmm_imm8     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDBPSADBW, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2059) }
 inst_vdbpsadbw_xmm_xmm_m128_imm8    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDBPSADBW, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 2059) }
 inst_vdbpsadbw_ymm_ymm_ymm_imm8     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDBPSADBW, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 2060) }
 inst_vdbpsadbw_ymm_ymm_m256_imm8    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDBPSADBW, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 2060) }
 inst_vdbpsadbw_zmm_zmm_zmm_imm8     :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDBPSADBW, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 2061) }
 inst_vdbpsadbw_zmm_zmm_m512_imm8    :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VDBPSADBW, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 2061) }
-emit_vdbpsadbw_xmm_xmm_xmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vdbpsadbw_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vdbpsadbw_xmm_xmm_m128_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vdbpsadbw_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vdbpsadbw_ymm_ymm_ymm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vdbpsadbw_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vdbpsadbw_ymm_ymm_m256_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vdbpsadbw_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vdbpsadbw_zmm_zmm_zmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vdbpsadbw_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vdbpsadbw_zmm_zmm_m512_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vdbpsadbw_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vdbpsadbw_xmm_xmm_xmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vdbpsadbw_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vdbpsadbw_xmm_xmm_m128_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vdbpsadbw_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vdbpsadbw_ymm_ymm_ymm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vdbpsadbw_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vdbpsadbw_ymm_ymm_m256_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vdbpsadbw_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vdbpsadbw_zmm_zmm_zmm_imm8     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vdbpsadbw_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vdbpsadbw_zmm_zmm_m512_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vdbpsadbw_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpternlogd_xmm_xmm_xmm_imm8    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2062) }
 inst_vpternlogd_xmm_xmm_m128_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGD, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 2062) }
 inst_vpternlogd_ymm_ymm_ymm_imm8    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 2063) }
 inst_vpternlogd_ymm_ymm_m256_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGD, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 2063) }
 inst_vpternlogd_zmm_zmm_zmm_imm8    :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGD, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 2064) }
 inst_vpternlogd_zmm_zmm_m512_imm8   :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGD, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 2064) }
-emit_vpternlogd_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpternlogd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpternlogd_xmm_xmm_m128_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpternlogd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpternlogd_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpternlogd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpternlogd_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpternlogd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpternlogd_zmm_zmm_zmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpternlogd_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpternlogd_zmm_zmm_m512_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpternlogd_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpternlogd_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpternlogd_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpternlogd_xmm_xmm_m128_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpternlogd_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpternlogd_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpternlogd_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpternlogd_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpternlogd_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpternlogd_zmm_zmm_zmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpternlogd_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpternlogd_zmm_zmm_m512_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpternlogd_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpternlogq_xmm_xmm_xmm_imm8    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGQ, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), op_imm8(imm)} }, 2065) }
 inst_vpternlogq_xmm_xmm_m128_imm8   :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGQ, operand_count = 4, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), op_imm8(imm)} }, 2065) }
 inst_vpternlogq_ymm_ymm_ymm_imm8    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGQ, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), op_imm8(imm)} }, 2066) }
 inst_vpternlogq_ymm_ymm_m256_imm8   :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGQ, operand_count = 4, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), op_imm8(imm)} }, 2066) }
 inst_vpternlogq_zmm_zmm_zmm_imm8    :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGQ, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), op_imm8(imm)} }, 2067) }
 inst_vpternlogq_zmm_zmm_m512_imm8   :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .VPTERNLOGQ, operand_count = 4, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), op_imm8(imm)} }, 2067) }
-emit_vpternlogq_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append(instructions, inst_vpternlogq_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
-emit_vpternlogq_xmm_xmm_m128_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append(instructions, inst_vpternlogq_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
-emit_vpternlogq_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append(instructions, inst_vpternlogq_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
-emit_vpternlogq_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append(instructions, inst_vpternlogq_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
-emit_vpternlogq_zmm_zmm_zmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append(instructions, inst_vpternlogq_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
-emit_vpternlogq_zmm_zmm_m512_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append(instructions, inst_vpternlogq_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
+emit_vpternlogq_xmm_xmm_xmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM, imm: i8) { append_elem(instructions, inst_vpternlogq_xmm_xmm_xmm_imm8(dst, src, src2, imm)) }
+emit_vpternlogq_xmm_xmm_m128_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128, imm: i8) { append_elem(instructions, inst_vpternlogq_xmm_xmm_m128_imm8(dst, src, src2, imm)) }
+emit_vpternlogq_ymm_ymm_ymm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM, imm: i8) { append_elem(instructions, inst_vpternlogq_ymm_ymm_ymm_imm8(dst, src, src2, imm)) }
+emit_vpternlogq_ymm_ymm_m256_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256, imm: i8) { append_elem(instructions, inst_vpternlogq_ymm_ymm_m256_imm8(dst, src, src2, imm)) }
+emit_vpternlogq_zmm_zmm_zmm_imm8    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM, imm: i8) { append_elem(instructions, inst_vpternlogq_zmm_zmm_zmm_imm8(dst, src, src2, imm)) }
+emit_vpternlogq_zmm_zmm_m512_imm8   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512, imm: i8) { append_elem(instructions, inst_vpternlogq_zmm_zmm_m512_imm8(dst, src, src2, imm)) }
 inst_vpdpwssd_xmm_xmm_xmm           :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPDPWSSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2068) }
 inst_vpdpwssd_xmm_xmm_m128          :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPDPWSSD, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 2068) }
 inst_vpdpwssd_ymm_ymm_ymm           :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPDPWSSD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 2069) }
 inst_vpdpwssd_ymm_ymm_m256          :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPDPWSSD, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 2069) }
 inst_vpdpwssd_zmm_zmm_zmm           :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPDPWSSD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 2070) }
 inst_vpdpwssd_zmm_zmm_m512          :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPDPWSSD, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 2070) }
-emit_vpdpwssd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpdpwssd_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpdpwssd_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpdpwssd_xmm_xmm_m128(dst, src, src2)) }
-emit_vpdpwssd_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpdpwssd_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpdpwssd_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpdpwssd_ymm_ymm_m256(dst, src, src2)) }
-emit_vpdpwssd_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpdpwssd_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpdpwssd_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpdpwssd_zmm_zmm_m512(dst, src, src2)) }
+emit_vpdpwssd_xmm_xmm_xmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpdpwssd_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpdpwssd_xmm_xmm_m128          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpdpwssd_xmm_xmm_m128(dst, src, src2)) }
+emit_vpdpwssd_ymm_ymm_ymm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpdpwssd_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpdpwssd_ymm_ymm_m256          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpdpwssd_ymm_ymm_m256(dst, src, src2)) }
+emit_vpdpwssd_zmm_zmm_zmm           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpdpwssd_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpdpwssd_zmm_zmm_m512          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpdpwssd_zmm_zmm_m512(dst, src, src2)) }
 inst_vpmultishiftqb_xmm_xmm_xmm     :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: XMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULTISHIFTQB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_xmm(src2), {}} }, 2071) }
 inst_vpmultishiftqb_xmm_xmm_m128    :: #force_inline proc "contextless" (dst: XMM, src: XMM, src2: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULTISHIFTQB, operand_count = 3, ops = {op_xmm(dst), op_xmm(src), op_mem(src2.mem, 16), {}} }, 2071) }
 inst_vpmultishiftqb_ymm_ymm_ymm     :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: YMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULTISHIFTQB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_ymm(src2), {}} }, 2072) }
 inst_vpmultishiftqb_ymm_ymm_m256    :: #force_inline proc "contextless" (dst: YMM, src: YMM, src2: Mem256) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULTISHIFTQB, operand_count = 3, ops = {op_ymm(dst), op_ymm(src), op_mem(src2.mem, 32), {}} }, 2072) }
 inst_vpmultishiftqb_zmm_zmm_zmm     :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: ZMM) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULTISHIFTQB, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_zmm(src2), {}} }, 2073) }
 inst_vpmultishiftqb_zmm_zmm_m512    :: #force_inline proc "contextless" (dst: ZMM, src: ZMM, src2: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .VPMULTISHIFTQB, operand_count = 3, ops = {op_zmm(dst), op_zmm(src), op_mem(src2.mem, 64), {}} }, 2073) }
-emit_vpmultishiftqb_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append(instructions, inst_vpmultishiftqb_xmm_xmm_xmm(dst, src, src2)) }
-emit_vpmultishiftqb_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append(instructions, inst_vpmultishiftqb_xmm_xmm_m128(dst, src, src2)) }
-emit_vpmultishiftqb_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append(instructions, inst_vpmultishiftqb_ymm_ymm_ymm(dst, src, src2)) }
-emit_vpmultishiftqb_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append(instructions, inst_vpmultishiftqb_ymm_ymm_m256(dst, src, src2)) }
-emit_vpmultishiftqb_zmm_zmm_zmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append(instructions, inst_vpmultishiftqb_zmm_zmm_zmm(dst, src, src2)) }
-emit_vpmultishiftqb_zmm_zmm_m512    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append(instructions, inst_vpmultishiftqb_zmm_zmm_m512(dst, src, src2)) }
+emit_vpmultishiftqb_xmm_xmm_xmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: XMM) { append_elem(instructions, inst_vpmultishiftqb_xmm_xmm_xmm(dst, src, src2)) }
+emit_vpmultishiftqb_xmm_xmm_m128    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: XMM, src: XMM, src2: Mem128) { append_elem(instructions, inst_vpmultishiftqb_xmm_xmm_m128(dst, src, src2)) }
+emit_vpmultishiftqb_ymm_ymm_ymm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: YMM) { append_elem(instructions, inst_vpmultishiftqb_ymm_ymm_ymm(dst, src, src2)) }
+emit_vpmultishiftqb_ymm_ymm_m256    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: YMM, src: YMM, src2: Mem256) { append_elem(instructions, inst_vpmultishiftqb_ymm_ymm_m256(dst, src, src2)) }
+emit_vpmultishiftqb_zmm_zmm_zmm     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: ZMM) { append_elem(instructions, inst_vpmultishiftqb_zmm_zmm_zmm(dst, src, src2)) }
+emit_vpmultishiftqb_zmm_zmm_m512    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ZMM, src: ZMM, src2: Mem512) { append_elem(instructions, inst_vpmultishiftqb_zmm_zmm_m512(dst, src, src2)) }
 inst_kaddw_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KADDW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2074) }
-emit_kaddw_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kaddw_k_k_k(dst, src, src2)) }
+emit_kaddw_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kaddw_k_k_k(dst, src, src2)) }
 inst_kaddb_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KADDB, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2075) }
-emit_kaddb_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kaddb_k_k_k(dst, src, src2)) }
+emit_kaddb_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kaddb_k_k_k(dst, src, src2)) }
 inst_kaddq_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KADDQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2076) }
-emit_kaddq_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kaddq_k_k_k(dst, src, src2)) }
+emit_kaddq_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kaddq_k_k_k(dst, src, src2)) }
 inst_kaddd_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KADDD, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2077) }
-emit_kaddd_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kaddd_k_k_k(dst, src, src2)) }
+emit_kaddd_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kaddd_k_k_k(dst, src, src2)) }
 inst_kandw_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KANDW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2078) }
-emit_kandw_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kandw_k_k_k(dst, src, src2)) }
+emit_kandw_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kandw_k_k_k(dst, src, src2)) }
 inst_kandb_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KANDB, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2079) }
-emit_kandb_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kandb_k_k_k(dst, src, src2)) }
+emit_kandb_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kandb_k_k_k(dst, src, src2)) }
 inst_kandq_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KANDQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2080) }
-emit_kandq_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kandq_k_k_k(dst, src, src2)) }
+emit_kandq_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kandq_k_k_k(dst, src, src2)) }
 inst_kandd_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KANDD, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2081) }
-emit_kandd_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kandd_k_k_k(dst, src, src2)) }
+emit_kandd_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kandd_k_k_k(dst, src, src2)) }
 inst_kandnw_k_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KANDNW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2082) }
-emit_kandnw_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kandnw_k_k_k(dst, src, src2)) }
+emit_kandnw_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kandnw_k_k_k(dst, src, src2)) }
 inst_kandnb_k_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KANDNB, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2083) }
-emit_kandnb_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kandnb_k_k_k(dst, src, src2)) }
+emit_kandnb_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kandnb_k_k_k(dst, src, src2)) }
 inst_kandnq_k_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KANDNQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2084) }
-emit_kandnq_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kandnq_k_k_k(dst, src, src2)) }
+emit_kandnq_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kandnq_k_k_k(dst, src, src2)) }
 inst_kandnd_k_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KANDND, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2085) }
-emit_kandnd_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kandnd_k_k_k(dst, src, src2)) }
+emit_kandnd_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kandnd_k_k_k(dst, src, src2)) }
 inst_kmovw_k_k                      :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVW, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2086) }
 inst_kmovw_k_m16                    :: #force_inline proc "contextless" (dst: KREG, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVW, operand_count = 2, ops = {op_kreg(dst), op_mem(src.mem, 2), {}, {}} }, 2086) }
 inst_kmovw_m16_k                    :: #force_inline proc "contextless" (dst: Mem16, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVW, operand_count = 2, ops = {op_mem(dst.mem, 2), op_kreg(src), {}, {}} }, 2087) }
 inst_kmovw_k_r32                    :: #force_inline proc "contextless" (dst: KREG, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVW, operand_count = 2, ops = {op_kreg(dst), op_gpr32(src), {}, {}} }, 2088) }
 inst_kmovw_r32_k                    :: #force_inline proc "contextless" (dst: GPR32, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVW, operand_count = 2, ops = {op_gpr32(dst), op_kreg(src), {}, {}} }, 2089) }
-emit_kmovw_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_kmovw_k_k(dst, src)) }
-emit_kmovw_k_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem16) { append(instructions, inst_kmovw_k_m16(dst, src)) }
-emit_kmovw_m16_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: KREG) { append(instructions, inst_kmovw_m16_k(dst, src)) }
-emit_kmovw_k_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: GPR32) { append(instructions, inst_kmovw_k_r32(dst, src)) }
-emit_kmovw_r32_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: KREG) { append(instructions, inst_kmovw_r32_k(dst, src)) }
+emit_kmovw_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_kmovw_k_k(dst, src)) }
+emit_kmovw_k_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem16) { append_elem(instructions, inst_kmovw_k_m16(dst, src)) }
+emit_kmovw_m16_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: KREG) { append_elem(instructions, inst_kmovw_m16_k(dst, src)) }
+emit_kmovw_k_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: GPR32) { append_elem(instructions, inst_kmovw_k_r32(dst, src)) }
+emit_kmovw_r32_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: KREG) { append_elem(instructions, inst_kmovw_r32_k(dst, src)) }
 inst_kmovb_k_k                      :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVB, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2090) }
 inst_kmovb_k_m8                     :: #force_inline proc "contextless" (dst: KREG, src: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVB, operand_count = 2, ops = {op_kreg(dst), op_mem(src.mem, 1), {}, {}} }, 2090) }
 inst_kmovb_m8_k                     :: #force_inline proc "contextless" (dst: Mem8, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVB, operand_count = 2, ops = {op_mem(dst.mem, 1), op_kreg(src), {}, {}} }, 2091) }
 inst_kmovb_k_r32                    :: #force_inline proc "contextless" (dst: KREG, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVB, operand_count = 2, ops = {op_kreg(dst), op_gpr32(src), {}, {}} }, 2092) }
 inst_kmovb_r32_k                    :: #force_inline proc "contextless" (dst: GPR32, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVB, operand_count = 2, ops = {op_gpr32(dst), op_kreg(src), {}, {}} }, 2093) }
-emit_kmovb_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_kmovb_k_k(dst, src)) }
-emit_kmovb_k_m8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem8) { append(instructions, inst_kmovb_k_m8(dst, src)) }
-emit_kmovb_m8_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: KREG) { append(instructions, inst_kmovb_m8_k(dst, src)) }
-emit_kmovb_k_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: GPR32) { append(instructions, inst_kmovb_k_r32(dst, src)) }
-emit_kmovb_r32_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: KREG) { append(instructions, inst_kmovb_r32_k(dst, src)) }
+emit_kmovb_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_kmovb_k_k(dst, src)) }
+emit_kmovb_k_m8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem8) { append_elem(instructions, inst_kmovb_k_m8(dst, src)) }
+emit_kmovb_m8_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: KREG) { append_elem(instructions, inst_kmovb_m8_k(dst, src)) }
+emit_kmovb_k_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: GPR32) { append_elem(instructions, inst_kmovb_k_r32(dst, src)) }
+emit_kmovb_r32_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: KREG) { append_elem(instructions, inst_kmovb_r32_k(dst, src)) }
 inst_kmovq_k_k                      :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVQ, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2094) }
 inst_kmovq_k_m64                    :: #force_inline proc "contextless" (dst: KREG, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVQ, operand_count = 2, ops = {op_kreg(dst), op_mem(src.mem, 8), {}, {}} }, 2094) }
 inst_kmovq_m64_k                    :: #force_inline proc "contextless" (dst: Mem64, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVQ, operand_count = 2, ops = {op_mem(dst.mem, 8), op_kreg(src), {}, {}} }, 2095) }
 inst_kmovq_k_r64                    :: #force_inline proc "contextless" (dst: KREG, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVQ, operand_count = 2, ops = {op_kreg(dst), op_gpr64(src), {}, {}} }, 2096) }
 inst_kmovq_r64_k                    :: #force_inline proc "contextless" (dst: GPR64, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVQ, operand_count = 2, ops = {op_gpr64(dst), op_kreg(src), {}, {}} }, 2097) }
-emit_kmovq_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_kmovq_k_k(dst, src)) }
-emit_kmovq_k_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem64) { append(instructions, inst_kmovq_k_m64(dst, src)) }
-emit_kmovq_m64_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: KREG) { append(instructions, inst_kmovq_m64_k(dst, src)) }
-emit_kmovq_k_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: GPR64) { append(instructions, inst_kmovq_k_r64(dst, src)) }
-emit_kmovq_r64_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: KREG) { append(instructions, inst_kmovq_r64_k(dst, src)) }
+emit_kmovq_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_kmovq_k_k(dst, src)) }
+emit_kmovq_k_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem64) { append_elem(instructions, inst_kmovq_k_m64(dst, src)) }
+emit_kmovq_m64_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: KREG) { append_elem(instructions, inst_kmovq_m64_k(dst, src)) }
+emit_kmovq_k_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: GPR64) { append_elem(instructions, inst_kmovq_k_r64(dst, src)) }
+emit_kmovq_r64_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: KREG) { append_elem(instructions, inst_kmovq_r64_k(dst, src)) }
 inst_kmovd_k_k                      :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVD, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2098) }
 inst_kmovd_k_m32                    :: #force_inline proc "contextless" (dst: KREG, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVD, operand_count = 2, ops = {op_kreg(dst), op_mem(src.mem, 4), {}, {}} }, 2098) }
 inst_kmovd_m32_k                    :: #force_inline proc "contextless" (dst: Mem32, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_kreg(src), {}, {}} }, 2099) }
 inst_kmovd_k_r32                    :: #force_inline proc "contextless" (dst: KREG, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVD, operand_count = 2, ops = {op_kreg(dst), op_gpr32(src), {}, {}} }, 2100) }
 inst_kmovd_r32_k                    :: #force_inline proc "contextless" (dst: GPR32, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KMOVD, operand_count = 2, ops = {op_gpr32(dst), op_kreg(src), {}, {}} }, 2101) }
-emit_kmovd_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_kmovd_k_k(dst, src)) }
-emit_kmovd_k_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem32) { append(instructions, inst_kmovd_k_m32(dst, src)) }
-emit_kmovd_m32_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: KREG) { append(instructions, inst_kmovd_m32_k(dst, src)) }
-emit_kmovd_k_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: GPR32) { append(instructions, inst_kmovd_k_r32(dst, src)) }
-emit_kmovd_r32_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: KREG) { append(instructions, inst_kmovd_r32_k(dst, src)) }
+emit_kmovd_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_kmovd_k_k(dst, src)) }
+emit_kmovd_k_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: Mem32) { append_elem(instructions, inst_kmovd_k_m32(dst, src)) }
+emit_kmovd_m32_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: KREG) { append_elem(instructions, inst_kmovd_m32_k(dst, src)) }
+emit_kmovd_k_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: GPR32) { append_elem(instructions, inst_kmovd_k_r32(dst, src)) }
+emit_kmovd_r32_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: KREG) { append_elem(instructions, inst_kmovd_r32_k(dst, src)) }
 inst_knotw_k_k                      :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KNOTW, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2102) }
-emit_knotw_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_knotw_k_k(dst, src)) }
+emit_knotw_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_knotw_k_k(dst, src)) }
 inst_knotb_k_k                      :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KNOTB, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2103) }
-emit_knotb_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_knotb_k_k(dst, src)) }
+emit_knotb_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_knotb_k_k(dst, src)) }
 inst_knotq_k_k                      :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KNOTQ, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2104) }
-emit_knotq_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_knotq_k_k(dst, src)) }
+emit_knotq_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_knotq_k_k(dst, src)) }
 inst_knotd_k_k                      :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KNOTD, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2105) }
-emit_knotd_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_knotd_k_k(dst, src)) }
+emit_knotd_k_k                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_knotd_k_k(dst, src)) }
 inst_korw_k_k_k                     :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KORW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2106) }
-emit_korw_k_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_korw_k_k_k(dst, src, src2)) }
+emit_korw_k_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_korw_k_k_k(dst, src, src2)) }
 inst_korb_k_k_k                     :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KORB, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2107) }
-emit_korb_k_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_korb_k_k_k(dst, src, src2)) }
+emit_korb_k_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_korb_k_k_k(dst, src, src2)) }
 inst_korq_k_k_k                     :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KORQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2108) }
-emit_korq_k_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_korq_k_k_k(dst, src, src2)) }
+emit_korq_k_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_korq_k_k_k(dst, src, src2)) }
 inst_kord_k_k_k                     :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KORD, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2109) }
-emit_kord_k_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kord_k_k_k(dst, src, src2)) }
+emit_kord_k_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kord_k_k_k(dst, src, src2)) }
 inst_kortestw_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KORTESTW, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2110) }
-emit_kortestw_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_kortestw_k_k(dst, src)) }
+emit_kortestw_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_kortestw_k_k(dst, src)) }
 inst_kortestb_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KORTESTB, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2111) }
-emit_kortestb_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_kortestb_k_k(dst, src)) }
+emit_kortestb_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_kortestb_k_k(dst, src)) }
 inst_kortestq_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KORTESTQ, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2112) }
-emit_kortestq_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_kortestq_k_k(dst, src)) }
+emit_kortestq_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_kortestq_k_k(dst, src)) }
 inst_kortestd_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KORTESTD, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2113) }
-emit_kortestd_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_kortestd_k_k(dst, src)) }
+emit_kortestd_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_kortestd_k_k(dst, src)) }
 inst_kshiftlw_k_k_imm8              :: #force_inline proc "contextless" (dst: KREG, src: KREG, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .KSHIFTLW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_imm8(imm), {}} }, 2114) }
-emit_kshiftlw_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append(instructions, inst_kshiftlw_k_k_imm8(dst, src, imm)) }
+emit_kshiftlw_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append_elem(instructions, inst_kshiftlw_k_k_imm8(dst, src, imm)) }
 inst_kshiftlb_k_k_imm8              :: #force_inline proc "contextless" (dst: KREG, src: KREG, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .KSHIFTLB, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_imm8(imm), {}} }, 2115) }
-emit_kshiftlb_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append(instructions, inst_kshiftlb_k_k_imm8(dst, src, imm)) }
+emit_kshiftlb_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append_elem(instructions, inst_kshiftlb_k_k_imm8(dst, src, imm)) }
 inst_kshiftlq_k_k_imm8              :: #force_inline proc "contextless" (dst: KREG, src: KREG, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .KSHIFTLQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_imm8(imm), {}} }, 2116) }
-emit_kshiftlq_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append(instructions, inst_kshiftlq_k_k_imm8(dst, src, imm)) }
+emit_kshiftlq_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append_elem(instructions, inst_kshiftlq_k_k_imm8(dst, src, imm)) }
 inst_kshiftld_k_k_imm8              :: #force_inline proc "contextless" (dst: KREG, src: KREG, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .KSHIFTLD, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_imm8(imm), {}} }, 2117) }
-emit_kshiftld_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append(instructions, inst_kshiftld_k_k_imm8(dst, src, imm)) }
+emit_kshiftld_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append_elem(instructions, inst_kshiftld_k_k_imm8(dst, src, imm)) }
 inst_kshiftrw_k_k_imm8              :: #force_inline proc "contextless" (dst: KREG, src: KREG, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .KSHIFTRW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_imm8(imm), {}} }, 2118) }
-emit_kshiftrw_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append(instructions, inst_kshiftrw_k_k_imm8(dst, src, imm)) }
+emit_kshiftrw_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append_elem(instructions, inst_kshiftrw_k_k_imm8(dst, src, imm)) }
 inst_kshiftrb_k_k_imm8              :: #force_inline proc "contextless" (dst: KREG, src: KREG, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .KSHIFTRB, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_imm8(imm), {}} }, 2119) }
-emit_kshiftrb_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append(instructions, inst_kshiftrb_k_k_imm8(dst, src, imm)) }
+emit_kshiftrb_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append_elem(instructions, inst_kshiftrb_k_k_imm8(dst, src, imm)) }
 inst_kshiftrq_k_k_imm8              :: #force_inline proc "contextless" (dst: KREG, src: KREG, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .KSHIFTRQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_imm8(imm), {}} }, 2120) }
-emit_kshiftrq_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append(instructions, inst_kshiftrq_k_k_imm8(dst, src, imm)) }
+emit_kshiftrq_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append_elem(instructions, inst_kshiftrq_k_k_imm8(dst, src, imm)) }
 inst_kshiftrd_k_k_imm8              :: #force_inline proc "contextless" (dst: KREG, src: KREG, imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .KSHIFTRD, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_imm8(imm), {}} }, 2121) }
-emit_kshiftrd_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append(instructions, inst_kshiftrd_k_k_imm8(dst, src, imm)) }
+emit_kshiftrd_k_k_imm8              :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, imm: i8) { append_elem(instructions, inst_kshiftrd_k_k_imm8(dst, src, imm)) }
 inst_ktestw_k_k                     :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KTESTW, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2122) }
-emit_ktestw_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_ktestw_k_k(dst, src)) }
+emit_ktestw_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_ktestw_k_k(dst, src)) }
 inst_ktestb_k_k                     :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KTESTB, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2123) }
-emit_ktestb_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_ktestb_k_k(dst, src)) }
+emit_ktestb_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_ktestb_k_k(dst, src)) }
 inst_ktestq_k_k                     :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KTESTQ, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2124) }
-emit_ktestq_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_ktestq_k_k(dst, src)) }
+emit_ktestq_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_ktestq_k_k(dst, src)) }
 inst_ktestd_k_k                     :: #force_inline proc "contextless" (dst: KREG, src: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KTESTD, operand_count = 2, ops = {op_kreg(dst), op_kreg(src), {}, {}} }, 2125) }
-emit_ktestd_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append(instructions, inst_ktestd_k_k(dst, src)) }
+emit_ktestd_k_k                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG) { append_elem(instructions, inst_ktestd_k_k(dst, src)) }
 inst_kunpckbw_k_k_k                 :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KUNPCKBW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2126) }
-emit_kunpckbw_k_k_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kunpckbw_k_k_k(dst, src, src2)) }
+emit_kunpckbw_k_k_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kunpckbw_k_k_k(dst, src, src2)) }
 inst_kunpckwd_k_k_k                 :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KUNPCKWD, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2127) }
-emit_kunpckwd_k_k_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kunpckwd_k_k_k(dst, src, src2)) }
+emit_kunpckwd_k_k_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kunpckwd_k_k_k(dst, src, src2)) }
 inst_kunpckdq_k_k_k                 :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KUNPCKDQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2128) }
-emit_kunpckdq_k_k_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kunpckdq_k_k_k(dst, src, src2)) }
+emit_kunpckdq_k_k_k                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kunpckdq_k_k_k(dst, src, src2)) }
 inst_kxnorw_k_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KXNORW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2129) }
-emit_kxnorw_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kxnorw_k_k_k(dst, src, src2)) }
+emit_kxnorw_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kxnorw_k_k_k(dst, src, src2)) }
 inst_kxnorb_k_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KXNORB, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2130) }
-emit_kxnorb_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kxnorb_k_k_k(dst, src, src2)) }
+emit_kxnorb_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kxnorb_k_k_k(dst, src, src2)) }
 inst_kxnorq_k_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KXNORQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2131) }
-emit_kxnorq_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kxnorq_k_k_k(dst, src, src2)) }
+emit_kxnorq_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kxnorq_k_k_k(dst, src, src2)) }
 inst_kxnord_k_k_k                   :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KXNORD, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2132) }
-emit_kxnord_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kxnord_k_k_k(dst, src, src2)) }
+emit_kxnord_k_k_k                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kxnord_k_k_k(dst, src, src2)) }
 inst_kxorw_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KXORW, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2133) }
-emit_kxorw_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kxorw_k_k_k(dst, src, src2)) }
+emit_kxorw_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kxorw_k_k_k(dst, src, src2)) }
 inst_kxorb_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KXORB, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2134) }
-emit_kxorb_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kxorb_k_k_k(dst, src, src2)) }
+emit_kxorb_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kxorb_k_k_k(dst, src, src2)) }
 inst_kxorq_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KXORQ, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2135) }
-emit_kxorq_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kxorq_k_k_k(dst, src, src2)) }
+emit_kxorq_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kxorq_k_k_k(dst, src, src2)) }
 inst_kxord_k_k_k                    :: #force_inline proc "contextless" (dst: KREG, src: KREG, src2: KREG) -> Instruction { return with_hint(Instruction{ mnemonic = .KXORD, operand_count = 3, ops = {op_kreg(dst), op_kreg(src), op_kreg(src2), {}} }, 2136) }
-emit_kxord_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append(instructions, inst_kxord_k_k_k(dst, src, src2)) }
+emit_kxord_k_k_k                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: KREG, src: KREG, src2: KREG) { append_elem(instructions, inst_kxord_k_k_k(dst, src, src2)) }
 inst_fadd_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FADD, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2137) }
 inst_fadd_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FADD, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2138) }
 inst_fadd_st                        :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FADD, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2139) }
-emit_fadd_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fadd_m32(dst)) }
-emit_fadd_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fadd_m64(dst)) }
-emit_fadd_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fadd_st(dst)) }
+emit_fadd_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fadd_m32(dst)) }
+emit_fadd_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fadd_m64(dst)) }
+emit_fadd_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fadd_st(dst)) }
 inst_faddp_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FADDP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2141) }
 inst_faddp_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FADDP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2142) }
-emit_faddp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_faddp_st(dst)) }
-emit_faddp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_faddp_none()) }
+emit_faddp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_faddp_st(dst)) }
+emit_faddp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_faddp_none()) }
 inst_fiadd_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FIADD, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2143) }
 inst_fiadd_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FIADD, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2144) }
-emit_fiadd_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fiadd_m16(dst)) }
-emit_fiadd_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fiadd_m32(dst)) }
+emit_fiadd_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fiadd_m16(dst)) }
+emit_fiadd_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fiadd_m32(dst)) }
 inst_fsub_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FSUB, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2145) }
 inst_fsub_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FSUB, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2146) }
 inst_fsub_st                        :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FSUB, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2147) }
-emit_fsub_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fsub_m32(dst)) }
-emit_fsub_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fsub_m64(dst)) }
-emit_fsub_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fsub_st(dst)) }
+emit_fsub_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fsub_m32(dst)) }
+emit_fsub_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fsub_m64(dst)) }
+emit_fsub_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fsub_st(dst)) }
 inst_fsubp_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FSUBP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2149) }
 inst_fsubp_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FSUBP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2150) }
-emit_fsubp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fsubp_st(dst)) }
-emit_fsubp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fsubp_none()) }
+emit_fsubp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fsubp_st(dst)) }
+emit_fsubp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fsubp_none()) }
 inst_fisub_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FISUB, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2151) }
 inst_fisub_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FISUB, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2152) }
-emit_fisub_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fisub_m16(dst)) }
-emit_fisub_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fisub_m32(dst)) }
+emit_fisub_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fisub_m16(dst)) }
+emit_fisub_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fisub_m32(dst)) }
 inst_fsubr_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FSUBR, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2153) }
 inst_fsubr_m64                      :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FSUBR, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2154) }
 inst_fsubr_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FSUBR, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2155) }
-emit_fsubr_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fsubr_m32(dst)) }
-emit_fsubr_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fsubr_m64(dst)) }
-emit_fsubr_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fsubr_st(dst)) }
+emit_fsubr_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fsubr_m32(dst)) }
+emit_fsubr_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fsubr_m64(dst)) }
+emit_fsubr_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fsubr_st(dst)) }
 inst_fsubrp_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FSUBRP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2157) }
 inst_fsubrp_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FSUBRP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2158) }
-emit_fsubrp_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fsubrp_st(dst)) }
-emit_fsubrp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fsubrp_none()) }
+emit_fsubrp_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fsubrp_st(dst)) }
+emit_fsubrp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fsubrp_none()) }
 inst_fisubr_m16                     :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FISUBR, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2159) }
 inst_fisubr_m32                     :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FISUBR, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2160) }
-emit_fisubr_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fisubr_m16(dst)) }
-emit_fisubr_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fisubr_m32(dst)) }
+emit_fisubr_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fisubr_m16(dst)) }
+emit_fisubr_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fisubr_m32(dst)) }
 inst_fmul_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FMUL, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2161) }
 inst_fmul_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FMUL, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2162) }
 inst_fmul_st                        :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FMUL, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2163) }
-emit_fmul_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fmul_m32(dst)) }
-emit_fmul_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fmul_m64(dst)) }
-emit_fmul_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fmul_st(dst)) }
+emit_fmul_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fmul_m32(dst)) }
+emit_fmul_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fmul_m64(dst)) }
+emit_fmul_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fmul_st(dst)) }
 inst_fmulp_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FMULP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2165) }
 inst_fmulp_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FMULP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2166) }
-emit_fmulp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fmulp_st(dst)) }
-emit_fmulp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fmulp_none()) }
+emit_fmulp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fmulp_st(dst)) }
+emit_fmulp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fmulp_none()) }
 inst_fimul_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FIMUL, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2167) }
 inst_fimul_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FIMUL, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2168) }
-emit_fimul_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fimul_m16(dst)) }
-emit_fimul_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fimul_m32(dst)) }
+emit_fimul_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fimul_m16(dst)) }
+emit_fimul_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fimul_m32(dst)) }
 inst_fdiv_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FDIV, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2169) }
 inst_fdiv_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FDIV, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2170) }
 inst_fdiv_st                        :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FDIV, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2171) }
-emit_fdiv_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fdiv_m32(dst)) }
-emit_fdiv_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fdiv_m64(dst)) }
-emit_fdiv_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fdiv_st(dst)) }
+emit_fdiv_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fdiv_m32(dst)) }
+emit_fdiv_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fdiv_m64(dst)) }
+emit_fdiv_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fdiv_st(dst)) }
 inst_fdivp_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FDIVP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2173) }
 inst_fdivp_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FDIVP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2174) }
-emit_fdivp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fdivp_st(dst)) }
-emit_fdivp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fdivp_none()) }
+emit_fdivp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fdivp_st(dst)) }
+emit_fdivp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fdivp_none()) }
 inst_fidiv_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FIDIV, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2175) }
 inst_fidiv_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FIDIV, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2176) }
-emit_fidiv_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fidiv_m16(dst)) }
-emit_fidiv_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fidiv_m32(dst)) }
+emit_fidiv_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fidiv_m16(dst)) }
+emit_fidiv_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fidiv_m32(dst)) }
 inst_fdivr_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FDIVR, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2177) }
 inst_fdivr_m64                      :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FDIVR, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2178) }
 inst_fdivr_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FDIVR, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2179) }
-emit_fdivr_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fdivr_m32(dst)) }
-emit_fdivr_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fdivr_m64(dst)) }
-emit_fdivr_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fdivr_st(dst)) }
+emit_fdivr_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fdivr_m32(dst)) }
+emit_fdivr_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fdivr_m64(dst)) }
+emit_fdivr_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fdivr_st(dst)) }
 inst_fdivrp_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FDIVRP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2181) }
 inst_fdivrp_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FDIVRP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2182) }
-emit_fdivrp_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fdivrp_st(dst)) }
-emit_fdivrp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fdivrp_none()) }
+emit_fdivrp_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fdivrp_st(dst)) }
+emit_fdivrp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fdivrp_none()) }
 inst_fidivr_m16                     :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FIDIVR, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2183) }
 inst_fidivr_m32                     :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FIDIVR, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2184) }
-emit_fidivr_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fidivr_m16(dst)) }
-emit_fidivr_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fidivr_m32(dst)) }
+emit_fidivr_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fidivr_m16(dst)) }
+emit_fidivr_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fidivr_m32(dst)) }
 inst_fsqrt_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FSQRT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2185) }
-emit_fsqrt_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fsqrt_none()) }
+emit_fsqrt_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fsqrt_none()) }
 inst_fabs_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FABS, operand_count = 0, ops = {{}, {}, {}, {}} }, 2186) }
-emit_fabs_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fabs_none()) }
+emit_fabs_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fabs_none()) }
 inst_fchs_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FCHS, operand_count = 0, ops = {{}, {}, {}, {}} }, 2187) }
-emit_fchs_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fchs_none()) }
+emit_fchs_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fchs_none()) }
 inst_fprem_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FPREM, operand_count = 0, ops = {{}, {}, {}, {}} }, 2188) }
-emit_fprem_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fprem_none()) }
+emit_fprem_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fprem_none()) }
 inst_fprem1_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FPREM1, operand_count = 0, ops = {{}, {}, {}, {}} }, 2189) }
-emit_fprem1_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fprem1_none()) }
+emit_fprem1_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fprem1_none()) }
 inst_frndint_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FRNDINT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2190) }
-emit_frndint_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_frndint_none()) }
+emit_frndint_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_frndint_none()) }
 inst_fscale_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FSCALE, operand_count = 0, ops = {{}, {}, {}, {}} }, 2191) }
-emit_fscale_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fscale_none()) }
+emit_fscale_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fscale_none()) }
 inst_fxtract_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FXTRACT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2192) }
-emit_fxtract_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fxtract_none()) }
+emit_fxtract_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fxtract_none()) }
 inst_fxam_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FXAM, operand_count = 0, ops = {{}, {}, {}, {}} }, 2193) }
-emit_fxam_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fxam_none()) }
+emit_fxam_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fxam_none()) }
 inst_fld_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FLD, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2194) }
 inst_fld_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FLD, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2195) }
 inst_fld_m80                        :: #force_inline proc "contextless" (dst: Mem80) -> Instruction { return with_hint(Instruction{ mnemonic = .FLD, operand_count = 1, ops = {op_mem(dst.mem, 10), {}, {}, {}} }, 2196) }
 inst_fld_st                         :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FLD, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2197) }
-emit_fld_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fld_m32(dst)) }
-emit_fld_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fld_m64(dst)) }
-emit_fld_m80                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem80) { append(instructions, inst_fld_m80(dst)) }
-emit_fld_st                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fld_st(dst)) }
+emit_fld_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fld_m32(dst)) }
+emit_fld_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fld_m64(dst)) }
+emit_fld_m80                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem80) { append_elem(instructions, inst_fld_m80(dst)) }
+emit_fld_st                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fld_st(dst)) }
 inst_fild_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FILD, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2198) }
 inst_fild_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FILD, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2199) }
 inst_fild_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FILD, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2200) }
-emit_fild_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fild_m16(dst)) }
-emit_fild_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fild_m32(dst)) }
-emit_fild_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fild_m64(dst)) }
+emit_fild_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fild_m16(dst)) }
+emit_fild_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fild_m32(dst)) }
+emit_fild_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fild_m64(dst)) }
 inst_fbld_m80                       :: #force_inline proc "contextless" (dst: Mem80) -> Instruction { return with_hint(Instruction{ mnemonic = .FBLD, operand_count = 1, ops = {op_mem(dst.mem, 10), {}, {}, {}} }, 2201) }
-emit_fbld_m80                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem80) { append(instructions, inst_fbld_m80(dst)) }
+emit_fbld_m80                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem80) { append_elem(instructions, inst_fbld_m80(dst)) }
 inst_fst_m32                        :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FST, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2202) }
 inst_fst_m64                        :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FST, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2203) }
 inst_fst_st                         :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FST, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2204) }
-emit_fst_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fst_m32(dst)) }
-emit_fst_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fst_m64(dst)) }
-emit_fst_st                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fst_st(dst)) }
+emit_fst_m32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fst_m32(dst)) }
+emit_fst_m64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fst_m64(dst)) }
+emit_fst_st                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fst_st(dst)) }
 inst_fstp_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FSTP, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2205) }
 inst_fstp_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FSTP, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2206) }
 inst_fstp_m80                       :: #force_inline proc "contextless" (dst: Mem80) -> Instruction { return with_hint(Instruction{ mnemonic = .FSTP, operand_count = 1, ops = {op_mem(dst.mem, 10), {}, {}, {}} }, 2207) }
 inst_fstp_st                        :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FSTP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2208) }
-emit_fstp_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fstp_m32(dst)) }
-emit_fstp_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fstp_m64(dst)) }
-emit_fstp_m80                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem80) { append(instructions, inst_fstp_m80(dst)) }
-emit_fstp_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fstp_st(dst)) }
+emit_fstp_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fstp_m32(dst)) }
+emit_fstp_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fstp_m64(dst)) }
+emit_fstp_m80                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem80) { append_elem(instructions, inst_fstp_m80(dst)) }
+emit_fstp_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fstp_st(dst)) }
 inst_fist_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FIST, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2209) }
 inst_fist_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FIST, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2210) }
-emit_fist_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fist_m16(dst)) }
-emit_fist_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fist_m32(dst)) }
+emit_fist_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fist_m16(dst)) }
+emit_fist_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fist_m32(dst)) }
 inst_fistp_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FISTP, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2211) }
 inst_fistp_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FISTP, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2212) }
 inst_fistp_m64                      :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FISTP, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2213) }
-emit_fistp_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fistp_m16(dst)) }
-emit_fistp_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fistp_m32(dst)) }
-emit_fistp_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fistp_m64(dst)) }
+emit_fistp_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fistp_m16(dst)) }
+emit_fistp_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fistp_m32(dst)) }
+emit_fistp_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fistp_m64(dst)) }
 inst_fisttp_m16                     :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FISTTP, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2214) }
 inst_fisttp_m32                     :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FISTTP, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2215) }
 inst_fisttp_m64                     :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FISTTP, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2216) }
-emit_fisttp_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fisttp_m16(dst)) }
-emit_fisttp_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fisttp_m32(dst)) }
-emit_fisttp_m64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fisttp_m64(dst)) }
+emit_fisttp_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fisttp_m16(dst)) }
+emit_fisttp_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fisttp_m32(dst)) }
+emit_fisttp_m64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fisttp_m64(dst)) }
 inst_fbstp_m80                      :: #force_inline proc "contextless" (dst: Mem80) -> Instruction { return with_hint(Instruction{ mnemonic = .FBSTP, operand_count = 1, ops = {op_mem(dst.mem, 10), {}, {}, {}} }, 2217) }
-emit_fbstp_m80                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem80) { append(instructions, inst_fbstp_m80(dst)) }
+emit_fbstp_m80                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem80) { append_elem(instructions, inst_fbstp_m80(dst)) }
 inst_fxch_st                        :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FXCH, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2218) }
 inst_fxch_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FXCH, operand_count = 0, ops = {{}, {}, {}, {}} }, 2219) }
-emit_fxch_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fxch_st(dst)) }
-emit_fxch_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fxch_none()) }
+emit_fxch_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fxch_st(dst)) }
+emit_fxch_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fxch_none()) }
 inst_fcmovb_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCMOVB, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2220) }
-emit_fcmovb_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcmovb_st(dst)) }
+emit_fcmovb_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcmovb_st(dst)) }
 inst_fcmove_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCMOVE, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2221) }
-emit_fcmove_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcmove_st(dst)) }
+emit_fcmove_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcmove_st(dst)) }
 inst_fcmovbe_st                     :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCMOVBE, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2222) }
-emit_fcmovbe_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcmovbe_st(dst)) }
+emit_fcmovbe_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcmovbe_st(dst)) }
 inst_fcmovu_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCMOVU, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2223) }
-emit_fcmovu_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcmovu_st(dst)) }
+emit_fcmovu_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcmovu_st(dst)) }
 inst_fcmovnb_st                     :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCMOVNB, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2224) }
-emit_fcmovnb_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcmovnb_st(dst)) }
+emit_fcmovnb_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcmovnb_st(dst)) }
 inst_fcmovne_st                     :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCMOVNE, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2225) }
-emit_fcmovne_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcmovne_st(dst)) }
+emit_fcmovne_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcmovne_st(dst)) }
 inst_fcmovnbe_st                    :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCMOVNBE, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2226) }
-emit_fcmovnbe_st                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcmovnbe_st(dst)) }
+emit_fcmovnbe_st                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcmovnbe_st(dst)) }
 inst_fcmovnu_st                     :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCMOVNU, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2227) }
-emit_fcmovnu_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcmovnu_st(dst)) }
+emit_fcmovnu_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcmovnu_st(dst)) }
 inst_fcom_m32                       :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FCOM, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2228) }
 inst_fcom_m64                       :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FCOM, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2229) }
 inst_fcom_st                        :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCOM, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2230) }
 inst_fcom_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FCOM, operand_count = 0, ops = {{}, {}, {}, {}} }, 2231) }
-emit_fcom_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fcom_m32(dst)) }
-emit_fcom_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fcom_m64(dst)) }
-emit_fcom_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcom_st(dst)) }
-emit_fcom_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fcom_none()) }
+emit_fcom_m32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fcom_m32(dst)) }
+emit_fcom_m64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fcom_m64(dst)) }
+emit_fcom_st                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcom_st(dst)) }
+emit_fcom_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fcom_none()) }
 inst_fcomp_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FCOMP, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2232) }
 inst_fcomp_m64                      :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .FCOMP, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2233) }
 inst_fcomp_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCOMP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2234) }
 inst_fcomp_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FCOMP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2235) }
-emit_fcomp_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_fcomp_m32(dst)) }
-emit_fcomp_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_fcomp_m64(dst)) }
-emit_fcomp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcomp_st(dst)) }
-emit_fcomp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fcomp_none()) }
+emit_fcomp_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_fcomp_m32(dst)) }
+emit_fcomp_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_fcomp_m64(dst)) }
+emit_fcomp_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcomp_st(dst)) }
+emit_fcomp_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fcomp_none()) }
 inst_fcompp_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FCOMPP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2236) }
-emit_fcompp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fcompp_none()) }
+emit_fcompp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fcompp_none()) }
 inst_ficom_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FICOM, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2237) }
 inst_ficom_m32                      :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FICOM, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2238) }
-emit_ficom_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_ficom_m16(dst)) }
-emit_ficom_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_ficom_m32(dst)) }
+emit_ficom_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_ficom_m16(dst)) }
+emit_ficom_m32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_ficom_m32(dst)) }
 inst_ficomp_m16                     :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FICOMP, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2239) }
 inst_ficomp_m32                     :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .FICOMP, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2240) }
-emit_ficomp_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_ficomp_m16(dst)) }
-emit_ficomp_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_ficomp_m32(dst)) }
+emit_ficomp_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_ficomp_m16(dst)) }
+emit_ficomp_m32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_ficomp_m32(dst)) }
 inst_fcomi_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCOMI, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2241) }
-emit_fcomi_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcomi_st(dst)) }
+emit_fcomi_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcomi_st(dst)) }
 inst_fcomip_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FCOMIP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2242) }
-emit_fcomip_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fcomip_st(dst)) }
+emit_fcomip_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fcomip_st(dst)) }
 inst_fucomi_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FUCOMI, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2243) }
-emit_fucomi_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fucomi_st(dst)) }
+emit_fucomi_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fucomi_st(dst)) }
 inst_fucomip_st                     :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FUCOMIP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2244) }
-emit_fucomip_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fucomip_st(dst)) }
+emit_fucomip_st                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fucomip_st(dst)) }
 inst_fucom_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FUCOM, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2245) }
 inst_fucom_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FUCOM, operand_count = 0, ops = {{}, {}, {}, {}} }, 2246) }
-emit_fucom_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fucom_st(dst)) }
-emit_fucom_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fucom_none()) }
+emit_fucom_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fucom_st(dst)) }
+emit_fucom_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fucom_none()) }
 inst_fucomp_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FUCOMP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2247) }
 inst_fucomp_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FUCOMP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2248) }
-emit_fucomp_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_fucomp_st(dst)) }
-emit_fucomp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fucomp_none()) }
+emit_fucomp_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_fucomp_st(dst)) }
+emit_fucomp_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fucomp_none()) }
 inst_fucompp_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FUCOMPP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2249) }
-emit_fucompp_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fucompp_none()) }
+emit_fucompp_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fucompp_none()) }
 inst_ftst_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FTST, operand_count = 0, ops = {{}, {}, {}, {}} }, 2250) }
-emit_ftst_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_ftst_none()) }
+emit_ftst_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_ftst_none()) }
 inst_fldz_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FLDZ, operand_count = 0, ops = {{}, {}, {}, {}} }, 2251) }
-emit_fldz_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fldz_none()) }
+emit_fldz_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fldz_none()) }
 inst_fld1_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FLD1, operand_count = 0, ops = {{}, {}, {}, {}} }, 2252) }
-emit_fld1_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fld1_none()) }
+emit_fld1_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fld1_none()) }
 inst_fldpi_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FLDPI, operand_count = 0, ops = {{}, {}, {}, {}} }, 2253) }
-emit_fldpi_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fldpi_none()) }
+emit_fldpi_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fldpi_none()) }
 inst_fldl2t_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FLDL2T, operand_count = 0, ops = {{}, {}, {}, {}} }, 2254) }
-emit_fldl2t_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fldl2t_none()) }
+emit_fldl2t_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fldl2t_none()) }
 inst_fldl2e_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FLDL2E, operand_count = 0, ops = {{}, {}, {}, {}} }, 2255) }
-emit_fldl2e_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fldl2e_none()) }
+emit_fldl2e_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fldl2e_none()) }
 inst_fldlg2_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FLDLG2, operand_count = 0, ops = {{}, {}, {}, {}} }, 2256) }
-emit_fldlg2_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fldlg2_none()) }
+emit_fldlg2_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fldlg2_none()) }
 inst_fldln2_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FLDLN2, operand_count = 0, ops = {{}, {}, {}, {}} }, 2257) }
-emit_fldln2_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fldln2_none()) }
+emit_fldln2_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fldln2_none()) }
 inst_fsin_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FSIN, operand_count = 0, ops = {{}, {}, {}, {}} }, 2258) }
-emit_fsin_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fsin_none()) }
+emit_fsin_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fsin_none()) }
 inst_fcos_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FCOS, operand_count = 0, ops = {{}, {}, {}, {}} }, 2259) }
-emit_fcos_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fcos_none()) }
+emit_fcos_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fcos_none()) }
 inst_fsincos_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FSINCOS, operand_count = 0, ops = {{}, {}, {}, {}} }, 2260) }
-emit_fsincos_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fsincos_none()) }
+emit_fsincos_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fsincos_none()) }
 inst_fptan_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FPTAN, operand_count = 0, ops = {{}, {}, {}, {}} }, 2261) }
-emit_fptan_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fptan_none()) }
+emit_fptan_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fptan_none()) }
 inst_fpatan_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FPATAN, operand_count = 0, ops = {{}, {}, {}, {}} }, 2262) }
-emit_fpatan_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fpatan_none()) }
+emit_fpatan_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fpatan_none()) }
 inst_f2xm1_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .F2XM1, operand_count = 0, ops = {{}, {}, {}, {}} }, 2263) }
-emit_f2xm1_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_f2xm1_none()) }
+emit_f2xm1_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_f2xm1_none()) }
 inst_fyl2x_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FYL2X, operand_count = 0, ops = {{}, {}, {}, {}} }, 2264) }
-emit_fyl2x_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fyl2x_none()) }
+emit_fyl2x_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fyl2x_none()) }
 inst_fyl2xp1_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FYL2XP1, operand_count = 0, ops = {{}, {}, {}, {}} }, 2265) }
-emit_fyl2xp1_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fyl2xp1_none()) }
+emit_fyl2xp1_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fyl2xp1_none()) }
 inst_finit_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FINIT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2266) }
-emit_finit_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_finit_none()) }
+emit_finit_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_finit_none()) }
 inst_fninit_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FNINIT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2267) }
-emit_fninit_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fninit_none()) }
+emit_fninit_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fninit_none()) }
 inst_fincstp_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FINCSTP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2268) }
-emit_fincstp_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fincstp_none()) }
+emit_fincstp_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fincstp_none()) }
 inst_fdecstp_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FDECSTP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2269) }
-emit_fdecstp_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fdecstp_none()) }
+emit_fdecstp_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fdecstp_none()) }
 inst_ffree_st                       :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FFREE, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2270) }
-emit_ffree_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_ffree_st(dst)) }
+emit_ffree_st                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_ffree_st(dst)) }
 inst_ffreep_st                      :: #force_inline proc "contextless" (dst: ST) -> Instruction { return with_hint(Instruction{ mnemonic = .FFREEP, operand_count = 1, ops = {op_st(dst), {}, {}, {}} }, 2271) }
-emit_ffreep_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append(instructions, inst_ffreep_st(dst)) }
+emit_ffreep_st                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: ST) { append_elem(instructions, inst_ffreep_st(dst)) }
 inst_fnop_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FNOP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2272) }
-emit_fnop_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fnop_none()) }
+emit_fnop_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fnop_none()) }
 inst_fwait_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FWAIT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2273) }
-emit_fwait_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fwait_none()) }
+emit_fwait_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fwait_none()) }
 inst_fclex_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FCLEX, operand_count = 0, ops = {{}, {}, {}, {}} }, 2274) }
-emit_fclex_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fclex_none()) }
+emit_fclex_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fclex_none()) }
 inst_fnclex_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .FNCLEX, operand_count = 0, ops = {{}, {}, {}, {}} }, 2275) }
-emit_fnclex_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_fnclex_none()) }
+emit_fnclex_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_fnclex_none()) }
 inst_fstcw_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FSTCW, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2276) }
-emit_fstcw_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fstcw_m16(dst)) }
+emit_fstcw_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fstcw_m16(dst)) }
 inst_fnstcw_m16                     :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FNSTCW, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2277) }
-emit_fnstcw_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fnstcw_m16(dst)) }
+emit_fnstcw_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fnstcw_m16(dst)) }
 inst_fldcw_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FLDCW, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2278) }
-emit_fldcw_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fldcw_m16(dst)) }
+emit_fldcw_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fldcw_m16(dst)) }
 inst_fstenv_m                       :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .FSTENV, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2279) }
-emit_fstenv_m                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_fstenv_m(dst)) }
+emit_fstenv_m                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_fstenv_m(dst)) }
 inst_fnstenv_m                      :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .FNSTENV, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2280) }
-emit_fnstenv_m                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_fnstenv_m(dst)) }
+emit_fnstenv_m                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_fnstenv_m(dst)) }
 inst_fldenv_m                       :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .FLDENV, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2281) }
-emit_fldenv_m                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_fldenv_m(dst)) }
+emit_fldenv_m                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_fldenv_m(dst)) }
 inst_fsave_m                        :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .FSAVE, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2282) }
-emit_fsave_m                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_fsave_m(dst)) }
+emit_fsave_m                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_fsave_m(dst)) }
 inst_fnsave_m                       :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .FNSAVE, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2283) }
-emit_fnsave_m                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_fnsave_m(dst)) }
+emit_fnsave_m                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_fnsave_m(dst)) }
 inst_frstor_m                       :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .FRSTOR, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2284) }
-emit_frstor_m                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_frstor_m(dst)) }
+emit_frstor_m                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_frstor_m(dst)) }
 inst_fstsw_m16                      :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FSTSW, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2285) }
-emit_fstsw_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fstsw_m16(dst)) }
+emit_fstsw_m16                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fstsw_m16(dst)) }
 inst_fnstsw_m16                     :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .FNSTSW, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2287) }
-emit_fnstsw_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_fnstsw_m16(dst)) }
+emit_fnstsw_m16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_fnstsw_m16(dst)) }
 inst_fxsave_m512                    :: #force_inline proc "contextless" (dst: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .FXSAVE, operand_count = 1, ops = {op_mem(dst.mem, 64), {}, {}, {}} }, 2289) }
-emit_fxsave_m512                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512) { append(instructions, inst_fxsave_m512(dst)) }
+emit_fxsave_m512                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512) { append_elem(instructions, inst_fxsave_m512(dst)) }
 inst_fxsave64_m512                  :: #force_inline proc "contextless" (dst: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .FXSAVE64, operand_count = 1, ops = {op_mem(dst.mem, 64), {}, {}, {}} }, 2290) }
-emit_fxsave64_m512                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512) { append(instructions, inst_fxsave64_m512(dst)) }
+emit_fxsave64_m512                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512) { append_elem(instructions, inst_fxsave64_m512(dst)) }
 inst_fxrstor_m512                   :: #force_inline proc "contextless" (dst: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .FXRSTOR, operand_count = 1, ops = {op_mem(dst.mem, 64), {}, {}, {}} }, 2291) }
-emit_fxrstor_m512                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512) { append(instructions, inst_fxrstor_m512(dst)) }
+emit_fxrstor_m512                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512) { append_elem(instructions, inst_fxrstor_m512(dst)) }
 inst_fxrstor64_m512                 :: #force_inline proc "contextless" (dst: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .FXRSTOR64, operand_count = 1, ops = {op_mem(dst.mem, 64), {}, {}, {}} }, 2292) }
-emit_fxrstor64_m512                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512) { append(instructions, inst_fxrstor64_m512(dst)) }
+emit_fxrstor64_m512                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem512) { append_elem(instructions, inst_fxrstor64_m512(dst)) }
 inst_lgdt_m                         :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .LGDT, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2293) }
-emit_lgdt_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_lgdt_m(dst)) }
+emit_lgdt_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_lgdt_m(dst)) }
 inst_sgdt_m                         :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .SGDT, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2295) }
-emit_sgdt_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_sgdt_m(dst)) }
+emit_sgdt_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_sgdt_m(dst)) }
 inst_lidt_m                         :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .LIDT, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2297) }
-emit_lidt_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_lidt_m(dst)) }
+emit_lidt_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_lidt_m(dst)) }
 inst_sidt_m                         :: #force_inline proc "contextless" (dst: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .SIDT, operand_count = 1, ops = {op_mem(dst, 0), {}, {}, {}} }, 2299) }
-emit_sidt_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append(instructions, inst_sidt_m(dst)) }
+emit_sidt_m                         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Memory) { append_elem(instructions, inst_sidt_m(dst)) }
 inst_lldt_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .LLDT, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2301) }
 inst_lldt_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .LLDT, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2301) }
-emit_lldt_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_lldt_r16(dst)) }
-emit_lldt_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_lldt_m16(dst)) }
+emit_lldt_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_lldt_r16(dst)) }
+emit_lldt_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_lldt_m16(dst)) }
 inst_sldt_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .SLDT, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2302) }
 inst_sldt_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .SLDT, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2302) }
 inst_sldt_r32                       :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SLDT, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2303) }
 inst_sldt_r64                       :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SLDT, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2304) }
-emit_sldt_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_sldt_r16(dst)) }
-emit_sldt_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_sldt_m16(dst)) }
-emit_sldt_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_sldt_r32(dst)) }
-emit_sldt_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_sldt_r64(dst)) }
+emit_sldt_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_sldt_r16(dst)) }
+emit_sldt_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_sldt_m16(dst)) }
+emit_sldt_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_sldt_r32(dst)) }
+emit_sldt_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_sldt_r64(dst)) }
 inst_ltr_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .LTR, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2305) }
 inst_ltr_m16                        :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .LTR, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2305) }
-emit_ltr_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_ltr_r16(dst)) }
-emit_ltr_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_ltr_m16(dst)) }
+emit_ltr_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_ltr_r16(dst)) }
+emit_ltr_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_ltr_m16(dst)) }
 inst_str_r16                        :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .STR, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2306) }
 inst_str_m16                        :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .STR, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2306) }
 inst_str_r32                        :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .STR, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2307) }
 inst_str_r64                        :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .STR, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2308) }
-emit_str_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_str_r16(dst)) }
-emit_str_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_str_m16(dst)) }
-emit_str_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_str_r32(dst)) }
-emit_str_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_str_r64(dst)) }
+emit_str_r16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_str_r16(dst)) }
+emit_str_m16                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_str_m16(dst)) }
+emit_str_r32                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_str_r32(dst)) }
+emit_str_r64                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_str_r64(dst)) }
 inst_lmsw_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .LMSW, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2309) }
 inst_lmsw_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .LMSW, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2309) }
-emit_lmsw_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_lmsw_r16(dst)) }
-emit_lmsw_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_lmsw_m16(dst)) }
+emit_lmsw_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_lmsw_r16(dst)) }
+emit_lmsw_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_lmsw_m16(dst)) }
 inst_smsw_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .SMSW, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2310) }
 inst_smsw_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .SMSW, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2310) }
 inst_smsw_r32                       :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .SMSW, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2311) }
 inst_smsw_r64                       :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .SMSW, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2312) }
-emit_smsw_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_smsw_r16(dst)) }
-emit_smsw_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_smsw_m16(dst)) }
-emit_smsw_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_smsw_r32(dst)) }
-emit_smsw_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_smsw_r64(dst)) }
+emit_smsw_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_smsw_r16(dst)) }
+emit_smsw_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_smsw_m16(dst)) }
+emit_smsw_r32                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_smsw_r32(dst)) }
+emit_smsw_r64                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_smsw_r64(dst)) }
 inst_clts_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CLTS, operand_count = 0, ops = {{}, {}, {}, {}} }, 2313) }
-emit_clts_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_clts_none()) }
+emit_clts_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_clts_none()) }
 inst_arpl_r16_r16                   :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .ARPL, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 2314) }
 inst_arpl_m16_r16                   :: #force_inline proc "contextless" (dst: Mem16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .ARPL, operand_count = 2, ops = {op_mem(dst.mem, 2), op_gpr16(src), {}, {}} }, 2314) }
-emit_arpl_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_arpl_r16_r16(dst, src)) }
-emit_arpl_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_arpl_m16_r16(dst, src)) }
+emit_arpl_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_arpl_r16_r16(dst, src)) }
+emit_arpl_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_arpl_m16_r16(dst, src)) }
 inst_lar_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .LAR, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 2315) }
 inst_lar_r16_m16                    :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .LAR, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 2315) }
 inst_lar_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .LAR, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 2316) }
 inst_lar_r32_m32                    :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .LAR, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 2316) }
 inst_lar_r64_r64                    :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .LAR, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 2317) }
 inst_lar_r64_m64                    :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .LAR, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 2317) }
-emit_lar_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_lar_r16_r16(dst, src)) }
-emit_lar_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_lar_r16_m16(dst, src)) }
-emit_lar_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_lar_r32_r32(dst, src)) }
-emit_lar_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_lar_r32_m32(dst, src)) }
-emit_lar_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_lar_r64_r64(dst, src)) }
-emit_lar_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_lar_r64_m64(dst, src)) }
+emit_lar_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_lar_r16_r16(dst, src)) }
+emit_lar_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_lar_r16_m16(dst, src)) }
+emit_lar_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_lar_r32_r32(dst, src)) }
+emit_lar_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_lar_r32_m32(dst, src)) }
+emit_lar_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_lar_r64_r64(dst, src)) }
+emit_lar_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_lar_r64_m64(dst, src)) }
 inst_lsl_r16_r16                    :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .LSL, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 2318) }
 inst_lsl_r16_m16                    :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .LSL, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 2318) }
 inst_lsl_r32_r32                    :: #force_inline proc "contextless" (dst: GPR32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .LSL, operand_count = 2, ops = {op_gpr32(dst), op_gpr32(src), {}, {}} }, 2319) }
 inst_lsl_r32_m32                    :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .LSL, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 2319) }
 inst_lsl_r64_r64                    :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .LSL, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 2320) }
 inst_lsl_r64_m64                    :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .LSL, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 2320) }
-emit_lsl_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_lsl_r16_r16(dst, src)) }
-emit_lsl_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_lsl_r16_m16(dst, src)) }
-emit_lsl_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_lsl_r32_r32(dst, src)) }
-emit_lsl_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_lsl_r32_m32(dst, src)) }
-emit_lsl_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_lsl_r64_r64(dst, src)) }
-emit_lsl_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_lsl_r64_m64(dst, src)) }
+emit_lsl_r16_r16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_lsl_r16_r16(dst, src)) }
+emit_lsl_r16_m16                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_lsl_r16_m16(dst, src)) }
+emit_lsl_r32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_lsl_r32_r32(dst, src)) }
+emit_lsl_r32_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_lsl_r32_m32(dst, src)) }
+emit_lsl_r64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_lsl_r64_r64(dst, src)) }
+emit_lsl_r64_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_lsl_r64_m64(dst, src)) }
 inst_verr_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .VERR, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2321) }
 inst_verr_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .VERR, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2321) }
-emit_verr_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_verr_r16(dst)) }
-emit_verr_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_verr_m16(dst)) }
+emit_verr_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_verr_r16(dst)) }
+emit_verr_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_verr_m16(dst)) }
 inst_verw_r16                       :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .VERW, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2322) }
 inst_verw_m16                       :: #force_inline proc "contextless" (dst: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .VERW, operand_count = 1, ops = {op_mem(dst.mem, 2), {}, {}, {}} }, 2322) }
-emit_verw_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_verw_r16(dst)) }
-emit_verw_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append(instructions, inst_verw_m16(dst)) }
+emit_verw_r16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_verw_r16(dst)) }
+emit_verw_m16                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16) { append_elem(instructions, inst_verw_m16(dst)) }
 inst_invd_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .INVD, operand_count = 0, ops = {{}, {}, {}, {}} }, 2323) }
-emit_invd_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_invd_none()) }
+emit_invd_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_invd_none()) }
 inst_wbinvd_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .WBINVD, operand_count = 0, ops = {{}, {}, {}, {}} }, 2324) }
-emit_wbinvd_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wbinvd_none()) }
+emit_wbinvd_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wbinvd_none()) }
 inst_invlpg_m8                      :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .INVLPG, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2325) }
-emit_invlpg_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_invlpg_m8(dst)) }
+emit_invlpg_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_invlpg_m8(dst)) }
 inst_invpcid_r32_m128               :: #force_inline proc "contextless" (dst: GPR32, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .INVPCID, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 16), {}, {}} }, 2326) }
 inst_invpcid_r64_m128               :: #force_inline proc "contextless" (dst: GPR64, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .INVPCID, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 16), {}, {}} }, 2327) }
-emit_invpcid_r32_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem128) { append(instructions, inst_invpcid_r32_m128(dst, src)) }
-emit_invpcid_r64_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem128) { append(instructions, inst_invpcid_r64_m128(dst, src)) }
+emit_invpcid_r32_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem128) { append_elem(instructions, inst_invpcid_r32_m128(dst, src)) }
+emit_invpcid_r64_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem128) { append_elem(instructions, inst_invpcid_r64_m128(dst, src)) }
 inst_rsm_none                       :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RSM, operand_count = 0, ops = {{}, {}, {}, {}} }, 2328) }
-emit_rsm_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rsm_none()) }
+emit_rsm_none                       :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rsm_none()) }
 inst_rdmsr_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RDMSR, operand_count = 0, ops = {{}, {}, {}, {}} }, 2329) }
-emit_rdmsr_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rdmsr_none()) }
+emit_rdmsr_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rdmsr_none()) }
 inst_wrmsr_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .WRMSR, operand_count = 0, ops = {{}, {}, {}, {}} }, 2330) }
-emit_wrmsr_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wrmsr_none()) }
+emit_wrmsr_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wrmsr_none()) }
 inst_vmcall_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMCALL, operand_count = 0, ops = {{}, {}, {}, {}} }, 2331) }
-emit_vmcall_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmcall_none()) }
+emit_vmcall_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmcall_none()) }
 inst_vmlaunch_none                  :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMLAUNCH, operand_count = 0, ops = {{}, {}, {}, {}} }, 2332) }
-emit_vmlaunch_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmlaunch_none()) }
+emit_vmlaunch_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmlaunch_none()) }
 inst_vmresume_none                  :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMRESUME, operand_count = 0, ops = {{}, {}, {}, {}} }, 2333) }
-emit_vmresume_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmresume_none()) }
+emit_vmresume_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmresume_none()) }
 inst_vmxoff_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMXOFF, operand_count = 0, ops = {{}, {}, {}, {}} }, 2334) }
-emit_vmxoff_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmxoff_none()) }
+emit_vmxoff_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmxoff_none()) }
 inst_vmxon_m64                      :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMXON, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2335) }
-emit_vmxon_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_vmxon_m64(dst)) }
+emit_vmxon_m64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_vmxon_m64(dst)) }
 inst_vmclear_m64                    :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMCLEAR, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2336) }
-emit_vmclear_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_vmclear_m64(dst)) }
+emit_vmclear_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_vmclear_m64(dst)) }
 inst_vmptrld_m64                    :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMPTRLD, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2337) }
-emit_vmptrld_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_vmptrld_m64(dst)) }
+emit_vmptrld_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_vmptrld_m64(dst)) }
 inst_vmptrst_m64                    :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMPTRST, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2338) }
-emit_vmptrst_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_vmptrst_m64(dst)) }
+emit_vmptrst_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_vmptrst_m64(dst)) }
 inst_vmread_r64_r64                 :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMREAD, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 2339) }
 inst_vmread_m64_r64                 :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMREAD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2339) }
-emit_vmread_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_vmread_r64_r64(dst, src)) }
-emit_vmread_m64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_vmread_m64_r64(dst, src)) }
+emit_vmread_r64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_vmread_r64_r64(dst, src)) }
+emit_vmread_m64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_vmread_m64_r64(dst, src)) }
 inst_vmwrite_r64_r64                :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMWRITE, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 2340) }
 inst_vmwrite_r64_m64                :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .VMWRITE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 2340) }
-emit_vmwrite_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_vmwrite_r64_r64(dst, src)) }
-emit_vmwrite_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_vmwrite_r64_m64(dst, src)) }
+emit_vmwrite_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_vmwrite_r64_r64(dst, src)) }
+emit_vmwrite_r64_m64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_vmwrite_r64_m64(dst, src)) }
 inst_vmfunc_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMFUNC, operand_count = 0, ops = {{}, {}, {}, {}} }, 2341) }
-emit_vmfunc_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmfunc_none()) }
+emit_vmfunc_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmfunc_none()) }
 inst_invept_r64_m128                :: #force_inline proc "contextless" (dst: GPR64, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .INVEPT, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 16), {}, {}} }, 2342) }
-emit_invept_r64_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem128) { append(instructions, inst_invept_r64_m128(dst, src)) }
+emit_invept_r64_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem128) { append_elem(instructions, inst_invept_r64_m128(dst, src)) }
 inst_invvpid_r64_m128               :: #force_inline proc "contextless" (dst: GPR64, src: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .INVVPID, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 16), {}, {}} }, 2343) }
-emit_invvpid_r64_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem128) { append(instructions, inst_invvpid_r64_m128(dst, src)) }
+emit_invvpid_r64_m128               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem128) { append_elem(instructions, inst_invvpid_r64_m128(dst, src)) }
 inst_encls_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .ENCLS, operand_count = 0, ops = {{}, {}, {}, {}} }, 2344) }
-emit_encls_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_encls_none()) }
+emit_encls_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_encls_none()) }
 inst_enclu_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .ENCLU, operand_count = 0, ops = {{}, {}, {}, {}} }, 2345) }
-emit_enclu_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_enclu_none()) }
+emit_enclu_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_enclu_none()) }
 inst_enclv_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .ENCLV, operand_count = 0, ops = {{}, {}, {}, {}} }, 2346) }
-emit_enclv_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_enclv_none()) }
+emit_enclv_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_enclv_none()) }
 inst_rdpkru_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RDPKRU, operand_count = 0, ops = {{}, {}, {}, {}} }, 2347) }
-emit_rdpkru_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rdpkru_none()) }
+emit_rdpkru_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rdpkru_none()) }
 inst_wrpkru_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .WRPKRU, operand_count = 0, ops = {{}, {}, {}, {}} }, 2348) }
-emit_wrpkru_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wrpkru_none()) }
+emit_wrpkru_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wrpkru_none()) }
 inst_incsspd_r32                    :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .INCSSPD, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2349) }
-emit_incsspd_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_incsspd_r32(dst)) }
+emit_incsspd_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_incsspd_r32(dst)) }
 inst_incsspq_r64                    :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .INCSSPQ, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2350) }
-emit_incsspq_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_incsspq_r64(dst)) }
+emit_incsspq_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_incsspq_r64(dst)) }
 inst_rdsspd_r32                     :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .RDSSPD, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2351) }
-emit_rdsspd_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_rdsspd_r32(dst)) }
+emit_rdsspd_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_rdsspd_r32(dst)) }
 inst_rdsspq_r64                     :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .RDSSPQ, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2352) }
-emit_rdsspq_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rdsspq_r64(dst)) }
+emit_rdsspq_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rdsspq_r64(dst)) }
 inst_saveprevssp_none               :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SAVEPREVSSP, operand_count = 0, ops = {{}, {}, {}, {}} }, 2353) }
-emit_saveprevssp_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_saveprevssp_none()) }
+emit_saveprevssp_none               :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_saveprevssp_none()) }
 inst_rstorssp_m64                   :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .RSTORSSP, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2354) }
-emit_rstorssp_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_rstorssp_m64(dst)) }
+emit_rstorssp_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_rstorssp_m64(dst)) }
 inst_wrssd_m32_r32                  :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .WRSSD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2355) }
-emit_wrssd_m32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_wrssd_m32_r32(dst, src)) }
+emit_wrssd_m32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_wrssd_m32_r32(dst, src)) }
 inst_wrssq_m64_r64                  :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .WRSSQ, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2356) }
-emit_wrssq_m64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_wrssq_m64_r64(dst, src)) }
+emit_wrssq_m64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_wrssq_m64_r64(dst, src)) }
 inst_wrussd_m32_r32                 :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .WRUSSD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2357) }
-emit_wrussd_m32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_wrussd_m32_r32(dst, src)) }
+emit_wrussd_m32_r32                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_wrussd_m32_r32(dst, src)) }
 inst_wrussq_m64_r64                 :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .WRUSSQ, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2358) }
-emit_wrussq_m64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_wrussq_m64_r64(dst, src)) }
+emit_wrussq_m64_r64                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_wrussq_m64_r64(dst, src)) }
 inst_setssbsy_none                  :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SETSSBSY, operand_count = 0, ops = {{}, {}, {}, {}} }, 2359) }
-emit_setssbsy_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_setssbsy_none()) }
+emit_setssbsy_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_setssbsy_none()) }
 inst_clrssbsy_m64                   :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CLRSSBSY, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2360) }
-emit_clrssbsy_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_clrssbsy_m64(dst)) }
+emit_clrssbsy_m64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_clrssbsy_m64(dst)) }
 inst_endbr64_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .ENDBR64, operand_count = 0, ops = {{}, {}, {}, {}} }, 2361) }
-emit_endbr64_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_endbr64_none()) }
+emit_endbr64_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_endbr64_none()) }
 inst_endbr32_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .ENDBR32, operand_count = 0, ops = {{}, {}, {}, {}} }, 2362) }
-emit_endbr32_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_endbr32_none()) }
+emit_endbr32_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_endbr32_none()) }
 inst_xsave_m8                       :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XSAVE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2363) }
-emit_xsave_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xsave_m8(dst)) }
+emit_xsave_m8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xsave_m8(dst)) }
 inst_xsave64_m8                     :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XSAVE64, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2364) }
-emit_xsave64_m8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xsave64_m8(dst)) }
+emit_xsave64_m8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xsave64_m8(dst)) }
 inst_xrstor_m8                      :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XRSTOR, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2365) }
-emit_xrstor_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xrstor_m8(dst)) }
+emit_xrstor_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xrstor_m8(dst)) }
 inst_xrstor64_m8                    :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XRSTOR64, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2366) }
-emit_xrstor64_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xrstor64_m8(dst)) }
+emit_xrstor64_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xrstor64_m8(dst)) }
 inst_xsaveopt_m8                    :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XSAVEOPT, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2367) }
-emit_xsaveopt_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xsaveopt_m8(dst)) }
+emit_xsaveopt_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xsaveopt_m8(dst)) }
 inst_xsaveopt64_m8                  :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XSAVEOPT64, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2368) }
-emit_xsaveopt64_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xsaveopt64_m8(dst)) }
+emit_xsaveopt64_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xsaveopt64_m8(dst)) }
 inst_xsavec_m8                      :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XSAVEC, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2369) }
-emit_xsavec_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xsavec_m8(dst)) }
+emit_xsavec_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xsavec_m8(dst)) }
 inst_xsavec64_m8                    :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XSAVEC64, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2370) }
-emit_xsavec64_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xsavec64_m8(dst)) }
+emit_xsavec64_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xsavec64_m8(dst)) }
 inst_xsaves_m8                      :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XSAVES, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2371) }
-emit_xsaves_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xsaves_m8(dst)) }
+emit_xsaves_m8                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xsaves_m8(dst)) }
 inst_xsaves64_m8                    :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XSAVES64, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2372) }
-emit_xsaves64_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xsaves64_m8(dst)) }
+emit_xsaves64_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xsaves64_m8(dst)) }
 inst_xrstors_m8                     :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XRSTORS, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2373) }
-emit_xrstors_m8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xrstors_m8(dst)) }
+emit_xrstors_m8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xrstors_m8(dst)) }
 inst_xrstors64_m8                   :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .XRSTORS64, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2374) }
-emit_xrstors64_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_xrstors64_m8(dst)) }
+emit_xrstors64_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_xrstors64_m8(dst)) }
 inst_prefetcht0_m8                  :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .PREFETCHT0, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2375) }
-emit_prefetcht0_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_prefetcht0_m8(dst)) }
+emit_prefetcht0_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_prefetcht0_m8(dst)) }
 inst_prefetcht1_m8                  :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .PREFETCHT1, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2376) }
-emit_prefetcht1_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_prefetcht1_m8(dst)) }
+emit_prefetcht1_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_prefetcht1_m8(dst)) }
 inst_prefetcht2_m8                  :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .PREFETCHT2, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2377) }
-emit_prefetcht2_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_prefetcht2_m8(dst)) }
+emit_prefetcht2_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_prefetcht2_m8(dst)) }
 inst_prefetchnta_m8                 :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .PREFETCHNTA, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2378) }
-emit_prefetchnta_m8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_prefetchnta_m8(dst)) }
+emit_prefetchnta_m8                 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_prefetchnta_m8(dst)) }
 inst_prefetchw_m8                   :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .PREFETCHW, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2379) }
-emit_prefetchw_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_prefetchw_m8(dst)) }
+emit_prefetchw_m8                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_prefetchw_m8(dst)) }
 inst_clflushopt_m8                  :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .CLFLUSHOPT, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2380) }
-emit_clflushopt_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_clflushopt_m8(dst)) }
+emit_clflushopt_m8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_clflushopt_m8(dst)) }
 inst_clwb_m8                        :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .CLWB, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2381) }
-emit_clwb_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_clwb_m8(dst)) }
+emit_clwb_m8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_clwb_m8(dst)) }
 inst_cldemote_m8                    :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .CLDEMOTE, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2382) }
-emit_cldemote_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_cldemote_m8(dst)) }
+emit_cldemote_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_cldemote_m8(dst)) }
 inst_bswap_r32                      :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .BSWAP, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2383) }
 inst_bswap_r64                      :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .BSWAP, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2384) }
-emit_bswap_r32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_bswap_r32(dst)) }
-emit_bswap_r64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_bswap_r64(dst)) }
+emit_bswap_r32                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_bswap_r32(dst)) }
+emit_bswap_r64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_bswap_r64(dst)) }
 inst_cmpxchg_r8_r8                  :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPXCHG, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 2385) }
 inst_cmpxchg_m8_r8                  :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPXCHG, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 2385) }
 inst_cmpxchg_r16_r16                :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPXCHG, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 2386) }
@@ -7669,18 +7669,18 @@ inst_cmpxchg_r32_r32                :: #force_inline proc "contextless" (dst: GP
 inst_cmpxchg_m32_r32                :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPXCHG, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2387) }
 inst_cmpxchg_r64_r64                :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPXCHG, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 2388) }
 inst_cmpxchg_m64_r64                :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPXCHG, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2388) }
-emit_cmpxchg_r8_r8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_cmpxchg_r8_r8(dst, src)) }
-emit_cmpxchg_m8_r8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_cmpxchg_m8_r8(dst, src)) }
-emit_cmpxchg_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_cmpxchg_r16_r16(dst, src)) }
-emit_cmpxchg_m16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_cmpxchg_m16_r16(dst, src)) }
-emit_cmpxchg_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_cmpxchg_r32_r32(dst, src)) }
-emit_cmpxchg_m32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_cmpxchg_m32_r32(dst, src)) }
-emit_cmpxchg_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_cmpxchg_r64_r64(dst, src)) }
-emit_cmpxchg_m64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_cmpxchg_m64_r64(dst, src)) }
+emit_cmpxchg_r8_r8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_cmpxchg_r8_r8(dst, src)) }
+emit_cmpxchg_m8_r8                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_cmpxchg_m8_r8(dst, src)) }
+emit_cmpxchg_r16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_cmpxchg_r16_r16(dst, src)) }
+emit_cmpxchg_m16_r16                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_cmpxchg_m16_r16(dst, src)) }
+emit_cmpxchg_r32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_cmpxchg_r32_r32(dst, src)) }
+emit_cmpxchg_m32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_cmpxchg_m32_r32(dst, src)) }
+emit_cmpxchg_r64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_cmpxchg_r64_r64(dst, src)) }
+emit_cmpxchg_m64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_cmpxchg_m64_r64(dst, src)) }
 inst_cmpxchg8b_m64                  :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPXCHG8B, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2389) }
-emit_cmpxchg8b_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_cmpxchg8b_m64(dst)) }
+emit_cmpxchg8b_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_cmpxchg8b_m64(dst)) }
 inst_cmpxchg16b_m128                :: #force_inline proc "contextless" (dst: Mem128) -> Instruction { return with_hint(Instruction{ mnemonic = .CMPXCHG16B, operand_count = 1, ops = {op_mem(dst.mem, 16), {}, {}, {}} }, 2390) }
-emit_cmpxchg16b_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128) { append(instructions, inst_cmpxchg16b_m128(dst)) }
+emit_cmpxchg16b_m128                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem128) { append_elem(instructions, inst_cmpxchg16b_m128(dst)) }
 inst_xadd_r8_r8                     :: #force_inline proc "contextless" (dst: GPR8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .XADD, operand_count = 2, ops = {op_gpr8(dst), op_gpr8(src), {}, {}} }, 2391) }
 inst_xadd_m8_r8                     :: #force_inline proc "contextless" (dst: Mem8, src: GPR8) -> Instruction { return with_hint(Instruction{ mnemonic = .XADD, operand_count = 2, ops = {op_mem(dst.mem, 1), op_gpr8(src), {}, {}} }, 2391) }
 inst_xadd_r16_r16                   :: #force_inline proc "contextless" (dst: GPR16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .XADD, operand_count = 2, ops = {op_gpr16(dst), op_gpr16(src), {}, {}} }, 2392) }
@@ -7689,170 +7689,170 @@ inst_xadd_r32_r32                   :: #force_inline proc "contextless" (dst: GP
 inst_xadd_m32_r32                   :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .XADD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2393) }
 inst_xadd_r64_r64                   :: #force_inline proc "contextless" (dst: GPR64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .XADD, operand_count = 2, ops = {op_gpr64(dst), op_gpr64(src), {}, {}} }, 2394) }
 inst_xadd_m64_r64                   :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .XADD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2394) }
-emit_xadd_r8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append(instructions, inst_xadd_r8_r8(dst, src)) }
-emit_xadd_m8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append(instructions, inst_xadd_m8_r8(dst, src)) }
-emit_xadd_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append(instructions, inst_xadd_r16_r16(dst, src)) }
-emit_xadd_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_xadd_m16_r16(dst, src)) }
-emit_xadd_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append(instructions, inst_xadd_r32_r32(dst, src)) }
-emit_xadd_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_xadd_m32_r32(dst, src)) }
-emit_xadd_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append(instructions, inst_xadd_r64_r64(dst, src)) }
-emit_xadd_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_xadd_m64_r64(dst, src)) }
+emit_xadd_r8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR8, src: GPR8) { append_elem(instructions, inst_xadd_r8_r8(dst, src)) }
+emit_xadd_m8_r8                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8, src: GPR8) { append_elem(instructions, inst_xadd_m8_r8(dst, src)) }
+emit_xadd_r16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: GPR16) { append_elem(instructions, inst_xadd_r16_r16(dst, src)) }
+emit_xadd_m16_r16                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_xadd_m16_r16(dst, src)) }
+emit_xadd_r32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: GPR32) { append_elem(instructions, inst_xadd_r32_r32(dst, src)) }
+emit_xadd_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_xadd_m32_r32(dst, src)) }
+emit_xadd_r64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: GPR64) { append_elem(instructions, inst_xadd_r64_r64(dst, src)) }
+emit_xadd_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_xadd_m64_r64(dst, src)) }
 inst_bound_r16_m                    :: #force_inline proc "contextless" (dst: GPR16, src: Memory) -> Instruction { return with_hint(Instruction{ mnemonic = .BOUND, operand_count = 2, ops = {op_gpr16(dst), op_mem(src, 0), {}, {}} }, 2395) }
 inst_bound_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .BOUND, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 2396) }
-emit_bound_r16_m                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Memory) { append(instructions, inst_bound_r16_m(dst, src)) }
-emit_bound_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_bound_r32_m32(dst, src)) }
+emit_bound_r16_m                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Memory) { append_elem(instructions, inst_bound_r16_m(dst, src)) }
+emit_bound_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_bound_r32_m32(dst, src)) }
 inst_enter_imm16_imm8               :: #force_inline proc "contextless" (imm: i16, imm2: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .ENTER, operand_count = 2, ops = {op_imm16(imm), op_imm8(imm2), {}, {}} }, 2397) }
-emit_enter_imm16_imm8               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16, imm2: i8) { append(instructions, inst_enter_imm16_imm8(imm, imm2)) }
+emit_enter_imm16_imm8               :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i16, imm2: i8) { append_elem(instructions, inst_enter_imm16_imm8(imm, imm2)) }
 inst_leave_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .LEAVE, operand_count = 0, ops = {{}, {}, {}, {}} }, 2398) }
-emit_leave_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_leave_none()) }
+emit_leave_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_leave_none()) }
 inst_xlat_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .XLAT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2399) }
-emit_xlat_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xlat_none()) }
+emit_xlat_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xlat_none()) }
 inst_xlatb_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .XLATB, operand_count = 0, ops = {{}, {}, {}, {}} }, 2400) }
-emit_xlatb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xlatb_none()) }
+emit_xlatb_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xlatb_none()) }
 inst_movbe_r16_m16                  :: #force_inline proc "contextless" (dst: GPR16, src: Mem16) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVBE, operand_count = 2, ops = {op_gpr16(dst), op_mem(src.mem, 2), {}, {}} }, 2401) }
 inst_movbe_r32_m32                  :: #force_inline proc "contextless" (dst: GPR32, src: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVBE, operand_count = 2, ops = {op_gpr32(dst), op_mem(src.mem, 4), {}, {}} }, 2402) }
 inst_movbe_r64_m64                  :: #force_inline proc "contextless" (dst: GPR64, src: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVBE, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 8), {}, {}} }, 2403) }
 inst_movbe_m16_r16                  :: #force_inline proc "contextless" (dst: Mem16, src: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVBE, operand_count = 2, ops = {op_mem(dst.mem, 2), op_gpr16(src), {}, {}} }, 2404) }
 inst_movbe_m32_r32                  :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVBE, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2405) }
 inst_movbe_m64_r64                  :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVBE, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2406) }
-emit_movbe_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append(instructions, inst_movbe_r16_m16(dst, src)) }
-emit_movbe_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append(instructions, inst_movbe_r32_m32(dst, src)) }
-emit_movbe_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append(instructions, inst_movbe_r64_m64(dst, src)) }
-emit_movbe_m16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append(instructions, inst_movbe_m16_r16(dst, src)) }
-emit_movbe_m32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_movbe_m32_r32(dst, src)) }
-emit_movbe_m64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_movbe_m64_r64(dst, src)) }
+emit_movbe_r16_m16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16, src: Mem16) { append_elem(instructions, inst_movbe_r16_m16(dst, src)) }
+emit_movbe_r32_m32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32, src: Mem32) { append_elem(instructions, inst_movbe_r32_m32(dst, src)) }
+emit_movbe_r64_m64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem64) { append_elem(instructions, inst_movbe_r64_m64(dst, src)) }
+emit_movbe_m16_r16                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem16, src: GPR16) { append_elem(instructions, inst_movbe_m16_r16(dst, src)) }
+emit_movbe_m32_r32                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_movbe_m32_r32(dst, src)) }
+emit_movbe_m64_r64                  :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_movbe_m64_r64(dst, src)) }
 inst_rdrand_r16                     :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .RDRAND, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2407) }
 inst_rdrand_r32                     :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .RDRAND, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2408) }
 inst_rdrand_r64                     :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .RDRAND, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2409) }
-emit_rdrand_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_rdrand_r16(dst)) }
-emit_rdrand_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_rdrand_r32(dst)) }
-emit_rdrand_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rdrand_r64(dst)) }
+emit_rdrand_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_rdrand_r16(dst)) }
+emit_rdrand_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_rdrand_r32(dst)) }
+emit_rdrand_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rdrand_r64(dst)) }
 inst_rdseed_r16                     :: #force_inline proc "contextless" (dst: GPR16) -> Instruction { return with_hint(Instruction{ mnemonic = .RDSEED, operand_count = 1, ops = {op_gpr16(dst), {}, {}, {}} }, 2410) }
 inst_rdseed_r32                     :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .RDSEED, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2411) }
 inst_rdseed_r64                     :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .RDSEED, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2412) }
-emit_rdseed_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append(instructions, inst_rdseed_r16(dst)) }
-emit_rdseed_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_rdseed_r32(dst)) }
-emit_rdseed_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rdseed_r64(dst)) }
+emit_rdseed_r16                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR16) { append_elem(instructions, inst_rdseed_r16(dst)) }
+emit_rdseed_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_rdseed_r32(dst)) }
+emit_rdseed_r64                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rdseed_r64(dst)) }
 inst_swapgs_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SWAPGS, operand_count = 0, ops = {{}, {}, {}, {}} }, 2413) }
-emit_swapgs_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_swapgs_none()) }
+emit_swapgs_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_swapgs_none()) }
 inst_monitor_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MONITOR, operand_count = 0, ops = {{}, {}, {}, {}} }, 2414) }
-emit_monitor_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_monitor_none()) }
+emit_monitor_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_monitor_none()) }
 inst_mwait_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MWAIT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2415) }
-emit_mwait_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_mwait_none()) }
+emit_mwait_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_mwait_none()) }
 inst_clac_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CLAC, operand_count = 0, ops = {{}, {}, {}, {}} }, 2416) }
-emit_clac_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_clac_none()) }
+emit_clac_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_clac_none()) }
 inst_stac_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STAC, operand_count = 0, ops = {{}, {}, {}, {}} }, 2417) }
-emit_stac_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stac_none()) }
+emit_stac_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stac_none()) }
 inst_rdfsbase_r32                   :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .RDFSBASE, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2418) }
 inst_rdfsbase_r64                   :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .RDFSBASE, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2419) }
-emit_rdfsbase_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_rdfsbase_r32(dst)) }
-emit_rdfsbase_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rdfsbase_r64(dst)) }
+emit_rdfsbase_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_rdfsbase_r32(dst)) }
+emit_rdfsbase_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rdfsbase_r64(dst)) }
 inst_rdgsbase_r32                   :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .RDGSBASE, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2420) }
 inst_rdgsbase_r64                   :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .RDGSBASE, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2421) }
-emit_rdgsbase_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_rdgsbase_r32(dst)) }
-emit_rdgsbase_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rdgsbase_r64(dst)) }
+emit_rdgsbase_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_rdgsbase_r32(dst)) }
+emit_rdgsbase_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rdgsbase_r64(dst)) }
 inst_wrfsbase_r32                   :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .WRFSBASE, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2422) }
 inst_wrfsbase_r64                   :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .WRFSBASE, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2423) }
-emit_wrfsbase_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_wrfsbase_r32(dst)) }
-emit_wrfsbase_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_wrfsbase_r64(dst)) }
+emit_wrfsbase_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_wrfsbase_r32(dst)) }
+emit_wrfsbase_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_wrfsbase_r64(dst)) }
 inst_wrgsbase_r32                   :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .WRGSBASE, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2424) }
 inst_wrgsbase_r64                   :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .WRGSBASE, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2425) }
-emit_wrgsbase_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_wrgsbase_r32(dst)) }
-emit_wrgsbase_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_wrgsbase_r64(dst)) }
+emit_wrgsbase_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_wrgsbase_r32(dst)) }
+emit_wrgsbase_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_wrgsbase_r64(dst)) }
 inst_ptwrite_r32                    :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .PTWRITE, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2426) }
 inst_ptwrite_m32                    :: #force_inline proc "contextless" (dst: Mem32) -> Instruction { return with_hint(Instruction{ mnemonic = .PTWRITE, operand_count = 1, ops = {op_mem(dst.mem, 4), {}, {}, {}} }, 2426) }
 inst_ptwrite_r64                    :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .PTWRITE, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2427) }
 inst_ptwrite_m64                    :: #force_inline proc "contextless" (dst: Mem64) -> Instruction { return with_hint(Instruction{ mnemonic = .PTWRITE, operand_count = 1, ops = {op_mem(dst.mem, 8), {}, {}, {}} }, 2427) }
-emit_ptwrite_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_ptwrite_r32(dst)) }
-emit_ptwrite_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append(instructions, inst_ptwrite_m32(dst)) }
-emit_ptwrite_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_ptwrite_r64(dst)) }
-emit_ptwrite_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append(instructions, inst_ptwrite_m64(dst)) }
+emit_ptwrite_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_ptwrite_r32(dst)) }
+emit_ptwrite_m32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32) { append_elem(instructions, inst_ptwrite_m32(dst)) }
+emit_ptwrite_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_ptwrite_r64(dst)) }
+emit_ptwrite_m64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64) { append_elem(instructions, inst_ptwrite_m64(dst)) }
 inst_rdpid_r64                      :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .RDPID, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2428) }
-emit_rdpid_r64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_rdpid_r64(dst)) }
+emit_rdpid_r64                      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_rdpid_r64(dst)) }
 inst_wbnoinvd_none                  :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .WBNOINVD, operand_count = 0, ops = {{}, {}, {}, {}} }, 2429) }
-emit_wbnoinvd_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_wbnoinvd_none()) }
+emit_wbnoinvd_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_wbnoinvd_none()) }
 inst_serialize_none                 :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SERIALIZE, operand_count = 0, ops = {{}, {}, {}, {}} }, 2430) }
-emit_serialize_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_serialize_none()) }
+emit_serialize_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_serialize_none()) }
 inst_prefetch_m8                    :: #force_inline proc "contextless" (dst: Mem8) -> Instruction { return with_hint(Instruction{ mnemonic = .PREFETCH, operand_count = 1, ops = {op_mem(dst.mem, 1), {}, {}, {}} }, 2431) }
-emit_prefetch_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append(instructions, inst_prefetch_m8(dst)) }
+emit_prefetch_m8                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem8) { append_elem(instructions, inst_prefetch_m8(dst)) }
 inst_in_imm8                        :: #force_inline proc "contextless" (imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .IN, operand_count = 1, ops = {op_imm8(imm), {}, {}, {}} }, 2432) }
-emit_in_imm8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_in_imm8(imm)) }
+emit_in_imm8                        :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_in_imm8(imm)) }
 inst_out_imm8                       :: #force_inline proc "contextless" (imm: i8) -> Instruction { return with_hint(Instruction{ mnemonic = .OUT, operand_count = 1, ops = {op_imm8(imm), {}, {}, {}} }, 2438) }
-emit_out_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append(instructions, inst_out_imm8(imm)) }
+emit_out_imm8                       :: #force_inline proc(instructions: ^[dynamic]Instruction, imm: i8) { append_elem(instructions, inst_out_imm8(imm)) }
 inst_tpause_r32                     :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .TPAUSE, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2444) }
-emit_tpause_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_tpause_r32(dst)) }
+emit_tpause_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_tpause_r32(dst)) }
 inst_umonitor_r64                   :: #force_inline proc "contextless" (dst: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .UMONITOR, operand_count = 1, ops = {op_gpr64(dst), {}, {}, {}} }, 2445) }
-emit_umonitor_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append(instructions, inst_umonitor_r64(dst)) }
+emit_umonitor_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64) { append_elem(instructions, inst_umonitor_r64(dst)) }
 inst_umwait_r32                     :: #force_inline proc "contextless" (dst: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .UMWAIT, operand_count = 1, ops = {op_gpr32(dst), {}, {}, {}} }, 2446) }
-emit_umwait_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append(instructions, inst_umwait_r32(dst)) }
+emit_umwait_r32                     :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR32) { append_elem(instructions, inst_umwait_r32(dst)) }
 inst_movdiri_m32_r32                :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDIRI, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2447) }
 inst_movdiri_m64_r64                :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDIRI, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2448) }
-emit_movdiri_m32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_movdiri_m32_r32(dst, src)) }
-emit_movdiri_m64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_movdiri_m64_r64(dst, src)) }
+emit_movdiri_m32_r32                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_movdiri_m32_r32(dst, src)) }
+emit_movdiri_m64_r64                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_movdiri_m64_r64(dst, src)) }
 inst_movdir64b_r64_m512             :: #force_inline proc "contextless" (dst: GPR64, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .MOVDIR64B, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 64), {}, {}} }, 2449) }
-emit_movdir64b_r64_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem512) { append(instructions, inst_movdir64b_r64_m512(dst, src)) }
+emit_movdir64b_r64_m512             :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem512) { append_elem(instructions, inst_movdir64b_r64_m512(dst, src)) }
 inst_enqcmd_r64_m512                :: #force_inline proc "contextless" (dst: GPR64, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .ENQCMD, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 64), {}, {}} }, 2450) }
-emit_enqcmd_r64_m512                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem512) { append(instructions, inst_enqcmd_r64_m512(dst, src)) }
+emit_enqcmd_r64_m512                :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem512) { append_elem(instructions, inst_enqcmd_r64_m512(dst, src)) }
 inst_enqcmds_r64_m512               :: #force_inline proc "contextless" (dst: GPR64, src: Mem512) -> Instruction { return with_hint(Instruction{ mnemonic = .ENQCMDS, operand_count = 2, ops = {op_gpr64(dst), op_mem(src.mem, 64), {}, {}} }, 2451) }
-emit_enqcmds_r64_m512               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem512) { append(instructions, inst_enqcmds_r64_m512(dst, src)) }
+emit_enqcmds_r64_m512               :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR64, src: Mem512) { append_elem(instructions, inst_enqcmds_r64_m512(dst, src)) }
 inst_aadd_m32_r32                   :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .AADD, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2452) }
 inst_aadd_m64_r64                   :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .AADD, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2453) }
-emit_aadd_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_aadd_m32_r32(dst, src)) }
-emit_aadd_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_aadd_m64_r64(dst, src)) }
+emit_aadd_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_aadd_m32_r32(dst, src)) }
+emit_aadd_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_aadd_m64_r64(dst, src)) }
 inst_aand_m32_r32                   :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .AAND, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2454) }
 inst_aand_m64_r64                   :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .AAND, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2455) }
-emit_aand_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_aand_m32_r32(dst, src)) }
-emit_aand_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_aand_m64_r64(dst, src)) }
+emit_aand_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_aand_m32_r32(dst, src)) }
+emit_aand_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_aand_m64_r64(dst, src)) }
 inst_aor_m32_r32                    :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .AOR, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2456) }
 inst_aor_m64_r64                    :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .AOR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2457) }
-emit_aor_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_aor_m32_r32(dst, src)) }
-emit_aor_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_aor_m64_r64(dst, src)) }
+emit_aor_m32_r32                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_aor_m32_r32(dst, src)) }
+emit_aor_m64_r64                    :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_aor_m64_r64(dst, src)) }
 inst_axor_m32_r32                   :: #force_inline proc "contextless" (dst: Mem32, src: GPR32) -> Instruction { return with_hint(Instruction{ mnemonic = .AXOR, operand_count = 2, ops = {op_mem(dst.mem, 4), op_gpr32(src), {}, {}} }, 2458) }
 inst_axor_m64_r64                   :: #force_inline proc "contextless" (dst: Mem64, src: GPR64) -> Instruction { return with_hint(Instruction{ mnemonic = .AXOR, operand_count = 2, ops = {op_mem(dst.mem, 8), op_gpr64(src), {}, {}} }, 2459) }
-emit_axor_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append(instructions, inst_axor_m32_r32(dst, src)) }
-emit_axor_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append(instructions, inst_axor_m64_r64(dst, src)) }
+emit_axor_m32_r32                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem32, src: GPR32) { append_elem(instructions, inst_axor_m32_r32(dst, src)) }
+emit_axor_m64_r64                   :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Mem64, src: GPR64) { append_elem(instructions, inst_axor_m64_r64(dst, src)) }
 inst_xend_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .XEND, operand_count = 0, ops = {{}, {}, {}, {}} }, 2460) }
-emit_xend_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xend_none()) }
+emit_xend_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xend_none()) }
 inst_xtest_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .XTEST, operand_count = 0, ops = {{}, {}, {}, {}} }, 2461) }
-emit_xtest_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_xtest_none()) }
+emit_xtest_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_xtest_none()) }
 inst_vmrun_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMRUN, operand_count = 0, ops = {{}, {}, {}, {}} }, 2462) }
-emit_vmrun_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmrun_none()) }
+emit_vmrun_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmrun_none()) }
 inst_vmmcall_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMMCALL, operand_count = 0, ops = {{}, {}, {}, {}} }, 2463) }
-emit_vmmcall_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmmcall_none()) }
+emit_vmmcall_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmmcall_none()) }
 inst_vmload_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMLOAD, operand_count = 0, ops = {{}, {}, {}, {}} }, 2464) }
-emit_vmload_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmload_none()) }
+emit_vmload_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmload_none()) }
 inst_vmsave_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .VMSAVE, operand_count = 0, ops = {{}, {}, {}, {}} }, 2465) }
-emit_vmsave_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_vmsave_none()) }
+emit_vmsave_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_vmsave_none()) }
 inst_stgi_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .STGI, operand_count = 0, ops = {{}, {}, {}, {}} }, 2466) }
-emit_stgi_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_stgi_none()) }
+emit_stgi_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_stgi_none()) }
 inst_clgi_none                      :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CLGI, operand_count = 0, ops = {{}, {}, {}, {}} }, 2467) }
-emit_clgi_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_clgi_none()) }
+emit_clgi_none                      :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_clgi_none()) }
 inst_skinit_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .SKINIT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2468) }
-emit_skinit_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_skinit_none()) }
+emit_skinit_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_skinit_none()) }
 inst_invlpga_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .INVLPGA, operand_count = 0, ops = {{}, {}, {}, {}} }, 2469) }
-emit_invlpga_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_invlpga_none()) }
+emit_invlpga_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_invlpga_none()) }
 inst_invlpgb_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .INVLPGB, operand_count = 0, ops = {{}, {}, {}, {}} }, 2470) }
-emit_invlpgb_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_invlpgb_none()) }
+emit_invlpgb_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_invlpgb_none()) }
 inst_tlbsync_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .TLBSYNC, operand_count = 0, ops = {{}, {}, {}, {}} }, 2471) }
-emit_tlbsync_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_tlbsync_none()) }
+emit_tlbsync_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_tlbsync_none()) }
 inst_pvalidate_none                 :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .PVALIDATE, operand_count = 0, ops = {{}, {}, {}, {}} }, 2472) }
-emit_pvalidate_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_pvalidate_none()) }
+emit_pvalidate_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_pvalidate_none()) }
 inst_rmpadjust_none                 :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RMPADJUST, operand_count = 0, ops = {{}, {}, {}, {}} }, 2473) }
-emit_rmpadjust_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rmpadjust_none()) }
+emit_rmpadjust_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rmpadjust_none()) }
 inst_rmpupdate_none                 :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RMPUPDATE, operand_count = 0, ops = {{}, {}, {}, {}} }, 2474) }
-emit_rmpupdate_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rmpupdate_none()) }
+emit_rmpupdate_none                 :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rmpupdate_none()) }
 inst_psmash_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .PSMASH, operand_count = 0, ops = {{}, {}, {}, {}} }, 2475) }
-emit_psmash_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_psmash_none()) }
+emit_psmash_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_psmash_none()) }
 inst_clzero_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .CLZERO, operand_count = 0, ops = {{}, {}, {}, {}} }, 2476) }
-emit_clzero_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_clzero_none()) }
+emit_clzero_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_clzero_none()) }
 inst_monitorx_none                  :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MONITORX, operand_count = 0, ops = {{}, {}, {}, {}} }, 2477) }
-emit_monitorx_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_monitorx_none()) }
+emit_monitorx_none                  :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_monitorx_none()) }
 inst_mwaitx_none                    :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MWAITX, operand_count = 0, ops = {{}, {}, {}, {}} }, 2478) }
-emit_mwaitx_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_mwaitx_none()) }
+emit_mwaitx_none                    :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_mwaitx_none()) }
 inst_rdpru_none                     :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .RDPRU, operand_count = 0, ops = {{}, {}, {}, {}} }, 2479) }
-emit_rdpru_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_rdpru_none()) }
+emit_rdpru_none                     :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_rdpru_none()) }
 inst_mcommit_none                   :: #force_inline proc "contextless" () -> Instruction { return with_hint(Instruction{ mnemonic = .MCOMMIT, operand_count = 0, ops = {{}, {}, {}, {}} }, 2480) }
-emit_mcommit_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_mcommit_none()) }
+emit_mcommit_none                   :: #force_inline proc(instructions: ^[dynamic]Instruction) { append_elem(instructions, inst_mcommit_none()) }
 
 // =============================================================================
 // Overload Groups
diff --git a/core/rexcode/isa/x86/tools/gen_mnemonic_builders.odin b/core/rexcode/isa/x86/tools/gen_mnemonic_builders.odin
index bd266bae7..4e4938a32 100644
--- a/core/rexcode/isa/x86/tools/gen_mnemonic_builders.odin
+++ b/core/rexcode/isa/x86/tools/gen_mnemonic_builders.odin
@@ -1382,7 +1382,7 @@ generate_emit_helper_call :: proc(sb: ^strings.Builder, entry: Proc_Entry) {
 
 	case:
 		// Unknown pattern - fall back to append with inst_ call
-		strings.write_string(sb, "append(instructions, ")
+		strings.write_string(sb, "append_elem(instructions, ")
 		strings.write_string(sb, entry.proc_name)
 		strings.write_string(sb, "(")
 		for i in 0..<sig.count {
@@ -1469,7 +1469,7 @@ generate_emit_proc :: proc(sb: ^strings.Builder, entry: Proc_Entry, max_name_pad
 	strings.write_string(sb, params)
 	// Reuse the (class-correct, hint-baked) inst_ builder rather than re-emitting
 	// the operands -- keeps emit_ in lockstep with inst_ and inherits the hint.
-	strings.write_string(sb, ") { append(instructions, ")
+	strings.write_string(sb, ") { append_elem(instructions, ")
 	strings.write_string(sb, entry.proc_name)
 	strings.write_string(sb, "(")
 	for i in 0..<sig.count {

From fa8588189d990e82ed691a08b938c4ec8c4faabd Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 19:01:38 +0100
Subject: [PATCH 078/215] Continue to flesh out the new poly-subst engine

---
 src/check_expr.cpp |   2 +-
 src/check_type.cpp | 584 ++++++++++++++++++++++++++++++++++++++++-----
 2 files changed, 523 insertions(+), 63 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index b55bd5de9..ad91599d5 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -701,7 +701,7 @@ gb_internal bool find_or_generate_polymorphic_procedure_from_parameters(CheckerC
 	return find_or_generate_polymorphic_procedure(c, base_entity, nullptr, operands, poly_def_node, poly_proc_data);
 }
 
-gb_internal bool check_type_specialization_to(CheckerContext *c, Type *specialization, Type *type, bool compound, bool modify_type);
+gb_internal bool check_type_specialization_to(CheckerContext *c, Type *specialization, Type *type, bool compound, bool modify_type, bool finalize = true);
 gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, Type *source, bool compound, bool modify_type);
 gb_internal bool check_cast_internal(CheckerContext *c, Operand *x, Type *type);
 gb_internal bool check_proc_params_assignable(CheckerContext *c, Type *x, Type *y);
diff --git a/src/check_type.cpp b/src/check_type.cpp
index df1c8aebc..1901dabbe 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -520,7 +520,7 @@ gb_internal Type *check_record_polymorphic_params(CheckerContext *ctx, Ast *poly
 							*is_polymorphic_ = true;
 							can_check_fields = false;
 						} else if (specialization &&
-						           !check_type_specialization_to(ctx, specialization, operand.type, false, /*modify_type*/true)) {
+						           !check_type_specialization_to(ctx, specialization, operand.type, false, /*modify_type*/true, /*finalize*/false)) {
 							if (!ctx->no_polymorphic_errors) {
 								gbString t = type_to_string(operand.type);
 								gbString s = type_to_string(specialization);
@@ -724,7 +724,7 @@ gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *
 		case_end;
 		}
 	}
-	
+
 	scope_reserve(ctx->scope, min_field_count);
 
 	// Even a one-field `#raw_union` must be marked. RISC-V psABI excludes unions from the hardware
@@ -1561,12 +1561,12 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 		}
 		i64 lower = big_int_to_i64(&i);
 		i64 upper = big_int_to_i64(&j);
-		
+
 		i64 actual_lower = lower;
 		i64 bits = MAX_BITS;
 		if (type->BitSet.underlying != nullptr) {
 			bits = 8*type_size_of(type->BitSet.underlying);
-			
+
 			if (lower > 0) {
 				actual_lower = 0;
 			} else if (lower < 0) {
@@ -1609,7 +1609,7 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 				}
 			}
 		}
-		
+
 		type->BitSet.elem  = t;
 		type->BitSet.lower = lower;
 		type->BitSet.upper = upper;
@@ -1647,7 +1647,7 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 				}
 
 				GB_ASSERT(lower <= upper);
-				
+
 				bool lower_changed = false;
 				i64 bits = MAX_BITS
 ;				if (bs->underlying != nullptr) {
@@ -1660,7 +1660,7 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 					}
 					type->BitSet.underlying = u;
 					bits = 8*type_size_of(u);
-					
+
 					if (lower > 0) {
 						lower = 0;
 						lower_changed = true;
@@ -1689,7 +1689,7 @@ gb_internal void check_bit_set_type(CheckerContext *c, Type *type, Type *named_t
 				type->BitSet.upper = upper;
 			}
 		}
-	}	
+	}
 }
 
 
@@ -1709,7 +1709,7 @@ gb_internal GenTypesData *gen_types_data_of_specialization(Type *specialization)
 	return nullptr;
 }
 
-gb_internal bool check_type_specialization_to_internal(CheckerContext *ctx, Type *specialization, Type *type, TypeTuple *s_tuple, TypeTuple *t_tuple, bool modify_type) {
+gb_internal bool check_type_specialization_to_internal(CheckerContext *ctx, Type *specialization, Type *type, TypeTuple *s_tuple, TypeTuple *t_tuple, bool modify_type, bool finalize) {
 	GB_ASSERT(t_tuple->variables.count == s_tuple->variables.count);
 	for_array(i, s_tuple->variables) {
 		Entity *s_e = s_tuple->variables[i];
@@ -1741,7 +1741,7 @@ gb_internal bool check_type_specialization_to_internal(CheckerContext *ctx, Type
 		}
 	}
 
-	if (modify_type) {
+	if (modify_type && finalize) {
 		// NOTE(bill): This is needed in order to change the actual type but still have the types defined within it.
 		// `specialization` may already be published in a polymorphic record's gen_types cache;
 		// finalize it under that record's (recursive) gen_types mutex so a concurrent
@@ -1755,7 +1755,7 @@ gb_internal bool check_type_specialization_to_internal(CheckerContext *ctx, Type
 	return true;
 }
 
-gb_internal bool check_type_specialization_to(CheckerContext *ctx, Type *specialization, Type *type, bool compound, bool modify_type) {
+gb_internal bool check_type_specialization_to(CheckerContext *ctx, Type *specialization, Type *type, bool compound, bool modify_type, bool finalize) {
 	if (type == nullptr ||
 	    type == t_invalid) {
 		return true;
@@ -1791,7 +1791,7 @@ gb_internal bool check_type_specialization_to(CheckerContext *ctx, Type *special
 
 			TypeTuple *s_tuple = get_record_polymorphic_params(s);
 			TypeTuple *t_tuple = get_record_polymorphic_params(t);
-			return check_type_specialization_to_internal(ctx, specialization, type, s_tuple, t_tuple, modify_type);
+			return check_type_specialization_to_internal(ctx, specialization, type, s_tuple, t_tuple, modify_type, finalize);
 		}
 	} else if (t->kind == Type_Union) {
 		if (t->Union.polymorphic_parent == nullptr &&
@@ -1808,7 +1808,7 @@ gb_internal bool check_type_specialization_to(CheckerContext *ctx, Type *special
 
 			TypeTuple *s_tuple = get_record_polymorphic_params(s);
 			TypeTuple *t_tuple = get_record_polymorphic_params(t);
-			return check_type_specialization_to_internal(ctx, specialization, type, s_tuple, t_tuple, modify_type);
+			return check_type_specialization_to_internal(ctx, specialization, type, s_tuple, t_tuple, modify_type, finalize);
 		}
 	}
 
@@ -1832,19 +1832,32 @@ gb_internal bool check_type_specialization_to(CheckerContext *ctx, Type *special
 // Subst_Unhandled and are skipped. No behavior change. This is refactor scaffolding: it runs a
 // second (constructive) match per instantiation, so set to 0 (or gate to debug) before release.
 #define PARAPOLY_VERIFY_SUBST 1
+// When 1, the substitution is authoritative for handled patterns: determine_type_from_polymorphic
+// binds the poly-scope entities from the PolySubst and returns the constructed type WITHOUT running
+// the in-place mutation. When 0, the mutation runs and the subst path only verifies against it.
+#define PARAPOLY_SUBST_AUTHORITATIVE 1
 
-enum SubstResult { Subst_Unhandled, Subst_NoMatch, Subst_Matched };
+enum SubstResult : u8 {
+	Subst_Unhandled,
+	Subst_NoMatch,
+	Subst_Matched,
+};
+
+enum PolyBindKind : u8 {
+	PolyBind_Type,
+	PolyBind_Value,
+	PolyBind_EnumArray,
+};
 
-enum PolyBindKind { PolyBind_Type, PolyBind_Value, PolyBind_EnumArray };
 struct PolyBinding {
-	Entity      *key;
+	Entity *     key;
 	PolyBindKind kind;
-	Type        *type;  // PolyBind_Type: bound type; PolyBind_EnumArray: source EnumeratedArray
-	i64          value; // PolyBind_Value: array count
+	Type *       type;       // PolyBind_Type: bound type; PolyBind_EnumArray: source EnumeratedArray
+	i64          value;      // PolyBind_Value: array count
+	Type *       value_type; // PolyBind_Value: entity type the mutation gives the count constant
 };
 struct PolySubst {
-	PolyBinding items[64];
-	isize       count;
+	Array<PolyBinding> items;
 };
 
 gb_internal Entity *poly_generic_entity(Type *g) {
@@ -1855,9 +1868,9 @@ gb_internal Entity *poly_generic_entity(Type *g) {
 	return scope_lookup(g->Generic.scope, g->Generic.interned_name, 0);
 }
 gb_internal PolyBinding *poly_subst_find(PolySubst *s, Entity *key) {
-	for (isize i = 0; i < s->count; i++) {
-		if (s->items[i].key == key) {
-			return &s->items[i];
+	for (PolyBinding &b : s->items) {
+		if (b.key == key) {
+			return &b;
 		}
 	}
 	return nullptr;
@@ -1878,21 +1891,18 @@ gb_internal bool poly_subst_add(PolySubst *s, Entity *key, PolyBinding b) {
 		}
 		return false;
 	}
-	if (s->count >= gb_count_of(s->items)) {
-		return false;
-	}
 	b.key = key;
-	s->items[s->count++] = b;
+	array_add(&s->items, b);
 	return true;
 }
 gb_internal bool poly_subst_bind_type(PolySubst *s, Entity *key, Type *t) {
-	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Type, t, 0});
+	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Type, t, 0, nullptr});
 }
-gb_internal bool poly_subst_bind_value(PolySubst *s, Entity *key, i64 v) {
-	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Value, nullptr, v});
+gb_internal bool poly_subst_bind_value(PolySubst *s, Entity *key, i64 v, Type *value_type) {
+	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Value, nullptr, v, value_type});
 }
 gb_internal bool poly_subst_bind_enum_array(PolySubst *s, Entity *key, Type *ea) {
-	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_EnumArray, ea, 0});
+	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_EnumArray, ea, 0, nullptr});
 }
 
 gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *source, PolySubst *subst) {
@@ -1901,12 +1911,18 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 	}
 	switch (pattern->kind) {
 	case Type_Basic:
-		return are_types_identical(pattern, source) ? Subst_Matched : Subst_NoMatch;
+		if (are_types_identical(pattern, source)){
+			return Subst_Matched;
+		}
+		return Subst_NoMatch;
 	case Type_Generic:
 		if (pattern->Generic.specialized != nullptr) {
 			return Subst_Unhandled;
 		}
-		return poly_subst_bind_type(subst, poly_generic_entity(pattern), default_type(source)) ? Subst_Matched : Subst_NoMatch;
+		if (poly_subst_bind_type(subst, poly_generic_entity(pattern), default_type(source))){
+			return Subst_Matched;
+		}
+		return Subst_NoMatch;
 	case Type_Pointer:
 		// old code also allows struct subtyping and Pointer<->MultiPointer; only the plain elem match here
 		if (source->kind != Type_Pointer) {
@@ -1954,7 +1970,7 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 				if (ne == nullptr) {
 					return Subst_Unhandled;
 				}
-				if (!poly_subst_bind_value(subst, ne, source->Array.count)) {
+				if (!poly_subst_bind_value(subst, ne, source->Array.count, t_untyped_integer)) {
 					return Subst_NoMatch;
 				}
 			} else if (pattern->Array.count != source->Array.count) {
@@ -1989,18 +2005,30 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			return Subst_Unhandled;
 		}
 		if (pattern->Matrix.generic_row_count != nullptr) {
-			if (pattern->Matrix.generic_row_count->Generic.specialized != nullptr) return Subst_Unhandled;
+			if (pattern->Matrix.generic_row_count->Generic.specialized != nullptr) {
+				return Subst_Unhandled;
+			}
 			Entity *re = poly_generic_entity(pattern->Matrix.generic_row_count);
-			if (re == nullptr) return Subst_Unhandled;
-			if (!poly_subst_bind_value(subst, re, source->Matrix.row_count)) return Subst_NoMatch;
+			if (re == nullptr) {
+				return Subst_Unhandled;
+			}
+			if (!poly_subst_bind_value(subst, re, source->Matrix.row_count, t_untyped_integer)) {
+				return Subst_NoMatch;
+			}
 		} else if (pattern->Matrix.row_count != source->Matrix.row_count) {
 			return Subst_NoMatch;
 		}
 		if (pattern->Matrix.generic_column_count != nullptr) {
-			if (pattern->Matrix.generic_column_count->Generic.specialized != nullptr) return Subst_Unhandled;
+			if (pattern->Matrix.generic_column_count->Generic.specialized != nullptr) {
+				return Subst_Unhandled;
+			}
 			Entity *ce = poly_generic_entity(pattern->Matrix.generic_column_count);
-			if (ce == nullptr) return Subst_Unhandled;
-			if (!poly_subst_bind_value(subst, ce, source->Matrix.column_count)) return Subst_NoMatch;
+			if (ce == nullptr) {
+				return Subst_Unhandled;
+			}
+			if (!poly_subst_bind_value(subst, ce, source->Matrix.column_count, t_untyped_integer)) {
+				return Subst_NoMatch;
+			}
 		} else if (pattern->Matrix.column_count != source->Matrix.column_count) {
 			return Subst_NoMatch;
 		}
@@ -2011,19 +2039,290 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			return Subst_Unhandled;
 		}
 		if (pattern->SimdVector.generic_count != nullptr) {
-			if (pattern->SimdVector.generic_count->Generic.specialized != nullptr) return Subst_Unhandled;
+			if (pattern->SimdVector.generic_count->Generic.specialized != nullptr) {
+				return Subst_Unhandled;
+			}
 			Entity *ne = poly_generic_entity(pattern->SimdVector.generic_count);
-			if (ne == nullptr) return Subst_Unhandled;
-			if (!poly_subst_bind_value(subst, ne, source->SimdVector.count)) return Subst_NoMatch;
+			if (ne == nullptr) {
+				return Subst_Unhandled;
+			}
+			if (!poly_subst_bind_value(subst, ne, source->SimdVector.count, t_untyped_integer)) {
+				return Subst_NoMatch;
+			}
 		} else if (pattern->SimdVector.count != source->SimdVector.count) {
 			return Subst_NoMatch;
 		}
 		return subst_unify(c, pattern->SimdVector.elem, source->SimdVector.elem, subst);
+	case Type_Named: {
+		if (!is_type_polymorphic(pattern)) {
+			if (are_types_identical(pattern, source)) {
+				return Subst_Matched;
+			}
+			return Subst_NoMatch;
+		}
+		Type *pb = base_type(pattern);
+		Type *sb = base_type(source);
+		if (pb->kind != sb->kind) {
+			return Subst_Unhandled;
+		}
+		Type *s_parent = nullptr, *t_parent = nullptr;
+		TypeTuple *s_tuple = nullptr, *t_tuple = nullptr;
+		if (pb->kind == Type_Struct) {
+			s_parent = pb->Struct.polymorphic_parent;
+			t_parent = sb->Struct.polymorphic_parent;
+			s_tuple  = get_record_polymorphic_params(pb);
+			t_tuple  = get_record_polymorphic_params(sb);
+		} else if (pb->kind == Type_Union) {
+			s_parent = pb->Union.polymorphic_parent;
+			t_parent = sb->Union.polymorphic_parent;
+			s_tuple  = get_record_polymorphic_params(pb);
+			t_tuple  = get_record_polymorphic_params(sb);
+		} else {
+			return Subst_Unhandled;
+		}
+		if (s_parent == nullptr || s_parent != t_parent || s_tuple == nullptr || t_tuple == nullptr) {
+			return Subst_Unhandled;
+		}
+		if (s_tuple->variables.count != t_tuple->variables.count) {
+			return Subst_NoMatch;
+		}
+		for_array(i, s_tuple->variables) {
+			Entity *s_e = s_tuple->variables[i];
+			Entity *t_e = t_tuple->variables[i];
+			Type *st = s_e->type;
+			if (st->kind == Type_Generic) {
+				Entity *ge = poly_generic_entity(st);
+				if (ge == nullptr || st->Generic.specialized != nullptr) {
+					return Subst_Unhandled;
+				}
+				if (t_e->kind == Entity_Constant) {
+					if (t_e->Constant.value.kind != ExactValue_Integer) {
+						return Subst_Unhandled;
+					}
+					if (!poly_subst_bind_value(subst, ge, big_int_to_i64(&t_e->Constant.value.value_integer), t_e->type)) {
+						return Subst_NoMatch;
+					}
+				} else {
+					if (!poly_subst_bind_type(subst, ge, default_type(t_e->type))) {
+						return Subst_NoMatch;
+					}
+				}
+			} else {
+				SubstResult r = subst_unify(c, st, t_e->type, subst);
+				if (r != Subst_Matched) {
+					return r; // NoMatch or Unhandled
+				}
+			}
+		}
+		return Subst_Matched;
+	}
+	case Type_Proc: {
+		if (source->kind != Type_Proc) {
+			return Subst_NoMatch;
+		}
+		if (pattern->Proc.calling_convention != source->Proc.calling_convention ||
+		    pattern->Proc.c_vararg           != source->Proc.c_vararg ||
+		    pattern->Proc.variadic           != source->Proc.variadic ||
+		    pattern->Proc.param_count        != source->Proc.param_count ||
+		    pattern->Proc.result_count       != source->Proc.result_count) {
+			return Subst_NoMatch;
+		}
+		for (i32 i = 0; i < pattern->Proc.param_count; i++) {
+			SubstResult r = subst_unify(c, pattern->Proc.params->Tuple.variables[i]->type,
+			                               source->Proc.params->Tuple.variables[i]->type, subst);
+			if (r != Subst_Matched) {
+				return Subst_Unhandled; // param context allows assignability, defer to the mutator
+			}
+		}
+		for (i32 i = 0; i < pattern->Proc.result_count; i++) {
+			SubstResult r = subst_unify(c, pattern->Proc.results->Tuple.variables[i]->type,
+			                               source->Proc.results->Tuple.variables[i]->type, subst);
+			if (r != Subst_Matched) {
+				return Subst_Unhandled;
+			}
+		}
+		return Subst_Matched;
+	}
+	case Type_Union: {
+		if (source->kind != Type_Union) {
+			return Subst_NoMatch;
+		}
+		if (pattern->Union.variants.count != source->Union.variants.count) {
+			return Subst_NoMatch;
+		}
+		for_array(i, pattern->Union.variants) {
+			SubstResult r = subst_unify(c, pattern->Union.variants[i], source->Union.variants[i], subst);
+			if (r != Subst_Matched) {
+				return Subst_Unhandled; // variant context allows assignability, defer to the mutator
+			}
+		}
+		return Subst_Matched;
+	}
+	case Type_SoaPointer:
+		if (source->kind != Type_SoaPointer) {
+			return Subst_Unhandled;
+		}
+		if (base_type(pattern->SoaPointer.elem)->kind == Type_Struct) {
+			return Subst_Unhandled; // subtype path, handled by the mutator
+		}
+		return subst_unify(c, pattern->SoaPointer.elem, source->SoaPointer.elem, subst);
+	case Type_FixedCapacityDynamicArray:
+		if (source->kind != Type_FixedCapacityDynamicArray) {
+			return Subst_NoMatch;
+		}
+		if (pattern->FixedCapacityDynamicArray.generic_capacity != nullptr) {
+			if (pattern->FixedCapacityDynamicArray.generic_capacity->Generic.specialized != nullptr) {
+				return Subst_Unhandled;
+			}
+			Entity *ne = poly_generic_entity(pattern->FixedCapacityDynamicArray.generic_capacity);
+			if (ne == nullptr) {
+				return Subst_Unhandled;
+			}
+			if (!poly_subst_bind_value(subst, ne, source->FixedCapacityDynamicArray.capacity, t_untyped_integer)) {
+				return Subst_NoMatch;
+			}
+		} else if (pattern->FixedCapacityDynamicArray.capacity != source->FixedCapacityDynamicArray.capacity) {
+			return Subst_NoMatch;
+		}
+		return subst_unify(c, pattern->FixedCapacityDynamicArray.elem, source->FixedCapacityDynamicArray.elem, subst);
+	case Type_EnumeratedArray: {
+		if (source->kind != Type_EnumeratedArray) {
+			return Subst_NoMatch;
+		}
+		if (pattern->EnumeratedArray.op || source->EnumeratedArray.op) {
+			return Subst_Unhandled; // sparse/range form, defer to the mutator
+		}
+		SubstResult ir = subst_unify(c, pattern->EnumeratedArray.index, source->EnumeratedArray.index, subst);
+		if (ir != Subst_Matched) {
+			return ir;
+		}
+		return subst_unify(c, pattern->EnumeratedArray.elem, source->EnumeratedArray.elem, subst);
+	}
+	case Type_BitSet: {
+		if (source->kind != Type_BitSet) {
+			return Subst_NoMatch;
+		}
+		if (!is_type_polymorphic(pattern->BitSet.elem)) {
+			if (pattern->BitSet.upper != source->BitSet.upper ||
+			    pattern->BitSet.lower != source->BitSet.lower) {
+				return Subst_NoMatch;
+			}
+		}
+		SubstResult er = subst_unify(c, pattern->BitSet.elem, source->BitSet.elem, subst);
+		if (er != Subst_Matched) {
+			return er;
+		}
+		if (pattern->BitSet.underlying != nullptr) {
+			if (source->BitSet.underlying == nullptr) {
+				return Subst_NoMatch;
+			}
+			SubstResult ur = subst_unify(c, pattern->BitSet.underlying, source->BitSet.underlying, subst);
+			if (ur != Subst_Matched) {
+				return ur;
+			}
+		}
+		return Subst_Matched;
+	}
+	case Type_BitField:
+		if (source->kind != Type_BitField) {
+			return Subst_NoMatch;
+		}
+		return subst_unify(c, pattern->BitField.backing_type, source->BitField.backing_type, subst);
+	case Type_Struct:
+		if (source->kind == Type_Struct &&
+		    pattern->Struct.soa_kind == source->Struct.soa_kind &&
+		    pattern->Struct.soa_kind != StructSoa_None) {
+			return subst_unify(c, pattern->Struct.soa_elem, source->Struct.soa_elem, subst);
+		}
+		return Subst_Unhandled; // plain anonymous struct / subtype, handled by the mutator
 	}
 	return Subst_Unhandled;
 }
 
-gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, PolySubst *subst) {
+// Substitution-keyed instantiation lookup: find the already-generated record instantiation whose
+// concrete parameters match `pattern`'s parameters under `subst`. Unlike find_polymorphic_record_entity
+// this compares types/values directly (no call-site exprs), so it can be driven by a substitution.
+// Caller holds the record's gen_types mutex.
+gb_internal Entity *find_polymorphic_record_by_subst(GenTypesData *gt, TypeTuple *p_tuple, PolySubst *subst) {
+	for (Entity *e : gt->types) {
+		Type *eb = base_type(e->type);
+		TypeTuple *e_tuple = get_record_polymorphic_params(eb);
+		if (e_tuple == nullptr || e_tuple->variables.count != p_tuple->variables.count) {
+			continue;
+		}
+		bool match = true;
+		for_array(i, p_tuple->variables) {
+			Entity *pp = p_tuple->variables[i];
+			Entity *ep = e_tuple->variables[i];
+			Type *pt = pp->type;
+			if (pt != nullptr && pt->kind == Type_Generic) {
+				PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pt));
+				if (b == nullptr) {
+					match = false;
+					break;
+				}
+				if (b->kind == PolyBind_Value) {
+					if (ep->kind != Entity_Constant || ep->Constant.value.kind != ExactValue_Integer ||
+					    big_int_to_i64(&ep->Constant.value.value_integer) != b->value) {
+						match = false;
+						break;
+					}
+				} else if (b->kind == PolyBind_Type) {
+					if (ep->kind != Entity_TypeName || !are_types_identical(ep->type, b->type)) {
+						match = false;
+						break;
+					}
+				} else {
+					match = false;
+					break;
+				}
+			} else if (pp->kind == Entity_Constant && ep->kind == Entity_Constant) {
+				if (!compare_exact_values(Token_CmpEq, pp->Constant.value, ep->Constant.value)) {
+					match = false;
+					break;
+				}
+			} else if (pp->kind == Entity_TypeName && ep->kind == Entity_TypeName) {
+				if (!are_types_identical(pp->type, ep->type)) {
+					match = false;
+					break;
+				}
+			} else {
+				match = false;
+				break;
+			}
+		}
+		if (match) {
+			return e;
+		}
+	}
+	return nullptr;
+}
+
+gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, PolySubst *subst);
+
+gb_internal Type *subst_apply_tuple(CheckerContext *c, Type *pattern_tuple, Type *source_tuple, PolySubst *subst) {
+	Type *t = alloc_type_tuple();
+	isize n = pattern_tuple->Tuple.variables.count;
+	auto vars = slice_make<Entity *>(permanent_allocator(), n);
+	for (isize i = 0; i < n; i++) {
+		Entity *pe = pattern_tuple->Tuple.variables[i];
+		Entity *se = source_tuple->Tuple.variables[i];
+		Type *nt = subst_apply(c, pe->type, se->type, subst);
+		Entity *ne;
+		switch (pe->kind) {
+		case Entity_Constant: ne = alloc_entity_constant(pe->scope, pe->token, nt, pe->Constant.value); break;
+		case Entity_TypeName: ne = alloc_entity_type_name(pe->scope, pe->token, nt, EntityState_Resolved); break;
+		default:              ne = alloc_entity_variable(pe->scope, pe->token, nt, EntityState_Resolved); break;
+		}
+		ne->flags = pe->flags.load();
+		vars[i] = ne;
+	}
+	t->Tuple.variables = vars;
+	t->Tuple.is_packed = pattern_tuple->Tuple.is_packed;
+	return t;
+}
+
+gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, PolySubst *subst) {
 	switch (pattern->kind) {
 	case Type_Basic:
 		return pattern;
@@ -2033,26 +2332,38 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, PolySubst *subst
 		return b->type;
 	}
 	case Type_Pointer:
-		return alloc_type_pointer(subst_apply(c, pattern->Pointer.elem, subst));
+		return alloc_type_pointer(subst_apply(c, pattern->Pointer.elem, source->Pointer.elem, subst));
 	case Type_MultiPointer:
-		return alloc_type_multi_pointer(subst_apply(c, pattern->MultiPointer.elem, subst));
+		return alloc_type_multi_pointer(subst_apply(c, pattern->MultiPointer.elem, source->MultiPointer.elem, subst));
+	case Type_SoaPointer:
+		return alloc_type_soa_pointer(subst_apply(c, pattern->SoaPointer.elem, source->SoaPointer.elem, subst));
 	case Type_Slice:
-		return alloc_type_slice(subst_apply(c, pattern->Slice.elem, subst));
+		return alloc_type_slice(subst_apply(c, pattern->Slice.elem, source->Slice.elem, subst));
 	case Type_DynamicArray:
-		return alloc_type_dynamic_array(subst_apply(c, pattern->DynamicArray.elem, subst));
+		return alloc_type_dynamic_array(subst_apply(c, pattern->DynamicArray.elem, source->DynamicArray.elem, subst));
+	case Type_FixedCapacityDynamicArray: {
+		Type *elem = subst_apply(c, pattern->FixedCapacityDynamicArray.elem, source->FixedCapacityDynamicArray.elem, subst);
+		i64 cap = pattern->FixedCapacityDynamicArray.capacity;
+		if (pattern->FixedCapacityDynamicArray.generic_capacity != nullptr) {
+			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->FixedCapacityDynamicArray.generic_capacity));
+			GB_ASSERT(b != nullptr && b->kind == PolyBind_Value);
+			cap = b->value;
+		}
+		return alloc_type_fixed_capacity_dynamic_array(elem, cap, nullptr);
+	}
 	case Type_Map: {
 		Type *m = alloc_type(Type_Map);
-		m->Map.key   = subst_apply(c, pattern->Map.key, subst);
-		m->Map.value = subst_apply(c, pattern->Map.value, subst);
+		m->Map.key   = subst_apply(c, pattern->Map.key,   source->Map.key,   subst);
+		m->Map.value = subst_apply(c, pattern->Map.value, source->Map.value, subst);
 		return m;
 	}
 	case Type_Array: {
-		Type *elem = subst_apply(c, pattern->Array.elem, subst);
 		if (pattern->Array.generic_count != nullptr) {
 			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->Array.generic_count));
 			GB_ASSERT(b != nullptr);
 			if (b->kind == PolyBind_EnumArray) {
-				Type *ea = b->type;
+				Type *ea = b->type; // source EnumeratedArray captured at unify
+				Type *elem = subst_apply(c, pattern->Array.elem, ea->EnumeratedArray.elem, subst);
 				Type *r = alloc_type_enumerated_array(elem, ea->EnumeratedArray.index,
 					ea->EnumeratedArray.min_value, ea->EnumeratedArray.max_value,
 					ea->EnumeratedArray.count, ea->EnumeratedArray.op);
@@ -2060,12 +2371,19 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, PolySubst *subst
 				return r;
 			}
 			GB_ASSERT(b->kind == PolyBind_Value);
-			return alloc_type_array(elem, b->value, nullptr);
+			return alloc_type_array(subst_apply(c, pattern->Array.elem, source->Array.elem, subst), b->value, nullptr);
 		}
-		return alloc_type_array(elem, pattern->Array.count, nullptr);
+		return alloc_type_array(subst_apply(c, pattern->Array.elem, source->Array.elem, subst), pattern->Array.count, nullptr);
+	}
+	case Type_EnumeratedArray: {
+		Type *elem  = subst_apply(c, pattern->EnumeratedArray.elem,  source->EnumeratedArray.elem,  subst);
+		Type *index = subst_apply(c, pattern->EnumeratedArray.index, source->EnumeratedArray.index, subst);
+		return alloc_type_enumerated_array(elem, index,
+			pattern->EnumeratedArray.min_value, pattern->EnumeratedArray.max_value,
+			pattern->EnumeratedArray.count, pattern->EnumeratedArray.op);
 	}
 	case Type_Matrix: {
-		Type *elem = subst_apply(c, pattern->Matrix.elem, subst);
+		Type *elem = subst_apply(c, pattern->Matrix.elem, source->Matrix.elem, subst);
 		i64 rc = pattern->Matrix.row_count;
 		i64 cc = pattern->Matrix.column_count;
 		if (pattern->Matrix.generic_row_count != nullptr) {
@@ -2081,7 +2399,7 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, PolySubst *subst
 		return alloc_type_matrix(elem, rc, cc, nullptr, nullptr, pattern->Matrix.is_row_major);
 	}
 	case Type_SimdVector: {
-		Type *elem = subst_apply(c, pattern->SimdVector.elem, subst);
+		Type *elem = subst_apply(c, pattern->SimdVector.elem, source->SimdVector.elem, subst);
 		i64 count = pattern->SimdVector.count;
 		if (pattern->SimdVector.generic_count != nullptr) {
 			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->SimdVector.generic_count));
@@ -2090,11 +2408,136 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, PolySubst *subst
 		}
 		return alloc_type_simd_vector(count, elem, nullptr);
 	}
+	case Type_Proc: {
+		// Reproduce the mutator: keep the pattern's proc properties, substitute param/result types.
+		Type *r = alloc_type(Type_Proc);
+		r->Proc = pattern->Proc;
+		r->Proc.params  = pattern->Proc.params  ? subst_apply_tuple(c, pattern->Proc.params,  source->Proc.params,  subst) : nullptr;
+		r->Proc.results = pattern->Proc.results ? subst_apply_tuple(c, pattern->Proc.results, source->Proc.results, subst) : nullptr;
+		r->Proc.is_polymorphic = false;
+		r->Proc.is_poly_specialized = false;
+		return r;
+	}
+	case Type_Union: {
+		Type *r = alloc_type(Type_Union);
+		r->Union.node         = pattern->Union.node;
+		r->Union.scope        = pattern->Union.scope;
+		r->Union.custom_align = pattern->Union.custom_align;
+		r->Union.kind         = pattern->Union.kind;
+		r->Union.variant_block_size.store(pattern->Union.variant_block_size.load());
+		r->Union.tag_size.store(pattern->Union.tag_size.load());
+		isize n = pattern->Union.variants.count;
+		auto vars = slice_make<Type *>(permanent_allocator(), n);
+		for (isize i = 0; i < n; i++) {
+			vars[i] = subst_apply(c, pattern->Union.variants[i], source->Union.variants[i], subst);
+		}
+		r->Union.variants = vars;
+		wait_signal_set(&r->Union.variants_wait_signal);
+		wait_signal_set(&r->Union.polymorphic_wait_signal);
+		return r;
+	}
+	case Type_BitSet:
+		// bit_set has source-derived bounds/underlying; unify has verified the structural match, so the
+		// resolved type is the (already concrete) source.
+		return source;
+	case Type_BitField: {
+		Type *r = alloc_type_bit_field();
+		r->BitField.backing_type = subst_apply(c, pattern->BitField.backing_type, source->BitField.backing_type, subst);
+		r->BitField.fields       = pattern->BitField.fields;
+		r->BitField.tags         = pattern->BitField.tags;
+		r->BitField.bit_sizes    = pattern->BitField.bit_sizes;
+		r->BitField.bit_offsets  = pattern->BitField.bit_offsets;
+		r->BitField.scope        = pattern->BitField.scope;
+		r->BitField.node         = pattern->BitField.node;
+		return r;
+	}
+	case Type_Struct: {
+		Type *elem = subst_apply(c, pattern->Struct.soa_elem, source->Struct.soa_elem, subst);
+		switch (pattern->Struct.soa_kind) {
+		case StructSoa_Fixed:   return make_soa_struct_fixed(c, nullptr, pattern->Struct.node, elem, pattern->Struct.soa_count, nullptr);
+		case StructSoa_Slice:   return make_soa_struct_slice(c, nullptr, pattern->Struct.node, elem);
+		case StructSoa_Dynamic: return make_soa_struct_dynamic_array(c, nullptr, pattern->Struct.node, elem);
+		}
+		GB_PANIC("subst_apply: unhandled soa struct kind");
+		return nullptr;
+	}
+	case Type_Named: {
+		if (!is_type_polymorphic(pattern)) {
+			return pattern;
+		}
+		Type *pb = base_type(pattern);
+		Type *orig = nullptr;
+		TypeTuple *p_tuple = get_record_polymorphic_params(pb);
+		if (pb->kind == Type_Struct) {
+			orig = pb->Struct.polymorphic_parent;
+		} else if (pb->kind == Type_Union) {
+			orig = pb->Union.polymorphic_parent;
+		}
+		GB_ASSERT(orig != nullptr && p_tuple != nullptr);
+		GenTypesData *gt = ensure_polymorphic_record_entity_has_gen_types(c, orig);
+		mutex_lock(&gt->mutex);
+		Entity *found = find_polymorphic_record_by_subst(gt, p_tuple, subst);
+		mutex_unlock(&gt->mutex);
+		GB_ASSERT_MSG(found != nullptr, "subst_apply: no instantiation found for '%s'", type_to_string(pattern));
+		return found->type;
+	}
 	}
 	GB_PANIC("subst_apply: unhandled kind");
 	return nullptr;
 }
 
+// Bind each poly-scope entity to its substitution value, replacing the side effects the in-place
+// mutation used to perform (polymorphic_assign_index's entity flip, the $T node rewrite, the
+// enum-array alias). Used when the substitution is authoritative for a pattern.
+gb_internal void subst_bind_entities(PolySubst *subst) {
+	for (PolyBinding &b : subst->items) {
+		Entity *e = b.key;
+		switch (b.kind) {
+		case PolyBind_Type:
+			e->type = b.type;
+			break;
+		case PolyBind_Value:
+			e->kind = Entity_Constant;
+			e->Constant.value = exact_value_i64(b.value);
+			e->type = b.value_type;
+			break;
+		case PolyBind_EnumArray:
+			e->kind = Entity_TypeName;
+			e->TypeName.is_type_alias = true;
+			e->type = b.type->EnumeratedArray.index;
+			break;
+		}
+	}
+}
+
+#if PARAPOLY_VERIFY_SUBST
+// Read-only: assert that the in-place mutation bound each poly-scope entity to exactly what the
+// substitution captured. This is the entity-level analogue of the apply-reproduction check; once it
+// holds everywhere, entity binding can be driven from the PolySubst and the mutation removed.
+gb_internal void subst_verify_entities(PolySubst *subst) {
+	for (PolyBinding &b : subst->items) {
+		Entity *e = b.key;
+		switch (b.kind) {
+		case PolyBind_Type:
+			GB_ASSERT_MSG(e->type != nullptr && are_types_identical(e->type, b.type),
+			              "parapoly subst entity type mismatch for '%.*s'", LIT(e->token.string));
+			break;
+		case PolyBind_Value:
+			GB_ASSERT_MSG(e->kind == Entity_Constant && e->Constant.value.kind == ExactValue_Integer &&
+			              big_int_to_i64(&e->Constant.value.value_integer) == b.value &&
+			              are_types_identical(e->type, b.value_type),
+			              "parapoly subst entity value mismatch for '%.*s'", LIT(e->token.string));
+			break;
+		case PolyBind_EnumArray:
+			GB_ASSERT_MSG(e->kind == Entity_TypeName && e->type != nullptr &&
+			              are_types_identical(e->type, b.type->EnumeratedArray.index),
+			              "parapoly subst entity enum-array mismatch for '%.*s'", LIT(e->token.string));
+			break;
+		}
+	}
+}
+#endif
+
 gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *poly_type, Operand const &operand) {
 	bool modify_type = !ctx->no_polymorphic_errors;
 	bool show_error = modify_type && !ctx->hide_polymorphic_errors;
@@ -2118,29 +2561,42 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 
 #if PARAPOLY_VERIFY_SUBST
 	PolySubst verify_subst = {};
+	verify_subst.items.allocator = heap_allocator();
+	defer (array_free(&verify_subst.items));
 	SubstResult verify_ur = Subst_Unhandled;
 	Type *verify_applied = nullptr;
 	if (modify_type) {
 		verify_ur = subst_unify(ctx, poly_type, operand.type, &verify_subst);
 		if (verify_ur == Subst_Matched) {
-			verify_applied = subst_apply(ctx, poly_type, &verify_subst);
+			verify_applied = subst_apply(ctx, poly_type, operand.type, &verify_subst);
 		}
 	}
+	#if PARAPOLY_SUBST_AUTHORITATIVE
+	if (verify_ur == Subst_Matched) {
+		// Substitution is authoritative: bind the poly-scope entities and return the constructed
+		// type; the in-place mutation is not run. (A handled NoMatch falls through and the mutation
+		// will also fail, reaching the error path.)
+		subst_bind_entities(&verify_subst);
+		return verify_applied;
+	}
+	#endif
 #endif
 
 	if (is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
-	#if PARAPOLY_VERIFY_SUBST
+	#if PARAPOLY_VERIFY_SUBST && !PARAPOLY_SUBST_AUTHORITATIVE
 		if (verify_ur == Subst_Matched) {
 			GB_ASSERT_MSG(are_types_identical(verify_applied, poly_type),
 			              "parapoly subst mismatch: applied '%s' vs mutated '%s'",
 			              type_to_string(verify_applied), type_to_string(poly_type));
+			subst_verify_entities(&verify_subst);
+			return verify_applied;
 		} else if (verify_ur == Subst_NoMatch) {
 			GB_PANIC("parapoly subst reported NoMatch but in-place match succeeded (result '%s')", type_to_string(poly_type));
 		}
 	#endif
 		return poly_type;
 	}
-#if PARAPOLY_VERIFY_SUBST
+#if PARAPOLY_VERIFY_SUBST && !PARAPOLY_SUBST_AUTHORITATIVE
 	if (verify_ur == Subst_Matched) {
 		GB_PANIC("parapoly subst matched but in-place match failed");
 	}
@@ -2583,7 +3039,7 @@ gb_internal Type *check_get_params(CheckerContext *ctx, Scope *scope, Ast *_para
 					}
 					bool modify_type = !ctx->no_polymorphic_errors;
 
-					if (specialization != nullptr && !check_type_specialization_to(ctx, specialization, type, false, modify_type)) {
+					if (specialization != nullptr && !check_type_specialization_to(ctx, specialization, type, false, modify_type, /*finalize*/false)) {
 						if (!ctx->no_polymorphic_errors) {
 							gbString t = type_to_string(type);
 							gbString s = type_to_string(specialization);
@@ -3422,7 +3878,9 @@ gb_internal Type *get_map_cell_type(Type *type) {
 gb_internal void init_map_internal_debug_types(Type *type) {
 	GB_ASSERT(type->kind == Type_Map);
 	GB_ASSERT(t_allocator != nullptr);
-	if (type->Map.debug_metadata_type != nullptr) return;
+	if (type->Map.debug_metadata_type != nullptr) {
+		return;
+	}
 
 	Type *key   = type->Map.key;
 	Type *value = type->Map.value;
@@ -3469,7 +3927,9 @@ gb_internal void init_map_internal_debug_types(Type *type) {
 gb_internal void init_map_internal_types(Type *type) {
 	GB_ASSERT(type->kind == Type_Map);
 	GB_ASSERT(t_allocator != nullptr);
-	if (type->Map.lookup_result_type != nullptr) return;
+	if (type->Map.lookup_result_type != nullptr) {
+		return;
+	}
 
 	Type *key   = type->Map.key;
 	Type *value = type->Map.value;

From 2c0883b4e8db4de34d708dbb893d546086fe0ded Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Wed, 30 Sep 2026 20:20:54 +0200
Subject: [PATCH 079/215] chenged append to append_elem for spirv ir

---
 core/rexcode/ir/spirv/builders_gen.odin | 1746 +++++++++++------------
 core/rexcode/ir/spirv/tablegen/gen.odin |    2 +-
 2 files changed, 874 insertions(+), 874 deletions(-)

diff --git a/core/rexcode/ir/spirv/builders_gen.odin b/core/rexcode/ir/spirv/builders_gen.odin
index feae2dc73..299102dcc 100644
--- a/core/rexcode/ir/spirv/builders_gen.odin
+++ b/core/rexcode/ir/spirv/builders_gen.odin
@@ -10,7 +10,7 @@ inst_OpNop :: #force_inline proc "contextless" () -> Operation {
 }
 
 nop :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpNop())
+	append_elem(&b.ops, inst_OpNop())
 }
 
 inst_OpUndef :: #force_inline proc "contextless" (result_type: Type_Ref, result: Id) -> Operation {
@@ -19,7 +19,7 @@ inst_OpUndef :: #force_inline proc "contextless" (result_type: Type_Ref, result:
 
 undef :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUndef(result_type, r))
+	append_elem(&b.ops, inst_OpUndef(result_type, r))
 	return r
 }
 
@@ -30,7 +30,7 @@ inst_OpSourceContinued :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 source_continued :: proc(b: ^Builder, op1: string) {
-	append(&b.ops, inst_OpSourceContinued(opbuf(b, (len(op1) + 4) / 4), op1))
+	append_elem(&b.ops, inst_OpSourceContinued(opbuf(b, (len(op1) + 4) / 4), op1))
 }
 
 inst_OpSource :: #force_inline proc "contextless" (buf: []Operand, op1: Source_Language, op2: i64, op3: Maybe(Id), op4: Maybe(string)) -> Operation {
@@ -43,7 +43,7 @@ inst_OpSource :: #force_inline proc "contextless" (buf: []Operand, op1: Source_L
 }
 
 source :: proc(b: ^Builder, op1: Source_Language, op2: i64, op3: Maybe(Id), op4: Maybe(string)) {
-	append(&b.ops, inst_OpSource(opbuf(b, 1 + 1 + 1 + (len(op4.? or_else "") + 4) / 4), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSource(opbuf(b, 1 + 1 + 1 + (len(op4.? or_else "") + 4) / 4), op1, op2, op3, op4))
 }
 
 inst_OpSourceExtension :: #force_inline proc "contextless" (buf: []Operand, op1: string) -> Operation {
@@ -53,7 +53,7 @@ inst_OpSourceExtension :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 source_extension :: proc(b: ^Builder, op1: string) {
-	append(&b.ops, inst_OpSourceExtension(opbuf(b, (len(op1) + 4) / 4), op1))
+	append_elem(&b.ops, inst_OpSourceExtension(opbuf(b, (len(op1) + 4) / 4), op1))
 }
 
 inst_OpName :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: string) -> Operation {
@@ -64,7 +64,7 @@ inst_OpName :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: s
 }
 
 name :: proc(b: ^Builder, op1: Id, op2: string) {
-	append(&b.ops, inst_OpName(opbuf(b, 1 + (len(op2) + 4) / 4), op1, op2))
+	append_elem(&b.ops, inst_OpName(opbuf(b, 1 + (len(op2) + 4) / 4), op1, op2))
 }
 
 inst_OpMemberName :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: i64, op3: string) -> Operation {
@@ -76,7 +76,7 @@ inst_OpMemberName :: #force_inline proc "contextless" (buf: []Operand, op1: Id,
 }
 
 member_name :: proc(b: ^Builder, op1: Id, op2: i64, op3: string) {
-	append(&b.ops, inst_OpMemberName(opbuf(b, 1 + 1 + (len(op3) + 4) / 4), op1, op2, op3))
+	append_elem(&b.ops, inst_OpMemberName(opbuf(b, 1 + 1 + (len(op3) + 4) / 4), op1, op2, op3))
 }
 
 inst_OpString :: #force_inline proc "contextless" (buf: []Operand, result: Id, op1: string) -> Operation {
@@ -87,7 +87,7 @@ inst_OpString :: #force_inline proc "contextless" (buf: []Operand, result: Id, o
 
 string_ :: proc(b: ^Builder, op1: string) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpString(opbuf(b, (len(op1) + 4) / 4), r, op1))
+	append_elem(&b.ops, inst_OpString(opbuf(b, (len(op1) + 4) / 4), r, op1))
 	return r
 }
 
@@ -100,7 +100,7 @@ inst_OpLine :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: i
 }
 
 line :: proc(b: ^Builder, op1: Id, op2: i64, op3: i64) {
-	append(&b.ops, inst_OpLine(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpLine(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpExtension :: #force_inline proc "contextless" (buf: []Operand, op1: string) -> Operation {
@@ -110,7 +110,7 @@ inst_OpExtension :: #force_inline proc "contextless" (buf: []Operand, op1: strin
 }
 
 extension :: proc(b: ^Builder, op1: string) {
-	append(&b.ops, inst_OpExtension(opbuf(b, (len(op1) + 4) / 4), op1))
+	append_elem(&b.ops, inst_OpExtension(opbuf(b, (len(op1) + 4) / 4), op1))
 }
 
 inst_OpExtInstImport :: #force_inline proc "contextless" (buf: []Operand, result: Id, op1: string) -> Operation {
@@ -121,7 +121,7 @@ inst_OpExtInstImport :: #force_inline proc "contextless" (buf: []Operand, result
 
 ext_inst_import :: proc(b: ^Builder, op1: string) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpExtInstImport(opbuf(b, (len(op1) + 4) / 4), r, op1))
+	append_elem(&b.ops, inst_OpExtInstImport(opbuf(b, (len(op1) + 4) / 4), r, op1))
 	return r
 }
 
@@ -135,7 +135,7 @@ inst_OpExtInst :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 ext_inst :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpExtInst(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpExtInst(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -147,7 +147,7 @@ inst_OpMemoryModel :: #force_inline proc "contextless" (buf: []Operand, op1: Add
 }
 
 memory_model :: proc(b: ^Builder, op1: Addressing_Model, op2: Memory_Model) {
-	append(&b.ops, inst_OpMemoryModel(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpMemoryModel(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpEntryPoint :: #force_inline proc "contextless" (buf: []Operand, op1: Execution_Model, op2: Id, op3: string, op4: []Id) -> Operation {
@@ -160,7 +160,7 @@ inst_OpEntryPoint :: #force_inline proc "contextless" (buf: []Operand, op1: Exec
 }
 
 entry_point :: proc(b: ^Builder, op1: Execution_Model, op2: Id, op3: string, op4: []Id) {
-	append(&b.ops, inst_OpEntryPoint(opbuf(b, 1 + 1 + (len(op3) + 4) / 4 + len(op4)), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpEntryPoint(opbuf(b, 1 + 1 + (len(op3) + 4) / 4 + len(op4)), op1, op2, op3, op4))
 }
 
 inst_OpExecutionMode :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Execution_Mode) -> Operation {
@@ -171,7 +171,7 @@ inst_OpExecutionMode :: #force_inline proc "contextless" (buf: []Operand, op1: I
 }
 
 execution_mode :: proc(b: ^Builder, op1: Id, op2: Execution_Mode) {
-	append(&b.ops, inst_OpExecutionMode(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpExecutionMode(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpCapability :: #force_inline proc "contextless" (buf: []Operand, op1: Capability) -> Operation {
@@ -181,7 +181,7 @@ inst_OpCapability :: #force_inline proc "contextless" (buf: []Operand, op1: Capa
 }
 
 capability :: proc(b: ^Builder, op1: Capability) {
-	append(&b.ops, inst_OpCapability(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpCapability(opbuf(b, 1), op1))
 }
 
 inst_OpTypeVoid :: #force_inline proc "contextless" (result: Id) -> Operation {
@@ -190,7 +190,7 @@ inst_OpTypeVoid :: #force_inline proc "contextless" (result: Id) -> Operation {
 
 type_void_ :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeVoid(r))
+	append_elem(&b.ops, inst_OpTypeVoid(r))
 	return r
 }
 
@@ -200,7 +200,7 @@ inst_OpTypeBool :: #force_inline proc "contextless" (result: Id) -> Operation {
 
 type_bool_ :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeBool(r))
+	append_elem(&b.ops, inst_OpTypeBool(r))
 	return r
 }
 
@@ -213,7 +213,7 @@ inst_OpTypeInt :: #force_inline proc "contextless" (buf: []Operand, result: Id,
 
 type_int_ :: proc(b: ^Builder, op1: i64, op2: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeInt(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeInt(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -226,7 +226,7 @@ inst_OpTypeFloat :: #force_inline proc "contextless" (buf: []Operand, result: Id
 
 type_float_ :: proc(b: ^Builder, op1: i64, op2: Maybe(FP_Encoding)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeFloat(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeFloat(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -239,7 +239,7 @@ inst_OpTypeVector :: #force_inline proc "contextless" (buf: []Operand, result: I
 
 type_vector_ :: proc(b: ^Builder, op1: Id, op2: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeVector(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeVector(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -252,7 +252,7 @@ inst_OpTypeMatrix :: #force_inline proc "contextless" (buf: []Operand, result: I
 
 type_matrix :: proc(b: ^Builder, op1: Id, op2: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeMatrix(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeMatrix(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -271,7 +271,7 @@ inst_OpTypeImage :: #force_inline proc "contextless" (buf: []Operand, result: Id
 
 type_image :: proc(b: ^Builder, op1: Id, op2: Dim, op3: i64, op4: i64, op5: i64, op6: i64, op7: Image_Format, op8: Maybe(Access_Qualifier)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeImage(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpTypeImage(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -281,7 +281,7 @@ inst_OpTypeSampler :: #force_inline proc "contextless" (result: Id) -> Operation
 
 type_sampler :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeSampler(r))
+	append_elem(&b.ops, inst_OpTypeSampler(r))
 	return r
 }
 
@@ -293,7 +293,7 @@ inst_OpTypeSampledImage :: #force_inline proc "contextless" (buf: []Operand, res
 
 type_sampled_image :: proc(b: ^Builder, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeSampledImage(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpTypeSampledImage(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -306,7 +306,7 @@ inst_OpTypeArray :: #force_inline proc "contextless" (buf: []Operand, result: Id
 
 type_array_ :: proc(b: ^Builder, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeArray(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeArray(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -318,7 +318,7 @@ inst_OpTypeRuntimeArray :: #force_inline proc "contextless" (buf: []Operand, res
 
 type_runtime_array :: proc(b: ^Builder, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeRuntimeArray(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpTypeRuntimeArray(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -330,7 +330,7 @@ inst_OpTypeStruct :: #force_inline proc "contextless" (buf: []Operand, result: I
 
 type_struct :: proc(b: ^Builder, op1: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeStruct(opbuf(b, len(op1)), r, op1))
+	append_elem(&b.ops, inst_OpTypeStruct(opbuf(b, len(op1)), r, op1))
 	return r
 }
 
@@ -342,7 +342,7 @@ inst_OpTypeOpaque :: #force_inline proc "contextless" (buf: []Operand, result: I
 
 type_opaque :: proc(b: ^Builder, op1: string) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeOpaque(opbuf(b, (len(op1) + 4) / 4), r, op1))
+	append_elem(&b.ops, inst_OpTypeOpaque(opbuf(b, (len(op1) + 4) / 4), r, op1))
 	return r
 }
 
@@ -355,7 +355,7 @@ inst_OpTypePointer :: #force_inline proc "contextless" (buf: []Operand, result:
 
 type_pointer_ :: proc(b: ^Builder, op1: Storage_Class, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypePointer(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypePointer(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -368,7 +368,7 @@ inst_OpTypeFunction :: #force_inline proc "contextless" (buf: []Operand, result:
 
 type_function :: proc(b: ^Builder, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeFunction(opbuf(b, 1 + len(op2)), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeFunction(opbuf(b, 1 + len(op2)), r, op1, op2))
 	return r
 }
 
@@ -378,7 +378,7 @@ inst_OpTypeEvent :: #force_inline proc "contextless" (result: Id) -> Operation {
 
 type_event :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeEvent(r))
+	append_elem(&b.ops, inst_OpTypeEvent(r))
 	return r
 }
 
@@ -388,7 +388,7 @@ inst_OpTypeDeviceEvent :: #force_inline proc "contextless" (result: Id) -> Opera
 
 type_device_event :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeDeviceEvent(r))
+	append_elem(&b.ops, inst_OpTypeDeviceEvent(r))
 	return r
 }
 
@@ -398,7 +398,7 @@ inst_OpTypeReserveId :: #force_inline proc "contextless" (result: Id) -> Operati
 
 type_reserve_id :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeReserveId(r))
+	append_elem(&b.ops, inst_OpTypeReserveId(r))
 	return r
 }
 
@@ -408,7 +408,7 @@ inst_OpTypeQueue :: #force_inline proc "contextless" (result: Id) -> Operation {
 
 type_queue :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeQueue(r))
+	append_elem(&b.ops, inst_OpTypeQueue(r))
 	return r
 }
 
@@ -420,7 +420,7 @@ inst_OpTypePipe :: #force_inline proc "contextless" (buf: []Operand, result: Id,
 
 type_pipe :: proc(b: ^Builder, op1: Access_Qualifier) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypePipe(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpTypePipe(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -432,7 +432,7 @@ inst_OpTypeForwardPointer :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 type_forward_pointer :: proc(b: ^Builder, op1: Id, op2: Storage_Class) {
-	append(&b.ops, inst_OpTypeForwardPointer(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpTypeForwardPointer(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpConstantTrue :: #force_inline proc "contextless" (result_type: Type_Ref, result: Id) -> Operation {
@@ -441,7 +441,7 @@ inst_OpConstantTrue :: #force_inline proc "contextless" (result_type: Type_Ref,
 
 constant_true :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantTrue(result_type, r))
+	append_elem(&b.ops, inst_OpConstantTrue(result_type, r))
 	return r
 }
 
@@ -451,7 +451,7 @@ inst_OpConstantFalse :: #force_inline proc "contextless" (result_type: Type_Ref,
 
 constant_false :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantFalse(result_type, r))
+	append_elem(&b.ops, inst_OpConstantFalse(result_type, r))
 	return r
 }
 
@@ -463,7 +463,7 @@ inst_OpConstant :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 constant :: proc(b: ^Builder, result_type: Type_Ref, op1: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstant(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConstant(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -475,7 +475,7 @@ inst_OpConstantComposite :: #force_inline proc "contextless" (buf: []Operand, re
 
 constant_composite :: proc(b: ^Builder, result_type: Type_Ref, op1: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantComposite(opbuf(b, len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConstantComposite(opbuf(b, len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -489,7 +489,7 @@ inst_OpConstantSampler :: #force_inline proc "contextless" (buf: []Operand, resu
 
 constant_sampler :: proc(b: ^Builder, result_type: Type_Ref, op1: Sampler_Addressing_Mode, op2: i64, op3: Sampler_Filter_Mode) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantSampler(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpConstantSampler(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -499,7 +499,7 @@ inst_OpConstantNull :: #force_inline proc "contextless" (result_type: Type_Ref,
 
 constant_null :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantNull(result_type, r))
+	append_elem(&b.ops, inst_OpConstantNull(result_type, r))
 	return r
 }
 
@@ -509,7 +509,7 @@ inst_OpSpecConstantTrue :: #force_inline proc "contextless" (result_type: Type_R
 
 spec_constant_true :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantTrue(result_type, r))
+	append_elem(&b.ops, inst_OpSpecConstantTrue(result_type, r))
 	return r
 }
 
@@ -519,7 +519,7 @@ inst_OpSpecConstantFalse :: #force_inline proc "contextless" (result_type: Type_
 
 spec_constant_false :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantFalse(result_type, r))
+	append_elem(&b.ops, inst_OpSpecConstantFalse(result_type, r))
 	return r
 }
 
@@ -531,7 +531,7 @@ inst_OpSpecConstant :: #force_inline proc "contextless" (buf: []Operand, result_
 
 spec_constant :: proc(b: ^Builder, result_type: Type_Ref, op1: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstant(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSpecConstant(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -543,7 +543,7 @@ inst_OpSpecConstantComposite :: #force_inline proc "contextless" (buf: []Operand
 
 spec_constant_composite :: proc(b: ^Builder, result_type: Type_Ref, op1: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantComposite(opbuf(b, len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSpecConstantComposite(opbuf(b, len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -555,7 +555,7 @@ inst_OpSpecConstantOp :: #force_inline proc "contextless" (buf: []Operand, resul
 
 spec_constant_op :: proc(b: ^Builder, result_type: Type_Ref, op1: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantOp(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSpecConstantOp(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -568,7 +568,7 @@ inst_OpFunction :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 function :: proc(b: ^Builder, result_type: Type_Ref, op1: Function_Control, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFunction(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFunction(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -578,7 +578,7 @@ inst_OpFunctionParameter :: #force_inline proc "contextless" (result_type: Type_
 
 function_parameter :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFunctionParameter(result_type, r))
+	append_elem(&b.ops, inst_OpFunctionParameter(result_type, r))
 	return r
 }
 
@@ -587,7 +587,7 @@ inst_OpFunctionEnd :: #force_inline proc "contextless" () -> Operation {
 }
 
 function_end :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpFunctionEnd())
+	append_elem(&b.ops, inst_OpFunctionEnd())
 }
 
 inst_OpFunctionCall :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: []Id) -> Operation {
@@ -599,7 +599,7 @@ inst_OpFunctionCall :: #force_inline proc "contextless" (buf: []Operand, result_
 
 function_call :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFunctionCall(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFunctionCall(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -612,7 +612,7 @@ inst_OpVariable :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 variable :: proc(b: ^Builder, result_type: Type_Ref, op1: Storage_Class, op2: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpVariable(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpVariable(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -626,7 +626,7 @@ inst_OpImageTexelPointer :: #force_inline proc "contextless" (buf: []Operand, re
 
 image_texel_pointer :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageTexelPointer(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageTexelPointer(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -639,7 +639,7 @@ inst_OpLoad :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 load :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Maybe(Memory_Access)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpLoad(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpLoad(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -652,7 +652,7 @@ inst_OpStore :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2:
 }
 
 store :: proc(b: ^Builder, op1: Id, op2: Id, op3: Maybe(Memory_Access)) {
-	append(&b.ops, inst_OpStore(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpStore(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpCopyMemory :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Maybe(Memory_Access), op4: Maybe(Memory_Access)) -> Operation {
@@ -665,7 +665,7 @@ inst_OpCopyMemory :: #force_inline proc "contextless" (buf: []Operand, op1: Id,
 }
 
 copy_memory :: proc(b: ^Builder, op1: Id, op2: Id, op3: Maybe(Memory_Access), op4: Maybe(Memory_Access)) {
-	append(&b.ops, inst_OpCopyMemory(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpCopyMemory(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpCopyMemorySized :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Maybe(Memory_Access), op5: Maybe(Memory_Access)) -> Operation {
@@ -679,7 +679,7 @@ inst_OpCopyMemorySized :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 copy_memory_sized :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Maybe(Memory_Access), op5: Maybe(Memory_Access)) {
-	append(&b.ops, inst_OpCopyMemorySized(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpCopyMemorySized(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpAccessChain :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: []Id) -> Operation {
@@ -691,7 +691,7 @@ inst_OpAccessChain :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 access_chain :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAccessChain(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpAccessChain(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -704,7 +704,7 @@ inst_OpInBoundsAccessChain :: #force_inline proc "contextless" (buf: []Operand,
 
 in_bounds_access_chain :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpInBoundsAccessChain(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpInBoundsAccessChain(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -718,7 +718,7 @@ inst_OpPtrAccessChain :: #force_inline proc "contextless" (buf: []Operand, resul
 
 ptr_access_chain :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPtrAccessChain(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpPtrAccessChain(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -731,7 +731,7 @@ inst_OpArrayLength :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 array_length :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArrayLength(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpArrayLength(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -743,7 +743,7 @@ inst_OpGenericPtrMemSemantics :: #force_inline proc "contextless" (buf: []Operan
 
 generic_ptr_mem_semantics :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGenericPtrMemSemantics(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpGenericPtrMemSemantics(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -757,7 +757,7 @@ inst_OpInBoundsPtrAccessChain :: #force_inline proc "contextless" (buf: []Operan
 
 in_bounds_ptr_access_chain :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpInBoundsPtrAccessChain(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpInBoundsPtrAccessChain(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -769,7 +769,7 @@ inst_OpDecorate :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op
 }
 
 decorate :: proc(b: ^Builder, op1: Id, op2: Decoration) {
-	append(&b.ops, inst_OpDecorate(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpDecorate(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpMemberDecorate :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: i64, op3: Decoration) -> Operation {
@@ -781,7 +781,7 @@ inst_OpMemberDecorate :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 member_decorate :: proc(b: ^Builder, op1: Id, op2: i64, op3: Decoration) {
-	append(&b.ops, inst_OpMemberDecorate(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpMemberDecorate(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpDecorationGroup :: #force_inline proc "contextless" (result: Id) -> Operation {
@@ -790,7 +790,7 @@ inst_OpDecorationGroup :: #force_inline proc "contextless" (result: Id) -> Opera
 
 decoration_group :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDecorationGroup(r))
+	append_elem(&b.ops, inst_OpDecorationGroup(r))
 	return r
 }
 
@@ -802,7 +802,7 @@ inst_OpGroupDecorate :: #force_inline proc "contextless" (buf: []Operand, op1: I
 }
 
 group_decorate :: proc(b: ^Builder, op1: Id, op2: []Id) {
-	append(&b.ops, inst_OpGroupDecorate(opbuf(b, 1 + len(op2)), op1, op2))
+	append_elem(&b.ops, inst_OpGroupDecorate(opbuf(b, 1 + len(op2)), op1, op2))
 }
 
 inst_OpGroupMemberDecorate :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: []Pair_Id_Lit) -> Operation {
@@ -813,7 +813,7 @@ inst_OpGroupMemberDecorate :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 group_member_decorate :: proc(b: ^Builder, op1: Id, op2: []Pair_Id_Lit) {
-	append(&b.ops, inst_OpGroupMemberDecorate(opbuf(b, 1 + 2 * len(op2)), op1, op2))
+	append_elem(&b.ops, inst_OpGroupMemberDecorate(opbuf(b, 1 + 2 * len(op2)), op1, op2))
 }
 
 inst_OpVectorExtractDynamic :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id) -> Operation {
@@ -825,7 +825,7 @@ inst_OpVectorExtractDynamic :: #force_inline proc "contextless" (buf: []Operand,
 
 vector_extract_dynamic :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpVectorExtractDynamic(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpVectorExtractDynamic(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -839,7 +839,7 @@ inst_OpVectorInsertDynamic :: #force_inline proc "contextless" (buf: []Operand,
 
 vector_insert_dynamic :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpVectorInsertDynamic(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpVectorInsertDynamic(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -853,7 +853,7 @@ inst_OpVectorShuffle :: #force_inline proc "contextless" (buf: []Operand, result
 
 vector_shuffle :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: []i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpVectorShuffle(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpVectorShuffle(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -865,7 +865,7 @@ inst_OpCompositeConstruct :: #force_inline proc "contextless" (buf: []Operand, r
 
 composite_construct :: proc(b: ^Builder, result_type: Type_Ref, op1: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCompositeConstruct(opbuf(b, len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCompositeConstruct(opbuf(b, len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -878,7 +878,7 @@ inst_OpCompositeExtract :: #force_inline proc "contextless" (buf: []Operand, res
 
 composite_extract :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCompositeExtract(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpCompositeExtract(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -892,7 +892,7 @@ inst_OpCompositeInsert :: #force_inline proc "contextless" (buf: []Operand, resu
 
 composite_insert :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: []i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCompositeInsert(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpCompositeInsert(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -904,7 +904,7 @@ inst_OpCopyObject :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 copy_object :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCopyObject(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCopyObject(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -916,7 +916,7 @@ inst_OpTranspose :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 transpose :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTranspose(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpTranspose(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -929,7 +929,7 @@ inst_OpSampledImage :: #force_inline proc "contextless" (buf: []Operand, result_
 
 sampled_image :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSampledImage(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSampledImage(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -943,7 +943,7 @@ inst_OpImageSampleImplicitLod :: #force_inline proc "contextless" (buf: []Operan
 
 image_sample_implicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleImplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSampleImplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -957,7 +957,7 @@ inst_OpImageSampleExplicitLod :: #force_inline proc "contextless" (buf: []Operan
 
 image_sample_explicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Image_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleExplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSampleExplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -972,7 +972,7 @@ inst_OpImageSampleDrefImplicitLod :: #force_inline proc "contextless" (buf: []Op
 
 image_sample_dref_implicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleDrefImplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSampleDrefImplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -987,7 +987,7 @@ inst_OpImageSampleDrefExplicitLod :: #force_inline proc "contextless" (buf: []Op
 
 image_sample_dref_explicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Image_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleDrefExplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSampleDrefExplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -1001,7 +1001,7 @@ inst_OpImageSampleProjImplicitLod :: #force_inline proc "contextless" (buf: []Op
 
 image_sample_proj_implicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleProjImplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSampleProjImplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -1015,7 +1015,7 @@ inst_OpImageSampleProjExplicitLod :: #force_inline proc "contextless" (buf: []Op
 
 image_sample_proj_explicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Image_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleProjExplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSampleProjExplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -1030,7 +1030,7 @@ inst_OpImageSampleProjDrefImplicitLod :: #force_inline proc "contextless" (buf:
 
 image_sample_proj_dref_implicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleProjDrefImplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSampleProjDrefImplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -1045,7 +1045,7 @@ inst_OpImageSampleProjDrefExplicitLod :: #force_inline proc "contextless" (buf:
 
 image_sample_proj_dref_explicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Image_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleProjDrefExplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSampleProjDrefExplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -1059,7 +1059,7 @@ inst_OpImageFetch :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 image_fetch :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageFetch(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageFetch(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -1074,7 +1074,7 @@ inst_OpImageGather :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 image_gather :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageGather(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageGather(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -1089,7 +1089,7 @@ inst_OpImageDrefGather :: #force_inline proc "contextless" (buf: []Operand, resu
 
 image_dref_gather :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageDrefGather(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageDrefGather(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -1103,7 +1103,7 @@ inst_OpImageRead :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 image_read :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageRead(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageRead(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -1117,7 +1117,7 @@ inst_OpImageWrite :: #force_inline proc "contextless" (buf: []Operand, op1: Id,
 }
 
 image_write :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) {
-	append(&b.ops, inst_OpImageWrite(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageWrite(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpImage :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -1128,7 +1128,7 @@ inst_OpImage :: #force_inline proc "contextless" (buf: []Operand, result_type: T
 
 image :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImage(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpImage(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1140,7 +1140,7 @@ inst_OpImageQueryFormat :: #force_inline proc "contextless" (buf: []Operand, res
 
 image_query_format :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageQueryFormat(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpImageQueryFormat(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1152,7 +1152,7 @@ inst_OpImageQueryOrder :: #force_inline proc "contextless" (buf: []Operand, resu
 
 image_query_order :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageQueryOrder(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpImageQueryOrder(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1165,7 +1165,7 @@ inst_OpImageQuerySizeLod :: #force_inline proc "contextless" (buf: []Operand, re
 
 image_query_size_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageQuerySizeLod(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpImageQuerySizeLod(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1177,7 +1177,7 @@ inst_OpImageQuerySize :: #force_inline proc "contextless" (buf: []Operand, resul
 
 image_query_size :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageQuerySize(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpImageQuerySize(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1190,7 +1190,7 @@ inst_OpImageQueryLod :: #force_inline proc "contextless" (buf: []Operand, result
 
 image_query_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageQueryLod(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpImageQueryLod(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1202,7 +1202,7 @@ inst_OpImageQueryLevels :: #force_inline proc "contextless" (buf: []Operand, res
 
 image_query_levels :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageQueryLevels(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpImageQueryLevels(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1214,7 +1214,7 @@ inst_OpImageQuerySamples :: #force_inline proc "contextless" (buf: []Operand, re
 
 image_query_samples :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageQuerySamples(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpImageQuerySamples(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1226,7 +1226,7 @@ inst_OpConvertFToU :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 convert_f_to_u :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertFToU(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertFToU(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1238,7 +1238,7 @@ inst_OpConvertFToS :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 convert_f_to_s :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertFToS(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertFToS(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1250,7 +1250,7 @@ inst_OpConvertSToF :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 convert_s_to_f :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertSToF(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertSToF(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1262,7 +1262,7 @@ inst_OpConvertUToF :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 convert_u_to_f :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertUToF(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertUToF(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1274,7 +1274,7 @@ inst_OpUConvert :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 u_convert :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUConvert(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpUConvert(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1286,7 +1286,7 @@ inst_OpSConvert :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 s_convert :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSConvert(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSConvert(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1298,7 +1298,7 @@ inst_OpFConvert :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 f_convert :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFConvert(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFConvert(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1310,7 +1310,7 @@ inst_OpQuantizeToF16 :: #force_inline proc "contextless" (buf: []Operand, result
 
 quantize_to_f16 :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpQuantizeToF16(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpQuantizeToF16(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1322,7 +1322,7 @@ inst_OpConvertPtrToU :: #force_inline proc "contextless" (buf: []Operand, result
 
 convert_ptr_to_u :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertPtrToU(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertPtrToU(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1334,7 +1334,7 @@ inst_OpSatConvertSToU :: #force_inline proc "contextless" (buf: []Operand, resul
 
 sat_convert_s_to_u :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSatConvertSToU(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSatConvertSToU(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1346,7 +1346,7 @@ inst_OpSatConvertUToS :: #force_inline proc "contextless" (buf: []Operand, resul
 
 sat_convert_u_to_s :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSatConvertUToS(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSatConvertUToS(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1358,7 +1358,7 @@ inst_OpConvertUToPtr :: #force_inline proc "contextless" (buf: []Operand, result
 
 convert_u_to_ptr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertUToPtr(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertUToPtr(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1370,7 +1370,7 @@ inst_OpPtrCastToGeneric :: #force_inline proc "contextless" (buf: []Operand, res
 
 ptr_cast_to_generic :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPtrCastToGeneric(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpPtrCastToGeneric(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1382,7 +1382,7 @@ inst_OpGenericCastToPtr :: #force_inline proc "contextless" (buf: []Operand, res
 
 generic_cast_to_ptr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGenericCastToPtr(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpGenericCastToPtr(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1395,7 +1395,7 @@ inst_OpGenericCastToPtrExplicit :: #force_inline proc "contextless" (buf: []Oper
 
 generic_cast_to_ptr_explicit :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Storage_Class) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGenericCastToPtrExplicit(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGenericCastToPtrExplicit(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1407,7 +1407,7 @@ inst_OpBitcast :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 bitcast :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitcast(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpBitcast(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1419,7 +1419,7 @@ inst_OpSNegate :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 s_negate :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSNegate(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSNegate(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1431,7 +1431,7 @@ inst_OpFNegate :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 f_negate :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFNegate(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFNegate(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1444,7 +1444,7 @@ inst_OpIAdd :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 i_add :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIAdd(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIAdd(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1457,7 +1457,7 @@ inst_OpFAdd :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 f_add :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFAdd(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFAdd(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1470,7 +1470,7 @@ inst_OpISub :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 i_sub :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpISub(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpISub(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1483,7 +1483,7 @@ inst_OpFSub :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 f_sub :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFSub(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFSub(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1496,7 +1496,7 @@ inst_OpIMul :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 i_mul :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIMul(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIMul(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1509,7 +1509,7 @@ inst_OpFMul :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 f_mul :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFMul(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFMul(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1522,7 +1522,7 @@ inst_OpUDiv :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 u_div :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUDiv(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUDiv(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1535,7 +1535,7 @@ inst_OpSDiv :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 s_div :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSDiv(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSDiv(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1548,7 +1548,7 @@ inst_OpFDiv :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 f_div :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFDiv(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFDiv(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1561,7 +1561,7 @@ inst_OpUMod :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 u_mod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUMod(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUMod(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1574,7 +1574,7 @@ inst_OpSRem :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 s_rem :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSRem(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSRem(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1587,7 +1587,7 @@ inst_OpSMod :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 s_mod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSMod(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSMod(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1600,7 +1600,7 @@ inst_OpFRem :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 f_rem :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFRem(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFRem(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1613,7 +1613,7 @@ inst_OpFMod :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 f_mod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFMod(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFMod(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1626,7 +1626,7 @@ inst_OpVectorTimesScalar :: #force_inline proc "contextless" (buf: []Operand, re
 
 vector_times_scalar :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpVectorTimesScalar(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpVectorTimesScalar(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1639,7 +1639,7 @@ inst_OpMatrixTimesScalar :: #force_inline proc "contextless" (buf: []Operand, re
 
 matrix_times_scalar :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpMatrixTimesScalar(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpMatrixTimesScalar(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1652,7 +1652,7 @@ inst_OpVectorTimesMatrix :: #force_inline proc "contextless" (buf: []Operand, re
 
 vector_times_matrix :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpVectorTimesMatrix(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpVectorTimesMatrix(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1665,7 +1665,7 @@ inst_OpMatrixTimesVector :: #force_inline proc "contextless" (buf: []Operand, re
 
 matrix_times_vector :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpMatrixTimesVector(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpMatrixTimesVector(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1678,7 +1678,7 @@ inst_OpMatrixTimesMatrix :: #force_inline proc "contextless" (buf: []Operand, re
 
 matrix_times_matrix :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpMatrixTimesMatrix(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpMatrixTimesMatrix(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1691,7 +1691,7 @@ inst_OpOuterProduct :: #force_inline proc "contextless" (buf: []Operand, result_
 
 outer_product :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpOuterProduct(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpOuterProduct(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1704,7 +1704,7 @@ inst_OpDot :: #force_inline proc "contextless" (buf: []Operand, result_type: Typ
 
 dot :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDot(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpDot(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1717,7 +1717,7 @@ inst_OpIAddCarry :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 i_add_carry :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIAddCarry(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIAddCarry(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1730,7 +1730,7 @@ inst_OpISubBorrow :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 i_sub_borrow :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpISubBorrow(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpISubBorrow(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1743,7 +1743,7 @@ inst_OpUMulExtended :: #force_inline proc "contextless" (buf: []Operand, result_
 
 u_mul_extended :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUMulExtended(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUMulExtended(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1756,7 +1756,7 @@ inst_OpSMulExtended :: #force_inline proc "contextless" (buf: []Operand, result_
 
 s_mul_extended :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSMulExtended(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSMulExtended(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1768,7 +1768,7 @@ inst_OpAny :: #force_inline proc "contextless" (buf: []Operand, result_type: Typ
 
 any_ :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAny(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpAny(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1780,7 +1780,7 @@ inst_OpAll :: #force_inline proc "contextless" (buf: []Operand, result_type: Typ
 
 all :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAll(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpAll(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1792,7 +1792,7 @@ inst_OpIsNan :: #force_inline proc "contextless" (buf: []Operand, result_type: T
 
 is_nan :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIsNan(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpIsNan(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1804,7 +1804,7 @@ inst_OpIsInf :: #force_inline proc "contextless" (buf: []Operand, result_type: T
 
 is_inf :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIsInf(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpIsInf(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1816,7 +1816,7 @@ inst_OpIsFinite :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 is_finite :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIsFinite(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpIsFinite(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1828,7 +1828,7 @@ inst_OpIsNormal :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 is_normal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIsNormal(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpIsNormal(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1840,7 +1840,7 @@ inst_OpSignBitSet :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 sign_bit_set :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSignBitSet(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSignBitSet(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1853,7 +1853,7 @@ inst_OpLessOrGreater :: #force_inline proc "contextless" (buf: []Operand, result
 
 less_or_greater :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpLessOrGreater(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpLessOrGreater(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1866,7 +1866,7 @@ inst_OpOrdered :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 ordered :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpOrdered(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpOrdered(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1879,7 +1879,7 @@ inst_OpUnordered :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 unordered :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUnordered(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUnordered(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1892,7 +1892,7 @@ inst_OpLogicalEqual :: #force_inline proc "contextless" (buf: []Operand, result_
 
 logical_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpLogicalEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpLogicalEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1905,7 +1905,7 @@ inst_OpLogicalNotEqual :: #force_inline proc "contextless" (buf: []Operand, resu
 
 logical_not_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpLogicalNotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpLogicalNotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1918,7 +1918,7 @@ inst_OpLogicalOr :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 logical_or :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpLogicalOr(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpLogicalOr(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1931,7 +1931,7 @@ inst_OpLogicalAnd :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 logical_and :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpLogicalAnd(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpLogicalAnd(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1943,7 +1943,7 @@ inst_OpLogicalNot :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 logical_not :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpLogicalNot(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpLogicalNot(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -1957,7 +1957,7 @@ inst_OpSelect :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 select :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSelect(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSelect(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -1970,7 +1970,7 @@ inst_OpIEqual :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 i_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1983,7 +1983,7 @@ inst_OpINotEqual :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 i_not_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpINotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpINotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -1996,7 +1996,7 @@ inst_OpUGreaterThan :: #force_inline proc "contextless" (buf: []Operand, result_
 
 u_greater_than :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUGreaterThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUGreaterThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2009,7 +2009,7 @@ inst_OpSGreaterThan :: #force_inline proc "contextless" (buf: []Operand, result_
 
 s_greater_than :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSGreaterThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSGreaterThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2022,7 +2022,7 @@ inst_OpUGreaterThanEqual :: #force_inline proc "contextless" (buf: []Operand, re
 
 u_greater_than_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUGreaterThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUGreaterThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2035,7 +2035,7 @@ inst_OpSGreaterThanEqual :: #force_inline proc "contextless" (buf: []Operand, re
 
 s_greater_than_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSGreaterThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSGreaterThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2048,7 +2048,7 @@ inst_OpULessThan :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 u_less_than :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpULessThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpULessThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2061,7 +2061,7 @@ inst_OpSLessThan :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 s_less_than :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSLessThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSLessThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2074,7 +2074,7 @@ inst_OpULessThanEqual :: #force_inline proc "contextless" (buf: []Operand, resul
 
 u_less_than_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpULessThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpULessThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2087,7 +2087,7 @@ inst_OpSLessThanEqual :: #force_inline proc "contextless" (buf: []Operand, resul
 
 s_less_than_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSLessThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSLessThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2100,7 +2100,7 @@ inst_OpFOrdEqual :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 f_ord_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFOrdEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFOrdEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2113,7 +2113,7 @@ inst_OpFUnordEqual :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 f_unord_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFUnordEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFUnordEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2126,7 +2126,7 @@ inst_OpFOrdNotEqual :: #force_inline proc "contextless" (buf: []Operand, result_
 
 f_ord_not_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFOrdNotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFOrdNotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2139,7 +2139,7 @@ inst_OpFUnordNotEqual :: #force_inline proc "contextless" (buf: []Operand, resul
 
 f_unord_not_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFUnordNotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFUnordNotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2152,7 +2152,7 @@ inst_OpFOrdLessThan :: #force_inline proc "contextless" (buf: []Operand, result_
 
 f_ord_less_than :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFOrdLessThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFOrdLessThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2165,7 +2165,7 @@ inst_OpFUnordLessThan :: #force_inline proc "contextless" (buf: []Operand, resul
 
 f_unord_less_than :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFUnordLessThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFUnordLessThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2178,7 +2178,7 @@ inst_OpFOrdGreaterThan :: #force_inline proc "contextless" (buf: []Operand, resu
 
 f_ord_greater_than :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFOrdGreaterThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFOrdGreaterThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2191,7 +2191,7 @@ inst_OpFUnordGreaterThan :: #force_inline proc "contextless" (buf: []Operand, re
 
 f_unord_greater_than :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFUnordGreaterThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFUnordGreaterThan(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2204,7 +2204,7 @@ inst_OpFOrdLessThanEqual :: #force_inline proc "contextless" (buf: []Operand, re
 
 f_ord_less_than_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFOrdLessThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFOrdLessThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2217,7 +2217,7 @@ inst_OpFUnordLessThanEqual :: #force_inline proc "contextless" (buf: []Operand,
 
 f_unord_less_than_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFUnordLessThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFUnordLessThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2230,7 +2230,7 @@ inst_OpFOrdGreaterThanEqual :: #force_inline proc "contextless" (buf: []Operand,
 
 f_ord_greater_than_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFOrdGreaterThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFOrdGreaterThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2243,7 +2243,7 @@ inst_OpFUnordGreaterThanEqual :: #force_inline proc "contextless" (buf: []Operan
 
 f_unord_greater_than_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFUnordGreaterThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFUnordGreaterThanEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2256,7 +2256,7 @@ inst_OpShiftRightLogical :: #force_inline proc "contextless" (buf: []Operand, re
 
 shift_right_logical :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpShiftRightLogical(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpShiftRightLogical(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2269,7 +2269,7 @@ inst_OpShiftRightArithmetic :: #force_inline proc "contextless" (buf: []Operand,
 
 shift_right_arithmetic :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpShiftRightArithmetic(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpShiftRightArithmetic(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2282,7 +2282,7 @@ inst_OpShiftLeftLogical :: #force_inline proc "contextless" (buf: []Operand, res
 
 shift_left_logical :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpShiftLeftLogical(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpShiftLeftLogical(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2295,7 +2295,7 @@ inst_OpBitwiseOr :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 bitwise_or :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitwiseOr(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpBitwiseOr(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2308,7 +2308,7 @@ inst_OpBitwiseXor :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 bitwise_xor :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitwiseXor(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpBitwiseXor(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2321,7 +2321,7 @@ inst_OpBitwiseAnd :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 bitwise_and :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitwiseAnd(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpBitwiseAnd(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2333,7 +2333,7 @@ inst_OpNot :: #force_inline proc "contextless" (buf: []Operand, result_type: Typ
 
 not :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpNot(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpNot(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2348,7 +2348,7 @@ inst_OpBitFieldInsert :: #force_inline proc "contextless" (buf: []Operand, resul
 
 bit_field_insert :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitFieldInsert(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpBitFieldInsert(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2362,7 +2362,7 @@ inst_OpBitFieldSExtract :: #force_inline proc "contextless" (buf: []Operand, res
 
 bit_field_s_extract :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitFieldSExtract(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpBitFieldSExtract(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -2376,7 +2376,7 @@ inst_OpBitFieldUExtract :: #force_inline proc "contextless" (buf: []Operand, res
 
 bit_field_u_extract :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitFieldUExtract(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpBitFieldUExtract(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -2388,7 +2388,7 @@ inst_OpBitReverse :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 bit_reverse :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitReverse(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpBitReverse(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2400,7 +2400,7 @@ inst_OpBitCount :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 bit_count :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitCount(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpBitCount(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2412,7 +2412,7 @@ inst_OpDPdx :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 d_pdx :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDPdx(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpDPdx(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2424,7 +2424,7 @@ inst_OpDPdy :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 d_pdy :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDPdy(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpDPdy(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2436,7 +2436,7 @@ inst_OpFwidth :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 fwidth :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFwidth(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFwidth(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2448,7 +2448,7 @@ inst_OpDPdxFine :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 d_pdx_fine :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDPdxFine(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpDPdxFine(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2460,7 +2460,7 @@ inst_OpDPdyFine :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 d_pdy_fine :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDPdyFine(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpDPdyFine(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2472,7 +2472,7 @@ inst_OpFwidthFine :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 fwidth_fine :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFwidthFine(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFwidthFine(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2484,7 +2484,7 @@ inst_OpDPdxCoarse :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 d_pdx_coarse :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDPdxCoarse(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpDPdxCoarse(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2496,7 +2496,7 @@ inst_OpDPdyCoarse :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 d_pdy_coarse :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDPdyCoarse(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpDPdyCoarse(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2508,7 +2508,7 @@ inst_OpFwidthCoarse :: #force_inline proc "contextless" (buf: []Operand, result_
 
 fwidth_coarse :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFwidthCoarse(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFwidthCoarse(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -2517,7 +2517,7 @@ inst_OpEmitVertex :: #force_inline proc "contextless" () -> Operation {
 }
 
 emit_vertex :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpEmitVertex())
+	append_elem(&b.ops, inst_OpEmitVertex())
 }
 
 inst_OpEndPrimitive :: #force_inline proc "contextless" () -> Operation {
@@ -2525,7 +2525,7 @@ inst_OpEndPrimitive :: #force_inline proc "contextless" () -> Operation {
 }
 
 end_primitive :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpEndPrimitive())
+	append_elem(&b.ops, inst_OpEndPrimitive())
 }
 
 inst_OpEmitStreamVertex :: #force_inline proc "contextless" (buf: []Operand, op1: Id) -> Operation {
@@ -2535,7 +2535,7 @@ inst_OpEmitStreamVertex :: #force_inline proc "contextless" (buf: []Operand, op1
 }
 
 emit_stream_vertex :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpEmitStreamVertex(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpEmitStreamVertex(opbuf(b, 1), op1))
 }
 
 inst_OpEndStreamPrimitive :: #force_inline proc "contextless" (buf: []Operand, op1: Id) -> Operation {
@@ -2545,7 +2545,7 @@ inst_OpEndStreamPrimitive :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 end_stream_primitive :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpEndStreamPrimitive(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpEndStreamPrimitive(opbuf(b, 1), op1))
 }
 
 inst_OpControlBarrier :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id) -> Operation {
@@ -2557,7 +2557,7 @@ inst_OpControlBarrier :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 control_barrier :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpControlBarrier(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpControlBarrier(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpMemoryBarrier :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id) -> Operation {
@@ -2568,7 +2568,7 @@ inst_OpMemoryBarrier :: #force_inline proc "contextless" (buf: []Operand, op1: I
 }
 
 memory_barrier :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpMemoryBarrier(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpMemoryBarrier(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpAtomicLoad :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id) -> Operation {
@@ -2581,7 +2581,7 @@ inst_OpAtomicLoad :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 atomic_load :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicLoad(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpAtomicLoad(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -2595,7 +2595,7 @@ inst_OpAtomicStore :: #force_inline proc "contextless" (buf: []Operand, op1: Id,
 }
 
 atomic_store :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id) {
-	append(&b.ops, inst_OpAtomicStore(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicStore(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpAtomicExchange :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id) -> Operation {
@@ -2609,7 +2609,7 @@ inst_OpAtomicExchange :: #force_inline proc "contextless" (buf: []Operand, resul
 
 atomic_exchange :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicExchange(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicExchange(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2626,7 +2626,7 @@ inst_OpAtomicCompareExchange :: #force_inline proc "contextless" (buf: []Operand
 
 atomic_compare_exchange :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicCompareExchange(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpAtomicCompareExchange(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -2643,7 +2643,7 @@ inst_OpAtomicCompareExchangeWeak :: #force_inline proc "contextless" (buf: []Ope
 
 atomic_compare_exchange_weak :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicCompareExchangeWeak(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpAtomicCompareExchangeWeak(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -2657,7 +2657,7 @@ inst_OpAtomicIIncrement :: #force_inline proc "contextless" (buf: []Operand, res
 
 atomic_i_increment :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicIIncrement(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpAtomicIIncrement(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -2671,7 +2671,7 @@ inst_OpAtomicIDecrement :: #force_inline proc "contextless" (buf: []Operand, res
 
 atomic_i_decrement :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicIDecrement(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpAtomicIDecrement(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -2686,7 +2686,7 @@ inst_OpAtomicIAdd :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 atomic_i_add :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicIAdd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicIAdd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2701,7 +2701,7 @@ inst_OpAtomicISub :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 atomic_i_sub :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicISub(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicISub(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2716,7 +2716,7 @@ inst_OpAtomicSMin :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 atomic_s_min :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicSMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicSMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2731,7 +2731,7 @@ inst_OpAtomicUMin :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 atomic_u_min :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicUMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicUMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2746,7 +2746,7 @@ inst_OpAtomicSMax :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 atomic_s_max :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicSMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicSMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2761,7 +2761,7 @@ inst_OpAtomicUMax :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 atomic_u_max :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicUMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicUMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2776,7 +2776,7 @@ inst_OpAtomicAnd :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 atomic_and :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicAnd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicAnd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2791,7 +2791,7 @@ inst_OpAtomicOr :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 atomic_or :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicOr(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicOr(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2806,7 +2806,7 @@ inst_OpAtomicXor :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 atomic_xor :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicXor(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicXor(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -2818,7 +2818,7 @@ inst_OpPhi :: #force_inline proc "contextless" (buf: []Operand, result_type: Typ
 
 phi :: proc(b: ^Builder, result_type: Type_Ref, op1: []Pair_Id_Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPhi(opbuf(b, 2 * len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpPhi(opbuf(b, 2 * len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -2831,7 +2831,7 @@ inst_OpLoopMerge :: #force_inline proc "contextless" (buf: []Operand, op1: Id, o
 }
 
 loop_merge :: proc(b: ^Builder, op1: Id, op2: Id, op3: Loop_Control) {
-	append(&b.ops, inst_OpLoopMerge(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpLoopMerge(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpSelectionMerge :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Selection_Control) -> Operation {
@@ -2842,7 +2842,7 @@ inst_OpSelectionMerge :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 selection_merge :: proc(b: ^Builder, op1: Id, op2: Selection_Control) {
-	append(&b.ops, inst_OpSelectionMerge(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpSelectionMerge(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpLabel :: #force_inline proc "contextless" (result: Id) -> Operation {
@@ -2851,7 +2851,7 @@ inst_OpLabel :: #force_inline proc "contextless" (result: Id) -> Operation {
 
 label :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpLabel(r))
+	append_elem(&b.ops, inst_OpLabel(r))
 	return r
 }
 
@@ -2862,7 +2862,7 @@ inst_OpBranch :: #force_inline proc "contextless" (buf: []Operand, op1: Id) -> O
 }
 
 branch :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpBranch(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpBranch(opbuf(b, 1), op1))
 }
 
 inst_OpBranchConditional :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: []i64) -> Operation {
@@ -2875,7 +2875,7 @@ inst_OpBranchConditional :: #force_inline proc "contextless" (buf: []Operand, op
 }
 
 branch_conditional :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: []i64) {
-	append(&b.ops, inst_OpBranchConditional(opbuf(b, 1 + 1 + 1 + len(op4)), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpBranchConditional(opbuf(b, 1 + 1 + 1 + len(op4)), op1, op2, op3, op4))
 }
 
 inst_OpSwitch :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: []Pair_Lit_Id) -> Operation {
@@ -2887,7 +2887,7 @@ inst_OpSwitch :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2:
 }
 
 switch_ :: proc(b: ^Builder, op1: Id, op2: Id, op3: []Pair_Lit_Id) {
-	append(&b.ops, inst_OpSwitch(opbuf(b, 1 + 1 + 2 * len(op3)), op1, op2, op3))
+	append_elem(&b.ops, inst_OpSwitch(opbuf(b, 1 + 1 + 2 * len(op3)), op1, op2, op3))
 }
 
 inst_OpKill :: #force_inline proc "contextless" () -> Operation {
@@ -2895,7 +2895,7 @@ inst_OpKill :: #force_inline proc "contextless" () -> Operation {
 }
 
 kill :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpKill())
+	append_elem(&b.ops, inst_OpKill())
 }
 
 inst_OpReturn :: #force_inline proc "contextless" () -> Operation {
@@ -2903,7 +2903,7 @@ inst_OpReturn :: #force_inline proc "contextless" () -> Operation {
 }
 
 return_ :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpReturn())
+	append_elem(&b.ops, inst_OpReturn())
 }
 
 inst_OpReturnValue :: #force_inline proc "contextless" (buf: []Operand, op1: Id) -> Operation {
@@ -2913,7 +2913,7 @@ inst_OpReturnValue :: #force_inline proc "contextless" (buf: []Operand, op1: Id)
 }
 
 return_value :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpReturnValue(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpReturnValue(opbuf(b, 1), op1))
 }
 
 inst_OpUnreachable :: #force_inline proc "contextless" () -> Operation {
@@ -2921,7 +2921,7 @@ inst_OpUnreachable :: #force_inline proc "contextless" () -> Operation {
 }
 
 unreachable :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpUnreachable())
+	append_elem(&b.ops, inst_OpUnreachable())
 }
 
 inst_OpLifetimeStart :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: i64) -> Operation {
@@ -2932,7 +2932,7 @@ inst_OpLifetimeStart :: #force_inline proc "contextless" (buf: []Operand, op1: I
 }
 
 lifetime_start :: proc(b: ^Builder, op1: Id, op2: i64) {
-	append(&b.ops, inst_OpLifetimeStart(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpLifetimeStart(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpLifetimeStop :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: i64) -> Operation {
@@ -2943,7 +2943,7 @@ inst_OpLifetimeStop :: #force_inline proc "contextless" (buf: []Operand, op1: Id
 }
 
 lifetime_stop :: proc(b: ^Builder, op1: Id, op2: i64) {
-	append(&b.ops, inst_OpLifetimeStop(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpLifetimeStop(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpGroupAsyncCopy :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) -> Operation {
@@ -2959,7 +2959,7 @@ inst_OpGroupAsyncCopy :: #force_inline proc "contextless" (buf: []Operand, resul
 
 group_async_copy :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupAsyncCopy(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpGroupAsyncCopy(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -2972,7 +2972,7 @@ inst_OpGroupWaitEvents :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 group_wait_events :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpGroupWaitEvents(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupWaitEvents(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpGroupAll :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id) -> Operation {
@@ -2984,7 +2984,7 @@ inst_OpGroupAll :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 group_all :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupAll(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupAll(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -2997,7 +2997,7 @@ inst_OpGroupAny :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 group_any :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupAny(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupAny(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -3011,7 +3011,7 @@ inst_OpGroupBroadcast :: #force_inline proc "contextless" (buf: []Operand, resul
 
 group_broadcast :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupBroadcast(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupBroadcast(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3025,7 +3025,7 @@ inst_OpGroupIAdd :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 group_i_add :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupIAdd(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupIAdd(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3039,7 +3039,7 @@ inst_OpGroupFAdd :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 group_f_add :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupFAdd(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupFAdd(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3053,7 +3053,7 @@ inst_OpGroupFMin :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 group_f_min :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupFMin(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupFMin(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3067,7 +3067,7 @@ inst_OpGroupUMin :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 group_u_min :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupUMin(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupUMin(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3081,7 +3081,7 @@ inst_OpGroupSMin :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 group_s_min :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupSMin(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupSMin(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3095,7 +3095,7 @@ inst_OpGroupFMax :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 group_f_max :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupFMax(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupFMax(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3109,7 +3109,7 @@ inst_OpGroupUMax :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 group_u_max :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupUMax(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupUMax(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3123,7 +3123,7 @@ inst_OpGroupSMax :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 group_s_max :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupSMax(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupSMax(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3138,7 +3138,7 @@ inst_OpReadPipe :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 read_pipe :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpReadPipe(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpReadPipe(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3153,7 +3153,7 @@ inst_OpWritePipe :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 write_pipe :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpWritePipe(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpWritePipe(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3170,7 +3170,7 @@ inst_OpReservedReadPipe :: #force_inline proc "contextless" (buf: []Operand, res
 
 reserved_read_pipe :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpReservedReadPipe(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpReservedReadPipe(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -3187,7 +3187,7 @@ inst_OpReservedWritePipe :: #force_inline proc "contextless" (buf: []Operand, re
 
 reserved_write_pipe :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpReservedWritePipe(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpReservedWritePipe(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -3202,7 +3202,7 @@ inst_OpReserveReadPipePackets :: #force_inline proc "contextless" (buf: []Operan
 
 reserve_read_pipe_packets :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpReserveReadPipePackets(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpReserveReadPipePackets(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3217,7 +3217,7 @@ inst_OpReserveWritePipePackets :: #force_inline proc "contextless" (buf: []Opera
 
 reserve_write_pipe_packets :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpReserveWritePipePackets(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpReserveWritePipePackets(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3231,7 +3231,7 @@ inst_OpCommitReadPipe :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 commit_read_pipe :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id) {
-	append(&b.ops, inst_OpCommitReadPipe(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpCommitReadPipe(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpCommitWritePipe :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id) -> Operation {
@@ -3244,7 +3244,7 @@ inst_OpCommitWritePipe :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 commit_write_pipe :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id) {
-	append(&b.ops, inst_OpCommitWritePipe(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpCommitWritePipe(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpIsValidReserveId :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -3255,7 +3255,7 @@ inst_OpIsValidReserveId :: #force_inline proc "contextless" (buf: []Operand, res
 
 is_valid_reserve_id :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIsValidReserveId(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpIsValidReserveId(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -3269,7 +3269,7 @@ inst_OpGetNumPipePackets :: #force_inline proc "contextless" (buf: []Operand, re
 
 get_num_pipe_packets :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetNumPipePackets(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGetNumPipePackets(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3283,7 +3283,7 @@ inst_OpGetMaxPipePackets :: #force_inline proc "contextless" (buf: []Operand, re
 
 get_max_pipe_packets :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetMaxPipePackets(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGetMaxPipePackets(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3299,7 +3299,7 @@ inst_OpGroupReserveReadPipePackets :: #force_inline proc "contextless" (buf: []O
 
 group_reserve_read_pipe_packets :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupReserveReadPipePackets(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpGroupReserveReadPipePackets(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -3315,7 +3315,7 @@ inst_OpGroupReserveWritePipePackets :: #force_inline proc "contextless" (buf: []
 
 group_reserve_write_pipe_packets :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupReserveWritePipePackets(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpGroupReserveWritePipePackets(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -3330,7 +3330,7 @@ inst_OpGroupCommitReadPipe :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 group_commit_read_pipe :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) {
-	append(&b.ops, inst_OpGroupCommitReadPipe(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpGroupCommitReadPipe(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpGroupCommitWritePipe :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Operation {
@@ -3344,7 +3344,7 @@ inst_OpGroupCommitWritePipe :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 group_commit_write_pipe :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) {
-	append(&b.ops, inst_OpGroupCommitWritePipe(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpGroupCommitWritePipe(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpEnqueueMarker :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id) -> Operation {
@@ -3358,7 +3358,7 @@ inst_OpEnqueueMarker :: #force_inline proc "contextless" (buf: []Operand, result
 
 enqueue_marker :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpEnqueueMarker(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpEnqueueMarker(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3380,7 +3380,7 @@ inst_OpEnqueueKernel :: #force_inline proc "contextless" (buf: []Operand, result
 
 enqueue_kernel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpEnqueueKernel(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + len(op11)), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
+	append_elem(&b.ops, inst_OpEnqueueKernel(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + len(op11)), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
 	return r
 }
 
@@ -3396,7 +3396,7 @@ inst_OpGetKernelNDrangeSubGroupCount :: #force_inline proc "contextless" (buf: [
 
 get_kernel_n_drange_sub_group_count :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetKernelNDrangeSubGroupCount(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpGetKernelNDrangeSubGroupCount(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -3412,7 +3412,7 @@ inst_OpGetKernelNDrangeMaxSubGroupSize :: #force_inline proc "contextless" (buf:
 
 get_kernel_n_drange_max_sub_group_size :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetKernelNDrangeMaxSubGroupSize(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpGetKernelNDrangeMaxSubGroupSize(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -3427,7 +3427,7 @@ inst_OpGetKernelWorkGroupSize :: #force_inline proc "contextless" (buf: []Operan
 
 get_kernel_work_group_size :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetKernelWorkGroupSize(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGetKernelWorkGroupSize(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3442,7 +3442,7 @@ inst_OpGetKernelPreferredWorkGroupSizeMultiple :: #force_inline proc "contextles
 
 get_kernel_preferred_work_group_size_multiple :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetKernelPreferredWorkGroupSizeMultiple(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGetKernelPreferredWorkGroupSizeMultiple(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3453,7 +3453,7 @@ inst_OpRetainEvent :: #force_inline proc "contextless" (buf: []Operand, op1: Id)
 }
 
 retain_event :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpRetainEvent(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpRetainEvent(opbuf(b, 1), op1))
 }
 
 inst_OpReleaseEvent :: #force_inline proc "contextless" (buf: []Operand, op1: Id) -> Operation {
@@ -3463,7 +3463,7 @@ inst_OpReleaseEvent :: #force_inline proc "contextless" (buf: []Operand, op1: Id
 }
 
 release_event :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpReleaseEvent(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpReleaseEvent(opbuf(b, 1), op1))
 }
 
 inst_OpCreateUserEvent :: #force_inline proc "contextless" (result_type: Type_Ref, result: Id) -> Operation {
@@ -3472,7 +3472,7 @@ inst_OpCreateUserEvent :: #force_inline proc "contextless" (result_type: Type_Re
 
 create_user_event :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCreateUserEvent(result_type, r))
+	append_elem(&b.ops, inst_OpCreateUserEvent(result_type, r))
 	return r
 }
 
@@ -3484,7 +3484,7 @@ inst_OpIsValidEvent :: #force_inline proc "contextless" (buf: []Operand, result_
 
 is_valid_event :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIsValidEvent(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpIsValidEvent(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -3496,7 +3496,7 @@ inst_OpSetUserEventStatus :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 set_user_event_status :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpSetUserEventStatus(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpSetUserEventStatus(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpCaptureEventProfilingInfo :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id) -> Operation {
@@ -3508,7 +3508,7 @@ inst_OpCaptureEventProfilingInfo :: #force_inline proc "contextless" (buf: []Ope
 }
 
 capture_event_profiling_info :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpCaptureEventProfilingInfo(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpCaptureEventProfilingInfo(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpGetDefaultQueue :: #force_inline proc "contextless" (result_type: Type_Ref, result: Id) -> Operation {
@@ -3517,7 +3517,7 @@ inst_OpGetDefaultQueue :: #force_inline proc "contextless" (result_type: Type_Re
 
 get_default_queue :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetDefaultQueue(result_type, r))
+	append_elem(&b.ops, inst_OpGetDefaultQueue(result_type, r))
 	return r
 }
 
@@ -3531,7 +3531,7 @@ inst_OpBuildNDRange :: #force_inline proc "contextless" (buf: []Operand, result_
 
 build_nd_range :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBuildNDRange(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpBuildNDRange(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3545,7 +3545,7 @@ inst_OpImageSparseSampleImplicitLod :: #force_inline proc "contextless" (buf: []
 
 image_sparse_sample_implicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseSampleImplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSparseSampleImplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3559,7 +3559,7 @@ inst_OpImageSparseSampleExplicitLod :: #force_inline proc "contextless" (buf: []
 
 image_sparse_sample_explicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Image_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseSampleExplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSparseSampleExplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3574,7 +3574,7 @@ inst_OpImageSparseSampleDrefImplicitLod :: #force_inline proc "contextless" (buf
 
 image_sparse_sample_dref_implicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseSampleDrefImplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSparseSampleDrefImplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3589,7 +3589,7 @@ inst_OpImageSparseSampleDrefExplicitLod :: #force_inline proc "contextless" (buf
 
 image_sparse_sample_dref_explicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Image_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseSampleDrefExplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSparseSampleDrefExplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3603,7 +3603,7 @@ inst_OpImageSparseSampleProjImplicitLod :: #force_inline proc "contextless" (buf
 
 image_sparse_sample_proj_implicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseSampleProjImplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSparseSampleProjImplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3617,7 +3617,7 @@ inst_OpImageSparseSampleProjExplicitLod :: #force_inline proc "contextless" (buf
 
 image_sparse_sample_proj_explicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Image_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseSampleProjExplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSparseSampleProjExplicitLod(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3632,7 +3632,7 @@ inst_OpImageSparseSampleProjDrefImplicitLod :: #force_inline proc "contextless"
 
 image_sparse_sample_proj_dref_implicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseSampleProjDrefImplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSparseSampleProjDrefImplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3647,7 +3647,7 @@ inst_OpImageSparseSampleProjDrefExplicitLod :: #force_inline proc "contextless"
 
 image_sparse_sample_proj_dref_explicit_lod :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Image_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseSampleProjDrefExplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSparseSampleProjDrefExplicitLod(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3661,7 +3661,7 @@ inst_OpImageSparseFetch :: #force_inline proc "contextless" (buf: []Operand, res
 
 image_sparse_fetch :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseFetch(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSparseFetch(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3676,7 +3676,7 @@ inst_OpImageSparseGather :: #force_inline proc "contextless" (buf: []Operand, re
 
 image_sparse_gather :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseGather(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSparseGather(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3691,7 +3691,7 @@ inst_OpImageSparseDrefGather :: #force_inline proc "contextless" (buf: []Operand
 
 image_sparse_dref_gather :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseDrefGather(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpImageSparseDrefGather(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3703,7 +3703,7 @@ inst_OpImageSparseTexelsResident :: #force_inline proc "contextless" (buf: []Ope
 
 image_sparse_texels_resident :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseTexelsResident(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpImageSparseTexelsResident(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -3712,7 +3712,7 @@ inst_OpNoLine :: #force_inline proc "contextless" () -> Operation {
 }
 
 no_line :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpNoLine())
+	append_elem(&b.ops, inst_OpNoLine())
 }
 
 inst_OpAtomicFlagTestAndSet :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id) -> Operation {
@@ -3725,7 +3725,7 @@ inst_OpAtomicFlagTestAndSet :: #force_inline proc "contextless" (buf: []Operand,
 
 atomic_flag_test_and_set :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicFlagTestAndSet(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpAtomicFlagTestAndSet(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3738,7 +3738,7 @@ inst_OpAtomicFlagClear :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 atomic_flag_clear :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpAtomicFlagClear(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpAtomicFlagClear(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpImageSparseRead :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Operation {
@@ -3751,7 +3751,7 @@ inst_OpImageSparseRead :: #force_inline proc "contextless" (buf: []Operand, resu
 
 image_sparse_read :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSparseRead(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSparseRead(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3763,7 +3763,7 @@ inst_OpSizeOf :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 size_of_ :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSizeOf(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSizeOf(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -3773,7 +3773,7 @@ inst_OpTypePipeStorage :: #force_inline proc "contextless" (result: Id) -> Opera
 
 type_pipe_storage :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypePipeStorage(r))
+	append_elem(&b.ops, inst_OpTypePipeStorage(r))
 	return r
 }
 
@@ -3787,7 +3787,7 @@ inst_OpConstantPipeStorage :: #force_inline proc "contextless" (buf: []Operand,
 
 constant_pipe_storage :: proc(b: ^Builder, result_type: Type_Ref, op1: i64, op2: i64, op3: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantPipeStorage(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpConstantPipeStorage(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3799,7 +3799,7 @@ inst_OpCreatePipeFromPipeStorage :: #force_inline proc "contextless" (buf: []Ope
 
 create_pipe_from_pipe_storage :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCreatePipeFromPipeStorage(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCreatePipeFromPipeStorage(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -3815,7 +3815,7 @@ inst_OpGetKernelLocalSizeForSubgroupCount :: #force_inline proc "contextless" (b
 
 get_kernel_local_size_for_subgroup_count :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetKernelLocalSizeForSubgroupCount(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpGetKernelLocalSizeForSubgroupCount(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -3830,7 +3830,7 @@ inst_OpGetKernelMaxNumSubgroups :: #force_inline proc "contextless" (buf: []Oper
 
 get_kernel_max_num_subgroups :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGetKernelMaxNumSubgroups(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGetKernelMaxNumSubgroups(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -3840,7 +3840,7 @@ inst_OpTypeNamedBarrier :: #force_inline proc "contextless" (result: Id) -> Oper
 
 type_named_barrier :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeNamedBarrier(r))
+	append_elem(&b.ops, inst_OpTypeNamedBarrier(r))
 	return r
 }
 
@@ -3852,7 +3852,7 @@ inst_OpNamedBarrierInitialize :: #force_inline proc "contextless" (buf: []Operan
 
 named_barrier_initialize :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpNamedBarrierInitialize(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpNamedBarrierInitialize(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -3865,7 +3865,7 @@ inst_OpMemoryNamedBarrier :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 memory_named_barrier :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpMemoryNamedBarrier(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpMemoryNamedBarrier(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpModuleProcessed :: #force_inline proc "contextless" (buf: []Operand, op1: string) -> Operation {
@@ -3875,7 +3875,7 @@ inst_OpModuleProcessed :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 module_processed :: proc(b: ^Builder, op1: string) {
-	append(&b.ops, inst_OpModuleProcessed(opbuf(b, (len(op1) + 4) / 4), op1))
+	append_elem(&b.ops, inst_OpModuleProcessed(opbuf(b, (len(op1) + 4) / 4), op1))
 }
 
 inst_OpExecutionModeId :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Execution_Mode) -> Operation {
@@ -3886,7 +3886,7 @@ inst_OpExecutionModeId :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 execution_mode_id :: proc(b: ^Builder, op1: Id, op2: Execution_Mode) {
-	append(&b.ops, inst_OpExecutionModeId(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpExecutionModeId(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpDecorateId :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Decoration) -> Operation {
@@ -3897,7 +3897,7 @@ inst_OpDecorateId :: #force_inline proc "contextless" (buf: []Operand, op1: Id,
 }
 
 decorate_id :: proc(b: ^Builder, op1: Id, op2: Decoration) {
-	append(&b.ops, inst_OpDecorateId(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpDecorateId(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpGroupNonUniformElect :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -3908,7 +3908,7 @@ inst_OpGroupNonUniformElect :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_elect :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformElect(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpGroupNonUniformElect(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -3921,7 +3921,7 @@ inst_OpGroupNonUniformAll :: #force_inline proc "contextless" (buf: []Operand, r
 
 group_non_uniform_all :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformAll(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupNonUniformAll(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -3934,7 +3934,7 @@ inst_OpGroupNonUniformAny :: #force_inline proc "contextless" (buf: []Operand, r
 
 group_non_uniform_any :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformAny(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupNonUniformAny(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -3947,7 +3947,7 @@ inst_OpGroupNonUniformAllEqual :: #force_inline proc "contextless" (buf: []Opera
 
 group_non_uniform_all_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformAllEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupNonUniformAllEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -3961,7 +3961,7 @@ inst_OpGroupNonUniformBroadcast :: #force_inline proc "contextless" (buf: []Oper
 
 group_non_uniform_broadcast :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBroadcast(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformBroadcast(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -3974,7 +3974,7 @@ inst_OpGroupNonUniformBroadcastFirst :: #force_inline proc "contextless" (buf: [
 
 group_non_uniform_broadcast_first :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBroadcastFirst(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupNonUniformBroadcastFirst(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -3987,7 +3987,7 @@ inst_OpGroupNonUniformBallot :: #force_inline proc "contextless" (buf: []Operand
 
 group_non_uniform_ballot :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBallot(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupNonUniformBallot(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4000,7 +4000,7 @@ inst_OpGroupNonUniformInverseBallot :: #force_inline proc "contextless" (buf: []
 
 group_non_uniform_inverse_ballot :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformInverseBallot(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupNonUniformInverseBallot(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4014,7 +4014,7 @@ inst_OpGroupNonUniformBallotBitExtract :: #force_inline proc "contextless" (buf:
 
 group_non_uniform_ballot_bit_extract :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBallotBitExtract(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformBallotBitExtract(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4028,7 +4028,7 @@ inst_OpGroupNonUniformBallotBitCount :: #force_inline proc "contextless" (buf: [
 
 group_non_uniform_ballot_bit_count :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBallotBitCount(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformBallotBitCount(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4041,7 +4041,7 @@ inst_OpGroupNonUniformBallotFindLSB :: #force_inline proc "contextless" (buf: []
 
 group_non_uniform_ballot_find_lsb :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBallotFindLSB(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupNonUniformBallotFindLSB(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4054,7 +4054,7 @@ inst_OpGroupNonUniformBallotFindMSB :: #force_inline proc "contextless" (buf: []
 
 group_non_uniform_ballot_find_msb :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBallotFindMSB(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGroupNonUniformBallotFindMSB(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4068,7 +4068,7 @@ inst_OpGroupNonUniformShuffle :: #force_inline proc "contextless" (buf: []Operan
 
 group_non_uniform_shuffle :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformShuffle(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformShuffle(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4082,7 +4082,7 @@ inst_OpGroupNonUniformShuffleXor :: #force_inline proc "contextless" (buf: []Ope
 
 group_non_uniform_shuffle_xor :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformShuffleXor(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformShuffleXor(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4096,7 +4096,7 @@ inst_OpGroupNonUniformShuffleUp :: #force_inline proc "contextless" (buf: []Oper
 
 group_non_uniform_shuffle_up :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformShuffleUp(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformShuffleUp(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4110,7 +4110,7 @@ inst_OpGroupNonUniformShuffleDown :: #force_inline proc "contextless" (buf: []Op
 
 group_non_uniform_shuffle_down :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformShuffleDown(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformShuffleDown(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4125,7 +4125,7 @@ inst_OpGroupNonUniformIAdd :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_i_add :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformIAdd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformIAdd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4140,7 +4140,7 @@ inst_OpGroupNonUniformFAdd :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_f_add :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformFAdd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformFAdd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4155,7 +4155,7 @@ inst_OpGroupNonUniformIMul :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_i_mul :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformIMul(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformIMul(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4170,7 +4170,7 @@ inst_OpGroupNonUniformFMul :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_f_mul :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformFMul(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformFMul(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4185,7 +4185,7 @@ inst_OpGroupNonUniformSMin :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_s_min :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformSMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformSMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4200,7 +4200,7 @@ inst_OpGroupNonUniformUMin :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_u_min :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformUMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformUMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4215,7 +4215,7 @@ inst_OpGroupNonUniformFMin :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_f_min :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformFMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformFMin(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4230,7 +4230,7 @@ inst_OpGroupNonUniformSMax :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_s_max :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformSMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformSMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4245,7 +4245,7 @@ inst_OpGroupNonUniformUMax :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_u_max :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformUMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformUMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4260,7 +4260,7 @@ inst_OpGroupNonUniformFMax :: #force_inline proc "contextless" (buf: []Operand,
 
 group_non_uniform_f_max :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformFMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformFMax(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4275,7 +4275,7 @@ inst_OpGroupNonUniformBitwiseAnd :: #force_inline proc "contextless" (buf: []Ope
 
 group_non_uniform_bitwise_and :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBitwiseAnd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformBitwiseAnd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4290,7 +4290,7 @@ inst_OpGroupNonUniformBitwiseOr :: #force_inline proc "contextless" (buf: []Oper
 
 group_non_uniform_bitwise_or :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBitwiseOr(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformBitwiseOr(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4305,7 +4305,7 @@ inst_OpGroupNonUniformBitwiseXor :: #force_inline proc "contextless" (buf: []Ope
 
 group_non_uniform_bitwise_xor :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformBitwiseXor(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformBitwiseXor(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4320,7 +4320,7 @@ inst_OpGroupNonUniformLogicalAnd :: #force_inline proc "contextless" (buf: []Ope
 
 group_non_uniform_logical_and :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformLogicalAnd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformLogicalAnd(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4335,7 +4335,7 @@ inst_OpGroupNonUniformLogicalOr :: #force_inline proc "contextless" (buf: []Oper
 
 group_non_uniform_logical_or :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformLogicalOr(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformLogicalOr(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4350,7 +4350,7 @@ inst_OpGroupNonUniformLogicalXor :: #force_inline proc "contextless" (buf: []Ope
 
 group_non_uniform_logical_xor :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformLogicalXor(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformLogicalXor(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4364,7 +4364,7 @@ inst_OpGroupNonUniformQuadBroadcast :: #force_inline proc "contextless" (buf: []
 
 group_non_uniform_quad_broadcast :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformQuadBroadcast(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformQuadBroadcast(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4378,7 +4378,7 @@ inst_OpGroupNonUniformQuadSwap :: #force_inline proc "contextless" (buf: []Opera
 
 group_non_uniform_quad_swap :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformQuadSwap(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupNonUniformQuadSwap(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4390,7 +4390,7 @@ inst_OpCopyLogical :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 copy_logical :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCopyLogical(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCopyLogical(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4403,7 +4403,7 @@ inst_OpPtrEqual :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 ptr_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPtrEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpPtrEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4416,7 +4416,7 @@ inst_OpPtrNotEqual :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 ptr_not_equal :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPtrNotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpPtrNotEqual(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4429,7 +4429,7 @@ inst_OpPtrDiff :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 ptr_diff :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPtrDiff(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpPtrDiff(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4442,7 +4442,7 @@ inst_OpColorAttachmentReadEXT :: #force_inline proc "contextless" (buf: []Operan
 
 color_attachment_read_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpColorAttachmentReadEXT(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpColorAttachmentReadEXT(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4454,7 +4454,7 @@ inst_OpDepthAttachmentReadEXT :: #force_inline proc "contextless" (buf: []Operan
 
 depth_attachment_read_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpDepthAttachmentReadEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpDepthAttachmentReadEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4466,7 +4466,7 @@ inst_OpStencilAttachmentReadEXT :: #force_inline proc "contextless" (buf: []Oper
 
 stencil_attachment_read_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpStencilAttachmentReadEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpStencilAttachmentReadEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4480,7 +4480,7 @@ inst_OpTypeTensorARM :: #force_inline proc "contextless" (buf: []Operand, result
 
 type_tensor_arm :: proc(b: ^Builder, op1: Id, op2: Maybe(Id), op3: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeTensorARM(opbuf(b, 1 + 1 + 1), r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpTypeTensorARM(opbuf(b, 1 + 1 + 1), r, op1, op2, op3))
 	return r
 }
 
@@ -4494,7 +4494,7 @@ inst_OpTensorReadARM :: #force_inline proc "contextless" (buf: []Operand, result
 
 tensor_read_arm :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Tensor_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorReadARM(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpTensorReadARM(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4508,7 +4508,7 @@ inst_OpTensorWriteARM :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 tensor_write_arm :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Maybe(Tensor_Operands)) {
-	append(&b.ops, inst_OpTensorWriteARM(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpTensorWriteARM(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpTensorQuerySizeARM :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id) -> Operation {
@@ -4520,7 +4520,7 @@ inst_OpTensorQuerySizeARM :: #force_inline proc "contextless" (buf: []Operand, r
 
 tensor_query_size_arm :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorQuerySizeARM(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpTensorQuerySizeARM(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4532,7 +4532,7 @@ inst_OpGraphConstantARM :: #force_inline proc "contextless" (buf: []Operand, res
 
 graph_constant_arm :: proc(b: ^Builder, result_type: Type_Ref, op1: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGraphConstantARM(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpGraphConstantARM(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4545,7 +4545,7 @@ inst_OpGraphEntryPointARM :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 graph_entry_point_arm :: proc(b: ^Builder, op1: Id, op2: string, op3: []Id) {
-	append(&b.ops, inst_OpGraphEntryPointARM(opbuf(b, 1 + (len(op2) + 4) / 4 + len(op3)), op1, op2, op3))
+	append_elem(&b.ops, inst_OpGraphEntryPointARM(opbuf(b, 1 + (len(op2) + 4) / 4 + len(op3)), op1, op2, op3))
 }
 
 inst_OpGraphARM :: #force_inline proc "contextless" (result_type: Type_Ref, result: Id) -> Operation {
@@ -4554,7 +4554,7 @@ inst_OpGraphARM :: #force_inline proc "contextless" (result_type: Type_Ref, resu
 
 graph_arm :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGraphARM(result_type, r))
+	append_elem(&b.ops, inst_OpGraphARM(result_type, r))
 	return r
 }
 
@@ -4567,7 +4567,7 @@ inst_OpGraphInputARM :: #force_inline proc "contextless" (buf: []Operand, result
 
 graph_input_arm :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGraphInputARM(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpGraphInputARM(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -4580,7 +4580,7 @@ inst_OpGraphSetOutputARM :: #force_inline proc "contextless" (buf: []Operand, op
 }
 
 graph_set_output_arm :: proc(b: ^Builder, op1: Id, op2: Id, op3: []Id) {
-	append(&b.ops, inst_OpGraphSetOutputARM(opbuf(b, 1 + 1 + len(op3)), op1, op2, op3))
+	append_elem(&b.ops, inst_OpGraphSetOutputARM(opbuf(b, 1 + 1 + len(op3)), op1, op2, op3))
 }
 
 inst_OpGraphEndARM :: #force_inline proc "contextless" () -> Operation {
@@ -4588,7 +4588,7 @@ inst_OpGraphEndARM :: #force_inline proc "contextless" () -> Operation {
 }
 
 graph_end_arm :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpGraphEndARM())
+	append_elem(&b.ops, inst_OpGraphEndARM())
 }
 
 inst_OpTypeGraphARM :: #force_inline proc "contextless" (buf: []Operand, result: Id, op1: i64, op2: []Id) -> Operation {
@@ -4600,7 +4600,7 @@ inst_OpTypeGraphARM :: #force_inline proc "contextless" (buf: []Operand, result:
 
 type_graph_arm :: proc(b: ^Builder, op1: i64, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeGraphARM(opbuf(b, 1 + len(op2)), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeGraphARM(opbuf(b, 1 + len(op2)), r, op1, op2))
 	return r
 }
 
@@ -4609,7 +4609,7 @@ inst_OpTerminateInvocation :: #force_inline proc "contextless" () -> Operation {
 }
 
 terminate_invocation :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpTerminateInvocation())
+	append_elem(&b.ops, inst_OpTerminateInvocation())
 }
 
 inst_OpTypeUntypedPointerKHR :: #force_inline proc "contextless" (buf: []Operand, result: Id, op1: Storage_Class) -> Operation {
@@ -4620,7 +4620,7 @@ inst_OpTypeUntypedPointerKHR :: #force_inline proc "contextless" (buf: []Operand
 
 type_untyped_pointer_khr :: proc(b: ^Builder, op1: Storage_Class) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeUntypedPointerKHR(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpTypeUntypedPointerKHR(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -4634,7 +4634,7 @@ inst_OpUntypedVariableKHR :: #force_inline proc "contextless" (buf: []Operand, r
 
 untyped_variable_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Storage_Class, op2: Maybe(Id), op3: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedVariableKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpUntypedVariableKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4648,7 +4648,7 @@ inst_OpUntypedAccessChainKHR :: #force_inline proc "contextless" (buf: []Operand
 
 untyped_access_chain_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedAccessChainKHR(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpUntypedAccessChainKHR(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4662,7 +4662,7 @@ inst_OpUntypedInBoundsAccessChainKHR :: #force_inline proc "contextless" (buf: [
 
 untyped_in_bounds_access_chain_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedInBoundsAccessChainKHR(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpUntypedInBoundsAccessChainKHR(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4674,7 +4674,7 @@ inst_OpSubgroupBallotKHR :: #force_inline proc "contextless" (buf: []Operand, re
 
 subgroup_ballot_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupBallotKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupBallotKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4686,7 +4686,7 @@ inst_OpSubgroupFirstInvocationKHR :: #force_inline proc "contextless" (buf: []Op
 
 subgroup_first_invocation_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupFirstInvocationKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupFirstInvocationKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4701,7 +4701,7 @@ inst_OpUntypedPtrAccessChainKHR :: #force_inline proc "contextless" (buf: []Oper
 
 untyped_ptr_access_chain_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedPtrAccessChainKHR(opbuf(b, 1 + 1 + 1 + len(op4)), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpUntypedPtrAccessChainKHR(opbuf(b, 1 + 1 + 1 + len(op4)), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4716,7 +4716,7 @@ inst_OpUntypedInBoundsPtrAccessChainKHR :: #force_inline proc "contextless" (buf
 
 untyped_in_bounds_ptr_access_chain_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedInBoundsPtrAccessChainKHR(opbuf(b, 1 + 1 + 1 + len(op4)), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpUntypedInBoundsPtrAccessChainKHR(opbuf(b, 1 + 1 + 1 + len(op4)), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4730,7 +4730,7 @@ inst_OpUntypedArrayLengthKHR :: #force_inline proc "contextless" (buf: []Operand
 
 untyped_array_length_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedArrayLengthKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpUntypedArrayLengthKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4745,7 +4745,7 @@ inst_OpUntypedPrefetchKHR :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 untyped_prefetch_khr :: proc(b: ^Builder, op1: Id, op2: Id, op3: Maybe(Id), op4: Maybe(Id), op5: Maybe(Id)) {
-	append(&b.ops, inst_OpUntypedPrefetchKHR(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpUntypedPrefetchKHR(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpFmaKHR :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id) -> Operation {
@@ -4758,7 +4758,7 @@ inst_OpFmaKHR :: #force_inline proc "contextless" (buf: []Operand, result_type:
 
 fma_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFmaKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpFmaKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4770,7 +4770,7 @@ inst_OpSubgroupAllKHR :: #force_inline proc "contextless" (buf: []Operand, resul
 
 subgroup_all_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAllKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAllKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4782,7 +4782,7 @@ inst_OpSubgroupAnyKHR :: #force_inline proc "contextless" (buf: []Operand, resul
 
 subgroup_any_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAnyKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAnyKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4794,7 +4794,7 @@ inst_OpSubgroupAllEqualKHR :: #force_inline proc "contextless" (buf: []Operand,
 
 subgroup_all_equal_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAllEqualKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAllEqualKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4809,7 +4809,7 @@ inst_OpGroupNonUniformRotateKHR :: #force_inline proc "contextless" (buf: []Oper
 
 group_non_uniform_rotate_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformRotateKHR(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpGroupNonUniformRotateKHR(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4822,7 +4822,7 @@ inst_OpSubgroupReadInvocationKHR :: #force_inline proc "contextless" (buf: []Ope
 
 subgroup_read_invocation_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupReadInvocationKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupReadInvocationKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -4836,7 +4836,7 @@ inst_OpExtInstWithForwardRefsKHR :: #force_inline proc "contextless" (buf: []Ope
 
 ext_inst_with_forward_refs_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpExtInstWithForwardRefsKHR(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpExtInstWithForwardRefsKHR(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4856,7 +4856,7 @@ inst_OpUntypedGroupAsyncCopyKHR :: #force_inline proc "contextless" (buf: []Oper
 
 untyped_group_async_copy_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Maybe(Memory_Access), op9: Maybe(Memory_Access)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedGroupAsyncCopyKHR(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9))
+	append_elem(&b.ops, inst_OpUntypedGroupAsyncCopyKHR(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9))
 	return r
 }
 
@@ -4877,7 +4877,7 @@ inst_OpTraceRayKHR :: #force_inline proc "contextless" (buf: []Operand, op1: Id,
 }
 
 trace_ray_khr :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id) {
-	append(&b.ops, inst_OpTraceRayKHR(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
+	append_elem(&b.ops, inst_OpTraceRayKHR(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
 }
 
 inst_OpExecuteCallableKHR :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id) -> Operation {
@@ -4888,7 +4888,7 @@ inst_OpExecuteCallableKHR :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 execute_callable_khr :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpExecuteCallableKHR(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpExecuteCallableKHR(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpConvertUToAccelerationStructureKHR :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -4899,7 +4899,7 @@ inst_OpConvertUToAccelerationStructureKHR :: #force_inline proc "contextless" (b
 
 convert_u_to_acceleration_structure_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertUToAccelerationStructureKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertUToAccelerationStructureKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -4908,7 +4908,7 @@ inst_OpIgnoreIntersectionKHR :: #force_inline proc "contextless" () -> Operation
 }
 
 ignore_intersection_khr :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpIgnoreIntersectionKHR())
+	append_elem(&b.ops, inst_OpIgnoreIntersectionKHR())
 }
 
 inst_OpTerminateRayKHR :: #force_inline proc "contextless" () -> Operation {
@@ -4916,7 +4916,7 @@ inst_OpTerminateRayKHR :: #force_inline proc "contextless" () -> Operation {
 }
 
 terminate_ray_khr :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpTerminateRayKHR())
+	append_elem(&b.ops, inst_OpTerminateRayKHR())
 }
 
 inst_OpSDot :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Maybe(Packed_Vector_Format)) -> Operation {
@@ -4929,7 +4929,7 @@ inst_OpSDot :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 s_dot :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Packed_Vector_Format)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSDot(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSDot(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4943,7 +4943,7 @@ inst_OpUDot :: #force_inline proc "contextless" (buf: []Operand, result_type: Ty
 
 u_dot :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Packed_Vector_Format)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUDot(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpUDot(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4957,7 +4957,7 @@ inst_OpSUDot :: #force_inline proc "contextless" (buf: []Operand, result_type: T
 
 su_dot :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Packed_Vector_Format)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSUDot(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSUDot(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -4972,7 +4972,7 @@ inst_OpSDotAccSat :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 s_dot_acc_sat :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Packed_Vector_Format)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSDotAccSat(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSDotAccSat(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -4987,7 +4987,7 @@ inst_OpUDotAccSat :: #force_inline proc "contextless" (buf: []Operand, result_ty
 
 u_dot_acc_sat :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Packed_Vector_Format)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUDotAccSat(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpUDotAccSat(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -5002,7 +5002,7 @@ inst_OpSUDotAccSat :: #force_inline proc "contextless" (buf: []Operand, result_t
 
 su_dot_acc_sat :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Packed_Vector_Format)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSUDotAccSat(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSUDotAccSat(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -5018,7 +5018,7 @@ inst_OpTypeCooperativeMatrixKHR :: #force_inline proc "contextless" (buf: []Oper
 
 type_cooperative_matrix_khr :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeCooperativeMatrixKHR(opbuf(b, 1 + 1 + 1 + 1 + 1), r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpTypeCooperativeMatrixKHR(opbuf(b, 1 + 1 + 1 + 1 + 1), r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -5033,7 +5033,7 @@ inst_OpCooperativeMatrixLoadKHR :: #force_inline proc "contextless" (buf: []Oper
 
 cooperative_matrix_load_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Id), op4: Maybe(Memory_Access)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixLoadKHR(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpCooperativeMatrixLoadKHR(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -5048,7 +5048,7 @@ inst_OpCooperativeMatrixStoreKHR :: #force_inline proc "contextless" (buf: []Ope
 }
 
 cooperative_matrix_store_khr :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Maybe(Id), op5: Maybe(Memory_Access)) {
-	append(&b.ops, inst_OpCooperativeMatrixStoreKHR(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpCooperativeMatrixStoreKHR(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpCooperativeMatrixMulAddKHR :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Maybe(Cooperative_Matrix_Operands)) -> Operation {
@@ -5062,7 +5062,7 @@ inst_OpCooperativeMatrixMulAddKHR :: #force_inline proc "contextless" (buf: []Op
 
 cooperative_matrix_mul_add_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Cooperative_Matrix_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixMulAddKHR(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpCooperativeMatrixMulAddKHR(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -5074,7 +5074,7 @@ inst_OpCooperativeMatrixLengthKHR :: #force_inline proc "contextless" (buf: []Op
 
 cooperative_matrix_length_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixLengthKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCooperativeMatrixLengthKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5086,7 +5086,7 @@ inst_OpConstantCompositeReplicateEXT :: #force_inline proc "contextless" (buf: [
 
 constant_composite_replicate_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantCompositeReplicateEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConstantCompositeReplicateEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5098,7 +5098,7 @@ inst_OpSpecConstantCompositeReplicateEXT :: #force_inline proc "contextless" (bu
 
 spec_constant_composite_replicate_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantCompositeReplicateEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSpecConstantCompositeReplicateEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5110,7 +5110,7 @@ inst_OpCompositeConstructReplicateEXT :: #force_inline proc "contextless" (buf:
 
 composite_construct_replicate_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCompositeConstructReplicateEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCompositeConstructReplicateEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5120,7 +5120,7 @@ inst_OpTypeRayQueryKHR :: #force_inline proc "contextless" (result: Id) -> Opera
 
 type_ray_query_khr :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeRayQueryKHR(r))
+	append_elem(&b.ops, inst_OpTypeRayQueryKHR(r))
 	return r
 }
 
@@ -5138,7 +5138,7 @@ inst_OpRayQueryInitializeKHR :: #force_inline proc "contextless" (buf: []Operand
 }
 
 ray_query_initialize_khr :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id) {
-	append(&b.ops, inst_OpRayQueryInitializeKHR(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpRayQueryInitializeKHR(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8))
 }
 
 inst_OpRayQueryTerminateKHR :: #force_inline proc "contextless" (buf: []Operand, op1: Id) -> Operation {
@@ -5148,7 +5148,7 @@ inst_OpRayQueryTerminateKHR :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 ray_query_terminate_khr :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpRayQueryTerminateKHR(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpRayQueryTerminateKHR(opbuf(b, 1), op1))
 }
 
 inst_OpRayQueryGenerateIntersectionKHR :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id) -> Operation {
@@ -5159,7 +5159,7 @@ inst_OpRayQueryGenerateIntersectionKHR :: #force_inline proc "contextless" (buf:
 }
 
 ray_query_generate_intersection_khr :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpRayQueryGenerateIntersectionKHR(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGenerateIntersectionKHR(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpRayQueryConfirmIntersectionKHR :: #force_inline proc "contextless" (buf: []Operand, op1: Id) -> Operation {
@@ -5169,7 +5169,7 @@ inst_OpRayQueryConfirmIntersectionKHR :: #force_inline proc "contextless" (buf:
 }
 
 ray_query_confirm_intersection_khr :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpRayQueryConfirmIntersectionKHR(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpRayQueryConfirmIntersectionKHR(opbuf(b, 1), op1))
 }
 
 inst_OpRayQueryProceedKHR :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -5180,7 +5180,7 @@ inst_OpRayQueryProceedKHR :: #force_inline proc "contextless" (buf: []Operand, r
 
 ray_query_proceed_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryProceedKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpRayQueryProceedKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5193,7 +5193,7 @@ inst_OpRayQueryGetIntersectionTypeKHR :: #force_inline proc "contextless" (buf:
 
 ray_query_get_intersection_type_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionTypeKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionTypeKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -5207,7 +5207,7 @@ inst_OpImageSampleWeightedQCOM :: #force_inline proc "contextless" (buf: []Opera
 
 image_sample_weighted_qcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleWeightedQCOM(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageSampleWeightedQCOM(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5221,7 +5221,7 @@ inst_OpImageBoxFilterQCOM :: #force_inline proc "contextless" (buf: []Operand, r
 
 image_box_filter_qcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageBoxFilterQCOM(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpImageBoxFilterQCOM(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5237,7 +5237,7 @@ inst_OpImageBlockMatchSSDQCOM :: #force_inline proc "contextless" (buf: []Operan
 
 image_block_match_ssdqcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageBlockMatchSSDQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpImageBlockMatchSSDQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -5253,7 +5253,7 @@ inst_OpImageBlockMatchSADQCOM :: #force_inline proc "contextless" (buf: []Operan
 
 image_block_match_sadqcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageBlockMatchSADQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpImageBlockMatchSADQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -5265,7 +5265,7 @@ inst_OpBitCastArrayQCOM :: #force_inline proc "contextless" (buf: []Operand, res
 
 bit_cast_array_qcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitCastArrayQCOM(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpBitCastArrayQCOM(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5281,7 +5281,7 @@ inst_OpImageBlockMatchWindowSSDQCOM :: #force_inline proc "contextless" (buf: []
 
 image_block_match_window_ssdqcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageBlockMatchWindowSSDQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpImageBlockMatchWindowSSDQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -5297,7 +5297,7 @@ inst_OpImageBlockMatchWindowSADQCOM :: #force_inline proc "contextless" (buf: []
 
 image_block_match_window_sadqcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageBlockMatchWindowSADQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpImageBlockMatchWindowSADQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -5313,7 +5313,7 @@ inst_OpImageBlockMatchGatherSSDQCOM :: #force_inline proc "contextless" (buf: []
 
 image_block_match_gather_ssdqcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageBlockMatchGatherSSDQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpImageBlockMatchGatherSSDQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -5329,7 +5329,7 @@ inst_OpImageBlockMatchGatherSADQCOM :: #force_inline proc "contextless" (buf: []
 
 image_block_match_gather_sadqcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageBlockMatchGatherSADQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpImageBlockMatchGatherSADQCOM(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -5341,7 +5341,7 @@ inst_OpCompositeConstructCoopMatQCOM :: #force_inline proc "contextless" (buf: [
 
 composite_construct_coop_mat_qcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCompositeConstructCoopMatQCOM(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCompositeConstructCoopMatQCOM(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5353,7 +5353,7 @@ inst_OpCompositeExtractCoopMatQCOM :: #force_inline proc "contextless" (buf: []O
 
 composite_extract_coop_mat_qcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCompositeExtractCoopMatQCOM(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCompositeExtractCoopMatQCOM(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5366,7 +5366,7 @@ inst_OpExtractSubArrayQCOM :: #force_inline proc "contextless" (buf: []Operand,
 
 extract_sub_array_qcom :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpExtractSubArrayQCOM(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpExtractSubArrayQCOM(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -5380,7 +5380,7 @@ inst_OpGroupIAddNonUniformAMD :: #force_inline proc "contextless" (buf: []Operan
 
 group_i_add_non_uniform_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupIAddNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupIAddNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5394,7 +5394,7 @@ inst_OpGroupFAddNonUniformAMD :: #force_inline proc "contextless" (buf: []Operan
 
 group_f_add_non_uniform_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupFAddNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupFAddNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5408,7 +5408,7 @@ inst_OpGroupFMinNonUniformAMD :: #force_inline proc "contextless" (buf: []Operan
 
 group_f_min_non_uniform_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupFMinNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupFMinNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5422,7 +5422,7 @@ inst_OpGroupUMinNonUniformAMD :: #force_inline proc "contextless" (buf: []Operan
 
 group_u_min_non_uniform_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupUMinNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupUMinNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5436,7 +5436,7 @@ inst_OpGroupSMinNonUniformAMD :: #force_inline proc "contextless" (buf: []Operan
 
 group_s_min_non_uniform_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupSMinNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupSMinNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5450,7 +5450,7 @@ inst_OpGroupFMaxNonUniformAMD :: #force_inline proc "contextless" (buf: []Operan
 
 group_f_max_non_uniform_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupFMaxNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupFMaxNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5464,7 +5464,7 @@ inst_OpGroupUMaxNonUniformAMD :: #force_inline proc "contextless" (buf: []Operan
 
 group_u_max_non_uniform_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupUMaxNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupUMaxNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5478,7 +5478,7 @@ inst_OpGroupSMaxNonUniformAMD :: #force_inline proc "contextless" (buf: []Operan
 
 group_s_max_non_uniform_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupSMaxNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupSMaxNonUniformAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5491,7 +5491,7 @@ inst_OpFragmentMaskFetchAMD :: #force_inline proc "contextless" (buf: []Operand,
 
 fragment_mask_fetch_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFragmentMaskFetchAMD(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpFragmentMaskFetchAMD(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -5505,7 +5505,7 @@ inst_OpFragmentFetchAMD :: #force_inline proc "contextless" (buf: []Operand, res
 
 fragment_fetch_amd :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFragmentFetchAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpFragmentFetchAMD(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5517,7 +5517,7 @@ inst_OpReadClockKHR :: #force_inline proc "contextless" (buf: []Operand, result_
 
 read_clock_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpReadClockKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpReadClockKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5531,7 +5531,7 @@ inst_OpAllocateNodePayloadsAMDX :: #force_inline proc "contextless" (buf: []Oper
 
 allocate_node_payloads_amdx :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAllocateNodePayloadsAMDX(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpAllocateNodePayloadsAMDX(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -5542,7 +5542,7 @@ inst_OpEnqueueNodePayloadsAMDX :: #force_inline proc "contextless" (buf: []Opera
 }
 
 enqueue_node_payloads_amdx :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpEnqueueNodePayloadsAMDX(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpEnqueueNodePayloadsAMDX(opbuf(b, 1), op1))
 }
 
 inst_OpTypeNodePayloadArrayAMDX :: #force_inline proc "contextless" (buf: []Operand, result: Id, op1: Id) -> Operation {
@@ -5553,7 +5553,7 @@ inst_OpTypeNodePayloadArrayAMDX :: #force_inline proc "contextless" (buf: []Oper
 
 type_node_payload_array_amdx :: proc(b: ^Builder, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeNodePayloadArrayAMDX(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpTypeNodePayloadArrayAMDX(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -5565,7 +5565,7 @@ inst_OpFinishWritingNodePayloadAMDX :: #force_inline proc "contextless" (buf: []
 
 finish_writing_node_payload_amdx :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFinishWritingNodePayloadAMDX(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFinishWritingNodePayloadAMDX(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5577,7 +5577,7 @@ inst_OpNodePayloadArrayLengthAMDX :: #force_inline proc "contextless" (buf: []Op
 
 node_payload_array_length_amdx :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpNodePayloadArrayLengthAMDX(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpNodePayloadArrayLengthAMDX(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5590,7 +5590,7 @@ inst_OpIsNodePayloadValidAMDX :: #force_inline proc "contextless" (buf: []Operan
 
 is_node_payload_valid_amdx :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIsNodePayloadValidAMDX(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIsNodePayloadValidAMDX(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -5602,7 +5602,7 @@ inst_OpConstantStringAMDX :: #force_inline proc "contextless" (buf: []Operand, r
 
 constant_string_amdx :: proc(b: ^Builder, op1: string) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantStringAMDX(opbuf(b, (len(op1) + 4) / 4), r, op1))
+	append_elem(&b.ops, inst_OpConstantStringAMDX(opbuf(b, (len(op1) + 4) / 4), r, op1))
 	return r
 }
 
@@ -5614,7 +5614,7 @@ inst_OpSpecConstantStringAMDX :: #force_inline proc "contextless" (buf: []Operan
 
 spec_constant_string_amdx :: proc(b: ^Builder, op1: string) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantStringAMDX(opbuf(b, (len(op1) + 4) / 4), r, op1))
+	append_elem(&b.ops, inst_OpSpecConstantStringAMDX(opbuf(b, (len(op1) + 4) / 4), r, op1))
 	return r
 }
 
@@ -5626,7 +5626,7 @@ inst_OpGroupNonUniformQuadAllKHR :: #force_inline proc "contextless" (buf: []Ope
 
 group_non_uniform_quad_all_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformQuadAllKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpGroupNonUniformQuadAllKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5638,7 +5638,7 @@ inst_OpGroupNonUniformQuadAnyKHR :: #force_inline proc "contextless" (buf: []Ope
 
 group_non_uniform_quad_any_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformQuadAnyKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpGroupNonUniformQuadAnyKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5650,7 +5650,7 @@ inst_OpTypeBufferEXT :: #force_inline proc "contextless" (buf: []Operand, result
 
 type_buffer_ext :: proc(b: ^Builder, op1: Storage_Class) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeBufferEXT(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpTypeBufferEXT(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -5662,7 +5662,7 @@ inst_OpBufferPointerEXT :: #force_inline proc "contextless" (buf: []Operand, res
 
 buffer_pointer_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBufferPointerEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpBufferPointerEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5674,7 +5674,7 @@ inst_OpAbortKHR :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op
 }
 
 abort_khr :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpAbortKHR(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpAbortKHR(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpUntypedImageTexelPointerEXT :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id) -> Operation {
@@ -5688,7 +5688,7 @@ inst_OpUntypedImageTexelPointerEXT :: #force_inline proc "contextless" (buf: []O
 
 untyped_image_texel_pointer_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedImageTexelPointerEXT(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpUntypedImageTexelPointerEXT(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -5701,7 +5701,7 @@ inst_OpMemberDecorateIdEXT :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 member_decorate_id_ext :: proc(b: ^Builder, op1: Id, op2: i64, op3: Decoration) {
-	append(&b.ops, inst_OpMemberDecorateIdEXT(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpMemberDecorateIdEXT(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpConstantSizeOfEXT :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -5712,7 +5712,7 @@ inst_OpConstantSizeOfEXT :: #force_inline proc "contextless" (buf: []Operand, re
 
 constant_size_of_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantSizeOfEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConstantSizeOfEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5724,7 +5724,7 @@ inst_OpConstantDataKHR :: #force_inline proc "contextless" (buf: []Operand, resu
 
 constant_data_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: []i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantDataKHR(opbuf(b, len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConstantDataKHR(opbuf(b, len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -5736,7 +5736,7 @@ inst_OpSpecConstantDataKHR :: #force_inline proc "contextless" (buf: []Operand,
 
 spec_constant_data_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: []i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantDataKHR(opbuf(b, len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSpecConstantDataKHR(opbuf(b, len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -5746,7 +5746,7 @@ inst_OpPoisonKHR :: #force_inline proc "contextless" (result_type: Type_Ref, res
 
 poison_khr :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPoisonKHR(result_type, r))
+	append_elem(&b.ops, inst_OpPoisonKHR(result_type, r))
 	return r
 }
 
@@ -5758,7 +5758,7 @@ inst_OpFreezeKHR :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 freeze_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFreezeKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFreezeKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5782,7 +5782,7 @@ inst_OpHitObjectRecordHitMotionNV :: #force_inline proc "contextless" (buf: []Op
 }
 
 hit_object_record_hit_motion_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id, op14: Id) {
-	append(&b.ops, inst_OpHitObjectRecordHitMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13, op14))
+	append_elem(&b.ops, inst_OpHitObjectRecordHitMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13, op14))
 }
 
 inst_OpHitObjectRecordHitWithIndexMotionNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id) -> Operation {
@@ -5804,7 +5804,7 @@ inst_OpHitObjectRecordHitWithIndexMotionNV :: #force_inline proc "contextless" (
 }
 
 hit_object_record_hit_with_index_motion_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id) {
-	append(&b.ops, inst_OpHitObjectRecordHitWithIndexMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13))
+	append_elem(&b.ops, inst_OpHitObjectRecordHitWithIndexMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13))
 }
 
 inst_OpHitObjectRecordMissMotionNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id) -> Operation {
@@ -5820,7 +5820,7 @@ inst_OpHitObjectRecordMissMotionNV :: #force_inline proc "contextless" (buf: []O
 }
 
 hit_object_record_miss_motion_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id) {
-	append(&b.ops, inst_OpHitObjectRecordMissMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7))
+	append_elem(&b.ops, inst_OpHitObjectRecordMissMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7))
 }
 
 inst_OpHitObjectGetWorldToObjectNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -5831,7 +5831,7 @@ inst_OpHitObjectGetWorldToObjectNV :: #force_inline proc "contextless" (buf: []O
 
 hit_object_get_world_to_object_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetWorldToObjectNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetWorldToObjectNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5843,7 +5843,7 @@ inst_OpHitObjectGetObjectToWorldNV :: #force_inline proc "contextless" (buf: []O
 
 hit_object_get_object_to_world_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetObjectToWorldNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetObjectToWorldNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5855,7 +5855,7 @@ inst_OpHitObjectGetObjectRayDirectionNV :: #force_inline proc "contextless" (buf
 
 hit_object_get_object_ray_direction_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetObjectRayDirectionNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetObjectRayDirectionNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5867,7 +5867,7 @@ inst_OpHitObjectGetObjectRayOriginNV :: #force_inline proc "contextless" (buf: [
 
 hit_object_get_object_ray_origin_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetObjectRayOriginNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetObjectRayOriginNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5890,7 +5890,7 @@ inst_OpHitObjectTraceRayMotionNV :: #force_inline proc "contextless" (buf: []Ope
 }
 
 hit_object_trace_ray_motion_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id) {
-	append(&b.ops, inst_OpHitObjectTraceRayMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13))
+	append_elem(&b.ops, inst_OpHitObjectTraceRayMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13))
 }
 
 inst_OpHitObjectGetShaderRecordBufferHandleNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -5901,7 +5901,7 @@ inst_OpHitObjectGetShaderRecordBufferHandleNV :: #force_inline proc "contextless
 
 hit_object_get_shader_record_buffer_handle_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetShaderRecordBufferHandleNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetShaderRecordBufferHandleNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5913,7 +5913,7 @@ inst_OpHitObjectGetShaderBindingTableRecordIndexNV :: #force_inline proc "contex
 
 hit_object_get_shader_binding_table_record_index_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetShaderBindingTableRecordIndexNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetShaderBindingTableRecordIndexNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -5924,7 +5924,7 @@ inst_OpHitObjectRecordEmptyNV :: #force_inline proc "contextless" (buf: []Operan
 }
 
 hit_object_record_empty_nv :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpHitObjectRecordEmptyNV(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpHitObjectRecordEmptyNV(opbuf(b, 1), op1))
 }
 
 inst_OpHitObjectTraceRayNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) -> Operation {
@@ -5945,7 +5945,7 @@ inst_OpHitObjectTraceRayNV :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 hit_object_trace_ray_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) {
-	append(&b.ops, inst_OpHitObjectTraceRayNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
+	append_elem(&b.ops, inst_OpHitObjectTraceRayNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
 }
 
 inst_OpHitObjectRecordHitNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id) -> Operation {
@@ -5967,7 +5967,7 @@ inst_OpHitObjectRecordHitNV :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 hit_object_record_hit_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id) {
-	append(&b.ops, inst_OpHitObjectRecordHitNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13))
+	append_elem(&b.ops, inst_OpHitObjectRecordHitNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13))
 }
 
 inst_OpHitObjectRecordHitWithIndexNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) -> Operation {
@@ -5988,7 +5988,7 @@ inst_OpHitObjectRecordHitWithIndexNV :: #force_inline proc "contextless" (buf: [
 }
 
 hit_object_record_hit_with_index_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) {
-	append(&b.ops, inst_OpHitObjectRecordHitWithIndexNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
+	append_elem(&b.ops, inst_OpHitObjectRecordHitWithIndexNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
 }
 
 inst_OpHitObjectRecordMissNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) -> Operation {
@@ -6003,7 +6003,7 @@ inst_OpHitObjectRecordMissNV :: #force_inline proc "contextless" (buf: []Operand
 }
 
 hit_object_record_miss_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) {
-	append(&b.ops, inst_OpHitObjectRecordMissNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpHitObjectRecordMissNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6))
 }
 
 inst_OpHitObjectExecuteShaderNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id) -> Operation {
@@ -6014,7 +6014,7 @@ inst_OpHitObjectExecuteShaderNV :: #force_inline proc "contextless" (buf: []Oper
 }
 
 hit_object_execute_shader_nv :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpHitObjectExecuteShaderNV(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpHitObjectExecuteShaderNV(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpHitObjectGetCurrentTimeNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -6025,7 +6025,7 @@ inst_OpHitObjectGetCurrentTimeNV :: #force_inline proc "contextless" (buf: []Ope
 
 hit_object_get_current_time_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetCurrentTimeNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetCurrentTimeNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6037,7 +6037,7 @@ inst_OpHitObjectGetAttributesNV :: #force_inline proc "contextless" (buf: []Oper
 }
 
 hit_object_get_attributes_nv :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpHitObjectGetAttributesNV(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpHitObjectGetAttributesNV(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpHitObjectGetHitKindNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -6048,7 +6048,7 @@ inst_OpHitObjectGetHitKindNV :: #force_inline proc "contextless" (buf: []Operand
 
 hit_object_get_hit_kind_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetHitKindNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetHitKindNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6060,7 +6060,7 @@ inst_OpHitObjectGetPrimitiveIndexNV :: #force_inline proc "contextless" (buf: []
 
 hit_object_get_primitive_index_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetPrimitiveIndexNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetPrimitiveIndexNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6072,7 +6072,7 @@ inst_OpHitObjectGetGeometryIndexNV :: #force_inline proc "contextless" (buf: []O
 
 hit_object_get_geometry_index_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetGeometryIndexNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetGeometryIndexNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6084,7 +6084,7 @@ inst_OpHitObjectGetInstanceIdNV :: #force_inline proc "contextless" (buf: []Oper
 
 hit_object_get_instance_id_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetInstanceIdNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetInstanceIdNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6096,7 +6096,7 @@ inst_OpHitObjectGetInstanceCustomIndexNV :: #force_inline proc "contextless" (bu
 
 hit_object_get_instance_custom_index_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetInstanceCustomIndexNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetInstanceCustomIndexNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6108,7 +6108,7 @@ inst_OpHitObjectGetWorldRayDirectionNV :: #force_inline proc "contextless" (buf:
 
 hit_object_get_world_ray_direction_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetWorldRayDirectionNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetWorldRayDirectionNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6120,7 +6120,7 @@ inst_OpHitObjectGetWorldRayOriginNV :: #force_inline proc "contextless" (buf: []
 
 hit_object_get_world_ray_origin_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetWorldRayOriginNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetWorldRayOriginNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6132,7 +6132,7 @@ inst_OpHitObjectGetRayTMaxNV :: #force_inline proc "contextless" (buf: []Operand
 
 hit_object_get_ray_t_max_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetRayTMaxNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetRayTMaxNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6144,7 +6144,7 @@ inst_OpHitObjectGetRayTMinNV :: #force_inline proc "contextless" (buf: []Operand
 
 hit_object_get_ray_t_min_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetRayTMinNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetRayTMinNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6156,7 +6156,7 @@ inst_OpHitObjectIsEmptyNV :: #force_inline proc "contextless" (buf: []Operand, r
 
 hit_object_is_empty_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectIsEmptyNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectIsEmptyNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6168,7 +6168,7 @@ inst_OpHitObjectIsHitNV :: #force_inline proc "contextless" (buf: []Operand, res
 
 hit_object_is_hit_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectIsHitNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectIsHitNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6180,7 +6180,7 @@ inst_OpHitObjectIsMissNV :: #force_inline proc "contextless" (buf: []Operand, re
 
 hit_object_is_miss_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectIsMissNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectIsMissNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6193,7 +6193,7 @@ inst_OpReorderThreadWithHitObjectNV :: #force_inline proc "contextless" (buf: []
 }
 
 reorder_thread_with_hit_object_nv :: proc(b: ^Builder, op1: Id, op2: Maybe(Id), op3: Maybe(Id)) {
-	append(&b.ops, inst_OpReorderThreadWithHitObjectNV(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpReorderThreadWithHitObjectNV(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpReorderThreadWithHintNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id) -> Operation {
@@ -6204,7 +6204,7 @@ inst_OpReorderThreadWithHintNV :: #force_inline proc "contextless" (buf: []Opera
 }
 
 reorder_thread_with_hint_nv :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpReorderThreadWithHintNV(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpReorderThreadWithHintNV(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpTypeHitObjectNV :: #force_inline proc "contextless" (result: Id) -> Operation {
@@ -6213,7 +6213,7 @@ inst_OpTypeHitObjectNV :: #force_inline proc "contextless" (result: Id) -> Opera
 
 type_hit_object_nv :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeHitObjectNV(r))
+	append_elem(&b.ops, inst_OpTypeHitObjectNV(r))
 	return r
 }
 
@@ -6229,7 +6229,7 @@ inst_OpImageSampleFootprintNV :: #force_inline proc "contextless" (buf: []Operan
 
 image_sample_footprint_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Maybe(Image_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpImageSampleFootprintNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpImageSampleFootprintNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -6242,7 +6242,7 @@ inst_OpTypeVectorIdEXT :: #force_inline proc "contextless" (buf: []Operand, resu
 
 type_vector_id_ext :: proc(b: ^Builder, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeVectorIdEXT(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeVectorIdEXT(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -6264,7 +6264,7 @@ inst_OpCooperativeVectorMatrixMulNV :: #force_inline proc "contextless" (buf: []
 
 cooperative_vector_matrix_mul_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Maybe(Id), op11: Maybe(Cooperative_Matrix_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeVectorMatrixMulNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
+	append_elem(&b.ops, inst_OpCooperativeVectorMatrixMulNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
 	return r
 }
 
@@ -6281,7 +6281,7 @@ inst_OpCooperativeVectorOuterProductAccumulateNV :: #force_inline proc "contextl
 }
 
 cooperative_vector_outer_product_accumulate_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Maybe(Id)) {
-	append(&b.ops, inst_OpCooperativeVectorOuterProductAccumulateNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7))
+	append_elem(&b.ops, inst_OpCooperativeVectorOuterProductAccumulateNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7))
 }
 
 inst_OpCooperativeVectorReduceSumAccumulateNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id) -> Operation {
@@ -6293,7 +6293,7 @@ inst_OpCooperativeVectorReduceSumAccumulateNV :: #force_inline proc "contextless
 }
 
 cooperative_vector_reduce_sum_accumulate_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpCooperativeVectorReduceSumAccumulateNV(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpCooperativeVectorReduceSumAccumulateNV(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpCooperativeVectorMatrixMulAddNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Maybe(Id), op14: Maybe(Cooperative_Matrix_Operands)) -> Operation {
@@ -6317,7 +6317,7 @@ inst_OpCooperativeVectorMatrixMulAddNV :: #force_inline proc "contextless" (buf:
 
 cooperative_vector_matrix_mul_add_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Maybe(Id), op14: Maybe(Cooperative_Matrix_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeVectorMatrixMulAddNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13, op14))
+	append_elem(&b.ops, inst_OpCooperativeVectorMatrixMulAddNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13, op14))
 	return r
 }
 
@@ -6329,7 +6329,7 @@ inst_OpCooperativeMatrixConvertNV :: #force_inline proc "contextless" (buf: []Op
 
 cooperative_matrix_convert_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixConvertNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCooperativeMatrixConvertNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6343,7 +6343,7 @@ inst_OpEmitMeshTasksEXT :: #force_inline proc "contextless" (buf: []Operand, op1
 }
 
 emit_mesh_tasks_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Maybe(Id)) {
-	append(&b.ops, inst_OpEmitMeshTasksEXT(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpEmitMeshTasksEXT(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpSetMeshOutputsEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id) -> Operation {
@@ -6354,7 +6354,7 @@ inst_OpSetMeshOutputsEXT :: #force_inline proc "contextless" (buf: []Operand, op
 }
 
 set_mesh_outputs_ext :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpSetMeshOutputsEXT(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpSetMeshOutputsEXT(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpGroupNonUniformPartitionEXT :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -6365,7 +6365,7 @@ inst_OpGroupNonUniformPartitionEXT :: #force_inline proc "contextless" (buf: []O
 
 group_non_uniform_partition_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupNonUniformPartitionEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpGroupNonUniformPartitionEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6377,7 +6377,7 @@ inst_OpWritePackedPrimitiveIndices4x8NV :: #force_inline proc "contextless" (buf
 }
 
 write_packed_primitive_indices4x8_nv :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpWritePackedPrimitiveIndices4x8NV(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpWritePackedPrimitiveIndices4x8NV(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpFetchMicroTriangleVertexPositionNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Operation {
@@ -6392,7 +6392,7 @@ inst_OpFetchMicroTriangleVertexPositionNV :: #force_inline proc "contextless" (b
 
 fetch_micro_triangle_vertex_position_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFetchMicroTriangleVertexPositionNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpFetchMicroTriangleVertexPositionNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -6408,7 +6408,7 @@ inst_OpFetchMicroTriangleVertexBarycentricNV :: #force_inline proc "contextless"
 
 fetch_micro_triangle_vertex_barycentric_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFetchMicroTriangleVertexBarycentricNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpFetchMicroTriangleVertexBarycentricNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -6422,7 +6422,7 @@ inst_OpCooperativeVectorLoadNV :: #force_inline proc "contextless" (buf: []Opera
 
 cooperative_vector_load_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Maybe(Memory_Access)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeVectorLoadNV(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpCooperativeVectorLoadNV(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -6436,7 +6436,7 @@ inst_OpCooperativeVectorStoreNV :: #force_inline proc "contextless" (buf: []Oper
 }
 
 cooperative_vector_store_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Maybe(Memory_Access)) {
-	append(&b.ops, inst_OpCooperativeVectorStoreNV(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpCooperativeVectorStoreNV(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpHitObjectRecordFromQueryEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Maybe(Id)) -> Operation {
@@ -6450,7 +6450,7 @@ inst_OpHitObjectRecordFromQueryEXT :: #force_inline proc "contextless" (buf: []O
 }
 
 hit_object_record_from_query_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Maybe(Id)) {
-	append(&b.ops, inst_OpHitObjectRecordFromQueryEXT(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpHitObjectRecordFromQueryEXT(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpHitObjectRecordMissEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id) -> Operation {
@@ -6466,7 +6466,7 @@ inst_OpHitObjectRecordMissEXT :: #force_inline proc "contextless" (buf: []Operan
 }
 
 hit_object_record_miss_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id) {
-	append(&b.ops, inst_OpHitObjectRecordMissEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7))
+	append_elem(&b.ops, inst_OpHitObjectRecordMissEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7))
 }
 
 inst_OpHitObjectRecordMissMotionEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id) -> Operation {
@@ -6483,7 +6483,7 @@ inst_OpHitObjectRecordMissMotionEXT :: #force_inline proc "contextless" (buf: []
 }
 
 hit_object_record_miss_motion_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id) {
-	append(&b.ops, inst_OpHitObjectRecordMissMotionEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpHitObjectRecordMissMotionEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8))
 }
 
 inst_OpHitObjectGetIntersectionTriangleVertexPositionsEXT :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -6494,7 +6494,7 @@ inst_OpHitObjectGetIntersectionTriangleVertexPositionsEXT :: #force_inline proc
 
 hit_object_get_intersection_triangle_vertex_positions_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetIntersectionTriangleVertexPositionsEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetIntersectionTriangleVertexPositionsEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6506,7 +6506,7 @@ inst_OpHitObjectGetRayFlagsEXT :: #force_inline proc "contextless" (buf: []Opera
 
 hit_object_get_ray_flags_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetRayFlagsEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetRayFlagsEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6518,7 +6518,7 @@ inst_OpHitObjectSetShaderBindingTableRecordIndexEXT :: #force_inline proc "conte
 }
 
 hit_object_set_shader_binding_table_record_index_ext :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpHitObjectSetShaderBindingTableRecordIndexEXT(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpHitObjectSetShaderBindingTableRecordIndexEXT(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpHitObjectReorderExecuteShaderEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Maybe(Id), op4: Maybe(Id)) -> Operation {
@@ -6531,7 +6531,7 @@ inst_OpHitObjectReorderExecuteShaderEXT :: #force_inline proc "contextless" (buf
 }
 
 hit_object_reorder_execute_shader_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Maybe(Id), op4: Maybe(Id)) {
-	append(&b.ops, inst_OpHitObjectReorderExecuteShaderEXT(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpHitObjectReorderExecuteShaderEXT(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpHitObjectTraceReorderExecuteEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Maybe(Id), op14: Maybe(Id)) -> Operation {
@@ -6554,7 +6554,7 @@ inst_OpHitObjectTraceReorderExecuteEXT :: #force_inline proc "contextless" (buf:
 }
 
 hit_object_trace_reorder_execute_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Maybe(Id), op14: Maybe(Id)) {
-	append(&b.ops, inst_OpHitObjectTraceReorderExecuteEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13, op14))
+	append_elem(&b.ops, inst_OpHitObjectTraceReorderExecuteEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13, op14))
 }
 
 inst_OpHitObjectTraceMotionReorderExecuteEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id, op14: Maybe(Id), op15: Maybe(Id)) -> Operation {
@@ -6578,7 +6578,7 @@ inst_OpHitObjectTraceMotionReorderExecuteEXT :: #force_inline proc "contextless"
 }
 
 hit_object_trace_motion_reorder_execute_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id, op14: Maybe(Id), op15: Maybe(Id)) {
-	append(&b.ops, inst_OpHitObjectTraceMotionReorderExecuteEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13, op14, op15))
+	append_elem(&b.ops, inst_OpHitObjectTraceMotionReorderExecuteEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13, op14, op15))
 }
 
 inst_OpTypeHitObjectEXT :: #force_inline proc "contextless" (result: Id) -> Operation {
@@ -6587,7 +6587,7 @@ inst_OpTypeHitObjectEXT :: #force_inline proc "contextless" (result: Id) -> Oper
 
 type_hit_object_ext :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeHitObjectEXT(r))
+	append_elem(&b.ops, inst_OpTypeHitObjectEXT(r))
 	return r
 }
 
@@ -6599,7 +6599,7 @@ inst_OpReorderThreadWithHintEXT :: #force_inline proc "contextless" (buf: []Oper
 }
 
 reorder_thread_with_hint_ext :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpReorderThreadWithHintEXT(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpReorderThreadWithHintEXT(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpReorderThreadWithHitObjectEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Maybe(Id), op3: Maybe(Id)) -> Operation {
@@ -6611,7 +6611,7 @@ inst_OpReorderThreadWithHitObjectEXT :: #force_inline proc "contextless" (buf: [
 }
 
 reorder_thread_with_hit_object_ext :: proc(b: ^Builder, op1: Id, op2: Maybe(Id), op3: Maybe(Id)) {
-	append(&b.ops, inst_OpReorderThreadWithHitObjectEXT(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpReorderThreadWithHitObjectEXT(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpHitObjectTraceRayEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) -> Operation {
@@ -6632,7 +6632,7 @@ inst_OpHitObjectTraceRayEXT :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 hit_object_trace_ray_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) {
-	append(&b.ops, inst_OpHitObjectTraceRayEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
+	append_elem(&b.ops, inst_OpHitObjectTraceRayEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
 }
 
 inst_OpHitObjectTraceRayMotionEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id) -> Operation {
@@ -6654,7 +6654,7 @@ inst_OpHitObjectTraceRayMotionEXT :: #force_inline proc "contextless" (buf: []Op
 }
 
 hit_object_trace_ray_motion_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id, op13: Id) {
-	append(&b.ops, inst_OpHitObjectTraceRayMotionEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13))
+	append_elem(&b.ops, inst_OpHitObjectTraceRayMotionEXT(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12, op13))
 }
 
 inst_OpHitObjectRecordEmptyEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id) -> Operation {
@@ -6664,7 +6664,7 @@ inst_OpHitObjectRecordEmptyEXT :: #force_inline proc "contextless" (buf: []Opera
 }
 
 hit_object_record_empty_ext :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpHitObjectRecordEmptyEXT(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpHitObjectRecordEmptyEXT(opbuf(b, 1), op1))
 }
 
 inst_OpHitObjectExecuteShaderEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id) -> Operation {
@@ -6675,7 +6675,7 @@ inst_OpHitObjectExecuteShaderEXT :: #force_inline proc "contextless" (buf: []Ope
 }
 
 hit_object_execute_shader_ext :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpHitObjectExecuteShaderEXT(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpHitObjectExecuteShaderEXT(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpHitObjectGetCurrentTimeEXT :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -6686,7 +6686,7 @@ inst_OpHitObjectGetCurrentTimeEXT :: #force_inline proc "contextless" (buf: []Op
 
 hit_object_get_current_time_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetCurrentTimeEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetCurrentTimeEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6698,7 +6698,7 @@ inst_OpHitObjectGetAttributesEXT :: #force_inline proc "contextless" (buf: []Ope
 }
 
 hit_object_get_attributes_ext :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpHitObjectGetAttributesEXT(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpHitObjectGetAttributesEXT(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpHitObjectGetHitKindEXT :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -6709,7 +6709,7 @@ inst_OpHitObjectGetHitKindEXT :: #force_inline proc "contextless" (buf: []Operan
 
 hit_object_get_hit_kind_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetHitKindEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetHitKindEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6721,7 +6721,7 @@ inst_OpHitObjectGetPrimitiveIndexEXT :: #force_inline proc "contextless" (buf: [
 
 hit_object_get_primitive_index_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetPrimitiveIndexEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetPrimitiveIndexEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6733,7 +6733,7 @@ inst_OpHitObjectGetGeometryIndexEXT :: #force_inline proc "contextless" (buf: []
 
 hit_object_get_geometry_index_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetGeometryIndexEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetGeometryIndexEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6745,7 +6745,7 @@ inst_OpHitObjectGetInstanceIdEXT :: #force_inline proc "contextless" (buf: []Ope
 
 hit_object_get_instance_id_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetInstanceIdEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetInstanceIdEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6757,7 +6757,7 @@ inst_OpHitObjectGetInstanceCustomIndexEXT :: #force_inline proc "contextless" (b
 
 hit_object_get_instance_custom_index_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetInstanceCustomIndexEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetInstanceCustomIndexEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6769,7 +6769,7 @@ inst_OpHitObjectGetObjectRayOriginEXT :: #force_inline proc "contextless" (buf:
 
 hit_object_get_object_ray_origin_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetObjectRayOriginEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetObjectRayOriginEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6781,7 +6781,7 @@ inst_OpHitObjectGetObjectRayDirectionEXT :: #force_inline proc "contextless" (bu
 
 hit_object_get_object_ray_direction_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetObjectRayDirectionEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetObjectRayDirectionEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6793,7 +6793,7 @@ inst_OpHitObjectGetWorldRayDirectionEXT :: #force_inline proc "contextless" (buf
 
 hit_object_get_world_ray_direction_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetWorldRayDirectionEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetWorldRayDirectionEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6805,7 +6805,7 @@ inst_OpHitObjectGetWorldRayOriginEXT :: #force_inline proc "contextless" (buf: [
 
 hit_object_get_world_ray_origin_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetWorldRayOriginEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetWorldRayOriginEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6817,7 +6817,7 @@ inst_OpHitObjectGetObjectToWorldEXT :: #force_inline proc "contextless" (buf: []
 
 hit_object_get_object_to_world_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetObjectToWorldEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetObjectToWorldEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6829,7 +6829,7 @@ inst_OpHitObjectGetWorldToObjectEXT :: #force_inline proc "contextless" (buf: []
 
 hit_object_get_world_to_object_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetWorldToObjectEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetWorldToObjectEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6841,7 +6841,7 @@ inst_OpHitObjectGetRayTMaxEXT :: #force_inline proc "contextless" (buf: []Operan
 
 hit_object_get_ray_t_max_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetRayTMaxEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetRayTMaxEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -6854,7 +6854,7 @@ inst_OpReportIntersectionKHR :: #force_inline proc "contextless" (buf: []Operand
 
 report_intersection_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpReportIntersectionKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpReportIntersectionKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -6863,7 +6863,7 @@ inst_OpIgnoreIntersectionNV :: #force_inline proc "contextless" () -> Operation
 }
 
 ignore_intersection_nv :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpIgnoreIntersectionNV())
+	append_elem(&b.ops, inst_OpIgnoreIntersectionNV())
 }
 
 inst_OpTerminateRayNV :: #force_inline proc "contextless" () -> Operation {
@@ -6871,7 +6871,7 @@ inst_OpTerminateRayNV :: #force_inline proc "contextless" () -> Operation {
 }
 
 terminate_ray_nv :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpTerminateRayNV())
+	append_elem(&b.ops, inst_OpTerminateRayNV())
 }
 
 inst_OpTraceNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id) -> Operation {
@@ -6891,7 +6891,7 @@ inst_OpTraceNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2
 }
 
 trace_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id) {
-	append(&b.ops, inst_OpTraceNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
+	append_elem(&b.ops, inst_OpTraceNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
 }
 
 inst_OpTraceMotionNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) -> Operation {
@@ -6912,7 +6912,7 @@ inst_OpTraceMotionNV :: #force_inline proc "contextless" (buf: []Operand, op1: I
 }
 
 trace_motion_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) {
-	append(&b.ops, inst_OpTraceMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
+	append_elem(&b.ops, inst_OpTraceMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
 }
 
 inst_OpTraceRayMotionNV :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) -> Operation {
@@ -6933,7 +6933,7 @@ inst_OpTraceRayMotionNV :: #force_inline proc "contextless" (buf: []Operand, op1
 }
 
 trace_ray_motion_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id, op12: Id) {
-	append(&b.ops, inst_OpTraceRayMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
+	append_elem(&b.ops, inst_OpTraceRayMotionNV(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11, op12))
 }
 
 inst_OpRayQueryGetIntersectionTriangleVertexPositionsKHR :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id) -> Operation {
@@ -6945,7 +6945,7 @@ inst_OpRayQueryGetIntersectionTriangleVertexPositionsKHR :: #force_inline proc "
 
 ray_query_get_intersection_triangle_vertex_positions_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionTriangleVertexPositionsKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionTriangleVertexPositionsKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -6955,7 +6955,7 @@ inst_OpTypeAccelerationStructureKHR :: #force_inline proc "contextless" (result:
 
 type_acceleration_structure_khr :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAccelerationStructureKHR(r))
+	append_elem(&b.ops, inst_OpTypeAccelerationStructureKHR(r))
 	return r
 }
 
@@ -6967,7 +6967,7 @@ inst_OpExecuteCallableNV :: #force_inline proc "contextless" (buf: []Operand, op
 }
 
 execute_callable_nv :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpExecuteCallableNV(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpExecuteCallableNV(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpRayQueryGetIntersectionClusterIdNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id) -> Operation {
@@ -6979,7 +6979,7 @@ inst_OpRayQueryGetIntersectionClusterIdNV :: #force_inline proc "contextless" (b
 
 ray_query_get_intersection_cluster_id_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionClusterIdNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionClusterIdNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -6991,7 +6991,7 @@ inst_OpHitObjectGetClusterIdNV :: #force_inline proc "contextless" (buf: []Opera
 
 hit_object_get_cluster_id_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetClusterIdNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetClusterIdNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7003,7 +7003,7 @@ inst_OpHitObjectGetRayTMinEXT :: #force_inline proc "contextless" (buf: []Operan
 
 hit_object_get_ray_t_min_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetRayTMinEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetRayTMinEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7015,7 +7015,7 @@ inst_OpHitObjectGetShaderBindingTableRecordIndexEXT :: #force_inline proc "conte
 
 hit_object_get_shader_binding_table_record_index_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetShaderBindingTableRecordIndexEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetShaderBindingTableRecordIndexEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7027,7 +7027,7 @@ inst_OpHitObjectGetShaderRecordBufferHandleEXT :: #force_inline proc "contextles
 
 hit_object_get_shader_record_buffer_handle_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetShaderRecordBufferHandleEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetShaderRecordBufferHandleEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7039,7 +7039,7 @@ inst_OpHitObjectIsEmptyEXT :: #force_inline proc "contextless" (buf: []Operand,
 
 hit_object_is_empty_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectIsEmptyEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectIsEmptyEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7051,7 +7051,7 @@ inst_OpHitObjectIsHitEXT :: #force_inline proc "contextless" (buf: []Operand, re
 
 hit_object_is_hit_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectIsHitEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectIsHitEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7063,7 +7063,7 @@ inst_OpHitObjectIsMissEXT :: #force_inline proc "contextless" (buf: []Operand, r
 
 hit_object_is_miss_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectIsMissEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectIsMissEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7078,7 +7078,7 @@ inst_OpTypeCooperativeMatrixNV :: #force_inline proc "contextless" (buf: []Opera
 
 type_cooperative_matrix_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeCooperativeMatrixNV(opbuf(b, 1 + 1 + 1 + 1), r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpTypeCooperativeMatrixNV(opbuf(b, 1 + 1 + 1 + 1), r, op1, op2, op3, op4))
 	return r
 }
 
@@ -7093,7 +7093,7 @@ inst_OpCooperativeMatrixLoadNV :: #force_inline proc "contextless" (buf: []Opera
 
 cooperative_matrix_load_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Memory_Access)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixLoadNV(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpCooperativeMatrixLoadNV(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -7108,7 +7108,7 @@ inst_OpCooperativeMatrixStoreNV :: #force_inline proc "contextless" (buf: []Oper
 }
 
 cooperative_matrix_store_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Maybe(Memory_Access)) {
-	append(&b.ops, inst_OpCooperativeMatrixStoreNV(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpCooperativeMatrixStoreNV(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpCooperativeMatrixMulAddNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id) -> Operation {
@@ -7121,7 +7121,7 @@ inst_OpCooperativeMatrixMulAddNV :: #force_inline proc "contextless" (buf: []Ope
 
 cooperative_matrix_mul_add_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixMulAddNV(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpCooperativeMatrixMulAddNV(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -7133,7 +7133,7 @@ inst_OpCooperativeMatrixLengthNV :: #force_inline proc "contextless" (buf: []Ope
 
 cooperative_matrix_length_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixLengthNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCooperativeMatrixLengthNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7142,7 +7142,7 @@ inst_OpBeginInvocationInterlockEXT :: #force_inline proc "contextless" () -> Ope
 }
 
 begin_invocation_interlock_ext :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpBeginInvocationInterlockEXT())
+	append_elem(&b.ops, inst_OpBeginInvocationInterlockEXT())
 }
 
 inst_OpEndInvocationInterlockEXT :: #force_inline proc "contextless" () -> Operation {
@@ -7150,7 +7150,7 @@ inst_OpEndInvocationInterlockEXT :: #force_inline proc "contextless" () -> Opera
 }
 
 end_invocation_interlock_ext :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpEndInvocationInterlockEXT())
+	append_elem(&b.ops, inst_OpEndInvocationInterlockEXT())
 }
 
 inst_OpCooperativeMatrixReduceNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Cooperative_Matrix_Reduce, op3: Id) -> Operation {
@@ -7163,7 +7163,7 @@ inst_OpCooperativeMatrixReduceNV :: #force_inline proc "contextless" (buf: []Ope
 
 cooperative_matrix_reduce_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Cooperative_Matrix_Reduce, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixReduceNV(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpCooperativeMatrixReduceNV(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -7179,7 +7179,7 @@ inst_OpCooperativeMatrixLoadTensorNV :: #force_inline proc "contextless" (buf: [
 
 cooperative_matrix_load_tensor_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Memory_Access, op5: Tensor_Addressing_Operands) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixLoadTensorNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpCooperativeMatrixLoadTensorNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -7194,7 +7194,7 @@ inst_OpCooperativeMatrixStoreTensorNV :: #force_inline proc "contextless" (buf:
 }
 
 cooperative_matrix_store_tensor_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Memory_Access, op5: Tensor_Addressing_Operands) {
-	append(&b.ops, inst_OpCooperativeMatrixStoreTensorNV(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpCooperativeMatrixStoreTensorNV(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpCooperativeMatrixPerElementOpNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: []Id) -> Operation {
@@ -7207,7 +7207,7 @@ inst_OpCooperativeMatrixPerElementOpNV :: #force_inline proc "contextless" (buf:
 
 cooperative_matrix_per_element_op_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixPerElementOpNV(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpCooperativeMatrixPerElementOpNV(opbuf(b, 1 + 1 + len(op3)), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -7220,7 +7220,7 @@ inst_OpTypeTensorLayoutNV :: #force_inline proc "contextless" (buf: []Operand, r
 
 type_tensor_layout_nv :: proc(b: ^Builder, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeTensorLayoutNV(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpTypeTensorLayoutNV(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -7234,7 +7234,7 @@ inst_OpTypeTensorViewNV :: #force_inline proc "contextless" (buf: []Operand, res
 
 type_tensor_view_nv :: proc(b: ^Builder, op1: Id, op2: Id, op3: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeTensorViewNV(opbuf(b, 1 + 1 + len(op3)), r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpTypeTensorViewNV(opbuf(b, 1 + 1 + len(op3)), r, op1, op2, op3))
 	return r
 }
 
@@ -7244,7 +7244,7 @@ inst_OpCreateTensorLayoutNV :: #force_inline proc "contextless" (result_type: Ty
 
 create_tensor_layout_nv :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCreateTensorLayoutNV(result_type, r))
+	append_elem(&b.ops, inst_OpCreateTensorLayoutNV(result_type, r))
 	return r
 }
 
@@ -7257,7 +7257,7 @@ inst_OpTensorLayoutSetDimensionNV :: #force_inline proc "contextless" (buf: []Op
 
 tensor_layout_set_dimension_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorLayoutSetDimensionNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpTensorLayoutSetDimensionNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -7270,7 +7270,7 @@ inst_OpTensorLayoutSetStrideNV :: #force_inline proc "contextless" (buf: []Opera
 
 tensor_layout_set_stride_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorLayoutSetStrideNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpTensorLayoutSetStrideNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -7283,7 +7283,7 @@ inst_OpTensorLayoutSliceNV :: #force_inline proc "contextless" (buf: []Operand,
 
 tensor_layout_slice_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorLayoutSliceNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpTensorLayoutSliceNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -7296,7 +7296,7 @@ inst_OpTensorLayoutSetClampValueNV :: #force_inline proc "contextless" (buf: []O
 
 tensor_layout_set_clamp_value_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorLayoutSetClampValueNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpTensorLayoutSetClampValueNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7306,7 +7306,7 @@ inst_OpCreateTensorViewNV :: #force_inline proc "contextless" (result_type: Type
 
 create_tensor_view_nv :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCreateTensorViewNV(result_type, r))
+	append_elem(&b.ops, inst_OpCreateTensorViewNV(result_type, r))
 	return r
 }
 
@@ -7319,7 +7319,7 @@ inst_OpTensorViewSetDimensionNV :: #force_inline proc "contextless" (buf: []Oper
 
 tensor_view_set_dimension_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorViewSetDimensionNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpTensorViewSetDimensionNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -7332,7 +7332,7 @@ inst_OpTensorViewSetStrideNV :: #force_inline proc "contextless" (buf: []Operand
 
 tensor_view_set_stride_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorViewSetStrideNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpTensorViewSetStrideNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -7341,7 +7341,7 @@ inst_OpDemoteToHelperInvocation :: #force_inline proc "contextless" () -> Operat
 }
 
 demote_to_helper_invocation :: proc(b: ^Builder) {
-	append(&b.ops, inst_OpDemoteToHelperInvocation())
+	append_elem(&b.ops, inst_OpDemoteToHelperInvocation())
 }
 
 inst_OpIsHelperInvocationEXT :: #force_inline proc "contextless" (result_type: Type_Ref, result: Id) -> Operation {
@@ -7350,7 +7350,7 @@ inst_OpIsHelperInvocationEXT :: #force_inline proc "contextless" (result_type: T
 
 is_helper_invocation_ext :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIsHelperInvocationEXT(result_type, r))
+	append_elem(&b.ops, inst_OpIsHelperInvocationEXT(result_type, r))
 	return r
 }
 
@@ -7366,7 +7366,7 @@ inst_OpTensorViewSetClipNV :: #force_inline proc "contextless" (buf: []Operand,
 
 tensor_view_set_clip_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorViewSetClipNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpTensorViewSetClipNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -7379,7 +7379,7 @@ inst_OpTensorLayoutSetBlockSizeNV :: #force_inline proc "contextless" (buf: []Op
 
 tensor_layout_set_block_size_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTensorLayoutSetBlockSizeNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpTensorLayoutSetBlockSizeNV(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -7391,7 +7391,7 @@ inst_OpCooperativeMatrixTransposeNV :: #force_inline proc "contextless" (buf: []
 
 cooperative_matrix_transpose_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCooperativeMatrixTransposeNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCooperativeMatrixTransposeNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7403,7 +7403,7 @@ inst_OpConvertUToImageNV :: #force_inline proc "contextless" (buf: []Operand, re
 
 convert_u_to_image_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertUToImageNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertUToImageNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7415,7 +7415,7 @@ inst_OpConvertUToSamplerNV :: #force_inline proc "contextless" (buf: []Operand,
 
 convert_u_to_sampler_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertUToSamplerNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertUToSamplerNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7427,7 +7427,7 @@ inst_OpConvertImageToUNV :: #force_inline proc "contextless" (buf: []Operand, re
 
 convert_image_to_unv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertImageToUNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertImageToUNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7439,7 +7439,7 @@ inst_OpConvertSamplerToUNV :: #force_inline proc "contextless" (buf: []Operand,
 
 convert_sampler_to_unv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertSamplerToUNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertSamplerToUNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7451,7 +7451,7 @@ inst_OpConvertUToSampledImageNV :: #force_inline proc "contextless" (buf: []Oper
 
 convert_u_to_sampled_image_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertUToSampledImageNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertUToSampledImageNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7463,7 +7463,7 @@ inst_OpConvertSampledImageToUNV :: #force_inline proc "contextless" (buf: []Oper
 
 convert_sampled_image_to_unv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertSampledImageToUNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertSampledImageToUNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7474,7 +7474,7 @@ inst_OpSamplerImageAddressingModeNV :: #force_inline proc "contextless" (buf: []
 }
 
 sampler_image_addressing_mode_nv :: proc(b: ^Builder, op1: i64) {
-	append(&b.ops, inst_OpSamplerImageAddressingModeNV(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpSamplerImageAddressingModeNV(opbuf(b, 1), op1))
 }
 
 inst_OpRawAccessChainNV :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id, op5: Maybe(Raw_Access_Chain_Operands)) -> Operation {
@@ -7489,7 +7489,7 @@ inst_OpRawAccessChainNV :: #force_inline proc "contextless" (buf: []Operand, res
 
 raw_access_chain_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Maybe(Raw_Access_Chain_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRawAccessChainNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpRawAccessChainNV(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -7502,7 +7502,7 @@ inst_OpRayQueryGetIntersectionSpherePositionNV :: #force_inline proc "contextles
 
 ray_query_get_intersection_sphere_position_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionSpherePositionNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionSpherePositionNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7515,7 +7515,7 @@ inst_OpRayQueryGetIntersectionSphereRadiusNV :: #force_inline proc "contextless"
 
 ray_query_get_intersection_sphere_radius_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionSphereRadiusNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionSphereRadiusNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7528,7 +7528,7 @@ inst_OpRayQueryGetIntersectionLSSPositionsNV :: #force_inline proc "contextless"
 
 ray_query_get_intersection_lss_positions_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionLSSPositionsNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionLSSPositionsNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7541,7 +7541,7 @@ inst_OpRayQueryGetIntersectionLSSRadiiNV :: #force_inline proc "contextless" (bu
 
 ray_query_get_intersection_lss_radii_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionLSSRadiiNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionLSSRadiiNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7554,7 +7554,7 @@ inst_OpRayQueryGetIntersectionLSSHitValueNV :: #force_inline proc "contextless"
 
 ray_query_get_intersection_lss_hit_value_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionLSSHitValueNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionLSSHitValueNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7566,7 +7566,7 @@ inst_OpHitObjectGetSpherePositionNV :: #force_inline proc "contextless" (buf: []
 
 hit_object_get_sphere_position_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetSpherePositionNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetSpherePositionNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7578,7 +7578,7 @@ inst_OpHitObjectGetSphereRadiusNV :: #force_inline proc "contextless" (buf: []Op
 
 hit_object_get_sphere_radius_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetSphereRadiusNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetSphereRadiusNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7590,7 +7590,7 @@ inst_OpHitObjectGetLSSPositionsNV :: #force_inline proc "contextless" (buf: []Op
 
 hit_object_get_lss_positions_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetLSSPositionsNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetLSSPositionsNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7602,7 +7602,7 @@ inst_OpHitObjectGetLSSRadiiNV :: #force_inline proc "contextless" (buf: []Operan
 
 hit_object_get_lss_radii_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectGetLSSRadiiNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectGetLSSRadiiNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7614,7 +7614,7 @@ inst_OpHitObjectIsSphereHitNV :: #force_inline proc "contextless" (buf: []Operan
 
 hit_object_is_sphere_hit_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectIsSphereHitNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectIsSphereHitNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7626,7 +7626,7 @@ inst_OpHitObjectIsLSSHitNV :: #force_inline proc "contextless" (buf: []Operand,
 
 hit_object_is_lss_hit_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpHitObjectIsLSSHitNV(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpHitObjectIsLSSHitNV(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7639,7 +7639,7 @@ inst_OpRayQueryIsSphereHitNV :: #force_inline proc "contextless" (buf: []Operand
 
 ray_query_is_sphere_hit_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryIsSphereHitNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryIsSphereHitNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7652,7 +7652,7 @@ inst_OpRayQueryIsLSSHitNV :: #force_inline proc "contextless" (buf: []Operand, r
 
 ray_query_is_lss_hit_nv :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryIsLSSHitNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryIsLSSHitNV(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7665,7 +7665,7 @@ inst_OpSubgroupShuffleINTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 subgroup_shuffle_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupShuffleINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupShuffleINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7679,7 +7679,7 @@ inst_OpSubgroupShuffleDownINTEL :: #force_inline proc "contextless" (buf: []Oper
 
 subgroup_shuffle_down_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupShuffleDownINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupShuffleDownINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -7693,7 +7693,7 @@ inst_OpSubgroupShuffleUpINTEL :: #force_inline proc "contextless" (buf: []Operan
 
 subgroup_shuffle_up_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupShuffleUpINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupShuffleUpINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -7706,7 +7706,7 @@ inst_OpSubgroupShuffleXorINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 subgroup_shuffle_xor_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupShuffleXorINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupShuffleXorINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7718,7 +7718,7 @@ inst_OpSubgroupBlockReadINTEL :: #force_inline proc "contextless" (buf: []Operan
 
 subgroup_block_read_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupBlockReadINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupBlockReadINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7730,7 +7730,7 @@ inst_OpSubgroupBlockWriteINTEL :: #force_inline proc "contextless" (buf: []Opera
 }
 
 subgroup_block_write_intel :: proc(b: ^Builder, op1: Id, op2: Id) {
-	append(&b.ops, inst_OpSubgroupBlockWriteINTEL(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupBlockWriteINTEL(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpSubgroupImageBlockReadINTEL :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id) -> Operation {
@@ -7742,7 +7742,7 @@ inst_OpSubgroupImageBlockReadINTEL :: #force_inline proc "contextless" (buf: []O
 
 subgroup_image_block_read_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupImageBlockReadINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupImageBlockReadINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7755,7 +7755,7 @@ inst_OpSubgroupImageBlockWriteINTEL :: #force_inline proc "contextless" (buf: []
 }
 
 subgroup_image_block_write_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpSubgroupImageBlockWriteINTEL(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupImageBlockWriteINTEL(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpSubgroupImageMediaBlockReadINTEL :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id) -> Operation {
@@ -7769,7 +7769,7 @@ inst_OpSubgroupImageMediaBlockReadINTEL :: #force_inline proc "contextless" (buf
 
 subgroup_image_media_block_read_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupImageMediaBlockReadINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupImageMediaBlockReadINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -7784,7 +7784,7 @@ inst_OpSubgroupImageMediaBlockWriteINTEL :: #force_inline proc "contextless" (bu
 }
 
 subgroup_image_media_block_write_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) {
-	append(&b.ops, inst_OpSubgroupImageMediaBlockWriteINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpSubgroupImageMediaBlockWriteINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5))
 }
 
 inst_OpUCountLeadingZerosINTEL :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -7795,7 +7795,7 @@ inst_OpUCountLeadingZerosINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 u_count_leading_zeros_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUCountLeadingZerosINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpUCountLeadingZerosINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7807,7 +7807,7 @@ inst_OpUCountTrailingZerosINTEL :: #force_inline proc "contextless" (buf: []Oper
 
 u_count_trailing_zeros_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUCountTrailingZerosINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpUCountTrailingZerosINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7820,7 +7820,7 @@ inst_OpAbsISubINTEL :: #force_inline proc "contextless" (buf: []Operand, result_
 
 abs_i_sub_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAbsISubINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpAbsISubINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7833,7 +7833,7 @@ inst_OpAbsUSubINTEL :: #force_inline proc "contextless" (buf: []Operand, result_
 
 abs_u_sub_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAbsUSubINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpAbsUSubINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7846,7 +7846,7 @@ inst_OpIAddSatINTEL :: #force_inline proc "contextless" (buf: []Operand, result_
 
 i_add_sat_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIAddSatINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIAddSatINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7859,7 +7859,7 @@ inst_OpUAddSatINTEL :: #force_inline proc "contextless" (buf: []Operand, result_
 
 u_add_sat_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUAddSatINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUAddSatINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7872,7 +7872,7 @@ inst_OpIAverageINTEL :: #force_inline proc "contextless" (buf: []Operand, result
 
 i_average_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIAverageINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIAverageINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7885,7 +7885,7 @@ inst_OpUAverageINTEL :: #force_inline proc "contextless" (buf: []Operand, result
 
 u_average_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUAverageINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUAverageINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7898,7 +7898,7 @@ inst_OpIAverageRoundedINTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 i_average_rounded_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIAverageRoundedINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIAverageRoundedINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7911,7 +7911,7 @@ inst_OpUAverageRoundedINTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 u_average_rounded_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUAverageRoundedINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUAverageRoundedINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7924,7 +7924,7 @@ inst_OpISubSatINTEL :: #force_inline proc "contextless" (buf: []Operand, result_
 
 i_sub_sat_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpISubSatINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpISubSatINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7937,7 +7937,7 @@ inst_OpUSubSatINTEL :: #force_inline proc "contextless" (buf: []Operand, result_
 
 u_sub_sat_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUSubSatINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUSubSatINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7950,7 +7950,7 @@ inst_OpIMul32x16INTEL :: #force_inline proc "contextless" (buf: []Operand, resul
 
 i_mul32x16_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpIMul32x16INTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpIMul32x16INTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7963,7 +7963,7 @@ inst_OpUMul32x16INTEL :: #force_inline proc "contextless" (buf: []Operand, resul
 
 u_mul32x16_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUMul32x16INTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUMul32x16INTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -7975,7 +7975,7 @@ inst_OpConstantFunctionPointerINTEL :: #force_inline proc "contextless" (buf: []
 
 constant_function_pointer_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConstantFunctionPointerINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConstantFunctionPointerINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -7987,7 +7987,7 @@ inst_OpFunctionPointerCallINTEL :: #force_inline proc "contextless" (buf: []Oper
 
 function_pointer_call_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFunctionPointerCallINTEL(opbuf(b, len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFunctionPointerCallINTEL(opbuf(b, len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -7999,7 +7999,7 @@ inst_OpAsmTargetINTEL :: #force_inline proc "contextless" (buf: []Operand, resul
 
 asm_target_intel :: proc(b: ^Builder, op1: string) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAsmTargetINTEL(opbuf(b, (len(op1) + 4) / 4), r, op1))
+	append_elem(&b.ops, inst_OpAsmTargetINTEL(opbuf(b, (len(op1) + 4) / 4), r, op1))
 	return r
 }
 
@@ -8014,7 +8014,7 @@ inst_OpAsmINTEL :: #force_inline proc "contextless" (buf: []Operand, result_type
 
 asm_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: string, op4: string) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAsmINTEL(opbuf(b, 1 + 1 + (len(op3) + 4) / 4 + (len(op4) + 4) / 4), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAsmINTEL(opbuf(b, 1 + 1 + (len(op3) + 4) / 4 + (len(op4) + 4) / 4), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8027,7 +8027,7 @@ inst_OpAsmCallINTEL :: #force_inline proc "contextless" (buf: []Operand, result_
 
 asm_call_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAsmCallINTEL(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpAsmCallINTEL(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -8042,7 +8042,7 @@ inst_OpAtomicFMinEXT :: #force_inline proc "contextless" (buf: []Operand, result
 
 atomic_f_min_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicFMinEXT(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicFMinEXT(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8057,7 +8057,7 @@ inst_OpAtomicFMaxEXT :: #force_inline proc "contextless" (buf: []Operand, result
 
 atomic_f_max_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicFMaxEXT(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicFMaxEXT(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8068,7 +8068,7 @@ inst_OpAssumeTrueKHR :: #force_inline proc "contextless" (buf: []Operand, op1: I
 }
 
 assume_true_khr :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpAssumeTrueKHR(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpAssumeTrueKHR(opbuf(b, 1), op1))
 }
 
 inst_OpExpectKHR :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id) -> Operation {
@@ -8080,7 +8080,7 @@ inst_OpExpectKHR :: #force_inline proc "contextless" (buf: []Operand, result_typ
 
 expect_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpExpectKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpExpectKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8092,7 +8092,7 @@ inst_OpDecorateString :: #force_inline proc "contextless" (buf: []Operand, op1:
 }
 
 decorate_string :: proc(b: ^Builder, op1: Id, op2: Decoration) {
-	append(&b.ops, inst_OpDecorateString(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpDecorateString(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpMemberDecorateString :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: i64, op3: Decoration) -> Operation {
@@ -8104,7 +8104,7 @@ inst_OpMemberDecorateString :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 member_decorate_string :: proc(b: ^Builder, op1: Id, op2: i64, op3: Decoration) {
-	append(&b.ops, inst_OpMemberDecorateString(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpMemberDecorateString(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpVmeImageINTEL :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id) -> Operation {
@@ -8116,7 +8116,7 @@ inst_OpVmeImageINTEL :: #force_inline proc "contextless" (buf: []Operand, result
 
 vme_image_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpVmeImageINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpVmeImageINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8128,7 +8128,7 @@ inst_OpTypeVmeImageINTEL :: #force_inline proc "contextless" (buf: []Operand, re
 
 type_vme_image_intel :: proc(b: ^Builder, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeVmeImageINTEL(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpTypeVmeImageINTEL(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -8138,7 +8138,7 @@ inst_OpTypeAvcImePayloadINTEL :: #force_inline proc "contextless" (result: Id) -
 
 type_avc_ime_payload_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcImePayloadINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcImePayloadINTEL(r))
 	return r
 }
 
@@ -8148,7 +8148,7 @@ inst_OpTypeAvcRefPayloadINTEL :: #force_inline proc "contextless" (result: Id) -
 
 type_avc_ref_payload_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcRefPayloadINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcRefPayloadINTEL(r))
 	return r
 }
 
@@ -8158,7 +8158,7 @@ inst_OpTypeAvcSicPayloadINTEL :: #force_inline proc "contextless" (result: Id) -
 
 type_avc_sic_payload_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcSicPayloadINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcSicPayloadINTEL(r))
 	return r
 }
 
@@ -8168,7 +8168,7 @@ inst_OpTypeAvcMcePayloadINTEL :: #force_inline proc "contextless" (result: Id) -
 
 type_avc_mce_payload_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcMcePayloadINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcMcePayloadINTEL(r))
 	return r
 }
 
@@ -8178,7 +8178,7 @@ inst_OpTypeAvcMceResultINTEL :: #force_inline proc "contextless" (result: Id) ->
 
 type_avc_mce_result_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcMceResultINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcMceResultINTEL(r))
 	return r
 }
 
@@ -8188,7 +8188,7 @@ inst_OpTypeAvcImeResultINTEL :: #force_inline proc "contextless" (result: Id) ->
 
 type_avc_ime_result_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcImeResultINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcImeResultINTEL(r))
 	return r
 }
 
@@ -8198,7 +8198,7 @@ inst_OpTypeAvcImeResultSingleReferenceStreamoutINTEL :: #force_inline proc "cont
 
 type_avc_ime_result_single_reference_streamout_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcImeResultSingleReferenceStreamoutINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcImeResultSingleReferenceStreamoutINTEL(r))
 	return r
 }
 
@@ -8208,7 +8208,7 @@ inst_OpTypeAvcImeResultDualReferenceStreamoutINTEL :: #force_inline proc "contex
 
 type_avc_ime_result_dual_reference_streamout_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcImeResultDualReferenceStreamoutINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcImeResultDualReferenceStreamoutINTEL(r))
 	return r
 }
 
@@ -8218,7 +8218,7 @@ inst_OpTypeAvcImeSingleReferenceStreaminINTEL :: #force_inline proc "contextless
 
 type_avc_ime_single_reference_streamin_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcImeSingleReferenceStreaminINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcImeSingleReferenceStreaminINTEL(r))
 	return r
 }
 
@@ -8228,7 +8228,7 @@ inst_OpTypeAvcImeDualReferenceStreaminINTEL :: #force_inline proc "contextless"
 
 type_avc_ime_dual_reference_streamin_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcImeDualReferenceStreaminINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcImeDualReferenceStreaminINTEL(r))
 	return r
 }
 
@@ -8238,7 +8238,7 @@ inst_OpTypeAvcRefResultINTEL :: #force_inline proc "contextless" (result: Id) ->
 
 type_avc_ref_result_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcRefResultINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcRefResultINTEL(r))
 	return r
 }
 
@@ -8248,7 +8248,7 @@ inst_OpTypeAvcSicResultINTEL :: #force_inline proc "contextless" (result: Id) ->
 
 type_avc_sic_result_intel :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeAvcSicResultINTEL(r))
+	append_elem(&b.ops, inst_OpTypeAvcSicResultINTEL(r))
 	return r
 }
 
@@ -8261,7 +8261,7 @@ inst_OpSubgroupAvcMceGetDefaultInterBaseMultiReferencePenaltyINTEL :: #force_inl
 
 subgroup_avc_mce_get_default_inter_base_multi_reference_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultInterBaseMultiReferencePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultInterBaseMultiReferencePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8274,7 +8274,7 @@ inst_OpSubgroupAvcMceSetInterBaseMultiReferencePenaltyINTEL :: #force_inline pro
 
 subgroup_avc_mce_set_inter_base_multi_reference_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceSetInterBaseMultiReferencePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceSetInterBaseMultiReferencePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8287,7 +8287,7 @@ inst_OpSubgroupAvcMceGetDefaultInterShapePenaltyINTEL :: #force_inline proc "con
 
 subgroup_avc_mce_get_default_inter_shape_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultInterShapePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultInterShapePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8300,7 +8300,7 @@ inst_OpSubgroupAvcMceSetInterShapePenaltyINTEL :: #force_inline proc "contextles
 
 subgroup_avc_mce_set_inter_shape_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceSetInterShapePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceSetInterShapePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8313,7 +8313,7 @@ inst_OpSubgroupAvcMceGetDefaultInterDirectionPenaltyINTEL :: #force_inline proc
 
 subgroup_avc_mce_get_default_inter_direction_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultInterDirectionPenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultInterDirectionPenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8326,7 +8326,7 @@ inst_OpSubgroupAvcMceSetInterDirectionPenaltyINTEL :: #force_inline proc "contex
 
 subgroup_avc_mce_set_inter_direction_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceSetInterDirectionPenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceSetInterDirectionPenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8339,7 +8339,7 @@ inst_OpSubgroupAvcMceGetDefaultIntraLumaShapePenaltyINTEL :: #force_inline proc
 
 subgroup_avc_mce_get_default_intra_luma_shape_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultIntraLumaShapePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultIntraLumaShapePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8352,7 +8352,7 @@ inst_OpSubgroupAvcMceGetDefaultInterMotionVectorCostTableINTEL :: #force_inline
 
 subgroup_avc_mce_get_default_inter_motion_vector_cost_table_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultInterMotionVectorCostTableINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultInterMotionVectorCostTableINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8362,7 +8362,7 @@ inst_OpSubgroupAvcMceGetDefaultHighPenaltyCostTableINTEL :: #force_inline proc "
 
 subgroup_avc_mce_get_default_high_penalty_cost_table_intel :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultHighPenaltyCostTableINTEL(result_type, r))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultHighPenaltyCostTableINTEL(result_type, r))
 	return r
 }
 
@@ -8372,7 +8372,7 @@ inst_OpSubgroupAvcMceGetDefaultMediumPenaltyCostTableINTEL :: #force_inline proc
 
 subgroup_avc_mce_get_default_medium_penalty_cost_table_intel :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultMediumPenaltyCostTableINTEL(result_type, r))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultMediumPenaltyCostTableINTEL(result_type, r))
 	return r
 }
 
@@ -8382,7 +8382,7 @@ inst_OpSubgroupAvcMceGetDefaultLowPenaltyCostTableINTEL :: #force_inline proc "c
 
 subgroup_avc_mce_get_default_low_penalty_cost_table_intel :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultLowPenaltyCostTableINTEL(result_type, r))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultLowPenaltyCostTableINTEL(result_type, r))
 	return r
 }
 
@@ -8397,7 +8397,7 @@ inst_OpSubgroupAvcMceSetMotionVectorCostFunctionINTEL :: #force_inline proc "con
 
 subgroup_avc_mce_set_motion_vector_cost_function_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceSetMotionVectorCostFunctionINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceSetMotionVectorCostFunctionINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8410,7 +8410,7 @@ inst_OpSubgroupAvcMceGetDefaultIntraLumaModePenaltyINTEL :: #force_inline proc "
 
 subgroup_avc_mce_get_default_intra_luma_mode_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultIntraLumaModePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultIntraLumaModePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8420,7 +8420,7 @@ inst_OpSubgroupAvcMceGetDefaultNonDcLumaIntraPenaltyINTEL :: #force_inline proc
 
 subgroup_avc_mce_get_default_non_dc_luma_intra_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultNonDcLumaIntraPenaltyINTEL(result_type, r))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultNonDcLumaIntraPenaltyINTEL(result_type, r))
 	return r
 }
 
@@ -8430,7 +8430,7 @@ inst_OpSubgroupAvcMceGetDefaultIntraChromaModeBasePenaltyINTEL :: #force_inline
 
 subgroup_avc_mce_get_default_intra_chroma_mode_base_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetDefaultIntraChromaModeBasePenaltyINTEL(result_type, r))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetDefaultIntraChromaModeBasePenaltyINTEL(result_type, r))
 	return r
 }
 
@@ -8442,7 +8442,7 @@ inst_OpSubgroupAvcMceSetAcOnlyHaarINTEL :: #force_inline proc "contextless" (buf
 
 subgroup_avc_mce_set_ac_only_haar_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceSetAcOnlyHaarINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceSetAcOnlyHaarINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8455,7 +8455,7 @@ inst_OpSubgroupAvcMceSetSourceInterlacedFieldPolarityINTEL :: #force_inline proc
 
 subgroup_avc_mce_set_source_interlaced_field_polarity_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceSetSourceInterlacedFieldPolarityINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceSetSourceInterlacedFieldPolarityINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8468,7 +8468,7 @@ inst_OpSubgroupAvcMceSetSingleReferenceInterlacedFieldPolarityINTEL :: #force_in
 
 subgroup_avc_mce_set_single_reference_interlaced_field_polarity_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceSetSingleReferenceInterlacedFieldPolarityINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceSetSingleReferenceInterlacedFieldPolarityINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8482,7 +8482,7 @@ inst_OpSubgroupAvcMceSetDualReferenceInterlacedFieldPolaritiesINTEL :: #force_in
 
 subgroup_avc_mce_set_dual_reference_interlaced_field_polarities_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceSetDualReferenceInterlacedFieldPolaritiesINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceSetDualReferenceInterlacedFieldPolaritiesINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -8494,7 +8494,7 @@ inst_OpSubgroupAvcMceConvertToImePayloadINTEL :: #force_inline proc "contextless
 
 subgroup_avc_mce_convert_to_ime_payload_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceConvertToImePayloadINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceConvertToImePayloadINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8506,7 +8506,7 @@ inst_OpSubgroupAvcMceConvertToImeResultINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_mce_convert_to_ime_result_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceConvertToImeResultINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceConvertToImeResultINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8518,7 +8518,7 @@ inst_OpSubgroupAvcMceConvertToRefPayloadINTEL :: #force_inline proc "contextless
 
 subgroup_avc_mce_convert_to_ref_payload_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceConvertToRefPayloadINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceConvertToRefPayloadINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8530,7 +8530,7 @@ inst_OpSubgroupAvcMceConvertToRefResultINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_mce_convert_to_ref_result_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceConvertToRefResultINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceConvertToRefResultINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8542,7 +8542,7 @@ inst_OpSubgroupAvcMceConvertToSicPayloadINTEL :: #force_inline proc "contextless
 
 subgroup_avc_mce_convert_to_sic_payload_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceConvertToSicPayloadINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceConvertToSicPayloadINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8554,7 +8554,7 @@ inst_OpSubgroupAvcMceConvertToSicResultINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_mce_convert_to_sic_result_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceConvertToSicResultINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceConvertToSicResultINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8566,7 +8566,7 @@ inst_OpSubgroupAvcMceGetMotionVectorsINTEL :: #force_inline proc "contextless" (
 
 subgroup_avc_mce_get_motion_vectors_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetMotionVectorsINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetMotionVectorsINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8578,7 +8578,7 @@ inst_OpSubgroupAvcMceGetInterDistortionsINTEL :: #force_inline proc "contextless
 
 subgroup_avc_mce_get_inter_distortions_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetInterDistortionsINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetInterDistortionsINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8590,7 +8590,7 @@ inst_OpSubgroupAvcMceGetBestInterDistortionsINTEL :: #force_inline proc "context
 
 subgroup_avc_mce_get_best_inter_distortions_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetBestInterDistortionsINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetBestInterDistortionsINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8602,7 +8602,7 @@ inst_OpSubgroupAvcMceGetInterMajorShapeINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_mce_get_inter_major_shape_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetInterMajorShapeINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetInterMajorShapeINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8614,7 +8614,7 @@ inst_OpSubgroupAvcMceGetInterMinorShapeINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_mce_get_inter_minor_shape_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetInterMinorShapeINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetInterMinorShapeINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8626,7 +8626,7 @@ inst_OpSubgroupAvcMceGetInterDirectionsINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_mce_get_inter_directions_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetInterDirectionsINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetInterDirectionsINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8638,7 +8638,7 @@ inst_OpSubgroupAvcMceGetInterMotionVectorCountINTEL :: #force_inline proc "conte
 
 subgroup_avc_mce_get_inter_motion_vector_count_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetInterMotionVectorCountINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetInterMotionVectorCountINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8650,7 +8650,7 @@ inst_OpSubgroupAvcMceGetInterReferenceIdsINTEL :: #force_inline proc "contextles
 
 subgroup_avc_mce_get_inter_reference_ids_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetInterReferenceIdsINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetInterReferenceIdsINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8664,7 +8664,7 @@ inst_OpSubgroupAvcMceGetInterReferenceInterlacedFieldPolaritiesINTEL :: #force_i
 
 subgroup_avc_mce_get_inter_reference_interlaced_field_polarities_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcMceGetInterReferenceInterlacedFieldPolaritiesINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcMceGetInterReferenceInterlacedFieldPolaritiesINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -8678,7 +8678,7 @@ inst_OpSubgroupAvcImeInitializeINTEL :: #force_inline proc "contextless" (buf: [
 
 subgroup_avc_ime_initialize_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeInitializeINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeInitializeINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -8692,7 +8692,7 @@ inst_OpSubgroupAvcImeSetSingleReferenceINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_ime_set_single_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeSetSingleReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeSetSingleReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -8707,7 +8707,7 @@ inst_OpSubgroupAvcImeSetDualReferenceINTEL :: #force_inline proc "contextless" (
 
 subgroup_avc_ime_set_dual_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeSetDualReferenceINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeSetDualReferenceINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8720,7 +8720,7 @@ inst_OpSubgroupAvcImeRefWindowSizeINTEL :: #force_inline proc "contextless" (buf
 
 subgroup_avc_ime_ref_window_size_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeRefWindowSizeINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeRefWindowSizeINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8735,7 +8735,7 @@ inst_OpSubgroupAvcImeAdjustRefOffsetINTEL :: #force_inline proc "contextless" (b
 
 subgroup_avc_ime_adjust_ref_offset_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeAdjustRefOffsetINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeAdjustRefOffsetINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8747,7 +8747,7 @@ inst_OpSubgroupAvcImeConvertToMcePayloadINTEL :: #force_inline proc "contextless
 
 subgroup_avc_ime_convert_to_mce_payload_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeConvertToMcePayloadINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeConvertToMcePayloadINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8760,7 +8760,7 @@ inst_OpSubgroupAvcImeSetMaxMotionVectorCountINTEL :: #force_inline proc "context
 
 subgroup_avc_ime_set_max_motion_vector_count_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeSetMaxMotionVectorCountINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeSetMaxMotionVectorCountINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8772,7 +8772,7 @@ inst_OpSubgroupAvcImeSetUnidirectionalMixDisableINTEL :: #force_inline proc "con
 
 subgroup_avc_ime_set_unidirectional_mix_disable_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeSetUnidirectionalMixDisableINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeSetUnidirectionalMixDisableINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8785,7 +8785,7 @@ inst_OpSubgroupAvcImeSetEarlySearchTerminationThresholdINTEL :: #force_inline pr
 
 subgroup_avc_ime_set_early_search_termination_threshold_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeSetEarlySearchTerminationThresholdINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeSetEarlySearchTerminationThresholdINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8798,7 +8798,7 @@ inst_OpSubgroupAvcImeSetWeightedSadINTEL :: #force_inline proc "contextless" (bu
 
 subgroup_avc_ime_set_weighted_sad_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeSetWeightedSadINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeSetWeightedSadINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -8812,7 +8812,7 @@ inst_OpSubgroupAvcImeEvaluateWithSingleReferenceINTEL :: #force_inline proc "con
 
 subgroup_avc_ime_evaluate_with_single_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeEvaluateWithSingleReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeEvaluateWithSingleReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -8827,7 +8827,7 @@ inst_OpSubgroupAvcImeEvaluateWithDualReferenceINTEL :: #force_inline proc "conte
 
 subgroup_avc_ime_evaluate_with_dual_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeEvaluateWithDualReferenceINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeEvaluateWithDualReferenceINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8842,7 +8842,7 @@ inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreaminINTEL :: #force_inline p
 
 subgroup_avc_ime_evaluate_with_single_reference_streamin_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreaminINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreaminINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8858,7 +8858,7 @@ inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreaminINTEL :: #force_inline pro
 
 subgroup_avc_ime_evaluate_with_dual_reference_streamin_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreaminINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreaminINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -8872,7 +8872,7 @@ inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreamoutINTEL :: #force_inline
 
 subgroup_avc_ime_evaluate_with_single_reference_streamout_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreamoutINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreamoutINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -8887,7 +8887,7 @@ inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreamoutINTEL :: #force_inline pr
 
 subgroup_avc_ime_evaluate_with_dual_reference_streamout_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreamoutINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreamoutINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8902,7 +8902,7 @@ inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreaminoutINTEL :: #force_inlin
 
 subgroup_avc_ime_evaluate_with_single_reference_streaminout_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreaminoutINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeEvaluateWithSingleReferenceStreaminoutINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -8918,7 +8918,7 @@ inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreaminoutINTEL :: #force_inline
 
 subgroup_avc_ime_evaluate_with_dual_reference_streaminout_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreaminoutINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeEvaluateWithDualReferenceStreaminoutINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -8930,7 +8930,7 @@ inst_OpSubgroupAvcImeConvertToMceResultINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_ime_convert_to_mce_result_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeConvertToMceResultINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeConvertToMceResultINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8942,7 +8942,7 @@ inst_OpSubgroupAvcImeGetSingleReferenceStreaminINTEL :: #force_inline proc "cont
 
 subgroup_avc_ime_get_single_reference_streamin_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetSingleReferenceStreaminINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetSingleReferenceStreaminINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8954,7 +8954,7 @@ inst_OpSubgroupAvcImeGetDualReferenceStreaminINTEL :: #force_inline proc "contex
 
 subgroup_avc_ime_get_dual_reference_streamin_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetDualReferenceStreaminINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetDualReferenceStreaminINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8966,7 +8966,7 @@ inst_OpSubgroupAvcImeStripSingleReferenceStreamoutINTEL :: #force_inline proc "c
 
 subgroup_avc_ime_strip_single_reference_streamout_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeStripSingleReferenceStreamoutINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeStripSingleReferenceStreamoutINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8978,7 +8978,7 @@ inst_OpSubgroupAvcImeStripDualReferenceStreamoutINTEL :: #force_inline proc "con
 
 subgroup_avc_ime_strip_dual_reference_streamout_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeStripDualReferenceStreamoutINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeStripDualReferenceStreamoutINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -8991,7 +8991,7 @@ inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeMotionVectorsINTEL ::
 
 subgroup_avc_ime_get_streamout_single_reference_major_shape_motion_vectors_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeMotionVectorsINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeMotionVectorsINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9004,7 +9004,7 @@ inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeDistortionsINTEL :: #f
 
 subgroup_avc_ime_get_streamout_single_reference_major_shape_distortions_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeDistortionsINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeDistortionsINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9017,7 +9017,7 @@ inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeReferenceIdsINTEL :: #
 
 subgroup_avc_ime_get_streamout_single_reference_major_shape_reference_ids_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeReferenceIdsINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetStreamoutSingleReferenceMajorShapeReferenceIdsINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9031,7 +9031,7 @@ inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeMotionVectorsINTEL :: #f
 
 subgroup_avc_ime_get_streamout_dual_reference_major_shape_motion_vectors_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeMotionVectorsINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeMotionVectorsINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -9045,7 +9045,7 @@ inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeDistortionsINTEL :: #for
 
 subgroup_avc_ime_get_streamout_dual_reference_major_shape_distortions_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeDistortionsINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeDistortionsINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -9059,7 +9059,7 @@ inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeReferenceIdsINTEL :: #fo
 
 subgroup_avc_ime_get_streamout_dual_reference_major_shape_reference_ids_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeReferenceIdsINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetStreamoutDualReferenceMajorShapeReferenceIdsINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -9072,7 +9072,7 @@ inst_OpSubgroupAvcImeGetBorderReachedINTEL :: #force_inline proc "contextless" (
 
 subgroup_avc_ime_get_border_reached_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetBorderReachedINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetBorderReachedINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9084,7 +9084,7 @@ inst_OpSubgroupAvcImeGetTruncatedSearchIndicationINTEL :: #force_inline proc "co
 
 subgroup_avc_ime_get_truncated_search_indication_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetTruncatedSearchIndicationINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetTruncatedSearchIndicationINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9096,7 +9096,7 @@ inst_OpSubgroupAvcImeGetUnidirectionalEarlySearchTerminationINTEL :: #force_inli
 
 subgroup_avc_ime_get_unidirectional_early_search_termination_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetUnidirectionalEarlySearchTerminationINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetUnidirectionalEarlySearchTerminationINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9108,7 +9108,7 @@ inst_OpSubgroupAvcImeGetWeightingPatternMinimumMotionVectorINTEL :: #force_inlin
 
 subgroup_avc_ime_get_weighting_pattern_minimum_motion_vector_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetWeightingPatternMinimumMotionVectorINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetWeightingPatternMinimumMotionVectorINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9120,7 +9120,7 @@ inst_OpSubgroupAvcImeGetWeightingPatternMinimumDistortionINTEL :: #force_inline
 
 subgroup_avc_ime_get_weighting_pattern_minimum_distortion_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcImeGetWeightingPatternMinimumDistortionINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcImeGetWeightingPatternMinimumDistortionINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9138,7 +9138,7 @@ inst_OpSubgroupAvcFmeInitializeINTEL :: #force_inline proc "contextless" (buf: [
 
 subgroup_avc_fme_initialize_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcFmeInitializeINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7))
+	append_elem(&b.ops, inst_OpSubgroupAvcFmeInitializeINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7))
 	return r
 }
 
@@ -9157,7 +9157,7 @@ inst_OpSubgroupAvcBmeInitializeINTEL :: #force_inline proc "contextless" (buf: [
 
 subgroup_avc_bme_initialize_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcBmeInitializeINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpSubgroupAvcBmeInitializeINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -9169,7 +9169,7 @@ inst_OpSubgroupAvcRefConvertToMcePayloadINTEL :: #force_inline proc "contextless
 
 subgroup_avc_ref_convert_to_mce_payload_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcRefConvertToMcePayloadINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcRefConvertToMcePayloadINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9181,7 +9181,7 @@ inst_OpSubgroupAvcRefSetBidirectionalMixDisableINTEL :: #force_inline proc "cont
 
 subgroup_avc_ref_set_bidirectional_mix_disable_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcRefSetBidirectionalMixDisableINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcRefSetBidirectionalMixDisableINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9193,7 +9193,7 @@ inst_OpSubgroupAvcRefSetBilinearFilterEnableINTEL :: #force_inline proc "context
 
 subgroup_avc_ref_set_bilinear_filter_enable_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcRefSetBilinearFilterEnableINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcRefSetBilinearFilterEnableINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9207,7 +9207,7 @@ inst_OpSubgroupAvcRefEvaluateWithSingleReferenceINTEL :: #force_inline proc "con
 
 subgroup_avc_ref_evaluate_with_single_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcRefEvaluateWithSingleReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcRefEvaluateWithSingleReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -9222,7 +9222,7 @@ inst_OpSubgroupAvcRefEvaluateWithDualReferenceINTEL :: #force_inline proc "conte
 
 subgroup_avc_ref_evaluate_with_dual_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcRefEvaluateWithDualReferenceINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcRefEvaluateWithDualReferenceINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9236,7 +9236,7 @@ inst_OpSubgroupAvcRefEvaluateWithMultiReferenceINTEL :: #force_inline proc "cont
 
 subgroup_avc_ref_evaluate_with_multi_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcRefEvaluateWithMultiReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcRefEvaluateWithMultiReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -9251,7 +9251,7 @@ inst_OpSubgroupAvcRefEvaluateWithMultiReferenceInterlacedINTEL :: #force_inline
 
 subgroup_avc_ref_evaluate_with_multi_reference_interlaced_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcRefEvaluateWithMultiReferenceInterlacedINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcRefEvaluateWithMultiReferenceInterlacedINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9263,7 +9263,7 @@ inst_OpSubgroupAvcRefConvertToMceResultINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_ref_convert_to_mce_result_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcRefConvertToMceResultINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcRefConvertToMceResultINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9275,7 +9275,7 @@ inst_OpSubgroupAvcSicInitializeINTEL :: #force_inline proc "contextless" (buf: [
 
 subgroup_avc_sic_initialize_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicInitializeINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicInitializeINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9292,7 +9292,7 @@ inst_OpSubgroupAvcSicConfigureSkcINTEL :: #force_inline proc "contextless" (buf:
 
 subgroup_avc_sic_configure_skc_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicConfigureSkcINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicConfigureSkcINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9311,7 +9311,7 @@ inst_OpSubgroupAvcSicConfigureIpeLumaINTEL :: #force_inline proc "contextless" (
 
 subgroup_avc_sic_configure_ipe_luma_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicConfigureIpeLumaINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicConfigureIpeLumaINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -9333,7 +9333,7 @@ inst_OpSubgroupAvcSicConfigureIpeLumaChromaINTEL :: #force_inline proc "contextl
 
 subgroup_avc_sic_configure_ipe_luma_chroma_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id, op11: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicConfigureIpeLumaChromaINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicConfigureIpeLumaChromaINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8, op9, op10, op11))
 	return r
 }
 
@@ -9346,7 +9346,7 @@ inst_OpSubgroupAvcSicGetMotionVectorMaskINTEL :: #force_inline proc "contextless
 
 subgroup_avc_sic_get_motion_vector_mask_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetMotionVectorMaskINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetMotionVectorMaskINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9358,7 +9358,7 @@ inst_OpSubgroupAvcSicConvertToMcePayloadINTEL :: #force_inline proc "contextless
 
 subgroup_avc_sic_convert_to_mce_payload_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicConvertToMcePayloadINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicConvertToMcePayloadINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9371,7 +9371,7 @@ inst_OpSubgroupAvcSicSetIntraLumaShapePenaltyINTEL :: #force_inline proc "contex
 
 subgroup_avc_sic_set_intra_luma_shape_penalty_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicSetIntraLumaShapePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicSetIntraLumaShapePenaltyINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9386,7 +9386,7 @@ inst_OpSubgroupAvcSicSetIntraLumaModeCostFunctionINTEL :: #force_inline proc "co
 
 subgroup_avc_sic_set_intra_luma_mode_cost_function_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicSetIntraLumaModeCostFunctionINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicSetIntraLumaModeCostFunctionINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9399,7 +9399,7 @@ inst_OpSubgroupAvcSicSetIntraChromaModeCostFunctionINTEL :: #force_inline proc "
 
 subgroup_avc_sic_set_intra_chroma_mode_cost_function_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicSetIntraChromaModeCostFunctionINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicSetIntraChromaModeCostFunctionINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9411,7 +9411,7 @@ inst_OpSubgroupAvcSicSetBilinearFilterEnableINTEL :: #force_inline proc "context
 
 subgroup_avc_sic_set_bilinear_filter_enable_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicSetBilinearFilterEnableINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicSetBilinearFilterEnableINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9424,7 +9424,7 @@ inst_OpSubgroupAvcSicSetSkcForwardTransformEnableINTEL :: #force_inline proc "co
 
 subgroup_avc_sic_set_skc_forward_transform_enable_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicSetSkcForwardTransformEnableINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicSetSkcForwardTransformEnableINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9437,7 +9437,7 @@ inst_OpSubgroupAvcSicSetBlockBasedRawSkipSadINTEL :: #force_inline proc "context
 
 subgroup_avc_sic_set_block_based_raw_skip_sad_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicSetBlockBasedRawSkipSadINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicSetBlockBasedRawSkipSadINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9450,7 +9450,7 @@ inst_OpSubgroupAvcSicEvaluateIpeINTEL :: #force_inline proc "contextless" (buf:
 
 subgroup_avc_sic_evaluate_ipe_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicEvaluateIpeINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicEvaluateIpeINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -9464,7 +9464,7 @@ inst_OpSubgroupAvcSicEvaluateWithSingleReferenceINTEL :: #force_inline proc "con
 
 subgroup_avc_sic_evaluate_with_single_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicEvaluateWithSingleReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicEvaluateWithSingleReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -9479,7 +9479,7 @@ inst_OpSubgroupAvcSicEvaluateWithDualReferenceINTEL :: #force_inline proc "conte
 
 subgroup_avc_sic_evaluate_with_dual_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicEvaluateWithDualReferenceINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicEvaluateWithDualReferenceINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9493,7 +9493,7 @@ inst_OpSubgroupAvcSicEvaluateWithMultiReferenceINTEL :: #force_inline proc "cont
 
 subgroup_avc_sic_evaluate_with_multi_reference_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicEvaluateWithMultiReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicEvaluateWithMultiReferenceINTEL(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -9508,7 +9508,7 @@ inst_OpSubgroupAvcSicEvaluateWithMultiReferenceInterlacedINTEL :: #force_inline
 
 subgroup_avc_sic_evaluate_with_multi_reference_interlaced_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicEvaluateWithMultiReferenceInterlacedINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicEvaluateWithMultiReferenceInterlacedINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9520,7 +9520,7 @@ inst_OpSubgroupAvcSicConvertToMceResultINTEL :: #force_inline proc "contextless"
 
 subgroup_avc_sic_convert_to_mce_result_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicConvertToMceResultINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicConvertToMceResultINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9532,7 +9532,7 @@ inst_OpSubgroupAvcSicGetIpeLumaShapeINTEL :: #force_inline proc "contextless" (b
 
 subgroup_avc_sic_get_ipe_luma_shape_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetIpeLumaShapeINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetIpeLumaShapeINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9544,7 +9544,7 @@ inst_OpSubgroupAvcSicGetBestIpeLumaDistortionINTEL :: #force_inline proc "contex
 
 subgroup_avc_sic_get_best_ipe_luma_distortion_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetBestIpeLumaDistortionINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetBestIpeLumaDistortionINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9556,7 +9556,7 @@ inst_OpSubgroupAvcSicGetBestIpeChromaDistortionINTEL :: #force_inline proc "cont
 
 subgroup_avc_sic_get_best_ipe_chroma_distortion_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetBestIpeChromaDistortionINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetBestIpeChromaDistortionINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9568,7 +9568,7 @@ inst_OpSubgroupAvcSicGetPackedIpeLumaModesINTEL :: #force_inline proc "contextle
 
 subgroup_avc_sic_get_packed_ipe_luma_modes_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetPackedIpeLumaModesINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetPackedIpeLumaModesINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9580,7 +9580,7 @@ inst_OpSubgroupAvcSicGetIpeChromaModeINTEL :: #force_inline proc "contextless" (
 
 subgroup_avc_sic_get_ipe_chroma_mode_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetIpeChromaModeINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetIpeChromaModeINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9592,7 +9592,7 @@ inst_OpSubgroupAvcSicGetPackedSkcLumaCountThresholdINTEL :: #force_inline proc "
 
 subgroup_avc_sic_get_packed_skc_luma_count_threshold_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetPackedSkcLumaCountThresholdINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetPackedSkcLumaCountThresholdINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9604,7 +9604,7 @@ inst_OpSubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL :: #force_inline proc "co
 
 subgroup_avc_sic_get_packed_skc_luma_sum_threshold_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9616,7 +9616,7 @@ inst_OpSubgroupAvcSicGetInterRawSadsINTEL :: #force_inline proc "contextless" (b
 
 subgroup_avc_sic_get_inter_raw_sads_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupAvcSicGetInterRawSadsINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSubgroupAvcSicGetInterRawSadsINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9628,7 +9628,7 @@ inst_OpVariableLengthArrayINTEL :: #force_inline proc "contextless" (buf: []Oper
 
 variable_length_array_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpVariableLengthArrayINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpVariableLengthArrayINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -9638,7 +9638,7 @@ inst_OpSaveMemoryINTEL :: #force_inline proc "contextless" (result_type: Type_Re
 
 save_memory_intel :: proc(b: ^Builder, result_type: Type_Ref) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSaveMemoryINTEL(result_type, r))
+	append_elem(&b.ops, inst_OpSaveMemoryINTEL(result_type, r))
 	return r
 }
 
@@ -9649,7 +9649,7 @@ inst_OpRestoreMemoryINTEL :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 restore_memory_intel :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpRestoreMemoryINTEL(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpRestoreMemoryINTEL(opbuf(b, 1), op1))
 }
 
 inst_OpArbitraryFloatSinCosPiALTERA :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Operation {
@@ -9665,7 +9665,7 @@ inst_OpArbitraryFloatSinCosPiALTERA :: #force_inline proc "contextless" (buf: []
 
 arbitrary_float_sin_cos_pi_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatSinCosPiALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatSinCosPiALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9682,7 +9682,7 @@ inst_OpArbitraryFloatCastALTERA :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_cast_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatCastALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatCastALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9699,7 +9699,7 @@ inst_OpArbitraryFloatCastFromIntALTERA :: #force_inline proc "contextless" (buf:
 
 arbitrary_float_cast_from_int_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatCastFromIntALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatCastFromIntALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9716,7 +9716,7 @@ inst_OpArbitraryFloatCastToIntALTERA :: #force_inline proc "contextless" (buf: [
 
 arbitrary_float_cast_to_int_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatCastToIntALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatCastToIntALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9735,7 +9735,7 @@ inst_OpArbitraryFloatAddALTERA :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_add_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatAddALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatAddALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -9754,7 +9754,7 @@ inst_OpArbitraryFloatSubALTERA :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_sub_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatSubALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatSubALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -9773,7 +9773,7 @@ inst_OpArbitraryFloatMulALTERA :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_mul_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatMulALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatMulALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -9792,7 +9792,7 @@ inst_OpArbitraryFloatDivALTERA :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_div_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatDivALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatDivALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -9807,7 +9807,7 @@ inst_OpArbitraryFloatGTALTERA :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_gtaltera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatGTALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpArbitraryFloatGTALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9822,7 +9822,7 @@ inst_OpArbitraryFloatGEALTERA :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_gealtera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatGEALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpArbitraryFloatGEALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9837,7 +9837,7 @@ inst_OpArbitraryFloatLTALTERA :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_ltaltera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatLTALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpArbitraryFloatLTALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9852,7 +9852,7 @@ inst_OpArbitraryFloatLEALTERA :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_lealtera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatLEALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpArbitraryFloatLEALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9867,7 +9867,7 @@ inst_OpArbitraryFloatEQALTERA :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_eqaltera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatEQALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpArbitraryFloatEQALTERA(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -9884,7 +9884,7 @@ inst_OpArbitraryFloatRecipALTERA :: #force_inline proc "contextless" (buf: []Ope
 
 arbitrary_float_recip_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatRecipALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatRecipALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9901,7 +9901,7 @@ inst_OpArbitraryFloatRSqrtALTERA :: #force_inline proc "contextless" (buf: []Ope
 
 arbitrary_float_r_sqrt_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatRSqrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatRSqrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9918,7 +9918,7 @@ inst_OpArbitraryFloatCbrtALTERA :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_cbrt_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatCbrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatCbrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9937,7 +9937,7 @@ inst_OpArbitraryFloatHypotALTERA :: #force_inline proc "contextless" (buf: []Ope
 
 arbitrary_float_hypot_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatHypotALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatHypotALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -9954,7 +9954,7 @@ inst_OpArbitraryFloatSqrtALTERA :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_sqrt_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatSqrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatSqrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9971,7 +9971,7 @@ inst_OpArbitraryFloatLogINTEL :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_log_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatLogINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatLogINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -9988,7 +9988,7 @@ inst_OpArbitraryFloatLog2INTEL :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_log2_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatLog2INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatLog2INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10005,7 +10005,7 @@ inst_OpArbitraryFloatLog10INTEL :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_log10_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatLog10INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatLog10INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10022,7 +10022,7 @@ inst_OpArbitraryFloatLog1pINTEL :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_log1p_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatLog1pINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatLog1pINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10039,7 +10039,7 @@ inst_OpArbitraryFloatExpINTEL :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_exp_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatExpINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatExpINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10056,7 +10056,7 @@ inst_OpArbitraryFloatExp2INTEL :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_exp2_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatExp2INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatExp2INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10073,7 +10073,7 @@ inst_OpArbitraryFloatExp10INTEL :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_exp10_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatExp10INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatExp10INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10090,7 +10090,7 @@ inst_OpArbitraryFloatExpm1INTEL :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_expm1_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatExpm1INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatExpm1INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10107,7 +10107,7 @@ inst_OpArbitraryFloatSinINTEL :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_sin_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatSinINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatSinINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10124,7 +10124,7 @@ inst_OpArbitraryFloatCosINTEL :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_cos_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatCosINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatCosINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10141,7 +10141,7 @@ inst_OpArbitraryFloatSinCosINTEL :: #force_inline proc "contextless" (buf: []Ope
 
 arbitrary_float_sin_cos_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatSinCosINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatSinCosINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10158,7 +10158,7 @@ inst_OpArbitraryFloatSinPiINTEL :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_sin_pi_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatSinPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatSinPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10175,7 +10175,7 @@ inst_OpArbitraryFloatCosPiINTEL :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_cos_pi_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatCosPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatCosPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10192,7 +10192,7 @@ inst_OpArbitraryFloatASinINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_a_sin_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatASinINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatASinINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10209,7 +10209,7 @@ inst_OpArbitraryFloatASinPiINTEL :: #force_inline proc "contextless" (buf: []Ope
 
 arbitrary_float_a_sin_pi_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatASinPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatASinPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10226,7 +10226,7 @@ inst_OpArbitraryFloatACosINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_a_cos_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatACosINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatACosINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10243,7 +10243,7 @@ inst_OpArbitraryFloatACosPiINTEL :: #force_inline proc "contextless" (buf: []Ope
 
 arbitrary_float_a_cos_pi_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatACosPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatACosPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10260,7 +10260,7 @@ inst_OpArbitraryFloatATanINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_a_tan_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatATanINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatATanINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10277,7 +10277,7 @@ inst_OpArbitraryFloatATanPiINTEL :: #force_inline proc "contextless" (buf: []Ope
 
 arbitrary_float_a_tan_pi_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatATanPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpArbitraryFloatATanPiINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10296,7 +10296,7 @@ inst_OpArbitraryFloatATan2INTEL :: #force_inline proc "contextless" (buf: []Oper
 
 arbitrary_float_a_tan2_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatATan2INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatATan2INTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -10315,7 +10315,7 @@ inst_OpArbitraryFloatPowINTEL :: #force_inline proc "contextless" (buf: []Operan
 
 arbitrary_float_pow_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatPowINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatPowINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -10334,7 +10334,7 @@ inst_OpArbitraryFloatPowRINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_pow_rintel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatPowRINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatPowRINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -10353,7 +10353,7 @@ inst_OpArbitraryFloatPowNINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 arbitrary_float_pow_nintel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: i64, op5: i64, op6: i64, op7: i64, op8: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArbitraryFloatPowNINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
+	append_elem(&b.ops, inst_OpArbitraryFloatPowNINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6, op7, op8))
 	return r
 }
 
@@ -10364,7 +10364,7 @@ inst_OpLoopControlINTEL :: #force_inline proc "contextless" (buf: []Operand, op1
 }
 
 loop_control_intel :: proc(b: ^Builder, op1: []i64) {
-	append(&b.ops, inst_OpLoopControlINTEL(opbuf(b, len(op1)), op1))
+	append_elem(&b.ops, inst_OpLoopControlINTEL(opbuf(b, len(op1)), op1))
 }
 
 inst_OpAliasDomainDeclINTEL :: #force_inline proc "contextless" (buf: []Operand, result: Id, op1: Maybe(Id)) -> Operation {
@@ -10375,7 +10375,7 @@ inst_OpAliasDomainDeclINTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 alias_domain_decl_intel :: proc(b: ^Builder, op1: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAliasDomainDeclINTEL(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpAliasDomainDeclINTEL(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -10388,7 +10388,7 @@ inst_OpAliasScopeDeclINTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 alias_scope_decl_intel :: proc(b: ^Builder, op1: Id, op2: Maybe(Id)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAliasScopeDeclINTEL(opbuf(b, 1 + 1), r, op1, op2))
+	append_elem(&b.ops, inst_OpAliasScopeDeclINTEL(opbuf(b, 1 + 1), r, op1, op2))
 	return r
 }
 
@@ -10400,7 +10400,7 @@ inst_OpAliasScopeListDeclINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 alias_scope_list_decl_intel :: proc(b: ^Builder, op1: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAliasScopeListDeclINTEL(opbuf(b, len(op1)), r, op1))
+	append_elem(&b.ops, inst_OpAliasScopeListDeclINTEL(opbuf(b, len(op1)), r, op1))
 	return r
 }
 
@@ -10417,7 +10417,7 @@ inst_OpFixedSqrtALTERA :: #force_inline proc "contextless" (buf: []Operand, resu
 
 fixed_sqrt_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedSqrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedSqrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10434,7 +10434,7 @@ inst_OpFixedRecipALTERA :: #force_inline proc "contextless" (buf: []Operand, res
 
 fixed_recip_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedRecipALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedRecipALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10451,7 +10451,7 @@ inst_OpFixedRsqrtALTERA :: #force_inline proc "contextless" (buf: []Operand, res
 
 fixed_rsqrt_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedRsqrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedRsqrtALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10468,7 +10468,7 @@ inst_OpFixedSinALTERA :: #force_inline proc "contextless" (buf: []Operand, resul
 
 fixed_sin_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedSinALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedSinALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10485,7 +10485,7 @@ inst_OpFixedCosALTERA :: #force_inline proc "contextless" (buf: []Operand, resul
 
 fixed_cos_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedCosALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedCosALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10502,7 +10502,7 @@ inst_OpFixedSinCosALTERA :: #force_inline proc "contextless" (buf: []Operand, re
 
 fixed_sin_cos_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedSinCosALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedSinCosALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10519,7 +10519,7 @@ inst_OpFixedSinPiALTERA :: #force_inline proc "contextless" (buf: []Operand, res
 
 fixed_sin_pi_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedSinPiALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedSinPiALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10536,7 +10536,7 @@ inst_OpFixedCosPiALTERA :: #force_inline proc "contextless" (buf: []Operand, res
 
 fixed_cos_pi_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedCosPiALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedCosPiALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10553,7 +10553,7 @@ inst_OpFixedSinCosPiALTERA :: #force_inline proc "contextless" (buf: []Operand,
 
 fixed_sin_cos_pi_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedSinCosPiALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedSinCosPiALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10570,7 +10570,7 @@ inst_OpFixedLogALTERA :: #force_inline proc "contextless" (buf: []Operand, resul
 
 fixed_log_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedLogALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedLogALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10587,7 +10587,7 @@ inst_OpFixedExpALTERA :: #force_inline proc "contextless" (buf: []Operand, resul
 
 fixed_exp_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64, op6: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFixedExpALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
+	append_elem(&b.ops, inst_OpFixedExpALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5, op6))
 	return r
 }
 
@@ -10599,7 +10599,7 @@ inst_OpPtrCastToCrossWorkgroupALTERA :: #force_inline proc "contextless" (buf: [
 
 ptr_cast_to_cross_workgroup_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPtrCastToCrossWorkgroupALTERA(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpPtrCastToCrossWorkgroupALTERA(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10611,7 +10611,7 @@ inst_OpCrossWorkgroupCastToPtrALTERA :: #force_inline proc "contextless" (buf: [
 
 cross_workgroup_cast_to_ptr_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpCrossWorkgroupCastToPtrALTERA(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpCrossWorkgroupCastToPtrALTERA(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10625,7 +10625,7 @@ inst_OpReadPipeBlockingALTERA :: #force_inline proc "contextless" (buf: []Operan
 }
 
 read_pipe_blocking_altera :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id) {
-	append(&b.ops, inst_OpReadPipeBlockingALTERA(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpReadPipeBlockingALTERA(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpWritePipeBlockingALTERA :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id) -> Operation {
@@ -10638,7 +10638,7 @@ inst_OpWritePipeBlockingALTERA :: #force_inline proc "contextless" (buf: []Opera
 }
 
 write_pipe_blocking_altera :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id) {
-	append(&b.ops, inst_OpWritePipeBlockingALTERA(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpWritePipeBlockingALTERA(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpFPGARegALTERA :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -10649,7 +10649,7 @@ inst_OpFPGARegALTERA :: #force_inline proc "contextless" (buf: []Operand, result
 
 fpga_reg_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFPGARegALTERA(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpFPGARegALTERA(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10661,7 +10661,7 @@ inst_OpRayQueryGetRayTMinKHR :: #force_inline proc "contextless" (buf: []Operand
 
 ray_query_get_ray_t_min_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetRayTMinKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpRayQueryGetRayTMinKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10673,7 +10673,7 @@ inst_OpRayQueryGetRayFlagsKHR :: #force_inline proc "contextless" (buf: []Operan
 
 ray_query_get_ray_flags_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetRayFlagsKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpRayQueryGetRayFlagsKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10686,7 +10686,7 @@ inst_OpRayQueryGetIntersectionTKHR :: #force_inline proc "contextless" (buf: []O
 
 ray_query_get_intersection_tkhr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionTKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionTKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10699,7 +10699,7 @@ inst_OpRayQueryGetIntersectionInstanceCustomIndexKHR :: #force_inline proc "cont
 
 ray_query_get_intersection_instance_custom_index_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionInstanceCustomIndexKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionInstanceCustomIndexKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10712,7 +10712,7 @@ inst_OpRayQueryGetIntersectionInstanceIdKHR :: #force_inline proc "contextless"
 
 ray_query_get_intersection_instance_id_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionInstanceIdKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionInstanceIdKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10725,7 +10725,7 @@ inst_OpRayQueryGetIntersectionInstanceShaderBindingTableRecordOffsetKHR :: #forc
 
 ray_query_get_intersection_instance_shader_binding_table_record_offset_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionInstanceShaderBindingTableRecordOffsetKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionInstanceShaderBindingTableRecordOffsetKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10738,7 +10738,7 @@ inst_OpRayQueryGetIntersectionGeometryIndexKHR :: #force_inline proc "contextles
 
 ray_query_get_intersection_geometry_index_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionGeometryIndexKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionGeometryIndexKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10751,7 +10751,7 @@ inst_OpRayQueryGetIntersectionPrimitiveIndexKHR :: #force_inline proc "contextle
 
 ray_query_get_intersection_primitive_index_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionPrimitiveIndexKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionPrimitiveIndexKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10764,7 +10764,7 @@ inst_OpRayQueryGetIntersectionBarycentricsKHR :: #force_inline proc "contextless
 
 ray_query_get_intersection_barycentrics_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionBarycentricsKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionBarycentricsKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10777,7 +10777,7 @@ inst_OpRayQueryGetIntersectionFrontFaceKHR :: #force_inline proc "contextless" (
 
 ray_query_get_intersection_front_face_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionFrontFaceKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionFrontFaceKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10789,7 +10789,7 @@ inst_OpRayQueryGetIntersectionCandidateAABBOpaqueKHR :: #force_inline proc "cont
 
 ray_query_get_intersection_candidate_aabb_opaque_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionCandidateAABBOpaqueKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionCandidateAABBOpaqueKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10802,7 +10802,7 @@ inst_OpRayQueryGetIntersectionObjectRayDirectionKHR :: #force_inline proc "conte
 
 ray_query_get_intersection_object_ray_direction_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionObjectRayDirectionKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionObjectRayDirectionKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10815,7 +10815,7 @@ inst_OpRayQueryGetIntersectionObjectRayOriginKHR :: #force_inline proc "contextl
 
 ray_query_get_intersection_object_ray_origin_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionObjectRayOriginKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionObjectRayOriginKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10827,7 +10827,7 @@ inst_OpRayQueryGetWorldRayDirectionKHR :: #force_inline proc "contextless" (buf:
 
 ray_query_get_world_ray_direction_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetWorldRayDirectionKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpRayQueryGetWorldRayDirectionKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10839,7 +10839,7 @@ inst_OpRayQueryGetWorldRayOriginKHR :: #force_inline proc "contextless" (buf: []
 
 ray_query_get_world_ray_origin_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetWorldRayOriginKHR(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpRayQueryGetWorldRayOriginKHR(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10852,7 +10852,7 @@ inst_OpRayQueryGetIntersectionObjectToWorldKHR :: #force_inline proc "contextles
 
 ray_query_get_intersection_object_to_world_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionObjectToWorldKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionObjectToWorldKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10865,7 +10865,7 @@ inst_OpRayQueryGetIntersectionWorldToObjectKHR :: #force_inline proc "contextles
 
 ray_query_get_intersection_world_to_object_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRayQueryGetIntersectionWorldToObjectKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpRayQueryGetIntersectionWorldToObjectKHR(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -10880,7 +10880,7 @@ inst_OpAtomicFAddEXT :: #force_inline proc "contextless" (buf: []Operand, result
 
 atomic_f_add_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpAtomicFAddEXT(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpAtomicFAddEXT(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -10892,7 +10892,7 @@ inst_OpTypeBufferSurfaceINTEL :: #force_inline proc "contextless" (buf: []Operan
 
 type_buffer_surface_intel :: proc(b: ^Builder, op1: Access_Qualifier) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeBufferSurfaceINTEL(opbuf(b, 1), r, op1))
+	append_elem(&b.ops, inst_OpTypeBufferSurfaceINTEL(opbuf(b, 1), r, op1))
 	return r
 }
 
@@ -10903,7 +10903,7 @@ inst_OpTypeStructContinuedINTEL :: #force_inline proc "contextless" (buf: []Oper
 }
 
 type_struct_continued_intel :: proc(b: ^Builder, op1: []Id) {
-	append(&b.ops, inst_OpTypeStructContinuedINTEL(opbuf(b, len(op1)), op1))
+	append_elem(&b.ops, inst_OpTypeStructContinuedINTEL(opbuf(b, len(op1)), op1))
 }
 
 inst_OpConstantCompositeContinuedINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: []Id) -> Operation {
@@ -10913,7 +10913,7 @@ inst_OpConstantCompositeContinuedINTEL :: #force_inline proc "contextless" (buf:
 }
 
 constant_composite_continued_intel :: proc(b: ^Builder, op1: []Id) {
-	append(&b.ops, inst_OpConstantCompositeContinuedINTEL(opbuf(b, len(op1)), op1))
+	append_elem(&b.ops, inst_OpConstantCompositeContinuedINTEL(opbuf(b, len(op1)), op1))
 }
 
 inst_OpSpecConstantCompositeContinuedINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: []Id) -> Operation {
@@ -10923,7 +10923,7 @@ inst_OpSpecConstantCompositeContinuedINTEL :: #force_inline proc "contextless" (
 }
 
 spec_constant_composite_continued_intel :: proc(b: ^Builder, op1: []Id) {
-	append(&b.ops, inst_OpSpecConstantCompositeContinuedINTEL(opbuf(b, len(op1)), op1))
+	append_elem(&b.ops, inst_OpSpecConstantCompositeContinuedINTEL(opbuf(b, len(op1)), op1))
 }
 
 inst_OpCompositeConstructContinuedINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: []Id) -> Operation {
@@ -10933,7 +10933,7 @@ inst_OpCompositeConstructContinuedINTEL :: #force_inline proc "contextless" (buf
 }
 
 composite_construct_continued_intel :: proc(b: ^Builder, op1: []Id) {
-	append(&b.ops, inst_OpCompositeConstructContinuedINTEL(opbuf(b, len(op1)), op1))
+	append_elem(&b.ops, inst_OpCompositeConstructContinuedINTEL(opbuf(b, len(op1)), op1))
 }
 
 inst_OpConvertFToBF16INTEL :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -10944,7 +10944,7 @@ inst_OpConvertFToBF16INTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 convert_f_to_bf16_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertFToBF16INTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertFToBF16INTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10956,7 +10956,7 @@ inst_OpConvertBF16ToFINTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 convert_bf16_to_fintel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertBF16ToFINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertBF16ToFINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -10969,7 +10969,7 @@ inst_OpControlBarrierArriveEXT :: #force_inline proc "contextless" (buf: []Opera
 }
 
 control_barrier_arrive_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpControlBarrierArriveEXT(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpControlBarrierArriveEXT(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpControlBarrierWaitEXT :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id) -> Operation {
@@ -10981,7 +10981,7 @@ inst_OpControlBarrierWaitEXT :: #force_inline proc "contextless" (buf: []Operand
 }
 
 control_barrier_wait_ext :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id) {
-	append(&b.ops, inst_OpControlBarrierWaitEXT(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpControlBarrierWaitEXT(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpArithmeticFenceEXT :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -10992,7 +10992,7 @@ inst_OpArithmeticFenceEXT :: #force_inline proc "contextless" (buf: []Operand, r
 
 arithmetic_fence_ext :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpArithmeticFenceEXT(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpArithmeticFenceEXT(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -11008,7 +11008,7 @@ inst_OpTaskSequenceCreateALTERA :: #force_inline proc "contextless" (buf: []Oper
 
 task_sequence_create_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: i64, op4: i64, op5: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTaskSequenceCreateALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpTaskSequenceCreateALTERA(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -11020,7 +11020,7 @@ inst_OpTaskSequenceAsyncALTERA :: #force_inline proc "contextless" (buf: []Opera
 }
 
 task_sequence_async_altera :: proc(b: ^Builder, op1: Id, op2: []Id) {
-	append(&b.ops, inst_OpTaskSequenceAsyncALTERA(opbuf(b, 1 + len(op2)), op1, op2))
+	append_elem(&b.ops, inst_OpTaskSequenceAsyncALTERA(opbuf(b, 1 + len(op2)), op1, op2))
 }
 
 inst_OpTaskSequenceGetALTERA :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -11031,7 +11031,7 @@ inst_OpTaskSequenceGetALTERA :: #force_inline proc "contextless" (buf: []Operand
 
 task_sequence_get_altera :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTaskSequenceGetALTERA(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpTaskSequenceGetALTERA(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -11042,7 +11042,7 @@ inst_OpTaskSequenceReleaseALTERA :: #force_inline proc "contextless" (buf: []Ope
 }
 
 task_sequence_release_altera :: proc(b: ^Builder, op1: Id) {
-	append(&b.ops, inst_OpTaskSequenceReleaseALTERA(opbuf(b, 1), op1))
+	append_elem(&b.ops, inst_OpTaskSequenceReleaseALTERA(opbuf(b, 1), op1))
 }
 
 inst_OpTypeTaskSequenceALTERA :: #force_inline proc "contextless" (result: Id) -> Operation {
@@ -11051,7 +11051,7 @@ inst_OpTypeTaskSequenceALTERA :: #force_inline proc "contextless" (result: Id) -
 
 type_task_sequence_altera :: proc(b: ^Builder) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpTypeTaskSequenceALTERA(r))
+	append_elem(&b.ops, inst_OpTypeTaskSequenceALTERA(r))
 	return r
 }
 
@@ -11064,7 +11064,7 @@ inst_OpSubgroupBlockPrefetchINTEL :: #force_inline proc "contextless" (buf: []Op
 }
 
 subgroup_block_prefetch_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Maybe(Memory_Access)) {
-	append(&b.ops, inst_OpSubgroupBlockPrefetchINTEL(opbuf(b, 1 + 1 + 1), op1, op2, op3))
+	append_elem(&b.ops, inst_OpSubgroupBlockPrefetchINTEL(opbuf(b, 1 + 1 + 1), op1, op2, op3))
 }
 
 inst_OpSubgroup2DBlockLoadINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id) -> Operation {
@@ -11083,7 +11083,7 @@ inst_OpSubgroup2DBlockLoadINTEL :: #force_inline proc "contextless" (buf: []Oper
 }
 
 subgroup2_d_block_load_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id) {
-	append(&b.ops, inst_OpSubgroup2DBlockLoadINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10))
+	append_elem(&b.ops, inst_OpSubgroup2DBlockLoadINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10))
 }
 
 inst_OpSubgroup2DBlockLoadTransformINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id) -> Operation {
@@ -11102,7 +11102,7 @@ inst_OpSubgroup2DBlockLoadTransformINTEL :: #force_inline proc "contextless" (bu
 }
 
 subgroup2_d_block_load_transform_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id) {
-	append(&b.ops, inst_OpSubgroup2DBlockLoadTransformINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10))
+	append_elem(&b.ops, inst_OpSubgroup2DBlockLoadTransformINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10))
 }
 
 inst_OpSubgroup2DBlockLoadTransposeINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id) -> Operation {
@@ -11121,7 +11121,7 @@ inst_OpSubgroup2DBlockLoadTransposeINTEL :: #force_inline proc "contextless" (bu
 }
 
 subgroup2_d_block_load_transpose_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id) {
-	append(&b.ops, inst_OpSubgroup2DBlockLoadTransposeINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10))
+	append_elem(&b.ops, inst_OpSubgroup2DBlockLoadTransposeINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10))
 }
 
 inst_OpSubgroup2DBlockPrefetchINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id) -> Operation {
@@ -11139,7 +11139,7 @@ inst_OpSubgroup2DBlockPrefetchINTEL :: #force_inline proc "contextless" (buf: []
 }
 
 subgroup2_d_block_prefetch_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id) {
-	append(&b.ops, inst_OpSubgroup2DBlockPrefetchINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9))
+	append_elem(&b.ops, inst_OpSubgroup2DBlockPrefetchINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9))
 }
 
 inst_OpSubgroup2DBlockStoreINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id) -> Operation {
@@ -11158,7 +11158,7 @@ inst_OpSubgroup2DBlockStoreINTEL :: #force_inline proc "contextless" (buf: []Ope
 }
 
 subgroup2_d_block_store_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Id, op5: Id, op6: Id, op7: Id, op8: Id, op9: Id, op10: Id) {
-	append(&b.ops, inst_OpSubgroup2DBlockStoreINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10))
+	append_elem(&b.ops, inst_OpSubgroup2DBlockStoreINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1), op1, op2, op3, op4, op5, op6, op7, op8, op9, op10))
 }
 
 inst_OpSubgroupMatrixMultiplyAccumulateINTEL :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Id, op3: Id, op4: Id, op5: Maybe(Matrix_Multiply_Accumulate_Operands)) -> Operation {
@@ -11173,7 +11173,7 @@ inst_OpSubgroupMatrixMultiplyAccumulateINTEL :: #force_inline proc "contextless"
 
 subgroup_matrix_multiply_accumulate_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id, op5: Maybe(Matrix_Multiply_Accumulate_Operands)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSubgroupMatrixMultiplyAccumulateINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpSubgroupMatrixMultiplyAccumulateINTEL(opbuf(b, 1 + 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4, op5))
 	return r
 }
 
@@ -11188,7 +11188,7 @@ inst_OpBitwiseFunctionINTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 bitwise_function_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpBitwiseFunctionINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpBitwiseFunctionINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -11201,7 +11201,7 @@ inst_OpUntypedVariableLengthArrayINTEL :: #force_inline proc "contextless" (buf:
 
 untyped_variable_length_array_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpUntypedVariableLengthArrayINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpUntypedVariableLengthArrayINTEL(opbuf(b, 1 + 1), result_type, r, op1, op2))
 	return r
 }
 
@@ -11213,7 +11213,7 @@ inst_OpConditionalExtensionINTEL :: #force_inline proc "contextless" (buf: []Ope
 }
 
 conditional_extension_intel :: proc(b: ^Builder, op1: Id, op2: string) {
-	append(&b.ops, inst_OpConditionalExtensionINTEL(opbuf(b, 1 + (len(op2) + 4) / 4), op1, op2))
+	append_elem(&b.ops, inst_OpConditionalExtensionINTEL(opbuf(b, 1 + (len(op2) + 4) / 4), op1, op2))
 }
 
 inst_OpConditionalEntryPointINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Execution_Model, op3: Id, op4: string, op5: []Id) -> Operation {
@@ -11227,7 +11227,7 @@ inst_OpConditionalEntryPointINTEL :: #force_inline proc "contextless" (buf: []Op
 }
 
 conditional_entry_point_intel :: proc(b: ^Builder, op1: Id, op2: Execution_Model, op3: Id, op4: string, op5: []Id) {
-	append(&b.ops, inst_OpConditionalEntryPointINTEL(opbuf(b, 1 + 1 + 1 + (len(op4) + 4) / 4 + len(op5)), op1, op2, op3, op4, op5))
+	append_elem(&b.ops, inst_OpConditionalEntryPointINTEL(opbuf(b, 1 + 1 + 1 + (len(op4) + 4) / 4 + len(op5)), op1, op2, op3, op4, op5))
 }
 
 inst_OpConditionalCapabilityINTEL :: #force_inline proc "contextless" (buf: []Operand, op1: Id, op2: Capability) -> Operation {
@@ -11238,7 +11238,7 @@ inst_OpConditionalCapabilityINTEL :: #force_inline proc "contextless" (buf: []Op
 }
 
 conditional_capability_intel :: proc(b: ^Builder, op1: Id, op2: Capability) {
-	append(&b.ops, inst_OpConditionalCapabilityINTEL(opbuf(b, 1 + 1), op1, op2))
+	append_elem(&b.ops, inst_OpConditionalCapabilityINTEL(opbuf(b, 1 + 1), op1, op2))
 }
 
 inst_OpSpecConstantTargetINTEL :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: i64, op2: []i64) -> Operation {
@@ -11250,7 +11250,7 @@ inst_OpSpecConstantTargetINTEL :: #force_inline proc "contextless" (buf: []Opera
 
 spec_constant_target_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: i64, op2: []i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantTargetINTEL(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
+	append_elem(&b.ops, inst_OpSpecConstantTargetINTEL(opbuf(b, 1 + len(op2)), result_type, r, op1, op2))
 	return r
 }
 
@@ -11265,7 +11265,7 @@ inst_OpSpecConstantArchitectureINTEL :: #force_inline proc "contextless" (buf: [
 
 spec_constant_architecture_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: i64, op2: i64, op3: i64, op4: i64) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantArchitectureINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpSpecConstantArchitectureINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -11277,7 +11277,7 @@ inst_OpSpecConstantCapabilitiesINTEL :: #force_inline proc "contextless" (buf: [
 
 spec_constant_capabilities_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: []Capability) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpSpecConstantCapabilitiesINTEL(opbuf(b, len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpSpecConstantCapabilitiesINTEL(opbuf(b, len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -11289,7 +11289,7 @@ inst_OpConditionalCopyObjectINTEL :: #force_inline proc "contextless" (buf: []Op
 
 conditional_copy_object_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: []Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConditionalCopyObjectINTEL(opbuf(b, len(op1)), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConditionalCopyObjectINTEL(opbuf(b, len(op1)), result_type, r, op1))
 	return r
 }
 
@@ -11304,7 +11304,7 @@ inst_OpPredicatedLoadINTEL :: #force_inline proc "contextless" (buf: []Operand,
 
 predicated_load_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id, op4: Maybe(Memory_Access)) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpPredicatedLoadINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpPredicatedLoadINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -11318,7 +11318,7 @@ inst_OpPredicatedStoreINTEL :: #force_inline proc "contextless" (buf: []Operand,
 }
 
 predicated_store_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: Id, op4: Maybe(Memory_Access)) {
-	append(&b.ops, inst_OpPredicatedStoreINTEL(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpPredicatedStoreINTEL(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpGroupIMulKHR :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id, op2: Group_Operation, op3: Id) -> Operation {
@@ -11331,7 +11331,7 @@ inst_OpGroupIMulKHR :: #force_inline proc "contextless" (buf: []Operand, result_
 
 group_i_mul_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupIMulKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupIMulKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11345,7 +11345,7 @@ inst_OpGroupFMulKHR :: #force_inline proc "contextless" (buf: []Operand, result_
 
 group_f_mul_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupFMulKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupFMulKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11359,7 +11359,7 @@ inst_OpGroupBitwiseAndKHR :: #force_inline proc "contextless" (buf: []Operand, r
 
 group_bitwise_and_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupBitwiseAndKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupBitwiseAndKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11373,7 +11373,7 @@ inst_OpGroupBitwiseOrKHR :: #force_inline proc "contextless" (buf: []Operand, re
 
 group_bitwise_or_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupBitwiseOrKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupBitwiseOrKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11387,7 +11387,7 @@ inst_OpGroupBitwiseXorKHR :: #force_inline proc "contextless" (buf: []Operand, r
 
 group_bitwise_xor_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupBitwiseXorKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupBitwiseXorKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11401,7 +11401,7 @@ inst_OpGroupLogicalAndKHR :: #force_inline proc "contextless" (buf: []Operand, r
 
 group_logical_and_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupLogicalAndKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupLogicalAndKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11415,7 +11415,7 @@ inst_OpGroupLogicalOrKHR :: #force_inline proc "contextless" (buf: []Operand, re
 
 group_logical_or_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupLogicalOrKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupLogicalOrKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11429,7 +11429,7 @@ inst_OpGroupLogicalXorKHR :: #force_inline proc "contextless" (buf: []Operand, r
 
 group_logical_xor_khr :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Group_Operation, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpGroupLogicalXorKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpGroupLogicalXorKHR(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11441,7 +11441,7 @@ inst_OpRoundFToTF32INTEL :: #force_inline proc "contextless" (buf: []Operand, re
 
 round_f_to_tf32_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpRoundFToTF32INTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpRoundFToTF32INTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -11456,7 +11456,7 @@ inst_OpMaskedGatherINTEL :: #force_inline proc "contextless" (buf: []Operand, re
 
 masked_gather_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: i64, op3: Id, op4: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpMaskedGatherINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpMaskedGatherINTEL(opbuf(b, 1 + 1 + 1 + 1), result_type, r, op1, op2, op3, op4))
 	return r
 }
 
@@ -11470,7 +11470,7 @@ inst_OpMaskedScatterINTEL :: #force_inline proc "contextless" (buf: []Operand, o
 }
 
 masked_scatter_intel :: proc(b: ^Builder, op1: Id, op2: Id, op3: i64, op4: Id) {
-	append(&b.ops, inst_OpMaskedScatterINTEL(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
+	append_elem(&b.ops, inst_OpMaskedScatterINTEL(opbuf(b, 1 + 1 + 1 + 1), op1, op2, op3, op4))
 }
 
 inst_OpConvertHandleToImageINTEL :: #force_inline proc "contextless" (buf: []Operand, result_type: Type_Ref, result: Id, op1: Id) -> Operation {
@@ -11481,7 +11481,7 @@ inst_OpConvertHandleToImageINTEL :: #force_inline proc "contextless" (buf: []Ope
 
 convert_handle_to_image_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertHandleToImageINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertHandleToImageINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -11493,7 +11493,7 @@ inst_OpConvertHandleToSamplerINTEL :: #force_inline proc "contextless" (buf: []O
 
 convert_handle_to_sampler_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertHandleToSamplerINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertHandleToSamplerINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -11505,7 +11505,7 @@ inst_OpConvertHandleToSampledImageINTEL :: #force_inline proc "contextless" (buf
 
 convert_handle_to_sampled_image_intel :: proc(b: ^Builder, result_type: Type_Ref, op1: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpConvertHandleToSampledImageINTEL(opbuf(b, 1), result_type, r, op1))
+	append_elem(&b.ops, inst_OpConvertHandleToSampledImageINTEL(opbuf(b, 1), result_type, r, op1))
 	return r
 }
 
@@ -11519,7 +11519,7 @@ inst_OpFDot2MixAcc32VALVE :: #force_inline proc "contextless" (buf: []Operand, r
 
 f_dot2_mix_acc32_valve :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFDot2MixAcc32VALVE(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpFDot2MixAcc32VALVE(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11533,7 +11533,7 @@ inst_OpFDot2MixAcc16VALVE :: #force_inline proc "contextless" (buf: []Operand, r
 
 f_dot2_mix_acc16_valve :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFDot2MixAcc16VALVE(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpFDot2MixAcc16VALVE(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
 
@@ -11547,6 +11547,6 @@ inst_OpFDot4MixAcc32VALVE :: #force_inline proc "contextless" (buf: []Operand, r
 
 f_dot4_mix_acc32_valve :: proc(b: ^Builder, result_type: Type_Ref, op1: Id, op2: Id, op3: Id) -> Id {
 	r := alloc_id(b)
-	append(&b.ops, inst_OpFDot4MixAcc32VALVE(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
+	append_elem(&b.ops, inst_OpFDot4MixAcc32VALVE(opbuf(b, 1 + 1 + 1), result_type, r, op1, op2, op3))
 	return r
 }
diff --git a/core/rexcode/ir/spirv/tablegen/gen.odin b/core/rexcode/ir/spirv/tablegen/gen.odin
index 0b932296f..6681e1664 100644
--- a/core/rexcode/ir/spirv/tablegen/gen.odin
+++ b/core/rexcode/ir/spirv/tablegen/gen.odin
@@ -430,7 +430,7 @@ gen_one_builder :: proc(sb: ^strings.Builder, opname, verb: string, has_rt, has_
 
 	fmt.sbprintf(sb, "\n%s :: proc(%s)%s {{\n", verb, join(hl[:]), has_r ? " -> Id" : "")
 	if has_r { strings.write_string(sb, "\tr := alloc_id(b)\n") }
-	fmt.sbprintf(sb, "\tappend(&b.ops, inst_%s(%s))\n", opname, join(call[:]))
+	fmt.sbprintf(sb, "\tappend_elem(&b.ops, inst_%s(%s))\n", opname, join(call[:]))
 	if has_r { strings.write_string(sb, "\treturn r\n") }
 	strings.write_string(sb, "}\n")
 }

From 47ffc56d1a423330aef6ceef432090ab3426514c Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 19:44:23 +0100
Subject: [PATCH 080/215] Handle anonymous parapoly unions better

---
 src/check_expr.cpp |  1 +
 src/check_type.cpp | 68 +++++++++++++++++++++++++++++++++++++---------
 src/types.cpp      |  3 ++
 3 files changed, 59 insertions(+), 13 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index ad91599d5..383c388f9 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -13028,6 +13028,7 @@ gb_internal ExprKind check_expr_base_internal(CheckerContext *c, Operand *o, Ast
 	case Ast_EnumType:
 	case Ast_MapType:
 	case Ast_BitSetType:
+	case Ast_BitFieldType:
 	case Ast_MatrixType:
 	case Ast_RelativeType:
 		o->mode = Addressing_Type;
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 1901dabbe..9f3186025 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -891,7 +891,15 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 				}
 			} else {
 				for_array(j, variants) {
-					if (union_variant_index_types_equal(t, variants[j])) {
+					Type *other = variants[j];
+					// Distinct polymorphic type variables (e.g. `$A`, `$B`) are distinct variants even
+					// though are_types_identical treats all unbound generics as equal.
+					if (other->kind == Type_Generic && t->kind == Type_Generic &&
+					    other->Generic.specialized == nullptr && t->Generic.specialized == nullptr &&
+					    !(other->Generic.interned_name == t->Generic.interned_name)) {
+						continue;
+					}
+					if (union_variant_index_types_equal(t, other)) {
 						ok = false;
 						ERROR_BLOCK();
 						gbString str = type_to_string(t);
@@ -945,6 +953,18 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 		}
 	}
 
+	// An anonymous union with a polymorphic variant (e.g. `union{$T, int}`) is itself polymorphic.
+	// is_type_polymorphic(Union) only reads this flag (its variant loop is disabled to avoid a
+	// recursion bug), so compute it once here from the resolved variants.
+	if (!union_type->Union.is_polymorphic) {
+		for (Type *v : union_type->Union.variants) {
+			if (is_type_polymorphic(v)) {
+				union_type->Union.is_polymorphic = true;
+				break;
+			}
+		}
+	}
+
 	wait_signal_set(&union_type->Union.variants_wait_signal);
 }
 
@@ -1140,7 +1160,10 @@ gb_internal void check_bit_field_type(CheckerContext *ctx, Type *bit_field_type,
 		error(bf->backing_type, "Backing type for a bit_field must be an integer or an array of an integer");
 		return;
 	}
-	if (!is_valid_bit_field_backing_type(backing_type)) {
+	// A polymorphic backing (e.g. `bit_field $T {...}`) has an unknown size/endianness until it is
+	// instantiated, so the backing-dependent validations below are skipped for it.
+	bool backing_is_polymorphic = is_type_polymorphic(backing_type);
+	if (!backing_is_polymorphic && !is_valid_bit_field_backing_type(backing_type)) {
 		error(bf->backing_type, "Backing type for a bit_field must be an integer or an array of an integer");
 		return;
 	}
@@ -1149,7 +1172,7 @@ gb_internal void check_bit_field_type(CheckerContext *ctx, Type *bit_field_type,
 	auto bit_sizes = array_make<u8>      (permanent_allocator(), 0, bf->fields.count);
 	auto tags      = array_make<String>  (permanent_allocator(), 0, bf->fields.count);
 
-	u64 maximum_bit_size = 8 * type_size_of(backing_type);
+	u64 maximum_bit_size = backing_is_polymorphic ? ~cast(u64)0 : 8 * type_size_of(backing_type);
 	u64 total_bit_size = 0;
 
 	for_array(i, bf->fields) {
@@ -1311,9 +1334,9 @@ gb_internal void check_bit_field_type(CheckerContext *ctx, Type *bit_field_type,
 		return Endian_Native;
 	};
 
-	Type *backing_type_elem = core_array_type(backing_type);
-	i64 backing_type_elem_size = type_size_of(backing_type_elem);
-	EndianKind backing_type_endian_kind = determine_endian_kind(backing_type_elem);
+	Type *backing_type_elem = backing_is_polymorphic ? backing_type : core_array_type(backing_type);
+	i64 backing_type_elem_size = backing_is_polymorphic ? 0 : type_size_of(backing_type_elem);
+	EndianKind backing_type_endian_kind = backing_is_polymorphic ? Endian_Unknown : determine_endian_kind(backing_type_elem);
 	EndianKind endian_kind = Endian_Unknown;
 	for (Entity *f : fields) {
 		EndianKind field_kind = determine_endian_kind(f->type);
@@ -1924,19 +1947,21 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 		}
 		return Subst_NoMatch;
 	case Type_Pointer:
-		// old code also allows struct subtyping and Pointer<->MultiPointer; only the plain elem match here
+		// Pointer<->MultiPointer conversions stay on the mutator; here only the same-kind elem match.
 		if (source->kind != Type_Pointer) {
 			return Subst_Unhandled;
 		}
-		if (base_type(pattern->Pointer.elem)->kind == Type_Struct) {
-			return Subst_Unhandled;
+		if (base_type(pattern->Pointer.elem)->kind == Type_Struct &&
+		    check_is_assignable_to_using_subtype(source->Pointer.elem, pattern->Pointer.elem, 0, false, true) > 0) {
+			return Subst_Unhandled; // genuine subtype match (no binding), handled by the mutator
 		}
 		return subst_unify(c, pattern->Pointer.elem, source->Pointer.elem, subst);
 	case Type_MultiPointer:
 		if (source->kind != Type_MultiPointer) {
 			return Subst_Unhandled;
 		}
-		if (base_type(pattern->MultiPointer.elem)->kind == Type_Struct) {
+		if (base_type(pattern->MultiPointer.elem)->kind == Type_Struct &&
+		    check_is_assignable_to_using_subtype(source->MultiPointer.elem, pattern->MultiPointer.elem) > 0) {
 			return Subst_Unhandled;
 		}
 		return subst_unify(c, pattern->MultiPointer.elem, source->MultiPointer.elem, subst);
@@ -2162,8 +2187,9 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 		if (source->kind != Type_SoaPointer) {
 			return Subst_Unhandled;
 		}
-		if (base_type(pattern->SoaPointer.elem)->kind == Type_Struct) {
-			return Subst_Unhandled; // subtype path, handled by the mutator
+		if (base_type(pattern->SoaPointer.elem)->kind == Type_Struct &&
+		    check_is_assignable_to_using_subtype(source->SoaPointer.elem, pattern->SoaPointer.elem, 0, false, true) > 0) {
+			return Subst_Unhandled; // genuine subtype match (no binding), handled by the mutator
 		}
 		return subst_unify(c, pattern->SoaPointer.elem, source->SoaPointer.elem, subst);
 	case Type_FixedCapacityDynamicArray:
@@ -2441,14 +2467,30 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 		// resolved type is the (already concrete) source.
 		return source;
 	case Type_BitField: {
+		Type *backing = subst_apply(c, pattern->BitField.backing_type, source->BitField.backing_type, subst);
 		Type *r = alloc_type_bit_field();
-		r->BitField.backing_type = subst_apply(c, pattern->BitField.backing_type, source->BitField.backing_type, subst);
+		r->BitField.backing_type = backing;
 		r->BitField.fields       = pattern->BitField.fields;
 		r->BitField.tags         = pattern->BitField.tags;
 		r->BitField.bit_sizes    = pattern->BitField.bit_sizes;
 		r->BitField.bit_offsets  = pattern->BitField.bit_offsets;
 		r->BitField.scope        = pattern->BitField.scope;
 		r->BitField.node         = pattern->BitField.node;
+		// The backing-size check is deferred from check_bit_field_type for a polymorphic backing; run it
+		// now that the backing is concrete.
+		if (!c->no_polymorphic_errors && !c->hide_polymorphic_errors && !is_type_polymorphic(backing)) {
+			u64 total = 0;
+			for (u8 bs : r->BitField.bit_sizes) {
+				total += bs;
+			}
+			u64 maximum = 8 * cast(u64)type_size_of(backing);
+			if (total > maximum) {
+				gbString s = type_to_string(backing);
+				error(pattern->BitField.node, "The total bit size of a bit_field's fields (%llu) must fit into its backing type's (%s) bit size of %llu",
+				      cast(unsigned long long)total, s, cast(unsigned long long)maximum);
+				gb_string_free(s);
+			}
+		}
 		return r;
 	}
 	case Type_Struct: {
diff --git a/src/types.cpp b/src/types.cpp
index 69112268d..bcac2972a 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -2635,6 +2635,9 @@ gb_internal bool is_type_polymorphic(Type *t, bool or_specialized=false) {
 			return true;
 		}
 		break;
+
+	case Type_BitField:
+		return is_type_polymorphic(t->BitField.backing_type, or_specialized);
 	}
 	return false;
 }

From 53c6e81ab652c2a5357e852d74dad691424edc04 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 19:52:03 +0100
Subject: [PATCH 081/215] Handle anonymous-record field polymorphis correctly
 for structs and bit fields.

---
 src/check_type.cpp | 45 +++++++++++++++++++++++++++++++++++++++------
 1 file changed, 39 insertions(+), 6 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index 9f3186025..c10f7887b 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -153,8 +153,9 @@ gb_internal void check_struct_fields(CheckerContext *ctx, Ast *node, Slice<Entit
 		if (type_expr != nullptr) {
 			type = check_type_expr(ctx, type_expr, nullptr);
 			if (is_type_polymorphic(type)) {
+				// A field-level polymorphic type (e.g. `struct{x: $T}`) makes the struct polymorphic;
+				// keep the field's generic type so it can be substituted, rather than rejecting it.
 				struct_type->Struct.is_polymorphic = true;
-				type = nullptr;
 			}
 		}
 		if (type == nullptr) {
@@ -2254,13 +2255,40 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			return Subst_NoMatch;
 		}
 		return subst_unify(c, pattern->BitField.backing_type, source->BitField.backing_type, subst);
-	case Type_Struct:
-		if (source->kind == Type_Struct &&
-		    pattern->Struct.soa_kind == source->Struct.soa_kind &&
-		    pattern->Struct.soa_kind != StructSoa_None) {
+	case Type_Struct: {
+		if (source->kind != Type_Struct) {
+			return Subst_NoMatch;
+		}
+		if (pattern->Struct.soa_kind != StructSoa_None || source->Struct.soa_kind != StructSoa_None) {
+			if (pattern->Struct.soa_kind != source->Struct.soa_kind) {
+				return Subst_NoMatch;
+			}
 			return subst_unify(c, pattern->Struct.soa_elem, source->Struct.soa_elem, subst);
 		}
-		return Subst_Unhandled; // plain anonymous struct / subtype, handled by the mutator
+		// Anonymous struct with field-level polymorphism (e.g. `struct{x: $T, y: [2]T}`): match fields
+		// positionally. Record subtyping is not attempted here, so it is left to the mutator.
+		if (pattern->Struct.is_raw_union != source->Struct.is_raw_union ||
+		    pattern->Struct.is_packed != source->Struct.is_packed) {
+			return Subst_Unhandled;
+		}
+		wait_signal_until_available(&pattern->Struct.fields_wait_signal);
+		wait_signal_until_available(&source->Struct.fields_wait_signal);
+		if (pattern->Struct.fields.count != source->Struct.fields.count) {
+			return Subst_NoMatch;
+		}
+		for_array(i, pattern->Struct.fields) {
+			Entity *pf = pattern->Struct.fields[i];
+			Entity *sf = source->Struct.fields[i];
+			if (pf->token.string != sf->token.string) {
+				return Subst_NoMatch;
+			}
+			SubstResult r = subst_unify(c, pf->type, sf->type, subst);
+			if (r != Subst_Matched) {
+				return Subst_Unhandled; // field context allows assignability/subtyping, defer to the mutator
+			}
+		}
+		return Subst_Matched;
+	}
 	}
 	return Subst_Unhandled;
 }
@@ -2494,6 +2522,11 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 		return r;
 	}
 	case Type_Struct: {
+		if (pattern->Struct.soa_kind == StructSoa_None) {
+			// Anonymous field-polymorphic struct: unify matched fields positionally, so the resolved
+			// type is the (already concrete) source.
+			return source;
+		}
 		Type *elem = subst_apply(c, pattern->Struct.soa_elem, source->Struct.soa_elem, subst);
 		switch (pattern->Struct.soa_kind) {
 		case StructSoa_Fixed:   return make_soa_struct_fixed(c, nullptr, pattern->Struct.node, elem, pattern->Struct.soa_count, nullptr);

From 46a6df0d430dad2c0c0f756989525d1445366e99 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 20:19:14 +0100
Subject: [PATCH 082/215] Handle constrained generics in the poly-subst engine,
 match `$T/S` constraints in `subst_unify`

---
 src/check_type.cpp | 43 ++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 40 insertions(+), 3 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index c10f7887b..91550cbbf 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1929,6 +1929,19 @@ gb_internal bool poly_subst_bind_enum_array(PolySubst *s, Entity *key, Type *ea)
 	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_EnumArray, ea, 0, nullptr});
 }
 
+// True when `source` is an instantiation of the bare polymorphic record template `spec` (the form a
+// `$T/Stack` constraint takes). Mirrors check_type_specialization_to's `polymorphic_parent` check.
+gb_internal bool subst_source_is_template_instance(Type *source, Type *spec) {
+	Type *sb = base_type(source);
+	if (sb->kind == Type_Struct) {
+		return sb->Struct.polymorphic_parent == spec;
+	}
+	if (sb->kind == Type_Union) {
+		return sb->Union.polymorphic_parent == spec;
+	}
+	return false;
+}
+
 gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *source, PolySubst *subst) {
 	if (pattern == nullptr || source == nullptr) {
 		return Subst_Unhandled;
@@ -1941,7 +1954,16 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 		return Subst_NoMatch;
 	case Type_Generic:
 		if (pattern->Generic.specialized != nullptr) {
-			return Subst_Unhandled;
+			// Constrained generic `$T/S`: bind the nested vars of `S` against the source (e.g. `$U` in
+			// `$T/Stack($U)`, or `$T`/`$E` in `$P/proc($T)->$E`), then bind T. A bare template `$T/Stack`
+			// needs no nested binding, only that the source is an instantiation of it.
+			Type *spec = pattern->Generic.specialized;
+			if (!subst_source_is_template_instance(source, spec)) {
+				SubstResult r = subst_unify(c, spec, source, subst);
+				if (r != Subst_Matched) {
+					return Subst_Unhandled;
+				}
+			}
 		}
 		if (poly_subst_bind_type(subst, poly_generic_entity(pattern), default_type(source))){
 			return Subst_Matched;
@@ -2118,10 +2140,22 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			Type *st = s_e->type;
 			if (st->kind == Type_Generic) {
 				Entity *ge = poly_generic_entity(st);
-				if (ge == nullptr || st->Generic.specialized != nullptr) {
+				if (ge == nullptr) {
 					return Subst_Unhandled;
 				}
-				if (t_e->kind == Entity_Constant) {
+				if (st->Generic.specialized != nullptr) {
+					// Constrained record param `$T/S`: bind the nested vars of the constraint, then T.
+					Type *spec = st->Generic.specialized;
+					if (!subst_source_is_template_instance(t_e->type, spec)) {
+						SubstResult r = subst_unify(c, spec, t_e->type, subst);
+						if (r != Subst_Matched) {
+							return Subst_Unhandled;
+						}
+					}
+					if (!poly_subst_bind_type(subst, ge, default_type(t_e->type))) {
+						return Subst_NoMatch;
+					}
+				} else if (t_e->kind == Entity_Constant) {
 					if (t_e->Constant.value.kind != ExactValue_Integer) {
 						return Subst_Unhandled;
 					}
@@ -2282,6 +2316,9 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			if (pf->token.string != sf->token.string) {
 				return Subst_NoMatch;
 			}
+			if ((pf->flags & EntityFlags_IsSubtype) != (sf->flags & EntityFlags_IsSubtype)) {
+				return Subst_NoMatch; // a `using`/subtype field must match one on the source
+			}
 			SubstResult r = subst_unify(c, pf->type, sf->type, subst);
 			if (r != Subst_Matched) {
 				return Subst_Unhandled; // field context allows assignability/subtyping, defer to the mutator

From 6e2f336d037b647493d86879bbc7da84d58105e2 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 20:27:59 +0100
Subject: [PATCH 083/215] Handle ^T <-> [^]T edge case with parapoly

---
 src/check_type.cpp | 50 ++++++++++++++++++++++++++++++++--------------
 1 file changed, 35 insertions(+), 15 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index 91550cbbf..3a63330cf 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1969,25 +1969,40 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			return Subst_Matched;
 		}
 		return Subst_NoMatch;
-	case Type_Pointer:
-		// Pointer<->MultiPointer conversions stay on the mutator; here only the same-kind elem match.
-		if (source->kind != Type_Pointer) {
-			return Subst_Unhandled;
+	case Type_Pointer: {
+		// A `^T` pattern also matches a `[^]T` source (the mutator allows ^<->[^] here). The subtype
+		// check mirrors the mutator: allow_polymorphic for a pointer source, plain for a multi-pointer.
+		Type *src_elem = nullptr;
+		bool allow_poly = false;
+		if (source->kind == Type_Pointer) {
+			src_elem = source->Pointer.elem;
+			allow_poly = true;
+		} else if (source->kind == Type_MultiPointer) {
+			src_elem = source->MultiPointer.elem;
+		} else {
+			return Subst_NoMatch;
 		}
 		if (base_type(pattern->Pointer.elem)->kind == Type_Struct &&
-		    check_is_assignable_to_using_subtype(source->Pointer.elem, pattern->Pointer.elem, 0, false, true) > 0) {
+		    check_is_assignable_to_using_subtype(src_elem, pattern->Pointer.elem, 0, false, allow_poly) > 0) {
 			return Subst_Unhandled; // genuine subtype match (no binding), handled by the mutator
 		}
-		return subst_unify(c, pattern->Pointer.elem, source->Pointer.elem, subst);
-	case Type_MultiPointer:
-		if (source->kind != Type_MultiPointer) {
-			return Subst_Unhandled;
+		return subst_unify(c, pattern->Pointer.elem, src_elem, subst);
+	}
+	case Type_MultiPointer: {
+		Type *src_elem = nullptr;
+		if (source->kind == Type_MultiPointer) {
+			src_elem = source->MultiPointer.elem;
+		} else if (source->kind == Type_Pointer) {
+			src_elem = source->Pointer.elem;
+		} else {
+			return Subst_NoMatch;
 		}
 		if (base_type(pattern->MultiPointer.elem)->kind == Type_Struct &&
-		    check_is_assignable_to_using_subtype(source->MultiPointer.elem, pattern->MultiPointer.elem) > 0) {
+		    check_is_assignable_to_using_subtype(src_elem, pattern->MultiPointer.elem) > 0) {
 			return Subst_Unhandled;
 		}
-		return subst_unify(c, pattern->MultiPointer.elem, source->MultiPointer.elem, subst);
+		return subst_unify(c, pattern->MultiPointer.elem, src_elem, subst);
+	}
 	case Type_Slice:
 		if (source->kind != Type_Slice) {
 			return Subst_NoMatch;
@@ -2422,10 +2437,15 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 		GB_ASSERT(b != nullptr && b->kind == PolyBind_Type);
 		return b->type;
 	}
-	case Type_Pointer:
-		return alloc_type_pointer(subst_apply(c, pattern->Pointer.elem, source->Pointer.elem, subst));
-	case Type_MultiPointer:
-		return alloc_type_multi_pointer(subst_apply(c, pattern->MultiPointer.elem, source->MultiPointer.elem, subst));
+	case Type_Pointer: {
+		// result keeps the pattern's pointer kind; source may be `^` or `[^]`
+		Type *src_elem = (source->kind == Type_MultiPointer) ? source->MultiPointer.elem : source->Pointer.elem;
+		return alloc_type_pointer(subst_apply(c, pattern->Pointer.elem, src_elem, subst));
+	}
+	case Type_MultiPointer: {
+		Type *src_elem = (source->kind == Type_Pointer) ? source->Pointer.elem : source->MultiPointer.elem;
+		return alloc_type_multi_pointer(subst_apply(c, pattern->MultiPointer.elem, src_elem, subst));
+	}
 	case Type_SoaPointer:
 		return alloc_type_soa_pointer(subst_apply(c, pattern->SoaPointer.elem, source->SoaPointer.elem, subst));
 	case Type_Slice:

From 48272ac2570b3619dae044193a5204c873d7e6e4 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 20:35:11 +0100
Subject: [PATCH 084/215] parapoly: Correct #sparse enumerated array support

---
 src/check_type.cpp | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index 3a63330cf..1fda6dc81 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -2266,8 +2266,9 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			return Subst_NoMatch;
 		}
 		if (pattern->EnumeratedArray.op || source->EnumeratedArray.op) {
-			return Subst_Unhandled; // sparse/range form, defer to the mutator
+			return Subst_Unhandled; // range (`op`) form: currently never constructed; defer if it ever is
 		}
+		// `#sparse` arrays flow through here and are handled; is_sparse is carried in subst_apply.
 		SubstResult ir = subst_unify(c, pattern->EnumeratedArray.index, source->EnumeratedArray.index, subst);
 		if (ir != Subst_Matched) {
 			return ir;
@@ -2489,9 +2490,11 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 	case Type_EnumeratedArray: {
 		Type *elem  = subst_apply(c, pattern->EnumeratedArray.elem,  source->EnumeratedArray.elem,  subst);
 		Type *index = subst_apply(c, pattern->EnumeratedArray.index, source->EnumeratedArray.index, subst);
-		return alloc_type_enumerated_array(elem, index,
+		Type *r = alloc_type_enumerated_array(elem, index,
 			pattern->EnumeratedArray.min_value, pattern->EnumeratedArray.max_value,
 			pattern->EnumeratedArray.count, pattern->EnumeratedArray.op);
+		r->EnumeratedArray.is_sparse = pattern->EnumeratedArray.is_sparse; // alloc defaults this to false
+		return r;
 	}
 	case Type_Matrix: {
 		Type *elem = subst_apply(c, pattern->Matrix.elem, source->Matrix.elem, subst);

From 93a3312a293bcab2385aafac6b5328f8123765ed Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 20:49:28 +0100
Subject: [PATCH 085/215] Remove parapoly scaffolding and fix `map` internal
 generation

---
 src/check_expr.cpp |  5 ++++
 src/check_type.cpp | 63 +++++++++++++++++++++++++---------------------
 2 files changed, 40 insertions(+), 28 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 383c388f9..69006f3c1 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -1475,6 +1475,11 @@ gb_internal bool polymorphic_assign_index(Type **gt_, i64 *dst_count, i64 source
 	return false;
 }
 
+// In-place matcher: mutates `poly` to bind its polymorphic vars to `source`. This is no longer the
+// primary resolver (see the substitution engine in check_type.cpp). determine_type_from_polymorphic
+// uses it only as a fallback for the patterns the engine reports Subst_Unhandled for (genuine
+// subtyping, and the ^<->[^] case) and for the non-modify_type (no_polymorphic_errors) yes/no probe.
+// The probe keeps every kind here reachable, so these cases are not dead code.
 gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, Type *source, bool compound, bool modify_type) {
 	Operand o = {Addressing_Value};
 	o.type = source;
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 1fda6dc81..ba61fe8ca 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1848,18 +1848,19 @@ gb_internal bool check_type_specialization_to(CheckerContext *ctx, Type *special
 }
 
 
-// subst_unify matches a polymorphic pattern against a source PURELY (no node/entity mutation),
-// accumulating bindings; subst_apply reconstructs the instantiated type by CONSTRUCTION. Guarded by
-// PARAPOLY_VERIFY_SUBST, determine_type_from_polymorphic runs these alongside the existing in-place
-// mutation and asserts the two agree, proving the constructive path before anything relies on it.
-// Coverage is a slice (generic/basic/slice/dynamic-array/fixed [$N]$T); other kinds report
-// Subst_Unhandled and are skipped. No behavior change. This is refactor scaffolding: it runs a
-// second (constructive) match per instantiation, so set to 0 (or gate to debug) before release.
-#define PARAPOLY_VERIFY_SUBST 1
-// When 1, the substitution is authoritative for handled patterns: determine_type_from_polymorphic
-// binds the poly-scope entities from the PolySubst and returns the constructed type WITHOUT running
-// the in-place mutation. When 0, the mutation runs and the subst path only verifies against it.
-#define PARAPOLY_SUBST_AUTHORITATIVE 1
+// The substitution engine is the primary way a polymorphic parameter type is resolved:
+// `subst_unify` matches a pattern against a source PURELY (no node/entity mutation), accumulating
+// bindings; `subst_apply` reconstructs the instantiated type by CONSTRUCTION; `subst_bind_entities`
+// binds the poly-scope entities. `determine_type_from_polymorphic` uses them for every pattern the
+// engine reports `Subst_Matched` for. The in-place mutator `is_polymorphic_type_assignable` remains
+// only as a fallback for the patterns the engine leaves `Subst_Unhandled` (genuine subtyping, and the
+// `[^]<->^` handled-by-mutator case), and for the non-`modify_type` yes/no probe.
+//
+// PARAPOLY_DEBUG_VERIFY_SUBST is an off-by-default differential debug switch: it makes the old mutator
+// authoritative and asserts the engine agrees with it (constructed type + entity bindings) on every
+// instantiation. It compares types structurally via are_types_identical, so it CANNOT catch codegen
+// state the engine must still set up (e.g. a map's internal types); those need build+run tests.
+#define PARAPOLY_DEBUG_VERIFY_SUBST 0
 
 enum SubstResult : u8 {
 	Subst_Unhandled,
@@ -2467,6 +2468,7 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 		Type *m = alloc_type(Type_Map);
 		m->Map.key   = subst_apply(c, pattern->Map.key,   source->Map.key,   subst);
 		m->Map.value = subst_apply(c, pattern->Map.value, source->Map.value, subst);
+		init_map_internal_types(m); // the mutator does this; without it codegen hits a t_invalid
 		return m;
 	}
 	case Type_Array: {
@@ -2645,7 +2647,7 @@ gb_internal void subst_bind_entities(PolySubst *subst) {
 	}
 }
 
-#if PARAPOLY_VERIFY_SUBST
+#if PARAPOLY_DEBUG_VERIFY_SUBST
 // Read-only: assert that the in-place mutation bound each poly-scope entity to exactly what the
 // substitution captured. This is the entity-level analogue of the apply-reproduction check; once it
 // holds everywhere, entity binding can be driven from the PolySubst and the mutation removed.
@@ -2694,7 +2696,26 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 		return t_invalid;
 	}
 
-#if PARAPOLY_VERIFY_SUBST
+#if !PARAPOLY_DEBUG_VERIFY_SUBST
+	// Primary path: the substitution engine constructs the instantiation and binds the poly-scope
+	// entities. Patterns it reports Subst_Unhandled for fall through to the mutator fallback below.
+	if (modify_type) {
+		PolySubst subst = {};
+		subst.items.allocator = heap_allocator();
+		defer (array_free(&subst.items));
+		if (subst_unify(ctx, poly_type, operand.type, &subst) == Subst_Matched) {
+			Type *applied = subst_apply(ctx, poly_type, operand.type, &subst);
+			subst_bind_entities(&subst);
+			return applied;
+		}
+	}
+	// Fallback: the in-place mutator handles the deferred patterns (genuine subtyping) and the
+	// non-modify_type probe. A Subst_NoMatch also lands here and the mutator fails too -> error path.
+	if (is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
+		return poly_type;
+	}
+#else
+	// Debug differential: the mutator is authoritative and the engine is asserted to agree with it.
 	PolySubst verify_subst = {};
 	verify_subst.items.allocator = heap_allocator();
 	defer (array_free(&verify_subst.items));
@@ -2706,19 +2727,7 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 			verify_applied = subst_apply(ctx, poly_type, operand.type, &verify_subst);
 		}
 	}
-	#if PARAPOLY_SUBST_AUTHORITATIVE
-	if (verify_ur == Subst_Matched) {
-		// Substitution is authoritative: bind the poly-scope entities and return the constructed
-		// type; the in-place mutation is not run. (A handled NoMatch falls through and the mutation
-		// will also fail, reaching the error path.)
-		subst_bind_entities(&verify_subst);
-		return verify_applied;
-	}
-	#endif
-#endif
-
 	if (is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
-	#if PARAPOLY_VERIFY_SUBST && !PARAPOLY_SUBST_AUTHORITATIVE
 		if (verify_ur == Subst_Matched) {
 			GB_ASSERT_MSG(are_types_identical(verify_applied, poly_type),
 			              "parapoly subst mismatch: applied '%s' vs mutated '%s'",
@@ -2728,10 +2737,8 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 		} else if (verify_ur == Subst_NoMatch) {
 			GB_PANIC("parapoly subst reported NoMatch but in-place match succeeded (result '%s')", type_to_string(poly_type));
 		}
-	#endif
 		return poly_type;
 	}
-#if PARAPOLY_VERIFY_SUBST && !PARAPOLY_SUBST_AUTHORITATIVE
 	if (verify_ur == Subst_Matched) {
 		GB_PANIC("parapoly subst matched but in-place match failed");
 	}

From 374024fc734bd0f70019e9ac3cc20a8946cf5b7a Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Wed, 30 Sep 2026 13:15:45 -0400
Subject: [PATCH 086/215] Parse integer literals without allocating per digit
 and reject non digits in their exponent

---
 src/big_int.cpp                               | 27 ++++++-------------
 src/libtommath.cpp                            |  4 +++
 tests/issues/run.bat                          |  1 +
 tests/issues/run.sh                           |  7 +++++
 .../test_issue_integer_literal_exponent.odin  |  7 +++++
 5 files changed, 27 insertions(+), 19 deletions(-)
 create mode 100644 tests/issues/test_issue_integer_literal_exponent.odin

diff --git a/src/big_int.cpp b/src/big_int.cpp
index 9db4a8d55..36debb1e8 100644
--- a/src/big_int.cpp
+++ b/src/big_int.cpp
@@ -100,20 +100,15 @@ gb_internal void big_int_rem_eq(BigInt *dst, BigInt const *x);
 gb_internal bool big_int_is_neg(BigInt const *x);
 gb_internal void big_int_neg(BigInt *dst, BigInt const *x);
 
+// NOTE: libtommath allows the output to alias an input, so `dst` is not copied first
 gb_internal void big_int_add_eq(BigInt *dst, BigInt const *x) {
-	BigInt res = {};
-	big_int_init(&res, dst);
-	big_int_add(dst, &res, x);
+	big_int_add(dst, dst, x);
 }
 gb_internal void big_int_sub_eq(BigInt *dst, BigInt const *x) {
-	BigInt res = {};
-	big_int_init(&res, dst);
-	big_int_sub(dst, &res, x);
+	big_int_sub(dst, dst, x);
 }
 gb_internal void big_int_shl_eq(BigInt *dst, BigInt const *x) {
-	BigInt res = {};
-	big_int_init(&res, dst);
-	big_int_shl(dst, &res, x);
+	big_int_shl(dst, dst, x);
 }
 gb_internal void big_int_shr_eq(BigInt *dst, BigInt const *x) {
 	BigInt res = {};
@@ -121,9 +116,7 @@ gb_internal void big_int_shr_eq(BigInt *dst, BigInt const *x) {
 	big_int_shr(dst, &res, x);
 }
 gb_internal void big_int_mul_eq(BigInt *dst, BigInt const *x) {
-	BigInt res = {};
-	big_int_init(&res, dst);
-	big_int_mul(dst, &res, x);
+	big_int_mul(dst, dst, x);
 }
 gb_internal void big_int_quo_eq(BigInt *dst, BigInt const *x) {
 	BigInt res = {};
@@ -214,9 +207,6 @@ gb_internal void big_int_from_string(BigInt *dst, String const &s, bool *success
 
 	mp_zero(dst);
 
-	BigInt digit = {};
-	defer (big_int_dealloc(&digit));
-
 	isize i = 0;
 	isize digit_count = 0;
 	for (; i < len; i++) {
@@ -246,9 +236,8 @@ gb_internal void big_int_from_string(BigInt *dst, String const &s, bool *success
 			digit_count += 1;
 		}
 
-		big_int_from_u64(&digit, v);
-		big_int_mul_eq(dst, &b);
-		big_int_add_eq(dst, &digit);
+		mp_mul_d(dst, cast(mp_digit)base, dst);
+		mp_add_d(dst, cast(mp_digit)v, dst);
 	}
 	if (digit_count == 0) {
 		// a base prefix with only digit separators after it, `0x_`, has no digits at all
@@ -289,7 +278,7 @@ gb_internal void big_int_from_string(BigInt *dst, String const &s, bool *success
 				v = u64_digit_value(r);
 			} else {
 				*success = false;
-				break;
+				return;
 			}
 			exp *= 10;
 			exp += v;
diff --git a/src/libtommath.cpp b/src/libtommath.cpp
index c1e1cfe34..d43e9b22a 100644
--- a/src/libtommath.cpp
+++ b/src/libtommath.cpp
@@ -1,3 +1,7 @@
+// NOTE: the default is 32 digits (256 bytes), but nearly every constant fits in 64 bits and digits
+// grow when needed. 4 is the minimum of 3 digits rounded up to MP_CALLOC's 16-byte alignment.
+#define MP_DEFAULT_DIGIT_COUNT 4
+
 #include "libtommath/mp_2expt.c"
 #include "libtommath/mp_abs.c"
 #include "libtommath/mp_add.c"
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index dd101297e..c6e0c0c92 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -54,6 +54,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin check ..\test_issue_ellipsis_type_call.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b
 ..\..\..\odin check ..\test_issue_foreign_redeclaration.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_foreign_redeclaration_mismatch.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "1" || exit /b
+..\..\..\odin check ..\test_issue_integer_literal_exponent.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "1" || exit /b
 ..\..\..\odin doc ..\test_issue_asm_doc_category.odin -file 2>&1 | find /c "asm templates" | findstr /x "1" || exit /b
 ..\..\..\odin build ..\test_issue_7037.odin %COMMON% -o:none  || exit /b
 ..\..\..\odin test ..\test_issue_7421.odin %COMMON% || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 5508b07cf..f7c9d6faf 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -137,6 +137,13 @@ else
 	exit 1
 fi
 
+if [[ $($ODIN check ../test_issue_integer_literal_exponent.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 1 ]]; then
+	echo "SUCCESSFUL 1/1"
+else
+	echo "SUCCESSFUL 0/1"
+	exit 1
+fi
+
 # `asm` templates are amd64-only, so this file is empty on every other architecture
 if [[ "$(uname -m)" == "x86_64" || "$(uname -m)" == "amd64" ]]; then
 	if [[ $($ODIN doc ../test_issue_asm_doc_category.odin -file 2>&1 | grep -c "asm templates") -eq 1 ]]; then
diff --git a/tests/issues/test_issue_integer_literal_exponent.odin b/tests/issues/test_issue_integer_literal_exponent.odin
new file mode 100644
index 000000000..f1f6d4a4f
--- /dev/null
+++ b/tests/issues/test_issue_integer_literal_exponent.odin
@@ -0,0 +1,7 @@
+package test_issues
+
+// A character that is not a digit in the exponent of an integer literal used to be ignored, so `1e1f`
+// was accepted as 10.
+
+valid   :: 1e3
+invalid :: 1e1f // Error

From 9ba489ca07b6ce1aa2836dba6680936e6ca4dfea Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 21:04:47 +0100
Subject: [PATCH 087/215] Begin removing the older substitution code

---
 src/check_type.cpp | 87 +++++++++++++++++++++++++++++++++-------------
 1 file changed, 62 insertions(+), 25 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index ba61fe8ca..d44f7b6b2 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1,5 +1,6 @@
 gb_internal ParameterValue handle_parameter_value(CheckerContext *ctx, Type *in_type, Type **out_type_, Ast *expr, bool allow_caller_location);
 gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *poly_type, Operand const &operand);
+gb_internal bool subst_check_specialization(CheckerContext *ctx, Type *specialization, Type *type, bool modify_type);
 gb_internal Type *check_get_params(CheckerContext *ctx, Scope *scope, Ast *_params, bool *is_variadic_, isize *variadic_index_, bool *success_, isize *specialization_count_, Array<Operand> const *operands);
 gb_internal void populate_using_entity_scope(CheckerContext *ctx, Ast *node, AstField *field, Type *t, isize level);
 
@@ -521,7 +522,7 @@ gb_internal Type *check_record_polymorphic_params(CheckerContext *ctx, Ast *poly
 							*is_polymorphic_ = true;
 							can_check_fields = false;
 						} else if (specialization &&
-						           !check_type_specialization_to(ctx, specialization, operand.type, false, /*modify_type*/true, /*finalize*/false)) {
+						           !subst_check_specialization(ctx, specialization, operand.type, /*modify_type*/true)) {
 							if (!ctx->no_polymorphic_errors) {
 								gbString t = type_to_string(operand.type);
 								gbString s = type_to_string(specialization);
@@ -2647,6 +2648,35 @@ gb_internal void subst_bind_entities(PolySubst *subst) {
 	}
 }
 
+// Specialization-conformance check for a `$T: Constraint` record/proc parameter: does `type` conform
+// to `specialization`, binding the constraint's nested vars when modify_type? The engine short-circuits
+// a clean structural match (skipping the in-place matcher); everything else (bare templates, subtyping,
+// assignability, definite non-matches) is left to check_type_specialization_to, so behavior is
+// unchanged except that the common case no longer runs the mutator.
+gb_internal bool subst_check_specialization(CheckerContext *ctx, Type *specialization, Type *type, bool modify_type) {
+	if (type == nullptr || type == t_invalid) {
+		return true;
+	}
+	PolySubst sub = {};
+	sub.items.allocator = heap_allocator();
+	defer (array_free(&sub.items));
+	SubstResult ur = subst_unify(ctx, specialization, type, &sub);
+#if PARAPOLY_DEBUG_VERIFY_SUBST
+	// Debug: the old check is authoritative; assert the engine's short-circuit agrees with it.
+	bool old = check_type_specialization_to(ctx, specialization, type, false, modify_type, /*finalize*/false);
+	GB_ASSERT_MSG(ur != Subst_Matched || old, "subst_check_specialization: engine matched but check_type_specialization_to did not");
+	return old;
+#else
+	if (ur == Subst_Matched) {
+		if (modify_type) {
+			subst_bind_entities(&sub);
+		}
+		return true;
+	}
+	return check_type_specialization_to(ctx, specialization, type, false, modify_type, /*finalize*/false);
+#endif
+}
+
 #if PARAPOLY_DEBUG_VERIFY_SUBST
 // Read-only: assert that the in-place mutation bound each poly-scope entity to exactly what the
 // substitution captured. This is the entity-level analogue of the apply-reproduction check; once it
@@ -2697,43 +2727,50 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 	}
 
 #if !PARAPOLY_DEBUG_VERIFY_SUBST
-	// Primary path: the substitution engine constructs the instantiation and binds the poly-scope
-	// entities. Patterns it reports Subst_Unhandled for fall through to the mutator fallback below.
-	if (modify_type) {
+	// Primary path: the substitution engine both resolves (modify_type) and answers the yes/no probe
+	// (!modify_type). Only a Subst_Unhandled result falls to the in-place mutator, which now serves
+	// solely as the genuine-subtyping fallback. A Subst_NoMatch is a definite non-match, so the mutator
+	// is skipped (the debug build asserts that NoMatch invariant against the mutator).
+	{
 		PolySubst subst = {};
 		subst.items.allocator = heap_allocator();
 		defer (array_free(&subst.items));
-		if (subst_unify(ctx, poly_type, operand.type, &subst) == Subst_Matched) {
-			Type *applied = subst_apply(ctx, poly_type, operand.type, &subst);
-			subst_bind_entities(&subst);
-			return applied;
+		SubstResult ur = subst_unify(ctx, poly_type, operand.type, &subst);
+		if (ur == Subst_Matched) {
+			if (modify_type) {
+				Type *applied = subst_apply(ctx, poly_type, operand.type, &subst);
+				subst_bind_entities(&subst);
+				return applied;
+			}
+			return poly_type; // probe: matched, no construction/binding needed
+		}
+		if (ur == Subst_Unhandled &&
+		    is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
+			return poly_type;
 		}
-	}
-	// Fallback: the in-place mutator handles the deferred patterns (genuine subtyping) and the
-	// non-modify_type probe. A Subst_NoMatch also lands here and the mutator fails too -> error path.
-	if (is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
-		return poly_type;
 	}
 #else
 	// Debug differential: the mutator is authoritative and the engine is asserted to agree with it.
 	PolySubst verify_subst = {};
 	verify_subst.items.allocator = heap_allocator();
 	defer (array_free(&verify_subst.items));
-	SubstResult verify_ur = Subst_Unhandled;
+	// Run the engine for both modify_type and the probe, so the NoMatch-skips-the-mutator invariant the
+	// production path relies on is covered here too. Only construct/bind for modify_type.
+	SubstResult verify_ur = subst_unify(ctx, poly_type, operand.type, &verify_subst);
 	Type *verify_applied = nullptr;
-	if (modify_type) {
-		verify_ur = subst_unify(ctx, poly_type, operand.type, &verify_subst);
-		if (verify_ur == Subst_Matched) {
-			verify_applied = subst_apply(ctx, poly_type, operand.type, &verify_subst);
-		}
+	if (modify_type && verify_ur == Subst_Matched) {
+		verify_applied = subst_apply(ctx, poly_type, operand.type, &verify_subst);
 	}
 	if (is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
 		if (verify_ur == Subst_Matched) {
-			GB_ASSERT_MSG(are_types_identical(verify_applied, poly_type),
-			              "parapoly subst mismatch: applied '%s' vs mutated '%s'",
-			              type_to_string(verify_applied), type_to_string(poly_type));
-			subst_verify_entities(&verify_subst);
-			return verify_applied;
+			if (modify_type) {
+				GB_ASSERT_MSG(are_types_identical(verify_applied, poly_type),
+				              "parapoly subst mismatch: applied '%s' vs mutated '%s'",
+				              type_to_string(verify_applied), type_to_string(poly_type));
+				subst_verify_entities(&verify_subst);
+				return verify_applied;
+			}
+			return poly_type;
 		} else if (verify_ur == Subst_NoMatch) {
 			GB_PANIC("parapoly subst reported NoMatch but in-place match succeeded (result '%s')", type_to_string(poly_type));
 		}
@@ -3181,7 +3218,7 @@ gb_internal Type *check_get_params(CheckerContext *ctx, Scope *scope, Ast *_para
 					}
 					bool modify_type = !ctx->no_polymorphic_errors;
 
-					if (specialization != nullptr && !check_type_specialization_to(ctx, specialization, type, false, modify_type, /*finalize*/false)) {
+					if (specialization != nullptr && !subst_check_specialization(ctx, specialization, type, modify_type)) {
 						if (!ctx->no_polymorphic_errors) {
 							gbString t = type_to_string(type);
 							gbString s = type_to_string(specialization);

From cb11ea891c1559132893c0ae4c79ec6287e14a46 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 21:24:04 +0100
Subject: [PATCH 088/215] parapoly: Handle `using`/`#subtype` correctly on a
 constraint generic field

---
 src/check_type.cpp | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index d44f7b6b2..36c5c07ca 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -65,6 +65,10 @@ gb_internal void populate_using_entity_scope(CheckerContext *ctx, Ast *node, Ast
 	}
 	Type *original_type = t;
 	t = base_type(type_deref(t));
+	// Promote through a constrained generic (`$P/Spec`) using its specialization's member layout.
+	if (t->kind == Type_Generic && t->Generic.specialized != nullptr) {
+		t = base_type(t->Generic.specialized);
+	}
 
 	if (t->kind == Type_Struct) {
 		for (Entity *f : t->Struct.fields) {
@@ -100,6 +104,11 @@ gb_internal void populate_using_entity_scope(CheckerContext *ctx, Ast *node, Ast
 
 gb_internal bool does_field_type_allow_using(Type *t) {
 	t = base_type(t);
+	// A constrained generic field (`$P/Spec`) carries its member layout in the specialization, so
+	// `using`/`#subtype` can promote through it even though the generic itself is not yet concrete.
+	if (t->kind == Type_Generic && t->Generic.specialized != nullptr) {
+		t = base_type(t->Generic.specialized);
+	}
 	if (is_type_struct(t)) {
 		return true;
 	} else if (is_type_array(t)) {

From 255b3da8b5b91abcf4c8e5c637d03dffc438836c Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 21:58:47 +0100
Subject: [PATCH 089/215] parapoly: match `$T/Constraint` through the subst
 engine

---
 src/check_expr.cpp | 15 ++++++++++-----
 src/check_type.cpp | 43 +++++++++++++++++++++++++++++++++----------
 2 files changed, 43 insertions(+), 15 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 69006f3c1..305e3fa68 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -1475,11 +1475,16 @@ gb_internal bool polymorphic_assign_index(Type **gt_, i64 *dst_count, i64 source
 	return false;
 }
 
-// In-place matcher: mutates `poly` to bind its polymorphic vars to `source`. This is no longer the
-// primary resolver (see the substitution engine in check_type.cpp). determine_type_from_polymorphic
-// uses it only as a fallback for the patterns the engine reports Subst_Unhandled for (genuine
-// subtyping, and the ^<->[^] case) and for the non-modify_type (no_polymorphic_errors) yes/no probe.
-// The probe keeps every kind here reachable, so these cases are not dead code.
+// In-place matcher: mutates `poly` to bind its polymorphic vars to `source`. This is NOT the primary
+// resolver — the substitution engine in check_type.cpp handles determine_type_from_polymorphic (both
+// the resolve and the probe) and spec-conformance (subst_check_specialization / subst_unify_constraint),
+// and as of the constraint fix it covers those completely: instrumentation shows this matcher produces
+// no successful result in either path across the stdlib. It is still genuinely reached from:
+//   * check_distance_between_types (assignability scoring for overload resolution),
+//   * the type_is_specialization_of intrinsic (via check_type_specialization_to),
+//   * and as the never-succeeding Subst_Unhandled fallback of the two paths above (genuine subtyping and
+//     untyped/conversion cases the engine defers rather than resolves).
+// Deleting it outright would require reimplementing subtyping and conversion matching in the engine.
 gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, Type *source, bool compound, bool modify_type) {
 	Operand o = {Addressing_Value};
 	o.type = source;
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 36c5c07ca..78da710c5 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1953,6 +1953,34 @@ gb_internal bool subst_source_is_template_instance(Type *source, Type *spec) {
 	return false;
 }
 
+gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *source, PolySubst *subst);
+
+// Match a constraint `spec` against `source` (does `$T/spec` accept `source`?), binding spec's nested
+// vars. Mirrors check_type_specialization_to: bare template, record conformance (via the Named types),
+// an untyped source's default type, or a base-typed structural match for everything else — so unlike a
+// plain subst_unify it sees through named/distinct types (e.g. `[dynamic]$E` vs a `distinct [dynamic]V`).
+// Anything it cannot cleanly resolve (subtyping, untyped conversions, cross-kind) is deferred as
+// Subst_Unhandled to check_type_specialization_to.
+gb_internal SubstResult subst_unify_constraint(CheckerContext *c, Type *spec, Type *source, PolySubst *subst) {
+	if (source == nullptr || source == t_invalid) {
+		return Subst_Matched;
+	}
+	if (subst_source_is_template_instance(source, spec)) {
+		return Subst_Matched;
+	}
+	Type *sb = base_type(spec);
+	Type *tb = base_type(source);
+	SubstResult r;
+	if (is_type_untyped(tb)) {
+		r = subst_unify(c, spec, default_type(source), subst);
+	} else if (sb->kind == Type_Struct || sb->kind == Type_Union) {
+		r = subst_unify(c, spec, source, subst); // record conformance keeps the Named types (match params)
+	} else {
+		r = subst_unify(c, sb, tb, subst);        // general: base-typed structural match
+	}
+	return r == Subst_Matched ? Subst_Matched : Subst_Unhandled;
+}
+
 gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *source, PolySubst *subst) {
 	if (pattern == nullptr || source == nullptr) {
 		return Subst_Unhandled;
@@ -1965,15 +1993,10 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 		return Subst_NoMatch;
 	case Type_Generic:
 		if (pattern->Generic.specialized != nullptr) {
-			// Constrained generic `$T/S`: bind the nested vars of `S` against the source (e.g. `$U` in
-			// `$T/Stack($U)`, or `$T`/`$E` in `$P/proc($T)->$E`), then bind T. A bare template `$T/Stack`
-			// needs no nested binding, only that the source is an instantiation of it.
-			Type *spec = pattern->Generic.specialized;
-			if (!subst_source_is_template_instance(source, spec)) {
-				SubstResult r = subst_unify(c, spec, source, subst);
-				if (r != Subst_Matched) {
-					return Subst_Unhandled;
-				}
+			// Constrained generic `$T/S`: match the constraint (binding its nested vars, e.g. `$U` in
+			// `$T/Stack($U)` or `$T`/`$E` in `$P/proc($T)->$E`), then bind T.
+			if (subst_unify_constraint(c, pattern->Generic.specialized, source, subst) != Subst_Matched) {
+				return Subst_Unhandled;
 			}
 		}
 		if (poly_subst_bind_type(subst, poly_generic_entity(pattern), default_type(source))){
@@ -2669,7 +2692,7 @@ gb_internal bool subst_check_specialization(CheckerContext *ctx, Type *specializ
 	PolySubst sub = {};
 	sub.items.allocator = heap_allocator();
 	defer (array_free(&sub.items));
-	SubstResult ur = subst_unify(ctx, specialization, type, &sub);
+	SubstResult ur = subst_unify_constraint(ctx, specialization, type, &sub);
 #if PARAPOLY_DEBUG_VERIFY_SUBST
 	// Debug: the old check is authoritative; assert the engine's short-circuit agrees with it.
 	bool old = check_type_specialization_to(ctx, specialization, type, false, modify_type, /*finalize*/false);

From 12ba8a9d83757a26557274551f493409487660ff Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 22:06:38 +0100
Subject: [PATCH 090/215] parapoly: add regression tests and the concurrency
 stress harness

---
 tests/parapoly/test_parapoly.odin         | 133 ++++++++++
 tests/parapoly_concurrency/.gitignore     |   1 +
 tests/parapoly_concurrency/README.md      |  66 +++++
 tests/parapoly_concurrency/poly_stress.py | 301 ++++++++++++++++++++++
 4 files changed, 501 insertions(+)
 create mode 100644 tests/parapoly/test_parapoly.odin
 create mode 100644 tests/parapoly_concurrency/.gitignore
 create mode 100644 tests/parapoly_concurrency/README.md
 create mode 100644 tests/parapoly_concurrency/poly_stress.py

diff --git a/tests/parapoly/test_parapoly.odin b/tests/parapoly/test_parapoly.odin
new file mode 100644
index 000000000..f7c210a29
--- /dev/null
+++ b/tests/parapoly/test_parapoly.odin
@@ -0,0 +1,133 @@
+package test_parapoly
+
+// Regression tests for the parametric-polymorphism substitution engine. Each exercises a case that was
+// fixed or newly supported; several are run *through codegen* (not just type-checked) because the bugs
+// they guard against (e.g. a map's uninitialized internal types, a dropped #sparse flag) were invisible
+// to type-checking and only surfaced at code generation / runtime.
+//
+// This package is intentionally NOT part of the CI test set (tests/internal, tests/core, ...); run it
+// directly with:  odin test tests/parapoly
+
+import "core:testing"
+import "core:reflect"
+
+// --- helpers (package-level: polymorphic procs/types must be top-level) -----------------------------
+
+PP_Dir :: enum { N, E, S, W }
+PP_E   :: enum { A = 1, B = 3, C = 7 } // non-contiguous -> requires #sparse
+
+PP_Stack :: struct($T: typeid) { data: [dynamic]T }
+PP_Base  :: struct($T: typeid) { x: T }
+PP_Bar   :: struct($X: typeid) { v: X }
+PP_Foo   :: struct($T: typeid) { item: T }
+PP_DArr  :: distinct [dynamic]int
+
+pp_map_use :: proc(m: ^map[$K]$V, k: K, v: V) -> (V, bool, int) {
+	m[k] = v
+	r, ok := m[k]
+	return r, ok, len(m^)
+}
+pp_sparse :: proc(a: #sparse[PP_E]$T) -> (T, bool) {
+	info := type_info_of(type_of(a))
+	ea := info.variant.(reflect.Type_Info_Enumerated_Array)
+	return a[.C], ea.is_sparse
+}
+pp_union_first :: proc(u: union{$T, int}) -> T { v, _ := u.(T); return v }
+pp_union_pair  :: proc(u: union{$A, $B}) -> (typeid, typeid) { return A, B }
+pp_struct_sum  :: proc(s: struct{x: $T, y: T}) -> T { return s.x + s.y }
+pp_struct_grid :: proc(s: struct{cell: $T, row: [3]T, tbl: [2][2]T}) -> typeid { return T }
+pp_bitfield    :: proc(b: bit_field $T { a: u8 | 3, c: u8 | 5 }) -> u8 { return b.a + b.c }
+pp_grab        :: proc(a: [$N]$T) -> T { for v in a { return v }; z: T; return z }
+pp_ptr         :: proc(p: ^$T)  -> typeid { return T }
+pp_mp          :: proc(p: [^]$T) -> typeid { return T }
+pp_cg_proc     :: proc(f: $P/proc(_: $A) -> $R) -> (typeid, typeid) { return A, R }
+pp_cg_stack    :: proc(s: $T/PP_Stack($U)) -> typeid { return U }
+pp_cg_bare     :: proc(s: $T/PP_Stack) -> int { return len(s.data) }
+pp_cg_record   :: proc(f: PP_Foo($T/PP_Bar($U))) -> typeid { return U }
+pp_cg_distinct :: proc(a: $T/[dynamic]$E) -> typeid { return E }
+pp_using       :: proc(s: struct{ using b: $P/PP_Base($T), z: int }) -> T { return s.x }
+pp_ho          :: proc(a: int) -> bool { return a > 0 }
+
+// --- tests ------------------------------------------------------------------------------------------
+
+@test
+parapoly_poly_map :: proc(t: ^testing.T) { // guards the map codegen crash (init_map_internal_types)
+	m := make(map[string]int); defer delete(m)
+	r, ok, n := pp_map_use(&m, "a", 7)
+	testing.expect(t, r == 7 && ok && n == 1, "poly map insert/lookup/len")
+	m["b"] = 3
+	total := 0
+	for _, v in m { total += v }
+	testing.expect(t, total == 10, "poly map for-range")
+}
+
+@test
+parapoly_sparse_enum_array :: proc(t: ^testing.T) { // guards the dropped is_sparse
+	x: #sparse[PP_E]int
+	x[.C] = 42
+	v, is_sparse := pp_sparse(x)
+	testing.expect(t, v == 42, "sparse enum array indexing")
+	testing.expect(t, is_sparse, "resolved #sparse array keeps is_sparse")
+}
+
+@test
+parapoly_anon_union :: proc(t: ^testing.T) {
+	u: union{f32, int} = f32(2.5)
+	testing.expect(t, pp_union_first(u) == 2.5, "anon union $T inference + variant extract")
+	a, b := pp_union_pair(u)
+	testing.expect(t, a == f32 && b == int, "two-var anon union")
+}
+
+@test
+parapoly_anon_struct :: proc(t: ^testing.T) {
+	testing.expect(t, pp_struct_sum(struct{x: int, y: int}{3, 4}) == 7, "anon struct field poly + use")
+	g: struct{cell: u8, row: [3]u8, tbl: [2][2]u8}
+	testing.expect(t, pp_struct_grid(g) == u8, "anon struct reused var across nested compound")
+}
+
+@test
+parapoly_bit_field_backing :: proc(t: ^testing.T) {
+	x: bit_field u16 { a: u8 | 3, c: u8 | 5 }
+	x.a = 5; x.c = 9
+	testing.expect(t, pp_bitfield(x) == 14, "poly bit_field backing + field access")
+}
+
+@test
+parapoly_array_enum_ambiguity :: proc(t: ^testing.T) { // the [$N]$T fixed-vs-enumerated ambiguity
+	testing.expect(t, pp_grab([3]int{10, 20, 30}) == 10, "[$N]$T fixed array")
+	ea: [PP_Dir]int
+	ea[.N] = 7
+	testing.expect(t, pp_grab(ea) == 7, "[$N]$T enumerated array")
+}
+
+@test
+parapoly_ptr_multipointer :: proc(t: ^testing.T) {
+	x: int
+	arr: [4]int
+	m: [^]int = &arr[0]
+	testing.expect(t, pp_ptr(&x) == int, "^$T <- ^int")
+	testing.expect(t, pp_ptr(m)  == int, "^$T <- [^]int (cross-kind)")
+	testing.expect(t, pp_mp(m)   == int, "[^]$T <- [^]int")
+	testing.expect(t, pp_mp(&x)  == int, "[^]$T <- ^int (cross-kind)")
+}
+
+@test
+parapoly_constrained_generics :: proc(t: ^testing.T) {
+	a, r := pp_cg_proc(pp_ho)
+	testing.expect(t, a == int && r == bool, "$P/proc($A)->$R")
+	s: PP_Stack(f32)
+	testing.expect(t, pp_cg_stack(s) == f32, "$T/PP_Stack($U)")
+	s2: PP_Stack(u8)
+	testing.expect(t, pp_cg_bare(s2) == 0, "$T/PP_Stack bare-template constraint")
+	f: PP_Foo(PP_Bar(int))
+	testing.expect(t, pp_cg_record(f) == int, "PP_Foo($T/PP_Bar($U)) record-param constraint")
+	d: PP_DArr
+	testing.expect(t, pp_cg_distinct(d) == int, "$T/[dynamic]$E through a distinct type")
+}
+
+@test
+parapoly_using_constraint :: proc(t: ^testing.T) { // using on a constrained-generic field
+	v: struct{ using b: PP_Base(int), z: int }
+	v.x = 42
+	testing.expect(t, pp_using(v) == 42, "using $P/PP_Base($T) + promoted-member access")
+}
diff --git a/tests/parapoly_concurrency/.gitignore b/tests/parapoly_concurrency/.gitignore
new file mode 100644
index 000000000..e96b7d6ec
--- /dev/null
+++ b/tests/parapoly_concurrency/.gitignore
@@ -0,0 +1 @@
+_work/
diff --git a/tests/parapoly_concurrency/README.md b/tests/parapoly_concurrency/README.md
new file mode 100644
index 000000000..daace6558
--- /dev/null
+++ b/tests/parapoly_concurrency/README.md
@@ -0,0 +1,66 @@
+# Parametric-polymorphism concurrency harness
+
+`poly_stress.py` stress-tests the multithreaded checker's polymorphic instantiation paths and
+checks that they are deterministic across thread counts.
+
+The checker instantiates polymorphic procedures and records on a thread pool, mutating and
+caching shared `Type`/`Entity` nodes. That machinery is delicate, so this harness looks for:
+
+- **Deadlocks** — e.g. a cross-record ABBA on the per-record `gen_types` mutexes, hit when two
+  mutually-recursive generic records (`A(T)` referencing `^B(T)` and `B(T)` referencing `^A(T)`)
+  are instantiated concurrently.
+- **Crashes** — asserts, stack overflows, or data races on shared nodes.
+- **Nondeterminism** — duplicate or missing monomorphizations that leak into the emitted symbol
+  set (e.g. from a check-then-act race in a generated-entity cache).
+
+## How it works
+
+It generates a corpus of many polymorphic procedures and records — including many
+mutually-recursive generic pairs, each entered from both directions by different procedures so
+worker threads race on the two records' caches in crossing order. It builds the corpus with
+`-build-mode:llvm` (checker + IR only; fast, no linking), then compares a **single-threaded
+baseline** against many **multi-threaded** builds:
+
+- a per-run timeout is reported as a **deadlock**,
+- a nonzero exit as a **crash**,
+- a differing set of emitted `define` symbols as **nondeterminism**.
+
+The emitted `define` set is an order-independent fingerprint of the polymorphic *procedure*
+instantiations; procedures parameterized over the records surface record-instantiation
+differences there too.
+
+## Usage
+
+From this directory (adjust `--odin` to your built compiler):
+
+```sh
+# struct pairs (default), heavy run:
+python poly_stress.py all --odin ../../odin.exe --work ./_work \
+    --kind struct --pairs 300 --procs 200 --threads 32 --iters 25
+
+# union pairs:
+python poly_stress.py all --odin ../../odin.exe --work ./_work --kind union --pairs 50
+
+# specialization constraints ($V/Vec($T,$N)) — stresses the in-place memmove in
+# check_type_specialization_to_internal:
+python poly_stress.py all --odin ../../odin.exe --work ./_work --kind spec --pairs 120
+
+# generate a corpus once, then run against it repeatedly:
+python poly_stress.py gen --out ./_work/corpus --kind struct --pairs 300
+python poly_stress.py run --odin ../../odin.exe --corpus ./_work/corpus --work ./_work
+```
+
+`--work` is a scratch directory for the generated corpus and the emitted `.ll` output; it can be
+deleted between runs.
+
+Exit code is `0` on pass, `1` on a deadlock/crash/nondeterminism, `2` if the baseline itself
+fails to build.
+
+## Notes
+
+- `--kind union` currently exercises mutually-recursive generic *unions*, which reproduce a
+  pre-existing compile-time stack overflow (unions lack the "variants ready" wait-signal that
+  lets the struct version terminate its recursion through the instantiation cache). Use it to
+  validate a fix for that.
+- Increase `--pairs`, `--threads`, `--width`, and `--iters` to widen the race window and raise
+  the chance of catching a rare interleaving.
diff --git a/tests/parapoly_concurrency/poly_stress.py b/tests/parapoly_concurrency/poly_stress.py
new file mode 100644
index 000000000..564967b0c
--- /dev/null
+++ b/tests/parapoly_concurrency/poly_stress.py
@@ -0,0 +1,301 @@
+#!/usr/bin/env python3
+"""
+Parametric-polymorphism concurrency stress / determinism harness for the Odin compiler.
+
+The checker instantiates polymorphic procedures and records on a thread pool. This harness
+exercises those paths hard enough to surface:
+
+  * DEADLOCKS   - e.g. a cross-record ABBA on the per-record gen_types mutexes, hit by two
+                  mutually-recursive generic records instantiated concurrently (A(T) has a
+                  ^B(T) field/variant and B(T) has a ^A(T) one).
+  * CRASHES     - asserts / stack overflows / data races on shared Type or Entity nodes.
+  * NONDETERMINISM - duplicate or missing monomorphizations that leak into the emitted symbol
+                  set (e.g. from a check-then-act race in a gen cache).
+
+Method: generate a corpus that instantiates many polymorphic procedures and records, including
+many mutually-recursive generic record pairs entered from both directions concurrently, build it
+with -build-mode:llvm (checker + IR only, fast, no linking), and compare a single-threaded
+baseline against many multi-threaded builds. A per-run timeout is treated as a deadlock, a
+nonzero exit as a crash, and a differing set of emitted `define` symbols as nondeterminism.
+
+Examples
+--------
+    # struct pairs (the default), heavy:
+    python poly_stress.py all --odin ../../odin.exe --work ./_work \
+        --kind struct --pairs 300 --procs 200 --threads 32 --iters 25
+
+    # union pairs (currently reproduces a pre-existing mutual-recursion crash):
+    python poly_stress.py all --odin ../../odin.exe --work ./_work --kind union --pairs 50
+
+    # generate once, then run repeatedly:
+    python poly_stress.py gen --out ./_work/corpus --kind struct --pairs 300
+    python poly_stress.py run --odin ../../odin.exe --corpus ./_work/corpus --work ./_work
+"""
+
+import argparse
+import os
+import re
+import shutil
+import subprocess
+import sys
+import time
+
+DEFINE_RE = re.compile(r'^define\b.*?(@"[^"]+"|@[\w.$]+)', re.MULTILINE)
+TYPES = ["int", "u8", "u16", "u32", "i64", "f32", "f64", "uintptr"]
+
+
+def _recursive_pair(kind, i, width):
+    """Emit a mutually-recursive generic record pair A_i(T) <-> B_i(T)."""
+    if kind == "struct":
+        fa = "".join(f"  f{j}: Box({TYPES[j % len(TYPES)]}),\n" for j in range(width))
+        fb = "".join(f"  g{j}: Box({TYPES[(j + 1) % len(TYPES)]}),\n" for j in range(width))
+        return [
+            f"Node_A_{i} :: struct($T: typeid) {{\n  val: T,\n{fa}  other: ^Node_B_{i}(T),\n}}",
+            f"Node_B_{i} :: struct($T: typeid) {{\n  val: T,\n{fb}  other: ^Node_A_{i}(T),\n}}",
+        ]
+    # union: extra Box variants widen the "holding A, acquiring B" window
+    va = "".join(f" Box({TYPES[j % len(TYPES)]})," for j in range(width))
+    vb = "".join(f" Box({TYPES[(j + 1) % len(TYPES)]})," for j in range(width))
+    return [
+        f"Node_A_{i} :: union($T: typeid) {{ T,{va} ^Node_B_{i}(T) }}",
+        f"Node_B_{i} :: union($T: typeid) {{ T,{vb} ^Node_A_{i}(T) }}",
+    ]
+
+
+def _use_procs(kind, i, ty):
+    """Procs entering the pair from opposite directions with the same type arg.
+    Returns a list of (name, body) pairs. The two `use_*` procs trigger the
+    concurrent instantiation (ABBA bait). For unions the `read_*` procs additionally
+    perform variant operations (assign / type-switch / type-assert) that read the
+    in-progress union's variants, exercising the variants_wait_signal."""
+    if kind == "struct":
+        return [
+            (f"use_a_{i}", f"x: Node_A_{i}({ty}); x.val = 0; _ = x"),
+            (f"use_b_{i}", f"y: Node_B_{i}({ty}); y.val = 0; _ = y"),
+        ]
+    read = (
+        f"x = {ty}(0)\n"
+        f"  #partial switch v in x {{ case {ty}: _ = v }}\n"
+        f"  if v, ok := x.({ty}); ok {{ _ = v }}"
+    )
+    return [
+        (f"use_a_{i}", f"x: Node_A_{i}({ty}); _ = x"),
+        (f"use_b_{i}", f"y: Node_B_{i}({ty}); _ = y"),
+        (f"read_a_{i}", f"x: Node_A_{i}({ty})\n  {read}"),
+        (f"read_b_{i}", f"x: Node_B_{i}({ty})\n  {read}"),
+    ]
+
+
+def gen_corpus(out_dir, kind, pairs, procs, width):
+    os.makedirs(out_dir, exist_ok=True)
+    for f in os.listdir(out_dir):
+        if f.endswith(".odin"):
+            os.remove(os.path.join(out_dir, f))
+
+    if kind == "spec":
+        _write(out_dir, _spec_lines(pairs, procs))
+        print(f"[gen] spec: {pairs} specialized record families, {procs} caller procs")
+        print(f"[gen] -> {os.path.join(out_dir, 'corpus.odin')}")
+        return
+
+    L = ["package corpus\n"]
+
+    # standalone polymorphic procedures
+    L += [
+        "p_id  :: proc(x: $T) -> T { return x }",
+        "p_sum :: proc(a: [$N]$T) -> T { t: T; for v in a { t += v }; return t }",
+        "p_len :: proc(m: map[$K]$V) -> int { return len(m) }",
+        "p_arr :: proc($T: typeid, $N: int) -> [N]T { a: [N]T; return a }",
+        "",
+        # simple polymorphic records
+        "Box   :: struct($T: typeid) { value: T }",
+        "Pair  :: struct($A: typeid, $B: typeid) { first: A, second: B }",
+        "Fixed :: struct($T: typeid, $N: int) { data: [N]T }",
+        "",
+    ]
+
+    # mutually-recursive generic record pairs (ABBA bait)
+    for i in range(pairs):
+        L += _recursive_pair(kind, i, width)
+    L.append("")
+
+    calls = []
+    for i in range(pairs):
+        for name, body in _use_procs(kind, i, TYPES[i % len(TYPES)]):
+            L.append(f"{name} :: proc() {{\n  {body}\n}}")
+            calls.append(f"{name}()")
+
+    # extra generic-proc/record instantiation churn
+    for p in range(procs):
+        ty = TYPES[p % len(TYPES)]
+        n = (p % 6) + 1
+        body = "\n".join([
+            f"  _ = p_id({ty}(0))",
+            f"  _ = p_sum([{n}]{ty}{{}})",
+            f"  b: Box({ty}); _ = b",
+            f"  pr: Pair({ty}, {TYPES[(p + 1) % len(TYPES)]}); _ = pr",
+            f"  fx: Fixed({ty}, {n}); _ = fx",
+        ])
+        L.append(f"work_{p} :: proc() {{\n{body}\n}}")
+        calls.append(f"work_{p}()")
+
+    L.append("main :: proc() {")
+    L += [f"  {c}" for c in calls]
+    L.append("}")
+
+    _write(out_dir, L)
+    print(f"[gen] {kind}: {pairs} recursive pairs, {procs} churn procs, width={width}")
+    print(f"[gen] -> {os.path.join(out_dir, 'corpus.odin')}")
+
+
+def _write(out_dir, lines):
+    with open(os.path.join(out_dir, "corpus.odin"), "w", newline="\n") as fh:
+        fh.write("\n".join(lines) + "\n")
+
+
+def _spec_lines(recs, procs):
+    """Specialization-constraint corpus: stresses the in-place memmove in
+    check_type_specialization_to_internal (constraint `$V/Vec($T,$N)` matching)."""
+    L = ["package corpus\n"]
+    for j in range(recs):
+        L.append(f"Vec_{j}  :: struct($T: typeid, $N: int) {{ data: [N]T }}")
+    for j in range(recs):
+        L.append(f"Wrap_{j} :: struct($T: typeid, $N: int) {{ inner: Vec_{j}(T, N), tag: int }}")
+    L.append("")
+    for j in range(recs):
+        L.append(f"use_{j}  :: proc(v: $V/Vec_{j}($T, $N)) -> T {{ t: T; for i in 0..<N {{ t += v.data[i] }}; return t }}")
+        L.append(f"wuse_{j} :: proc(w: $W/Wrap_{j}($T, $N)) -> T {{ return use_{j}(w.inner) }}")
+    L.append("")
+    calls = []
+    for p in range(procs):
+        j, ty, n = p % recs, TYPES[p % len(TYPES)], (p % 4) + 1
+        L.append(f"work_{p} :: proc() {{\n"
+                 f"  v: Vec_{j}({ty}, {n}); _ = use_{j}(v)\n"
+                 f"  w: Wrap_{j}({ty}, {n}); _ = wuse_{j}(w)\n}}")
+        calls.append(f"work_{p}()")
+    L.append("main :: proc() {")
+    L += [f"  {c}" for c in calls]
+    L.append("}")
+    return L
+
+
+def defines_of(ll_dir):
+    syms = set()
+    if not os.path.isdir(ll_dir):
+        return syms
+    for f in os.listdir(ll_dir):
+        if not f.endswith(".ll"):
+            continue
+        if f.startswith("runtime-") or f in ("builtin.ll", "sanitizer.ll"):
+            continue  # runtime modules are identical across runs, just noise
+        with open(os.path.join(ll_dir, f), "r", errors="replace") as fh:
+            for m in DEFINE_RE.finditer(fh.read()):
+                syms.add(m.group(1))
+    return syms
+
+
+def build_once(odin, corpus, out_dir, threads, timeout):
+    """Return (status, elapsed, defines); status in {ok, deadlock, crash}."""
+    if os.path.isdir(out_dir):
+        shutil.rmtree(out_dir, ignore_errors=True)
+    os.makedirs(out_dir, exist_ok=True)
+    cmd = [odin, "build", corpus, "-build-mode:llvm",
+           f"-thread-count:{threads}", "-out:" + out_dir]
+    t0 = time.time()
+    try:
+        p = subprocess.run(cmd, capture_output=True, text=True, timeout=timeout)
+    except subprocess.TimeoutExpired:
+        return "deadlock", time.time() - t0, set()
+    elapsed = time.time() - t0
+    if p.returncode != 0:
+        sys.stdout.write(p.stdout[-2000:])
+        sys.stderr.write(p.stderr[-2000:])
+        return "crash", elapsed, set()
+    return "ok", elapsed, defines_of(out_dir)
+
+
+def run(odin, corpus, work, threads, iters, timeout):
+    print("[run] baseline build (thread-count:1) ...")
+    status, elapsed, base = build_once(odin, corpus, os.path.join(work, "ll_base"), 1, timeout)
+    if status != "ok":
+        print(f"[FAIL] baseline build failed: {status} ({elapsed:.1f}s)")
+        return 2
+    print(f"[run] baseline ok in {elapsed:.2f}s, {len(base)} poly define symbols")
+
+    fails = 0
+    flaky = 0
+    for i in range(iters):
+        d = os.path.join(work, f"ll_mt_{i}")
+        status, elapsed, syms = build_once(odin, corpus, d, threads, timeout)
+        tag = f"[{i + 1}/{iters}] threads={threads}"
+        # A timeout or nonzero exit can be transient system load (a starved build hitting the wall
+        # clock), not a real hang/crash. A genuine deadlock/crash reproduces deterministically, so
+        # retry once: if the retry is clean, treat it as a load artifact rather than a failure.
+        if status in ("deadlock", "crash"):
+            r = os.path.join(work, f"ll_mt_{i}_retry")
+            status, elapsed, syms = build_once(odin, corpus, r, threads, timeout)
+            if status == "ok" and syms == base:
+                print(f"{tag}: transient (cleared on retry, likely system load) — not counted")
+                flaky += 1
+                shutil.rmtree(r, ignore_errors=True)
+                continue
+        if status == "deadlock":
+            print(f"{tag}: DEADLOCK (timed out after {timeout}s, twice) <<<"); fails += 1; continue
+        if status == "crash":
+            print(f"{tag}: CRASH (nonzero exit, twice) <<<"); fails += 1; continue
+        if syms != base:
+            print(f"{tag}: NONDETERMINISTIC symbol set (+{len(syms - base)} / -{len(base - syms)}) <<<")
+            miss, extra = sorted(base - syms)[:5], sorted(syms - base)[:5]
+            if miss:
+                print(f"        missing vs baseline: {miss}")
+            if extra:
+                print(f"        extra vs baseline:   {extra}")
+            fails += 1
+            continue
+        print(f"{tag}: ok ({elapsed:.2f}s, {len(syms)} syms)")
+        shutil.rmtree(d, ignore_errors=True)
+
+    print("-" * 60)
+    flaky_note = f" ({flaky} transient, cleared on retry)" if flaky else ""
+    if fails == 0:
+        print(f"[PASS] {iters}/{iters} multi-threaded runs matched baseline, no hang/crash.{flaky_note}")
+        return 0
+    print(f"[FAIL] {fails}/{iters} runs had a reproducible deadlock/crash/nondeterminism.{flaky_note}")
+    return 1
+
+
+def main():
+    ap = argparse.ArgumentParser(description=__doc__, formatter_class=argparse.RawDescriptionHelpFormatter)
+    sub = ap.add_subparsers(dest="cmd", required=True)
+
+    def add_gen_args(p):
+        p.add_argument("--kind", choices=("struct", "union", "spec"), default="struct")
+        p.add_argument("--pairs", type=int, default=300)
+        p.add_argument("--procs", type=int, default=200)
+        p.add_argument("--width", type=int, default=3)
+
+    def add_run_args(p):
+        p.add_argument("--threads", type=int, default=16)
+        p.add_argument("--iters", type=int, default=20)
+        p.add_argument("--timeout", type=int, default=60)
+
+    g = sub.add_parser("gen"); g.add_argument("--out", required=True); add_gen_args(g)
+    r = sub.add_parser("run")
+    r.add_argument("--odin", required=True); r.add_argument("--corpus", required=True)
+    r.add_argument("--work", required=True); add_run_args(r)
+    a = sub.add_parser("all")
+    a.add_argument("--odin", required=True); a.add_argument("--work", required=True)
+    add_gen_args(a); add_run_args(a)
+
+    args = ap.parse_args()
+    if args.cmd == "gen":
+        gen_corpus(args.out, args.kind, args.pairs, args.procs, args.width); return 0
+    if args.cmd == "run":
+        return run(args.odin, args.corpus, args.work, args.threads, args.iters, args.timeout)
+    corpus = os.path.join(args.work, "corpus")
+    gen_corpus(corpus, args.kind, args.pairs, args.procs, args.width)
+    return run(args.odin, corpus, args.work, args.threads, args.iters, args.timeout)
+
+
+if __name__ == "__main__":
+    sys.exit(main())

From bbb2cf19a2f4510979b7f60f9fb9ef5347690f77 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 23:00:17 +0100
Subject: [PATCH 091/215] Begin work on deferring untyped compound literals in
 polymorphic call contexts

---
 src/check_expr.cpp | 86 +++++++++++++++++++++++++++++++++++++++++++---
 src/checker.hpp    |  1 +
 src/error.cpp      | 28 +++++++++++++++
 3 files changed, 110 insertions(+), 5 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 305e3fa68..a2d052448 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -6686,6 +6686,10 @@ enum UnpackFlag : u32 {
 	UnpackFlag_None       = 0,
 	UnpackFlag_AllowOk    = 1<<0,
 	UnpackFlag_AllowUndef = 1<<1,
+	// For calls to polymorphic procedures: a bare `{...}` argument with no concrete type hint is left
+	// unchecked as a deferred operand instead of erroring, to be resolved once the poly parameter's
+	// type is known (see materialize_deferred_compound_lit).
+	UnpackFlag_DeferUntypedCompoundLit = 1<<2,
 };
 
 
@@ -6756,7 +6760,18 @@ gb_internal bool check_unpack_arguments(CheckerContext *ctx, Entity **lhs, isize
 		}
 
 		Ast *rhs_expr = unparen_expr(rhs);
-		if (allow_undef && rhs_expr != nullptr && rhs_expr->kind == Ast_Uninit) {
+		bool defer_untyped_compound_lit =
+			(flags & UnpackFlag_DeferUntypedCompoundLit) != 0 &&
+			rhs_expr != nullptr && rhs_expr->kind == Ast_CompoundLit && rhs_expr->CompoundLit.type == nullptr &&
+			(type_hint == nullptr || is_type_polymorphic(type_hint));
+		if (defer_untyped_compound_lit) {
+			// NOTE: Leave the literal unchecked; its type comes from the resolved poly parameter later.
+			// Kept as an "invalid" operand so polymorphic determination treats it as carrying no info.
+			o.mode = Addressing_Invalid;
+			o.type = t_invalid;
+			o.expr = rhs;
+			o.deferred_compound_lit = true;
+		} else if (allow_undef && rhs_expr != nullptr && rhs_expr->kind == Ast_Uninit) {
 			// NOTE(bill): Just handle this very specific logic here
 			o.type = t_untyped_uninit;
 			o.mode = Addressing_Value;
@@ -6891,6 +6906,39 @@ gb_internal isize lookup_procedure_parameter(Type *type, String const &parameter
 	return lookup_procedure_parameter(&type->Proc, parameter_name);
 }
 
+// Resolve a deferred untyped compound-literal argument now that its parameter type is known.
+// `param_type` is the concrete (post-substitution) parameter/element type for the slot. On success the
+// operand is checked against it as if it had been written with that type; on failure it is marked
+// invalid. When !show_error the check is muted (trial scoring of a procedure-group candidate) but its
+// failure is still recorded, so the candidate can be rejected without printing anything.
+gb_internal void materialize_deferred_compound_lit(CheckerContext *c, Operand *o, Type *param_type, bool show_error) {
+	GB_ASSERT(o->deferred_compound_lit);
+	o->deferred_compound_lit = false;
+	Ast *lit = o->expr;
+
+	if (param_type == nullptr || param_type == t_invalid || is_type_polymorphic(param_type)) {
+		// The slot's type could not be determined from the other arguments, so the literal is genuinely
+		// untypable here (e.g. `proc(e: $E)` called with a bare `{...}`). Leave it invalid; polymorphic
+		// determination has already reported why the type could not be resolved.
+		o->mode = Addressing_Invalid;
+		o->type = t_invalid;
+		return;
+	}
+
+	if (show_error) {
+		check_expr_base(c, o, lit, param_type);
+	} else {
+		i64 muted_before = error_mute_count();
+		begin_error_mute();
+		check_expr_base(c, o, lit, param_type);
+		end_error_mute();
+		if (error_mute_count() != muted_before) {
+			o->mode = Addressing_Invalid;
+			o->type = t_invalid;
+		}
+	}
+}
+
 gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, Ast *call,
 	Entity *entity, Type *proc_type,
 	Array<Operand> positional_operands, Array<Operand> const &named_operands,
@@ -7232,6 +7280,9 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 
 		for (isize i = 0; i < pt->param_count; i++) {
 			Operand *o = &ordered_operands[i];
+			if (o->deferred_compound_lit) {
+				materialize_deferred_compound_lit(c, o, pt->params->Tuple.variables[i]->type, show_error);
+			}
 			if (o->mode == Addressing_Invalid) {
 				continue;
 			}
@@ -7280,6 +7331,14 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 
 		for_array(operand_index, variadic_operands) {
 			Operand *o = &variadic_operands[operand_index];
+			Operand deferred_local;
+			if (o->deferred_compound_lit) {
+				// `variadic_operands` aliases the shared operand buffer reused across candidates, so
+				// resolve into a local copy rather than mutating it in place.
+				deferred_local = *o;
+				materialize_deferred_compound_lit(c, &deferred_local, vari_expand ? slice : elem, show_error);
+				o = &deferred_local;
+			}
 			if (vari_expand) {
 				t = slice;
 				if (operand_index > 0) {
@@ -8391,13 +8450,17 @@ gb_internal CallArgumentData check_call_arguments(CheckerContext *c, Operand *op
 		Entity **lhs =  nullptr;
 		isize lhs_count = -1;
 		i32 variadic_index = -1;
+		UnpackFlags unpack_flags = UnpackFlag_None;
 		if (pt != nullptr)  {
 			lhs = populate_proc_parameter_list(c, proc_type, &lhs_count);
 			if (pt->variadic) {
 				variadic_index = pt->variadic_index;
 			}
+			if (pt->is_polymorphic) {
+				unpack_flags |= UnpackFlag_DeferUntypedCompoundLit;
+			}
 		}
-		check_unpack_arguments(c, lhs, lhs_count, &positional_operands, positional_args, UnpackFlag_None, variadic_index);
+		check_unpack_arguments(c, lhs, lhs_count, &positional_operands, positional_args, unpack_flags, variadic_index);
 	}
 
 	if (named_args.count > 0) {
@@ -8426,9 +8489,22 @@ gb_internal CallArgumentData check_call_arguments(CheckerContext *c, Operand *op
 			}
 
 			Operand o = {};
-			check_expr_with_type_hint(c, &o, value, type_hint);
-			if (o.mode == Addressing_Invalid) {
-				any_failure = true;
+			Ast *value_expr = unparen_expr(value);
+			bool defer_untyped_compound_lit =
+				pt != nullptr && pt->is_polymorphic &&
+				value_expr != nullptr && value_expr->kind == Ast_CompoundLit && value_expr->CompoundLit.type == nullptr &&
+				(type_hint == nullptr || is_type_polymorphic(type_hint));
+			if (defer_untyped_compound_lit) {
+				// Mirror the positional path: resolve the literal from the poly parameter's type later.
+				o.mode = Addressing_Invalid;
+				o.type = t_invalid;
+				o.expr = value;
+				o.deferred_compound_lit = true;
+			} else {
+				check_expr_with_type_hint(c, &o, value, type_hint);
+				if (o.mode == Addressing_Invalid) {
+					any_failure = true;
+				}
 			}
 			array_add(&named_operands, o);
 		}
diff --git a/src/checker.hpp b/src/checker.hpp
index 81bcc8e25..9781e4c82 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -85,6 +85,7 @@ struct Operand {
 	Ast *      expr;
 	BuiltinProcId  builtin_id;
 	Entity *       proc_group;
+	bool           deferred_compound_lit; // untyped `{...}` arg whose type is resolved from a poly param later
 };
 
 
diff --git a/src/error.cpp b/src/error.cpp
index 277081459..3f7cb4aae 100644
--- a/src/error.cpp
+++ b/src/error.cpp
@@ -27,6 +27,26 @@ struct ErrorCollector {
 
 gb_global ErrorCollector global_error_collector;
 
+// Scoped, per-thread error muting. While muted, error/warning emission is suppressed but still
+// *counted*, so a caller can trial-check something (e.g. one branch of a procedure group) and learn
+// whether it would have failed without printing anything. Muting nests.
+gb_thread_local i32 global_error_mute_depth = 0;
+gb_thread_local i64 global_error_mute_count = 0;
+
+gb_internal void begin_error_mute(void) {
+	global_error_mute_depth += 1;
+}
+gb_internal void end_error_mute(void) {
+	GB_ASSERT(global_error_mute_depth > 0);
+	global_error_mute_depth -= 1;
+}
+gb_internal i64 error_mute_count(void) {
+	return global_error_mute_count;
+}
+gb_internal bool is_error_muted(void) {
+	return global_error_mute_depth > 0;
+}
+
 
 gb_internal void push_error_value(TokenPos const &pos, ErrorValueKind kind = ErrorValue_Error) {
 	GB_ASSERT_MSG(global_error_collector.curr_error_value_set.load() == false, "Possible race condition in error handling system, please report this with an issue");
@@ -542,6 +562,10 @@ gb_internal void error_out_coloured(char const *str, TerminalStyle style, Termin
 
 
 gb_internal void error_va(TokenPos const &pos, TokenPos end, char const *fmt, va_list va) {
+	if (global_error_mute_depth > 0) {
+		global_error_mute_count += 1;
+		return;
+	}
 	global_error_collector.count.fetch_add(1);
 	mutex_lock(&global_error_collector.mutex);
 	if (global_error_collector.count > MAX_ERROR_COLLECTOR_COUNT()) {
@@ -579,6 +603,10 @@ gb_internal void warning_va(TokenPos const &pos, TokenPos end, char const *fmt,
 	if (global_ignore_warnings()) {
 		return;
 	}
+	if (global_error_mute_depth > 0) {
+		global_error_mute_count += 1;
+		return;
+	}
 
 	global_error_collector.warning_count.fetch_add(1);
 	mutex_lock(&global_error_collector.mutex);

From a79cce3945f04cfce3ca8c65da8e8ae0674db5bd Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 23:05:58 +0100
Subject: [PATCH 092/215] parapoly: Fix more cases of untyped expressions

---
 src/check_expr.cpp | 72 +++++++++++++++++++++++++++-------------------
 src/checker.hpp    |  2 +-
 2 files changed, 44 insertions(+), 30 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index a2d052448..52a06bb9a 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -4418,6 +4418,21 @@ gb_internal bool is_ise_expr(Ast *node) {
 	return node->kind == Ast_ImplicitSelectorExpr;
 }
 
+// An argument expression that cannot be typed on its own and needs a target type. When passed to a
+// polymorphic parameter whose type is only known after substitution, it is deferred and resolved once
+// that type is determined (see materialize_deferred_untyped_arg).
+gb_internal bool arg_is_deferrable_untyped_expr(Ast *node) {
+	node = unparen_expr(node);
+	if (node == nullptr) {
+		return false;
+	}
+	switch (node->kind) {
+	case Ast_CompoundLit:          return node->CompoundLit.type == nullptr;
+	case Ast_ImplicitSelectorExpr: return true;
+	}
+	return false;
+}
+
 gb_internal bool can_use_other_type_as_type_hint(bool use_lhs_as_type_hint, Type *other_type) {
 	if (use_lhs_as_type_hint) { // RHS in this case
 		return other_type != nullptr && other_type != t_invalid && is_type_typed(other_type);
@@ -6686,10 +6701,10 @@ enum UnpackFlag : u32 {
 	UnpackFlag_None       = 0,
 	UnpackFlag_AllowOk    = 1<<0,
 	UnpackFlag_AllowUndef = 1<<1,
-	// For calls to polymorphic procedures: a bare `{...}` argument with no concrete type hint is left
-	// unchecked as a deferred operand instead of erroring, to be resolved once the poly parameter's
-	// type is known (see materialize_deferred_compound_lit).
-	UnpackFlag_DeferUntypedCompoundLit = 1<<2,
+	// For calls to polymorphic procedures: an argument that needs a target type (`{...}`, `.Member`)
+	// with no concrete type hint is left unchecked as a deferred operand instead of erroring, to be
+	// resolved once the poly parameter's type is known (see materialize_deferred_untyped_arg).
+	UnpackFlag_DeferUntypedArg = 1<<2,
 };
 
 
@@ -6760,17 +6775,17 @@ gb_internal bool check_unpack_arguments(CheckerContext *ctx, Entity **lhs, isize
 		}
 
 		Ast *rhs_expr = unparen_expr(rhs);
-		bool defer_untyped_compound_lit =
-			(flags & UnpackFlag_DeferUntypedCompoundLit) != 0 &&
-			rhs_expr != nullptr && rhs_expr->kind == Ast_CompoundLit && rhs_expr->CompoundLit.type == nullptr &&
+		bool defer_untyped_arg =
+			(flags & UnpackFlag_DeferUntypedArg) != 0 &&
+			arg_is_deferrable_untyped_expr(rhs) &&
 			(type_hint == nullptr || is_type_polymorphic(type_hint));
-		if (defer_untyped_compound_lit) {
-			// NOTE: Leave the literal unchecked; its type comes from the resolved poly parameter later.
+		if (defer_untyped_arg) {
+			// NOTE(bill): Leave the argument unchecked; its type comes from the resolved poly parameter later.
 			// Kept as an "invalid" operand so polymorphic determination treats it as carrying no info.
 			o.mode = Addressing_Invalid;
 			o.type = t_invalid;
 			o.expr = rhs;
-			o.deferred_compound_lit = true;
+			o.deferred_untyped_arg = true;
 		} else if (allow_undef && rhs_expr != nullptr && rhs_expr->kind == Ast_Uninit) {
 			// NOTE(bill): Just handle this very specific logic here
 			o.type = t_untyped_uninit;
@@ -6906,18 +6921,18 @@ gb_internal isize lookup_procedure_parameter(Type *type, String const &parameter
 	return lookup_procedure_parameter(&type->Proc, parameter_name);
 }
 
-// Resolve a deferred untyped compound-literal argument now that its parameter type is known.
+// Resolve a deferred untyped argument (`{...}`, `.Member`) now that its parameter type is known.
 // `param_type` is the concrete (post-substitution) parameter/element type for the slot. On success the
 // operand is checked against it as if it had been written with that type; on failure it is marked
 // invalid. When !show_error the check is muted (trial scoring of a procedure-group candidate) but its
 // failure is still recorded, so the candidate can be rejected without printing anything.
-gb_internal void materialize_deferred_compound_lit(CheckerContext *c, Operand *o, Type *param_type, bool show_error) {
-	GB_ASSERT(o->deferred_compound_lit);
-	o->deferred_compound_lit = false;
-	Ast *lit = o->expr;
+gb_internal void materialize_deferred_untyped_arg(CheckerContext *c, Operand *o, Type *param_type, bool show_error) {
+	GB_ASSERT(o->deferred_untyped_arg);
+	o->deferred_untyped_arg = false;
+	Ast *expr = o->expr;
 
 	if (param_type == nullptr || param_type == t_invalid || is_type_polymorphic(param_type)) {
-		// The slot's type could not be determined from the other arguments, so the literal is genuinely
+		// The slot's type could not be determined from the other arguments, so the argument is genuinely
 		// untypable here (e.g. `proc(e: $E)` called with a bare `{...}`). Leave it invalid; polymorphic
 		// determination has already reported why the type could not be resolved.
 		o->mode = Addressing_Invalid;
@@ -6926,11 +6941,11 @@ gb_internal void materialize_deferred_compound_lit(CheckerContext *c, Operand *o
 	}
 
 	if (show_error) {
-		check_expr_base(c, o, lit, param_type);
+		check_expr_base(c, o, expr, param_type);
 	} else {
 		i64 muted_before = error_mute_count();
 		begin_error_mute();
-		check_expr_base(c, o, lit, param_type);
+		check_expr_base(c, o, expr, param_type);
 		end_error_mute();
 		if (error_mute_count() != muted_before) {
 			o->mode = Addressing_Invalid;
@@ -7280,8 +7295,8 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 
 		for (isize i = 0; i < pt->param_count; i++) {
 			Operand *o = &ordered_operands[i];
-			if (o->deferred_compound_lit) {
-				materialize_deferred_compound_lit(c, o, pt->params->Tuple.variables[i]->type, show_error);
+			if (o->deferred_untyped_arg) {
+				materialize_deferred_untyped_arg(c, o, pt->params->Tuple.variables[i]->type, show_error);
 			}
 			if (o->mode == Addressing_Invalid) {
 				continue;
@@ -7332,11 +7347,11 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 		for_array(operand_index, variadic_operands) {
 			Operand *o = &variadic_operands[operand_index];
 			Operand deferred_local;
-			if (o->deferred_compound_lit) {
+			if (o->deferred_untyped_arg) {
 				// `variadic_operands` aliases the shared operand buffer reused across candidates, so
 				// resolve into a local copy rather than mutating it in place.
 				deferred_local = *o;
-				materialize_deferred_compound_lit(c, &deferred_local, vari_expand ? slice : elem, show_error);
+				materialize_deferred_untyped_arg(c, &deferred_local, vari_expand ? slice : elem, show_error);
 				o = &deferred_local;
 			}
 			if (vari_expand) {
@@ -8457,7 +8472,7 @@ gb_internal CallArgumentData check_call_arguments(CheckerContext *c, Operand *op
 				variadic_index = pt->variadic_index;
 			}
 			if (pt->is_polymorphic) {
-				unpack_flags |= UnpackFlag_DeferUntypedCompoundLit;
+				unpack_flags |= UnpackFlag_DeferUntypedArg;
 			}
 		}
 		check_unpack_arguments(c, lhs, lhs_count, &positional_operands, positional_args, unpack_flags, variadic_index);
@@ -8489,17 +8504,16 @@ gb_internal CallArgumentData check_call_arguments(CheckerContext *c, Operand *op
 			}
 
 			Operand o = {};
-			Ast *value_expr = unparen_expr(value);
-			bool defer_untyped_compound_lit =
+			bool defer_untyped_arg =
 				pt != nullptr && pt->is_polymorphic &&
-				value_expr != nullptr && value_expr->kind == Ast_CompoundLit && value_expr->CompoundLit.type == nullptr &&
+				arg_is_deferrable_untyped_expr(value) &&
 				(type_hint == nullptr || is_type_polymorphic(type_hint));
-			if (defer_untyped_compound_lit) {
-				// Mirror the positional path: resolve the literal from the poly parameter's type later.
+			if (defer_untyped_arg) {
+				// Mirror the positional path: resolve the argument from the poly parameter's type later.
 				o.mode = Addressing_Invalid;
 				o.type = t_invalid;
 				o.expr = value;
-				o.deferred_compound_lit = true;
+				o.deferred_untyped_arg = true;
 			} else {
 				check_expr_with_type_hint(c, &o, value, type_hint);
 				if (o.mode == Addressing_Invalid) {
diff --git a/src/checker.hpp b/src/checker.hpp
index 9781e4c82..36d9aa6e4 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -85,7 +85,7 @@ struct Operand {
 	Ast *      expr;
 	BuiltinProcId  builtin_id;
 	Entity *       proc_group;
-	bool           deferred_compound_lit; // untyped `{...}` arg whose type is resolved from a poly param later
+	bool           deferred_untyped_arg; // untyped arg (`{...}`, `.Member`) whose type is resolved from a poly param later
 };
 
 

From e961edcea216510dd1101c785902db35498a9efe Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 23:13:48 +0100
Subject: [PATCH 093/215] Handle ternary expressions when doing implicit
 parapoly determination

---
 src/check_expr.cpp | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 52a06bb9a..5efe88653 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -4418,17 +4418,25 @@ gb_internal bool is_ise_expr(Ast *node) {
 	return node->kind == Ast_ImplicitSelectorExpr;
 }
 
-// An argument expression that cannot be typed on its own and needs a target type. When passed to a
-// polymorphic parameter whose type is only known after substitution, it is deferred and resolved once
-// that type is determined (see materialize_deferred_untyped_arg).
 gb_internal bool arg_is_deferrable_untyped_expr(Ast *node) {
+	if (node == nullptr) {
+		return false;
+	}
 	node = unparen_expr(node);
 	if (node == nullptr) {
 		return false;
 	}
 	switch (node->kind) {
-	case Ast_CompoundLit:          return node->CompoundLit.type == nullptr;
-	case Ast_ImplicitSelectorExpr: return true;
+	case Ast_CompoundLit:
+		return node->CompoundLit.type == nullptr;
+	case Ast_ImplicitSelectorExpr:
+		return true;
+	case Ast_TernaryIfExpr:
+		return arg_is_deferrable_untyped_expr(node->TernaryIfExpr.x) &&
+		       arg_is_deferrable_untyped_expr(node->TernaryIfExpr.y);
+	case Ast_TernaryWhenExpr:
+		return arg_is_deferrable_untyped_expr(node->TernaryWhenExpr.x) &&
+		       arg_is_deferrable_untyped_expr(node->TernaryWhenExpr.y);
 	}
 	return false;
 }

From 5621e4e829213beba0781bd25001b9fb514ce63a Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Wed, 30 Sep 2026 23:42:22 +0100
Subject: [PATCH 094/215] Allow `append(&a, {1, 2})`

---
 src/check_expr.cpp | 33 ++++++++++++++++++++++++++++-----
 src/check_type.cpp |  7 +++++++
 2 files changed, 35 insertions(+), 5 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 5efe88653..637a4c0a3 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -6949,11 +6949,16 @@ gb_internal void materialize_deferred_untyped_arg(CheckerContext *c, Operand *o,
 	}
 
 	if (show_error) {
+		// Commit (the chosen overload): check the real node so its type is recorded exactly once.
 		check_expr_base(c, o, expr, param_type);
 	} else {
+		// Trial (procedure-group scoring): check a *clone* so the real node's cached type is never
+		// polluted across candidates that may resolve the slot to different types. Errors are muted but
+		// still counted, so a candidate that the argument does not fit is rejected without printing.
+		Ast *trial = clone_ast(expr);
 		i64 muted_before = error_mute_count();
 		begin_error_mute();
-		check_expr_base(c, o, expr, param_type);
+		check_expr_base(c, o, trial, param_type);
 		end_error_mute();
 		if (error_mute_count() != muted_before) {
 			o->mode = Addressing_Invalid;
@@ -7491,7 +7496,7 @@ gb_internal bool evaluate_where_clauses(CheckerContext *ctx, Ast *call_expr, Sco
 			} else if (!o.value.value_bool) {
 				if (print_err) {
 					ERROR_BLOCK();
-					
+
 					gbString str = expr_to_string(clause);
 					error(clause, "'where' clause evaluated to false:\n\t%s", str);
 					gb_string_free(str);
@@ -7608,6 +7613,15 @@ gb_internal bool check_named_arguments(CheckerContext *c, Type *type, Slice<Ast
 
 			}
 			Operand o = {};
+			if (pt != nullptr && pt->is_polymorphic && type_hint == nullptr && arg_is_deferrable_untyped_expr(value)) {
+				// Defer: resolved from the poly parameter's type later (see the positional path).
+				o.mode = Addressing_Invalid;
+				o.type = t_invalid;
+				o.expr = value;
+				o.deferred_untyped_arg = true;
+				array_add(named_operands, o);
+				continue;
+			}
 			check_expr_with_type_hint(c, &o, value, type_hint);
 			if (o.mode == Addressing_Invalid) {
 				success = false;
@@ -7799,7 +7813,7 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 				variadic_index = pt->Proc.variadic_index;
 			}
 		}
-		check_unpack_arguments(c, lhs, lhs_count, &positional_operands, positional_args, UnpackFlag_None, variadic_index);
+		check_unpack_arguments(c, lhs, lhs_count, &positional_operands, positional_args, UnpackFlag_DeferUntypedArg, variadic_index);
 
 		if (check_named_arguments(c, e->type, named_args, &named_operands, true)) {
 			check_call_arguments_single(c, call, operand,
@@ -7865,7 +7879,7 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 					if (!(pt != nullptr && is_type_proc(pt))) {
 						continue;
 					}
-					
+
 					if (pt->Proc.is_polymorphic) {
 						if (variadic_index == -1) {
 							variadic_index = pt->Proc.variadic_index;
@@ -7882,7 +7896,7 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 		}
 	}
 
-	check_unpack_arguments(c, lhs, lhs_count, &positional_operands, positional_args, UnpackFlag_None, variadic_index);
+	check_unpack_arguments(c, lhs, lhs_count, &positional_operands, positional_args, UnpackFlag_DeferUntypedArg, variadic_index);
 
 	for_array(i, named_args) {
 		Ast *arg = named_args[i];
@@ -7911,6 +7925,15 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 			}
 		}
 		Operand o = {};
+		if (arg_is_deferrable_untyped_expr(value) && (type_hint == nullptr || is_type_polymorphic(type_hint))) {
+			// Defer: resolved per candidate from each overload's parameter type (see the positional path).
+			o.mode = Addressing_Invalid;
+			o.type = t_invalid;
+			o.expr = value;
+			o.deferred_untyped_arg = true;
+			array_add(&named_operands, o);
+			continue;
+		}
 		check_expr_with_type_hint(c, &o, value, type_hint);
 		array_add(&named_operands, o);
 	}
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 78da710c5..6ea164e3f 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -2741,6 +2741,13 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 	bool modify_type = !ctx->no_polymorphic_errors;
 	bool show_error = modify_type && !ctx->hide_polymorphic_errors;
 	if (!is_operand_value(operand)) {
+		if (operand.deferred_untyped_arg && !modify_type) {
+			// Probe pass (procedure-group candidate pre-check): a deferred untyped argument carries no
+			// type yet, so it cannot constrain this parameter. Treat it as a match and let the real
+			// binding pass resolve the parameter from the other arguments. If the parameter is left
+			// polymorphic there (nothing else determines it), that pass fails, as it should.
+			return poly_type;
+		}
 		if (show_error) {
 			ERROR_BLOCK();
 

From 668559beeb64e9c3dbb0792232ee82436a8e3035 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 00:10:56 +0100
Subject: [PATCH 095/215] Improve parapoly error messages for near misses and
 de-emphasize overloads whose first parameter cannot accept the first
 argument's container

---
 src/check_expr.cpp | 108 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 106 insertions(+), 2 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 637a4c0a3..b26f65e9a 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -8084,16 +8084,26 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 	// 	error_line(")\n");
 	// };
 
+	// A deferred untyped argument has no type of its own yet; show the expression instead of 'invalid type'.
+	auto operand_type_string = [](Operand const &o) -> gbString {
+		if (o.deferred_untyped_arg) {
+			gbString e = expr_to_string(o.expr);
+			gbString s = gb_string_append_fmt(gb_string_make(heap_allocator(), ""), "%s (untyped)", e);
+			gb_string_free(e);
+			return s;
+		}
+		return type_to_string(o.type);
+	};
 	auto print_argument_types = [&]() {
 		error_line("\tGiven argument types:\n");
 		for (Operand const &o : positional_operands) {
-			gbString type = type_to_string(o.type);
+			gbString type = operand_type_string(o);
 			defer (gb_string_free(type));
 			error_line("\t • %s\n", type);
 		}
 		for_array(i, named_operands) {
 			Operand const &o = named_operands[i];
-			gbString type = type_to_string(o.type);
+			gbString type = operand_type_string(o);
 			defer (gb_string_free(type));
 
 			if (i < ce->split_args->named.count) {
@@ -8120,6 +8130,37 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 			print_argument_types();
 		}
 
+		if (positional_operands.count >= 2 && positional_operands[0].type != nullptr) {
+			Type *cont = base_type(type_deref(positional_operands[0].type));
+			Type *elem = nullptr;
+			if (cont != nullptr) {
+				if (cont->kind == Type_DynamicArray) {
+					elem = cont->DynamicArray.elem;
+				} else if (cont->kind == Type_Slice) {
+					elem = cont->Slice.elem;
+				}
+			}
+			if (elem != nullptr && !is_type_polymorphic(elem)) {
+				for (isize i = 1; i < positional_operands.count; i++) {
+					Operand src = positional_operands[i];
+					if (src.deferred_untyped_arg || src.mode == Addressing_Invalid || src.type == nullptr) {
+						continue;
+					}
+					// strict: no scalar broadcast, matching the `#no_broadcast` element parameter
+					if (check_is_assignable_to(c, &src, elem, false)) {
+						continue;
+					}
+					gbString es = type_to_string(elem);
+					gbString ss = type_to_string(src.type);
+					error_line("  \n");
+					error_line("\tSuggestion: the element type is '%s', but argument #%td is '%s'\n", es, i+1, ss);
+					gb_string_free(ss);
+					gb_string_free(es);
+					break;
+				}
+			}
+		}
+
 		if (procs.count == 0) {
 			procs = proc_group_entities_cloned(c, *operand);
 		}
@@ -8178,6 +8219,69 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 			}
 		}
 
+		// NOTE(bill): De-emphasise overloads whose first parameter cannot accept the first argument's container, so
+		// the "Did you mean" list stays focused. E.g. appending a value to a plain `[dynamic]T` hides the
+		// `#soa`, fixed-capacity, and `[]u8`-element `append` overloads. Only affects what is displayed.
+		if (positional_operands.count >= 1 && positional_operands[0].type != nullptr) {
+			auto container_elem = [](Type *t) -> Type * {
+				switch (t->kind) {
+				case Type_DynamicArray:              return t->DynamicArray.elem;
+				case Type_FixedCapacityDynamicArray: return t->FixedCapacityDynamicArray.elem;
+				case Type_Slice:                     return t->Slice.elem;
+				case Type_Array:                     return t->Array.elem;
+				}
+				return nullptr;
+			};
+			Type *arg0 = base_type(type_deref(positional_operands[0].type));
+			if (arg0 != nullptr && arg0->kind != Type_Generic && !is_type_polymorphic(arg0)) {
+				Type *arg0_elem = container_elem(arg0);
+				for_array(i, procs) {
+					if (possibly_ignore[i]) {
+						continue;
+					}
+					Entity *proc = procs[i];
+					Type *t = base_type(proc->type);
+					if (t == nullptr || t->kind != Type_Proc || t->Proc.param_count == 0) {
+						continue;
+					}
+					Type *p0 = base_type(t->Proc.params->Tuple.variables[0]->type);
+					if (p0->kind == Type_Pointer) {
+						p0 = base_type(p0->Pointer.elem);
+					} else if (p0->kind == Type_MultiPointer) {
+						p0 = base_type(p0->MultiPointer.elem);
+					}
+					while (p0->kind == Type_Generic && p0->Generic.specialized != nullptr) {
+						p0 = base_type(p0->Generic.specialized);
+					}
+					if (p0->kind == Type_Generic) {
+						continue; // unconstrained `$T`: cannot tell, keep it
+					}
+					bool incompatible = false;
+					if (p0->kind != arg0->kind) {
+						incompatible = true;
+					} else if (arg0_elem != nullptr) {
+						// container kinds match; reject an overload that constrains the element type to
+						// something the argument's element cannot satisfy (e.g. `$E/u8`)
+						Type *p0_elem = container_elem(p0);
+						if (p0_elem != nullptr) {
+							Type *pe = base_type(p0_elem);
+							if (pe->kind == Type_Generic && pe->Generic.specialized != nullptr) {
+								Operand src = {Addressing_Value};
+								src.type = arg0_elem;
+								if (!check_is_assignable_to(c, &src, base_type(pe->Generic.specialized), false)) {
+									incompatible = true;
+								}
+							}
+						}
+					}
+					if (incompatible) {
+						possibly_ignore[i] = true;
+						possibly_ignore_set += 1;
+					}
+				}
+			}
+		}
+
 		if (possibly_ignore_set == procs.count) {
 			possibly_ignore_set = 0;
 		}

From 96dd7d22ec615fc8d828bda296f7bc3eac8d4317 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 00:17:12 +0100
Subject: [PATCH 096/215] Improve the the ambiguous calls stuff further by
 trying to find a confident diagnosis

---
 src/check_expr.cpp | 71 +++++++++++++++++++++++++++-------------------
 1 file changed, 42 insertions(+), 29 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index b26f65e9a..f2dcb3824 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -8123,23 +8123,29 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 	if (valids.count == 0) {
 		ERROR_BLOCK();
 
-		error(operand->expr, "No procedures or ambiguous call for procedure group '%s' that match with the given arguments", expr_name);
-		if (positional_operands.count == 0 && named_operands.count == 0) {
-			error_line("\tNo given arguments\n");
-		} else {
-			print_argument_types();
-		}
+		// element type of a container type, if any (dynamic array / slice / fixed(-capacity) array)
+		auto container_elem = [](Type *t) -> Type * {
+			if (t == nullptr) {
+				return nullptr;
+			}
+			switch (t->kind) {
+			case Type_DynamicArray:              return t->DynamicArray.elem;
+			case Type_FixedCapacityDynamicArray: return t->FixedCapacityDynamicArray.elem;
+			case Type_Slice:                     return t->Slice.elem;
+			case Type_Array:                     return t->Array.elem;
+			}
+			return nullptr;
+		};
 
+		// NOTE(bill): Check for a confident diagnosis
+		Ast *diag_expr = nullptr;
+		isize diag_index = -1;
+		Type *diag_elem = nullptr;
+		Type *diag_cont = nullptr;
+		gbString diag_arg_type = nullptr;
 		if (positional_operands.count >= 2 && positional_operands[0].type != nullptr) {
 			Type *cont = base_type(type_deref(positional_operands[0].type));
-			Type *elem = nullptr;
-			if (cont != nullptr) {
-				if (cont->kind == Type_DynamicArray) {
-					elem = cont->DynamicArray.elem;
-				} else if (cont->kind == Type_Slice) {
-					elem = cont->Slice.elem;
-				}
-			}
+			Type *elem = container_elem(cont);
 			if (elem != nullptr && !is_type_polymorphic(elem)) {
 				for (isize i = 1; i < positional_operands.count; i++) {
 					Operand src = positional_operands[i];
@@ -8150,17 +8156,33 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 					if (check_is_assignable_to(c, &src, elem, false)) {
 						continue;
 					}
-					gbString es = type_to_string(elem);
-					gbString ss = type_to_string(src.type);
-					error_line("  \n");
-					error_line("\tSuggestion: the element type is '%s', but argument #%td is '%s'\n", es, i+1, ss);
-					gb_string_free(ss);
-					gb_string_free(es);
+					diag_expr     = src.expr;
+					diag_index    = i;
+					diag_elem     = elem;
+					diag_cont     = cont;
+					diag_arg_type = type_to_string(src.type);
 					break;
 				}
 			}
 		}
 
+		if (diag_expr != nullptr) {
+			gbString es = type_to_string(diag_elem);
+			error(diag_expr, "'%s' expected argument #%td to be of type '%s', got '%s'", expr_name, diag_index+1, es, diag_arg_type);
+			gbString cs = type_to_string(diag_cont);
+			error_line("\t'%s' is the element type of '%s'\n", es, cs);
+			gb_string_free(cs);
+			gb_string_free(es);
+			gb_string_free(diag_arg_type);
+		} else {
+			error(operand->expr, "No procedures or ambiguous call for procedure group '%s' that match with the given arguments", expr_name);
+			if (positional_operands.count == 0 && named_operands.count == 0) {
+				error_line("\tNo given arguments\n");
+			} else {
+				print_argument_types();
+			}
+		}
+
 		if (procs.count == 0) {
 			procs = proc_group_entities_cloned(c, *operand);
 		}
@@ -8223,15 +8245,6 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 		// the "Did you mean" list stays focused. E.g. appending a value to a plain `[dynamic]T` hides the
 		// `#soa`, fixed-capacity, and `[]u8`-element `append` overloads. Only affects what is displayed.
 		if (positional_operands.count >= 1 && positional_operands[0].type != nullptr) {
-			auto container_elem = [](Type *t) -> Type * {
-				switch (t->kind) {
-				case Type_DynamicArray:              return t->DynamicArray.elem;
-				case Type_FixedCapacityDynamicArray: return t->FixedCapacityDynamicArray.elem;
-				case Type_Slice:                     return t->Slice.elem;
-				case Type_Array:                     return t->Array.elem;
-				}
-				return nullptr;
-			};
 			Type *arg0 = base_type(type_deref(positional_operands[0].type));
 			if (arg0 != nullptr && arg0->kind != Type_Generic && !is_type_polymorphic(arg0)) {
 				Type *arg0_elem = container_elem(arg0);

From f65f3cd4daf9ab05b7b5f6324fdf422f015f6263 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 00:22:06 +0100
Subject: [PATCH 097/215] parapoly: Fix bug on error reporting when none of the
 parameters match in a parapoly procedure

---
 src/check_expr.cpp | 63 ++++++++++++++++++++++++++++++----------------
 1 file changed, 42 insertions(+), 21 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index f2dcb3824..c4d7ab8d9 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -8136,8 +8136,36 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 			}
 			return nullptr;
 		};
+		// NOTE)(bill): resolved container base of a candidate's first parameter, through a pointer and a `$T/...`
+		// constraint, e.g. `^$T/[dynamic]$E` -> the `[dynamic]$E` base type
+		auto first_param_container_base = [](Entity *proc) -> Type * {
+			if (proc == nullptr) {
+				return nullptr;
+			}
+			Type *t = base_type(proc->type);
+			if (t == nullptr || t->kind != Type_Proc || t->Proc.param_count == 0) {
+				return nullptr;
+			}
+			Type *p0 = base_type(t->Proc.params->Tuple.variables[0]->type);
+			if (p0->kind == Type_Pointer) {
+				p0 = base_type(p0->Pointer.elem);
+			} else if (p0->kind == Type_MultiPointer) {
+				p0 = base_type(p0->MultiPointer.elem);
+			}
+			while (p0->kind == Type_Generic && p0->Generic.specialized != nullptr) {
+				p0 = base_type(p0->Generic.specialized);
+			}
+			return p0;
+		};
 
-		// NOTE(bill): Check for a confident diagnosis
+		if (procs.count == 0) {
+			procs = proc_group_entities_cloned(c, *operand);
+		}
+
+		// NOTE(bill): Confident diagnosis:
+		// A container-first call (e.g. `append`) where the container matches some overload but a later argument does not match the container's element type.
+		// Only fire when an overload actually accepts this container kind, so an unrelated group (nothing close) still gets the generic message.
+		// The relevant overloads are still listed below.
 		Ast *diag_expr = nullptr;
 		isize diag_index = -1;
 		Type *diag_elem = nullptr;
@@ -8146,7 +8174,17 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 		if (positional_operands.count >= 2 && positional_operands[0].type != nullptr) {
 			Type *cont = base_type(type_deref(positional_operands[0].type));
 			Type *elem = container_elem(cont);
+			bool container_matched = false;
 			if (elem != nullptr && !is_type_polymorphic(elem)) {
+				for (Entity *proc : procs) {
+					Type *p0 = first_param_container_base(proc);
+					if (p0 != nullptr && p0->kind == cont->kind) {
+						container_matched = true;
+						break;
+					}
+				}
+			}
+			if (container_matched) {
 				for (isize i = 1; i < positional_operands.count; i++) {
 					Operand src = positional_operands[i];
 					if (src.deferred_untyped_arg || src.mode == Addressing_Invalid || src.type == nullptr) {
@@ -8183,10 +8221,6 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 			}
 		}
 
-		if (procs.count == 0) {
-			procs = proc_group_entities_cloned(c, *operand);
-		}
-
 		// Try to reduce the list further for `$T: typeid` like parameters
 		bool *possibly_ignore = temporary_alloc_array<bool>(procs.count);
 		isize possibly_ignore_set = 0;
@@ -8252,22 +8286,9 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 					if (possibly_ignore[i]) {
 						continue;
 					}
-					Entity *proc = procs[i];
-					Type *t = base_type(proc->type);
-					if (t == nullptr || t->kind != Type_Proc || t->Proc.param_count == 0) {
-						continue;
-					}
-					Type *p0 = base_type(t->Proc.params->Tuple.variables[0]->type);
-					if (p0->kind == Type_Pointer) {
-						p0 = base_type(p0->Pointer.elem);
-					} else if (p0->kind == Type_MultiPointer) {
-						p0 = base_type(p0->MultiPointer.elem);
-					}
-					while (p0->kind == Type_Generic && p0->Generic.specialized != nullptr) {
-						p0 = base_type(p0->Generic.specialized);
-					}
-					if (p0->kind == Type_Generic) {
-						continue; // unconstrained `$T`: cannot tell, keep it
+					Type *p0 = first_param_container_base(procs[i]);
+					if (p0 == nullptr || p0->kind == Type_Generic) {
+						continue; // unconstrained `$T` or no first parameter: cannot tell, keep it
 					}
 					bool incompatible = false;
 					if (p0->kind != arg0->kind) {

From 614b45e91974d0b4792f577d5efecaaf17243274 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 00:49:36 +0100
Subject: [PATCH 098/215] Add optional annotations for the next error source
 line.

---
 src/check_expr.cpp |  59 ++++++++++++++++++-
 src/error.cpp      | 137 +++++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 190 insertions(+), 6 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index c4d7ab8d9..52b731efb 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -8204,14 +8204,69 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 			}
 		}
 
+		// NOTE(bill): Missing `&`: a container argument passed by value where an overload wants a pointer
+		// to it. Detected only when the element-mismatch diagnosis did not fire. The `&x` suggestion is
+		// still printed below by the existing try-address block.
+		Ast *addr_expr = nullptr;
+		isize addr_index = -1;
+		if (diag_expr == nullptr) {
+			for (Entity *proc : procs) {
+				Type *t = base_type(proc->type);
+				if (t == nullptr || t->kind != Type_Proc || t->Proc.params == nullptr) {
+					continue;
+				}
+				isize n = gb_min(cast(isize)t->Proc.param_count, positional_operands.count);
+				for (isize i = 0; i < n; i++) {
+					Operand src = positional_operands[i];
+					if (src.deferred_untyped_arg || src.mode == Addressing_Invalid || src.type == nullptr) {
+						continue;
+					}
+					Type *dst = t->Proc.params->Tuple.variables[i]->type;
+					if (check_is_assignable_to(c, &src, dst)) {
+						continue;
+					}
+					if (check_is_assignable_to(c, &src, type_deref(dst))) {
+						addr_expr  = src.expr;
+						addr_index = i;
+						break;
+					}
+				}
+				if (addr_expr != nullptr) {
+					break;
+				}
+			}
+		}
+
 		if (diag_expr != nullptr) {
 			gbString es = type_to_string(diag_elem);
-			error(diag_expr, "'%s' expected argument #%td to be of type '%s', got '%s'", expr_name, diag_index+1, es, diag_arg_type);
 			gbString cs = type_to_string(diag_cont);
-			error_line("\t'%s' is the element type of '%s'\n", es, cs);
+			gbString label = gb_string_make(heap_allocator(), "");
+			label = gb_string_append_fmt(label, "expected '%s', found '%s'", es, diag_arg_type);
+			set_caret_label(label);
+			// secondary span under the container argument, explaining where the element type comes from
+			Ast *cont_expr = positional_operands[0].expr;
+			gbString sec = gb_string_make(heap_allocator(), "");
+			sec = gb_string_append_fmt(sec, "'%s', elements are '%s'", cs, es);
+			if (cont_expr != nullptr) {
+				set_caret_secondary(ast_token(cont_expr).pos, ast_end_pos(cont_expr), sec);
+			}
+			error(diag_expr, "mismatched argument #%td in call to '%s'", diag_index+1, expr_name);
+			gb_string_free(sec);
+			gb_string_free(label);
 			gb_string_free(cs);
 			gb_string_free(es);
 			gb_string_free(diag_arg_type);
+		} else if (addr_expr != nullptr) {
+			Operand src = positional_operands[addr_index];
+			gbString ft = type_to_string(src.type);
+			gbString ex = expr_to_string(src.expr);
+			gbString label = gb_string_make(heap_allocator(), "");
+			label = gb_string_append_fmt(label, "expected '^%s', found '%s', pass '&%s'", ft, ft, ex);
+			set_caret_label_vertical(label);
+			error(src.expr, "mismatched argument #%td in call to '%s'", addr_index+1, expr_name);
+			gb_string_free(label);
+			gb_string_free(ex);
+			gb_string_free(ft);
 		} else {
 			error(operand->expr, "No procedures or ambiguous call for procedure group '%s' that match with the given arguments", expr_name);
 			if (positional_operands.count == 0 && named_operands.count == 0) {
diff --git a/src/error.cpp b/src/error.cpp
index 3f7cb4aae..77fef3cea 100644
--- a/src/error.cpp
+++ b/src/error.cpp
@@ -47,6 +47,41 @@ gb_internal bool is_error_muted(void) {
 	return global_error_mute_depth > 0;
 }
 
+// Optional annotations for the next errored source line.
+// All per-thread, so nothing leaks between concurrently-checked files.
+// `show_error_on_line` snapshots and clears them.
+//
+//   primary label, inline:                    primary label, vertical:      secondary span (always vertical):
+//     append(&x, true)                          append(x, {1,2,3})             append(&x, true)
+//                ^~~^ expected '…', found '…'          ^                              ^^  ^~~^ expected '…', found '…'
+//                                                      |                              |
+//                                                      expected '^…', pass '&x'       '[dynamic][3]int', elements are '[3]int'
+gb_thread_local char     global_caret_label_buf[512];      // primary label text
+gb_thread_local bool     global_caret_label_vertical;      // render primary label as | + text below, not inline
+gb_thread_local bool     global_caret_sec_present;         // a secondary span (to the left) is set
+gb_thread_local TokenPos global_caret_sec_pos;
+gb_thread_local TokenPos global_caret_sec_end;
+gb_thread_local char     global_caret_sec_label[512];
+
+gb_internal void set_caret_label(char const *text) {
+	global_caret_label_vertical = false;
+	if (text == nullptr) {
+		global_caret_label_buf[0] = 0;
+	} else {
+		gb_snprintf(global_caret_label_buf, gb_size_of(global_caret_label_buf), "%s", text);
+	}
+}
+gb_internal void set_caret_label_vertical(char const *text) {
+	set_caret_label(text);
+	global_caret_label_vertical = true;
+}
+gb_internal void set_caret_secondary(TokenPos pos, TokenPos end, char const *text) {
+	global_caret_sec_present = text != nullptr;
+	global_caret_sec_pos = pos;
+	global_caret_sec_end = end;
+	gb_snprintf(global_caret_sec_label, gb_size_of(global_caret_sec_label), "%s", text ? text : "");
+}
+
 
 gb_internal void push_error_value(TokenPos const &pos, ErrorValueKind kind = ErrorValue_Error) {
 	GB_ASSERT_MSG(global_error_collector.curr_error_value_set.load() == false, "Possible race condition in error handling system, please report this with an issue");
@@ -308,6 +343,22 @@ gb_internal void terminal_reset_colours(void) {
 
 gb_internal isize show_error_on_line(TokenPos const &pos, TokenPos end) {
 	get_error_value()->end = end;
+
+	// Consume the caret annotations now, so they are cleared even on an early return and can never leak
+	// onto a later error's line.
+	char caret_label[512];
+	gb_snprintf(caret_label, gb_size_of(caret_label), "%s", global_caret_label_buf);
+	bool     caret_label_vertical = global_caret_label_vertical;
+	bool     sec_present = global_caret_sec_present;
+	TokenPos sec_pos = global_caret_sec_pos;
+	TokenPos sec_end = global_caret_sec_end;
+	char sec_label[512];
+	gb_snprintf(sec_label, gb_size_of(sec_label), "%s", global_caret_sec_label);
+	global_caret_label_buf[0] = 0;
+	global_caret_label_vertical = false;
+	global_caret_sec_present = false;
+	global_caret_sec_label[0] = 0;
+
 	if (!show_error_line()) {
 		return -1;
 	}
@@ -512,13 +563,57 @@ gb_internal isize show_error_on_line(TokenPos const &pos, TokenPos end) {
 		error_out(" ...");
 	}
 
-	error_out("\n\t");
-
-	for (i32 i = squiggle_padding; i > 0; i -= 1) {
-		error_out(" ");
+	// Secondary span (drawn to the left of the primary on the same line): compute its padding/width the
+	// same way as the primary's, and only draw it if it sits fully to the left within the window.
+	i32 sec_pad = 0;
+	i32 sec_len = 0;
+	bool draw_sec = sec_present && sec_pos.line == pos.line && sec_end.line == pos.line;
+	if (draw_sec) {
+		i32 sec_start_byte = error_start_index_bytes + (sec_pos.column - pos.column);
+		i32 sec_end_byte   = error_start_index_bytes + (sec_end.column - pos.column);
+		if (window_open_bytes > 0) {
+			sec_pad += 4;
+		}
+		for (i32 i = 0; i < line_length_graphemes; i += 1) {
+			if (graphemes[i].byte_index < window_open_bytes)  continue;
+			if (graphemes[i].byte_index >= sec_start_byte)    break;
+			sec_pad += graphemes[i].width;
+		}
+		for (i32 i = 0; i < line_length_graphemes; i += 1) {
+			if (graphemes[i].byte_index < sec_start_byte) continue;
+			if (graphemes[i].byte_index >= sec_end_byte)  break;
+			sec_len += graphemes[i].width;
+		}
+		if (sec_len < 1) {
+			sec_len = 1;
+		}
+		if (sec_start_byte >= error_start_index_bytes || sec_pad + sec_len > squiggle_padding) {
+			draw_sec = false; // overlaps or is not to the left; skip rather than misalign
+		}
 	}
 
+	error_out("\n\t");
+
+	i32 printed = 0;
 	terminal_set_colours(TerminalStyle_Bold, TerminalColour_Green);
+	if (draw_sec) {
+		for (i32 i = sec_pad - printed; i > 0; i -= 1) {
+			error_out(" ");
+		}
+		printed = sec_pad;
+		error_out("^");
+		for (i32 k = sec_len - 2; k > 0; k -= 1) {
+			error_out("~");
+		}
+		if (sec_len >= 2) {
+			error_out("^");
+		}
+		printed += sec_len;
+	}
+
+	for (i32 i = squiggle_padding - printed; i > 0; i -= 1) {
+		error_out(" ");
+	}
 
 	if (squiggle_length > 0) {
 		error_out("^");
@@ -535,12 +630,46 @@ gb_internal isize show_error_on_line(TokenPos const &pos, TokenPos end) {
 		}
 	}
 
+	if (caret_label[0] != 0 && !caret_label_vertical) {
+		terminal_set_colours(TerminalStyle_Normal, TerminalColour_Grey);
+		error_out(" %s", caret_label);
+	}
+
 	// NOTE(Feoramund): Specifically print a newline, then reset colours,
 	// instead of the other way around. Otherwise the printing mechanism
 	// will collapse the newline for reasons currently beyond my ken.
 	error_out("\n");
 	terminal_reset_colours();
 
+	// A vertical label hangs under its span: `|` then the text, aligned to the span's column. The
+	// secondary span takes priority (its label explains the primary); otherwise a vertical primary label.
+	i32 vpad = -1;
+	char const *vtext = nullptr;
+	if (draw_sec && sec_label[0] != 0) {
+		vpad = sec_pad;
+		vtext = sec_label;
+	} else if (caret_label_vertical && caret_label[0] != 0) {
+		vpad = squiggle_padding;
+		vtext = caret_label;
+	}
+	if (vpad >= 0 && vtext != nullptr && vtext[0] != 0) {
+		error_out("\t");
+		for (i32 i = vpad; i > 0; i -= 1) {
+			error_out(" ");
+		}
+		terminal_set_colours(TerminalStyle_Bold, TerminalColour_Green);
+		error_out("|\n");
+		terminal_reset_colours();
+
+		error_out("\t");
+		for (i32 i = vpad; i > 0; i -= 1) {
+			error_out(" ");
+		}
+		terminal_set_colours(TerminalStyle_Normal, TerminalColour_Grey);
+		error_out("%s\n", vtext);
+		terminal_reset_colours();
+	}
+
 	return squiggle_padding;
 }
 

From d89709fea002aaa8c0fba3ae8bd2a362fb7c8b14 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 00:57:45 +0100
Subject: [PATCH 099/215] Allow untyped `{...}` against a union to be inferred
 correctly

---
 src/check_expr.cpp | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 52b731efb..781203564 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -11332,6 +11332,48 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 		return kind;
 	}
 
+	// An untyped `{...}` against a union: infer which variant it is by trial-checking the literal against each variant (muted, on a clone).
+	// If exactly one matches, retarget to that variant and let the normal path build it (the surrounding assignment then wraps it into the union).
+	// Otherwise report a clear error.
+	if (t->kind == Type_Union && cl->type == nullptr && cl->elems.count > 0) {
+		wait_signal_until_available(&t->Union.variants_wait_signal);
+		auto matches = array_make<Type *>(temporary_allocator(), 0, t->Union.variants.count);
+		for (Type *variant : t->Union.variants) {
+			Operand trial = {};
+			i64 muted_before = error_mute_count();
+			begin_error_mute();
+			check_expr_base(c, &trial, clone_ast(node), variant);
+			end_error_mute();
+			if (trial.mode != Addressing_Invalid && error_mute_count() == muted_before) {
+				array_add(&matches, variant);
+			}
+		}
+		if (matches.count == 1) {
+			type = matches[0];
+			t = base_type(type);
+		} else {
+			gbString us = type_to_string(type);
+			if (matches.count == 0) {
+				error(node, "No variant of the union '%s' matches this compound literal", us);
+			} else {
+				ERROR_BLOCK();
+				error(node, "Ambiguous compound literal for the union '%s'; it matches %td variants:", us, matches.count);
+				for (Type *m : matches) {
+					gbString ms = type_to_string(m);
+					error_line("\t%s\n", ms);
+					gb_string_free(ms);
+				}
+				gbString first = type_to_string(matches[0]);
+				error_line("\tSuggestion: name the intended variant, e.g. '%s{...}'\n", first);
+				gb_string_free(first);
+			}
+			gb_string_free(us);
+			o->expr = node;
+			o->type = type;
+			return kind;
+		}
+	}
+
 
 	switch (t->kind) {
 	case Type_Struct:

From 66111934c3af9583398efc08736cc6b0bfa4eaaa Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 01:17:40 +0100
Subject: [PATCH 100/215] Allow parapoly procs to be in `@(deferred_*)`
 attributes

---
 src/check_expr.cpp | 46 ++++++++++++++++++++++++++++++++++++++++++++++
 src/checker.cpp    | 16 +++++++++++-----
 2 files changed, 57 insertions(+), 5 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 781203564..3e1810e15 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -684,6 +684,52 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 		entity->Procedure.generated_from_polymorphic = proc_info->generated_from_polymorphic;
 	}
 
+	if (base_entity->Procedure.deferred_procedure.entity != nullptr) {
+		DeferredProcedure dp = base_entity->Procedure.deferred_procedure;
+		Entity *dst = dp.entity;
+		// NOTE(bill): Skip self-deferral and chaining (both invalid, reported by check_deferred_procedures).
+		// handling them here would otherwise recurse through find_or_generate_polymorphic_procedure.
+		if (dst == nullptr || dst == base_entity || dst->Procedure.deferred_procedure.entity != nullptr) {
+			// Leave this instantiation without a deferred procedure
+			// The error is reported during validation
+		} else if (!is_type_polymorphic(dst->type)) {
+			entity->Procedure.deferred_procedure = dp;
+		} else {
+			bool by_ptr  = dp.kind == DeferredProcedure_in_by_ptr  || dp.kind == DeferredProcedure_out_by_ptr || dp.kind == DeferredProcedure_in_out_by_ptr;
+			bool use_in  = dp.kind == DeferredProcedure_in         || dp.kind == DeferredProcedure_in_by_ptr  || dp.kind == DeferredProcedure_in_out || dp.kind == DeferredProcedure_in_out_by_ptr;
+			bool use_out = dp.kind == DeferredProcedure_out        || dp.kind == DeferredProcedure_out_by_ptr || dp.kind == DeferredProcedure_in_out || dp.kind == DeferredProcedure_in_out_by_ptr;
+
+			auto dst_ops = array_make<Operand>(heap_allocator(), 0, operands.count + 4);
+			defer (array_free(&dst_ops));
+
+			if (use_in) {
+				for (Operand const &o : operands) {
+					Operand po = o;
+					if (by_ptr && po.type != nullptr) {
+						po.type = alloc_type_pointer(po.type);
+					}
+					array_add(&dst_ops, po);
+				}
+			}
+			if (use_out) {
+				Type *res = base_type(final_proc_type)->Proc.results;
+				if (res != nullptr && res->kind == Type_Tuple) {
+					for (Entity *rv : res->Tuple.variables) {
+						Operand po = {Addressing_Value};
+						po.type = by_ptr ? alloc_type_pointer(rv->type) : rv->type;
+						po.expr = ident;
+						array_add(&dst_ops, po);
+					}
+				}
+			}
+			PolyProcData dpd = {};
+			if (find_or_generate_polymorphic_procedure(&nctx, dst, nullptr, &dst_ops, poly_def_node, &dpd)) {
+				entity->Procedure.deferred_procedure.kind   = dp.kind;
+				entity->Procedure.deferred_procedure.entity = dpd.gen_entity;
+			}
+		}
+	}
+
 	// NOTE(bill): Check the newly generated procedure body
 	check_procedure_later(nctx.checker, proc_info);
 
diff --git a/src/checker.cpp b/src/checker.cpp
index fa95f763d..6273a8f7e 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -6964,8 +6964,14 @@ gb_internal void check_deferred_procedures(Checker *c) {
 			continue;
 		}
 
-		if (is_type_polymorphic(src->type) || is_type_polymorphic(dst->type)) {
-			error(src->token, "'%s' cannot be used with a polymorphic procedure", attribute);
+		bool src_poly = is_type_polymorphic(src->type);
+		bool dst_poly = is_type_polymorphic(dst->type);
+		if (dst_poly && !src_poly) {
+			error(src->token, "A polymorphic deferred procedure '%.*s' requires the initial procedure '%.*s' to be polymorphic as well", LIT(dst->token.string), LIT(src->token.string));
+			continue;
+		}
+		if (dst_poly && dst_kind == DeferredProcedure_none) {
+			error(src->token, "'deferred_none' cannot be used with a polymorphic deferred procedure, as it has no inputs from which to determine its polymorphic types");
 			continue;
 		}
 
@@ -7027,7 +7033,7 @@ gb_internal void check_deferred_procedures(Checker *c) {
 				GB_ASSERT(src_params->kind == Type_Tuple);
 				GB_ASSERT(dst_params->kind == Type_Tuple);
 
-				if (are_types_identical(src_params, dst_params)) {
+				if (src_poly || dst_poly || are_types_identical(src_params, dst_params)) {
 					// Okay!
 				} else {
 					gbString s = type_to_string(src_params);
@@ -7057,7 +7063,7 @@ gb_internal void check_deferred_procedures(Checker *c) {
 				GB_ASSERT(src_results->kind == Type_Tuple);
 				GB_ASSERT(dst_params->kind == Type_Tuple);
 
-				if (are_types_identical(src_results, dst_params)) {
+				if (src_poly || dst_poly || are_types_identical(src_results, dst_params)) {
 					// Okay!
 				} else {
 					gbString s = type_to_string(src_results);
@@ -7114,7 +7120,7 @@ gb_internal void check_deferred_procedures(Checker *c) {
 				GB_ASSERT(offset == len);
 
 
-				if (are_types_identical(tsrc, dst_params)) {
+				if (src_poly || dst_poly || are_types_identical(tsrc, dst_params)) {
 					// Okay!
 				} else {
 					gbString s = type_to_string(tsrc);

From bfcdc8f59edde0c988f2d3b15d26bc22549f5d4c Mon Sep 17 00:00:00 2001
From: dogue <dogue@oddhelix.com>
Date: Wed, 30 Sep 2026 20:25:29 -0400
Subject: [PATCH 101/215] fix alignment

---
 vendor/sdl2/sdl_render.odin | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/vendor/sdl2/sdl_render.odin b/vendor/sdl2/sdl_render.odin
index 0bec18d7d..4a6dd2ead 100644
--- a/vendor/sdl2/sdl_render.odin
+++ b/vendor/sdl2/sdl_render.odin
@@ -143,5 +143,5 @@ foreign lib {
 	GL_UnbindTexture             :: proc(texture:  ^Texture) -> c.int ---
 	RenderGetMetalLayer          :: proc(renderer: ^Renderer) -> rawptr ---
 	RenderGetMetalCommandEncoder :: proc(renderer: ^Renderer) -> rawptr ---
-	RenderSetVSync				 :: proc(renderer: ^Renderer, vsync: bool) -> c.int ---
+	RenderSetVSync               :: proc(renderer: ^Renderer, vsync: bool) -> c.int ---
 }

From 7c8dfd4cff47c97f626cf01aa24c6a02beb933c4 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 01:30:38 +0100
Subject: [PATCH 102/215] Improve mixed order ternary type inference and
 poly-determination diagnostics

---
 src/check_expr.cpp | 23 +++++++++++++++++------
 src/check_type.cpp | 32 ++++++++++++++++++++++++--------
 2 files changed, 41 insertions(+), 14 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 3e1810e15..6ff54a624 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -10551,19 +10551,30 @@ gb_internal ExprKind check_ternary_if_expr(CheckerContext *c, Operand *o, Ast *n
 
 	Operand x = {Addressing_Invalid};
 	Operand y = {Addressing_Invalid};
-	check_expr_as_value_for_ternary(c, &x, te->x, type_hint);
-	node->viral_state_flags |= te->x->viral_state_flags;
 
-	if (te->y != nullptr) {
+	if (te->y == nullptr) {
+		check_expr_as_value_for_ternary(c, &x, te->x, type_hint);
+		node->viral_state_flags |= te->x->viral_state_flags;
+		error(node, "A ternary expression must have an else clause");
+		return kind;
+	}
+
+	if (type_hint == nullptr && arg_is_deferrable_untyped_expr(te->x)) {
+		check_expr_as_value_for_ternary(c, &y, te->y, nullptr);
+		node->viral_state_flags |= te->y->viral_state_flags;
+		Type *th = is_type_typed(y.type) ? y.type : nullptr;
+		check_expr_as_value_for_ternary(c, &x, te->x, th);
+		node->viral_state_flags |= te->x->viral_state_flags;
+	} else {
+		check_expr_as_value_for_ternary(c, &x, te->x, type_hint);
+		node->viral_state_flags |= te->x->viral_state_flags;
+
 		Type *th = type_hint;
 		if (type_hint == nullptr && is_type_typed(x.type)) {
 			th = x.type;
 		}
 		check_expr_as_value_for_ternary(c, &y, te->y, th);
 		node->viral_state_flags |= te->y->viral_state_flags;
-	} else {
-		error(node, "A ternary expression must have an else clause");
-		return kind;
 	}
 
 	if (te->x->viral_state_flags & ViralStateFlag_ContainsDeferredProcedure) {
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 6ea164e3f..b4819979e 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -2752,15 +2752,21 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 			ERROR_BLOCK();
 
 			gbString pts = type_to_string(poly_type);
-			gbString ots = type_to_string(operand.type, true);
 			defer (gb_string_free(pts));
-			defer (gb_string_free(ots));
-			error(operand.expr, "Cannot determine polymorphic type from parameter: '%s' to '%s'", ots, pts);
-
-			if (operand.mode == Addressing_Type) {
-				error_line("\tSuggestion: Are you trying to pass a type to a value parameter?\n");
+			if (operand.deferred_untyped_arg) {
+				// An untyped argument (`{...}`, `.Member`, a both-untyped ternary) whose type is not
+				// pinned by any other argument, so the polymorphic type cannot be inferred from it.
+				set_caret_label("untyped; its type cannot be determined here");
+				error(operand.expr, "Cannot infer the polymorphic type '%s' from this argument", pts);
+				error_line("\tname the type explicitly (e.g. 'T{...}'), or determine '%s' from another argument\n", pts);
+			} else {
+				gbString ots = type_to_string(operand.type, true);
+				defer (gb_string_free(ots));
+				error(operand.expr, "Cannot determine polymorphic type from parameter: '%s' to '%s'", ots, pts);
+				if (operand.mode == Addressing_Type) {
+					error_line("\tSuggestion: Are you trying to pass a type to a value parameter?\n");
+				}
 			}
-
 		}
 		return t_invalid;
 	}
@@ -2825,7 +2831,17 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 		gbString ots = type_to_string(operand.type, true);
 		defer (gb_string_free(pts));
 		defer (gb_string_free(ots));
-		error(operand.expr, "Cannot determine polymorphic type from parameter: '%s' to '%s'", ots, pts);
+		if (poly_type->kind == Type_Generic && poly_type->Generic.specialized != nullptr) {
+			// Constrained generic (`$T/Constraint`): the argument's type does not satisfy the constraint.
+			gbString cs = type_to_string(poly_type->Generic.specialized);
+			gbString cl = gb_string_append_fmt(gb_string_make(heap_allocator(), ""), "'%s' is not a '%s'", ots, cs);
+			set_caret_label(cl);
+			error(operand.expr, "Argument's type '%s' does not satisfy the polymorphic constraint '%s'", ots, cs);
+			gb_string_free(cl);
+			gb_string_free(cs);
+		} else {
+			error(operand.expr, "Cannot determine polymorphic type from parameter: '%s' to '%s'", ots, pts);
+		}
 
 		Type *pt = poly_type;
 		while (pt && pt->kind == Type_Generic && pt->Generic.specialized) {

From 9205bf3bb4d87007553c5c5dff700ba25c90927e Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 01:42:25 +0100
Subject: [PATCH 103/215] Fix comparison with `#sparse`

---
 src/types.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/types.cpp b/src/types.cpp
index bcac2972a..6408669b0 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -3257,7 +3257,9 @@ gb_internal bool are_types_identical_internal(Type *x, Type *y, bool check_tuple
 		return x->Basic.kind == y->Basic.kind;
 
 	case Type_EnumeratedArray:
-		return are_types_identical(x->EnumeratedArray.index, y->EnumeratedArray.index) &&
+		return x->EnumeratedArray.count     == y->EnumeratedArray.count &&
+		       x->EnumeratedArray.is_sparse == y->EnumeratedArray.is_sparse &&
+		       are_types_identical(x->EnumeratedArray.index, y->EnumeratedArray.index) &&
 		       are_types_identical(x->EnumeratedArray.elem,  y->EnumeratedArray.elem);
 
 	case Type_Array:

From 2b722879ce4be143a9ba1d9b48d31d306d9176b5 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 01:53:11 +0100
Subject: [PATCH 104/215] parapoly: If the source is already a concrete
 instantiation of this same record, use it directly.

---
 src/check_type.cpp | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index b4819979e..6a2a36640 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -2644,6 +2644,21 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 			orig = pb->Union.polymorphic_parent;
 		}
 		GB_ASSERT(orig != nullptr && p_tuple != nullptr);
+
+		// If the source is already a concrete instantiation of this same record, use it directly. This
+		// is both faster and handles records whose polymorphic argument is itself a compound type (e.g.
+		// `Pair([2]$T)` or `Pair([E]$T)`), which the substitution-based lookup below cannot reconstruct
+		// (its parameter is an array, not a bare `$T`).
+		if (source != nullptr && !is_type_polymorphic(source)) {
+			Type *sb = base_type(source);
+			Type *sorig = (sb->kind == Type_Struct) ? sb->Struct.polymorphic_parent
+			            : (sb->kind == Type_Union)  ? sb->Union.polymorphic_parent
+			            :                             nullptr;
+			if (sorig != nullptr && sorig == orig) {
+				return source;
+			}
+		}
+
 		GenTypesData *gt = ensure_polymorphic_record_entity_has_gen_types(c, orig);
 		mutex_lock(&gt->mutex);
 		Entity *found = find_polymorphic_record_by_subst(gt, p_tuple, subst);

From a5bef5224cece7289521cb2b57b51d89576b3292 Mon Sep 17 00:00:00 2001
From: Ihor Antonov <ngor@hugpoint.tech>
Date: Wed, 30 Sep 2026 19:17:47 -0700
Subject: [PATCH 105/215] core: add unpadded base64 encoding

core:encoding/base64 can only produce padded output, so callers that need
the canonical unpadded ("raw") form -- JOSE base64url, Go's
RawStdEncoding/RawURLEncoding -- have to encode and then trim, which
forces an extra allocation and cleanup dance around the returned string.

Add an Encode_Options bit set, mirroring Decode_Options, and honor
{.No_Padding} in `encode`, `encode_into_buf`, `encode_into`, and
`encoded_len`. Existing calls and padded output are unchanged.

Tests cover the RFC 4648 section 9 illustrations and section 10 test
vectors across the standard and URL alphabets, padded and raw, plus Go's
reference corpus. Newline characters are asserted to be rejected per
RFC 4648 section 3.3. Comments in `encode_impl` document the 24-bit group
packing and the padding decision for partial groups.
---
 core/encoding/base64/base64.odin       |  90 +++++++--
 tests/core/encoding/base64/base64.odin | 260 +++++++++++++++++++++++++
 2 files changed, 331 insertions(+), 19 deletions(-)

diff --git a/core/encoding/base64/base64.odin b/core/encoding/base64/base64.odin
index ecfe1adba..c1e2b6832 100644
--- a/core/encoding/base64/base64.odin
+++ b/core/encoding/base64/base64.odin
@@ -4,8 +4,10 @@
 A secondary param can be used to supply a custom alphabet to `encode` and a matching decoding table to `decode`.
 
 If none is supplied it just uses the standard Base64 alphabet.
-In case your specific version does not use padding, you may
-truncate it from the encoded output.
+
+By default `encode` emits padding. Encode options can omit it: with
+`{.No_Padding}` the output is the canonical unpadded ("raw") form of
+RFC 4648 section 3.2, and `encoded_len` reports the shorter length.
 
 By default `decode` is lenient, accepting padded and unpadded input and not
 checking the trailing padding bits. Decode options can enable strict
@@ -145,14 +147,25 @@ Decode_Option :: enum {
 // Decode_Options is a set of Decode_Option values.
 Decode_Options :: bit_set[Decode_Option; u8]
 
-encode :: proc(data: []byte, ENC_TBL := ENC_TABLE, allocator := context.allocator) -> (encoded: string, err: runtime.Allocator_Error) #optional_allocator_error {
-	out_length := encoded_len(data)
+// Encode_Option selects optional behavior of the encode routines.
+Encode_Option :: enum {
+	// No_Padding omits the padding character from the output (RFC 4648
+	// section 3.2), producing the canonical unpadded ("raw") form.
+	// Combine with ENC_URL_TABLE for unpadded base64url, as used by JOSE.
+	No_Padding,
+}
+
+// Encode_Options is a set of Encode_Option values.
+Encode_Options :: bit_set[Encode_Option; u8]
+
+encode :: proc(data: []byte, ENC_TBL := ENC_TABLE, allocator := context.allocator, options := Encode_Options{}) -> (encoded: string, err: runtime.Allocator_Error) #optional_allocator_error {
+	out_length := encoded_len(data, options)
 	if out_length == 0 {
 		return
 	}
 
 	out := make([]byte, out_length, allocator) or_return
-	_, ioerr := encode_impl(out, data, ENC_TBL)
+	_, ioerr := encode_impl(out, data, ENC_TBL, options)
 	assert(ioerr == nil, "encode should not IO error")
 	assert(len(out) == out_length, "buffer resized, `encoded_len` was wrong")
 
@@ -161,25 +174,25 @@ encode :: proc(data: []byte, ENC_TBL := ENC_TABLE, allocator := context.allocato
 	return
 }
 
-encode_into_buf :: proc(dst, data: []byte, ENC_TBL := ENC_TABLE) -> (encoded: []byte, err: Error) {
-	out_length := encoded_len(data)
+encode_into_buf :: proc(dst, data: []byte, ENC_TBL := ENC_TABLE, options := Encode_Options{}) -> (encoded: []byte, err: Error) {
+	out_length := encoded_len(data, options)
 	if out_length == 0 {
 		return
 	}
 
-	return encode_impl(dst, data, ENC_TBL)
+	return encode_impl(dst, data, ENC_TBL, options)
 }
 
-encode_into :: proc(w: io.Writer, data: []byte, ENC_TBL := ENC_TABLE) -> io.Error {
-	_, err := encode_impl(w, data, ENC_TBL)
+encode_into :: proc(w: io.Writer, data: []byte, ENC_TBL := ENC_TABLE, options := Encode_Options{}) -> io.Error {
+	_, err := encode_impl(w, data, ENC_TBL, options)
 	return err
 }
 
 @(private)
-encode_impl :: proc(dst: $T, data: []byte, ENC_TBL := ENC_TABLE) -> ([]byte, io.Error) where T == io.Writer || T == []byte {
+encode_impl :: proc(dst: $T, data: []byte, ENC_TBL := ENC_TABLE, options := Encode_Options{}) -> ([]byte, io.Error) where T == io.Writer || T == []byte {
 	length := len(data)
 	when T == []byte {
-		out_length := encoded_len(data)
+		out_length := encoded_len(data, options)
 		if len(dst) < out_length {
 			return nil, io.Error.Short_Buffer
 		}
@@ -191,7 +204,9 @@ encode_impl :: proc(dst: $T, data: []byte, ENC_TBL := ENC_TABLE) -> ([]byte, io.
 		buf: [4]byte
 	}
 
-	c0, c1, c2, block: int
+	// c0, c1, c2 are the group's input bytes; -1 marks a missing byte, which
+	// is how a partial (final) group is identified.
+	c0, c1, c2, block, write: int
 	for i := 0; i < length; i += 3 {
 		#no_bounds_check {
 			c0, c1, c2 = int(data[i]), -1, -1
@@ -199,18 +214,44 @@ encode_impl :: proc(dst: $T, data: []byte, ENC_TBL := ENC_TABLE) -> ([]byte, io.
 			if i + 1 < length { c1 = int(data[i + 1]) }
 			if i + 2 < length { c2 = int(data[i + 2]) }
 
+			// Pack the group into a 24-bit value, most significant input
+			// byte first; missing bytes contribute zero bits, as RFC 4648
+			// section 4 requires.
 			block = (c0 << 16) | (max(c1, 0) << 8) | max(c2, 0)
 
+			// Characters the final block carries once padding is dropped:
+			// four for a full group, two (one input byte) or three (two
+			// input bytes) for a partial one.
+			emit := 4
+			if c1 == -1 {
+				emit = 2
+			} else if c2 == -1 {
+				emit = 3
+			}
+
+			// Padded output still writes a full four-character block, with
+			// PADDING where the group ran out of input bytes.
+			write = emit
+			if .No_Padding not_in options {
+				write = 4
+			}
+
+			// The output characters, most significant six bits first;
+			// PADDING replaces the characters a partial group lacks.
 			buf[0] = ENC_TBL[block >> 18 & 63]
 			buf[1] = ENC_TBL[block >> 12 & 63]
-			buf[2] = c1 == -1 ? PADDING : ENC_TBL[block >> 6 & 63]
-			buf[3] = c2 == -1 ? PADDING : ENC_TBL[block & 63]
+			if write > 2 {
+				buf[2] = c1 == -1 ? PADDING : ENC_TBL[block >> 6 & 63]
+				if write > 3 {
+					buf[3] = c2 == -1 ? PADDING : ENC_TBL[block & 63]
+				}
+			}
 			when T == []byte {
-				buf = buf[4:]
+				buf = buf[write:]
 			}
 		}
 		when T == io.Writer {
-			if _, err := io.write_full(dst, buf[:]); err != nil {
+			if _, err := io.write_full(dst, buf[:write]); err != nil {
 				return nil, err
 			}
 		}
@@ -223,13 +264,24 @@ encode_impl :: proc(dst: $T, data: []byte, ENC_TBL := ENC_TABLE) -> ([]byte, io.
 	}
 }
 
-encoded_len :: proc(data: []byte) -> int {
+encoded_len :: proc(data: []byte, options := Encode_Options{}) -> int {
 	length := len(data)
 	if length == 0 {
 		return 0
 	}
 
-	return ((4 * length / 3) + 3) &~ 3
+	padded := ((4 * length / 3) + 3) &~ 3
+	if .No_Padding not_in options {
+		return padded
+	}
+
+	switch length % 3 {
+	case 1:
+		return padded - 2
+	case 2:
+		return padded - 1
+	}
+	return padded
 }
 
 @(private)
diff --git a/tests/core/encoding/base64/base64.odin b/tests/core/encoding/base64/base64.odin
index 0ef1e61cc..b842b0120 100644
--- a/tests/core/encoding/base64/base64.odin
+++ b/tests/core/encoding/base64/base64.odin
@@ -2,6 +2,7 @@ package test_encoding_base64
 
 import "base:intrinsics"
 import "core:encoding/base64"
+import "core:io"
 import "core:strings"
 import "core:testing"
 
@@ -245,3 +246,262 @@ test_strict_is_optional :: proc(t: ^testing.T) {
 		delete(decoded)
 	}
 }
+
+@(test)
+test_encoding_no_padding :: proc(t: ^testing.T) {
+	cases := []Test{
+		{"",       ""},
+		{"f",      "Zg"},
+		{"fo",     "Zm8"},
+		{"foo",    "Zm9v"},
+		{"foob",   "Zm9vYg"},
+		{"fooba",  "Zm9vYmE"},
+		{"foobar", "Zm9vYmFy"},
+	}
+	for c in cases {
+		v := base64.encode(transmute([]byte)c.vector, options = {.No_Padding})
+		defer delete(v)
+		testing.expectf(t, v == c.base64, "encode(%q, raw): got %q, want %q", c.vector, v, c.base64)
+	}
+
+	url_cases := []Test{
+		{">>>",     "Pj4-"},
+		{"\xFB\xEF", "--8"},
+	}
+	for c in url_cases {
+		v := base64.encode(transmute([]byte)c.vector, base64.ENC_URL_TABLE, options = {.No_Padding})
+		defer delete(v)
+		testing.expectf(t, v == c.base64, "encode url(%q, raw): got %q, want %q", c.vector, v, c.base64)
+	}
+}
+
+@(test)
+test_encoding_no_padding_roundtrip :: proc(t: ^testing.T) {
+	values: [1024]u8
+	for &v, i in values[:] {
+		v = u8(i)
+	}
+
+	tables := []struct {
+		enc: [64]byte,
+		dec: [256]i8,
+	} {
+		{base64.ENC_TABLE, base64.DEC_TABLE},
+		{base64.ENC_URL_TABLE, base64.DEC_URL_TABLE},
+	}
+
+	for table, ti in tables {
+		for n in 0 ..= len(values) {
+			data := values[:n]
+
+			padded := base64.encode(data, table.enc)
+			raw := base64.encode(data, table.enc, options = {.No_Padding})
+
+			if !testing.expectf(t, raw == strings.trim_right(padded, "="), "table %d n=%d: raw %q, padded %q", ti, n, raw, padded) {
+				delete(padded)
+				delete(raw)
+				continue
+			}
+			testing.expectf(t, base64.encoded_len(data, {.No_Padding}) == len(raw), "table %d n=%d: encoded_len %d, raw len %d", ti, n, base64.encoded_len(data, {.No_Padding}), len(raw))
+			testing.expectf(t, strings.index_byte(raw, '=') < 0, "table %d n=%d: raw output contains padding: %q", ti, n, raw)
+
+			decoded, err := base64.decode(raw, table.dec, options = {.Strict, .No_Padding})
+			if testing.expectf(t, err == nil, "table %d n=%d: strict raw decode: %v", ti, n, err) {
+				testing.expectf(t, string(decoded) == string(data), "table %d n=%d: raw roundtrip mismatch", ti, n)
+				delete(decoded)
+			}
+
+			delete(padded)
+			delete(raw)
+		}
+	}
+}
+
+@(test)
+test_encoding_no_padding_into_buf :: proc(t: ^testing.T) {
+	data := []byte{0xFB, 0xEF, 0xFF, 0x01, 0x7A, 0x00}
+
+	for n in 0 ..= len(data) {
+		raw_len := base64.encoded_len(data[:n], {.No_Padding})
+
+		// The tail is a canary: raw output must not write pad bytes past
+		// the advertised length, even with a buffer that covers them.
+		canary: [64]byte
+		for &b in canary {
+			b = 0xA5
+		}
+
+		encoded, err := base64.encode_into_buf(canary[:raw_len], data[:n], options = {.No_Padding})
+		if !testing.expectf(t, err == nil, "n=%d: encode_into_buf: %v", n, err) {
+			continue
+		}
+		testing.expectf(t, len(encoded) == raw_len, "n=%d: returned %d bytes, want %d", n, len(encoded), raw_len)
+
+		for b, i in canary[raw_len:] {
+			testing.expectf(t, b == 0xA5, "n=%d: byte %d past raw output overwritten: %x", n, raw_len + i, b)
+		}
+
+		decoded, derr := base64.decode(string(encoded), options = {.Strict, .No_Padding})
+		if testing.expectf(t, derr == nil, "n=%d: decode: %v", n, derr) {
+			testing.expectf(t, string(decoded) == string(data[:n]), "n=%d: roundtrip mismatch", n)
+			delete(decoded)
+		}
+
+		if raw_len > 0 {
+			_, serr := base64.encode_into_buf(canary[:raw_len - 1], data[:n], options = {.No_Padding})
+			testing.expectf(t, serr == io.Error.Short_Buffer, "n=%d: short buffer: %v", n, serr)
+		}
+	}
+}
+
+@(test)
+test_encoding_no_padding_into :: proc(t: ^testing.T) {
+	builder: strings.Builder
+	strings.builder_init(&builder)
+	defer strings.builder_destroy(&builder)
+
+	foob := "foob"
+	err := base64.encode_into(strings.to_writer(&builder), transmute([]byte)foob, options = {.No_Padding})
+	testing.expect_value(t, err, nil)
+	testing.expect_value(t, strings.to_string(builder), "Zm9vYg")
+
+	// A full block followed by a two-character tail.
+	builder2: strings.Builder
+	strings.builder_init(&builder2)
+	defer strings.builder_destroy(&builder2)
+
+	fooba := "fooba"
+	err = base64.encode_into(strings.to_writer(&builder2), transmute([]byte)fooba, base64.ENC_URL_TABLE, options = {.No_Padding})
+	testing.expect_value(t, err, nil)
+	testing.expect_value(t, strings.to_string(builder2), "Zm9vYmE")
+
+	// Empty input writes nothing.
+	builder3: strings.Builder
+	strings.builder_init(&builder3)
+	defer strings.builder_destroy(&builder3)
+
+	err = base64.encode_into(strings.to_writer(&builder3), nil, options = {.No_Padding})
+	testing.expect_value(t, err, nil)
+	testing.expect_value(t, strings.to_string(builder3), "")
+}
+
+// Transforms a canonical padded standard-alphabet vector into the URL-safe
+// alphabet (RFC 4648 section 5, Table 2) and/or the unpadded form (section
+// 3.2), mirroring the reference-string converters of Go's encoding/base64
+// tests. The result lives in the temp allocator.
+_transform_reference :: proc(encoded: string, url, raw: bool) -> string {
+	s := encoded
+	if url {
+		s, _ = strings.replace_all(s, "+", "-", allocator = context.temp_allocator)
+		s, _ = strings.replace_all(s, "/", "_", allocator = context.temp_allocator)
+	}
+	if raw {
+		s = strings.trim_right(s, "=")
+	}
+	return s
+}
+
+@(test)
+test_rfc4648_and_go_vectors :: proc(t: ^testing.T) {
+	vectors := []Test{
+		// RFC 4648 section 9 illustrations (also the RFC 3548 examples in
+		// Go's encoding/base64 tests). These cover all three padding cases
+		// and exercise index 62 '+', which separates the URL alphabet.
+		{"\x14\xFB\x9C\x03\xD9\x7E", "FPucA9l+"},
+		{"\x14\xFB\x9C\x03\xD9",     "FPucA9k="},
+		{"\x14\xFB\x9C\x03",         "FPucAw=="},
+
+		// RFC 4648 section 10 test vectors.
+		{"",       ""},
+		{"f",      "Zg=="},
+		{"fo",     "Zm8="},
+		{"foo",    "Zm9v"},
+		{"foob",   "Zm9vYg=="},
+		{"fooba",  "Zm9vYmE="},
+		{"foobar", "Zm9vYmFy"},
+
+		// "Wikipedia examples", via Go's encoding/base64 tests.
+		{"sure.",    "c3VyZS4="},
+		{"sure",     "c3VyZQ=="},
+		{"sur",      "c3Vy"},
+		{"su",       "c3U="},
+		{"leasure.", "bGVhc3VyZS4="},
+		{"easure.",  "ZWFzdXJlLg=="},
+		{"asure.",   "YXN1cmUu"},
+
+		// Go's bigtest.
+		{"Twas brillig, and the slithy toves", "VHdhcyBicmlsbGlnLCBhbmQgdGhlIHNsaXRoeSB0b3Zlcw=="},
+	}
+
+	variants := []struct {
+		name:     string,
+		enc:      [64]byte,
+		dec:      [256]i8,
+		options:  base64.Encode_Options,
+		doptions: base64.Decode_Options,
+		url:      bool,
+		raw:      bool,
+	} {
+		{"std",     base64.ENC_TABLE,     base64.DEC_TABLE,     {},            {.Strict},              false, false},
+		{"url",     base64.ENC_URL_TABLE, base64.DEC_URL_TABLE, {},            {.Strict},              true,  false},
+		{"raw",     base64.ENC_TABLE,     base64.DEC_TABLE,     {.No_Padding}, {.Strict, .No_Padding}, false, true},
+		{"raw url", base64.ENC_URL_TABLE, base64.DEC_URL_TABLE, {.No_Padding}, {.Strict, .No_Padding}, true,  true},
+	}
+
+	for v in vectors {
+		for variant in variants {
+			expected := _transform_reference(v.base64, variant.url, variant.raw)
+
+			encoded := base64.encode(transmute([]byte)v.vector, variant.enc, options = variant.options)
+			testing.expectf(t, encoded == expected, "%s encode(%q): got %q, want %q", variant.name, v.vector, encoded, expected)
+			testing.expectf(t, base64.encoded_len(transmute([]byte)v.vector, variant.options) == len(expected), "%s encoded_len(%q): got %d, want %d", variant.name, v.vector, base64.encoded_len(transmute([]byte)v.vector, variant.options), len(expected))
+			delete(encoded)
+
+			decoded, err := base64.decode(expected, variant.dec, options = variant.doptions)
+			if testing.expectf(t, err == nil, "%s decode(%q): %v", variant.name, expected, err) {
+				testing.expectf(t, string(decoded) == v.vector, "%s decode(%q): got %q, want %q", variant.name, expected, decoded, v.vector)
+			}
+			delete(decoded)
+		}
+	}
+}
+
+@(test)
+test_newline_rejected :: proc(t: ^testing.T) {
+	// Inputs from Go's TestNewLineCharacters. Go's decoder deliberately ignores
+	// "\r" and "\n" (MIME legacy); RFC 4648 section 3.3 says implementations
+	// MUST reject characters outside the alphabet, so Odin must not accept them.
+	// The strict validator checks structure before the alphabet, so only the
+	// fact of rejection is asserted here.
+	strict_cases := []string{
+		"c3VyZQ==\r",
+		"c3VyZQ==\n",
+		"c3VyZQ==\r\n",
+		"c3VyZ\r\nQ==",
+		"c3V\ryZ\nQ==",
+		"c3V\nyZ\rQ==",
+		"c3VyZ\nQ==",
+		"c3VyZQ\n==",
+		"c3VyZQ=\n=",
+		"c3VyZQ=\r\n\r\n=",
+	}
+	for c in strict_cases {
+		decoded, err := base64.decode(c, options = {.Strict})
+		testing.expectf(t, err != nil, "strict decode(%q): expected rejection, got %q", c, decoded)
+		delete(decoded)
+	}
+
+	// Lenient mode only scans the input span `decoded_len` implies, so bytes
+	// past the decoded tail are not always inspected (e.g. "c3VyZQ\n=="
+	// currently decodes to "sure"); interior ones are always seen.
+	lenient_cases := []string{
+		"c3VyZQ==\n",
+		"c3VyZQ=\n=",
+		"c3V\ryZ\rQ==",
+	}
+	for c in lenient_cases {
+		decoded, err := base64.decode(c)
+		testing.expectf(t, err == base64.Decode_Error.Invalid_Character, "lenient decode(%q): got %v, want Invalid_Character", c, err)
+		testing.expect(t, decoded == nil)
+	}
+}

From 98203dbd56d925574e916b3ff31c5d629ab109e0 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 09:27:34 +0100
Subject: [PATCH 106/215] parapoly: remove the in-place polymorphic match;
 substitution engine is now the only resolver

---
 src/check_builtin.cpp |   2 +-
 src/check_expr.cpp    | 398 +-----------------------------------------
 src/check_type.cpp    | 254 +++++----------------------
 3 files changed, 44 insertions(+), 610 deletions(-)

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 5dcec083a..6777ca8b1 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -7496,7 +7496,7 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 			operand->type = t_untyped_bool;
 			bool is_specialization = false;
 			if (!are_types_identical(s, t)) {
-				is_specialization = check_type_specialization_to(c, s, t, false, false);
+				is_specialization = subst_check_specialization(c, s, t, /*modify_type*/false);
 			}
 			operand->value = exact_value_bool(is_specialization);
 
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 6ff54a624..5e27cc82d 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -747,8 +747,8 @@ gb_internal bool find_or_generate_polymorphic_procedure_from_parameters(CheckerC
 	return find_or_generate_polymorphic_procedure(c, base_entity, nullptr, operands, poly_def_node, poly_proc_data);
 }
 
-gb_internal bool check_type_specialization_to(CheckerContext *c, Type *specialization, Type *type, bool compound, bool modify_type, bool finalize = true);
-gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, Type *source, bool compound, bool modify_type);
+gb_internal bool subst_poly_assignable(CheckerContext *c, Type *pattern, Type *source, bool modify_type);
+gb_internal bool subst_check_specialization(CheckerContext *ctx, Type *specialization, Type *type, bool modify_type);
 gb_internal bool check_cast_internal(CheckerContext *c, Operand *x, Type *type);
 gb_internal bool check_proc_params_assignable(CheckerContext *c, Type *x, Type *y);
 
@@ -955,7 +955,7 @@ gb_internal i64 check_distance_between_types(CheckerContext *c, Operand *operand
 
 	if (is_type_polymorphic(dst) && !is_type_polymorphic(src)) {
 		bool modify_type = !c->no_polymorphic_errors;
-		if (is_polymorphic_type_assignable(c, type, s, false, modify_type)) {
+		if (subst_poly_assignable(c, type, s, modify_type)) {
 			return 2;
 		}
 	}
@@ -1521,398 +1521,6 @@ gb_internal bool polymorphic_assign_index(Type **gt_, i64 *dst_count, i64 source
 	return false;
 }
 
-// In-place matcher: mutates `poly` to bind its polymorphic vars to `source`. This is NOT the primary
-// resolver — the substitution engine in check_type.cpp handles determine_type_from_polymorphic (both
-// the resolve and the probe) and spec-conformance (subst_check_specialization / subst_unify_constraint),
-// and as of the constraint fix it covers those completely: instrumentation shows this matcher produces
-// no successful result in either path across the stdlib. It is still genuinely reached from:
-//   * check_distance_between_types (assignability scoring for overload resolution),
-//   * the type_is_specialization_of intrinsic (via check_type_specialization_to),
-//   * and as the never-succeeding Subst_Unhandled fallback of the two paths above (genuine subtyping and
-//     untyped/conversion cases the engine defers rather than resolves).
-// Deleting it outright would require reimplementing subtyping and conversion matching in the engine.
-gb_internal bool is_polymorphic_type_assignable(CheckerContext *c, Type *poly, Type *source, bool compound, bool modify_type) {
-	Operand o = {Addressing_Value};
-	o.type = source;
-	switch (poly->kind) {
-	case Type_Basic:
-		if (compound) return are_types_identical(poly, source);
-		return check_is_assignable_to(c, &o, poly);
-
-	case Type_Named: {
-		if (check_type_specialization_to(c, poly, source, compound, modify_type)) {
-			return true;
-		}
-		if (compound || !is_type_generic(poly)) {
-			return are_types_identical(poly, source);
-		}
-		return check_is_assignable_to(c, &o, poly);
-	}
-
-	case Type_Generic: {
-		if (poly->Generic.specialized != nullptr) {
-			Type *s = poly->Generic.specialized;
-			if (!check_type_specialization_to(c, s, source, compound, modify_type)) {
-				return false;
-			}
-		}
-		if (modify_type) {
-			Type *ds = default_type(source);
-			gb_memmove(poly, ds, gb_size_of(Type));
-		}
-		return true;
-	}
-	case Type_Pointer:
-		if (source->kind == Type_Pointer) {
-			isize level = check_is_assignable_to_using_subtype(source->Pointer.elem, poly->Pointer.elem, /*level*/0, /*src_is_ptr*/false, /*allow_polymorphic*/true);
-			if (level > 0) {
-				return true;
-			}
-			return is_polymorphic_type_assignable(c, poly->Pointer.elem, source->Pointer.elem, true, modify_type);
-		} else if (source->kind == Type_MultiPointer) {
-			isize level = check_is_assignable_to_using_subtype(source->MultiPointer.elem, poly->Pointer.elem);
-			if (level > 0) {
-				return true;
-			}
-			return is_polymorphic_type_assignable(c, poly->Pointer.elem, source->MultiPointer.elem, true, modify_type);
-		}
-		return false;
-
-	case Type_MultiPointer:
-		if (source->kind == Type_MultiPointer) {
-			isize level = check_is_assignable_to_using_subtype(source->MultiPointer.elem, poly->MultiPointer.elem);
-			if (level > 0) {
-				return true;
-			}
-			return is_polymorphic_type_assignable(c, poly->MultiPointer.elem, source->MultiPointer.elem, true, modify_type);
-		} else if (source->kind == Type_Pointer) {
-			isize level = check_is_assignable_to_using_subtype(source->Pointer.elem, poly->MultiPointer.elem);
-			if (level > 0) {
-				return true;
-			}
-			return is_polymorphic_type_assignable(c, poly->MultiPointer.elem, source->Pointer.elem, true, modify_type);
-		}
-		return false;
-
-	case Type_SoaPointer:
-		if (source->kind == Type_SoaPointer) {
-			isize level = check_is_assignable_to_using_subtype(source->SoaPointer.elem, poly->SoaPointer.elem, /*level*/0, /*src_is_ptr*/false, /*allow_polymorphic*/true);
-			if (level > 0) {
-				return true;
-			}
-			return is_polymorphic_type_assignable(c, poly->SoaPointer.elem, source->SoaPointer.elem, true, modify_type);
-		}
-		return false;
-
-	case Type_Array:
-		if (source->kind == Type_Array) {
-			Type *generic_count = poly->Array.generic_count;
-			i64 count = poly->Array.count;
-			if (generic_count != nullptr) {
-				if (!polymorphic_assign_index(&generic_count, &count, source->Array.count, modify_type)) {
-					return false;
-				}
-				if (modify_type) {
-					poly->Array.generic_count = generic_count;
-					poly->Array.count = count;
-				}
-			}
-			if (count == source->Array.count) {
-				return is_polymorphic_type_assignable(c, poly->Array.elem, source->Array.elem, true, modify_type);
-			}
-		} else if (source->kind == Type_EnumeratedArray) {
-			if (poly->Array.generic_count != nullptr) {
-				Type *gt = poly->Array.generic_count;
-				GB_ASSERT(gt->kind == Type_Generic);
-				Entity *e = scope_lookup(gt->Generic.scope, gt->Generic.interned_name, 0);
-				GB_ASSERT(e != nullptr);
-				if (e->kind == Entity_TypeName) {
-					Type *index = source->EnumeratedArray.index;
-					Type *it = base_type(index);
-					if (it->kind != Type_Enum) {
-						return false;
-					}
-					if (!modify_type) {
-						return is_polymorphic_type_assignable(c, poly->Array.elem, source->EnumeratedArray.elem, true, false);
-					}
-
-					// Resolve `[$N]$T` to an enumerated array by constructing the concrete node
-					// (keeping the $T element node) and finalizing poly to it, rather than rewriting
-					// poly's kind and fields one at a time.
-					Type *poly_elem = poly->Array.elem;
-					Type *ea = alloc_type_enumerated_array(poly_elem, index,
-						source->EnumeratedArray.min_value, source->EnumeratedArray.max_value,
-						source->EnumeratedArray.count, source->EnumeratedArray.op);
-					ea->flags.exchange(source->flags);
-					gb_memmove(poly, ea, gb_size_of(Type));
-
-					e->kind = Entity_TypeName;
-					e->TypeName.is_type_alias = true;
-					e->type = index;
-
-					if (poly->EnumeratedArray.count == source->EnumeratedArray.count) {
-						return is_polymorphic_type_assignable(c, poly->EnumeratedArray.elem, source->EnumeratedArray.elem, true, modify_type);
-					}
-				}
-			}
-		}
-		return false;
-	case Type_EnumeratedArray:
-		if (source->kind == Type_EnumeratedArray) {
-			if (poly->EnumeratedArray.op != source->EnumeratedArray.op) {
-				return false;
-			}
-			if (poly->EnumeratedArray.op) {
-				if (poly->EnumeratedArray.count != source->EnumeratedArray.count) {
-					return false;
-				}
-				if (compare_exact_values(Token_NotEq, *poly->EnumeratedArray.min_value, *source->EnumeratedArray.min_value)) {
-					return false;
-				}
-				if (compare_exact_values(Token_NotEq, *poly->EnumeratedArray.max_value, *source->EnumeratedArray.max_value)) {
-					return false;
-				}
-				return is_polymorphic_type_assignable(c, poly->EnumeratedArray.index, source->EnumeratedArray.index, true, modify_type);
-			}
-			// Evaluate both (for modify_type side effects) but require both to match.
-			bool index = is_polymorphic_type_assignable(c, poly->EnumeratedArray.index, source->EnumeratedArray.index, true, modify_type);
-			bool elem  = is_polymorphic_type_assignable(c, poly->EnumeratedArray.elem, source->EnumeratedArray.elem, true, modify_type);
-			return index && elem;
-		}
-		return false;
-
-	case Type_DynamicArray:
-		if (source->kind == Type_DynamicArray) {
-			return is_polymorphic_type_assignable(c, poly->DynamicArray.elem, source->DynamicArray.elem, true, modify_type);
-		}
-		return false;
-
-	case Type_FixedCapacityDynamicArray:
-		if (source->kind == Type_FixedCapacityDynamicArray) {
-			Type *generic_capacity = poly->FixedCapacityDynamicArray.generic_capacity;
-			i64 capacity = poly->FixedCapacityDynamicArray.capacity;
-			if (generic_capacity != nullptr) {
-				if (!polymorphic_assign_index(&generic_capacity, &capacity, source->FixedCapacityDynamicArray.capacity, modify_type)) {
-					return false;
-				}
-				if (modify_type) {
-					poly->FixedCapacityDynamicArray.generic_capacity = generic_capacity;
-					poly->FixedCapacityDynamicArray.capacity = capacity;
-				}
-			}
-			if (capacity == source->FixedCapacityDynamicArray.capacity) {
-				return is_polymorphic_type_assignable(c, poly->FixedCapacityDynamicArray.elem, source->FixedCapacityDynamicArray.elem, true, modify_type);
-			}
-		}
-		return false;
-
-	case Type_Slice:
-		if (source->kind == Type_Slice) {
-			return is_polymorphic_type_assignable(c, poly->Slice.elem, source->Slice.elem, true, modify_type);
-		}
-		return false;
-
-	case Type_Enum:
-		return false;
-
-	case Type_BitSet:
-		if (source->kind == Type_BitSet) {
-			if (!is_type_polymorphic(poly->BitSet.elem)) {
-				if (poly->BitSet.upper != source->BitSet.upper || poly->BitSet.lower != source->BitSet.lower) {
-					return false;
-				}
-			}
-			if (!is_polymorphic_type_assignable(c, poly->BitSet.elem, source->BitSet.elem, true, modify_type)) {
-				return false;
-			}
-			
-			// For generic types like bit_set[$T] the upper and lower of the poly type will be zeroes since
-			// it could not figure that stuff out when the poly type was created.
-			if (poly->BitSet.upper == 0 && modify_type) {
-				poly->BitSet.upper = source->BitSet.upper;
-			}
-			if (poly->BitSet.lower == 0 && modify_type) {
-				poly->BitSet.lower = source->BitSet.lower;
-			}
-
-			if (poly->BitSet.underlying == nullptr) {
-				if (modify_type) {
-					poly->BitSet.underlying = source->BitSet.underlying;
-				}
-			} else if (!is_polymorphic_type_assignable(c, poly->BitSet.underlying, source->BitSet.underlying, true, modify_type)) {
-				return false;
-			}
-			return true;
-		}
-		return false;
-
-	case Type_Union:
-		if (source->kind == Type_Union) {
-			TypeUnion *x = &poly->Union;
-			TypeUnion *y = &source->Union;
-			if (x->variants.count != y->variants.count) {
-				return false;
-			}
-			for_array(i, x->variants) {
-				Type *a = x->variants[i];
-				Type *b = y->variants[i];
-				bool ok = is_polymorphic_type_assignable(c, a, b, false, modify_type);
-				if (!ok) return false;
-			}
-			return true;
-		}
-		return false;
-
-	case Type_Struct:
-		if (source->kind == Type_Struct) {
-			if (poly->Struct.soa_kind == source->Struct.soa_kind &&
-			    poly->Struct.soa_kind != StructSoa_None) {
-				bool ok = is_polymorphic_type_assignable(c, poly->Struct.soa_elem, source->Struct.soa_elem, true, modify_type);
-				if (ok) switch (source->Struct.soa_kind) {
-				case StructSoa_None:
-				default:
-					GB_PANIC("Unhandled SOA Kind");
-					break;
-				case StructSoa_Fixed:
-					if (modify_type) {
-						Type *type = make_soa_struct_fixed(c, nullptr, poly->Struct.node, poly->Struct.soa_elem, poly->Struct.soa_count, nullptr);
-						gb_memmove(poly, type, gb_size_of(*type));
-					}
-					break;
-				case StructSoa_Slice:
-					if (modify_type) {
-						Type *type = make_soa_struct_slice(c, nullptr, poly->Struct.node, poly->Struct.soa_elem);
-						gb_memmove(poly, type, gb_size_of(*type));
-					}
-					break;
-				case StructSoa_Dynamic:
-					if (modify_type) {
-						Type *type = make_soa_struct_dynamic_array(c, nullptr, poly->Struct.node, poly->Struct.soa_elem);
-						gb_memmove(poly, type, gb_size_of(*type));
-					}
-					break;
-				}
-				return ok;
-
-			}
-
-			// NOTE(bill): Check for subtypes of
-			// return check_is_assignable_to(c, &o, poly); // && is_type_subtype_of_and_allow_polymorphic(o.type, poly);
-		}
-		return false;
-
-	case Type_BitField:
-		if (source->kind == Type_BitField) {
-			return is_polymorphic_type_assignable(c, poly->BitField.backing_type, source->BitField.backing_type, true, modify_type);
-		}
-		return false;
-
-	case Type_Tuple:
-		GB_PANIC("This should never happen");
-		return false;
-	case Type_Proc:
-		if (source->kind == Type_Proc) {
-			TypeProc *x = &poly->Proc;
-			TypeProc *y = &source->Proc;
-			if (x->calling_convention != y->calling_convention) {
-				return false;
-			}
-			if (x->c_vararg != y->c_vararg) {
-				return false;
-			}
-			if (x->variadic != y->variadic) {
-				return false;
-			}
-			if (x->param_count != y->param_count) {
-				return false;
-			}
-			if (x->result_count != y->result_count) {
-				return false;
-			}
-
-			for (isize i = 0; i < x->param_count; i++) {
-				Entity *a = x->params->Tuple.variables[i];
-				Entity *b = y->params->Tuple.variables[i];
-				bool ok = is_polymorphic_type_assignable(c, a->type, b->type, false, modify_type);
-				if (!ok) return false;
-			}
-			for (isize i = 0; i < x->result_count; i++) {
-				Entity *a = x->results->Tuple.variables[i];
-				Entity *b = y->results->Tuple.variables[i];
-				bool ok = is_polymorphic_type_assignable(c, a->type, b->type, false, modify_type);
-				if (!ok) return false;
-			}
-
-			return true;
-		}
-		return false;
-	case Type_Map:
-		if (source->kind == Type_Map) {
-			// Evaluate both (for modify_type side effects) but require both to match.
-			bool key   = is_polymorphic_type_assignable(c, poly->Map.key, source->Map.key, true, modify_type);
-			bool value = is_polymorphic_type_assignable(c, poly->Map.value, source->Map.value, true, modify_type);
-			if (key && value) {
-				if (modify_type) {
-					poly->Map.lookup_result_type = nullptr;
-					init_map_internal_types(poly);
-				}
-				return true;
-			}
-		}
-		return false;
-		
-	case Type_Matrix:
-		if (source->kind == Type_Matrix) {
-			Type *generic_row_count = poly->Matrix.generic_row_count;
-			Type *generic_column_count = poly->Matrix.generic_column_count;
-			i64 row_count = poly->Matrix.row_count;
-			i64 column_count = poly->Matrix.column_count;
-			if (generic_row_count != nullptr) {
-				if (!polymorphic_assign_index(&generic_row_count, &row_count, source->Matrix.row_count, modify_type)) {
-					return false;
-				}
-			}
-			if (generic_column_count != nullptr) {
-				if (!polymorphic_assign_index(&generic_column_count, &column_count, source->Matrix.column_count, modify_type)) {
-					return false;
-				}
-			}
-			if (modify_type && (poly->Matrix.generic_row_count != nullptr || poly->Matrix.generic_column_count != nullptr)) {
-				poly->Matrix.generic_row_count = generic_row_count;
-				poly->Matrix.generic_column_count = generic_column_count;
-				poly->Matrix.row_count = row_count;
-				poly->Matrix.column_count = column_count;
-				poly->Matrix.stride_in_bytes = 0;
-			}
-			if (row_count == source->Matrix.row_count &&
-			    column_count == source->Matrix.column_count) {
-				return is_polymorphic_type_assignable(c, poly->Matrix.elem, source->Matrix.elem, true, modify_type);
-			}
-		} 
-		return false;
-
-	case Type_SimdVector:
-		if (source->kind == Type_SimdVector) {
-			Type *generic_count = poly->SimdVector.generic_count;
-			i64 count = poly->SimdVector.count;
-			if (generic_count != nullptr) {
-				if (!polymorphic_assign_index(&generic_count, &count, source->SimdVector.count, modify_type)) {
-					return false;
-				}
-				if (modify_type) {
-					poly->SimdVector.generic_count = generic_count;
-					poly->SimdVector.count = count;
-				}
-			}
-			if (count == source->SimdVector.count) {
-				return is_polymorphic_type_assignable(c, poly->SimdVector.elem, source->SimdVector.elem, true, modify_type);
-			}
-		}
-		return false;
-	}
-	return false;
-}
-
 gb_internal bool check_cycle(CheckerContext *c, Entity *curr, bool report) {
 	if (curr->state != EntityState_InProgress) {
 		return false;
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 6a2a36640..bfeeb287e 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1743,134 +1743,20 @@ gb_internal GenTypesData *gen_types_data_of_specialization(Type *specialization)
 	return nullptr;
 }
 
-gb_internal bool check_type_specialization_to_internal(CheckerContext *ctx, Type *specialization, Type *type, TypeTuple *s_tuple, TypeTuple *t_tuple, bool modify_type, bool finalize) {
-	GB_ASSERT(t_tuple->variables.count == s_tuple->variables.count);
-	for_array(i, s_tuple->variables) {
-		Entity *s_e = s_tuple->variables[i];
-		Entity *t_e = t_tuple->variables[i];
-		Type *st = s_e->type;
-		Type *tt = t_e->type;
-
-		// NOTE(bill, 2018-12-14): This is needed to override polymorphic named constants in types
-		if (st->kind == Type_Generic && t_e->kind == Entity_Constant) {
-			Entity *e = scope_lookup(st->Generic.scope, st->Generic.interned_name, 0);
-			GB_ASSERT(e != nullptr);
-			if (modify_type) {
-				e->kind = Entity_Constant;
-				e->Constant.value = t_e->Constant.value;
-				e->type = t_e->type;
-			}
-		} else {
-			if (st->kind == Type_Basic && tt->kind == Type_Basic &&
-				s_e->kind == Entity_Constant && t_e->kind == Entity_Constant) {
-				if (!compare_exact_values(Token_CmpEq, s_e->Constant.value, t_e->Constant.value))
-					return false;
-			} else {
-				bool ok = is_polymorphic_type_assignable(ctx, st, tt, true, modify_type);
-				if (!ok) {
-					// TODO(bill, 2021-08-19): is this logic correct?
-					return false;
-				}
-			}
-		}
-	}
-
-	if (modify_type && finalize) {
-		// NOTE(bill): This is needed in order to change the actual type but still have the types defined within it.
-		// `specialization` may already be published in a polymorphic record's gen_types cache;
-		// finalize it under that record's (recursive) gen_types mutex so a concurrent
-		// find_polymorphic_record_entity on another thread cannot observe a torn Type.
-		GenTypesData *gen_types = gen_types_data_of_specialization(specialization);
-		if (gen_types != nullptr) mutex_lock(&gen_types->mutex);
-		gb_memmove(specialization, type, gb_size_of(Type));
-		if (gen_types != nullptr) mutex_unlock(&gen_types->mutex);
-	}
-
-	return true;
-}
-
-gb_internal bool check_type_specialization_to(CheckerContext *ctx, Type *specialization, Type *type, bool compound, bool modify_type, bool finalize) {
-	if (type == nullptr ||
-	    type == t_invalid) {
-		return true;
-	}
-
-	Type *t = base_type(type);
-	Type *s = base_type(specialization);
-	if (t->kind != s->kind) {
-		if (t->kind == Type_EnumeratedArray && s->kind == Type_Array) {
-			// Might be okay, check later
-		} else {
-			return false;
-		}
-	}
-
-	if (is_type_untyped(t)) {
-		Operand o = {Addressing_Value};
-		o.type = default_type(type);
-		bool can_convert = check_cast_internal(ctx, &o, specialization);
-		return can_convert;
-	} else if (t->kind == Type_Struct) {
-		if (t->Struct.polymorphic_parent == nullptr &&
-		    t == s) {
-			return true;
-		}
-		if (t->Struct.polymorphic_parent == specialization) {
-			return true;
-		}
-
-		if (t->Struct.polymorphic_parent == s->Struct.polymorphic_parent &&
-		    s->Struct.polymorphic_params != nullptr &&
-		    t->Struct.polymorphic_params != nullptr) {
-
-			TypeTuple *s_tuple = get_record_polymorphic_params(s);
-			TypeTuple *t_tuple = get_record_polymorphic_params(t);
-			return check_type_specialization_to_internal(ctx, specialization, type, s_tuple, t_tuple, modify_type, finalize);
-		}
-	} else if (t->kind == Type_Union) {
-		if (t->Union.polymorphic_parent == nullptr &&
-		    t == s) {
-			return true;
-		}
-		if (t->Union.polymorphic_parent == specialization) {
-			return true;
-		}
-
-		if (t->Union.polymorphic_parent == s->Union.polymorphic_parent &&
-		    s->Union.polymorphic_params != nullptr &&
-		    t->Union.polymorphic_params != nullptr) {
-
-			TypeTuple *s_tuple = get_record_polymorphic_params(s);
-			TypeTuple *t_tuple = get_record_polymorphic_params(t);
-			return check_type_specialization_to_internal(ctx, specialization, type, s_tuple, t_tuple, modify_type, finalize);
-		}
-	}
-
-	if (specialization->kind == Type_Named &&
-	    type->kind != Type_Named) {
-		return false;
-	}
-	if (is_polymorphic_type_assignable(ctx, base_type(specialization), base_type(type), compound, modify_type)) {
-		return true;
-	}
-
-	return false;
-}
-
-
-// The substitution engine is the primary way a polymorphic parameter type is resolved:
-// `subst_unify` matches a pattern against a source PURELY (no node/entity mutation), accumulating
-// bindings; `subst_apply` reconstructs the instantiated type by CONSTRUCTION; `subst_bind_entities`
-// binds the poly-scope entities. `determine_type_from_polymorphic` uses them for every pattern the
-// engine reports `Subst_Matched` for. The in-place mutator `is_polymorphic_type_assignable` remains
-// only as a fallback for the patterns the engine leaves `Subst_Unhandled` (genuine subtyping, and the
-// `[^]<->^` handled-by-mutator case), and for the non-`modify_type` yes/no probe.
+// NOTE(bill: 2026-10-01)
 //
-// PARAPOLY_DEBUG_VERIFY_SUBST is an off-by-default differential debug switch: it makes the old mutator
-// authoritative and asserts the engine agrees with it (constructed type + entity bindings) on every
-// instantiation. It compares types structurally via are_types_identical, so it CANNOT catch codegen
-// state the engine must still set up (e.g. a map's internal types); those need build+run tests.
-#define PARAPOLY_DEBUG_VERIFY_SUBST 0
+// The substitution engine is the way a polymorphic parameter type is resolved or a `$T: Constraint` specialization is checked:
+//     `subst_unify` matches a pattern against a source PURELY (no node/entity mutation), accumulating bindings
+//     `subst_apply` reconstructs the instantiated type by CONSTRUCTION
+//     `subst_bind_entities` binds the poly-scope entities
+//     `subst_unify_constraint` handles specialization conformance
+//
+//
+// The old in-place mutator (is_polymorphic_type_assignable / check_type_specialization_to)
+// has been removed a pattern the engine cannot match is a definite non-match,
+// surfaced as a call-site error rather than silently mishandled.
+// The old mutator a lovely mess of `memmove` nonsense which was quite fragile,
+// so changing it to this should make things a heck of a lot more stable in the long run.
 
 enum SubstResult : u8 {
 	Subst_Unhandled,
@@ -1941,7 +1827,7 @@ gb_internal bool poly_subst_bind_enum_array(PolySubst *s, Entity *key, Type *ea)
 }
 
 // True when `source` is an instantiation of the bare polymorphic record template `spec` (the form a
-// `$T/Stack` constraint takes). Mirrors check_type_specialization_to's `polymorphic_parent` check.
+// `$T/Stack` constraint takes), via its `polymorphic_parent` link.
 gb_internal bool subst_source_is_template_instance(Type *source, Type *spec) {
 	Type *sb = base_type(source);
 	if (sb->kind == Type_Struct) {
@@ -1956,11 +1842,11 @@ gb_internal bool subst_source_is_template_instance(Type *source, Type *spec) {
 gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *source, PolySubst *subst);
 
 // Match a constraint `spec` against `source` (does `$T/spec` accept `source`?), binding spec's nested
-// vars. Mirrors check_type_specialization_to: bare template, record conformance (via the Named types),
-// an untyped source's default type, or a base-typed structural match for everything else — so unlike a
-// plain subst_unify it sees through named/distinct types (e.g. `[dynamic]$E` vs a `distinct [dynamic]V`).
-// Anything it cannot cleanly resolve (subtyping, untyped conversions, cross-kind) is deferred as
-// Subst_Unhandled to check_type_specialization_to.
+// vars. Covers: a bare template, record conformance (via the Named types), an untyped source's default
+// type, or a base-typed structural match for everything else — so unlike a plain subst_unify it sees
+// through named/distinct types (e.g. `[dynamic]$E` vs a `distinct [dynamic]V`). Anything it cannot
+// cleanly resolve (subtyping, untyped conversions, cross-kind) is returned as Subst_Unhandled, which the
+// caller treats as a definite non-match.
 gb_internal SubstResult subst_unify_constraint(CheckerContext *c, Type *spec, Type *source, PolySubst *subst) {
 	if (source == nullptr || source == t_invalid) {
 		return Subst_Matched;
@@ -2696,10 +2582,10 @@ gb_internal void subst_bind_entities(PolySubst *subst) {
 }
 
 // Specialization-conformance check for a `$T: Constraint` record/proc parameter: does `type` conform
-// to `specialization`, binding the constraint's nested vars when modify_type? The engine short-circuits
-// a clean structural match (skipping the in-place matcher); everything else (bare templates, subtyping,
-// assignability, definite non-matches) is left to check_type_specialization_to, so behavior is
-// unchanged except that the common case no longer runs the mutator.
+// to `specialization`, binding the constraint's nested vars when modify_type? Handled entirely by the
+// substitution engine (subst_unify_constraint). A non-match is a definite non-conformance; if the engine
+// is ever incomplete for some constraint the result is a loud "does not satisfy constraint" error at the
+// call site, never a silent miscompile.
 gb_internal bool subst_check_specialization(CheckerContext *ctx, Type *specialization, Type *type, bool modify_type) {
 	if (type == nullptr || type == t_invalid) {
 		return true;
@@ -2707,50 +2593,31 @@ gb_internal bool subst_check_specialization(CheckerContext *ctx, Type *specializ
 	PolySubst sub = {};
 	sub.items.allocator = heap_allocator();
 	defer (array_free(&sub.items));
-	SubstResult ur = subst_unify_constraint(ctx, specialization, type, &sub);
-#if PARAPOLY_DEBUG_VERIFY_SUBST
-	// Debug: the old check is authoritative; assert the engine's short-circuit agrees with it.
-	bool old = check_type_specialization_to(ctx, specialization, type, false, modify_type, /*finalize*/false);
-	GB_ASSERT_MSG(ur != Subst_Matched || old, "subst_check_specialization: engine matched but check_type_specialization_to did not");
-	return old;
-#else
-	if (ur == Subst_Matched) {
+	if (subst_unify_constraint(ctx, specialization, type, &sub) == Subst_Matched) {
 		if (modify_type) {
 			subst_bind_entities(&sub);
 		}
 		return true;
 	}
-	return check_type_specialization_to(ctx, specialization, type, false, modify_type, /*finalize*/false);
-#endif
+	return false;
 }
 
-#if PARAPOLY_DEBUG_VERIFY_SUBST
-// Read-only: assert that the in-place mutation bound each poly-scope entity to exactly what the
-// substitution captured. This is the entity-level analogue of the apply-reproduction check; once it
-// holds everywhere, entity binding can be driven from the PolySubst and the mutation removed.
-gb_internal void subst_verify_entities(PolySubst *subst) {
-	for (PolyBinding &b : subst->items) {
-		Entity *e = b.key;
-		switch (b.kind) {
-		case PolyBind_Type:
-			GB_ASSERT_MSG(e->type != nullptr && are_types_identical(e->type, b.type),
-			              "parapoly subst entity type mismatch for '%.*s'", LIT(e->token.string));
-			break;
-		case PolyBind_Value:
-			GB_ASSERT_MSG(e->kind == Entity_Constant && e->Constant.value.kind == ExactValue_Integer &&
-			              big_int_to_i64(&e->Constant.value.value_integer) == b.value &&
-			              are_types_identical(e->type, b.value_type),
-			              "parapoly subst entity value mismatch for '%.*s'", LIT(e->token.string));
-			break;
-		case PolyBind_EnumArray:
-			GB_ASSERT_MSG(e->kind == Entity_TypeName && e->type != nullptr &&
-			              are_types_identical(e->type, b.type->EnumeratedArray.index),
-			              "parapoly subst entity enum-array mismatch for '%.*s'", LIT(e->token.string));
-			break;
+// Match `source` against the polymorphic `pattern` with the substitution engine. When they unify and
+// `modify_type` is set, bind the captured poly-scope entities (the side effect the old in-place matcher
+// produced); returns whether they unified. This is the subst-based replacement for the overload-scoring
+// use of is_polymorphic_type_assignable. Exposed as a plain bool for earlier unity-build translation units.
+gb_internal bool subst_poly_assignable(CheckerContext *c, Type *pattern, Type *source, bool modify_type) {
+	PolySubst subst = {};
+	subst.items.allocator = heap_allocator();
+	defer (array_free(&subst.items));
+	if (subst_unify(c, pattern, source, &subst) == Subst_Matched) {
+		if (modify_type) {
+			subst_bind_entities(&subst);
 		}
+		return true;
 	}
+	return false;
 }
-#endif
 
 gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *poly_type, Operand const &operand) {
 	bool modify_type = !ctx->no_polymorphic_errors;
@@ -2786,17 +2653,11 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 		return t_invalid;
 	}
 
-#if !PARAPOLY_DEBUG_VERIFY_SUBST
-	// Primary path: the substitution engine both resolves (modify_type) and answers the yes/no probe
-	// (!modify_type). Only a Subst_Unhandled result falls to the in-place mutator, which now serves
-	// solely as the genuine-subtyping fallback. A Subst_NoMatch is a definite non-match, so the mutator
-	// is skipped (the debug build asserts that NoMatch invariant against the mutator).
 	{
 		PolySubst subst = {};
 		subst.items.allocator = heap_allocator();
 		defer (array_free(&subst.items));
-		SubstResult ur = subst_unify(ctx, poly_type, operand.type, &subst);
-		if (ur == Subst_Matched) {
+		if (subst_unify(ctx, poly_type, operand.type, &subst) == Subst_Matched) {
 			if (modify_type) {
 				Type *applied = subst_apply(ctx, poly_type, operand.type, &subst);
 				subst_bind_entities(&subst);
@@ -2804,42 +2665,7 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 			}
 			return poly_type; // probe: matched, no construction/binding needed
 		}
-		if (ur == Subst_Unhandled &&
-		    is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
-			return poly_type;
-		}
 	}
-#else
-	// Debug differential: the mutator is authoritative and the engine is asserted to agree with it.
-	PolySubst verify_subst = {};
-	verify_subst.items.allocator = heap_allocator();
-	defer (array_free(&verify_subst.items));
-	// Run the engine for both modify_type and the probe, so the NoMatch-skips-the-mutator invariant the
-	// production path relies on is covered here too. Only construct/bind for modify_type.
-	SubstResult verify_ur = subst_unify(ctx, poly_type, operand.type, &verify_subst);
-	Type *verify_applied = nullptr;
-	if (modify_type && verify_ur == Subst_Matched) {
-		verify_applied = subst_apply(ctx, poly_type, operand.type, &verify_subst);
-	}
-	if (is_polymorphic_type_assignable(ctx, poly_type, operand.type, false, modify_type)) {
-		if (verify_ur == Subst_Matched) {
-			if (modify_type) {
-				GB_ASSERT_MSG(are_types_identical(verify_applied, poly_type),
-				              "parapoly subst mismatch: applied '%s' vs mutated '%s'",
-				              type_to_string(verify_applied), type_to_string(poly_type));
-				subst_verify_entities(&verify_subst);
-				return verify_applied;
-			}
-			return poly_type;
-		} else if (verify_ur == Subst_NoMatch) {
-			GB_PANIC("parapoly subst reported NoMatch but in-place match succeeded (result '%s')", type_to_string(poly_type));
-		}
-		return poly_type;
-	}
-	if (verify_ur == Subst_Matched) {
-		GB_PANIC("parapoly subst matched but in-place match failed");
-	}
-#endif
 	if (show_error) {
 		ERROR_BLOCK();
 		gbString pts = type_to_string(poly_type);
@@ -2875,7 +2701,7 @@ gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *pol
 				gb_string_free(os);
 			}
 		} else if (is_type_pointer(poly_type)) {
-			if (is_polymorphic_type_assignable(ctx, type_deref(poly_type), operand.type, /*compound*/false, /*modify_type*/false)) {
+			if (subst_poly_assignable(ctx, type_deref(poly_type), operand.type, /*modify_type*/false)) {
 				gbString os = expr_to_string(operand.expr);
 				error_line("\tSuggestion: Did you mean '&%s'?\n", os);
 				gb_string_free(os);

From 21302f84df81ecb69c49af1a2957d586445109cb Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 09:40:14 +0100
Subject: [PATCH 107/215] Fix bodge of using `i64` instead of `ExactValue` in
 `PolyBinding`

---
 src/check_type.cpp | 49 ++++++++++++++++++++++++----------------------
 1 file changed, 26 insertions(+), 23 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index bfeeb287e..679e9db58 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1774,8 +1774,8 @@ struct PolyBinding {
 	Entity *     key;
 	PolyBindKind kind;
 	Type *       type;       // PolyBind_Type: bound type; PolyBind_EnumArray: source EnumeratedArray
-	i64          value;      // PolyBind_Value: array count
-	Type *       value_type; // PolyBind_Value: entity type the mutation gives the count constant
+	ExactValue   value;      // PolyBind_Value: the constant (array/matrix/simd count, or a record const param of any type)
+	Type *       value_type; // PolyBind_Value: entity type the binding gives the constant
 };
 struct PolySubst {
 	Array<PolyBinding> items;
@@ -1807,7 +1807,7 @@ gb_internal bool poly_subst_add(PolySubst *s, Entity *key, PolyBinding b) {
 		}
 		switch (b.kind) {
 		case PolyBind_Type:      return are_types_identical(prev->type, b.type);
-		case PolyBind_Value:     return prev->value == b.value;
+		case PolyBind_Value:     return compare_exact_values(Token_CmpEq, prev->value, b.value);
 		case PolyBind_EnumArray: return are_types_identical(prev->type, b.type);
 		}
 		return false;
@@ -1817,13 +1817,18 @@ gb_internal bool poly_subst_add(PolySubst *s, Entity *key, PolyBinding b) {
 	return true;
 }
 gb_internal bool poly_subst_bind_type(PolySubst *s, Entity *key, Type *t) {
-	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Type, t, 0, nullptr});
+	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Type, t, {}, nullptr});
 }
-gb_internal bool poly_subst_bind_value(PolySubst *s, Entity *key, i64 v, Type *value_type) {
+gb_internal bool poly_subst_bind_value(PolySubst *s, Entity *key, ExactValue v, Type *value_type) {
 	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_Value, nullptr, v, value_type});
 }
 gb_internal bool poly_subst_bind_enum_array(PolySubst *s, Entity *key, Type *ea) {
-	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_EnumArray, ea, 0, nullptr});
+	return poly_subst_add(s, key, PolyBinding{nullptr, PolyBind_EnumArray, ea, {}, nullptr});
+}
+// Integer payload of a PolyBind_Value used as a count (array/matrix/simd dimension).
+gb_internal i64 poly_binding_count(PolyBinding const *b) {
+	GB_ASSERT(b->kind == PolyBind_Value && b->value.kind == ExactValue_Integer);
+	return big_int_to_i64(&b->value.value_integer);
 }
 
 // True when `source` is an instantiation of the bare polymorphic record template `spec` (the form a
@@ -1953,7 +1958,7 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 				if (ne == nullptr) {
 					return Subst_Unhandled;
 				}
-				if (!poly_subst_bind_value(subst, ne, source->Array.count, t_untyped_integer)) {
+				if (!poly_subst_bind_value(subst, ne, exact_value_i64(source->Array.count), t_untyped_integer)) {
 					return Subst_NoMatch;
 				}
 			} else if (pattern->Array.count != source->Array.count) {
@@ -1995,7 +2000,7 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			if (re == nullptr) {
 				return Subst_Unhandled;
 			}
-			if (!poly_subst_bind_value(subst, re, source->Matrix.row_count, t_untyped_integer)) {
+			if (!poly_subst_bind_value(subst, re, exact_value_i64(source->Matrix.row_count), t_untyped_integer)) {
 				return Subst_NoMatch;
 			}
 		} else if (pattern->Matrix.row_count != source->Matrix.row_count) {
@@ -2009,7 +2014,7 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			if (ce == nullptr) {
 				return Subst_Unhandled;
 			}
-			if (!poly_subst_bind_value(subst, ce, source->Matrix.column_count, t_untyped_integer)) {
+			if (!poly_subst_bind_value(subst, ce, exact_value_i64(source->Matrix.column_count), t_untyped_integer)) {
 				return Subst_NoMatch;
 			}
 		} else if (pattern->Matrix.column_count != source->Matrix.column_count) {
@@ -2029,7 +2034,7 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			if (ne == nullptr) {
 				return Subst_Unhandled;
 			}
-			if (!poly_subst_bind_value(subst, ne, source->SimdVector.count, t_untyped_integer)) {
+			if (!poly_subst_bind_value(subst, ne, exact_value_i64(source->SimdVector.count), t_untyped_integer)) {
 				return Subst_NoMatch;
 			}
 		} else if (pattern->SimdVector.count != source->SimdVector.count) {
@@ -2091,10 +2096,8 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 						return Subst_NoMatch;
 					}
 				} else if (t_e->kind == Entity_Constant) {
-					if (t_e->Constant.value.kind != ExactValue_Integer) {
-						return Subst_Unhandled;
-					}
-					if (!poly_subst_bind_value(subst, ge, big_int_to_i64(&t_e->Constant.value.value_integer), t_e->type)) {
+					// A record's polymorphic constant parameter, of any type (int, string, bool, ...).
+					if (!poly_subst_bind_value(subst, ge, t_e->Constant.value, t_e->type)) {
 						return Subst_NoMatch;
 					}
 				} else {
@@ -2174,7 +2177,7 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 			if (ne == nullptr) {
 				return Subst_Unhandled;
 			}
-			if (!poly_subst_bind_value(subst, ne, source->FixedCapacityDynamicArray.capacity, t_untyped_integer)) {
+			if (!poly_subst_bind_value(subst, ne, exact_value_i64(source->FixedCapacityDynamicArray.capacity), t_untyped_integer)) {
 				return Subst_NoMatch;
 			}
 		} else if (pattern->FixedCapacityDynamicArray.capacity != source->FixedCapacityDynamicArray.capacity) {
@@ -2289,8 +2292,8 @@ gb_internal Entity *find_polymorphic_record_by_subst(GenTypesData *gt, TypeTuple
 					break;
 				}
 				if (b->kind == PolyBind_Value) {
-					if (ep->kind != Entity_Constant || ep->Constant.value.kind != ExactValue_Integer ||
-					    big_int_to_i64(&ep->Constant.value.value_integer) != b->value) {
+					if (ep->kind != Entity_Constant ||
+					    !compare_exact_values(Token_CmpEq, ep->Constant.value, b->value)) {
 						match = false;
 						break;
 					}
@@ -2379,7 +2382,7 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 		if (pattern->FixedCapacityDynamicArray.generic_capacity != nullptr) {
 			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->FixedCapacityDynamicArray.generic_capacity));
 			GB_ASSERT(b != nullptr && b->kind == PolyBind_Value);
-			cap = b->value;
+			cap = poly_binding_count(b);
 		}
 		return alloc_type_fixed_capacity_dynamic_array(elem, cap, nullptr);
 	}
@@ -2404,7 +2407,7 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 				return r;
 			}
 			GB_ASSERT(b->kind == PolyBind_Value);
-			return alloc_type_array(subst_apply(c, pattern->Array.elem, source->Array.elem, subst), b->value, nullptr);
+			return alloc_type_array(subst_apply(c, pattern->Array.elem, source->Array.elem, subst), poly_binding_count(b), nullptr);
 		}
 		return alloc_type_array(subst_apply(c, pattern->Array.elem, source->Array.elem, subst), pattern->Array.count, nullptr);
 	}
@@ -2424,12 +2427,12 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 		if (pattern->Matrix.generic_row_count != nullptr) {
 			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->Matrix.generic_row_count));
 			GB_ASSERT(b != nullptr && b->kind == PolyBind_Value);
-			rc = b->value;
+			rc = poly_binding_count(b);
 		}
 		if (pattern->Matrix.generic_column_count != nullptr) {
 			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->Matrix.generic_column_count));
 			GB_ASSERT(b != nullptr && b->kind == PolyBind_Value);
-			cc = b->value;
+			cc = poly_binding_count(b);
 		}
 		return alloc_type_matrix(elem, rc, cc, nullptr, nullptr, pattern->Matrix.is_row_major);
 	}
@@ -2439,7 +2442,7 @@ gb_internal Type *subst_apply(CheckerContext *c, Type *pattern, Type *source, Po
 		if (pattern->SimdVector.generic_count != nullptr) {
 			PolyBinding *b = poly_subst_find(subst, poly_generic_entity(pattern->SimdVector.generic_count));
 			GB_ASSERT(b != nullptr && b->kind == PolyBind_Value);
-			count = b->value;
+			count = poly_binding_count(b);
 		}
 		return alloc_type_simd_vector(count, elem, nullptr);
 	}
@@ -2569,7 +2572,7 @@ gb_internal void subst_bind_entities(PolySubst *subst) {
 			break;
 		case PolyBind_Value:
 			e->kind = Entity_Constant;
-			e->Constant.value = exact_value_i64(b.value);
+			e->Constant.value = b.value;
 			e->type = b.value_type;
 			break;
 		case PolyBind_EnumArray:

From 4e49db59a892a168e2409b4d0841258d80015da4 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 09:54:10 +0100
Subject: [PATCH 108/215] parapoly: default untyped args against a
 still-polymoprhic parameter

---
 src/check_expr.cpp | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 5e27cc82d..b9d5e3108 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -6851,6 +6851,15 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 
 	auto eval_param_and_score = [](CheckerContext *c, Operand *o, Type *param_type, CallArgumentError &err, bool param_is_variadic, Entity *e, bool show_error) -> i64 {
 		bool allow_array_programming = !(e && (e->flags & EntityFlag_NoBroadcast));
+		// NOTE(bill): If the parameter type is still polymorphic here, the callee was not instantiated for this call (e.g. a disabled polymorphic proc, whose body is elided).
+		// A polymorphic '$T' gives an untyped argument nothing concrete to convert to, so default it to its own type rather than reporting a nonsense "cannot convert untyped value to '$T'".
+		if (show_error && is_type_polymorphic(param_type) && o->mode != Addressing_Invalid && is_type_untyped(o->type)) {
+			Type *dt = default_type(o->type);
+			if (dt != nullptr && is_type_typed(dt)) {
+				update_untyped_expr_type(c, o->expr, dt, true);
+				o->type = dt;
+			}
+		}
 		i64 s = 0;
 		if (!check_is_assignable_to_with_score(c, o, param_type, &s, param_is_variadic, allow_array_programming)) {
 			bool ok = false;

From efe87b06ec95c72b2f3413e3ccb559fc8eb64fc9 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 10:26:24 +0100
Subject: [PATCH 109/215] parapoly: determine a polymorphic element type from a
 bare compound literal

---
 src/check_type.cpp | 112 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 112 insertions(+)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index 679e9db58..b37f50ae0 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -2622,10 +2622,122 @@ gb_internal bool subst_poly_assignable(CheckerContext *c, Type *pattern, Type *s
 	return false;
 }
 
+gb_internal bool ast_is_context_free_constant(Ast *e) {
+	if (e == nullptr) {
+		return false;
+	}
+	e = unparen_expr(e);
+	if (e == nullptr) {
+		return false;
+	}
+	switch (e->kind) {
+	case Ast_BasicLit:
+		return true;
+	case Ast_UnaryExpr:
+		return ast_is_context_free_constant(e->UnaryExpr.expr);
+	case Ast_BinaryExpr:
+		return ast_is_context_free_constant(e->BinaryExpr.left) &&
+		       ast_is_context_free_constant(e->BinaryExpr.right);
+	}
+	return false;
+}
+
+gb_internal Type *determine_poly_elem_from_compound_lit(CheckerContext *ctx, Type *poly_type, Ast *expr) {
+	if (expr == nullptr) {
+		return nullptr;
+	}
+	expr = unparen_expr(expr);
+	if (expr == nullptr || expr->kind != Ast_CompoundLit || expr->CompoundLit.type != nullptr) {
+		return nullptr;
+	}
+
+	Type *bt = base_type(poly_type);
+	Type *elem_pattern = nullptr;
+	switch (bt->kind) {
+	case Type_Array:
+		if (bt->Array.generic_count != nullptr) {
+			// NOTE(bill): polymorphic count (`[$N]$T`) is not currently supported
+			return nullptr;
+		}
+		elem_pattern = bt->Array.elem;
+		break;
+	case Type_Slice:        elem_pattern = bt->Slice.elem;        break;
+	case Type_DynamicArray: elem_pattern = bt->DynamicArray.elem; break;
+	default:
+		return nullptr;
+	}
+	// NOTE(bill): Only a bare `$T` element keeps determination unambiguous and construction trivial
+	if (elem_pattern == nullptr || elem_pattern->kind != Type_Generic || elem_pattern->Generic.specialized != nullptr) {
+		return nullptr;
+	}
+
+	Slice<Ast *> const &elems = expr->CompoundLit.elems;
+	if (elems.count == 0) {
+		// `{}` cannot determine an element type
+		return nullptr;
+	}
+
+
+	Type *elem_type = nullptr;
+	for (Ast *e : elems) {
+		if (!ast_is_context_free_constant(e)) {
+			return nullptr;
+		}
+		Operand o = {};
+		Ast *trial = clone_ast(e);
+		i64 muted_before = error_mute_count();
+		begin_error_mute();
+		check_expr(ctx, &o, trial);
+		end_error_mute();
+		if (o.mode == Addressing_Invalid || o.type == nullptr || o.type == t_invalid ||
+		    error_mute_count() != muted_before) {
+			return nullptr;
+		}
+		Type *et = is_type_untyped(o.type) ? default_type(o.type) : o.type;
+		if (et == nullptr || et == t_invalid || is_type_polymorphic(et)) {
+			return nullptr;
+		}
+		if (elem_type == nullptr) {
+			elem_type = et;
+		} else if (!are_types_identical(elem_type, et)) {
+			// non-homogeneous: fall back to the explicit-type error
+			return nullptr;
+		}
+	}
+	if (elem_type == nullptr) {
+		return nullptr;
+	}
+
+	Type *source = nullptr;
+	switch (bt->kind) {
+	case Type_Array:        source = alloc_type_array(elem_type, bt->Array.count, nullptr); break;
+	case Type_Slice:        source = alloc_type_slice(elem_type);                           break;
+	case Type_DynamicArray: source = alloc_type_dynamic_array(elem_type);                   break;
+	}
+	if (source == nullptr) {
+		return nullptr;
+	}
+
+	PolySubst subst = {};
+	subst.items.allocator = heap_allocator();
+	defer (array_free(&subst.items));
+	if (subst_unify(ctx, poly_type, source, &subst) != Subst_Matched) {
+		return nullptr;
+	}
+	Type *applied = subst_apply(ctx, poly_type, source, &subst);
+	subst_bind_entities(&subst);
+	return applied;
+}
+
 gb_internal Type *determine_type_from_polymorphic(CheckerContext *ctx, Type *poly_type, Operand const &operand) {
 	bool modify_type = !ctx->no_polymorphic_errors;
 	bool show_error = modify_type && !ctx->hide_polymorphic_errors;
 	if (!is_operand_value(operand)) {
+		if (operand.deferred_untyped_arg && modify_type) {
+			if (Type *determined = determine_poly_elem_from_compound_lit(ctx, poly_type, operand.expr)) {
+				return determined;
+			}
+		}
 		if (operand.deferred_untyped_arg && !modify_type) {
 			// Probe pass (procedure-group candidate pre-check): a deferred untyped argument carries no
 			// type yet, so it cannot constrain this parameter. Treat it as a match and let the real

From 3551707607cef57b62b4a77d24c3e6123bbbccb6 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 10:53:29 +0100
Subject: [PATCH 110/215] parapoly: allow a constant default value for a
 polymorphic parameter

---
 src/check_expr.cpp | 20 +++++++++++++++-----
 src/check_type.cpp |  6 ++++++
 2 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index b9d5e3108..c56f1fe15 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -6814,11 +6814,21 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 					}
 
 					if (!context_allocator_error) {
-						ordered_operands[i].mode = Addressing_Value;
-						ordered_operands[i].type = e->type;
-						if (e->Variable.param_value.kind == ParameterValue_Nil)
-							ordered_operands[i].type = t_untyped_nil;
-						ordered_operands[i].expr = e->Variable.param_value.original_ast_expr;
+						if (is_type_polymorphic(e->type) && e->Variable.param_value.kind == ParameterValue_Constant) {
+							// NOTE(bill): The parameter type is still polymorphic, so a constant default (e.g. `y: T = 0`) cannot be typed as '$T' here.
+							// Defer it like an untyped argument: determination resolves the parameter from the other arguments,
+							// then the default is materialized against the concrete type (reporting a clear error if it does not fit).
+							ordered_operands[i].mode = Addressing_Invalid;
+							ordered_operands[i].type = t_invalid;
+							ordered_operands[i].expr = e->Variable.param_value.original_ast_expr;
+							ordered_operands[i].deferred_untyped_arg = true;
+						} else {
+							ordered_operands[i].mode = Addressing_Value;
+							ordered_operands[i].type = e->type;
+							if (e->Variable.param_value.kind == ParameterValue_Nil)
+								ordered_operands[i].type = t_untyped_nil;
+							ordered_operands[i].expr = e->Variable.param_value.original_ast_expr;
+						}
 
 						dummy_argument_count += 1;
 						score += assign_score_function(1);
diff --git a/src/check_type.cpp b/src/check_type.cpp
index b37f50ae0..968281b07 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -3108,6 +3108,12 @@ gb_internal Type *check_get_params(CheckerContext *ctx, Scope *scope, Ast *_para
 			if (default_value != nullptr) {
 				if (type_expr != nullptr && type_expr->kind == Ast_TypeidType) {
 					error(type_expr, "A type parameter may not have a default value");
+				} else if (is_type_polymorphic(type)) {
+					// NOTE(bill): The parameter type is still polymorphic (`$T`, `[N]$T`, ...),
+					// so the default value cannot be checked against it yet.
+					// Evaluate it as a constant now without the assignment check.
+					// It is validated against the concrete parameter type when the procedure is instantiated (which re-runs this with a non-polymorphic `type`).
+					param_value = handle_parameter_value(ctx, nullptr, nullptr, default_value, true);
 				} else {
 					param_value = handle_parameter_value(ctx, type, nullptr, default_value, true);
 				}

From 3c09d0242f8160ad69e2aa50577d63f57c0308a5 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 11:01:08 +0100
Subject: [PATCH 111/215] parapoly: determine a polymorphic array count from a
 bare compound literal

---
 src/check_type.cpp | 90 ++++++++++++++++++++++++++++------------------
 1 file changed, 56 insertions(+), 34 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index 968281b07..2a955b189 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -2653,11 +2653,14 @@ gb_internal Type *determine_poly_elem_from_compound_lit(CheckerContext *ctx, Typ
 
 	Type *bt = base_type(poly_type);
 	Type *elem_pattern = nullptr;
+	bool generic_count = false;
 	switch (bt->kind) {
 	case Type_Array:
 		if (bt->Array.generic_count != nullptr) {
-			// NOTE(bill): polymorphic count (`[$N]$T`) is not currently supported
-			return nullptr;
+			if (bt->Array.generic_count->Generic.specialized != nullptr) {
+				return nullptr; // a constrained count `$N/...` is out of scope
+			}
+			generic_count = true; // `[$N]...` binds N to the literal's element count
 		}
 		elem_pattern = bt->Array.elem;
 		break;
@@ -2666,53 +2669,72 @@ gb_internal Type *determine_poly_elem_from_compound_lit(CheckerContext *ctx, Typ
 	default:
 		return nullptr;
 	}
-	// NOTE(bill): Only a bare `$T` element keeps determination unambiguous and construction trivial
-	if (elem_pattern == nullptr || elem_pattern->kind != Type_Generic || elem_pattern->Generic.specialized != nullptr) {
+
+	// A polymorphic element must be a bare `$T` (unambiguous element determination); otherwise the only
+	// thing left to determine is a polymorphic count.
+	bool elem_is_poly = is_type_polymorphic(elem_pattern);
+	if (elem_is_poly) {
+		if (elem_pattern->kind != Type_Generic || elem_pattern->Generic.specialized != nullptr) {
+			return nullptr;
+		}
+	} else if (!generic_count) {
 		return nullptr;
 	}
 
 	Slice<Ast *> const &elems = expr->CompoundLit.elems;
 	if (elems.count == 0) {
-		// `{}` cannot determine an element type
-		return nullptr;
+		return nullptr; // `{}` determines neither an element type nor a meaningful count
 	}
 
-
-	Type *elem_type = nullptr;
-	for (Ast *e : elems) {
-		if (!ast_is_context_free_constant(e)) {
-			return nullptr;
-		}
-		Operand o = {};
-		Ast *trial = clone_ast(e);
-		i64 muted_before = error_mute_count();
-		begin_error_mute();
-		check_expr(ctx, &o, trial);
-		end_error_mute();
-		if (o.mode == Addressing_Invalid || o.type == nullptr || o.type == t_invalid ||
-		    error_mute_count() != muted_before) {
-			return nullptr;
-		}
-		Type *et = is_type_untyped(o.type) ? default_type(o.type) : o.type;
-		if (et == nullptr || et == t_invalid || is_type_polymorphic(et)) {
-			return nullptr;
+	Type *elem_type = elem_is_poly ? nullptr : elem_pattern;
+	if (elem_is_poly) {
+		// Determine the element type from the (homogeneous, context-free) elements.
+		for (Ast *e : elems) {
+			if (!ast_is_context_free_constant(e)) {
+				return nullptr;
+			}
+			Operand o = {};
+			Ast *trial = clone_ast(e);
+			i64 muted_before = error_mute_count();
+			begin_error_mute();
+			check_expr(ctx, &o, trial);
+			end_error_mute();
+			if (o.mode == Addressing_Invalid || o.type == nullptr || o.type == t_invalid ||
+			    error_mute_count() != muted_before) {
+				return nullptr;
+			}
+			Type *et = is_type_untyped(o.type) ? default_type(o.type) : o.type;
+			if (et == nullptr || et == t_invalid || is_type_polymorphic(et)) {
+				return nullptr;
+			}
+			if (elem_type == nullptr) {
+				elem_type = et;
+			} else if (!are_types_identical(elem_type, et)) {
+				return nullptr; // non-homogeneous: fall back to the explicit-type error
+			}
 		}
 		if (elem_type == nullptr) {
-			elem_type = et;
-		} else if (!are_types_identical(elem_type, et)) {
-			// non-homogeneous: fall back to the explicit-type error
 			return nullptr;
 		}
-	}
-	if (elem_type == nullptr) {
-		return nullptr;
+	} else {
+		// NOTE(bill): Count-only (`[$N]ConcreteElem`): the element content is validated later by materialize
+		for (Ast *e : elems) {
+			Ast *ue = unparen_expr(e);
+			if (ue != nullptr && ue->kind == Ast_FieldValue) {
+				return nullptr;
+			}
+		}
 	}
 
 	Type *source = nullptr;
 	switch (bt->kind) {
-	case Type_Array:        source = alloc_type_array(elem_type, bt->Array.count, nullptr); break;
-	case Type_Slice:        source = alloc_type_slice(elem_type);                           break;
-	case Type_DynamicArray: source = alloc_type_dynamic_array(elem_type);                   break;
+	case Type_Array: {
+		i64 count = generic_count ? cast(i64)elems.count : bt->Array.count;
+		source = alloc_type_array(elem_type, count, nullptr);
+		break;
+	}
+	case Type_Slice:        source = alloc_type_slice(elem_type);         break;
+	case Type_DynamicArray: source = alloc_type_dynamic_array(elem_type); break;
 	}
 	if (source == nullptr) {
 		return nullptr;

From 9602f57513557663e319cdf849987bde801f181e Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 11:03:10 +0100
Subject: [PATCH 112/215] Minor refactor for `visited` sections

---
 src/check_expr.cpp | 180 +++++++++++++++++++++++----------------------
 1 file changed, 91 insertions(+), 89 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index c56f1fe15..a12b184eb 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -6747,14 +6747,15 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 	bool actually_variadic = false;
 
 	if (variadic) {
-		if (visited[pt->variadic_index] &&
-		    positional_operand_count < positional_operands.count) {
-			if (show_error) {
-				String name = pt->params->Tuple.variables[pt->variadic_index]->token.string;
-				error(call, "Variadic parameters already handled with a named argument '%.*s' in procedure call", LIT(name));
+		if (visited[pt->variadic_index]) {
+			if (positional_operand_count < positional_operands.count) {
+				if (show_error) {
+					String name = pt->params->Tuple.variables[pt->variadic_index]->token.string;
+					error(call, "Variadic parameters already handled with a named argument '%.*s' in procedure call", LIT(name));
+				}
+				err = CallArgumentError_DuplicateParameter;
 			}
-			err = CallArgumentError_DuplicateParameter;
-		} else if (!visited[pt->variadic_index]) {
+		} else {
 			visited[pt->variadic_index] = true;
 
 			Operand *variadic_operand = &ordered_operands[pt->variadic_index];
@@ -6789,74 +6790,74 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 				*variadic_operand = o;
 			}
 		}
-
 	}
 
 	for (isize i = 0; i < pt->param_count; i++) {
-		if (!visited[i]) {
-			Entity *e = pt->params->Tuple.variables[i];
-			bool context_allocator_error = false;
-			if (e->kind == Entity_Variable) {
-				if (e->Variable.param_value.kind != ParameterValue_Invalid) {
-					if (ast_file_vet_explicit_allocators(c->file) && !checking_proc_group) {
-						// NOTE(lucas): check if we are trying to default to context.allocator or context.temp_allocator
-						if (e->Variable.param_value.original_ast_expr->kind == Ast_SelectorExpr) {
-							auto& expr = e->Variable.param_value.original_ast_expr->SelectorExpr.expr;
-							auto& selector = e->Variable.param_value.original_ast_expr->SelectorExpr.selector;
-							if (expr->kind == Ast_Implicit &&
-								expr->Implicit.string == STR_LIT("context") &&
-								selector->kind == Ast_Ident &&
-								(selector->Ident.token.string == STR_LIT("allocator") ||
-      								selector->Ident.token.string == STR_LIT("temp_allocator"))) {
-								context_allocator_error = true;
-							}
-						}
-					}
-
-					if (!context_allocator_error) {
-						if (is_type_polymorphic(e->type) && e->Variable.param_value.kind == ParameterValue_Constant) {
-							// NOTE(bill): The parameter type is still polymorphic, so a constant default (e.g. `y: T = 0`) cannot be typed as '$T' here.
-							// Defer it like an untyped argument: determination resolves the parameter from the other arguments,
-							// then the default is materialized against the concrete type (reporting a clear error if it does not fit).
-							ordered_operands[i].mode = Addressing_Invalid;
-							ordered_operands[i].type = t_invalid;
-							ordered_operands[i].expr = e->Variable.param_value.original_ast_expr;
-							ordered_operands[i].deferred_untyped_arg = true;
-						} else {
-							ordered_operands[i].mode = Addressing_Value;
-							ordered_operands[i].type = e->type;
-							if (e->Variable.param_value.kind == ParameterValue_Nil)
-								ordered_operands[i].type = t_untyped_nil;
-							ordered_operands[i].expr = e->Variable.param_value.original_ast_expr;
-						}
-
-						dummy_argument_count += 1;
-						score += assign_score_function(1);
-						continue;
-					}
-				}
-			}
-
-			if (show_error) {
-				if (context_allocator_error) {
-					gbString str = type_to_string(e->type);
-					error(call, "Parameter '%.*s' of type '%s' must be explicitly provided in procedure call",
-					      LIT(e->token.string), str);
-					gb_string_free(str);
-				} else if (e->kind == Entity_TypeName) {
-					error(call, "Type parameter '%.*s' is missing in procedure call",
-					      LIT(e->token.string));
-				} else if (e->kind == Entity_Constant && e->Constant.value.kind != ExactValue_Invalid) {
-					// Ignore
-				} else {
-					gbString str = type_to_string(e->type);
-					error(call, "Parameter '%.*s' of type '%s' is missing in procedure call",
-					      LIT(e->token.string), str);
-					gb_string_free(str);
-				}
-			}
-			err = CallArgumentError_ParameterMissing;
+		if (visited[i]) {
+			continue;
 		}
+		Entity *e = pt->params->Tuple.variables[i];
+		bool context_allocator_error = false;
+		if (e->kind == Entity_Variable) {
+			if (e->Variable.param_value.kind != ParameterValue_Invalid) {
+				if (ast_file_vet_explicit_allocators(c->file) && !checking_proc_group) {
+					// NOTE(lucas): check if we are trying to default to context.allocator or context.temp_allocator
+					if (e->Variable.param_value.original_ast_expr->kind == Ast_SelectorExpr) {
+						auto& expr = e->Variable.param_value.original_ast_expr->SelectorExpr.expr;
+						auto& selector = e->Variable.param_value.original_ast_expr->SelectorExpr.selector;
+						if (expr->kind == Ast_Implicit &&
+							expr->Implicit.string == STR_LIT("context") &&
+							selector->kind == Ast_Ident &&
+							(selector->Ident.token.string == STR_LIT("allocator") ||
+								selector->Ident.token.string == STR_LIT("temp_allocator"))) {
+							context_allocator_error = true;
+						}
+					}
+				}
+
+				if (!context_allocator_error) {
+					if (is_type_polymorphic(e->type) && e->Variable.param_value.kind == ParameterValue_Constant) {
+						// NOTE(bill): The parameter type is still polymorphic, so a constant default (e.g. `y: T = 0`) cannot be typed as '$T' here.
+						// Defer it like an untyped argument: determination resolves the parameter from the other arguments,
+						// then the default is materialized against the concrete type (reporting a clear error if it does not fit).
+						ordered_operands[i].mode = Addressing_Invalid;
+						ordered_operands[i].type = t_invalid;
+						ordered_operands[i].expr = e->Variable.param_value.original_ast_expr;
+						ordered_operands[i].deferred_untyped_arg = true;
+					} else {
+						ordered_operands[i].mode = Addressing_Value;
+						ordered_operands[i].type = e->type;
+						if (e->Variable.param_value.kind == ParameterValue_Nil)
+							ordered_operands[i].type = t_untyped_nil;
+						ordered_operands[i].expr = e->Variable.param_value.original_ast_expr;
+					}
+
+					dummy_argument_count += 1;
+					score += assign_score_function(1);
+					continue;
+				}
+			}
+		}
+
+		if (show_error) {
+			if (context_allocator_error) {
+				gbString str = type_to_string(e->type);
+				error(call, "Parameter '%.*s' of type '%s' must be explicitly provided in procedure call",
+				      LIT(e->token.string), str);
+				gb_string_free(str);
+			} else if (e->kind == Entity_TypeName) {
+				error(call, "Type parameter '%.*s' is missing in procedure call",
+				      LIT(e->token.string));
+			} else if (e->kind == Entity_Constant && e->Constant.value.kind != ExactValue_Invalid) {
+				// Ignore
+			} else {
+				gbString str = type_to_string(e->type);
+				error(call, "Parameter '%.*s' of type '%s' is missing in procedure call",
+				      LIT(e->token.string), str);
+				gb_string_free(str);
+			}
+		}
+		err = CallArgumentError_ParameterMissing;
 	}
 
 	auto eval_param_and_score = [](CheckerContext *c, Operand *o, Type *param_type, CallArgumentError &err, bool param_is_variadic, Entity *e, bool show_error) -> i64 {
@@ -8598,25 +8599,26 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 		}
 
 		for (isize i = 0; i < param_count; i++) {
-			if (!visited[i]) {
-				Entity *e = tuple->variables[i];
-				if (is_blank_ident(e->token)) {
-					continue;
-				}
-
-				if (show_error) {
-					if (e->kind == Entity_TypeName) {
-						error(call, "Type parameter '%.*s' is missing in polymorphic type call",
-						      LIT(e->token.string));
-					} else {
-						gbString str = type_to_string(e->type);
-						error(call, "Parameter '%.*s' of type '%s' is missing in polymorphic type call",
-						      LIT(e->token.string), str);
-						gb_string_free(str);
-					}
-				}
-				err = CallArgumentError_ParameterMissing;
+			if (visited[i]) {
+				continue;
 			}
+			Entity *e = tuple->variables[i];
+			if (is_blank_ident(e->token)) {
+				continue;
+			}
+
+			if (show_error) {
+				if (e->kind == Entity_TypeName) {
+					error(call, "Type parameter '%.*s' is missing in polymorphic type call",
+					      LIT(e->token.string));
+				} else {
+					gbString str = type_to_string(e->type);
+					error(call, "Parameter '%.*s' of type '%s' is missing in polymorphic type call",
+					      LIT(e->token.string), str);
+					gb_string_free(str);
+				}
+			}
+			err = CallArgumentError_ParameterMissing;
 		}
 	}
 

From ac5087776f574d9f259ec6b226e8431c0d795e76 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 13:04:40 +0100
Subject: [PATCH 113/215] Add test_parapoly.odin

---
 tests/parapoly/test_parapoly.odin | 168 ++++++++++++++++++++++++++++++
 1 file changed, 168 insertions(+)

diff --git a/tests/parapoly/test_parapoly.odin b/tests/parapoly/test_parapoly.odin
index f7c210a29..ff8db850a 100644
--- a/tests/parapoly/test_parapoly.odin
+++ b/tests/parapoly/test_parapoly.odin
@@ -131,3 +131,171 @@ parapoly_using_constraint :: proc(t: ^testing.T) { // using on a constrained-gen
 	v.x = 42
 	testing.expect(t, pp_using(v) == 42, "using $P/PP_Base($T) + promoted-member access")
 }
+
+// --- deferred untyped-argument inference ------------------------------------------------------------
+// An untyped argument (`{...}`, `.Member`, or a ternary whose branches are both untyped) passed to a
+// polymorphic parameter whose type is only known after substitution is left unchecked and resolved
+// from that parameter's type once it is determined from the other arguments. Covers single procedures,
+// procedure groups (including the `append` builtin), variadics, named/reversed arguments, and the
+// nested/ternary/implicit-selector forms. All run through codegen.
+
+pp_def_push :: proc(a: ^[dynamic]$E, e: E)            { append(a, e) }
+pp_def_two  :: proc(a: ^[dynamic]$E, x: E, y: E)      { append(a, x); append(a, y) }
+pp_def_var  :: proc(a: ^[dynamic]$E, xs: ..E)         { for x in xs { append(a, x) } }
+pp_def_one  :: proc(a: ^[dynamic]$E, e: E)   -> string { append(a, e); return "one" }
+pp_def_many :: proc(a: ^[dynamic]$E, e: ..E) -> string { for x in e { append(a, x) }; return "many" }
+pp_def_group :: proc{pp_def_one, pp_def_many}
+
+@test
+parapoly_deferred_single :: proc(t: ^testing.T) { // untyped `{...}` resolved from a poly parameter
+	a: [dynamic][3]int; defer delete(a)
+	pp_def_push(&a, {1, 2, 3})           // positional
+	pp_def_push(a = &a, e = {4, 5, 6})   // named
+	pp_def_push(e = {7, 8, 9}, a = &a)   // reversed: literal before the determining arg
+	testing.expect(t, len(a) == 3, "single-proc deferred literal count")
+	testing.expect(t, a[0] == [3]int{1, 2, 3} && a[2] == [3]int{7, 8, 9}, "single-proc deferred literal values")
+}
+
+@test
+parapoly_deferred_multiple :: proc(t: ^testing.T) { // several untyped literals in one call
+	a: [dynamic][2]int; defer delete(a)
+	pp_def_two(&a, {1, 2}, {3, 4})           // two positional, shared elem type
+	pp_def_var(&a, {5, 6}, {7, 8}, {9, 10})  // variadic, three literals
+	testing.expect(t, len(a) == 5, "multiple deferred literals count")
+	testing.expect(t, a[1] == [2]int{3, 4} && a[4] == [2]int{9, 10}, "multiple deferred literals values")
+}
+
+@test
+parapoly_deferred_ternary :: proc(t: ^testing.T) { // both-branch-untyped ternaries as the deferred arg
+	a: [dynamic][2]int; defer delete(a)
+	c := true
+	pp_def_push(&a, c ? {1, 2} : {3, 4})                 // ?:
+	pp_def_push(&a, {5, 6} if !c else {7, 8})            // if/else
+	pp_def_push(&a, {9, 9} when ODIN_DEBUG else {8, 8})  // when (a[2], value depends on build)
+	pp_def_push(&a, c ? {1, 1} : (c ? {2, 2} : {3, 3}))  // nested
+	testing.expect(t, a[0] == [2]int{1, 2}, "ternary ?: deferred arg")
+	testing.expect(t, a[1] == [2]int{7, 8}, "ternary if/else deferred arg")
+	testing.expect(t, a[3] == [2]int{1, 1}, "nested ternary deferred arg")
+}
+
+@test
+parapoly_deferred_implicit_selector :: proc(t: ^testing.T) { // `.Member` resolved from a poly parameter
+	a: [dynamic]PP_Dir; defer delete(a)
+	c := false
+	pp_def_push(&a, .E)           // implicit selector
+	pp_def_push(&a, c ? .N : .W)  // ternary of selectors
+	testing.expect(t, a[0] == .E && a[1] == .W, "implicit-selector deferred arg")
+}
+
+@test
+parapoly_deferred_empty :: proc(t: ^testing.T) { // empty `{}` -> zero value of the resolved type
+	a: [dynamic][3]int; defer delete(a)
+	pp_def_push(&a, {})
+	testing.expect(t, a[0] == [3]int{0, 0, 0}, "empty compound literal deferred arg")
+}
+
+@test
+parapoly_deferred_append_group :: proc(t: ^testing.T) { // the `append` builtin (procedure group)
+	a: [dynamic][3]int; defer delete(a)
+	append(&a, {1, 2, 3})                   // positional -> append_elem
+	append(&a, {4, 5, 6}, {7, 8, 9})        // variadic   -> append_elems
+	append(array = &a, arg = {10, 11, 12})  // named
+	testing.expect(t, len(a) == 4, "append group deferred literal count")
+	testing.expect(t, a[0] == [3]int{1, 2, 3} && a[3] == [3]int{10, 11, 12}, "append group deferred literal values")
+}
+
+@test
+parapoly_deferred_group_ranking :: proc(t: ^testing.T) { // variadic vs non-variadic overload ranking
+	a: [dynamic][2]int; defer delete(a)
+	r1 := pp_def_group(&a, {1, 2})          // one literal -> non-variadic wins (variadic score penalty)
+	r2 := pp_def_group(&a, {3, 4}, {5, 6})  // two literals -> only the variadic overload fits the arity
+	testing.expect(t, r1 == "one", "single deferred literal picks non-variadic overload")
+	testing.expect(t, r2 == "many", "multiple deferred literals pick variadic overload")
+}
+
+@test
+parapoly_deferred_or_else :: proc(t: ^testing.T) { // or_else default self-types from the left operand
+	m := make(map[string][2]int); defer delete(m)
+	m["p"] = {1, 2}
+	a: [dynamic][2]int; defer delete(a)
+	pp_def_push(&a, m["p"]      or_else {9, 9})  // present -> {1,2}
+	pp_def_push(&a, m["absent"] or_else {7, 8})  // missing -> {7,8}
+	testing.expect(t, a[0] == [2]int{1, 2} && a[1] == [2]int{7, 8}, "or_else default resolved")
+}
+
+pp_is_sparse :: proc(x: $T) -> bool {
+	#partial switch v in type_info_of(T).variant {
+	case reflect.Type_Info_Enumerated_Array: return v.is_sparse
+	}
+	return false
+}
+
+@test
+parapoly_sparse_dense_dedup :: proc(t: ^testing.T) { // guards are_types_identical merging [E]T and #sparse[E]T
+	dense:  [PP_Dir]int
+	sparse: #sparse[PP_Dir]int
+	testing.expect(t, pp_is_sparse(dense)  == false, "[E]T instantiation is not sparse")
+	testing.expect(t, pp_is_sparse(sparse) == true,  "#sparse[E]T not merged with the dense instantiation")
+}
+
+pp_rec_arr  :: proc(x: PP_Bar([2]$T))       -> typeid { return T }
+pp_rec_earr :: proc(x: PP_Bar([PP_Dir]$T))  -> typeid { return T }
+
+@test
+parapoly_record_compound_arg :: proc(t: ^testing.T) { // record whose polymorphic argument is a compound type
+	v: PP_Bar([2]int)        // PP_Bar :: struct($X){ v: X }
+	w: PP_Bar([PP_Dir]f32)
+	testing.expect(t, pp_rec_arr(v)  == int, "Record([2]$T) determination (was a subst_apply crash)")
+	testing.expect(t, pp_rec_earr(w) == f32, "Record([E]$T) determination")
+}
+
+PP_Vec :: struct($N: int, $name: string, $signed: bool) { data: [N]int } // non-type poly const params
+pp_vec_name   :: proc(v: PP_Vec($N, $name, $signed)) -> string { return name }
+pp_vec_n      :: proc(v: PP_Vec($N, $name, $signed)) -> int    { return N }
+pp_vec_signed :: proc(v: PP_Vec($N, $name, $signed)) -> bool   { return signed }
+
+@test
+parapoly_record_nonint_const :: proc(t: ^testing.T) { // determine non-integer const params of a record arg
+	v: PP_Vec(3, "hello", true)
+	testing.expect(t, pp_vec_name(v)   == "hello", "string poly-const param determined from record arg")
+	testing.expect(t, pp_vec_n(v)      == 3,       "int poly-const param determined alongside a string one")
+	testing.expect(t, pp_vec_signed(v) == true,    "bool poly-const param determined from record arg")
+}
+
+// Tier-A: a bare compound literal determines a polymorphic ELEMENT type (`[K]$T`, `[]$T`), count fixed.
+pp_elem_arr :: proc(a: [3]$T) -> typeid { return T }
+pp_elem_sli :: proc(s: []$T)  -> typeid { return T }
+
+@test
+parapoly_elem_from_compound_lit :: proc(t: ^testing.T) {
+	testing.expect(t, pp_elem_arr({1, 2, 3})  == int, "[3]$T element determined from literal")
+	testing.expect(t, pp_elem_arr({-1, 2, 3}) == int, "[3]$T element from unary-over-literal")
+	testing.expect(t, pp_elem_sli({1, 2, 3})  == int, "[]$T element determined from literal")
+	testing.expect(t, pp_elem_sli({1.5, 2.5}) == f64, "[]$T element defaults untyped float to f64")
+}
+
+// A bare compound literal also determines a polymorphic COUNT (`[$N]$T`, `[$N]int`) from its length.
+pp_cnt_both :: proc(a: [$N]$T) -> (int, typeid) { return N, T }
+pp_cnt_int  :: proc(a: [$N]int) -> int { return N }
+
+@test
+parapoly_count_from_compound_lit :: proc(t: ^testing.T) {
+	n1, e1 := pp_cnt_both({1, 2, 3})
+	testing.expect(t, n1 == 3 && e1 == int, "[$N]$T binds N=3 and T=int from literal")
+	n2, e2 := pp_cnt_both({1.5, 2.5})
+	testing.expect(t, n2 == 2 && e2 == f64, "[$N]$T binds N=2 and T=f64 from literal")
+	testing.expect(t, pp_cnt_int({10, 20, 30, 40}) == 4, "[$N]int binds N=4 (concrete element)")
+	v := 7
+	testing.expect(t, pp_cnt_int({v, v}) == 2, "[$N]int count works with non-literal elements")
+}
+
+// A constant default value for a polymorphic parameter, validated against the concrete type at instantiation.
+pp_def :: proc(x: $T, y: T = 0) -> T { return y }
+
+@test
+parapoly_poly_param_default :: proc(t: ^testing.T) {
+	testing.expect(t, pp_def(5)      == 0,   "untyped default resolves to the concrete param type")
+	testing.expect(t, pp_def(5, 9)   == 9,   "explicit argument overrides the default")
+	testing.expect(t, pp_def(2.5)    == 0.0, "same default against a different instantiation (f64)")
+	testing.expect(t, pp_def(2.5, 3) == 3.0, "explicit float argument")
+}

From 016414cc888bf0f231719e201c777c587e9c39b8 Mon Sep 17 00:00:00 2001
From: Mihail Moskov <28909106+corleypc@users.noreply.github.com>
Date: Thu, 1 Oct 2026 15:09:24 +0300
Subject: [PATCH 114/215] disallows odin cc with #must_tail

---
 src/check_expr.cpp | 7 ++++++-
 src/types.cpp      | 8 ++++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 13b578084..28713880f 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -9274,7 +9274,12 @@ gb_internal ExprKind check_call_expr(CheckerContext *c, Operand *operand, Ast *c
 		break;
 	case ProcTailing_must_tail:
 		is_call_tailed = true;
-		if (c->curr_proc_sig == nullptr || !are_types_identical(c->curr_proc_sig, pt)) {
+		if (pt->kind == Type_Proc && !is_calling_convention_must_tail_allowed(pt->Proc.calling_convention)) {
+			ERROR_BLOCK();
+			error(call, "'#must_tail' cannot be applied to a call of a procedure with the \"%s\" calling convention",
+			      proc_calling_convention_strings[pt->Proc.calling_convention]);
+			error_line("\tSuggestion: Use the \"preserve/none\" calling convention\n");
+		} else if (c->curr_proc_sig == nullptr || !are_types_identical(c->curr_proc_sig, pt)) {
 			ERROR_BLOCK();
 			gbString a = type_to_string(pt);
 			gbString b = type_to_string(c->curr_proc_sig);
diff --git a/src/types.cpp b/src/types.cpp
index d39fcb901..808d4aebf 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -1224,6 +1224,14 @@ gb_internal bool is_calling_convention_odin(ProcCallingConvention calling_conven
 	return false;
 }
 
+gb_internal bool is_calling_convention_must_tail_allowed(ProcCallingConvention calling_convention) {
+	switch (calling_convention) {
+	case ProcCC_Odin:
+		return false;
+	}
+	return true;
+}
+
 gb_internal Type *alloc_type_tuple() {
 	Type *t = alloc_type(Type_Tuple);
 	return t;

From b06c5ffa70e175983c2ff22047294d019a1c4313 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 13:42:32 +0100
Subject: [PATCH 115/215] Add `-internal-global-entity-graph`; Fix union type
 inference bug

---
 src/build_settings.cpp |  1 +
 src/check_decl.cpp     |  2 ++
 src/check_expr.cpp     |  2 ++
 src/checker.cpp        | 18 ++++++++++++++++++
 src/main.cpp           |  5 +++++
 5 files changed, 28 insertions(+)

diff --git a/src/build_settings.cpp b/src/build_settings.cpp
index ef582b4ed..f6ebd5755 100644
--- a/src/build_settings.cpp
+++ b/src/build_settings.cpp
@@ -598,6 +598,7 @@ struct BuildContext {
 	bool internal_weak_monomorphization;
 	bool internal_ignore_llvm_verification;
 	bool internal_llvm_no_sroa;
+	bool internal_global_entity_graph;
 
 	bool   enable_rvo;
 
diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index 63bf99b48..6280fc63b 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -2137,6 +2137,7 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 	if (e->state == EntityState_Resolved)  {
 		return;
 	}
+	GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
 	if (e->flags & EntityFlag_Lazy) {
 		mutex_lock(&ctx->info->lazy_mutex);
 	}
@@ -2222,6 +2223,7 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 
 	}
 end:;
+	global_entity_timing_end(timing_frame, e);
 	// NOTE(bill): Add it to the list of checked entities
 	if (e->flags & EntityFlag_Lazy) {
 		array_add(&ctx->info->entities, e);
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index a12b184eb..5f7523134 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -13112,6 +13112,8 @@ gb_internal ExprKind check_expr_base(CheckerContext *c, Operand *o, Ast *node, T
 			Type *elem_type = core_broadcastable_elem_type(type_hint);
 			if (is_type_untyped(o->type)) {
 				if (is_type_union(elem_type)) {
+					// NOTE: record it first so convert_to_typed's final update keeps a constant that becomes a value (e.g. broadcast to an array variant)
+					add_untyped(c, node, o->mode, o->type, o->value);
 					convert_to_typed(c, o, elem_type);
 				}
 			}
diff --git a/src/checker.cpp b/src/checker.cpp
index 6273a8f7e..3cb10f95b 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -4599,6 +4599,7 @@ gb_internal DECL_ATTRIBUTE_PROC(asm_decl_attribute) {
 	return false;
 }
 
+#include "checker_global_graph.cpp"
 #include "check_expr.cpp"
 #include "check_builtin.cpp"
 #include "check_type.cpp"
@@ -5384,6 +5385,7 @@ gb_internal void check_all_global_entities(Checker *c) {
 			continue;
 		}
 		DeclInfo *d = e->decl_info;
+		GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
 		check_single_global_entity(c, e, d);
 		if (e->type != nullptr && is_type_typed(e->type)) {
 			for (Type *t = nullptr; mpsc_dequeue(&c->soa_types_to_complete, &t); /**/) {
@@ -5393,6 +5395,7 @@ gb_internal void check_all_global_entities(Checker *c) {
 			(void)type_size_of(e->type);
 			(void)type_align_of(e->type);
 		}
+		global_entity_timing_end(timing_frame, e);
 	}
 
 	in_single_threaded_checker_stage.store(false, std::memory_order_relaxed);
@@ -6279,6 +6282,7 @@ gb_internal void check_import_entities(Checker *c) {
 	defer (map_destroy(&untyped));
 
 	isize min_pkg_index = 0;
+	u64 stage_start = global_import_stage_begin();
 	for (isize pkg_index = 0; pkg_index < package_order.count; pkg_index++) {
 		ImportGraphNode *node = package_order[pkg_index];
 		AstPackage *pkg = node->pkg;
@@ -6309,6 +6313,7 @@ gb_internal void check_import_entities(Checker *c) {
 		}
 		min_pkg_index = pkg_index;
 	}
+	global_import_stage_end(GlobalImportStage_CollectFileDecls, stage_start);
 
 	TIME_SECTION("check_import_entities - check delayed entities");
 	for (isize pkg_index = 0; pkg_index < package_order.count; pkg_index++) {
@@ -6316,6 +6321,7 @@ gb_internal void check_import_entities(Checker *c) {
 		GB_ASSERT(node->scope->flags&ScopeFlag_Pkg);
 		AstPackage *pkg = node->scope->pkg;
 
+		stage_start = global_import_stage_begin();
 		for_array(i, pkg->files) {
 			AstFile *f = pkg->files[i];
 			reset_checker_context(&ctx, f, &untyped);
@@ -6326,13 +6332,17 @@ gb_internal void check_import_entities(Checker *c) {
 			array_clear(&f->delayed_decls_queues[AstDelayQueue_Import]);
 			add_untyped_expressions(ctx.info, &untyped);
 		}
+		global_import_stage_end(GlobalImportStage_Imports, stage_start);
 
+		stage_start = global_import_stage_begin();
 		for_array(i, pkg->files) {
 			AstFile *f = pkg->files[i];
 			reset_checker_context(&ctx, f, &untyped);
 			correct_type_aliases_in_scope(&ctx, pkg->scope);
 		}
+		global_import_stage_end(GlobalImportStage_TypeAliases, stage_start);
 
+		stage_start = global_import_stage_begin();
 		for_array(i, pkg->files) {
 			AstFile *f = pkg->files[i];
 			reset_checker_context(&ctx, f, &untyped);
@@ -6354,7 +6364,9 @@ gb_internal void check_import_entities(Checker *c) {
 
 			array_clear(&f->delayed_decls_queues[AstDelayQueue_ForeignBlock]);
 		}
+		global_import_stage_end(GlobalImportStage_ForeignBlocks, stage_start);
 
+		stage_start = global_import_stage_begin();
 		for_array(i, pkg->files) {
 			AstFile *f = pkg->files[i];
 			reset_checker_context(&ctx, f, &untyped);
@@ -6367,6 +6379,7 @@ gb_internal void check_import_entities(Checker *c) {
 
 			add_untyped_expressions(ctx.info, &untyped);
 		}
+		global_import_stage_end(GlobalImportStage_DelayedExprs, stage_start);
 	}
 }
 
@@ -7767,6 +7780,11 @@ gb_internal void check_parsed_files(Checker *c) {
 	TIME_SECTION("check all global entities");
 	check_all_global_entities(c);
 
+	if (build_context.internal_global_entity_graph) {
+		TIME_SECTION("print global entity graph");
+		print_global_entity_graph(c);
+	}
+
 	TIME_SECTION("init preload");
 	init_preload(c);
 
diff --git a/src/main.cpp b/src/main.cpp
index 9560bb384..ca56c40f8 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -532,6 +532,7 @@ enum BuildFlagKind {
 	BuildFlag_InternalLLVMVerification,
 	BuildFlag_InternalLLVMNoSROA,
 	BuildFlag_InternalEnableRVO,
+	BuildFlag_InternalGlobalEntityGraph,
 
 	BuildFlag_Sanitize,
 	BuildFlag_LTO,
@@ -793,6 +794,7 @@ gb_internal bool parse_build_flags(Array<String> args) {
 	add_flag(&build_flags, BuildFlag_InternalLLVMVerification, str_lit("internal-ignore-llvm-verification"), BuildFlagParam_None, Command_all);
 	add_flag(&build_flags, BuildFlag_InternalLLVMNoSROA,      str_lit("internal-llvm-no-sroa"), BuildFlagParam_None, Command_all);
 	add_flag(&build_flags, BuildFlag_InternalEnableRVO,       str_lit("internal-enable-rvo"), BuildFlagParam_None, Command_all);
+	add_flag(&build_flags, BuildFlag_InternalGlobalEntityGraph, str_lit("internal-global-entity-graph"), BuildFlagParam_None, Command__does_check);
 
 
 	add_flag(&build_flags, BuildFlag_Sanitize,                str_lit("sanitize"),                  BuildFlagParam_String,  Command__does_build, true);
@@ -1841,6 +1843,9 @@ gb_internal bool parse_build_flags(Array<String> args) {
 						case BuildFlag_InternalEnableRVO:
 							build_context.enable_rvo = true;
 							break;
+						case BuildFlag_InternalGlobalEntityGraph:
+							build_context.internal_global_entity_graph = true;
+							break;
 
 
 						case BuildFlag_Sanitize:

From c6b9f8d9980be2e11ba5dd924a11aa6ef3fffa0c Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 13:51:40 +0100
Subject: [PATCH 116/215] Try to fix the `#+lazy` entities

---
 src/check_decl.cpp           |  22 +-
 src/check_expr.cpp           |  13 +-
 src/checker.hpp              |   1 +
 src/checker_global_graph.cpp | 539 +++++++++++++++++++++++++++++++++++
 4 files changed, 568 insertions(+), 7 deletions(-)
 create mode 100644 src/checker_global_graph.cpp

diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index 6280fc63b..48865d890 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -2137,10 +2137,16 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 	if (e->state == EntityState_Resolved)  {
 		return;
 	}
-	GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
-	if (e->flags & EntityFlag_Lazy) {
+	bool is_lazy = (e->flags & EntityFlag_Lazy) != 0;
+	if (is_lazy) {
 		mutex_lock(&ctx->info->lazy_mutex);
+		if (e->state == EntityState_Resolved) {
+			// NOTE: another thread checked it whilst this one waited
+			mutex_unlock(&ctx->info->lazy_mutex);
+			return;
+		}
 	}
+	GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
 
 	String name = e->token.string;
 
@@ -2225,12 +2231,22 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 end:;
 	global_entity_timing_end(timing_frame, e);
 	// NOTE(bill): Add it to the list of checked entities
-	if (e->flags & EntityFlag_Lazy) {
+	if (is_lazy) {
 		array_add(&ctx->info->entities, e);
 		mutex_unlock(&ctx->info->lazy_mutex);
 	}
 }
 
+// A lazy entity is only ever in progress on the thread holding `lazy_mutex`, so taking it (it is
+// recursive) waits out another thread and is a no-op on the thread that is checking it
+gb_internal void wait_for_lazy_entity(CheckerContext *ctx, Entity *e) {
+	if ((e->flags & EntityFlag_Lazy) == 0 || e->state == EntityState_Resolved) {
+		return;
+	}
+	mutex_lock(&ctx->info->lazy_mutex);
+	mutex_unlock(&ctx->info->lazy_mutex);
+}
+
 
 gb_internal void add_deps_from_child_to_parent(DeclInfo *decl) {
 	if (decl && decl->parent) {
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 5f7523134..98c3e7051 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -1677,6 +1677,8 @@ gb_internal Entity *check_ident(CheckerContext *c, Operand *o, Ast *n, Type *nam
 	add_entity_use(c, n, e);
 	if (e->state == EntityState_Unresolved) {
 		check_entity_decl(c, e, nullptr, named_type);
+	} else {
+		wait_for_lazy_entity(c, e);
 	}
 	switch (e->kind) {
 	case Entity_Constant:
@@ -5701,11 +5703,14 @@ gb_internal Entity *check_entity_from_ident_or_selector(CheckerContext *c, Ast *
 		}
 	} else */if (node->kind == Ast_Ident) {
 		Entity *e = node->Ident.entity.load();
-		if (e != nullptr) {
-			return e;
+		if (e == nullptr) {
+			e = scope_lookup(c->scope, node->Ident.interned, node->Ident.hash);
 		}
-		String name = node->Ident.token.string;
-		return scope_lookup(c->scope, node->Ident.interned, node->Ident.hash);
+		if (e != nullptr) {
+			// its kind and type are read by the caller
+			wait_for_lazy_entity(c, e);
+		}
+		return e;
 	} else if (!ident_only) if (node->kind == Ast_SelectorExpr) {
 		ast_node(se, SelectorExpr, node);
 		if (se->token.kind == Token_ArrowRight) {
diff --git a/src/checker.hpp b/src/checker.hpp
index 36d9aa6e4..c382d28fe 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -916,6 +916,7 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *c, Ast *decl);
 
 
 gb_internal void check_entity_decl(CheckerContext *c, Entity *e, DeclInfo *d, Type *named_type);
+gb_internal void wait_for_lazy_entity(CheckerContext *c, Entity *e);
 gb_internal void check_const_decl(CheckerContext *c, Entity *e, Ast *type_expr, Ast *init_expr, Type *named_type);
 gb_internal void check_type_decl(CheckerContext *c, Entity *e, Ast *type_expr, Type *def);
 
diff --git a/src/checker_global_graph.cpp b/src/checker_global_graph.cpp
new file mode 100644
index 000000000..d639297ac
--- /dev/null
+++ b/src/checker_global_graph.cpp
@@ -0,0 +1,539 @@
+// -internal-global-entity-graph: per-entity self time of global declaration checking,
+// plus statistics of the dependency graph between global entities (DeclInfo::deps)
+
+struct GlobalEntityTime {
+	u64  ticks;
+	bool in_global_loop;
+};
+
+struct GlobalEntityTimingFrame {
+	u64  start;
+	u64  saved_child_ticks;
+	bool active;
+};
+
+enum GlobalImportStagePart {
+	GlobalImportStage_CollectFileDecls,
+	GlobalImportStage_Imports,
+	GlobalImportStage_TypeAliases,
+	GlobalImportStage_ForeignBlocks,
+	GlobalImportStage_DelayedExprs,
+
+	GlobalImportStage_COUNT,
+};
+
+gb_global char const *global_import_stage_names[GlobalImportStage_COUNT] = {
+	"collect file decls ('when')",
+	"delayed imports",
+	"type alias correction",
+	"foreign blocks",
+	"delayed expressions (#assert etc.)",
+};
+
+gb_global u64 global_import_stage_ticks[GlobalImportStage_COUNT];
+
+gb_internal u64 global_import_stage_begin(void) {
+	return build_context.internal_global_entity_graph ? time_stamp_time_now() : 0;
+}
+
+gb_internal void global_import_stage_end(GlobalImportStagePart part, u64 start) {
+	if (build_context.internal_global_entity_graph) {
+		global_import_stage_ticks[part] += time_stamp_time_now() - start;
+	}
+}
+
+gb_global BlockingMutex global_entity_time_mutex;
+gb_global PtrMap<Entity *, GlobalEntityTime> global_entity_times;
+gb_thread_local u64 global_entity_child_ticks;
+
+gb_internal GlobalEntityTimingFrame global_entity_timing_begin(Entity *e) {
+	GlobalEntityTimingFrame f = {};
+	if (!build_context.internal_global_entity_graph) {
+		return f;
+	}
+	if (e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
+		return f;
+	}
+	f.active = true;
+	f.saved_child_ticks = global_entity_child_ticks;
+	global_entity_child_ticks = 0;
+	f.start = time_stamp_time_now();
+	return f;
+}
+
+gb_internal void global_entity_timing_end(GlobalEntityTimingFrame const &f, Entity *e) {
+	if (!f.active) {
+		return;
+	}
+	u64 total = time_stamp_time_now() - f.start;
+	u64 self  = total - gb_min(total, global_entity_child_ticks);
+	global_entity_child_ticks = f.saved_child_ticks + total;
+
+	bool in_global_loop = in_single_threaded_checker_stage.load(std::memory_order_relaxed);
+
+	MUTEX_GUARD(&global_entity_time_mutex);
+	GlobalEntityTime *found = map_get(&global_entity_times, e);
+	if (found) {
+		found->ticks += self;
+	} else {
+		map_set(&global_entity_times, e, GlobalEntityTime{self, in_global_loop});
+	}
+}
+
+
+// Iterative Tarjan; components are numbered so that every edge v->w has comp(w) <= comp(v)
+gb_internal i32 global_graph_scc(i32 node_count, Array<i32> const &offsets, Array<i32> const &targets, Array<i32> *comp_of_) {
+	struct Frame {
+		i32 v;
+		i32 pos;
+	};
+
+	auto index    = array_make<i32>(heap_allocator(), node_count);
+	auto low      = array_make<i32>(heap_allocator(), node_count);
+	auto on_stack = array_make<bool>(heap_allocator(), node_count);
+	auto stack    = array_make<i32>(heap_allocator(), 0, node_count);
+	auto frames   = array_make<Frame>(heap_allocator(), 0, 64);
+	defer (array_free(&index));
+	defer (array_free(&low));
+	defer (array_free(&on_stack));
+	defer (array_free(&stack));
+	defer (array_free(&frames));
+
+	Array<i32> &comp_of = *comp_of_;
+	for (i32 v = 0; v < node_count; v++) {
+		index[v]    = -1;
+		low[v]      = 0;
+		on_stack[v] = false;
+		comp_of[v]  = -1;
+	}
+
+	i32 counter = 0;
+	i32 comp_count = 0;
+	for (i32 root = 0; root < node_count; root++) {
+		if (index[root] >= 0) {
+			continue;
+		}
+		index[root] = low[root] = counter++;
+		array_add(&stack, root);
+		on_stack[root] = true;
+		array_add(&frames, Frame{root, 0});
+
+		while (frames.count > 0) {
+			Frame *top = &frames[frames.count-1];
+			i32 v = top->v;
+			if (offsets[v] + top->pos < offsets[v+1]) {
+				i32 w = targets[offsets[v] + top->pos];
+				top->pos += 1;
+				if (index[w] < 0) {
+					index[w] = low[w] = counter++;
+					array_add(&stack, w);
+					on_stack[w] = true;
+					array_add(&frames, Frame{w, 0});
+				} else if (on_stack[w]) {
+					low[v] = gb_min(low[v], index[w]);
+				}
+				continue;
+			}
+
+			if (low[v] == index[v]) {
+				for (;;) {
+					i32 w = array_pop(&stack);
+					on_stack[w] = false;
+					comp_of[w] = comp_count;
+					if (w == v) {
+						break;
+					}
+				}
+				comp_count += 1;
+			}
+			array_pop(&frames);
+			if (frames.count > 0) {
+				i32 u = frames[frames.count-1].v;
+				low[u] = gb_min(low[u], low[v]);
+			}
+		}
+	}
+	return comp_count;
+}
+
+struct GlobalGraphComp {
+	i32  start; // into the member order array
+	i32  count;
+	u64  ticks;
+	u64  path_ticks; // heaviest dependency chain ending at this component, inclusive
+	i32  path_len;
+	i32  path_prev;
+	bool has_self_edge;
+};
+
+struct GlobalGraphSortItem {
+	u64 key;
+	i32 id;
+};
+
+gb_internal GB_COMPARE_PROC(global_graph_sort_item_desc) {
+	GlobalGraphSortItem const *x = cast(GlobalGraphSortItem const *)a;
+	GlobalGraphSortItem const *y = cast(GlobalGraphSortItem const *)b;
+	if (x->key != y->key) {
+		return x->key > y->key ? -1 : +1;
+	}
+	return i32_cmp(x->id, y->id);
+}
+
+// Fills `comps` (indexed by component) and `order` (node indices grouped by component)
+gb_internal void global_graph_condense(i32 node_count, Array<i32> const &offsets, Array<i32> const &targets, Array<u64> const &node_ticks,
+                                       Array<i32> const &comp_of, i32 comp_count, Array<GlobalGraphComp> *comps_, Array<i32> *order_) {
+	Array<GlobalGraphComp> &comps = *comps_;
+	Array<i32> &order = *order_;
+	for (i32 i = 0; i < comp_count; i++) {
+		comps[i] = {};
+		comps[i].path_prev = -1;
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		GlobalGraphComp *g = &comps[comp_of[v]];
+		g->count += 1;
+		g->ticks += node_ticks[v];
+	}
+	i32 start = 0;
+	for (i32 i = 0; i < comp_count; i++) {
+		comps[i].start = start;
+		start += comps[i].count;
+		comps[i].count = 0;
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		GlobalGraphComp *g = &comps[comp_of[v]];
+		order[g->start + g->count] = v;
+		g->count += 1;
+	}
+
+	for (i32 ci = 0; ci < comp_count; ci++) {
+		GlobalGraphComp *g = &comps[ci];
+		u64 best_ticks = 0;
+		i32 best_len = 0;
+		i32 best_prev = -1;
+		for (i32 k = 0; k < g->count; k++) {
+			i32 v = order[g->start + k];
+			for (i32 e = offsets[v]; e < offsets[v+1]; e++) {
+				i32 w = targets[e];
+				if (w == v) {
+					g->has_self_edge = true;
+				}
+				i32 cw = comp_of[w];
+				if (cw == ci) {
+					continue;
+				}
+				GB_ASSERT(cw < ci);
+				GlobalGraphComp *d = &comps[cw];
+				if (best_prev < 0 || d->path_ticks > best_ticks) {
+					best_ticks = d->path_ticks;
+					best_prev  = cw;
+				}
+				best_len = gb_max(best_len, d->path_len);
+			}
+		}
+		g->path_ticks = g->ticks + best_ticks;
+		g->path_len   = 1 + best_len;
+		g->path_prev  = best_prev;
+	}
+}
+
+gb_internal f64 global_graph_ms(u64 ticks, u64 freq) {
+	return 1000.0 * cast(f64)ticks / cast(f64)freq;
+}
+
+gb_internal void global_graph_print_entity(Entity *e) {
+	String pkg  = e->pkg  ? e->pkg->name : str_lit("?");
+	String file = e->file ? filename_without_directory(e->file->fullpath) : str_lit("?");
+	gb_printf_err("%.*s.%.*s (%.*s:%d)", LIT(pkg), LIT(e->token.string), LIT(file), e->token.pos.line);
+}
+
+gb_internal void global_graph_print_comp(Array<Entity *> const &nodes, Array<i32> const &order, GlobalGraphComp const *g, u64 ticks, u64 freq, isize max_names) {
+	gb_printf_err("    %10.3f ms %7d entities  ", global_graph_ms(ticks, freq), g->count);
+	for (i32 k = 0; k < g->count && k < max_names; k++) {
+		if (k > 0) {
+			gb_printf_err(", ");
+		}
+		global_graph_print_entity(nodes[order[g->start + k]]);
+	}
+	if (g->count > max_names) {
+		gb_printf_err(", ...");
+	}
+	gb_printf_err("\n");
+}
+
+gb_internal void print_global_entity_graph(Checker *c) {
+	u64 const freq = time_stamp__freq();
+
+	// Nodes
+	auto nodes = array_make<Entity *>(heap_allocator(), 0, c->info.entities.count);
+	defer (array_free(&nodes));
+	PtrMap<Entity *, i32> node_index = {};
+	map_init(&node_index, c->info.entities.count);
+	defer (map_destroy(&node_index));
+
+	for (Entity *e : c->info.entities) {
+		if (e->decl_info == nullptr || e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
+			continue;
+		}
+		if (map_get(&node_index, e) != nullptr) {
+			continue;
+		}
+		map_set(&node_index, e, cast(i32)nodes.count);
+		array_add(&nodes, e);
+	}
+	i32 node_count = cast(i32)nodes.count;
+
+	// Edges, from what each declaration actually used while being checked
+	auto offsets = array_make<i32>(heap_allocator(), node_count+1);
+	auto targets = array_make<i32>(heap_allocator(), 0, node_count*4);
+	defer (array_free(&offsets));
+	defer (array_free(&targets));
+	isize self_edges = 0;
+	for (i32 v = 0; v < node_count; v++) {
+		offsets[v] = cast(i32)targets.count;
+		DeclInfo *d = nodes[v]->decl_info;
+		FOR_PTR_SET(dep, d->deps) {
+			i32 *w = map_get(&node_index, dep);
+			if (w != nullptr) {
+				array_add(&targets, *w);
+				self_edges += *w == v;
+			}
+		}
+	}
+	offsets[node_count] = cast(i32)targets.count;
+
+	// Weights
+	auto node_ticks = array_make<u64>(heap_allocator(), node_count);
+	defer (array_free(&node_ticks));
+	u64 total_ticks = 0;
+	u64 when_ticks = 0;
+	isize untimed = 0;
+	mutex_lock(&global_entity_time_mutex);
+	for (i32 v = 0; v < node_count; v++) {
+		GlobalEntityTime *t = map_get(&global_entity_times, nodes[v]);
+		node_ticks[v] = t ? t->ticks : 0;
+		total_ticks += node_ticks[v];
+		if (t == nullptr) {
+			untimed += 1;
+		} else if (!t->in_global_loop) {
+			when_ticks += t->ticks;
+		}
+	}
+	mutex_unlock(&global_entity_time_mutex);
+
+	// Entity groups
+	auto comp_of = array_make<i32>(heap_allocator(), node_count);
+	defer (array_free(&comp_of));
+	i32 comp_count = global_graph_scc(node_count, offsets, targets, &comp_of);
+
+	auto comps = array_make<GlobalGraphComp>(heap_allocator(), comp_count);
+	auto order = array_make<i32>(heap_allocator(), node_count);
+	defer (array_free(&comps));
+	defer (array_free(&order));
+	global_graph_condense(node_count, offsets, targets, node_ticks, comp_of, comp_count, &comps, &order);
+
+	i32 critical = -1;
+	i32 largest = -1;
+	isize cyclic_comps = 0;
+	for (i32 ci = 0; ci < comp_count; ci++) {
+		GlobalGraphComp *g = &comps[ci];
+		if (critical < 0 || g->path_ticks > comps[critical].path_ticks) {
+			critical = ci;
+		}
+		if (largest < 0 || g->count > comps[largest].count) {
+			largest = ci;
+		}
+		cyclic_comps += g->count > 1 || g->has_self_edge;
+	}
+
+	// Packages, weighted by the entities they own
+	PtrMap<AstPackage *, i32> pkg_index = {};
+	map_init(&pkg_index, c->info.packages.count);
+	defer (map_destroy(&pkg_index));
+	auto pkgs = array_make<AstPackage *>(heap_allocator(), 0, c->info.packages.count);
+	defer (array_free(&pkgs));
+	auto node_pkg = array_make<i32>(heap_allocator(), node_count);
+	defer (array_free(&node_pkg));
+	for (i32 v = 0; v < node_count; v++) {
+		AstPackage *p = nodes[v]->pkg;
+		i32 *found = map_get(&pkg_index, p);
+		if (found == nullptr) {
+			map_set(&pkg_index, p, cast(i32)pkgs.count);
+			node_pkg[v] = cast(i32)pkgs.count;
+			array_add(&pkgs, p);
+		} else {
+			node_pkg[v] = *found;
+		}
+	}
+	i32 pkg_count = cast(i32)pkgs.count;
+
+	auto pkg_ticks = array_make<u64>(heap_allocator(), pkg_count);
+	auto pkg_entities = array_make<i32>(heap_allocator(), pkg_count);
+	defer (array_free(&pkg_ticks));
+	defer (array_free(&pkg_entities));
+	for (i32 p = 0; p < pkg_count; p++) {
+		pkg_ticks[p] = 0;
+		pkg_entities[p] = 0;
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		pkg_ticks[node_pkg[v]] += node_ticks[v];
+		pkg_entities[node_pkg[v]] += 1;
+	}
+
+	auto pkg_offsets = array_make<i32>(heap_allocator(), pkg_count+1);
+	auto pkg_targets = array_make<i32>(heap_allocator(), 0, pkg_count*4);
+	defer (array_free(&pkg_offsets));
+	defer (array_free(&pkg_targets));
+	{
+		auto pkg_edges = array_make<Array<i32>>(heap_allocator(), pkg_count);
+		PtrMap<u64, bool> seen = {};
+		map_init(&seen);
+		for (i32 p = 0; p < pkg_count; p++) {
+			pkg_edges[p] = array_make<i32>(heap_allocator());
+		}
+		for (i32 v = 0; v < node_count; v++) {
+			for (i32 e = offsets[v]; e < offsets[v+1]; e++) {
+				i32 pv = node_pkg[v];
+				i32 pw = node_pkg[targets[e]];
+				if (pv == pw) {
+					continue;
+				}
+				u64 key = (cast(u64)(pv+1) << 32) | cast(u64)(pw+1);
+				if (map_get(&seen, key) == nullptr) {
+					map_set(&seen, key, true);
+					array_add(&pkg_edges[pv], pw);
+				}
+			}
+		}
+		for (i32 p = 0; p < pkg_count; p++) {
+			pkg_offsets[p] = cast(i32)pkg_targets.count;
+			for (i32 w : pkg_edges[p]) {
+				array_add(&pkg_targets, w);
+			}
+			array_free(&pkg_edges[p]);
+		}
+		pkg_offsets[pkg_count] = cast(i32)pkg_targets.count;
+		array_free(&pkg_edges);
+		map_destroy(&seen);
+	}
+
+	auto pkg_comp_of = array_make<i32>(heap_allocator(), pkg_count);
+	defer (array_free(&pkg_comp_of));
+	i32 pkg_comp_count = global_graph_scc(pkg_count, pkg_offsets, pkg_targets, &pkg_comp_of);
+	auto pkg_comps = array_make<GlobalGraphComp>(heap_allocator(), pkg_comp_count);
+	auto pkg_order = array_make<i32>(heap_allocator(), pkg_count);
+	defer (array_free(&pkg_comps));
+	defer (array_free(&pkg_order));
+	global_graph_condense(pkg_count, pkg_offsets, pkg_targets, pkg_ticks, pkg_comp_of, pkg_comp_count, &pkg_comps, &pkg_order);
+	u64 pkg_critical_ticks = 0;
+	isize pkg_cyclic = 0;
+	for (i32 ci = 0; ci < pkg_comp_count; ci++) {
+		pkg_critical_ticks = gb_max(pkg_critical_ticks, pkg_comps[ci].path_ticks);
+		pkg_cyclic += pkg_comps[ci].count > 1;
+	}
+
+	// Report
+	f64 total_ms = global_graph_ms(total_ticks, freq);
+	f64 critical_ms = critical >= 0 ? global_graph_ms(comps[critical].path_ticks, freq) : 0;
+	f64 pkg_critical_ms = global_graph_ms(pkg_critical_ticks, freq);
+
+	gb_printf_err("Global entity graph\n");
+	gb_printf_err("  entities:  %td (%td not timed), dependency edges: %td (%td self edges)\n", nodes.count, untimed, targets.count, self_edges);
+	gb_printf_err("  self time: %.3f ms total; %.3f ms during 'when' resolution, %.3f ms in the global loop\n",
+	              total_ms, global_graph_ms(when_ticks, freq), global_graph_ms(total_ticks - when_ticks, freq));
+	gb_printf_err("  groups:    %d (%td with a cycle), largest has %d entities\n",
+	              comp_count, cyclic_comps, largest >= 0 ? comps[largest].count : 0);
+	gb_printf_err("  critical path (entity groups): %.3f ms over %d groups -> at most %.2fx speedup\n",
+	              critical_ms, critical >= 0 ? comps[critical].path_len : 0, critical_ms > 0 ? total_ms/critical_ms : 0.0);
+	gb_printf_err("  critical path (packages):      %.3f ms -> at most %.2fx speedup (%d packages, %td package cycles)\n",
+	              pkg_critical_ms, pkg_critical_ms > 0 ? total_ms/pkg_critical_ms : 0.0, pkg_count, pkg_cyclic);
+
+	gb_printf_err("  check_import_entities (sequential, includes entity checks it triggers):\n");
+	for (isize i = 0; i < GlobalImportStage_COUNT; i++) {
+		gb_printf_err("    %10.3f ms  %s\n", global_graph_ms(global_import_stage_ticks[i], freq), global_import_stage_names[i]);
+	}
+
+	{
+		i32 const BUCKET_COUNT = 10;
+		i32 const bucket_max[BUCKET_COUNT] = {1, 2, 4, 8, 16, 64, 256, 1024, 4096, 0x7fffffff};
+		char const *bucket_name[BUCKET_COUNT] = {"1", "2", "3-4", "5-8", "9-16", "17-64", "65-256", "257-1024", "1025-4096", ">4096"};
+		isize bucket_groups[BUCKET_COUNT] = {};
+		isize bucket_entities[BUCKET_COUNT] = {};
+		u64   bucket_ticks[BUCKET_COUNT] = {};
+		for (i32 ci = 0; ci < comp_count; ci++) {
+			GlobalGraphComp *g = &comps[ci];
+			for (i32 b = 0; b < BUCKET_COUNT; b++) {
+				if (g->count <= bucket_max[b]) {
+					bucket_groups[b] += 1;
+					bucket_entities[b] += g->count;
+					bucket_ticks[b] += g->ticks;
+					break;
+				}
+			}
+		}
+		gb_printf_err("  group sizes:\n");
+		gb_printf_err("    %10s %9s %10s %12s\n", "size", "groups", "entities", "self time");
+		for (i32 b = 0; b < BUCKET_COUNT; b++) {
+			if (bucket_groups[b] == 0) {
+				continue;
+			}
+			gb_printf_err("    %10s %9td %10td %9.3f ms\n", bucket_name[b], bucket_groups[b], bucket_entities[b], global_graph_ms(bucket_ticks[b], freq));
+		}
+	}
+
+	auto items = array_make<GlobalGraphSortItem>(heap_allocator(), 0, gb_max(comp_count, pkg_count));
+	defer (array_free(&items));
+
+	isize const TOP = 10;
+	isize const MAX_NAMES = 4;
+
+	array_clear(&items);
+	for (i32 ci = 0; ci < comp_count; ci++) {
+		array_add(&items, GlobalGraphSortItem{comps[ci].ticks, ci});
+	}
+	array_sort(items, global_graph_sort_item_desc);
+	gb_printf_err("  slowest groups:\n");
+	for (isize i = 0; i < items.count && i < TOP; i++) {
+		GlobalGraphComp *g = &comps[items[i].id];
+		global_graph_print_comp(nodes, order, g, g->ticks, freq, MAX_NAMES);
+	}
+
+	array_clear(&items);
+	for (i32 ci = 0; ci < comp_count; ci++) {
+		if (comps[ci].count > 1) {
+			array_add(&items, GlobalGraphSortItem{cast(u64)comps[ci].count, ci});
+		}
+	}
+	array_sort(items, global_graph_sort_item_desc);
+	gb_printf_err("  largest groups:\n");
+	for (isize i = 0; i < items.count && i < TOP; i++) {
+		GlobalGraphComp *g = &comps[items[i].id];
+		global_graph_print_comp(nodes, order, g, g->ticks, freq, MAX_NAMES);
+	}
+
+	gb_printf_err("  critical path, last group first:\n");
+	{
+		isize printed = 0;
+		for (i32 ci = critical; ci >= 0; ci = comps[ci].path_prev) {
+			if (printed == 30) {
+				gb_printf_err("    ... %d more groups\n", comps[ci].path_len);
+				break;
+			}
+			global_graph_print_comp(nodes, order, &comps[ci], comps[ci].ticks, freq, 2);
+			printed += 1;
+		}
+	}
+
+	array_clear(&items);
+	for (i32 p = 0; p < pkg_count; p++) {
+		array_add(&items, GlobalGraphSortItem{pkg_ticks[p], p});
+	}
+	array_sort(items, global_graph_sort_item_desc);
+	gb_printf_err("  slowest packages:\n");
+	for (isize i = 0; i < items.count && i < TOP; i++) {
+		i32 p = items[i].id;
+		AstPackage *pkg = pkgs[p];
+		String name = pkg ? pkg->name : str_lit("?");
+		gb_printf_err("    %10.3f ms %7d entities  %.*s\n", global_graph_ms(pkg_ticks[p], freq), pkg_entities[p], LIT(name));
+	}
+}

From 38fa57e9072b91a94adff585cf304675ab33f1e9 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 15:01:14 +0100
Subject: [PATCH 117/215] Make global checking and codegen order-independent

---
 src/build_settings.cpp       |   1 +
 src/check_decl.cpp           |   3 +
 src/check_expr.cpp           |  76 +++++++++-
 src/checker.cpp              | 263 +++++++++++++++--------------------
 src/checker.hpp              |   2 +
 src/llvm_backend.cpp         |   7 +-
 src/llvm_backend_const.cpp   |  28 ++--
 src/llvm_backend_general.cpp |  22 ++-
 src/llvm_backend_proc.cpp    |  13 +-
 src/llvm_backend_stmt.cpp    |  30 +++-
 src/main.cpp                 |   8 +-
 11 files changed, 275 insertions(+), 178 deletions(-)

diff --git a/src/build_settings.cpp b/src/build_settings.cpp
index f6ebd5755..041622a30 100644
--- a/src/build_settings.cpp
+++ b/src/build_settings.cpp
@@ -599,6 +599,7 @@ struct BuildContext {
 	bool internal_ignore_llvm_verification;
 	bool internal_llvm_no_sroa;
 	bool internal_global_entity_graph;
+	u64  internal_shuffle_global_entities; // seed, 0 = no shuffle
 
 	bool   enable_rvo;
 
diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index 48865d890..472daaf6f 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -996,6 +996,9 @@ gb_internal Entity *init_entity_foreign_library(CheckerContext *ctx, Entity *e)
 	} else {
 		String name = ident->Ident.token.string;
 		Entity *found = scope_lookup(ctx->scope, ident->Ident.interned, ident->Ident.hash);
+		if (found != nullptr) {
+			found = resolve_alias_entity(ctx, found, nullptr);
+		}
 
 		if (found == nullptr) {
 			if (is_blank_ident(name)) {
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 98c3e7051..2985c8c67 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -1592,6 +1592,45 @@ gb_internal CIdentSuggestion const c_ident_suggestions[] = {
 	{str_lit("float64_t"), str_lit("'f64'?")},
 };
 
+gb_internal Entity *resolve_alias_entity(CheckerContext *c, Entity *e, Type *named_type) {
+	if (e->kind == Entity_Constant && e->state == EntityState_Unresolved) {
+		check_entity_decl(c, e, nullptr, named_type);
+	}
+	while ((e->flags & EntityFlag_Overridden) && e->aliased_of != nullptr) {
+		e = e->aliased_of;
+	}
+	return e;
+}
+
+gb_thread_local Array<Entity *> in_progress_alias_expansions;
+
+gb_internal Type *check_in_progress_type_alias(CheckerContext *c, Entity *e) {
+	for (Entity *other : in_progress_alias_expansions) {
+		if (other == e) {
+			// NOTE(bill): an alias-only cycle, which it is to be left to the usual error
+			return nullptr;
+		}
+	}
+	DeclInfo *d = decl_info_of_entity(e);
+	if (d == nullptr || d->init_expr == nullptr) {
+		return nullptr;
+	}
+
+	CheckerContext nc = *c;
+	nc.scope = d->scope;
+	nc.decl  = d;
+	nc.type_level = 0;
+	nc.curr_proc_calling_convention = ProcCC_Contextless;
+
+	if (in_progress_alias_expansions.allocator.proc == nullptr) {
+		in_progress_alias_expansions = array_make<Entity *>(heap_allocator());
+	}
+	array_add(&in_progress_alias_expansions, e);
+	Type *t = check_type(&nc, remove_type_alias_clutter(d->init_expr));
+	array_pop(&in_progress_alias_expansions);
+	return t;
+}
+
 gb_internal Entity *check_ident(CheckerContext *c, Operand *o, Ast *n, Type *named_type, Type *type_hint, bool allow_import_name) {
 	GB_ASSERT(n->kind == Ast_Ident);
 	o->mode = Addressing_Invalid;
@@ -1637,6 +1676,8 @@ gb_internal Entity *check_ident(CheckerContext *c, Operand *o, Ast *n, Type *nam
 		}
 	}
 
+	e = resolve_alias_entity(c, e, named_type);
+
 	if (e->kind == Entity_ProcGroup) {
 		auto *pge = &e->ProcGroup;
 
@@ -1760,6 +1801,9 @@ gb_internal Entity *check_ident(CheckerContext *c, Operand *o, Ast *n, Type *nam
 		}
 		if (o->type != nullptr && o->type->kind == Type_Named && o->type->Named.type_name->TypeName.is_type_alias) {
 			Type *bt = base_type(o->type);
+			if (bt == nullptr && e->state == EntityState_InProgress) {
+				bt = check_in_progress_type_alias(c, e);
+			}
 			// Keep struct aliases named so recursive fields retain their alias edge.
 			if (bt != nullptr && bt->kind != Type_Struct) {
 				o->type = bt;
@@ -5754,6 +5798,7 @@ gb_internal Entity *check_entity_from_ident_or_selector(CheckerContext *c, Ast *
 					return nullptr;
 				}
 
+				entity = resolve_alias_entity(c, entity, nullptr);
 				check_entity_decl(c, entity, nullptr, nullptr);
 				if (entity->kind == Entity_ProcGroup) {
 					return entity;
@@ -5884,6 +5929,7 @@ gb_internal Entity *check_selector(CheckerContext *c, Operand *operand, Ast *nod
 				// return nullptr;
 			}
 
+			entity = resolve_alias_entity(c, entity, nullptr);
 			check_entity_decl(c, entity, nullptr, nullptr);
 			if (entity->kind == Entity_ProcGroup) {
 				operand->mode = Addressing_ProcGroup;
@@ -8486,11 +8532,14 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 
 		// NOTE(bill, 2019-10-26): Allow a cycle in the parameters but not in the fields themselves
 		auto prev_type_path = c->type_path;
+		bool prev_allow_in_progress = c->allow_in_progress_type_operand;
 
 		c->type_path = new_checker_type_path();
+		c->allow_in_progress_type_operand = true;
 		defer ({
 			destroy_checker_type_path(c->type_path);
 			c->type_path = prev_type_path;
+			c->allow_in_progress_type_operand = prev_allow_in_progress;
 		});
 
 		TEMPORARY_ALLOCATOR_GUARD();
@@ -9014,6 +9063,11 @@ gb_internal void check_objc_call_expr(CheckerContext *c, Operand *operand, Ast *
 }
 
 gb_internal ExprKind check_call_expr(CheckerContext *c, Operand *operand, Ast *call, Ast *proc, Slice<Ast *> const &args, ProcInlining inlining, ProcTailing tailing, Type *type_hint) {
+	// NOTE(bill): only the direct arguments of a polymorphic record call may name a type still being checked
+	bool prev_allow_in_progress = c->allow_in_progress_type_operand;
+	c->allow_in_progress_type_operand = false;
+	defer (c->allow_in_progress_type_operand = prev_allow_in_progress);
+
 	if (proc != nullptr &&
 	    proc->kind == Ast_BasicDirective) {
 		ast_node(bd, BasicDirective, proc);
@@ -13100,9 +13154,21 @@ gb_internal ExprKind check_expr_base_internal(CheckerContext *c, Operand *o, Ast
 
 
 
+gb_internal bool is_in_progress_type_operand(CheckerContext *c, Operand *o, Ast *node) {
+	if (!c->allow_in_progress_type_operand || o->mode != Addressing_Type || o->type->kind != Type_Named) {
+		return false;
+	}
+	node = unparen_expr(node);
+	if (node == nullptr || (node->kind != Ast_Ident && node->kind != Ast_SelectorExpr)) {
+		return false;
+	}
+	Entity *e = o->type->Named.type_name;
+	return e != nullptr && e->state == EntityState_InProgress;
+}
+
 gb_internal ExprKind check_expr_base(CheckerContext *c, Operand *o, Ast *node, Type *type_hint) {
 	ExprKind kind = check_expr_base_internal(c, o, node, type_hint);
-	if (o->type != nullptr && core_type(o->type) == nullptr) {
+	if (o->type != nullptr && core_type(o->type) == nullptr && !is_in_progress_type_operand(c, o, node)) {
 		o->type = t_invalid;
 		gbString xs = expr_to_string(o->expr);
 		if (o->mode == Addressing_Type) {
@@ -13490,9 +13556,13 @@ gb_internal gbString write_expr_to_string(gbString str, Ast *node, bool shorthan
 		// NOTE(tf2spi):
 		// Two proc literals with the same signature output the same expr above
 		// which poses challenges for name canonicalization. Include the below
-		// discriminator with the file ID and offset to help with this.
+		// discriminator with the file and offset to help with this.
+		// NOTE: the file by package and name, not its ID, as IDs follow the order files were parsed in
 		TokenPos pos = ast_token(node).pos;
-		str = gb_string_append_fmt(str, " /* %d!%d */", pos.file_id, pos.offset);
+		AstFile *pl_file = node->file();
+		String pl_pkg  = (pl_file && pl_file->pkg) ? pl_file->pkg->name : String{};
+		String pl_name = pl_file ? filename_without_directory(pl_file->fullpath) : String{};
+		str = gb_string_append_fmt(str, " /* %.*s:%.*s!%d */", LIT(pl_pkg), LIT(pl_name), pos.offset);
 	case_end;
 
 	case_ast_node(cl, CompoundLit, node);
diff --git a/src/checker.cpp b/src/checker.cpp
index 3cb10f95b..36d294352 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -82,18 +82,45 @@ gb_internal void entity_graph_node_destroy(EntityGraphNode *n, gbAllocator a) {
 }
 
 
+gb_internal int entity_source_order_cmp(Entity *x, Entity *y) {
+	if (x == y) {
+		return 0;
+	}
+	int cmp = 0;
+	if (x->pkg != y->pkg) {
+		isize order_x = x->pkg ? x->pkg->order : 0;
+		isize order_y = y->pkg ? y->pkg->order : 0;
+		cmp = isize_cmp(order_x, order_y);
+		if (cmp) {
+			return cmp;
+		}
+	}
+	if (x->file != y->file) {
+		String fullpath_x = x->file ? x->file->fullpath : (String{});
+		String fullpath_y = y->file ? y->file->fullpath : (String{});
+		String file_x = filename_from_path(fullpath_x);
+		String file_y = filename_from_path(fullpath_y);
+
+		cmp = string_compare(file_x, file_y);
+		if (cmp) {
+			return cmp;
+		}
+	}
+
+	cmp = u64_cmp(x->order_in_src, y->order_in_src);
+	if (cmp) {
+		return cmp;
+	}
+	return i32_cmp(x->token.pos.offset, y->token.pos.offset);
+}
+
 gb_internal int entity_graph_node_cmp(EntityGraphNode **data, isize i, isize j) {
 	EntityGraphNode *x = data[i];
 	EntityGraphNode *y = data[j];
-	u64 a = x->entity->order_in_src;
-	u64 b = y->entity->order_in_src;
-	if (x->dep_count < y->dep_count) {
-		return -1;
+	if (x->dep_count != y->dep_count) {
+		return x->dep_count < y->dep_count ? -1 : +1;
 	}
-	if (x->dep_count == y->dep_count) {
-		return a < b ? -1 : b > a;
-	}
-	return +1;
+	return entity_source_order_cmp(x->entity, y->entity);
 }
 
 gb_internal void entity_graph_node_swap(EntityGraphNode **data, isize i, isize j) {
@@ -147,10 +174,10 @@ gb_internal int import_graph_node_cmp(ImportGraphNode **data, isize i, isize j)
 	bool xg = (x->scope->flags&ScopeFlag_Global) != 0;
 	bool yg = (y->scope->flags&ScopeFlag_Global) != 0;
 	if (xg != yg) return xg ? -1 : +1;
-	if (xg && yg) return x->pkg->id < y->pkg->id ? +1 : -1;
 	if (x->dep_count < y->dep_count) return -1;
 	if (x->dep_count > y->dep_count) return +1;
-	return 0;
+	// NOTE: a total order, so the package order does not depend on parsing or hashing order
+	return string_compare(x->pkg->fullpath, y->pkg->fullpath);
 }
 
 gb_internal void import_graph_node_swap(ImportGraphNode **data, isize i, isize j) {
@@ -360,8 +387,9 @@ gb_internal void check_open_scope(CheckerContext *c, Ast *node) {
 		break;
 	}
 	if (c->decl && c->decl->proc_lit) {
-		// Number the scopes within a procedure body depth-first
-		scope->index = c->decl->scope_index++;
+		// NOTE: numbered by position rather than in checking order, as that order varies (e.g. with
+		// which caller instantiates a record first); 0 is the procedure's own scope
+		scope->index = node->kind == Ast_ProcType ? 0 : 1 + ast_token(node).pos.offset;
 	}
 	c->scope = scope;
 	c->state_flags |= StateFlag_bounds_check;
@@ -3246,43 +3274,44 @@ gb_internal gb_inline bool is_entity_a_dependency(Entity *e) {
 }
 
 gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInfo *info, Arena *arena) {
-	PtrMap<Entity *, EntityGraphNode *> M_procs = {};
-	PtrMap<Entity *, EntityGraphNode *> M_vars  = {};
-	PtrMap<Entity *, EntityGraphNode *> M_other = {};
-
-	map_init(&M_procs, info->entities.count);
-	defer (map_destroy(&M_procs));
-
+	PtrMap<Entity *, EntityGraphNode *> M_vars = {};
 	map_init(&M_vars, info->entities.count);
 	defer (map_destroy(&M_vars));
 
-	map_init(&M_other, info->entities.count);
-	defer (map_destroy(&M_other));
-
-	for_array(i, info->entities) {
-		Entity *e = info->entities[i];
-		if (e == nullptr || !is_entity_a_dependency(e)) {
+	auto G = array_make<EntityGraphNode *>(arena_allocator(arena), 0, info->entities.count);
+	for (Entity *e : info->entities) {
+		if (e == nullptr || e->kind != Entity_Variable || !is_entity_a_dependency(e)) {
 			continue;
 		}
 		EntityGraphNode *n = arena_alloc_item<EntityGraphNode>(arena);
 		n->entity = e;
-		switch (e->kind) {
-		case Entity_Procedure: map_set(&M_procs, e, n); break;
-		case Entity_Variable:  map_set(&M_vars,  e, n); break;
-		default:               map_set(&M_other, e, n); break;
-		}
+		map_set(&M_vars, e, n);
+		array_add(&G, n);
 	}
 
-	TIME_SECTION("generate_entity_dependency_graph: Calculate edges for graph M - Part 1");
-	// Calculate edges for graph M
-	for (auto const &entry : M_procs) {
-		EntityGraphNode *n = entry.value;
-		Entity *e = n->entity;
+	TIME_SECTION("generate_entity_dependency_graph: Calculate edges");
 
-		DeclInfo *decl = decl_info_of_entity(e);
-		GB_ASSERT(decl != nullptr);
+	// NOTE(bill): A variable depends on every variable reachable from its declaration through procedures and constants,
+	// as its initializer may read any of them. Variables are not walked through, as they are ordered by their own edges.
+	PtrSet<Entity *> visited = {};
+	defer (ptr_set_destroy(&visited));
+	auto stack = array_make<Entity *>(heap_allocator(), 0, 64);
+	defer (array_free(&stack));
 
+	for (EntityGraphNode *n : G) {
+		ptr_set_clear(&visited);
+		array_clear(&stack);
+
+		DeclInfo *decl = decl_info_of_entity(n->entity);
+		if (decl == nullptr) {
+			continue;
+		}
 		FOR_PTR_SET(dep, decl->deps) {
+			array_add(&stack, dep);
+		}
+
+		while (stack.count > 0) {
+			Entity *dep = array_pop(&stack);
 			GB_ASSERT(dep != nullptr);
 			if (dep->flags & EntityFlag_Field) {
 				continue;
@@ -3290,67 +3319,26 @@ gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInf
 			if (!is_entity_a_dependency(dep)) {
 				continue;
 			}
-			EntityGraphNode *m = nullptr;
-
-			switch (dep->kind) {
-			case Entity_Procedure: m = map_must_get(&M_procs, dep); break;
-			case Entity_Variable:  m = map_must_get(&M_vars,  dep); break;
-			default:               m = map_must_get(&M_other, dep); break;
-			}
-			entity_graph_node_set_add(&n->succ, m);
-			entity_graph_node_set_add(&m->pred, n);
-		}
-	}
-
-	TIME_SECTION("generate_entity_dependency_graph: Calculate edges for graph M - Part 2a (init)");
-
-	auto G = array_make<EntityGraphNode *>(arena_allocator(arena), 0, M_procs.count + M_vars.count + M_other.count);
-
-	TIME_SECTION("generate_entity_dependency_graph: Calculate edges for graph M - Part 2b (procs)");
-
-	for (auto const &m_entry : M_procs) {
-		EntityGraphNode *n = m_entry.value;
-
-		// Connect each pred 'p' of 'n' with each succ 's' and from
-		// the procedure node
-		FOR_PTR_SET(p, n->pred) {
-			// Ignore self-cycles
-			if (p == n) {
+			if (dep->kind == Entity_Variable) {
+				EntityGraphNode **m = map_get(&M_vars, dep);
+				if (m != nullptr) {
+					entity_graph_node_set_add(&n->succ, *m);
+					entity_graph_node_set_add(&(*m)->pred, n);
+				}
 				continue;
 			}
-			// Each succ 's' of 'n' becomes a succ of 'p', and
-			// each pred 'p' of 'n' becomes a pred of 's'
-			FOR_PTR_SET(s, n->succ) {
-				// Ignore self-cycles
-				if (s == n) {
-					continue;
-				}
-				if (p->entity->kind == Entity_Procedure &&
-				    s->entity->kind == Entity_Procedure) {
-				    	// NOTE(bill, 2020-11-15): Only care about variable initialization ordering
-				    	// TODO(bill): This is probably wrong!!!!
-					continue;
-				}
-				// IMPORTANT NOTE/TODO(bill, 2020-11-15): These three calls take the majority of the
-				// the time to process
-				entity_graph_node_set_add(&p->succ, s);
-				entity_graph_node_set_add(&s->pred, p);
-				// Remove edge to 'n'
-				entity_graph_node_set_remove(&s->pred, n);
+			if (ptr_set_update(&visited, dep)) {
+				continue;
+			}
+			DeclInfo *dep_decl = decl_info_of_entity(dep);
+			if (dep_decl != nullptr) {
+				FOR_PTR_SET(next, dep_decl->deps) {
+					array_add(&stack, next);
+				}
 			}
-
-			// Remove edge to 'n'
-			entity_graph_node_set_remove(&p->succ, n);
 		}
 	}
 
-	TIME_SECTION("generate_entity_dependency_graph: Calculate edges for graph M - Part 2c (vars)");
-
-	for (auto const &m_entry : M_vars) {
-		EntityGraphNode *n = m_entry.value;
-		array_add(&G, n);
-	}
-
 	TIME_SECTION("generate_entity_dependency_graph: Dependency Count Checker");
 	for_array(i, G) {
 		EntityGraphNode *n = G[i];
@@ -3359,28 +3347,6 @@ gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInf
 		GB_ASSERT(n->dep_count >= 0);
 	}
 
-	// f64 succ_count = 0.0;
-	// f64 pred_count = 0.0;
-	// f64 succ_capacity = 0.0;
-	// f64 pred_capacity = 0.0;
-	// f64 succ_max = 0.0;
-	// f64 pred_max = 0.0;
-	// for_array(i, G) {
-	// 	EntityGraphNode *n = G[i];
-	// 	succ_count += n->succ.entries.count;
-	// 	pred_count += n->pred.entries.count;
-	// 	succ_capacity += n->succ.entries.capacity;
-	// 	pred_capacity += n->pred.entries.capacity;
-
-	// 	succ_max = gb_max(succ_max, n->succ.entries.capacity);
-	// 	pred_max = gb_max(pred_max, n->pred.entries.capacity);
-
-	// }
-	// f64 count = cast(f64)G.count;
-	// gb_printf_err(">>>count    pred: %f succ: %f\n", pred_count/count, succ_count/count);
-	// gb_printf_err(">>>capacity pred: %f succ: %f\n", pred_capacity/count, succ_capacity/count);
-	// gb_printf_err(">>>max      pred: %f succ: %f\n", pred_max, succ_max);
-
 	return G;
 }
 
@@ -5342,14 +5308,15 @@ gb_internal CheckerContext *create_checker_context(Checker *c) {
 
 gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d) {
 	GB_ASSERT(e != nullptr);
+	if (e->state == EntityState_Resolved)  {
+		// NOTE: also an alias already overridden by what it aliases, which may have no `DeclInfo`
+		return;
+	}
 	GB_ASSERT(d != nullptr);
 
 	if (d->scope != e->scope) {
 		return;
 	}
-	if (e->state == EntityState_Resolved)  {
-		return;
-	}
 
 	CheckerContext *ctx = create_checker_context(c);
 
@@ -5373,13 +5340,32 @@ gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d)
 	check_entity_decl(ctx, e, d, nullptr);
 }
 
+// for `-internal-shuffle-global-entities`
+// visit globals in a seeded random order, so that any result depending on the visiting order shows up without needing threads
+gb_internal void shuffle_global_entities(Array<Entity *> *entities, u64 seed) {
+	if (seed == 0) {
+		return;
+	}
+	u64 state = seed;
+	for (isize i = entities->count-1; i > 0; i--) {
+		state = state*6364136223846793005ull + 1442695040888963407ull;
+		isize j = cast(isize)((state >> 33) % cast(u64)(i+1));
+		Entity *tmp = (*entities)[i];
+		(*entities)[i] = (*entities)[j];
+		(*entities)[j] = tmp;
+	}
+}
+
 gb_internal void check_all_global_entities(Checker *c) {
 	in_single_threaded_checker_stage.store(true, std::memory_order_relaxed);
 
+	auto order = array_clone(heap_allocator(), c->info.entities);
+	defer (array_free(&order));
+	shuffle_global_entities(&order, build_context.internal_shuffle_global_entities);
+
 	// NOTE(bill): This must be single threaded
 	// Don't bother trying
-	for_array(i, c->info.entities) {
-		Entity *e = c->info.entities[i];
+	for (Entity *e : order) {
 		GB_ASSERT(e != nullptr);
 		if (e->flags & EntityFlag_Lazy) {
 			continue;
@@ -7537,40 +7523,7 @@ gb_internal void check_merge_queues_into_arrays(Checker *c) {
 }
 
 gb_internal GB_COMPARE_PROC(init_procedures_cmp) {
-	int cmp = 0;
-	Entity *x = *(Entity **)a;
-	Entity *y = *(Entity **)b;
-	if (x == y) {
-		cmp = 0;
-		return cmp;
-	}
-
-	if (x->pkg != y->pkg) {
-		isize order_x = x->pkg ? x->pkg->order : 0;
-		isize order_y = y->pkg ? y->pkg->order : 0;
-		cmp = isize_cmp(order_x, order_y);
-		if (cmp) {
-			return cmp;
-		}
-	}
-	if (x->file != y->file) {
-		String fullpath_x = x->file ? x->file->fullpath : (String{});
-		String fullpath_y = y->file ? y->file->fullpath : (String{});
-		String file_x = filename_from_path(fullpath_x);
-		String file_y = filename_from_path(fullpath_y);
-
-		cmp = string_compare(file_x, file_y);
-		if (cmp) {
-			return cmp;
-		}
-	}
-
-
-	cmp = u64_cmp(x->order_in_src, y->order_in_src);
-	if (cmp) {
-		return cmp;
-	}
-	return i32_cmp(x->token.pos.offset, y->token.pos.offset);
+	return entity_source_order_cmp(*(Entity **)a, *(Entity **)b);
 }
 
 gb_internal GB_COMPARE_PROC(fini_procedures_cmp) {
@@ -7777,6 +7730,10 @@ gb_internal void check_parsed_files(Checker *c) {
 	TIME_SECTION("add entities from packages");
 	check_merge_queues_into_arrays(c);
 
+	TIME_SECTION("sort global entities");
+	// NOTE: the queues are filled by parallel workers, so their order differs between runs
+	array_sort(c->info.entities, init_procedures_cmp);
+
 	TIME_SECTION("check all global entities");
 	check_all_global_entities(c);
 
diff --git a/src/checker.hpp b/src/checker.hpp
index c382d28fe..e51b48da3 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -846,6 +846,7 @@ struct CheckerContext {
 	bool       in_polymorphic_specialization;
 	bool       allow_arrow_right_selector_expr;
 	bool       allow_c_vararg_param;
+	bool       allow_in_progress_type_operand; // a bare type name may still be being checked (polymorphic record arguments)
 	u8         bit_field_bit_size;
 	Scope *    polymorphic_scope;
 
@@ -917,6 +918,7 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *c, Ast *decl);
 
 gb_internal void check_entity_decl(CheckerContext *c, Entity *e, DeclInfo *d, Type *named_type);
 gb_internal void wait_for_lazy_entity(CheckerContext *c, Entity *e);
+gb_internal Ast *remove_type_alias_clutter(Ast *node);
 gb_internal void check_const_decl(CheckerContext *c, Entity *e, Ast *type_expr, Ast *init_expr, Type *named_type);
 gb_internal void check_type_decl(CheckerContext *c, Entity *e, Ast *type_expr, Type *def);
 
diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 6ff3d182a..a0d87630c 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2254,10 +2254,13 @@ gb_internal GB_COMPARE_PROC(llvm_global_entity_cmp) {
 
 	i32 cmp = 0;
 	cmp = token_pos_cmp(x->token.pos, y->token.pos);
-	if (!cmp) {
+	if (cmp) {
 		return cmp;
 	}
-	return cmp;
+	// NOTE(bill): polymorphic instances share their declaration's token,
+	// so order them by their type, otherwise their order (and every name numbered after them)
+	// follows the checking order
+	return lb_entity_type_cmp(x, y);
 }
 
 gb_internal void lb_create_global_procedures_and_types(lbGenerator *gen, CheckerInfo *info, bool do_threading) {
diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index 49d59d62f..7a53e3fb1 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -427,25 +427,35 @@ gb_internal String lb_source_code_location_gen_name(lbProcedure *p, Ast *node) {
 
 
 
-gb_internal lbValue lb_emit_source_code_location_as_global_ptr(lbProcedure *p, String const &procedure, TokenPos const &pos) {
-	lbValue loc = lb_emit_source_code_location_const(p, procedure, pos);
-	lbAddr addr = lb_add_global_generated_with_name(p->module, loc.type, loc, lb_source_code_location_gen_name(procedure, pos));
+gb_internal lbValue lb_source_code_location_global_ptr(lbModule *m, lbValue loc, String const &name) {
+	// NOTE(bill): every polymorphic instance of a procedure produces the same location under the same name.
+	// Reuse it rather than letting LLVM rename the duplicate, as which instance got the new name depended
+	// on the order the instances were generated in.
+	LLVMValueRef found = LLVMGetNamedGlobal(m->mod, alloc_cstring(temporary_allocator(), name));
+	if (found != nullptr && LLVMGetInitializer(found) == loc.value) {
+		lbValue g = {};
+		g.type = alloc_type_pointer(default_type(loc.type));
+		g.value = LLVMConstPointerCast(found, lb_type(m, g.type));
+		return g;
+	}
+	lbAddr addr = lb_add_global_generated_with_name(m, loc.type, loc, name);
 	lb_make_global_private_const(addr);
 	return addr.addr;
 }
 
+gb_internal lbValue lb_emit_source_code_location_as_global_ptr(lbProcedure *p, String const &procedure, TokenPos const &pos) {
+	lbValue loc = lb_emit_source_code_location_const(p, procedure, pos);
+	return lb_source_code_location_global_ptr(p->module, loc, lb_source_code_location_gen_name(procedure, pos));
+}
+
 gb_internal lbValue lb_const_source_code_location_as_global_ptr(lbModule *m, String const &procedure, TokenPos const &pos) {
 	lbValue loc = lb_const_source_code_location_const(m, procedure, pos);
-	lbAddr addr = lb_add_global_generated_with_name(m, loc.type, loc, lb_source_code_location_gen_name(procedure, pos));
-	lb_make_global_private_const(addr);
-	return addr.addr;
+	return lb_source_code_location_global_ptr(m, loc, lb_source_code_location_gen_name(procedure, pos));
 }
 
 gb_internal lbValue lb_emit_source_code_location_as_global_ptr(lbProcedure *p, Ast *node) {
 	lbValue loc = lb_emit_source_code_location_const(p, node);
-	lbAddr addr = lb_add_global_generated_with_name(p->module, loc.type, loc, lb_source_code_location_gen_name(p, node));
-	lb_make_global_private_const(addr);
-	return addr.addr;
+	return lb_source_code_location_global_ptr(p->module, loc, lb_source_code_location_gen_name(p, node));
 }
 
 
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 9a45899d4..84e1c015d 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -3647,11 +3647,25 @@ gb_internal lbValue lb_generate_anonymous_proc_lit(lbModule *m, String const &pr
 	TokenPos pos = ast_token(expr).pos;
 
 	// NOTE(bill): Generate a new name
-	// parent$count
-	isize name_len = prefix_name.len + 6 + 11;
+	// parent$anon-pkg:file:offset
+	// NOTE(bill): named by position rather than a counter, as the order these are generated in varies
+	String prefix = prefix_name;
+	if (parent == nullptr) {
+		// NOTE(bill): a literal inside a polymorphic procedure exists once per instance at the same position, so name it after the enclosing procedure
+		for (DeclInfo *d = pl->decl->parent; d != nullptr; d = d->parent) {
+			Entity *pe = d->entity.load();
+			if (pe != nullptr && pe->kind == Entity_Procedure) {
+				prefix = lb_get_entity_name(m, pe);
+				break;
+			}
+		}
+	}
+	AstFile *lit_file = expr->file();
+	String lit_pkg  = (lit_file && lit_file->pkg) ? lit_file->pkg->name : str_lit("");
+	String lit_name = lit_file ? filename_without_directory(lit_file->fullpath) : str_lit("");
+	isize name_len = prefix.len + lit_pkg.len + lit_name.len + 6 + 2 + 11 + 1;
 	char *name_text = gb_alloc_array(permanent_allocator(), char, name_len);
-	static std::atomic<i32> name_id;
-	name_len = gb_snprintf(name_text, name_len, "%.*s$anon-%d", LIT(prefix_name), 1+name_id.fetch_add(1));
+	name_len = gb_snprintf(name_text, name_len, "%.*s$anon-%.*s:%.*s:%d", LIT(prefix), LIT(lit_pkg), LIT(lit_name), pos.offset);
 	String name = make_string((u8 *)name_text, name_len-1);
 
 	Type *type = type_of_expr(expr);
diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp
index 1d2cf6c7e..902a43e36 100644
--- a/src/llvm_backend_proc.cpp
+++ b/src/llvm_backend_proc.cpp
@@ -886,11 +886,18 @@ gb_internal void lb_build_nested_proc(lbProcedure *p, AstProcLit *pd, Entity *e)
 	}
 
 
-	isize name_len = p->name.len + 1 + pd_name.len + 1 + 10 + 1;
+	isize name_len = p->name.len + 1 + pd_name.len + 1 + 10 + 1 + 16 + 1;
 	char *name_text = gb_alloc_array(permanent_allocator(), char, name_len);
 
-	i32 guid = cast(i32)p->children.count;
-	name_len = gb_snprintf(name_text, name_len, "%.*s" ABI_PKG_NAME_SEPARATOR "%.*s-%d", LIT(p->name), LIT(pd_name), guid);
+	// NOTE(bill): named by declaration position (and type, for polymorphic instances, which share it)
+	// rather than by how many children were built before it, as that order varies
+	i32 guid = e->token.pos.offset;
+	if (e->decl_info != nullptr && e->decl_info->para_poly_original != nullptr) {
+		name_len = gb_snprintf(name_text, name_len, "%.*s" ABI_PKG_NAME_SEPARATOR "%.*s-%d-%llx", LIT(p->name), LIT(pd_name), guid,
+		                       cast(unsigned long long)type_hash_canonical_type(e->type));
+	} else {
+		name_len = gb_snprintf(name_text, name_len, "%.*s" ABI_PKG_NAME_SEPARATOR "%.*s-%d", LIT(p->name), LIT(pd_name), guid);
+	}
 	String name = make_string(cast(u8 *)name_text, name_len-1);
 
 	e->Procedure.link_name = name;
diff --git a/src/llvm_backend_stmt.cpp b/src/llvm_backend_stmt.cpp
index cab4615af..e8a86ce8b 100644
--- a/src/llvm_backend_stmt.cpp
+++ b/src/llvm_backend_stmt.cpp
@@ -1,6 +1,26 @@
 #define LB_ENABLE_BASIC_RVO    true
 #define LB_ENABLE_ADVANCED_RVO build_context.enable_rvo
 
+// NOTE(bill): Orders entities by their canonical type
+gb_internal i32 lb_entity_type_cmp(Entity *x, Entity *y) {
+	if (x->type == y->type || x->type == nullptr || y->type == nullptr) {
+		return 0;
+	}
+	u64 hx = type_hash_canonical_type(x->type);
+	u64 hy = type_hash_canonical_type(y->type);
+	if (hx != hy) {
+		return hx < hy ? -1 : +1;
+	}
+	// NOTE(bill): Polymorphic instances share their declaration's token, so this is what tells them apart deterministically
+	TEMPORARY_ALLOCATOR_GUARD();
+	return string_compare(type_to_canonical_string(temporary_allocator(), x->type),
+	                      type_to_canonical_string(temporary_allocator(), y->type));
+}
+
+gb_internal GB_COMPARE_PROC(lb_polymorphic_instance_cmp) {
+	return lb_entity_type_cmp(*cast(Entity **)a, *cast(Entity **)b);
+}
+
 gb_internal LLVMValueRef lb_coerce_fields_load(lbProcedure *p, lbValue x, lbArgType const *arg);
 
 // NOTE(bill): @RVO Check if a call expression returns by sret with a return type matching dst_type.
@@ -180,14 +200,18 @@ gb_internal void lb_build_constant_value_decl(lbProcedure *p, AstValueDecl *vd)
 			GenProcsData *gpd = e->Procedure.gen_procs;
 			if (gpd) {
 				rw_mutex_shared_lock(&gpd->mutex);
-				for (Entity *e : gpd->procs) {
+				// NOTE)bill):: build the instances by type, not in the order they were instantiated, which varies
+				TEMPORARY_ALLOCATOR_GUARD();
+				auto procs = array_clone(temporary_allocator(), gpd->procs);
+				rw_mutex_shared_unlock(&gpd->mutex);
+				array_sort(procs, lb_polymorphic_instance_cmp);
+				for (Entity *e : procs) {
 					if (e->min_dep_count.load(std::memory_order_relaxed) == 0) {
 						continue;
 					}
 					DeclInfo *d = decl_info_of_entity(e);
 					lb_build_nested_proc(p, &d->proc_lit->ProcLit, e);
 				}
-				rw_mutex_shared_unlock(&gpd->mutex);
 			} else {
 				lb_build_nested_proc(p, pl, e);
 			}
@@ -2447,7 +2471,7 @@ gb_internal void lb_build_static_variables(lbProcedure *p, AstValueDecl *vd) {
 		{
 			gbString str = gb_string_make_length(permanent_allocator(), p->name.text, p->name.len);
 			str = gb_string_appendc(str, "-");
-			str = gb_string_append_fmt(str, ".%.*s-%llu", LIT(name), cast(long long)e->id);
+			str = gb_string_append_fmt(str, ".%.*s-%d", LIT(name), e->token.pos.offset);
 			mangled_name.text = cast(u8 *)str;
 			mangled_name.len = gb_string_length(str);
 		}
diff --git a/src/main.cpp b/src/main.cpp
index ca56c40f8..6f0308cfb 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -533,6 +533,7 @@ enum BuildFlagKind {
 	BuildFlag_InternalLLVMNoSROA,
 	BuildFlag_InternalEnableRVO,
 	BuildFlag_InternalGlobalEntityGraph,
+	BuildFlag_InternalShuffleGlobalEntities,
 
 	BuildFlag_Sanitize,
 	BuildFlag_LTO,
@@ -795,6 +796,7 @@ gb_internal bool parse_build_flags(Array<String> args) {
 	add_flag(&build_flags, BuildFlag_InternalLLVMNoSROA,      str_lit("internal-llvm-no-sroa"), BuildFlagParam_None, Command_all);
 	add_flag(&build_flags, BuildFlag_InternalEnableRVO,       str_lit("internal-enable-rvo"), BuildFlagParam_None, Command_all);
 	add_flag(&build_flags, BuildFlag_InternalGlobalEntityGraph, str_lit("internal-global-entity-graph"), BuildFlagParam_None, Command__does_check);
+	add_flag(&build_flags, BuildFlag_InternalShuffleGlobalEntities, str_lit("internal-shuffle-global-entities"), BuildFlagParam_Integer, Command__does_check);
 
 
 	add_flag(&build_flags, BuildFlag_Sanitize,                str_lit("sanitize"),                  BuildFlagParam_String,  Command__does_build, true);
@@ -1846,6 +1848,10 @@ gb_internal bool parse_build_flags(Array<String> args) {
 						case BuildFlag_InternalGlobalEntityGraph:
 							build_context.internal_global_entity_graph = true;
 							break;
+						case BuildFlag_InternalShuffleGlobalEntities:
+							GB_ASSERT(value.kind == ExactValue_Integer);
+							build_context.internal_shuffle_global_entities = cast(u64)big_int_to_i64(&value.value_integer);
+							break;
 
 
 						case BuildFlag_Sanitize:
@@ -2542,7 +2548,7 @@ gb_internal void export_dependencies(Checker *c) {
 		}
 		array_add(&load_files, cache);
 	}
-	array_sort(files, file_cache_sort_cmp);
+	array_sort(load_files, file_cache_sort_cmp);
 
 	if (build_context.export_dependencies_format == DependenciesExportMake) {
 		String exe_name = path_to_string(heap_allocator(), build_context.build_paths[BuildPath_Output]);

From 8609eb3e4aec7ed4ea04bdcb8d370730469ee97f Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 15:17:16 +0100
Subject: [PATCH 118/215] Fix #7693 muted error follow-up lines; Fix distinct
 records against `$T/Record` constraints

---
 src/check_type.cpp |  5 +++++
 src/error.cpp      | 11 +++++++++++
 2 files changed, 16 insertions(+)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index 2a955b189..61f5a7b3a 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1865,6 +1865,11 @@ gb_internal SubstResult subst_unify_constraint(CheckerContext *c, Type *spec, Ty
 	if (is_type_untyped(tb)) {
 		r = subst_unify(c, spec, default_type(source), subst);
 	} else if (sb->kind == Type_Struct || sb->kind == Type_Union) {
+		if (tb == sb &&
+		    ((tb->kind == Type_Struct && tb->Struct.polymorphic_parent == nullptr) ||
+		     (tb->kind == Type_Union  && tb->Union.polymorphic_parent  == nullptr))) {
+			return Subst_Matched;
+		}
 		r = subst_unify(c, spec, source, subst); // record conformance keeps the Named types (match params)
 	} else {
 		r = subst_unify(c, sb, tb, subst);        // general: base-typed structural match
diff --git a/src/error.cpp b/src/error.cpp
index 77fef3cea..5879fbeec 100644
--- a/src/error.cpp
+++ b/src/error.cpp
@@ -251,6 +251,10 @@ gb_internal void print_all_errors(void);
 typedef ERROR_OUT_PROC(ErrorOutProc);
 
 gb_internal ERROR_OUT_PROC(default_error_out_va) {
+	if (global_error_mute_depth > 0) {
+		// NOTE(bill): the error this would continue was muted, so there is no current error value
+		return;
+	}
 	char buf[4096] = {};
 	isize len = gb_snprintf_va(buf, gb_size_of(buf), fmt, va);
 	isize n = len-1;
@@ -765,10 +769,17 @@ gb_internal void warning_va(TokenPos const &pos, TokenPos end, char const *fmt,
 
 
 gb_internal void error_line_va(char const *fmt, va_list va) {
+	if (global_error_mute_depth > 0) {
+		return;
+	}
 	error_out_va(fmt, va);
 }
 
 gb_internal void error_no_newline_va(TokenPos const &pos, char const *fmt, va_list va) {
+	if (global_error_mute_depth > 0) {
+		global_error_mute_count += 1;
+		return;
+	}
 	global_error_collector.count.fetch_add(1);
 	mutex_lock(&global_error_collector.mutex);
 	if (global_error_collector.count.load() > MAX_ERROR_COLLECTOR_COUNT()) {

From 5f6e95a6203c48687ddb6d00d53227b35dd5f2ee Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 15:26:45 +0100
Subject: [PATCH 119/215] Don't treat a global naming itself as an
 initialization cycle (fixes test_issue_6621)

---
 src/checker.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/checker.cpp b/src/checker.cpp
index 36d294352..e87c2ad59 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -3321,7 +3321,8 @@ gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInf
 			}
 			if (dep->kind == Entity_Variable) {
 				EntityGraphNode **m = map_get(&M_vars, dep);
-				if (m != nullptr) {
+				// NOTE(bill): a variable naming itself, e.g. `t: struct { next: ^type_of(t) }`, is not an initialization cycle
+				if (m != nullptr && *m != n) {
 					entity_graph_node_set_add(&n->succ, *m);
 					entity_graph_node_set_add(&(*m)->pred, n);
 				}

From 2b90b616e19068c23bb92ca7cf1ccfbd600a70be Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 16:24:01 +0100
Subject: [PATCH 120/215] Add `-vet-when-shadowing`; Resolve global `when`s and
 `foreign` blocks on demand via name placeholders

---
 src/build_settings.cpp       |   5 +-
 src/checker.cpp              | 289 +++------------------
 src/checker.hpp              |   2 +-
 src/checker_global_graph.cpp |  10 +-
 src/checker_global_when.cpp  | 474 +++++++++++++++++++++++++++++++++++
 src/main.cpp                 |   8 +
 src/parser.cpp               |   1 +
 src/parser.hpp               |   1 -
 8 files changed, 529 insertions(+), 261 deletions(-)
 create mode 100644 src/checker_global_when.cpp

diff --git a/src/build_settings.cpp b/src/build_settings.cpp
index 041622a30..7f4da5140 100644
--- a/src/build_settings.cpp
+++ b/src/build_settings.cpp
@@ -317,10 +317,11 @@ enum VetFlags : u64 {
 	VetFlag_Tabs            = 1u<<9,
 	VetFlag_UnusedProcedures = 1u<<10,
 	VetFlag_ExplicitAllocators = 1u<<11,
+	VetFlag_WhenShadowing   = 1u<<12,
 
 	VetFlag_Unused = VetFlag_UnusedVariables|VetFlag_UnusedImports,
 
-	VetFlag_All = VetFlag_Unused|VetFlag_Shadowing|VetFlag_UsingStmt|VetFlag_Deprecated|VetFlag_Cast,
+	VetFlag_All = VetFlag_Unused|VetFlag_Shadowing|VetFlag_UsingStmt|VetFlag_Deprecated|VetFlag_Cast|VetFlag_WhenShadowing,
 
 	VetFlag_Using = VetFlag_UsingStmt|VetFlag_UsingParam,
 };
@@ -352,6 +353,8 @@ u64 get_vet_flag_from_name(String const &name) {
 		return VetFlag_UnusedProcedures;
 	} else if (name == "explicit-allocators") {
 		return VetFlag_ExplicitAllocators;
+	} else if (name == "when-shadowing") {
+		return VetFlag_WhenShadowing;
 	}
 	return VetFlag_NONE;
 }
diff --git a/src/checker.cpp b/src/checker.cpp
index e87c2ad59..27ef4b147 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -400,6 +400,8 @@ gb_internal void check_close_scope(CheckerContext *c) {
 }
 
 
+gb_internal Entity *force_scope_placeholders(Scope *s, InternedString name, u32 hash);
+
 gb_internal Entity *scope_lookup_current(Scope *s, InternedString name, u32 hash) {
 	// Entity **found = string_map_get(&s->elements, name);
 	if (hash == 0) {
@@ -409,6 +411,9 @@ gb_internal Entity *scope_lookup_current(Scope *s, InternedString name, u32 hash
 	if (found) {
 		return found;
 	}
+	if (s->placeholders != nullptr) {
+		return force_scope_placeholders(s, name, hash);
+	}
 	return nullptr;
 }
 
@@ -428,6 +433,9 @@ gb_internal void scope_lookup_parent(Scope *scope, InternedString name, Scope **
 			if (!is_single_threaded) rw_mutex_shared_lock(&s->mutex);
 			found = scope_map_get(&s->elements, name, hash);
 			if (!is_single_threaded) rw_mutex_shared_unlock(&s->mutex);
+			if (found == nullptr && s->placeholders != nullptr) {
+				found = force_scope_placeholders(s, name, hash);
+			}
 			if (found) {
 				Entity *e = found;
 				if (gone_thru_proc) {
@@ -5127,9 +5135,7 @@ gb_internal void check_collect_value_decl(CheckerContext *c, Ast *decl) {
 	}
 }
 
-gb_internal bool collect_file_decls(CheckerContext *ctx, Slice<Ast *> const &decls);
-
-gb_internal bool check_add_foreign_block_decl(CheckerContext *ctx, Ast *decl) {
+gb_internal void check_add_foreign_block_decl(CheckerContext *ctx, Ast *decl) {
 	ast_node(fb, ForeignBlockDecl, decl);
 	Ast *foreign_library = fb->foreign_library;
 
@@ -5144,11 +5150,7 @@ gb_internal bool check_add_foreign_block_decl(CheckerContext *ctx, Ast *decl) {
 	check_decl_attributes(&c, fb->attributes, foreign_block_decl_attribute, nullptr);
 
 	ast_node(block, BlockStmt, fb->body);
-	if (c.collect_delayed_decls && (c.scope->flags&ScopeFlag_File) != 0) {
-		return collect_file_decls(&c, block->stmts);
-	}
 	check_collect_entities(&c, block->stmts);
-	return false;
 }
 
 gb_internal bool correct_single_type_alias(CheckerContext *c, Entity *e) {
@@ -5156,7 +5158,11 @@ gb_internal bool correct_single_type_alias(CheckerContext *c, Entity *e) {
 		DeclInfo *d = e->decl_info;
 		if (d != nullptr && d->init_expr != nullptr) {
 			Ast *init = d->init_expr;
+			// NOTE: in the scope of its own file, as a package's files may bind a name differently
+			Scope *prev_scope = c->scope;
+			c->scope = d->scope;
 			Entity *alias_of = check_entity_from_ident_or_selector(c, init, true);
+			c->scope = prev_scope;
 			if (alias_of != nullptr && alias_of->kind == Entity_TypeName) {
 				e->kind = Entity_TypeName;
 				return true;
@@ -5189,7 +5195,7 @@ gb_internal bool correct_type_alias_in_scope_forwards(CheckerContext *c, Scope *
 }
 
 
-gb_internal void correct_type_aliases_in_scope(CheckerContext *c, Scope *s) {
+gb_internal void correct_type_aliases_in_package(CheckerContext *c, AstPackage *pkg) {
 	// NOTE(bill, 2022-02-04): This is used to solve the problem caused by type aliases
 	// of type aliases being "confused" as constants
 	//
@@ -5200,8 +5206,12 @@ gb_internal void correct_type_aliases_in_scope(CheckerContext *c, Scope *s) {
 	// See @TypeAliasingProblem for more information
 	for (;;) {
 		bool corrections = false;
-		corrections |= correct_type_alias_in_scope_backwards(c, s);
-		corrections |= correct_type_alias_in_scope_forwards(c, s);
+		corrections |= correct_type_alias_in_scope_backwards(c, pkg->scope);
+		corrections |= correct_type_alias_in_scope_forwards(c, pkg->scope);
+		for (AstFile *f : pkg->files) {
+			corrections |= correct_type_alias_in_scope_backwards(c, f->scope);
+			corrections |= correct_type_alias_in_scope_forwards(c, f->scope);
+		}
 		if (!corrections) {
 			return;
 		}
@@ -5220,17 +5230,7 @@ gb_internal void check_collect_entities(CheckerContext *c, Slice<Ast *> const &n
 	for_array(decl_index, nodes) {
 		Ast *decl = nodes[decl_index];
 		if (!is_ast_decl(decl) && !is_ast_when_stmt(decl)) {
-			if (curr_file && decl->kind == Ast_ExprStmt) {
-				Ast *expr = decl->ExprStmt.expr;
-				if (expr->kind == Ast_CallExpr && expr->CallExpr.proc->kind == Ast_BasicDirective) {
-					if (c->collect_delayed_decls) {
-						if (decl->state_flags & StateFlag_BeenHandled) return;
-						decl->state_flags |= StateFlag_BeenHandled;
-						array_add(&curr_file->delayed_decls_queues[AstDelayQueue_Expr], expr);
-					}
-					continue;
-				}
-			}
+			// NOTE: global directives such as '#assert' are queued by `scan_global_decl_sources`
 			continue;
 		}
 
@@ -5266,9 +5266,7 @@ gb_internal void check_collect_entities(CheckerContext *c, Slice<Ast *> const &n
 		case_end;
 
 		case_ast_node(fb, ForeignBlockDecl, decl);
-			if (curr_file != nullptr) {
-				array_add(&curr_file->delayed_decls_queues[AstDelayQueue_ForeignBlock], decl);
-			}
+			// NOTE: global ones are resolved like global 'when's, see `resolve_global_decl_sources`
 		case_end;
 
 		default:
@@ -5785,7 +5783,6 @@ gb_internal void check_foreign_import_fullpaths(Checker *c) {
 		AstFile *f = decl->file();
 
 		reset_checker_context(&ctx, f, &untyped);
-		ctx.collect_delayed_decls = false;
 
 		GB_ASSERT(ctx.scope == e->scope);
 
@@ -5935,165 +5932,6 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *ctx, Ast *decl) {
 
 }
 
-// Returns true if a new package is present
-gb_internal bool collect_file_decls(CheckerContext *ctx, Slice<Ast *> const &decls);
-gb_internal bool collect_file_decls_from_when_stmt(CheckerContext *ctx, AstWhenStmt *ws);
-
-gb_internal bool collect_when_stmt_from_file(CheckerContext *ctx, AstWhenStmt *ws) {
-	Operand operand = {Addressing_Invalid};
-	if (!ws->is_cond_determined) {
-		check_expr(ctx, &operand, ws->cond);
-		if (operand.mode != Addressing_Invalid && !is_type_boolean(operand.type)) {
-			error(ws->cond, "Non-boolean condition in 'when' statement");
-		}
-		if (operand.mode != Addressing_Constant) {
-			error(ws->cond, "Non-constant condition in 'when' statement");
-		}
-
-		ws->is_cond_determined = true;
-		ws->determined_cond = operand.value.kind == ExactValue_Bool && operand.value.value_bool;
-	}
-
-	if (ws->body == nullptr || ws->body->kind != Ast_BlockStmt) {
-		error(ws->cond, "Invalid body for 'when' statement");
-	} else {
-		if (ws->determined_cond) {
-			check_collect_entities(ctx, ws->body->BlockStmt.stmts);
-			return true;
-		} else if (ws->else_stmt) {
-			switch (ws->else_stmt->kind) {
-			case Ast_BlockStmt:
-				check_collect_entities(ctx, ws->else_stmt->BlockStmt.stmts);
-				return true;
-			case Ast_WhenStmt:
-				collect_when_stmt_from_file(ctx, &ws->else_stmt->WhenStmt);
-				return true;
-			default:
-				error(ws->else_stmt, "Invalid 'else' statement in 'when' statement");
-				break;
-			}
-		}
-	}
-
-	return false;
-}
-
-gb_internal bool collect_file_decls_from_when_stmt(CheckerContext *ctx, AstWhenStmt *ws) {
-	Operand operand = {Addressing_Invalid};
-	if (!ws->is_cond_determined) {
-		check_expr(ctx, &operand, ws->cond);
-		if (operand.mode != Addressing_Invalid && !is_type_boolean(operand.type)) {
-			error(ws->cond, "Non-boolean condition in 'when' statement");
-		}
-		if (operand.mode != Addressing_Constant) {
-			error(ws->cond, "Non-constant condition in 'when' statement");
-		}
-
-		ws->is_cond_determined = true;
-		ws->determined_cond = operand.value.kind == ExactValue_Bool && operand.value.value_bool;
-	}
-
-	if (ws->body == nullptr || ws->body->kind != Ast_BlockStmt) {
-		error(ws->cond, "Invalid body for 'when' statement");
-	} else {
-		if (ws->determined_cond) {
-			return collect_file_decls(ctx, ws->body->BlockStmt.stmts);
-		} else if (ws->else_stmt) {
-			switch (ws->else_stmt->kind) {
-			case Ast_BlockStmt:
-				return collect_file_decls(ctx, ws->else_stmt->BlockStmt.stmts);
-			case Ast_WhenStmt:
-				return collect_file_decls_from_when_stmt(ctx, &ws->else_stmt->WhenStmt);
-			default:
-				error(ws->else_stmt, "Invalid 'else' statement in 'when' statement");
-				break;
-			}
-		}
-	}
-
-	return false;
-}
-
-
-gb_internal bool collect_file_decl(CheckerContext *ctx, Ast *decl) {
-	GB_ASSERT(ctx->scope->flags&ScopeFlag_File);
-
-	AstFile *curr_file = ctx->scope->file;
-	GB_ASSERT(curr_file != nullptr);
-
-	if (decl->state_flags & StateFlag_BeenHandled) {
-		return false;
-	}
-
-	switch (decl->kind) {
-	case_ast_node(vd, ValueDecl, decl);
-		check_collect_value_decl(ctx, decl);
-	case_end;
-
-	case_ast_node(id, ImportDecl, decl);
-		check_add_import_decl(ctx, decl);
-	case_end;
-
-	case_ast_node(fl, ForeignImportDecl, decl);
-		check_add_foreign_import_decl(ctx, decl);
-	case_end;
-
-	case_ast_node(fb, ForeignBlockDecl, decl);
-		GB_ASSERT(ctx->collect_delayed_decls);
-		decl->state_flags |= StateFlag_BeenHandled;
-		array_add(&curr_file->delayed_decls_queues[AstDelayQueue_ForeignBlock], decl);
-	case_end;
-
-	case_ast_node(ws, WhenStmt, decl);
-		if (!ws->is_cond_determined) {
-			if (collect_when_stmt_from_file(ctx, ws)) {
-				return true;
-			}
-
-			CheckerContext nctx = *ctx;
-			nctx.collect_delayed_decls = true;
-
-			if (collect_file_decls_from_when_stmt(&nctx, ws)) {
-				return true;
-			}
-		} else {
-			CheckerContext nctx = *ctx;
-			nctx.collect_delayed_decls = true;
-
-			if (collect_file_decls_from_when_stmt(&nctx, ws)) {
-				return true;
-			}
-		}
-	case_end;
-
-	case_ast_node(es, ExprStmt, decl);
-		GB_ASSERT(ctx->collect_delayed_decls);
-		decl->state_flags |= StateFlag_BeenHandled;
-		if (es->expr->kind == Ast_CallExpr) {
-			ast_node(ce, CallExpr, es->expr);
-			if (ce->proc->kind == Ast_BasicDirective) {
-				array_add(&curr_file->delayed_decls_queues[AstDelayQueue_Expr], es->expr);
-			}
-		}
-	case_end;
-	}
-
-	return false;
-}
-
-gb_internal bool collect_file_decls(CheckerContext *ctx, Slice<Ast *> const &decls) {
-	GB_ASSERT(ctx->scope->flags&ScopeFlag_File);
-
-	for_array(i, decls) {
-		if (collect_file_decl(ctx, decls[i])) {
-			correct_type_aliases_in_scope(ctx, ctx->scope);
-			return true;
-		}
-	}
-	correct_type_aliases_in_scope(ctx, ctx->scope);
-	return false;
-}
-
 gb_internal GB_COMPARE_PROC(sort_file_by_name) {
 	AstFile const *x = *cast(AstFile const **)a;
 	AstFile const *y = *cast(AstFile const **)b;
@@ -6140,7 +5978,6 @@ gb_internal WORKER_TASK_PROC(check_collect_entities_all_worker_proc) {
 	reset_checker_context(ctx, f, untyped);
 
 	check_collect_entities(ctx, f->decls);
-	GB_ASSERT(ctx->collect_delayed_decls == false);
 
 	add_untyped_expressions(&c->info, ctx->untyped);
 
@@ -6205,6 +6042,8 @@ gb_internal void check_export_entities(Checker *c) {
 	thread_pool_wait();
 }
 
+#include "checker_global_when.cpp"
+
 gb_internal void check_import_entities(Checker *c) {
 	TEMPORARY_ALLOCATOR_GUARD();
 
@@ -6261,101 +6100,45 @@ gb_internal void check_import_entities(Checker *c) {
 		array_add(&package_order, n);
 	}
 
-	TIME_SECTION("check_import_entities - collect file decls");
 	CheckerContext ctx = {};
 	init_checker_context(&ctx, c);
+	defer (destroy_checker_context(&ctx));
 
 	UntypedExprInfoMap untyped = {};
 	defer (map_destroy(&untyped));
 
-	isize min_pkg_index = 0;
+	TIME_SECTION("check_import_entities - imports");
+	// NOTE(bill): every import first, as resolving a 'when' may check declarations in any package
 	u64 stage_start = global_import_stage_begin();
 	for (isize pkg_index = 0; pkg_index < package_order.count; pkg_index++) {
-		ImportGraphNode *node = package_order[pkg_index];
-		AstPackage *pkg = node->pkg;
+		AstPackage *pkg = package_order[pkg_index]->pkg;
 		pkg->order = 1+pkg_index;
 
-		for_array(i, pkg->files) {
-			AstFile *f = pkg->files[i];
-
+		for (AstFile *f : pkg->files) {
 			reset_checker_context(&ctx, f, &untyped);
-			ctx.collect_delayed_decls = true;
-
-			// Check import declarations first to simplify things
 			for (Ast *decl : f->delayed_decls_queues[AstDelayQueue_Import]) {
 				check_add_import_decl(&ctx, decl);
 			}
 			array_clear(&f->delayed_decls_queues[AstDelayQueue_Import]);
-
-			if (collect_file_decls(&ctx, f->decls)) {
-				check_export_entities_in_pkg(&ctx, pkg, &untyped);
-				pkg_index = min_pkg_index-1;
-				break;
-			}
-
 			add_untyped_expressions(ctx.info, &untyped);
 		}
-		if (pkg_index < 0) {
-			continue;
-		}
-		min_pkg_index = pkg_index;
 	}
-	global_import_stage_end(GlobalImportStage_CollectFileDecls, stage_start);
+	global_import_stage_end(GlobalImportStage_Imports, stage_start);
+
+	TIME_SECTION("check_import_entities - resolve 'when' and 'foreign' blocks");
+	resolve_global_decl_sources(c, package_order);
 
 	TIME_SECTION("check_import_entities - check delayed entities");
-	for (isize pkg_index = 0; pkg_index < package_order.count; pkg_index++) {
-		ImportGraphNode *node = package_order[pkg_index];
+	for (ImportGraphNode *node : package_order) {
 		GB_ASSERT(node->scope->flags&ScopeFlag_Pkg);
 		AstPackage *pkg = node->scope->pkg;
 
 		stage_start = global_import_stage_begin();
-		for_array(i, pkg->files) {
-			AstFile *f = pkg->files[i];
-			reset_checker_context(&ctx, f, &untyped);
-
-			for (Ast *decl : f->delayed_decls_queues[AstDelayQueue_Import]) {
-				check_add_import_decl(&ctx, decl);
-			}
-			array_clear(&f->delayed_decls_queues[AstDelayQueue_Import]);
-			add_untyped_expressions(ctx.info, &untyped);
-		}
-		global_import_stage_end(GlobalImportStage_Imports, stage_start);
-
-		stage_start = global_import_stage_begin();
-		for_array(i, pkg->files) {
-			AstFile *f = pkg->files[i];
-			reset_checker_context(&ctx, f, &untyped);
-			correct_type_aliases_in_scope(&ctx, pkg->scope);
-		}
+		correct_type_aliases_in_package(&ctx, pkg);
 		global_import_stage_end(GlobalImportStage_TypeAliases, stage_start);
 
 		stage_start = global_import_stage_begin();
-		for_array(i, pkg->files) {
-			AstFile *f = pkg->files[i];
-			reset_checker_context(&ctx, f, &untyped);
-
-			ctx.collect_delayed_decls = true;
-
-			bool will_recheck_foreign_block = false;
-			for (Ast *decl : f->delayed_decls_queues[AstDelayQueue_ForeignBlock]) {
-				if (check_add_foreign_block_decl(&ctx, decl)) {
-					pkg_index -= 1;    // Re-check package
-					will_recheck_foreign_block = true;
-					break;
-				}
-			}
-
-			if (will_recheck_foreign_block) {
-				break;
-			}
-
-			array_clear(&f->delayed_decls_queues[AstDelayQueue_ForeignBlock]);
-		}
-		global_import_stage_end(GlobalImportStage_ForeignBlocks, stage_start);
-
-		stage_start = global_import_stage_begin();
-		for_array(i, pkg->files) {
-			AstFile *f = pkg->files[i];
+		for (AstFile *f : pkg->files) {
 			reset_checker_context(&ctx, f, &untyped);
 
 			for (Ast *expr : f->delayed_decls_queues[AstDelayQueue_Expr]) {
diff --git a/src/checker.hpp b/src/checker.hpp
index e51b48da3..9643fa683 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -564,6 +564,7 @@ struct Scope {
 	RwMutex mutex;
 	ScopeMap elements;
 	PtrSet<Scope *> imported;
+	PtrMap<u64, struct GlobalDeclSource *> *placeholders; // multi-map; names a global 'when' or 'foreign' block may declare, until all are resolved
 
 	DeclInfo *decl_info;
 
@@ -838,7 +839,6 @@ struct CheckerContext {
 	u32        stmt_flags;
 	bool       in_enum_type;
 	bool       in_proc_group;
-	bool       collect_delayed_decls;
 	bool       allow_polymorphic_types;
 	bool       disallow_polymorphic_return_types; // NOTE(zen3ger): no poly type decl in return types
 	bool       no_polymorphic_errors;
diff --git a/src/checker_global_graph.cpp b/src/checker_global_graph.cpp
index d639297ac..67a2c7c07 100644
--- a/src/checker_global_graph.cpp
+++ b/src/checker_global_graph.cpp
@@ -13,20 +13,20 @@ struct GlobalEntityTimingFrame {
 };
 
 enum GlobalImportStagePart {
-	GlobalImportStage_CollectFileDecls,
 	GlobalImportStage_Imports,
+	GlobalImportStage_Placeholders,
+	GlobalImportStage_DeclSources,
 	GlobalImportStage_TypeAliases,
-	GlobalImportStage_ForeignBlocks,
 	GlobalImportStage_DelayedExprs,
 
 	GlobalImportStage_COUNT,
 };
 
 gb_global char const *global_import_stage_names[GlobalImportStage_COUNT] = {
-	"collect file decls ('when')",
-	"delayed imports",
+	"imports",
+	"'when' and 'foreign' placeholders",
+	"resolve 'when' and 'foreign' blocks",
 	"type alias correction",
-	"foreign blocks",
 	"delayed expressions (#assert etc.)",
 };
 
diff --git a/src/checker_global_when.cpp b/src/checker_global_when.cpp
new file mode 100644
index 000000000..2b4187b68
--- /dev/null
+++ b/src/checker_global_when.cpp
@@ -0,0 +1,474 @@
+// Global 'when's and 'foreign' blocks: every name one may declare is a placeholder in its scope, and the
+// first lookup of a placeholder resolves them, so the order of files and declarations does not matter
+
+struct GlobalDeclSource {
+	Ast *             node; // WhenStmt or ForeignBlockDecl
+	AstFile *         file;
+	GlobalDeclSource *parent;
+	bool              in_else; // within the else branch of `parent`
+	bool              reachable;
+	bool              reported_cycle;
+	EntityState       state;
+	ForeignContext    foreign_context; // of a resolved 'foreign' block
+};
+
+struct GlobalDeclSourceFrame {
+	GlobalDeclSource *source;
+	InternedString    needs; // the placeholder being resolved for it
+};
+
+gb_global Array<GlobalDeclSource *>    global_decl_sources;
+gb_global Array<GlobalDeclSourceFrame> global_decl_source_stack;
+gb_global Array<Scope *>               global_placeholder_scopes;
+gb_global CheckerContext               global_decl_source_export_ctx;
+gb_global UntypedExprInfoMap           global_decl_source_export_untyped;
+
+enum : u8 {
+	PlaceholderScope_File = 1<<0,
+	PlaceholderScope_Pkg  = 1<<1,
+};
+
+// -1 when 'private' has a value that is not a string literal
+gb_internal i32 syntactic_visibility(Array<Ast *> const &attributes) {
+	for (Ast *attr : attributes) {
+		if (attr->kind != Ast_Attribute) {
+			continue;
+		}
+		for (Ast *elem : attr->Attribute.elems) {
+			if (elem->kind == Ast_Ident && elem->Ident.token.string == "private") {
+				return EntityVisiblity_PrivateToPackage;
+			}
+			if (elem->kind == Ast_FieldValue &&
+			    elem->FieldValue.field->kind == Ast_Ident &&
+			    elem->FieldValue.field->Ident.token.string == "private") {
+				Ast *value = elem->FieldValue.value;
+				if (value != nullptr && value->tav.value.kind == ExactValue_String) {
+					return value->tav.value.value_string == "file" ? EntityVisiblity_PrivateToFile : EntityVisiblity_PrivateToPackage;
+				}
+				return -1;
+			}
+		}
+	}
+	return EntityVisiblity_Public;
+}
+
+gb_internal bool has_syntactic_attribute(Array<Ast *> const &attributes, String const &name) {
+	for (Ast *attr : attributes) {
+		if (attr->kind != Ast_Attribute) {
+			continue;
+		}
+		for (Ast *elem : attr->Attribute.elems) {
+			Ast *field = elem->kind == Ast_FieldValue ? elem->FieldValue.field : elem;
+			if (field->kind == Ast_Ident && field->Ident.token.string == name) {
+				return true;
+			}
+		}
+	}
+	return false;
+}
+
+gb_internal void add_placeholder(Scope *s, InternedString name, GlobalDeclSource *src) {
+	if (name.value == 0 || name.is_blank()) {
+		return;
+	}
+	if (s->placeholders == nullptr) {
+		s->placeholders = permanent_alloc_item<PtrMap<u64, GlobalDeclSource *>>();
+		map_init(s->placeholders);
+		array_add(&global_placeholder_scopes, s);
+	}
+	u64 key = name.value;
+	for (auto *e = multi_map_find_first(s->placeholders, key); e != nullptr; e = multi_map_find_next(s->placeholders, e)) {
+		if (e->value == src) {
+			return;
+		}
+	}
+	multi_map_insert(s->placeholders, key, src);
+}
+
+gb_internal void add_placeholders(AstFile *f, u8 scopes, InternedString name, GlobalDeclSource *src) {
+	if (scopes & PlaceholderScope_File) {
+		add_placeholder(f->scope, name, src);
+	}
+	if (scopes & PlaceholderScope_Pkg) {
+		add_placeholder(f->pkg->scope, name, src);
+	}
+}
+
+gb_internal GlobalDeclSource *add_global_decl_source(Ast *node, AstFile *f, GlobalDeclSource *parent, bool in_else) {
+	GlobalDeclSource *src = permanent_alloc_item<GlobalDeclSource>();
+	src->node      = node;
+	src->file      = f;
+	src->parent    = parent;
+	src->in_else   = in_else;
+	src->reachable = true;
+	src->state     = EntityState_Unresolved;
+	array_add(&global_decl_sources, src);
+	return src;
+}
+
+gb_internal void scan_global_decl_sources(AstFile *f, Slice<Ast *> const &stmts, GlobalDeclSource *owner, bool in_else, i32 foreign_visibility);
+
+gb_internal void scan_global_when_stmt(AstFile *f, Ast *node, GlobalDeclSource *parent, bool in_else, i32 foreign_visibility) {
+	ast_node(ws, WhenStmt, node);
+	GlobalDeclSource *src = add_global_decl_source(node, f, parent, in_else);
+	if (ws->body != nullptr && ws->body->kind == Ast_BlockStmt) {
+		scan_global_decl_sources(f, ws->body->BlockStmt.stmts, src, false, foreign_visibility);
+	}
+	if (ws->else_stmt != nullptr) {
+		switch (ws->else_stmt->kind) {
+		case Ast_BlockStmt:
+			scan_global_decl_sources(f, ws->else_stmt->BlockStmt.stmts, src, true, foreign_visibility);
+			break;
+		case Ast_WhenStmt:
+			scan_global_when_stmt(f, ws->else_stmt, src, true, foreign_visibility);
+			break;
+		}
+	}
+}
+
+gb_internal void scan_global_decl_sources(AstFile *f, Slice<Ast *> const &stmts, GlobalDeclSource *owner, bool in_else, i32 foreign_visibility) {
+	// NOTE(bill): `owner == nullptr` is the file scope itself, whose other declarations are already collected
+	for (Ast *decl : stmts) {
+		switch (decl->kind) {
+		case_ast_node(vd, ValueDecl, decl);
+			if (owner == nullptr) {
+				break;
+			}
+			i32 visibility = syntactic_visibility(vd->attributes);
+			if (visibility == EntityVisiblity_Public) {
+				visibility = foreign_visibility;
+			}
+			if (visibility == EntityVisiblity_Public && (f->flags & AstFile_IsPrivateFile)) {
+				visibility = EntityVisiblity_PrivateToFile;
+			}
+			u8 scopes = PlaceholderScope_Pkg;
+			if (visibility == EntityVisiblity_PrivateToFile) {
+				scopes = PlaceholderScope_File;
+			} else if (visibility < 0) {
+				scopes = PlaceholderScope_File|PlaceholderScope_Pkg;
+			}
+			for (Ast *name : vd->names) {
+				if (name->kind == Ast_Ident) {
+					add_placeholders(f, scopes, name->Ident.interned, owner);
+				}
+			}
+		case_end;
+
+		case_ast_node(fl, ForeignImportDecl, decl);
+			if (owner == nullptr) {
+				break;
+			}
+			String library_name = fl->library_name.string;
+			if (library_name.len == 0 && fl->fullpaths.count != 0) {
+				library_name = path_to_entity_name(fl->library_name.string, fl->fullpaths[0]);
+			}
+			if (library_name.len != 0) {
+				u8 scopes = has_syntactic_attribute(fl->attributes, str_lit("export")) ? PlaceholderScope_Pkg : PlaceholderScope_File;
+				add_placeholders(f, scopes, string_interner_insert(library_name), owner);
+			}
+		case_end;
+
+		case_ast_node(fb, ForeignBlockDecl, decl);
+			GlobalDeclSource *src = add_global_decl_source(decl, f, owner, in_else);
+			if (fb->body != nullptr && fb->body->kind == Ast_BlockStmt) {
+				scan_global_decl_sources(f, fb->body->BlockStmt.stmts, src, false, syntactic_visibility(fb->attributes));
+			}
+		case_end;
+
+		case_ast_node(ws, WhenStmt, decl);
+			scan_global_when_stmt(f, decl, owner, in_else, foreign_visibility);
+		case_end;
+
+		case_ast_node(es, ExprStmt, decl);
+			if (owner == nullptr && es->expr->kind == Ast_CallExpr &&
+			    es->expr->CallExpr.proc->kind == Ast_BasicDirective &&
+			    (decl->state_flags & StateFlag_BeenHandled) == 0) {
+				decl->state_flags |= StateFlag_BeenHandled;
+				array_add(&f->delayed_decls_queues[AstDelayQueue_Expr], es->expr);
+			}
+		case_end;
+		}
+	}
+}
+
+gb_internal bool is_global_decl_source_in_when(GlobalDeclSource *src) {
+	for (; src != nullptr; src = src->parent) {
+		if (src->node->kind == Ast_WhenStmt) {
+			return true;
+		}
+	}
+	return false;
+}
+
+gb_internal Slice<Ast *> global_decl_source_taken_stmts(GlobalDeclSource *src) {
+	if (src->node->kind == Ast_ForeignBlockDecl) {
+		Ast *body = src->node->ForeignBlockDecl.body;
+		if (body != nullptr && body->kind == Ast_BlockStmt) {
+			return body->BlockStmt.stmts;
+		}
+		return {};
+	}
+	ast_node(ws, WhenStmt, src->node);
+	if (ws->determined_cond) {
+		if (ws->body != nullptr && ws->body->kind == Ast_BlockStmt) {
+			return ws->body->BlockStmt.stmts;
+		}
+	} else if (ws->else_stmt != nullptr && ws->else_stmt->kind == Ast_BlockStmt) {
+		return ws->else_stmt->BlockStmt.stmts;
+	}
+	return {};
+}
+
+gb_internal void collect_global_decl_source_stmts(CheckerContext *ctx, Slice<Ast *> const &stmts) {
+	AstFile *f = ctx->file;
+	for (Ast *decl : stmts) {
+		if (decl->kind == Ast_ValueDecl) {
+			check_collect_value_decl(ctx, decl);
+		}
+	}
+	check_export_entities_in_pkg(&global_decl_source_export_ctx, f->pkg, &global_decl_source_export_untyped);
+
+	// NOTE(bill): after the value declarations, as their attributes are evaluated
+	for (Ast *decl : stmts) {
+		switch (decl->kind) {
+		case_ast_node(fl, ForeignImportDecl, decl);
+			check_add_foreign_import_decl(ctx, decl);
+		case_end;
+
+		case_ast_node(es, ExprStmt, decl);
+			if (es->expr->kind == Ast_CallExpr && es->expr->CallExpr.proc->kind == Ast_BasicDirective &&
+			    (decl->state_flags & StateFlag_BeenHandled) == 0) {
+				decl->state_flags |= StateFlag_BeenHandled;
+				array_add(&f->delayed_decls_queues[AstDelayQueue_Expr], es->expr);
+			}
+		case_end;
+		}
+	}
+}
+
+gb_internal Token global_decl_source_token(GlobalDeclSource *src) {
+	if (src->node->kind == Ast_WhenStmt) {
+		return src->node->WhenStmt.token;
+	}
+	return src->node->ForeignBlockDecl.token;
+}
+
+gb_internal void report_global_decl_source_cycle(GlobalDeclSource *src, InternedString needed) {
+	if (src->reported_cycle) {
+		return;
+	}
+	src->reported_cycle = true;
+
+	isize start = 0;
+	for (isize i = global_decl_source_stack.count-1; i >= 0; i--) {
+		if (global_decl_source_stack[i].source == src) {
+			start = i;
+			break;
+		}
+	}
+
+	ERROR_BLOCK();
+	Token token = global_decl_source_token(src);
+	error(token, "Cyclic dependency between global '%.*s' declarations", LIT(token.string));
+	for (isize i = start; i < global_decl_source_stack.count; i++) {
+		Token t = global_decl_source_token(global_decl_source_stack[i].source);
+		InternedString name = i+1 < global_decl_source_stack.count ? global_decl_source_stack[i].needs : needed;
+		error_line("\t'%.*s' at %s needs '%s', which may be declared by\n", LIT(t.string), token_pos_to_string(t.pos), name.cstring());
+	}
+	error_line("\t'%.*s' at %s\n", LIT(token.string), token_pos_to_string(token.pos));
+}
+
+gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedString needed) {
+	if (src->state == EntityState_Resolved) {
+		return;
+	}
+	if (src->state == EntityState_InProgress) {
+		report_global_decl_source_cycle(src, needed);
+		return;
+	}
+
+	GlobalDeclSource *foreign_block = nullptr;
+	if (src->parent != nullptr) {
+		GlobalDeclSource *parent = src->parent;
+		resolve_global_decl_source(parent, needed);
+		if (parent->state != EntityState_Resolved) {
+			return;
+		}
+		bool reachable = parent->reachable;
+		if (parent->node->kind == Ast_WhenStmt) {
+			reachable = reachable && parent->node->WhenStmt.determined_cond != src->in_else;
+		}
+		if (!reachable) {
+			src->reachable = false;
+			src->state = EntityState_Resolved;
+			return;
+		}
+		for (GlobalDeclSource *p = parent; p != nullptr; p = p->parent) {
+			if (p->node->kind == Ast_ForeignBlockDecl) {
+				foreign_block = p;
+				break;
+			}
+		}
+	}
+
+	src->state = EntityState_InProgress;
+	array_add(&global_decl_source_stack, GlobalDeclSourceFrame{src, {}});
+
+	CheckerContext ctx = {};
+	init_checker_context(&ctx, global_checker_ptr.load(std::memory_order_relaxed));
+	UntypedExprInfoMap untyped = {};
+	reset_checker_context(&ctx, src->file, &untyped);
+	if (foreign_block != nullptr) {
+		ctx.foreign_context = foreign_block->foreign_context;
+	}
+
+	if (src->node->kind == Ast_WhenStmt) {
+		ast_node(ws, WhenStmt, src->node);
+		Operand operand = {Addressing_Invalid};
+		check_expr(&ctx, &operand, ws->cond);
+		if (operand.mode != Addressing_Invalid && !is_type_boolean(operand.type)) {
+			error(ws->cond, "Non-boolean condition in 'when' statement");
+		}
+		if (operand.mode != Addressing_Constant) {
+			error(ws->cond, "Non-constant condition in 'when' statement");
+		}
+		ws->is_cond_determined = true;
+		ws->determined_cond = operand.value.kind == ExactValue_Bool && operand.value.value_bool;
+		if (ws->body == nullptr || ws->body->kind != Ast_BlockStmt) {
+			error(ws->cond, "Invalid body for 'when' statement");
+		} else if (ws->else_stmt != nullptr && ws->else_stmt->kind != Ast_BlockStmt && ws->else_stmt->kind != Ast_WhenStmt) {
+			error(ws->else_stmt, "Invalid 'else' statement in 'when' statement");
+		}
+	} else {
+		ast_node(fb, ForeignBlockDecl, src->node);
+		if (fb->foreign_library->kind == Ast_Ident) {
+			ctx.foreign_context.curr_library = fb->foreign_library;
+		} else {
+			error(fb->foreign_library, "Foreign block name must be an identifier or 'export'");
+			ctx.foreign_context.curr_library = nullptr;
+		}
+		check_decl_attributes(&ctx, fb->attributes, foreign_block_decl_attribute, nullptr);
+		src->foreign_context = ctx.foreign_context;
+	}
+
+	// NOTE: resolved before its declarations are collected, which evaluates the attributes of 'foreign import's
+	src->state = EntityState_Resolved;
+	array_pop(&global_decl_source_stack);
+
+	collect_global_decl_source_stmts(&ctx, global_decl_source_taken_stmts(src));
+
+	add_untyped_expressions(ctx.info, &untyped);
+	map_destroy(&untyped);
+	destroy_checker_context(&ctx);
+}
+
+gb_internal Entity *force_scope_placeholders(Scope *s, InternedString name, u32 hash) {
+	PtrMap<u64, GlobalDeclSource *> *m = s->placeholders;
+	bool forced = false;
+	for (auto *e = multi_map_find_first(m, cast(u64)name.value); e != nullptr; e = multi_map_find_next(m, e)) {
+		GlobalDeclSource *src = e->value;
+		if (src->state != EntityState_Resolved) {
+			if (global_decl_source_stack.count > 0) {
+				global_decl_source_stack[global_decl_source_stack.count-1].needs = name;
+			}
+			resolve_global_decl_source(src, name);
+			forced = true;
+		}
+	}
+	if (!forced) {
+		return nullptr;
+	}
+	rw_mutex_shared_lock(&s->mutex);
+	Entity *found = scope_map_get(&s->elements, name, hash);
+	rw_mutex_shared_unlock(&s->mutex);
+	return found;
+}
+
+gb_internal void check_vet_when_shadowing_entity(Entity *e) {
+	if (e == nullptr || e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
+		return;
+	}
+	InternedString name = entity_interned_name(e);
+	u32 hash = e->interned_name_hash.load(std::memory_order_relaxed);
+	Scope *outer = e->scope->parent;
+	if (scope_map_get(&e->scope->elements, name, hash) != e) {
+		outer = outer->parent; // in the package scope
+	}
+	if (outer == nullptr) {
+		return;
+	}
+	Entity *shadowed = scope_lookup(outer, name, hash);
+	if (shadowed == nullptr || shadowed == e) {
+		return;
+	}
+	if (shadowed->scope == builtin_pkg->scope) {
+		error(e->token, "Declaration of '%.*s' within a global 'when' shadows the builtin '%.*s'", LIT(e->token.string), LIT(e->token.string));
+	} else {
+		error(e->token, "Declaration of '%.*s' within a global 'when' shadows the declaration at %s", LIT(e->token.string), token_pos_to_string(shadowed->token.pos));
+	}
+}
+
+gb_internal void check_vet_when_shadowing(void) {
+	for (GlobalDeclSource *src : global_decl_sources) {
+		if (!src->reachable || src->state != EntityState_Resolved) {
+			continue;
+		}
+		if ((ast_file_vet_flags(src->file) & VetFlag_WhenShadowing) == 0 || !is_global_decl_source_in_when(src)) {
+			continue;
+		}
+		for (Ast *decl : global_decl_source_taken_stmts(src)) {
+			if (decl->kind == Ast_ValueDecl) {
+				for (Ast *name : decl->ValueDecl.names) {
+					if (name->kind == Ast_Ident) {
+						check_vet_when_shadowing_entity(name->Ident.entity.load());
+					}
+				}
+			} else if (decl->kind == Ast_ForeignImportDecl) {
+				Token token = decl->ForeignImportDecl.library_name;
+				InternedString name = string_interner_insert(token.string);
+				for (Scope *s = src->file->scope; s != nullptr && s != builtin_pkg->scope; s = s->parent) {
+					Entity *e = scope_map_get(&s->elements, name, name.hash());
+					if (e != nullptr && e->kind == Entity_LibraryName && e->LibraryName.decl == decl) {
+						check_vet_when_shadowing_entity(e);
+						break;
+					}
+				}
+			}
+		}
+	}
+}
+
+// Placeholders for every file, then every source resolved in package, file and source order, which
+// only matters for which errors are reported
+gb_internal void resolve_global_decl_sources(Checker *c, Array<ImportGraphNode *> const &package_order) {
+	array_init(&global_decl_sources,       heap_allocator());
+	array_init(&global_decl_source_stack,  heap_allocator());
+	array_init(&global_placeholder_scopes, heap_allocator());
+	init_checker_context(&global_decl_source_export_ctx, c);
+	defer (destroy_checker_context(&global_decl_source_export_ctx));
+
+	u64 stage_start = global_import_stage_begin();
+	for (ImportGraphNode *node : package_order) {
+		for (AstFile *f : node->pkg->files) {
+			scan_global_decl_sources(f, f->decls, nullptr, false, EntityVisiblity_Public);
+		}
+	}
+	global_import_stage_end(GlobalImportStage_Placeholders, stage_start);
+
+	stage_start = global_import_stage_begin();
+	for (GlobalDeclSource *src : global_decl_sources) {
+		resolve_global_decl_source(src, {});
+	}
+	GB_ASSERT(global_decl_source_stack.count == 0);
+
+	for (Scope *s : global_placeholder_scopes) {
+		map_destroy(s->placeholders);
+		s->placeholders = nullptr;
+	}
+	array_clear(&global_placeholder_scopes);
+
+	check_vet_when_shadowing();
+	global_import_stage_end(GlobalImportStage_DeclSources, stage_start);
+
+	map_destroy(&global_decl_source_export_untyped);
+}
diff --git a/src/main.cpp b/src/main.cpp
index 6f0308cfb..5a3f4e3da 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -460,6 +460,7 @@ enum BuildFlagKind {
 	BuildFlag_VetSemicolon,
 	BuildFlag_VetCast,
 	BuildFlag_VetTabs,
+	BuildFlag_VetWhenShadowing,
 	BuildFlag_VetPackages,
 
 	BuildFlag_CustomAttribute,
@@ -725,6 +726,7 @@ gb_internal bool parse_build_flags(Array<String> args) {
 	add_flag(&build_flags, BuildFlag_VetSemicolon,            str_lit("vet-semicolon"),             BuildFlagParam_None,    Command__does_check);
 	add_flag(&build_flags, BuildFlag_VetCast,                 str_lit("vet-cast"),                  BuildFlagParam_None,    Command__does_check);
 	add_flag(&build_flags, BuildFlag_VetTabs,                 str_lit("vet-tabs"),                  BuildFlagParam_None,    Command__does_check);
+	add_flag(&build_flags, BuildFlag_VetWhenShadowing,        str_lit("vet-when-shadowing"),        BuildFlagParam_None,    Command__does_check);
 	add_flag(&build_flags, BuildFlag_VetPackages,             str_lit("vet-packages"),              BuildFlagParam_String,  Command__does_check);
 
 	add_flag(&build_flags, BuildFlag_CustomAttribute,         str_lit("custom-attribute"),          BuildFlagParam_String,  Command__does_check, true);
@@ -1493,6 +1495,7 @@ gb_internal bool parse_build_flags(Array<String> args) {
 						case BuildFlag_VetSemicolon:        build_context.vet_flags |= VetFlag_Semicolon;        break;
 						case BuildFlag_VetCast:             build_context.vet_flags |= VetFlag_Cast;             break;
 						case BuildFlag_VetTabs:             build_context.vet_flags |= VetFlag_Tabs;             break;
+						case BuildFlag_VetWhenShadowing:    build_context.vet_flags |= VetFlag_WhenShadowing;    break;
 						case BuildFlag_VetUnusedProcedures: build_context.vet_flags |= VetFlag_UnusedProcedures; break;
 
 						case BuildFlag_VetPackages:
@@ -3408,6 +3411,7 @@ gb_internal int print_show_help(String const arg0, String command, String option
 				print_usage_line(3, "-vet-unused-imports");
 				print_usage_line(3, "-vet-shadowing");
 				print_usage_line(3, "-vet-using-stmt");
+				print_usage_line(3, "-vet-when-shadowing");
 		}
 
 		if (print_flag("-vet-cast")) {
@@ -3467,6 +3471,10 @@ gb_internal int print_show_help(String const arg0, String command, String option
 			print_usage_line(2, "Checks for the use of 'using' as a statement.");
 			print_usage_line(2, "'using' is considered bad practice outside of immediate refactoring.");
 		}
+
+		if (print_flag("-vet-when-shadowing")) {
+			print_usage_line(2, "Checks for declarations within a global 'when' that shadow a builtin or package-level name.");
+		}
 	}
 
 	if (check) {
diff --git a/src/parser.cpp b/src/parser.cpp
index 8f4cc99ec..3f6578ab4 100644
--- a/src/parser.cpp
+++ b/src/parser.cpp
@@ -7243,6 +7243,7 @@ gb_internal u64 parse_vet_tag(Token token_for_pos, String s, u64 base_vet_flags)
 			error_line("\tcast\n");
 			error_line("\ttabs\n");
 			error_line("\texplicit-allocators\n");
+			error_line("\twhen-shadowing\n");
 			return vet_flags;
 		}
 	}
diff --git a/src/parser.hpp b/src/parser.hpp
index 08811c37a..f9d8da6af 100644
--- a/src/parser.hpp
+++ b/src/parser.hpp
@@ -101,7 +101,6 @@ enum AstFileFlag : u32 {
 enum AstDelayQueueKind {
 	AstDelayQueue_Import,
 	AstDelayQueue_Expr,
-	AstDelayQueue_ForeignBlock,
 	AstDelayQueue_COUNT,
 };
 

From 98e9aba1fa404381cb1175442e05eb56db54e34a Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 16:28:45 +0100
Subject: [PATCH 121/215] Add loads of global when tests

---
 tests/issues/run.bat                          |  6 ++++
 tests/issues/run.sh                           | 21 +++++++++++
 .../test_issue_const_array_broadcast.odin     | 35 +++++++++++++++++++
 .../issues/test_issue_global_when_cycle.odin  | 14 ++++++++
 .../issues/test_issue_global_when_order.odin  | 35 +++++++++++++++++++
 .../test_issue_global_when_shadowing.odin     |  6 ++++
 6 files changed, 117 insertions(+)
 create mode 100644 tests/issues/test_issue_global_when_cycle.odin
 create mode 100644 tests/issues/test_issue_global_when_order.odin
 create mode 100644 tests/issues/test_issue_global_when_shadowing.odin

diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index dd101297e..991a87d7f 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -49,7 +49,13 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin test ..\test_issue_bool_to_be_conversion.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_bool_comparison_truthiness.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_const_array_broadcast.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_decl_order.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_distinct_constraint.odin %COMMON%  || exit /b
+..\..\..\odin check ..\test_issue_ambiguous_union_literal.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "1" || exit /b
 ..\..\..\odin test ..\test_issue_proc_constant_instantiation.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_global_when_order.odin %COMMON%  || exit /b
+..\..\..\odin check ..\test_issue_global_when_cycle.odin -no-entry-point %COMMON% 2>&1 | find /c "Cyclic dependency between global" | findstr /x "3" || exit /b
+..\..\..\odin check ..\test_issue_global_when_shadowing.odin -no-entry-point %COMMON% 2>&1 | find /c "within a global" | findstr /x "2" || exit /b
 ..\..\..\odin check ..\test_issue_7336.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_ellipsis_type_call.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b
 ..\..\..\odin check ..\test_issue_foreign_redeclaration.odin -no-entry-point %COMMON% || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 5508b07cf..41f108d4d 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -119,8 +119,29 @@ $ODIN check ../test_issue_7260.odin -no-entry-point $COMMON_CHECK
 $ODIN test ../test_issue_bool_to_be_conversion.odin $COMMON
 $ODIN test ../test_issue_bool_comparison_truthiness.odin $COMMON
 $ODIN test ../test_issue_const_array_broadcast.odin $COMMON
+$ODIN test ../test_issue_decl_order.odin $COMMON
+$ODIN test ../test_issue_distinct_constraint.odin $COMMON
+if [[ $($ODIN check ../test_issue_ambiguous_union_literal.odin $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 1 ]]; then
+	echo "SUCCESSFUL 1/1"
+else
+	echo "SUCCESSFUL 0/1"
+	exit 1
+fi
 $ODIN test ../test_issue_proc_constant_instantiation.odin $COMMON
 $ODIN test ../test_issue_swizzle_multi_assign.odin $COMMON
+$ODIN test ../test_issue_global_when_order.odin $COMMON
+if [[ $($ODIN check ../test_issue_global_when_cycle.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Cyclic dependency between global") -eq 3 ]]; then
+	echo "SUCCESSFUL 1/1"
+else
+	echo "SUCCESSFUL 0/1"
+	exit 1
+fi
+if [[ $($ODIN check ../test_issue_global_when_shadowing.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "within a global 'when' shadows") -eq 2 ]]; then
+	echo "SUCCESSFUL 1/1"
+else
+	echo "SUCCESSFUL 0/1"
+	exit 1
+fi
 
 $ODIN check ../test_issue_foreign_redeclaration.odin -no-entry-point $COMMON_CHECK
 if [[ $($ODIN check ../test_issue_foreign_redeclaration_mismatch.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 1 ]]; then
diff --git a/tests/issues/test_issue_const_array_broadcast.odin b/tests/issues/test_issue_const_array_broadcast.odin
index 5960e2f0c..b32ed12a8 100644
--- a/tests/issues/test_issue_const_array_broadcast.odin
+++ b/tests/issues/test_issue_const_array_broadcast.odin
@@ -67,6 +67,41 @@ const_array_broadcast_union :: proc(t: ^testing.T) {
 	testing.expect_value(t, union_local, union_global)
 }
 
+// A named untyped constant against a union hint, broadcast into an array variant, lost its
+// constant value and the backend then tried to load the constant entity as a variable.
+
+@(private="file")
+Target :: union {
+	[]Item,
+	[2]u32,
+}
+
+@(private="file")
+TARGET_SIZE :: 8192
+
+@(private="file")
+take_target :: proc(target: Target, count: u32) -> Target {
+	return target
+}
+
+@(test)
+const_array_broadcast_into_union_variant :: proc(t: ^testing.T) {
+	expected := [2]u32{TARGET_SIZE, TARGET_SIZE}
+
+	assigned: Target = TARGET_SIZE
+	testing.expect_value(t, assigned.([2]u32), expected)
+
+	named := take_target(target = TARGET_SIZE, count = 3)
+	testing.expect_value(t, named.([2]u32), expected)
+
+	positional := take_target(TARGET_SIZE*2, 3)
+	testing.expect_value(t, positional.([2]u32), [2]u32{2*TARGET_SIZE, 2*TARGET_SIZE})
+
+	elems := [2]Target{TARGET_SIZE, {}}
+	testing.expect_value(t, elems[0].([2]u32), expected)
+	testing.expect(t, elems[1] == nil, "the second element should be nil")
+}
+
 @(test)
 const_array_literals_unchanged :: proc(t: ^testing.T) {
 	// a literal for the array's own type is not a broadcast
diff --git a/tests/issues/test_issue_global_when_cycle.odin b/tests/issues/test_issue_global_when_cycle.odin
new file mode 100644
index 000000000..77f83a028
--- /dev/null
+++ b/tests/issues/test_issue_global_when_cycle.odin
@@ -0,0 +1,14 @@
+// Each of these global 'when's needs a name it may declare itself, so all three are cycles
+package test_issues
+
+// each 'when' needs a name the other may declare
+when size_of(int) == 8 { A :: 1 }
+when A == 1 { int :: i32 }
+
+// a 'when' needing a name it may declare
+when B == 1 { B :: 1 }
+
+// or one declared by a 'when' within it
+when C == 1 {
+	when true { C :: 1 }
+}
diff --git a/tests/issues/test_issue_global_when_order.odin b/tests/issues/test_issue_global_when_order.odin
new file mode 100644
index 000000000..2f58aa844
--- /dev/null
+++ b/tests/issues/test_issue_global_when_order.odin
@@ -0,0 +1,35 @@
+// Global 'when's are resolved when a lookup needs a name they may declare, whatever the source order
+package test_issues
+
+import "core:testing"
+
+// needs a name declared by a later 'when'
+when HAS_FOO { X :: 1 } else { X :: 2 }
+when true { HAS_FOO :: true }
+
+// nested 'when's and 'else when' chains
+when A_ENABLED {
+	when B_VALUE == 3 { NESTED :: "three" } else { NESTED :: "other" }
+}
+when false { B_VALUE :: 1 } else when true { B_VALUE :: 3 } else { B_VALUE :: 4 }
+A_ENABLED :: B_VALUE > 0
+
+// file private names
+when PRIV == 5 { FROM_PRIV :: true } else { FROM_PRIV :: false }
+when true { @(private="file") PRIV :: 5 }
+
+// a 'when' within a 'foreign' block
+when size_of(type_of(foreign_proc)) == size_of(rawptr) { FOREIGN_OK :: true } else { FOREIGN_OK :: false }
+foreign {
+	when true {
+		foreign_proc :: proc "c" () ---
+	}
+}
+
+@(test)
+test_global_when_order :: proc(t: ^testing.T) {
+	testing.expect_value(t, X, 1)
+	testing.expect_value(t, NESTED, "three")
+	testing.expect_value(t, FROM_PRIV, true)
+	testing.expect_value(t, FOREIGN_OK, true)
+}
diff --git a/tests/issues/test_issue_global_when_shadowing.odin b/tests/issues/test_issue_global_when_shadowing.odin
new file mode 100644
index 000000000..eb5797429
--- /dev/null
+++ b/tests/issues/test_issue_global_when_shadowing.odin
@@ -0,0 +1,6 @@
+// -vet-when-shadowing, enabled by -vet: a global 'when' declaring a builtin name
+package test_issues
+
+when true { uint :: u32 }
+when true { @(private="file") byte :: u16 }
+when true { not_shadowing :: 1 }

From 379261331ff6865249dfe4142330cd205e12b6b2 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 16:29:04 +0100
Subject: [PATCH 122/215] Add more tests

---
 tests/issues/test_issue_decl_order.odin       | 80 +++++++++++++++++++
 .../test_issue_distinct_constraint.odin       | 21 +++++
 2 files changed, 101 insertions(+)
 create mode 100644 tests/issues/test_issue_decl_order.odin
 create mode 100644 tests/issues/test_issue_distinct_constraint.odin

diff --git a/tests/issues/test_issue_decl_order.odin b/tests/issues/test_issue_decl_order.odin
new file mode 100644
index 000000000..0f27a72b2
--- /dev/null
+++ b/tests/issues/test_issue_decl_order.odin
@@ -0,0 +1,80 @@
+// Global declarations whose result used to depend on which declaration was checked first.
+// Each case puts the declaration that used to break first in source order.
+package test_issues
+
+import "core:testing"
+
+// A global's initializer reads other globals, directly and through procedures, so they must be
+// initialized in dependency order rather than source order.
+@(private="file") init_a := init_b + 1
+@(private="file") init_b := init_c * 2
+@(private="file") init_c := init_f()
+@(private="file") init_f :: proc "contextless" () -> int { return 3 }
+
+@(private="file") init_v := init_p1()
+@(private="file") init_p1 :: proc "contextless" () -> int { return init_p2() }
+@(private="file") init_p2 :: proc "contextless" () -> int { return init_p3() }
+@(private="file") init_p3 :: proc "contextless" () -> int { return init_w }
+@(private="file") init_w := init_g()
+@(private="file") init_g :: proc "contextless" () -> int { return 42 }
+
+@(test)
+global_init_order :: proc(t: ^testing.T) {
+	testing.expect_value(t, init_a, 7)
+	testing.expect_value(t, init_b, 6)
+	testing.expect_value(t, init_c, 3)
+	testing.expect_value(t, init_v, 42)
+	testing.expect_value(t, init_w, 42)
+}
+
+// An alias of an alias of a procedure group, used before the inner alias is checked.
+@(private="file") group_a :: proc(x: int) -> int { return x }
+@(private="file") group_b :: proc(x: string) -> int { return len(x) }
+@(private="file") group :: proc{group_a, group_b}
+@(private="file") outer_alias :: inner_alias
+@(private="file") inner_alias :: group
+
+@(test)
+alias_of_procedure_group_alias :: proc(t: ^testing.T) {
+	testing.expect_value(t, outer_alias(3), 3)
+	testing.expect_value(t, outer_alias("hi"), 2)
+}
+
+// A type alias in a cycle through a pointer, checked before the union that closes the cycle.
+@(private="file") Map :: []Map_Entry
+@(private="file") Map_Entry :: struct { key: Value }
+@(private="file") Value :: union { int, ^Map }
+
+@(test)
+alias_in_pointer_cycle :: proc(t: ^testing.T) {
+	m := new(Map)
+	defer free(m)
+	v: Value = m
+	_, ok := v.(^Map)
+	testing.expect(t, ok, "the union should hold the ^Map variant")
+}
+
+// A type still being checked, used as a polymorphic record argument behind a pointer.
+@(private="file") Box :: struct($T: typeid) { value: T }
+@(private="file") Queued :: distinct [dynamic]^Future
+@(private="file") Queue_Context :: struct { queued: ^Box(Queued) }
+@(private="file") Future :: struct { ctx: ^Queue_Context, id: int }
+
+@(test)
+in_progress_type_as_polymorphic_argument :: proc(t: ^testing.T) {
+	b: Box(Queued)
+	c := Queue_Context{queued = &b}
+	testing.expect_value(t, len(c.queued.value), 0)
+}
+
+// A foreign library alias declared after the foreign block that uses it.
+foreign lib {
+	@(link_name="odin_test_issue_decl_order_never_called")
+	never_called :: proc "c" () ---
+}
+when ODIN_OS == .Windows {
+	foreign import lib_ "system:kernel32.lib"
+} else {
+	foreign import lib_ "system:c"
+}
+lib :: lib_
diff --git a/tests/issues/test_issue_distinct_constraint.odin b/tests/issues/test_issue_distinct_constraint.odin
new file mode 100644
index 000000000..f702a5781
--- /dev/null
+++ b/tests/issues/test_issue_distinct_constraint.odin
@@ -0,0 +1,21 @@
+// A `distinct` copy of a record satisfies a `$T/Record` constraint, as it shares its base record.
+package test_issues
+
+import "core:testing"
+
+@(private="file") Foo :: struct { a: int }
+@(private="file") Bar :: distinct Foo
+@(private="file") Baz :: distinct Bar
+@(private="file") U   :: union { int, f32 }
+@(private="file") DU  :: distinct U
+
+@(private="file") take_foo :: proc(foo: $T/Foo) -> int { return foo.a }
+@(private="file") take_u   :: proc(u: $T/U) -> bool { return u != nil }
+
+@(test)
+distinct_record_satisfies_constraint :: proc(t: ^testing.T) {
+	testing.expect_value(t, take_foo(Foo{1}), 1)
+	testing.expect_value(t, take_foo(Bar{2}), 2)
+	testing.expect_value(t, take_foo(Baz{3}), 3)
+	testing.expect(t, take_u(DU(2)), "a distinct union satisfies its constraint")
+}

From 84f06ee6a814d323f0efcd7f78d3d65a9d37fc89 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 16:30:48 +0100
Subject: [PATCH 123/215] Add test_issue_ambiguous_union_literal.odin

---
 tests/issues/test_issue_ambiguous_union_literal.odin | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 tests/issues/test_issue_ambiguous_union_literal.odin

diff --git a/tests/issues/test_issue_ambiguous_union_literal.odin b/tests/issues/test_issue_ambiguous_union_literal.odin
new file mode 100644
index 000000000..1b2e11040
--- /dev/null
+++ b/tests/issues/test_issue_ambiguous_union_literal.odin
@@ -0,0 +1,12 @@
+// An untyped compound literal that matches two union variants is one ambiguity error. Trying the
+// overloads of `append` muted the error but not its follow-up lines, which crashed the error system.
+package test_issues
+
+A :: struct { x: int }
+B :: struct { x: int }
+U :: union { A, B }
+
+main :: proc() {
+	d: [dynamic]U
+	append(&d, {x = 1})
+}

From ce6aac3028f8fe5b7b1fc2ffc2a357f4e9daf881 Mon Sep 17 00:00:00 2001
From: Alexander Zhura <nice.zhura@list.ru>
Date: Thu, 1 Oct 2026 19:21:35 +0300
Subject: [PATCH 124/215] Impl simd x86 avx512 typo fix

---
 core/simd/x86/avx512f.odin | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/core/simd/x86/avx512f.odin b/core/simd/x86/avx512f.odin
index 279273ae0..764f47106 100644
--- a/core/simd/x86/avx512f.odin
+++ b/core/simd/x86/avx512f.odin
@@ -76,6 +76,6 @@ _mm512_or_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_xor_si512)
 @(require_results, enable_target_feature="avx512f,evex512")
-_mm512_xor_si512 :: #force_inline proc "c" (a, b: __m256i) -> __m256i {
+_mm512_xor_si512 :: #force_inline proc "c" (a, b: __m512i) -> __m512i {
 	return simd.bit_xor(a, b)
 }

From 63bd49c88bc04fc5d0523a5e8e8d66e11ba54ef1 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 17:28:38 +0100
Subject: [PATCH 125/215] Add `-internal-check-global-edges`; Check global
 entities in dependency-ordered groups of a syntactic graph

---
 src/build_settings.cpp        |   1 +
 src/check_decl.cpp            |   1 +
 src/checker.cpp               |  50 +--
 src/checker.hpp               |   1 +
 src/checker_global_groups.cpp | 769 ++++++++++++++++++++++++++++++++++
 src/main.cpp                  |   5 +
 6 files changed, 780 insertions(+), 47 deletions(-)
 create mode 100644 src/checker_global_groups.cpp

diff --git a/src/build_settings.cpp b/src/build_settings.cpp
index 7f4da5140..7add7d37e 100644
--- a/src/build_settings.cpp
+++ b/src/build_settings.cpp
@@ -603,6 +603,7 @@ struct BuildContext {
 	bool internal_llvm_no_sroa;
 	bool internal_global_entity_graph;
 	u64  internal_shuffle_global_entities; // seed, 0 = no shuffle
+	bool internal_check_global_edges;
 
 	bool   enable_rvo;
 
diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index 472daaf6f..fd9672f21 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -2183,6 +2183,7 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 			c.scope->flags &= ~ScopeFlag_ContextDefined;
 		}
 
+		global_group_check_edge(ctx, e);
 
 		e->parent_proc_decl = c.curr_proc_decl;
 		e->state = EntityState_InProgress;
diff --git a/src/checker.cpp b/src/checker.cpp
index 27ef4b147..fa454f404 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -5339,53 +5339,7 @@ gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d)
 	check_entity_decl(ctx, e, d, nullptr);
 }
 
-// for `-internal-shuffle-global-entities`
-// visit globals in a seeded random order, so that any result depending on the visiting order shows up without needing threads
-gb_internal void shuffle_global_entities(Array<Entity *> *entities, u64 seed) {
-	if (seed == 0) {
-		return;
-	}
-	u64 state = seed;
-	for (isize i = entities->count-1; i > 0; i--) {
-		state = state*6364136223846793005ull + 1442695040888963407ull;
-		isize j = cast(isize)((state >> 33) % cast(u64)(i+1));
-		Entity *tmp = (*entities)[i];
-		(*entities)[i] = (*entities)[j];
-		(*entities)[j] = tmp;
-	}
-}
-
-gb_internal void check_all_global_entities(Checker *c) {
-	in_single_threaded_checker_stage.store(true, std::memory_order_relaxed);
-
-	auto order = array_clone(heap_allocator(), c->info.entities);
-	defer (array_free(&order));
-	shuffle_global_entities(&order, build_context.internal_shuffle_global_entities);
-
-	// NOTE(bill): This must be single threaded
-	// Don't bother trying
-	for (Entity *e : order) {
-		GB_ASSERT(e != nullptr);
-		if (e->flags & EntityFlag_Lazy) {
-			continue;
-		}
-		DeclInfo *d = e->decl_info;
-		GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
-		check_single_global_entity(c, e, d);
-		if (e->type != nullptr && is_type_typed(e->type)) {
-			for (Type *t = nullptr; mpsc_dequeue(&c->soa_types_to_complete, &t); /**/) {
-				complete_soa_type(c, t, false);
-			}
-
-			(void)type_size_of(e->type);
-			(void)type_align_of(e->type);
-		}
-		global_entity_timing_end(timing_frame, e);
-	}
-
-	in_single_threaded_checker_stage.store(false, std::memory_order_relaxed);
-}
-
+#include "checker_global_groups.cpp"
 
 gb_internal bool is_string_an_identifier(String s) {
 	isize offset = 0;
@@ -7524,7 +7478,9 @@ gb_internal void check_parsed_files(Checker *c) {
 	if (build_context.internal_global_entity_graph) {
 		TIME_SECTION("print global entity graph");
 		print_global_entity_graph(c);
+		print_global_groups(&global_groups);
 	}
+	destroy_global_groups(&global_groups);
 
 	TIME_SECTION("init preload");
 	init_preload(c);
diff --git a/src/checker.hpp b/src/checker.hpp
index 9643fa683..8eecdb6e4 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -917,6 +917,7 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *c, Ast *decl);
 
 
 gb_internal void check_entity_decl(CheckerContext *c, Entity *e, DeclInfo *d, Type *named_type);
+gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e);
 gb_internal void wait_for_lazy_entity(CheckerContext *c, Entity *e);
 gb_internal Ast *remove_type_alias_clutter(Ast *node);
 gb_internal void check_const_decl(CheckerContext *c, Entity *e, Ast *type_expr, Ast *init_expr, Type *named_type);
diff --git a/src/checker_global_groups.cpp b/src/checker_global_groups.cpp
new file mode 100644
index 000000000..cf3e3924e
--- /dev/null
+++ b/src/checker_global_groups.cpp
@@ -0,0 +1,769 @@
+// Global entities are checked in groups: the strongly connected components of a dependency graph built
+// from syntax, in dependency order. A group only names entities of its own or of finished groups, which
+// `-internal-check-global-edges` verifies
+
+struct GlobalGroup {
+	i32  start; // into `GlobalGroupGraph::members`
+	i32  count;
+	bool done;
+};
+
+struct GlobalGroupGraph {
+	Array<Entity *>       nodes;
+	PtrMap<Entity *, i32> node_of;
+	Array<i32>            offsets; // node -> the nodes it names, as `targets[offsets[v]..offsets[v+1]]`
+	Array<i32>            targets;
+	Array<i32>            group_of;
+	Array<GlobalGroup>    groups;  // every dependency of a group has a lower index
+	Array<i32>            members; // nodes, by group, in source order
+
+	bool   active;
+	i32    current_group;
+	Entity *current_entity;
+	isize  missing_edges;
+};
+
+gb_global GlobalGroupGraph global_groups;
+
+struct GlobalGraphWalk {
+	Scope *scope;
+	Array<Entity *> *refs;
+};
+
+gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node);
+
+gb_internal void global_graph_walk_slice(GlobalGraphWalk *w, Slice<Ast *> const &nodes) {
+	for (Ast *node : nodes) {
+		global_graph_walk(w, node);
+	}
+}
+
+gb_internal void global_graph_add_ref(GlobalGraphWalk *w, Entity *e) {
+	if (e != nullptr) {
+		array_add(w->refs, e);
+	}
+}
+
+// NOTE: names bound within the expression (parameters, fields, '$T') are also looked up globally, which at
+// worst adds an edge; only procedure bodies are skipped, as they are checked after this stage
+gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node) {
+	if (node == nullptr) {
+		return;
+	}
+	switch (node->kind) {
+	case Ast_Ident:
+		global_graph_add_ref(w, scope_lookup(w->scope, node->Ident.interned, node->Ident.hash));
+		break;
+
+	case Ast_SelectorExpr: {
+		Ast *expr     = node->SelectorExpr.expr;
+		Ast *selector = node->SelectorExpr.selector;
+		if (expr != nullptr && expr->kind == Ast_Ident) {
+			Entity *e = scope_lookup(w->scope, expr->Ident.interned, expr->Ident.hash);
+			if (e != nullptr && e->kind == Entity_ImportName && selector != nullptr && selector->kind == Ast_Ident) {
+				global_graph_add_ref(w, scope_lookup_current(e->ImportName.scope, selector->Ident.interned, selector->Ident.hash));
+			} else {
+				global_graph_add_ref(w, e);
+			}
+		} else {
+			global_graph_walk(w, expr);
+		}
+	} break;
+
+	case Ast_PolyType:
+		global_graph_walk(w, node->PolyType.specialization);
+		break;
+	case Ast_Ellipsis:
+		global_graph_walk(w, node->Ellipsis.expr);
+		break;
+	case Ast_ProcGroup:
+		global_graph_walk_slice(w, node->ProcGroup.args);
+		break;
+	case Ast_AsmGroup:
+		global_graph_walk_slice(w, node->AsmGroup.args);
+		break;
+	case Ast_ProcLit:
+		global_graph_walk(w, node->ProcLit.type);
+		global_graph_walk_slice(w, node->ProcLit.where_clauses);
+		break;
+	case Ast_CompoundLit:
+		global_graph_walk(w, node->CompoundLit.type);
+		global_graph_walk_slice(w, node->CompoundLit.elems);
+		global_graph_walk(w, node->CompoundLit.tag);
+		break;
+	case Ast_TagExpr:
+		global_graph_walk(w, node->TagExpr.expr);
+		break;
+	case Ast_UnaryExpr:
+		global_graph_walk(w, node->UnaryExpr.expr);
+		break;
+	case Ast_BinaryExpr:
+		global_graph_walk(w, node->BinaryExpr.left);
+		global_graph_walk(w, node->BinaryExpr.right);
+		break;
+	case Ast_ParenExpr:
+		global_graph_walk(w, node->ParenExpr.expr);
+		break;
+	case Ast_SelectorCallExpr:
+		global_graph_walk(w, node->SelectorCallExpr.expr);
+		global_graph_walk(w, node->SelectorCallExpr.call);
+		break;
+	case Ast_IndexExpr:
+		global_graph_walk(w, node->IndexExpr.expr);
+		global_graph_walk(w, node->IndexExpr.index);
+		break;
+	case Ast_MatrixIndexExpr:
+		global_graph_walk(w, node->MatrixIndexExpr.expr);
+		global_graph_walk(w, node->MatrixIndexExpr.row_index);
+		global_graph_walk(w, node->MatrixIndexExpr.column_index);
+		break;
+	case Ast_DerefExpr:
+		global_graph_walk(w, node->DerefExpr.expr);
+		break;
+	case Ast_SliceExpr:
+		global_graph_walk(w, node->SliceExpr.expr);
+		global_graph_walk(w, node->SliceExpr.low);
+		global_graph_walk(w, node->SliceExpr.high);
+		break;
+	case Ast_CallExpr:
+		global_graph_walk(w, node->CallExpr.proc);
+		global_graph_walk_slice(w, node->CallExpr.args);
+		break;
+	case Ast_FieldValue:
+		global_graph_walk(w, node->FieldValue.field);
+		global_graph_walk(w, node->FieldValue.value);
+		break;
+	case Ast_EnumFieldValue:
+		global_graph_walk(w, node->EnumFieldValue.value);
+		break;
+	case Ast_TernaryIfExpr:
+		global_graph_walk(w, node->TernaryIfExpr.x);
+		global_graph_walk(w, node->TernaryIfExpr.cond);
+		global_graph_walk(w, node->TernaryIfExpr.y);
+		break;
+	case Ast_TernaryWhenExpr:
+		global_graph_walk(w, node->TernaryWhenExpr.x);
+		global_graph_walk(w, node->TernaryWhenExpr.cond);
+		global_graph_walk(w, node->TernaryWhenExpr.y);
+		break;
+	case Ast_OrElseExpr:
+		global_graph_walk(w, node->OrElseExpr.x);
+		global_graph_walk(w, node->OrElseExpr.y);
+		break;
+	case Ast_OrReturnExpr:
+		global_graph_walk(w, node->OrReturnExpr.expr);
+		break;
+	case Ast_OrBranchExpr:
+		global_graph_walk(w, node->OrBranchExpr.expr);
+		break;
+	case Ast_TypeAssertion:
+		global_graph_walk(w, node->TypeAssertion.expr);
+		global_graph_walk(w, node->TypeAssertion.type);
+		break;
+	case Ast_TypeCast:
+		global_graph_walk(w, node->TypeCast.type);
+		global_graph_walk(w, node->TypeCast.expr);
+		break;
+	case Ast_AutoCast:
+		global_graph_walk(w, node->AutoCast.expr);
+		break;
+
+	case Ast_Field:
+		global_graph_walk(w, node->Field.type);
+		global_graph_walk(w, node->Field.default_value);
+		break;
+	case Ast_BitFieldField:
+		global_graph_walk(w, node->BitFieldField.type);
+		global_graph_walk(w, node->BitFieldField.bit_size);
+		break;
+	case Ast_FieldList:
+		global_graph_walk_slice(w, node->FieldList.list);
+		break;
+
+	case Ast_TypeidType:
+		global_graph_walk(w, node->TypeidType.specialization);
+		break;
+	case Ast_HelperType:
+		global_graph_walk(w, node->HelperType.type);
+		break;
+	case Ast_DistinctType:
+		global_graph_walk(w, node->DistinctType.type);
+		break;
+	case Ast_ProcType:
+		global_graph_walk(w, node->ProcType.params);
+		global_graph_walk(w, node->ProcType.results);
+		break;
+	case Ast_RelativeType:
+		global_graph_walk(w, node->RelativeType.tag);
+		global_graph_walk(w, node->RelativeType.type);
+		break;
+	case Ast_PointerType:
+		global_graph_walk(w, node->PointerType.type);
+		global_graph_walk(w, node->PointerType.tag);
+		break;
+	case Ast_MultiPointerType:
+		global_graph_walk(w, node->MultiPointerType.type);
+		break;
+	case Ast_ArrayType:
+		global_graph_walk(w, node->ArrayType.count);
+		global_graph_walk(w, node->ArrayType.elem);
+		global_graph_walk(w, node->ArrayType.tag);
+		break;
+	case Ast_DynamicArrayType:
+		global_graph_walk(w, node->DynamicArrayType.elem);
+		global_graph_walk(w, node->DynamicArrayType.tag);
+		break;
+	case Ast_FixedCapacityDynamicArrayType:
+		global_graph_walk(w, node->FixedCapacityDynamicArrayType.elem);
+		global_graph_walk(w, node->FixedCapacityDynamicArrayType.capacity);
+		global_graph_walk(w, node->FixedCapacityDynamicArrayType.tag);
+		break;
+	case Ast_StructType:
+		global_graph_walk_slice(w, node->StructType.fields);
+		global_graph_walk(w, node->StructType.polymorphic_params);
+		global_graph_walk(w, node->StructType.align);
+		global_graph_walk(w, node->StructType.min_field_align);
+		global_graph_walk(w, node->StructType.max_field_align);
+		global_graph_walk_slice(w, node->StructType.where_clauses);
+		break;
+	case Ast_UnionType:
+		global_graph_walk_slice(w, node->UnionType.variants);
+		global_graph_walk(w, node->UnionType.polymorphic_params);
+		global_graph_walk_slice(w, node->UnionType.where_clauses);
+		break;
+	case Ast_EnumType:
+		global_graph_walk(w, node->EnumType.base_type);
+		for (Ast *field : node->EnumType.fields) {
+			if (field->kind == Ast_EnumFieldValue) {
+				global_graph_walk(w, field->EnumFieldValue.value);
+			}
+		}
+		break;
+	case Ast_BitSetType:
+		global_graph_walk(w, node->BitSetType.elem);
+		global_graph_walk(w, node->BitSetType.underlying);
+		break;
+	case Ast_BitFieldType:
+		global_graph_walk(w, node->BitFieldType.backing_type);
+		global_graph_walk_slice(w, node->BitFieldType.fields);
+		break;
+	case Ast_MapType:
+		global_graph_walk(w, node->MapType.count);
+		global_graph_walk(w, node->MapType.key);
+		global_graph_walk(w, node->MapType.value);
+		break;
+	case Ast_MatrixType:
+		global_graph_walk(w, node->MatrixType.row_count);
+		global_graph_walk(w, node->MatrixType.column_count);
+		global_graph_walk(w, node->MatrixType.elem);
+		break;
+
+	case Ast_AsmTemplate:
+		global_graph_walk(w, node->AsmTemplate.signature);
+		global_graph_walk_slice(w, node->AsmTemplate.specs);
+		global_graph_walk_slice(w, node->AsmTemplate.clobbers);
+		global_graph_walk_slice(w, node->AsmTemplate.instructions);
+		break;
+	case Ast_AsmSpec:
+		global_graph_walk(w, node->AsmSpec.type);
+		global_graph_walk(w, node->AsmSpec.value);
+		for (Ast *d : node->AsmSpec.directives) {
+			global_graph_walk(w, d);
+		}
+		break;
+	case Ast_AsmClobber:
+		global_graph_walk(w, node->AsmClobber.value);
+		break;
+	case Ast_AsmInstruction:
+		global_graph_walk_slice(w, node->AsmInstruction.operands);
+		break;
+	case Ast_AsmMemoryTerm:
+		global_graph_walk(w, node->AsmMemoryTerm.operand);
+		global_graph_walk(w, node->AsmMemoryTerm.scale);
+		break;
+	case Ast_AsmMemoryOperand:
+		global_graph_walk(w, node->AsmMemoryOperand.segment_override);
+		global_graph_walk_slice(w, node->AsmMemoryOperand.terms);
+		global_graph_walk(w, node->AsmMemoryOperand.type);
+		break;
+	case Ast_AsmRegisterGroup:
+		for (Ast *r : node->AsmRegisterGroup.registers) {
+			global_graph_walk(w, r);
+		}
+		global_graph_walk(w, node->AsmRegisterGroup.type);
+		break;
+	case Ast_AsmDirective:
+		global_graph_walk_slice(w, node->AsmDirective.operands);
+		break;
+	}
+}
+
+gb_internal void global_graph_walk_entity(GlobalGraphWalk *w, Entity *e, DeclInfo *d) {
+	w->scope = d->scope;
+	global_graph_walk(w, d->type_expr);
+	global_graph_walk(w, d->init_expr);
+	for (Ast *attr : d->attributes) {
+		if (attr->kind != Ast_Attribute) {
+			continue;
+		}
+		for (Ast *elem : attr->Attribute.elems) {
+			if (elem->kind == Ast_FieldValue) {
+				global_graph_walk(w, elem->FieldValue.value);
+			}
+		}
+	}
+	if (e->kind == Entity_Procedure) {
+		global_graph_walk(w, e->Procedure.foreign_library_ident);
+	} else if (e->kind == Entity_Variable) {
+		global_graph_walk(w, e->Variable.foreign_library_ident);
+	}
+}
+
+gb_internal bool is_global_graph_node(Entity *e) {
+	if (e->state == EntityState_Resolved) {
+		return false;
+	}
+	DeclInfo *d = e->decl_info;
+	if (d == nullptr || e->scope == nullptr || d->scope != e->scope || (e->scope->flags & ScopeFlag_File) == 0) {
+		return false;
+	}
+	switch (e->kind) {
+	case Entity_Constant:
+	case Entity_TypeName:
+	case Entity_Variable:
+	case Entity_Procedure:
+	case Entity_ProcGroup:
+	case Entity_AsmTemplate:
+		return true;
+	}
+	return false;
+}
+
+gb_internal i32 global_graph_add_node(GlobalGroupGraph *g, Entity *e) {
+	i32 *found = map_get(&g->node_of, e);
+	if (found != nullptr) {
+		return *found;
+	}
+	i32 v = cast(i32)g->nodes.count;
+	map_set(&g->node_of, e, v);
+	array_add(&g->nodes, e);
+	return v;
+}
+
+gb_internal u64 global_group_random(u64 *state) {
+	*state = *state*6364136223846793005ull + 1442695040888963407ull;
+	return *state >> 33;
+}
+
+// The nodes `[lo, hi)` walked on one thread; a name that is not a node yet is kept as an entity in `refs`
+struct GlobalGraphWalkChunk {
+	GlobalGroupGraph *g;
+	i32               lo, hi;
+	Array<i32>        targets;
+	Array<i32>        target_ends; // per node
+	Array<Entity *>   refs;
+	Array<i32>        ref_ends;    // per node
+};
+
+gb_internal WORKER_TASK_PROC(global_graph_walk_worker) {
+	GlobalGraphWalkChunk *chunk = cast(GlobalGraphWalkChunk *)data;
+	GlobalGroupGraph *g = chunk->g;
+
+	auto refs = array_make<Entity *>(heap_allocator(), 0, 64);
+	defer (array_free(&refs));
+	GlobalGraphWalk w = {};
+	w.refs = &refs;
+	for (i32 v = chunk->lo; v < chunk->hi; v++) {
+		Entity *e = g->nodes[v];
+		array_clear(&refs);
+		global_graph_walk_entity(&w, e, e->decl_info);
+		for (Entity *r : refs) {
+			i32 *found = map_get(&g->node_of, r);
+			if (found != nullptr) {
+				array_add(&chunk->targets, *found);
+			} else if (r->flags & EntityFlag_Lazy) {
+				array_add(&chunk->refs, r);
+			}
+		}
+		array_add(&chunk->target_ends, cast(i32)chunk->targets.count);
+		array_add(&chunk->ref_ends,    cast(i32)chunk->refs.count);
+	}
+	return 0;
+}
+
+gb_internal void build_global_groups(Checker *c, GlobalGroupGraph *g) {
+	array_init(&g->nodes, heap_allocator(), 0, c->info.entities.count);
+	map_init(&g->node_of, c->info.entities.count);
+	for (Entity *e : c->info.entities) {
+		if ((e->flags & EntityFlag_Lazy) == 0 && is_global_graph_node(e)) {
+			global_graph_add_node(g, e);
+		}
+	}
+
+	// NOTE: walked in parallel, as nothing writes to the scopes now
+	i32 const CHUNK_SIZE = 64;
+	i32 initial_count = cast(i32)g->nodes.count;
+	auto chunks = array_make<GlobalGraphWalkChunk>(heap_allocator(), (initial_count + CHUNK_SIZE-1)/CHUNK_SIZE);
+	defer (array_free(&chunks));
+	for (isize i = 0; i < chunks.count; i++) {
+		GlobalGraphWalkChunk *chunk = &chunks[i];
+		*chunk = {};
+		chunk->g  = g;
+		chunk->lo = cast(i32)(i*CHUNK_SIZE);
+		chunk->hi = gb_min(chunk->lo + CHUNK_SIZE, initial_count);
+		array_init(&chunk->targets,     heap_allocator(), 0, 4*CHUNK_SIZE);
+		array_init(&chunk->target_ends, heap_allocator(), 0, CHUNK_SIZE);
+		array_init(&chunk->refs,        heap_allocator(), 0);
+		array_init(&chunk->ref_ends,    heap_allocator(), 0, CHUNK_SIZE);
+		thread_pool_add_task(global_graph_walk_worker, chunk);
+	}
+	thread_pool_wait();
+
+	auto edge_from = array_make<i32>(heap_allocator(), 0, 4*g->nodes.count);
+	auto edge_to   = array_make<i32>(heap_allocator(), 0, 4*g->nodes.count);
+	auto refs      = array_make<Entity *>(heap_allocator(), 0, 64);
+	defer (array_free(&edge_from));
+	defer (array_free(&edge_to));
+	defer (array_free(&refs));
+
+	auto add_ref = [&](i32 v, Entity *r) {
+		i32 *found = map_get(&g->node_of, r);
+		if (found != nullptr) {
+			array_add(&edge_from, v);
+			array_add(&edge_to, *found);
+		} else if ((r->flags & EntityFlag_Lazy) && is_global_graph_node(r)) {
+			// NOTE: a lazy entity becomes a node once a node names it
+			array_add(&edge_from, v);
+			array_add(&edge_to, global_graph_add_node(g, r));
+		}
+	};
+
+	GlobalGraphWalk w = {};
+	w.refs = &refs;
+	i32 first_of_decl = -1;
+	for (i32 v = 0; v < g->nodes.count; v++) {
+		Entity *e = g->nodes[v];
+		DeclInfo *d = e->decl_info;
+
+		// NOTE: entities sharing one declaration share its AST, e.g. `a, b: struct{x: int}`, so they share a group;
+		// in source order they are adjacent, and lazy ones are only checked under `lazy_mutex`
+		if (first_of_decl >= 0 && d->decl_node != nullptr && g->nodes[first_of_decl]->decl_info->decl_node == d->decl_node) {
+			array_add(&edge_from, v);
+			array_add(&edge_to,   first_of_decl);
+			array_add(&edge_from, first_of_decl);
+			array_add(&edge_to,   v);
+		} else {
+			first_of_decl = v;
+		}
+
+		if (v < initial_count) {
+			GlobalGraphWalkChunk *chunk = &chunks[v / CHUNK_SIZE];
+			i32 k = v - chunk->lo;
+			for (i32 i = k > 0 ? chunk->target_ends[k-1] : 0; i < chunk->target_ends[k]; i++) {
+				array_add(&edge_from, v);
+				array_add(&edge_to, chunk->targets[i]);
+			}
+			for (i32 i = k > 0 ? chunk->ref_ends[k-1] : 0; i < chunk->ref_ends[k]; i++) {
+				add_ref(v, chunk->refs[i]);
+			}
+		} else {
+			array_clear(&refs);
+			global_graph_walk_entity(&w, e, d);
+			for (Entity *r : refs) {
+				add_ref(v, r);
+			}
+		}
+	}
+	for (GlobalGraphWalkChunk &chunk : chunks) {
+		array_free(&chunk.targets);
+		array_free(&chunk.target_ends);
+		array_free(&chunk.refs);
+		array_free(&chunk.ref_ends);
+	}
+
+	i32 node_count = cast(i32)g->nodes.count;
+	array_init(&g->offsets, heap_allocator(), node_count+1);
+	array_init(&g->targets, heap_allocator(), edge_to.count);
+	for (i32 v = 0; v <= node_count; v++) {
+		g->offsets[v] = 0;
+	}
+	for (i32 from : edge_from) {
+		g->offsets[from+1] += 1;
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		g->offsets[v+1] += g->offsets[v];
+	}
+	{
+		auto fill = array_clone(heap_allocator(), g->offsets);
+		defer (array_free(&fill));
+		for (isize i = 0; i < edge_from.count; i++) {
+			g->targets[fill[edge_from[i]]++] = edge_to[i];
+		}
+	}
+
+	array_init(&g->group_of, heap_allocator(), node_count);
+	i32 group_count = global_graph_scc(node_count, g->offsets, g->targets, &g->group_of);
+
+	array_init(&g->groups,  heap_allocator(), group_count);
+	array_init(&g->members, heap_allocator(), node_count);
+	for (i32 gi = 0; gi < group_count; gi++) {
+		g->groups[gi] = {};
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		g->groups[g->group_of[v]].count += 1;
+	}
+	i32 start = 0;
+	for (i32 gi = 0; gi < group_count; gi++) {
+		g->groups[gi].start = start;
+		start += g->groups[gi].count;
+		g->groups[gi].count = 0;
+	}
+	// NOTE: in source order, as `c->info.entities` is sorted; lazy nodes come last, but are not checked here
+	for (i32 v = 0; v < node_count; v++) {
+		GlobalGroup *group = &g->groups[g->group_of[v]];
+		g->members[group->start + group->count++] = v;
+	}
+}
+
+gb_internal void global_group_print_entity(Entity *e) {
+	if (e == nullptr) {
+		gb_printf_err("?");
+		return;
+	}
+	global_graph_print_entity(e);
+}
+
+// Called when `e` starts being checked: it must be in the current group or a finished one
+gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e) {
+	GlobalGroupGraph *g = &global_groups;
+	if (!g->active) {
+		return;
+	}
+	i32 *v = map_get(&g->node_of, e);
+	if (v == nullptr) {
+		if (!is_global_graph_node(e)) {
+			return;
+		}
+	} else {
+		i32 gi = g->group_of[*v];
+		if (gi == g->current_group || g->groups[gi].done) {
+			return;
+		}
+	}
+
+	g->missing_edges += 1;
+	if (build_context.internal_check_global_edges) {
+		Entity *by = ctx->decl ? ctx->decl->entity.load() : nullptr;
+		gb_printf_err("Missing global dependency: ");
+		global_group_print_entity(by);
+		gb_printf_err(" needs ");
+		global_group_print_entity(e);
+		gb_printf_err(v == nullptr ? ", which is not in the graph" : "");
+		if (g->current_entity != by) {
+			gb_printf_err(", while checking ");
+			global_group_print_entity(g->current_entity);
+		}
+		gb_printf_err("\n");
+	}
+}
+
+// NOTE: members in a fixed order, as which member of a cycle is entered first can decide whether it checks,
+// e.g. an enum whose values are `union_variant_index`es of a union with pointers back to it
+gb_internal void check_global_group(Checker *c, GlobalGroupGraph *g, i32 gi) {
+	GlobalGroup *group = &g->groups[gi];
+	i32 *members = g->members.data + group->start;
+
+	g->current_group = gi;
+	for (i32 k = 0; k < group->count; k++) {
+		Entity *e = g->nodes[members[k]];
+		if (e->flags & EntityFlag_Lazy) {
+			// NOTE: only checked when something uses it; the group orders it after what it names
+			continue;
+		}
+		g->current_entity = e;
+		GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
+		check_single_global_entity(c, e, e->decl_info);
+		if (e->type != nullptr && is_type_typed(e->type)) {
+			for (Type *t = nullptr; mpsc_dequeue(&c->soa_types_to_complete, &t); /**/) {
+				complete_soa_type(c, t, false);
+			}
+
+			(void)type_size_of(e->type);
+			(void)type_align_of(e->type);
+		}
+		global_entity_timing_end(timing_frame, e);
+	}
+	group->done = true;
+	g->current_group = -1;
+	g->current_entity = nullptr;
+}
+
+// Groups in dependency order; with `-internal-shuffle-global-entities`, a random one of the groups whose
+// dependencies are done, as a parallel checker might
+gb_internal void check_global_groups(Checker *c, GlobalGroupGraph *g) {
+	i32 group_count = cast(i32)g->groups.count;
+	u64 seed = build_context.internal_shuffle_global_entities;
+	if (seed == 0) {
+		for (i32 gi = 0; gi < group_count; gi++) {
+			check_global_group(c, g, gi);
+		}
+		return;
+	}
+
+	auto dependents = array_make<Array<i32> >(heap_allocator(), group_count);
+	auto dep_count  = array_make<i32>        (heap_allocator(), group_count);
+	auto seen       = array_make<i32>        (heap_allocator(), group_count);
+	auto ready      = array_make<i32>        (heap_allocator(), 0, group_count);
+	defer ({
+		for (auto &d : dependents) {
+			array_free(&d);
+		}
+		array_free(&dependents);
+	});
+	defer (array_free(&dep_count));
+	defer (array_free(&seen));
+	defer (array_free(&ready));
+
+	for (i32 gi = 0; gi < group_count; gi++) {
+		dep_count[gi] = 0;
+		dependents[gi] = {};
+		seen[gi] = -1;
+	}
+	for (i32 gi = 0; gi < group_count; gi++) {
+		GlobalGroup const &group = g->groups[gi];
+		for (i32 k = 0; k < group.count; k++) {
+			i32 v = g->members[group.start + k];
+			for (i32 i = g->offsets[v]; i < g->offsets[v+1]; i++) {
+				i32 dep = g->group_of[g->targets[i]];
+				if (dep != gi && seen[dep] != gi) {
+					seen[dep] = gi;
+					dep_count[gi] += 1;
+					if (dependents[dep].allocator.proc == nullptr) {
+						array_init(&dependents[dep], heap_allocator());
+					}
+					array_add(&dependents[dep], gi);
+				}
+			}
+		}
+		if (dep_count[gi] == 0) {
+			array_add(&ready, gi);
+		}
+	}
+
+	u64 state = seed;
+	isize checked = 0;
+	while (ready.count > 0) {
+		isize i = cast(isize)(global_group_random(&state) % cast(u64)ready.count);
+		i32 gi = ready[i];
+		ready[i] = ready[ready.count-1];
+		array_pop(&ready);
+
+		check_global_group(c, g, gi);
+		checked += 1;
+		for (i32 next : dependents[gi]) {
+			if (--dep_count[next] == 0) {
+				array_add(&ready, next);
+			}
+		}
+	}
+	GB_ASSERT(checked == group_count);
+}
+
+gb_internal void destroy_global_groups(GlobalGroupGraph *g) {
+	array_free(&g->nodes);
+	map_destroy(&g->node_of);
+	array_free(&g->offsets);
+	array_free(&g->targets);
+	array_free(&g->group_of);
+	array_free(&g->groups);
+	array_free(&g->members);
+}
+
+// -internal-global-entity-graph: the graph the groups come from, weighted by the measured self times
+gb_internal void print_global_groups(GlobalGroupGraph *g) {
+	u64 const freq = time_stamp__freq();
+	i32 group_count = cast(i32)g->groups.count;
+
+	auto ticks = array_make<u64>(heap_allocator(), group_count);
+	auto path  = array_make<u64>(heap_allocator(), group_count);
+	auto seen  = array_make<i32>(heap_allocator(), group_count);
+	defer (array_free(&ticks));
+	defer (array_free(&path));
+	defer (array_free(&seen));
+
+	u64   total   = 0;
+	i32   largest = 0;
+	isize cyclic  = 0;
+	mutex_lock(&global_entity_time_mutex);
+	for (i32 gi = 0; gi < group_count; gi++) {
+		GlobalGroup const &group = g->groups[gi];
+		ticks[gi] = 0;
+		seen[gi] = -1;
+		for (i32 k = 0; k < group.count; k++) {
+			GlobalEntityTime *t = map_get(&global_entity_times, g->nodes[g->members[group.start + k]]);
+			ticks[gi] += t ? t->ticks : 0;
+		}
+		total += ticks[gi];
+		largest = gb_max(largest, group.count);
+		cyclic += group.count > 1;
+	}
+	mutex_unlock(&global_entity_time_mutex);
+
+	u64 critical = 0;
+	for (i32 gi = 0; gi < group_count; gi++) {
+		GlobalGroup const &group = g->groups[gi];
+		u64 longest = 0;
+		for (i32 k = 0; k < group.count; k++) {
+			i32 v = g->members[group.start + k];
+			for (i32 i = g->offsets[v]; i < g->offsets[v+1]; i++) {
+				i32 dep = g->group_of[g->targets[i]];
+				if (dep != gi && seen[dep] != gi) {
+					seen[dep] = gi;
+					longest = gb_max(longest, path[dep]);
+				}
+			}
+		}
+		path[gi] = ticks[gi] + longest;
+		critical = gb_max(critical, path[gi]);
+	}
+
+	f64 total_ms = global_graph_ms(total, freq);
+	f64 critical_ms = global_graph_ms(critical, freq);
+	gb_printf_err("Global groups (syntactic graph, as scheduled)\n");
+	gb_printf_err("  nodes: %td, edges: %td, groups: %d (%td with a cycle), largest has %d entities\n",
+	              g->nodes.count, g->targets.count, group_count, cyclic, largest);
+	gb_printf_err("  critical path: %.3f ms of %.3f ms -> at most %.2fx speedup\n",
+	              critical_ms, total_ms, critical_ms > 0 ? total_ms/critical_ms : 0.0);
+	gb_printf_err("  missing edges: %td\n", g->missing_edges);
+}
+
+gb_internal void check_all_global_entities(Checker *c) {
+	in_single_threaded_checker_stage.store(true, std::memory_order_relaxed);
+
+	// NOTE(bill): the runtime types the checker looks up by name rather than through a declaration
+	init_preload(c);
+	{
+		u32 hash = 0;
+		InternedString name = string_interner_insert(str_lit("Load_Directory_File"), 0, &hash);
+		if (scope_lookup_current(c->info.runtime_package->scope, name, hash) != nullptr) {
+			init_core_load_directory_file(c);
+		}
+	}
+
+	TIME_SECTION("check all global entities - build groups");
+	GlobalGroupGraph *g = &global_groups;
+	build_global_groups(c, g);
+
+	TIME_SECTION("check all global entities - check groups");
+	g->active = true;
+	g->current_group = -1;
+	check_global_groups(c, g);
+	g->active = false;
+
+	if (build_context.internal_check_global_edges && g->missing_edges > 0) {
+		gb_printf_err("%td missing global dependencies\n", g->missing_edges);
+		gb_exit(1);
+	}
+
+	in_single_threaded_checker_stage.store(false, std::memory_order_relaxed);
+}
diff --git a/src/main.cpp b/src/main.cpp
index 5a3f4e3da..9d661bb16 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -535,6 +535,7 @@ enum BuildFlagKind {
 	BuildFlag_InternalEnableRVO,
 	BuildFlag_InternalGlobalEntityGraph,
 	BuildFlag_InternalShuffleGlobalEntities,
+	BuildFlag_InternalCheckGlobalEdges,
 
 	BuildFlag_Sanitize,
 	BuildFlag_LTO,
@@ -799,6 +800,7 @@ gb_internal bool parse_build_flags(Array<String> args) {
 	add_flag(&build_flags, BuildFlag_InternalEnableRVO,       str_lit("internal-enable-rvo"), BuildFlagParam_None, Command_all);
 	add_flag(&build_flags, BuildFlag_InternalGlobalEntityGraph, str_lit("internal-global-entity-graph"), BuildFlagParam_None, Command__does_check);
 	add_flag(&build_flags, BuildFlag_InternalShuffleGlobalEntities, str_lit("internal-shuffle-global-entities"), BuildFlagParam_Integer, Command__does_check);
+	add_flag(&build_flags, BuildFlag_InternalCheckGlobalEdges, str_lit("internal-check-global-edges"), BuildFlagParam_None, Command__does_check);
 
 
 	add_flag(&build_flags, BuildFlag_Sanitize,                str_lit("sanitize"),                  BuildFlagParam_String,  Command__does_build, true);
@@ -1855,6 +1857,9 @@ gb_internal bool parse_build_flags(Array<String> args) {
 							GB_ASSERT(value.kind == ExactValue_Integer);
 							build_context.internal_shuffle_global_entities = cast(u64)big_int_to_i64(&value.value_integer);
 							break;
+						case BuildFlag_InternalCheckGlobalEdges:
+							build_context.internal_check_global_edges = true;
+							break;
 
 
 						case BuildFlag_Sanitize:

From 8fe3b9b57bb28fcafd5e9a8b96c2f14b20fbe064 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Tue, 29 Sep 2026 02:50:32 -0400
Subject: [PATCH 126/215] Fix compound literals of array backed bit_fields

---
 src/llvm_backend_const.cpp         |  8 ++++----
 src/llvm_backend_expr.cpp          |  8 ++++----
 tests/internal/test_bit_field.odin | 16 ++++++++++++++++
 3 files changed, 24 insertions(+), 8 deletions(-)

diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index 7a53e3fb1..df674b913 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -801,14 +801,14 @@ gb_internal lbValue lb_const_value_bit_field(lbModule *m, Type *type, Ast *value
 				GB_ASSERT(mask_width > 0);
 				bits_to_set -= mask_width;
 
-				LLVMValueRef mask = lb_const_low_bits_mask(vt, mask_width);
+				LLVMValueRef mask = lb_const_low_bits_mask(lit, mask_width);
 
-				LLVMValueRef to_set = LLVMBuildAnd(m->const_dummy_builder, val, mask, "");
+				LLVMValueRef to_set = LLVMBuildIntCast2(m->const_dummy_builder, val, lit, false, "");
+				to_set = LLVMBuildAnd(m->const_dummy_builder, to_set, mask, "");
 
 				if (elem_bit_offset != 0) {
-					to_set = LLVMBuildShl(m->const_dummy_builder, to_set, LLVMConstInt(vt, elem_bit_offset, false), "");
+					to_set = LLVMBuildShl(m->const_dummy_builder, to_set, LLVMConstInt(lit, elem_bit_offset, false), "");
 				}
-				to_set = LLVMBuildTrunc(m->const_dummy_builder, to_set, lit, "");
 
 				if (LLVMIsNull(elems[elem_idx])) {
 					elems[elem_idx] = to_set; // don't even bother doing `0 | to_set`
diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index 0e90d8d74..f7096b795 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -6273,14 +6273,14 @@ gb_internal lbAddr lb_build_addr_compound_lit(lbProcedure *p, Ast *expr) {
 						GB_ASSERT(mask_width > 0);
 						bits_to_set -= mask_width;
 
-						LLVMValueRef mask = lb_const_low_bits_mask(vt, mask_width);
+						LLVMValueRef mask = lb_const_low_bits_mask(lit, mask_width);
 
-						LLVMValueRef to_set = LLVMBuildAnd(p->builder, val, mask, "");
+						LLVMValueRef to_set = LLVMBuildIntCast2(p->builder, val, lit, false, "");
+						to_set = LLVMBuildAnd(p->builder, to_set, mask, "");
 
 						if (elem_bit_offset != 0) {
-							to_set = LLVMBuildShl(p->builder, to_set, LLVMConstInt(vt, elem_bit_offset, false), "");
+							to_set = LLVMBuildShl(p->builder, to_set, LLVMConstInt(lit, elem_bit_offset, false), "");
 						}
-						to_set = LLVMBuildTrunc(p->builder, to_set, lit, "");
 
 						if (LLVMIsNull(elems[elem_idx])) {
 							elems[elem_idx] = to_set; // don't even bother doing `0 | to_set`
diff --git a/tests/internal/test_bit_field.odin b/tests/internal/test_bit_field.odin
index 71e77c3e0..a6fd3d363 100644
--- a/tests/internal/test_bit_field.odin
+++ b/tests/internal/test_bit_field.odin
@@ -196,3 +196,19 @@ bit_field_constant_field_access :: proc(t: ^testing.T) {
 	testing.expect_value(t, v.c, FULL.c)
 	testing.expect_value(t, v.d, FULL.d)
 }
+
+// a compound literal of an array backed bit_field used to generate invalid LLVM IR for a field set from
+// a variable and would lose the high bits of a field narrower than the array's elements
+@(test)
+bit_field_array_backed_compound_literal :: proc(t: ^testing.T) {
+	BF :: bit_field [2]u16 { a: u8 | 5, b: u8 | 5 }
+
+	v := u8(31)
+	x := BF{ b = v, a = 1 }
+	testing.expect_value(t, x.a, 1)
+	testing.expect_value(t, x.b, 31)
+
+	y := BF{ b = 31, a = 1 }
+	testing.expect_value(t, y.a, 1)
+	testing.expect_value(t, y.b, 31)
+}

From f7ee910f936f88d446d5454fa0075d69892dc2fb Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 17:40:27 +0100
Subject: [PATCH 127/215] Merge `checker_global_*.cpp` into
 `checker_global.cpp`; base `-internal-global-entity-graph` on the scheduled
 groups

---
 src/checker.cpp               |    5 +-
 src/checker.hpp               |    9 +
 src/checker_global.cpp        | 1570 +++++++++++++++++++++++++++++++++
 src/checker_global_graph.cpp  |  539 -----------
 src/checker_global_groups.cpp |  769 ----------------
 src/checker_global_when.cpp   |  474 ----------
 6 files changed, 1580 insertions(+), 1786 deletions(-)
 create mode 100644 src/checker_global.cpp
 delete mode 100644 src/checker_global_graph.cpp
 delete mode 100644 src/checker_global_groups.cpp
 delete mode 100644 src/checker_global_when.cpp

diff --git a/src/checker.cpp b/src/checker.cpp
index fa454f404..7acd8f3f8 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -4574,7 +4574,6 @@ gb_internal DECL_ATTRIBUTE_PROC(asm_decl_attribute) {
 	return false;
 }
 
-#include "checker_global_graph.cpp"
 #include "check_expr.cpp"
 #include "check_builtin.cpp"
 #include "check_type.cpp"
@@ -5339,7 +5338,6 @@ gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d)
 	check_entity_decl(ctx, e, d, nullptr);
 }
 
-#include "checker_global_groups.cpp"
 
 gb_internal bool is_string_an_identifier(String s) {
 	isize offset = 0;
@@ -5996,7 +5994,7 @@ gb_internal void check_export_entities(Checker *c) {
 	thread_pool_wait();
 }
 
-#include "checker_global_when.cpp"
+#include "checker_global.cpp"
 
 gb_internal void check_import_entities(Checker *c) {
 	TEMPORARY_ALLOCATOR_GUARD();
@@ -7477,7 +7475,6 @@ gb_internal void check_parsed_files(Checker *c) {
 
 	if (build_context.internal_global_entity_graph) {
 		TIME_SECTION("print global entity graph");
-		print_global_entity_graph(c);
 		print_global_groups(&global_groups);
 	}
 	destroy_global_groups(&global_groups);
diff --git a/src/checker.hpp b/src/checker.hpp
index 8eecdb6e4..05eed75ef 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -918,6 +918,15 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *c, Ast *decl);
 
 gb_internal void check_entity_decl(CheckerContext *c, Entity *e, DeclInfo *d, Type *named_type);
 gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e);
+
+// -internal-global-entity-graph
+struct GlobalEntityTimingFrame {
+	u64  start;
+	u64  saved_child_ticks;
+	bool active;
+};
+gb_internal GlobalEntityTimingFrame global_entity_timing_begin(Entity *e);
+gb_internal void global_entity_timing_end(GlobalEntityTimingFrame const &f, Entity *e);
 gb_internal void wait_for_lazy_entity(CheckerContext *c, Entity *e);
 gb_internal Ast *remove_type_alias_clutter(Ast *node);
 gb_internal void check_const_decl(CheckerContext *c, Entity *e, Ast *type_expr, Ast *init_expr, Type *named_type);
diff --git a/src/checker_global.cpp b/src/checker_global.cpp
new file mode 100644
index 000000000..cf9bb6e84
--- /dev/null
+++ b/src/checker_global.cpp
@@ -0,0 +1,1570 @@
+// Global declarations: 'when's and 'foreign' blocks resolved on demand in `check_import_entities`, then the
+// global entities checked in groups of a dependency graph, plus what `-internal-global-entity-graph` reports
+
+// Timing for -internal-global-entity-graph: the self time of each global entity, and the parts of
+// `check_import_entities`
+
+struct GlobalEntityTime {
+	u64  ticks;
+	bool in_global_loop;
+};
+
+enum GlobalImportStagePart {
+	GlobalImportStage_Imports,
+	GlobalImportStage_Placeholders,
+	GlobalImportStage_DeclSources,
+	GlobalImportStage_TypeAliases,
+	GlobalImportStage_DelayedExprs,
+
+	GlobalImportStage_COUNT,
+};
+
+gb_global char const *global_import_stage_names[GlobalImportStage_COUNT] = {
+	"imports",
+	"'when' and 'foreign' placeholders",
+	"resolve 'when' and 'foreign' blocks",
+	"type alias correction",
+	"delayed expressions (#assert etc.)",
+};
+
+gb_global u64 global_import_stage_ticks[GlobalImportStage_COUNT];
+
+gb_internal u64 global_import_stage_begin(void) {
+	return build_context.internal_global_entity_graph ? time_stamp_time_now() : 0;
+}
+
+gb_internal void global_import_stage_end(GlobalImportStagePart part, u64 start) {
+	if (build_context.internal_global_entity_graph) {
+		global_import_stage_ticks[part] += time_stamp_time_now() - start;
+	}
+}
+
+gb_global BlockingMutex global_entity_time_mutex;
+gb_global PtrMap<Entity *, GlobalEntityTime> global_entity_times;
+gb_thread_local u64 global_entity_child_ticks;
+
+gb_internal GlobalEntityTimingFrame global_entity_timing_begin(Entity *e) {
+	GlobalEntityTimingFrame f = {};
+	if (!build_context.internal_global_entity_graph) {
+		return f;
+	}
+	if (e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
+		return f;
+	}
+
+	f.saved_child_ticks = global_entity_child_ticks;
+	global_entity_child_ticks = 0;
+
+	f.active = true;
+	f.start = time_stamp_time_now();
+	return f;
+}
+
+gb_internal void global_entity_timing_end(GlobalEntityTimingFrame const &f, Entity *e) {
+	if (!f.active) {
+		return;
+	}
+	u64 total = time_stamp_time_now() - f.start;
+	u64 self  = total - gb_min(total, global_entity_child_ticks);
+	global_entity_child_ticks = f.saved_child_ticks + total;
+
+	bool in_global_loop = in_single_threaded_checker_stage.load(std::memory_order_relaxed);
+
+	MUTEX_GUARD(&global_entity_time_mutex);
+	GlobalEntityTime *found = map_get(&global_entity_times, e);
+	if (found) {
+		found->ticks += self;
+	} else {
+		map_set(&global_entity_times, e, GlobalEntityTime{self, in_global_loop});
+	}
+}
+
+
+// Global 'when's and 'foreign' blocks: every name one may declare is a placeholder in its scope, and the
+// first lookup of a placeholder resolves them, so the order of files and declarations does not matter
+
+struct GlobalDeclSource {
+	Ast *             node; // WhenStmt or ForeignBlockDecl
+	AstFile *         file;
+	GlobalDeclSource *parent;
+	bool              in_else; // within the else branch of `parent`
+	bool              reachable;
+	bool              reported_cycle;
+	EntityState       state;
+	ForeignContext    foreign_context; // of a resolved 'foreign' block
+};
+
+struct GlobalDeclSourceFrame {
+	GlobalDeclSource *source;
+	InternedString    needs; // the placeholder being resolved for it
+};
+
+gb_global Array<GlobalDeclSource *>    global_decl_sources;
+gb_global Array<GlobalDeclSourceFrame> global_decl_source_stack;
+gb_global Array<Scope *>               global_placeholder_scopes;
+gb_global CheckerContext               global_decl_source_export_ctx;
+gb_global UntypedExprInfoMap           global_decl_source_export_untyped;
+
+enum : u8 {
+	PlaceholderScope_File = 1<<0,
+	PlaceholderScope_Pkg  = 1<<1,
+};
+
+// -1 when 'private' has a value that is not a string literal
+gb_internal i32 syntactic_visibility(Array<Ast *> const &attributes) {
+	for (Ast *attr : attributes) {
+		if (attr->kind != Ast_Attribute) {
+			continue;
+		}
+		for (Ast *elem : attr->Attribute.elems) {
+			if (elem->kind == Ast_Ident && elem->Ident.token.string == "private") {
+				return EntityVisiblity_PrivateToPackage;
+			}
+			if (elem->kind == Ast_FieldValue &&
+			    elem->FieldValue.field->kind == Ast_Ident &&
+			    elem->FieldValue.field->Ident.token.string == "private") {
+				Ast *value = elem->FieldValue.value;
+				if (value != nullptr && value->tav.value.kind == ExactValue_String) {
+					return value->tav.value.value_string == "file" ? EntityVisiblity_PrivateToFile : EntityVisiblity_PrivateToPackage;
+				}
+				return -1;
+			}
+		}
+	}
+	return EntityVisiblity_Public;
+}
+
+gb_internal bool has_syntactic_attribute(Array<Ast *> const &attributes, String const &name) {
+	for (Ast *attr : attributes) {
+		if (attr->kind != Ast_Attribute) {
+			continue;
+		}
+		for (Ast *elem : attr->Attribute.elems) {
+			Ast *field = elem->kind == Ast_FieldValue ? elem->FieldValue.field : elem;
+			if (field->kind == Ast_Ident && field->Ident.token.string == name) {
+				return true;
+			}
+		}
+	}
+	return false;
+}
+
+gb_internal void add_placeholder(Scope *s, InternedString name, GlobalDeclSource *src) {
+	if (name.value == 0 || name.is_blank()) {
+		return;
+	}
+	if (s->placeholders == nullptr) {
+		s->placeholders = permanent_alloc_item<PtrMap<u64, GlobalDeclSource *>>();
+		map_init(s->placeholders);
+		array_add(&global_placeholder_scopes, s);
+	}
+	u64 key = name.value;
+	for (auto *e = multi_map_find_first(s->placeholders, key); e != nullptr; e = multi_map_find_next(s->placeholders, e)) {
+		if (e->value == src) {
+			return;
+		}
+	}
+	multi_map_insert(s->placeholders, key, src);
+}
+
+gb_internal void add_placeholders(AstFile *f, u8 scopes, InternedString name, GlobalDeclSource *src) {
+	if (scopes & PlaceholderScope_File) {
+		add_placeholder(f->scope, name, src);
+	}
+	if (scopes & PlaceholderScope_Pkg) {
+		add_placeholder(f->pkg->scope, name, src);
+	}
+}
+
+gb_internal GlobalDeclSource *add_global_decl_source(Ast *node, AstFile *f, GlobalDeclSource *parent, bool in_else) {
+	GlobalDeclSource *src = permanent_alloc_item<GlobalDeclSource>();
+	src->node      = node;
+	src->file      = f;
+	src->parent    = parent;
+	src->in_else   = in_else;
+	src->reachable = true;
+	src->state     = EntityState_Unresolved;
+	array_add(&global_decl_sources, src);
+	return src;
+}
+
+gb_internal void scan_global_decl_sources(AstFile *f, Slice<Ast *> const &stmts, GlobalDeclSource *owner, bool in_else, i32 foreign_visibility);
+
+gb_internal void scan_global_when_stmt(AstFile *f, Ast *node, GlobalDeclSource *parent, bool in_else, i32 foreign_visibility) {
+	ast_node(ws, WhenStmt, node);
+	GlobalDeclSource *src = add_global_decl_source(node, f, parent, in_else);
+	if (ws->body != nullptr && ws->body->kind == Ast_BlockStmt) {
+		scan_global_decl_sources(f, ws->body->BlockStmt.stmts, src, false, foreign_visibility);
+	}
+	if (ws->else_stmt != nullptr) {
+		switch (ws->else_stmt->kind) {
+		case Ast_BlockStmt:
+			scan_global_decl_sources(f, ws->else_stmt->BlockStmt.stmts, src, true, foreign_visibility);
+			break;
+		case Ast_WhenStmt:
+			scan_global_when_stmt(f, ws->else_stmt, src, true, foreign_visibility);
+			break;
+		}
+	}
+}
+
+gb_internal void scan_global_decl_sources(AstFile *f, Slice<Ast *> const &stmts, GlobalDeclSource *owner, bool in_else, i32 foreign_visibility) {
+	// NOTE(bill): `owner == nullptr` is the file scope itself, whose other declarations are already collected
+	for (Ast *decl : stmts) {
+		switch (decl->kind) {
+		case_ast_node(vd, ValueDecl, decl);
+			if (owner == nullptr) {
+				break;
+			}
+			i32 visibility = syntactic_visibility(vd->attributes);
+			if (visibility == EntityVisiblity_Public) {
+				visibility = foreign_visibility;
+			}
+			if (visibility == EntityVisiblity_Public && (f->flags & AstFile_IsPrivateFile)) {
+				visibility = EntityVisiblity_PrivateToFile;
+			}
+			u8 scopes = PlaceholderScope_Pkg;
+			if (visibility == EntityVisiblity_PrivateToFile) {
+				scopes = PlaceholderScope_File;
+			} else if (visibility < 0) {
+				scopes = PlaceholderScope_File|PlaceholderScope_Pkg;
+			}
+			for (Ast *name : vd->names) {
+				if (name->kind == Ast_Ident) {
+					add_placeholders(f, scopes, name->Ident.interned, owner);
+				}
+			}
+		case_end;
+
+		case_ast_node(fl, ForeignImportDecl, decl);
+			if (owner == nullptr) {
+				break;
+			}
+			String library_name = fl->library_name.string;
+			if (library_name.len == 0 && fl->fullpaths.count != 0) {
+				library_name = path_to_entity_name(fl->library_name.string, fl->fullpaths[0]);
+			}
+			if (library_name.len != 0) {
+				u8 scopes = has_syntactic_attribute(fl->attributes, str_lit("export")) ? PlaceholderScope_Pkg : PlaceholderScope_File;
+				add_placeholders(f, scopes, string_interner_insert(library_name), owner);
+			}
+		case_end;
+
+		case_ast_node(fb, ForeignBlockDecl, decl);
+			GlobalDeclSource *src = add_global_decl_source(decl, f, owner, in_else);
+			if (fb->body != nullptr && fb->body->kind == Ast_BlockStmt) {
+				scan_global_decl_sources(f, fb->body->BlockStmt.stmts, src, false, syntactic_visibility(fb->attributes));
+			}
+		case_end;
+
+		case_ast_node(ws, WhenStmt, decl);
+			scan_global_when_stmt(f, decl, owner, in_else, foreign_visibility);
+		case_end;
+
+		case_ast_node(es, ExprStmt, decl);
+			if (owner == nullptr && es->expr->kind == Ast_CallExpr &&
+			    es->expr->CallExpr.proc->kind == Ast_BasicDirective &&
+			    (decl->state_flags & StateFlag_BeenHandled) == 0) {
+				decl->state_flags |= StateFlag_BeenHandled;
+				array_add(&f->delayed_decls_queues[AstDelayQueue_Expr], es->expr);
+			}
+		case_end;
+		}
+	}
+}
+
+gb_internal bool is_global_decl_source_in_when(GlobalDeclSource *src) {
+	for (; src != nullptr; src = src->parent) {
+		if (src->node->kind == Ast_WhenStmt) {
+			return true;
+		}
+	}
+	return false;
+}
+
+gb_internal Slice<Ast *> global_decl_source_taken_stmts(GlobalDeclSource *src) {
+	if (src->node->kind == Ast_ForeignBlockDecl) {
+		Ast *body = src->node->ForeignBlockDecl.body;
+		if (body != nullptr && body->kind == Ast_BlockStmt) {
+			return body->BlockStmt.stmts;
+		}
+		return {};
+	}
+	ast_node(ws, WhenStmt, src->node);
+	if (ws->determined_cond) {
+		if (ws->body != nullptr && ws->body->kind == Ast_BlockStmt) {
+			return ws->body->BlockStmt.stmts;
+		}
+	} else if (ws->else_stmt != nullptr && ws->else_stmt->kind == Ast_BlockStmt) {
+		return ws->else_stmt->BlockStmt.stmts;
+	}
+	return {};
+}
+
+gb_internal void collect_global_decl_source_stmts(CheckerContext *ctx, Slice<Ast *> const &stmts) {
+	AstFile *f = ctx->file;
+	for (Ast *decl : stmts) {
+		if (decl->kind == Ast_ValueDecl) {
+			check_collect_value_decl(ctx, decl);
+		}
+	}
+	check_export_entities_in_pkg(&global_decl_source_export_ctx, f->pkg, &global_decl_source_export_untyped);
+
+	// NOTE(bill): after the value declarations, as their attributes are evaluated
+	for (Ast *decl : stmts) {
+		switch (decl->kind) {
+		case_ast_node(fl, ForeignImportDecl, decl);
+			check_add_foreign_import_decl(ctx, decl);
+		case_end;
+
+		case_ast_node(es, ExprStmt, decl);
+			if (es->expr->kind == Ast_CallExpr && es->expr->CallExpr.proc->kind == Ast_BasicDirective &&
+			    (decl->state_flags & StateFlag_BeenHandled) == 0) {
+				decl->state_flags |= StateFlag_BeenHandled;
+				array_add(&f->delayed_decls_queues[AstDelayQueue_Expr], es->expr);
+			}
+		case_end;
+		}
+	}
+}
+
+gb_internal Token global_decl_source_token(GlobalDeclSource *src) {
+	if (src->node->kind == Ast_WhenStmt) {
+		return src->node->WhenStmt.token;
+	}
+	return src->node->ForeignBlockDecl.token;
+}
+
+gb_internal void report_global_decl_source_cycle(GlobalDeclSource *src, InternedString needed) {
+	if (src->reported_cycle) {
+		return;
+	}
+	src->reported_cycle = true;
+
+	isize start = 0;
+	for (isize i = global_decl_source_stack.count-1; i >= 0; i--) {
+		if (global_decl_source_stack[i].source == src) {
+			start = i;
+			break;
+		}
+	}
+
+	ERROR_BLOCK();
+	Token token = global_decl_source_token(src);
+	error(token, "Cyclic dependency between global '%.*s' declarations", LIT(token.string));
+	for (isize i = start; i < global_decl_source_stack.count; i++) {
+		Token t = global_decl_source_token(global_decl_source_stack[i].source);
+		InternedString name = i+1 < global_decl_source_stack.count ? global_decl_source_stack[i].needs : needed;
+		error_line("\t'%.*s' at %s needs '%s', which may be declared by\n", LIT(t.string), token_pos_to_string(t.pos), name.cstring());
+	}
+	error_line("\t'%.*s' at %s\n", LIT(token.string), token_pos_to_string(token.pos));
+}
+
+gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedString needed) {
+	if (src->state == EntityState_Resolved) {
+		return;
+	}
+	if (src->state == EntityState_InProgress) {
+		report_global_decl_source_cycle(src, needed);
+		return;
+	}
+
+	GlobalDeclSource *foreign_block = nullptr;
+	if (src->parent != nullptr) {
+		GlobalDeclSource *parent = src->parent;
+		resolve_global_decl_source(parent, needed);
+		if (parent->state != EntityState_Resolved) {
+			return;
+		}
+		bool reachable = parent->reachable;
+		if (parent->node->kind == Ast_WhenStmt) {
+			reachable = reachable && parent->node->WhenStmt.determined_cond != src->in_else;
+		}
+		if (!reachable) {
+			src->reachable = false;
+			src->state = EntityState_Resolved;
+			return;
+		}
+		for (GlobalDeclSource *p = parent; p != nullptr; p = p->parent) {
+			if (p->node->kind == Ast_ForeignBlockDecl) {
+				foreign_block = p;
+				break;
+			}
+		}
+	}
+
+	src->state = EntityState_InProgress;
+	array_add(&global_decl_source_stack, GlobalDeclSourceFrame{src, {}});
+
+	CheckerContext ctx = {};
+	init_checker_context(&ctx, global_checker_ptr.load(std::memory_order_relaxed));
+	UntypedExprInfoMap untyped = {};
+	reset_checker_context(&ctx, src->file, &untyped);
+	if (foreign_block != nullptr) {
+		ctx.foreign_context = foreign_block->foreign_context;
+	}
+
+	if (src->node->kind == Ast_WhenStmt) {
+		ast_node(ws, WhenStmt, src->node);
+		Operand operand = {Addressing_Invalid};
+		check_expr(&ctx, &operand, ws->cond);
+		if (operand.mode != Addressing_Invalid && !is_type_boolean(operand.type)) {
+			error(ws->cond, "Non-boolean condition in 'when' statement");
+		}
+		if (operand.mode != Addressing_Constant) {
+			error(ws->cond, "Non-constant condition in 'when' statement");
+		}
+		ws->is_cond_determined = true;
+		ws->determined_cond = operand.value.kind == ExactValue_Bool && operand.value.value_bool;
+		if (ws->body == nullptr || ws->body->kind != Ast_BlockStmt) {
+			error(ws->cond, "Invalid body for 'when' statement");
+		} else if (ws->else_stmt != nullptr && ws->else_stmt->kind != Ast_BlockStmt && ws->else_stmt->kind != Ast_WhenStmt) {
+			error(ws->else_stmt, "Invalid 'else' statement in 'when' statement");
+		}
+	} else {
+		ast_node(fb, ForeignBlockDecl, src->node);
+		if (fb->foreign_library->kind == Ast_Ident) {
+			ctx.foreign_context.curr_library = fb->foreign_library;
+		} else {
+			error(fb->foreign_library, "Foreign block name must be an identifier or 'export'");
+			ctx.foreign_context.curr_library = nullptr;
+		}
+		check_decl_attributes(&ctx, fb->attributes, foreign_block_decl_attribute, nullptr);
+		src->foreign_context = ctx.foreign_context;
+	}
+
+	// NOTE: resolved before its declarations are collected, which evaluates the attributes of 'foreign import's
+	src->state = EntityState_Resolved;
+	array_pop(&global_decl_source_stack);
+
+	collect_global_decl_source_stmts(&ctx, global_decl_source_taken_stmts(src));
+
+	add_untyped_expressions(ctx.info, &untyped);
+	map_destroy(&untyped);
+	destroy_checker_context(&ctx);
+}
+
+gb_internal Entity *force_scope_placeholders(Scope *s, InternedString name, u32 hash) {
+	PtrMap<u64, GlobalDeclSource *> *m = s->placeholders;
+	bool forced = false;
+	for (auto *e = multi_map_find_first(m, cast(u64)name.value); e != nullptr; e = multi_map_find_next(m, e)) {
+		GlobalDeclSource *src = e->value;
+		if (src->state != EntityState_Resolved) {
+			if (global_decl_source_stack.count > 0) {
+				global_decl_source_stack[global_decl_source_stack.count-1].needs = name;
+			}
+			resolve_global_decl_source(src, name);
+			forced = true;
+		}
+	}
+	if (!forced) {
+		return nullptr;
+	}
+	rw_mutex_shared_lock(&s->mutex);
+	Entity *found = scope_map_get(&s->elements, name, hash);
+	rw_mutex_shared_unlock(&s->mutex);
+	return found;
+}
+
+gb_internal void check_vet_when_shadowing_entity(Entity *e) {
+	if (e == nullptr || e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
+		return;
+	}
+	InternedString name = entity_interned_name(e);
+	u32 hash = e->interned_name_hash.load(std::memory_order_relaxed);
+	Scope *outer = e->scope->parent;
+	if (scope_map_get(&e->scope->elements, name, hash) != e) {
+		outer = outer->parent; // in the package scope
+	}
+	if (outer == nullptr) {
+		return;
+	}
+	Entity *shadowed = scope_lookup(outer, name, hash);
+	if (shadowed == nullptr || shadowed == e) {
+		return;
+	}
+	if (shadowed->scope == builtin_pkg->scope) {
+		error(e->token, "Declaration of '%.*s' within a global 'when' shadows the builtin '%.*s'", LIT(e->token.string), LIT(e->token.string));
+	} else {
+		error(e->token, "Declaration of '%.*s' within a global 'when' shadows the declaration at %s", LIT(e->token.string), token_pos_to_string(shadowed->token.pos));
+	}
+}
+
+gb_internal void check_vet_when_shadowing(void) {
+	for (GlobalDeclSource *src : global_decl_sources) {
+		if (!src->reachable || src->state != EntityState_Resolved) {
+			continue;
+		}
+		if ((ast_file_vet_flags(src->file) & VetFlag_WhenShadowing) == 0 || !is_global_decl_source_in_when(src)) {
+			continue;
+		}
+		for (Ast *decl : global_decl_source_taken_stmts(src)) {
+			if (decl->kind == Ast_ValueDecl) {
+				for (Ast *name : decl->ValueDecl.names) {
+					if (name->kind == Ast_Ident) {
+						check_vet_when_shadowing_entity(name->Ident.entity.load());
+					}
+				}
+			} else if (decl->kind == Ast_ForeignImportDecl) {
+				Token token = decl->ForeignImportDecl.library_name;
+				InternedString name = string_interner_insert(token.string);
+				for (Scope *s = src->file->scope; s != nullptr && s != builtin_pkg->scope; s = s->parent) {
+					Entity *e = scope_map_get(&s->elements, name, name.hash());
+					if (e != nullptr && e->kind == Entity_LibraryName && e->LibraryName.decl == decl) {
+						check_vet_when_shadowing_entity(e);
+						break;
+					}
+				}
+			}
+		}
+	}
+}
+
+// Placeholders for every file, then every source resolved in package, file and source order, which
+// only matters for which errors are reported
+gb_internal void resolve_global_decl_sources(Checker *c, Array<ImportGraphNode *> const &package_order) {
+	array_init(&global_decl_sources,       heap_allocator());
+	array_init(&global_decl_source_stack,  heap_allocator());
+	array_init(&global_placeholder_scopes, heap_allocator());
+	init_checker_context(&global_decl_source_export_ctx, c);
+	defer (destroy_checker_context(&global_decl_source_export_ctx));
+
+	u64 stage_start = global_import_stage_begin();
+	for (ImportGraphNode *node : package_order) {
+		for (AstFile *f : node->pkg->files) {
+			scan_global_decl_sources(f, f->decls, nullptr, false, EntityVisiblity_Public);
+		}
+	}
+	global_import_stage_end(GlobalImportStage_Placeholders, stage_start);
+
+	stage_start = global_import_stage_begin();
+	for (GlobalDeclSource *src : global_decl_sources) {
+		resolve_global_decl_source(src, {});
+	}
+	GB_ASSERT(global_decl_source_stack.count == 0);
+
+	for (Scope *s : global_placeholder_scopes) {
+		map_destroy(s->placeholders);
+		s->placeholders = nullptr;
+	}
+	array_clear(&global_placeholder_scopes);
+
+	check_vet_when_shadowing();
+	global_import_stage_end(GlobalImportStage_DeclSources, stage_start);
+
+	map_destroy(&global_decl_source_export_untyped);
+}
+
+
+// Global entities are checked in groups: the strongly connected components of a dependency graph built
+// from syntax, in dependency order. A group only names entities of its own or of finished groups, which
+// `-internal-check-global-edges` verifies
+
+// Iterative Tarjan; components are numbered so that every edge v->w has comp(w) <= comp(v)
+gb_internal i32 global_graph_scc(i32 node_count, Array<i32> const &offsets, Array<i32> const &targets, Array<i32> *comp_of_) {
+	struct Frame {
+		i32 v;
+		i32 pos;
+	};
+
+	auto index    = array_make<i32>(heap_allocator(), node_count);
+	auto low      = array_make<i32>(heap_allocator(), node_count);
+	auto on_stack = array_make<bool>(heap_allocator(), node_count);
+	auto stack    = array_make<i32>(heap_allocator(), 0, node_count);
+	auto frames   = array_make<Frame>(heap_allocator(), 0, 64);
+	defer (array_free(&index));
+	defer (array_free(&low));
+	defer (array_free(&on_stack));
+	defer (array_free(&stack));
+	defer (array_free(&frames));
+
+	Array<i32> &comp_of = *comp_of_;
+	for (i32 v = 0; v < node_count; v++) {
+		index[v]    = -1;
+		low[v]      = 0;
+		on_stack[v] = false;
+		comp_of[v]  = -1;
+	}
+
+	i32 counter = 0;
+	i32 comp_count = 0;
+	for (i32 root = 0; root < node_count; root++) {
+		if (index[root] >= 0) {
+			continue;
+		}
+		index[root] = low[root] = counter++;
+		array_add(&stack, root);
+		on_stack[root] = true;
+		array_add(&frames, Frame{root, 0});
+
+		while (frames.count > 0) {
+			Frame *top = &frames[frames.count-1];
+			i32 v = top->v;
+			if (offsets[v] + top->pos < offsets[v+1]) {
+				i32 w = targets[offsets[v] + top->pos];
+				top->pos += 1;
+				if (index[w] < 0) {
+					index[w] = low[w] = counter++;
+					array_add(&stack, w);
+					on_stack[w] = true;
+					array_add(&frames, Frame{w, 0});
+				} else if (on_stack[w]) {
+					low[v] = gb_min(low[v], index[w]);
+				}
+				continue;
+			}
+
+			if (low[v] == index[v]) {
+				for (;;) {
+					i32 w = array_pop(&stack);
+					on_stack[w] = false;
+					comp_of[w] = comp_count;
+					if (w == v) {
+						break;
+					}
+				}
+				comp_count += 1;
+			}
+			array_pop(&frames);
+			if (frames.count > 0) {
+				i32 u = frames[frames.count-1].v;
+				low[u] = gb_min(low[u], low[v]);
+			}
+		}
+	}
+	return comp_count;
+}
+
+gb_internal void global_graph_print_entity(Entity *e) {
+	if (e == nullptr) {
+		gb_printf_err("?");
+		return;
+	}
+	String pkg  = e->pkg  ? e->pkg->name : str_lit("?");
+	String file = e->file ? filename_without_directory(e->file->fullpath) : str_lit("?");
+	gb_printf_err("%.*s.%.*s (%.*s:%d)", LIT(pkg), LIT(e->token.string), LIT(file), e->token.pos.line);
+}
+
+
+
+
+struct GlobalGroup {
+	i32  start; // into `GlobalGroupGraph::members`
+	i32  count;
+	bool done;
+};
+
+struct GlobalGroupGraph {
+	Array<Entity *>       nodes;
+	PtrMap<Entity *, i32> node_of;
+	Array<i32>            offsets; // node -> the nodes it names, as `targets[offsets[v]..offsets[v+1]]`
+	Array<i32>            targets;
+	Array<i32>            group_of;
+	Array<GlobalGroup>    groups;  // every dependency of a group has a lower index
+	Array<i32>            members; // nodes, by group, in source order
+
+	bool   active;
+	i32    current_group;
+	Entity *current_entity;
+	isize  missing_edges;
+};
+
+gb_global GlobalGroupGraph global_groups;
+
+struct GlobalGraphWalk {
+	Scope *scope;
+	Array<Entity *> *refs;
+};
+
+gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node);
+
+gb_internal void global_graph_walk_slice(GlobalGraphWalk *w, Slice<Ast *> const &nodes) {
+	for (Ast *node : nodes) {
+		global_graph_walk(w, node);
+	}
+}
+
+gb_internal void global_graph_add_ref(GlobalGraphWalk *w, Entity *e) {
+	if (e != nullptr) {
+		array_add(w->refs, e);
+	}
+}
+
+// NOTE: names bound within the expression (parameters, fields, '$T') are also looked up globally, which at
+// worst adds an edge; only procedure bodies are skipped, as they are checked after this stage
+gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node) {
+	if (node == nullptr) {
+		return;
+	}
+	switch (node->kind) {
+	case Ast_Ident:
+		global_graph_add_ref(w, scope_lookup(w->scope, node->Ident.interned, node->Ident.hash));
+		break;
+
+	case Ast_SelectorExpr: {
+		Ast *expr     = node->SelectorExpr.expr;
+		Ast *selector = node->SelectorExpr.selector;
+		if (expr != nullptr && expr->kind == Ast_Ident) {
+			Entity *e = scope_lookup(w->scope, expr->Ident.interned, expr->Ident.hash);
+			if (e != nullptr && e->kind == Entity_ImportName && selector != nullptr && selector->kind == Ast_Ident) {
+				global_graph_add_ref(w, scope_lookup_current(e->ImportName.scope, selector->Ident.interned, selector->Ident.hash));
+			} else {
+				global_graph_add_ref(w, e);
+			}
+		} else {
+			global_graph_walk(w, expr);
+		}
+	} break;
+
+	case Ast_PolyType:
+		global_graph_walk(w, node->PolyType.specialization);
+		break;
+	case Ast_Ellipsis:
+		global_graph_walk(w, node->Ellipsis.expr);
+		break;
+	case Ast_ProcGroup:
+		global_graph_walk_slice(w, node->ProcGroup.args);
+		break;
+	case Ast_AsmGroup:
+		global_graph_walk_slice(w, node->AsmGroup.args);
+		break;
+	case Ast_ProcLit:
+		global_graph_walk(w, node->ProcLit.type);
+		global_graph_walk_slice(w, node->ProcLit.where_clauses);
+		break;
+	case Ast_CompoundLit:
+		global_graph_walk(w, node->CompoundLit.type);
+		global_graph_walk_slice(w, node->CompoundLit.elems);
+		global_graph_walk(w, node->CompoundLit.tag);
+		break;
+	case Ast_TagExpr:
+		global_graph_walk(w, node->TagExpr.expr);
+		break;
+	case Ast_UnaryExpr:
+		global_graph_walk(w, node->UnaryExpr.expr);
+		break;
+	case Ast_BinaryExpr:
+		global_graph_walk(w, node->BinaryExpr.left);
+		global_graph_walk(w, node->BinaryExpr.right);
+		break;
+	case Ast_ParenExpr:
+		global_graph_walk(w, node->ParenExpr.expr);
+		break;
+	case Ast_SelectorCallExpr:
+		global_graph_walk(w, node->SelectorCallExpr.expr);
+		global_graph_walk(w, node->SelectorCallExpr.call);
+		break;
+	case Ast_IndexExpr:
+		global_graph_walk(w, node->IndexExpr.expr);
+		global_graph_walk(w, node->IndexExpr.index);
+		break;
+	case Ast_MatrixIndexExpr:
+		global_graph_walk(w, node->MatrixIndexExpr.expr);
+		global_graph_walk(w, node->MatrixIndexExpr.row_index);
+		global_graph_walk(w, node->MatrixIndexExpr.column_index);
+		break;
+	case Ast_DerefExpr:
+		global_graph_walk(w, node->DerefExpr.expr);
+		break;
+	case Ast_SliceExpr:
+		global_graph_walk(w, node->SliceExpr.expr);
+		global_graph_walk(w, node->SliceExpr.low);
+		global_graph_walk(w, node->SliceExpr.high);
+		break;
+	case Ast_CallExpr:
+		global_graph_walk(w, node->CallExpr.proc);
+		global_graph_walk_slice(w, node->CallExpr.args);
+		break;
+	case Ast_FieldValue:
+		global_graph_walk(w, node->FieldValue.field);
+		global_graph_walk(w, node->FieldValue.value);
+		break;
+	case Ast_EnumFieldValue:
+		global_graph_walk(w, node->EnumFieldValue.value);
+		break;
+	case Ast_TernaryIfExpr:
+		global_graph_walk(w, node->TernaryIfExpr.x);
+		global_graph_walk(w, node->TernaryIfExpr.cond);
+		global_graph_walk(w, node->TernaryIfExpr.y);
+		break;
+	case Ast_TernaryWhenExpr:
+		global_graph_walk(w, node->TernaryWhenExpr.x);
+		global_graph_walk(w, node->TernaryWhenExpr.cond);
+		global_graph_walk(w, node->TernaryWhenExpr.y);
+		break;
+	case Ast_OrElseExpr:
+		global_graph_walk(w, node->OrElseExpr.x);
+		global_graph_walk(w, node->OrElseExpr.y);
+		break;
+	case Ast_OrReturnExpr:
+		global_graph_walk(w, node->OrReturnExpr.expr);
+		break;
+	case Ast_OrBranchExpr:
+		global_graph_walk(w, node->OrBranchExpr.expr);
+		break;
+	case Ast_TypeAssertion:
+		global_graph_walk(w, node->TypeAssertion.expr);
+		global_graph_walk(w, node->TypeAssertion.type);
+		break;
+	case Ast_TypeCast:
+		global_graph_walk(w, node->TypeCast.type);
+		global_graph_walk(w, node->TypeCast.expr);
+		break;
+	case Ast_AutoCast:
+		global_graph_walk(w, node->AutoCast.expr);
+		break;
+
+	case Ast_Field:
+		global_graph_walk(w, node->Field.type);
+		global_graph_walk(w, node->Field.default_value);
+		break;
+	case Ast_BitFieldField:
+		global_graph_walk(w, node->BitFieldField.type);
+		global_graph_walk(w, node->BitFieldField.bit_size);
+		break;
+	case Ast_FieldList:
+		global_graph_walk_slice(w, node->FieldList.list);
+		break;
+
+	case Ast_TypeidType:
+		global_graph_walk(w, node->TypeidType.specialization);
+		break;
+	case Ast_HelperType:
+		global_graph_walk(w, node->HelperType.type);
+		break;
+	case Ast_DistinctType:
+		global_graph_walk(w, node->DistinctType.type);
+		break;
+	case Ast_ProcType:
+		global_graph_walk(w, node->ProcType.params);
+		global_graph_walk(w, node->ProcType.results);
+		break;
+	case Ast_RelativeType:
+		global_graph_walk(w, node->RelativeType.tag);
+		global_graph_walk(w, node->RelativeType.type);
+		break;
+	case Ast_PointerType:
+		global_graph_walk(w, node->PointerType.type);
+		global_graph_walk(w, node->PointerType.tag);
+		break;
+	case Ast_MultiPointerType:
+		global_graph_walk(w, node->MultiPointerType.type);
+		break;
+	case Ast_ArrayType:
+		global_graph_walk(w, node->ArrayType.count);
+		global_graph_walk(w, node->ArrayType.elem);
+		global_graph_walk(w, node->ArrayType.tag);
+		break;
+	case Ast_DynamicArrayType:
+		global_graph_walk(w, node->DynamicArrayType.elem);
+		global_graph_walk(w, node->DynamicArrayType.tag);
+		break;
+	case Ast_FixedCapacityDynamicArrayType:
+		global_graph_walk(w, node->FixedCapacityDynamicArrayType.elem);
+		global_graph_walk(w, node->FixedCapacityDynamicArrayType.capacity);
+		global_graph_walk(w, node->FixedCapacityDynamicArrayType.tag);
+		break;
+	case Ast_StructType:
+		global_graph_walk_slice(w, node->StructType.fields);
+		global_graph_walk(w, node->StructType.polymorphic_params);
+		global_graph_walk(w, node->StructType.align);
+		global_graph_walk(w, node->StructType.min_field_align);
+		global_graph_walk(w, node->StructType.max_field_align);
+		global_graph_walk_slice(w, node->StructType.where_clauses);
+		break;
+	case Ast_UnionType:
+		global_graph_walk_slice(w, node->UnionType.variants);
+		global_graph_walk(w, node->UnionType.polymorphic_params);
+		global_graph_walk_slice(w, node->UnionType.where_clauses);
+		break;
+	case Ast_EnumType:
+		global_graph_walk(w, node->EnumType.base_type);
+		for (Ast *field : node->EnumType.fields) {
+			if (field->kind == Ast_EnumFieldValue) {
+				global_graph_walk(w, field->EnumFieldValue.value);
+			}
+		}
+		break;
+	case Ast_BitSetType:
+		global_graph_walk(w, node->BitSetType.elem);
+		global_graph_walk(w, node->BitSetType.underlying);
+		break;
+	case Ast_BitFieldType:
+		global_graph_walk(w, node->BitFieldType.backing_type);
+		global_graph_walk_slice(w, node->BitFieldType.fields);
+		break;
+	case Ast_MapType:
+		global_graph_walk(w, node->MapType.count);
+		global_graph_walk(w, node->MapType.key);
+		global_graph_walk(w, node->MapType.value);
+		break;
+	case Ast_MatrixType:
+		global_graph_walk(w, node->MatrixType.row_count);
+		global_graph_walk(w, node->MatrixType.column_count);
+		global_graph_walk(w, node->MatrixType.elem);
+		break;
+
+	case Ast_AsmTemplate:
+		global_graph_walk(w, node->AsmTemplate.signature);
+		global_graph_walk_slice(w, node->AsmTemplate.specs);
+		global_graph_walk_slice(w, node->AsmTemplate.clobbers);
+		global_graph_walk_slice(w, node->AsmTemplate.instructions);
+		break;
+	case Ast_AsmSpec:
+		global_graph_walk(w, node->AsmSpec.type);
+		global_graph_walk(w, node->AsmSpec.value);
+		for (Ast *d : node->AsmSpec.directives) {
+			global_graph_walk(w, d);
+		}
+		break;
+	case Ast_AsmClobber:
+		global_graph_walk(w, node->AsmClobber.value);
+		break;
+	case Ast_AsmInstruction:
+		global_graph_walk_slice(w, node->AsmInstruction.operands);
+		break;
+	case Ast_AsmMemoryTerm:
+		global_graph_walk(w, node->AsmMemoryTerm.operand);
+		global_graph_walk(w, node->AsmMemoryTerm.scale);
+		break;
+	case Ast_AsmMemoryOperand:
+		global_graph_walk(w, node->AsmMemoryOperand.segment_override);
+		global_graph_walk_slice(w, node->AsmMemoryOperand.terms);
+		global_graph_walk(w, node->AsmMemoryOperand.type);
+		break;
+	case Ast_AsmRegisterGroup:
+		for (Ast *r : node->AsmRegisterGroup.registers) {
+			global_graph_walk(w, r);
+		}
+		global_graph_walk(w, node->AsmRegisterGroup.type);
+		break;
+	case Ast_AsmDirective:
+		global_graph_walk_slice(w, node->AsmDirective.operands);
+		break;
+	}
+}
+
+gb_internal void global_graph_walk_entity(GlobalGraphWalk *w, Entity *e, DeclInfo *d) {
+	w->scope = d->scope;
+	global_graph_walk(w, d->type_expr);
+	global_graph_walk(w, d->init_expr);
+	for (Ast *attr : d->attributes) {
+		if (attr->kind != Ast_Attribute) {
+			continue;
+		}
+		for (Ast *elem : attr->Attribute.elems) {
+			if (elem->kind == Ast_FieldValue) {
+				global_graph_walk(w, elem->FieldValue.value);
+			}
+		}
+	}
+	if (e->kind == Entity_Procedure) {
+		global_graph_walk(w, e->Procedure.foreign_library_ident);
+	} else if (e->kind == Entity_Variable) {
+		global_graph_walk(w, e->Variable.foreign_library_ident);
+	}
+}
+
+gb_internal bool is_global_graph_node(Entity *e) {
+	if (e->state == EntityState_Resolved) {
+		return false;
+	}
+	DeclInfo *d = e->decl_info;
+	if (d == nullptr || e->scope == nullptr || d->scope != e->scope || (e->scope->flags & ScopeFlag_File) == 0) {
+		return false;
+	}
+	switch (e->kind) {
+	case Entity_Constant:
+	case Entity_TypeName:
+	case Entity_Variable:
+	case Entity_Procedure:
+	case Entity_ProcGroup:
+	case Entity_AsmTemplate:
+		return true;
+	}
+	return false;
+}
+
+gb_internal i32 global_graph_add_node(GlobalGroupGraph *g, Entity *e) {
+	i32 *found = map_get(&g->node_of, e);
+	if (found != nullptr) {
+		return *found;
+	}
+	i32 v = cast(i32)g->nodes.count;
+	map_set(&g->node_of, e, v);
+	array_add(&g->nodes, e);
+	return v;
+}
+
+gb_internal u64 global_group_random(u64 *state) {
+	*state = *state*6364136223846793005ull + 1442695040888963407ull;
+	return *state >> 33;
+}
+
+// The nodes `[lo, hi)` walked on one thread; a name that is not a node yet is kept as an entity in `refs`
+struct GlobalGraphWalkChunk {
+	GlobalGroupGraph *g;
+	i32             lo;
+	i32             hi;
+	Array<i32>      targets;
+	Array<i32>      target_ends; // per node
+	Array<Entity *> refs;
+	Array<i32>      ref_ends;    // per node
+};
+
+gb_internal WORKER_TASK_PROC(global_graph_walk_worker) {
+	GlobalGraphWalkChunk *chunk = cast(GlobalGraphWalkChunk *)data;
+	GlobalGroupGraph *g = chunk->g;
+
+	auto refs = array_make<Entity *>(heap_allocator(), 0, 64);
+	defer (array_free(&refs));
+	GlobalGraphWalk w = {};
+	w.refs = &refs;
+	for (i32 v = chunk->lo; v < chunk->hi; v++) {
+		Entity *e = g->nodes[v];
+		array_clear(&refs);
+		global_graph_walk_entity(&w, e, e->decl_info);
+		for (Entity *r : refs) {
+			i32 *found = map_get(&g->node_of, r);
+			if (found != nullptr) {
+				array_add(&chunk->targets, *found);
+			} else if (r->flags & EntityFlag_Lazy) {
+				array_add(&chunk->refs, r);
+			}
+		}
+		array_add(&chunk->target_ends, cast(i32)chunk->targets.count);
+		array_add(&chunk->ref_ends,    cast(i32)chunk->refs.count);
+	}
+	return 0;
+}
+
+gb_internal void build_global_groups(Checker *c, GlobalGroupGraph *g) {
+	array_init(&g->nodes, heap_allocator(), 0, c->info.entities.count);
+	map_init(&g->node_of, c->info.entities.count);
+	for (Entity *e : c->info.entities) {
+		if ((e->flags & EntityFlag_Lazy) == 0 && is_global_graph_node(e)) {
+			global_graph_add_node(g, e);
+		}
+	}
+
+	// NOTE: walked in parallel, as nothing writes to the scopes now
+	i32 const CHUNK_SIZE = 64;
+	i32 initial_count = cast(i32)g->nodes.count;
+	auto chunks = array_make<GlobalGraphWalkChunk>(heap_allocator(), (initial_count + CHUNK_SIZE-1)/CHUNK_SIZE);
+	defer (array_free(&chunks));
+	for (isize i = 0; i < chunks.count; i++) {
+		GlobalGraphWalkChunk *chunk = &chunks[i];
+		*chunk = {};
+		chunk->g  = g;
+		chunk->lo = cast(i32)(i*CHUNK_SIZE);
+		chunk->hi = gb_min(chunk->lo + CHUNK_SIZE, initial_count);
+		array_init(&chunk->targets,     heap_allocator(), 0, 4*CHUNK_SIZE);
+		array_init(&chunk->target_ends, heap_allocator(), 0, CHUNK_SIZE);
+		array_init(&chunk->refs,        heap_allocator(), 0);
+		array_init(&chunk->ref_ends,    heap_allocator(), 0, CHUNK_SIZE);
+		thread_pool_add_task(global_graph_walk_worker, chunk);
+	}
+	thread_pool_wait();
+
+	auto edge_from = array_make<i32>(heap_allocator(), 0, 4*g->nodes.count);
+	auto edge_to   = array_make<i32>(heap_allocator(), 0, 4*g->nodes.count);
+	auto refs      = array_make<Entity *>(heap_allocator(), 0, 64);
+	defer (array_free(&edge_from));
+	defer (array_free(&edge_to));
+	defer (array_free(&refs));
+
+	auto add_ref = [&](i32 v, Entity *r) {
+		i32 *found = map_get(&g->node_of, r);
+		if (found != nullptr) {
+			array_add(&edge_from, v);
+			array_add(&edge_to, *found);
+		} else if ((r->flags & EntityFlag_Lazy) && is_global_graph_node(r)) {
+			// NOTE: a lazy entity becomes a node once a node names it
+			array_add(&edge_from, v);
+			array_add(&edge_to, global_graph_add_node(g, r));
+		}
+	};
+
+	GlobalGraphWalk w = {};
+	w.refs = &refs;
+	i32 first_of_decl = -1;
+	for (i32 v = 0; v < g->nodes.count; v++) {
+		Entity *e = g->nodes[v];
+		DeclInfo *d = e->decl_info;
+
+		// NOTE: entities sharing one declaration share its AST, e.g. `a, b: struct{x: int}`, so they share a group;
+		// in source order they are adjacent, and lazy ones are only checked under `lazy_mutex`
+		if (first_of_decl >= 0 && d->decl_node != nullptr && g->nodes[first_of_decl]->decl_info->decl_node == d->decl_node) {
+			array_add(&edge_from, v);
+			array_add(&edge_to,   first_of_decl);
+			array_add(&edge_from, first_of_decl);
+			array_add(&edge_to,   v);
+		} else {
+			first_of_decl = v;
+		}
+
+		if (v < initial_count) {
+			GlobalGraphWalkChunk *chunk = &chunks[v / CHUNK_SIZE];
+			i32 k = v - chunk->lo;
+			for (i32 i = k > 0 ? chunk->target_ends[k-1] : 0; i < chunk->target_ends[k]; i++) {
+				array_add(&edge_from, v);
+				array_add(&edge_to, chunk->targets[i]);
+			}
+			for (i32 i = k > 0 ? chunk->ref_ends[k-1] : 0; i < chunk->ref_ends[k]; i++) {
+				add_ref(v, chunk->refs[i]);
+			}
+		} else {
+			array_clear(&refs);
+			global_graph_walk_entity(&w, e, d);
+			for (Entity *r : refs) {
+				add_ref(v, r);
+			}
+		}
+	}
+	for (GlobalGraphWalkChunk &chunk : chunks) {
+		array_free(&chunk.targets);
+		array_free(&chunk.target_ends);
+		array_free(&chunk.refs);
+		array_free(&chunk.ref_ends);
+	}
+
+	i32 node_count = cast(i32)g->nodes.count;
+	array_init(&g->offsets, heap_allocator(), node_count+1);
+	array_init(&g->targets, heap_allocator(), edge_to.count);
+	for (i32 v = 0; v <= node_count; v++) {
+		g->offsets[v] = 0;
+	}
+	for (i32 from : edge_from) {
+		g->offsets[from+1] += 1;
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		g->offsets[v+1] += g->offsets[v];
+	}
+	{
+		auto fill = array_clone(heap_allocator(), g->offsets);
+		defer (array_free(&fill));
+		for (isize i = 0; i < edge_from.count; i++) {
+			g->targets[fill[edge_from[i]]++] = edge_to[i];
+		}
+	}
+
+	array_init(&g->group_of, heap_allocator(), node_count);
+	i32 group_count = global_graph_scc(node_count, g->offsets, g->targets, &g->group_of);
+
+	array_init(&g->groups,  heap_allocator(), group_count);
+	array_init(&g->members, heap_allocator(), node_count);
+	for (i32 gi = 0; gi < group_count; gi++) {
+		g->groups[gi] = {};
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		g->groups[g->group_of[v]].count += 1;
+	}
+	i32 start = 0;
+	for (i32 gi = 0; gi < group_count; gi++) {
+		g->groups[gi].start = start;
+		start += g->groups[gi].count;
+		g->groups[gi].count = 0;
+	}
+	// NOTE: in source order, as `c->info.entities` is sorted; lazy nodes come last, but are not checked here
+	for (i32 v = 0; v < node_count; v++) {
+		GlobalGroup *group = &g->groups[g->group_of[v]];
+		g->members[group->start + group->count++] = v;
+	}
+}
+
+// Called when `e` starts being checked: it must be in the current group or a finished one
+gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e) {
+	GlobalGroupGraph *g = &global_groups;
+	if (!g->active) {
+		return;
+	}
+	i32 *v = map_get(&g->node_of, e);
+	if (v == nullptr) {
+		if (!is_global_graph_node(e)) {
+			return;
+		}
+	} else {
+		i32 gi = g->group_of[*v];
+		if (gi == g->current_group || g->groups[gi].done) {
+			return;
+		}
+	}
+
+	g->missing_edges += 1;
+	if (build_context.internal_check_global_edges) {
+		Entity *by = ctx->decl ? ctx->decl->entity.load() : nullptr;
+		gb_printf_err("Missing global dependency: ");
+		global_graph_print_entity(by);
+		gb_printf_err(" needs ");
+		global_graph_print_entity(e);
+		gb_printf_err(v == nullptr ? ", which is not in the graph" : "");
+		if (g->current_entity != by) {
+			gb_printf_err(", while checking ");
+			global_graph_print_entity(g->current_entity);
+		}
+		gb_printf_err("\n");
+	}
+}
+
+// NOTE: members in a fixed order, as which member of a cycle is entered first can decide whether it checks,
+// e.g. an enum whose values are `union_variant_index`es of a union with pointers back to it
+gb_internal void check_global_group(Checker *c, GlobalGroupGraph *g, i32 gi) {
+	GlobalGroup *group = &g->groups[gi];
+	i32 *members = g->members.data + group->start;
+
+	g->current_group = gi;
+	for (i32 k = 0; k < group->count; k++) {
+		Entity *e = g->nodes[members[k]];
+		if (e->flags & EntityFlag_Lazy) {
+			// NOTE: only checked when something uses it; the group orders it after what it names
+			continue;
+		}
+		g->current_entity = e;
+		GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
+		check_single_global_entity(c, e, e->decl_info);
+		if (e->type != nullptr && is_type_typed(e->type)) {
+			for (Type *t = nullptr; mpsc_dequeue(&c->soa_types_to_complete, &t); /**/) {
+				complete_soa_type(c, t, false);
+			}
+
+			(void)type_size_of(e->type);
+			(void)type_align_of(e->type);
+		}
+		global_entity_timing_end(timing_frame, e);
+	}
+	group->done = true;
+	g->current_group = -1;
+	g->current_entity = nullptr;
+}
+
+// Groups in dependency order; with `-internal-shuffle-global-entities`, a random one of the groups whose
+// dependencies are done, as a parallel checker might
+gb_internal void check_global_groups(Checker *c, GlobalGroupGraph *g) {
+	i32 group_count = cast(i32)g->groups.count;
+	u64 seed = build_context.internal_shuffle_global_entities;
+	if (seed == 0) {
+		for (i32 gi = 0; gi < group_count; gi++) {
+			check_global_group(c, g, gi);
+		}
+		return;
+	}
+
+	auto dependents = array_make<Array<i32> >(heap_allocator(), group_count);
+	auto dep_count  = array_make<i32>        (heap_allocator(), group_count);
+	auto seen       = array_make<i32>        (heap_allocator(), group_count);
+	auto ready      = array_make<i32>        (heap_allocator(), 0, group_count);
+	defer ({
+		for (auto &d : dependents) {
+			array_free(&d);
+		}
+		array_free(&dependents);
+	});
+	defer (array_free(&dep_count));
+	defer (array_free(&seen));
+	defer (array_free(&ready));
+
+	for (i32 gi = 0; gi < group_count; gi++) {
+		dep_count[gi] = 0;
+		dependents[gi] = {};
+		seen[gi] = -1;
+	}
+	for (i32 gi = 0; gi < group_count; gi++) {
+		GlobalGroup const &group = g->groups[gi];
+		for (i32 k = 0; k < group.count; k++) {
+			i32 v = g->members[group.start + k];
+			for (i32 i = g->offsets[v]; i < g->offsets[v+1]; i++) {
+				i32 dep = g->group_of[g->targets[i]];
+				if (dep != gi && seen[dep] != gi) {
+					seen[dep] = gi;
+					dep_count[gi] += 1;
+					if (dependents[dep].allocator.proc == nullptr) {
+						array_init(&dependents[dep], heap_allocator());
+					}
+					array_add(&dependents[dep], gi);
+				}
+			}
+		}
+		if (dep_count[gi] == 0) {
+			array_add(&ready, gi);
+		}
+	}
+
+	u64 state = seed;
+	isize checked = 0;
+	while (ready.count > 0) {
+		isize i = cast(isize)(global_group_random(&state) % cast(u64)ready.count);
+		i32 gi = ready[i];
+		ready[i] = ready[ready.count-1];
+		array_pop(&ready);
+
+		check_global_group(c, g, gi);
+		checked += 1;
+		for (i32 next : dependents[gi]) {
+			if (--dep_count[next] == 0) {
+				array_add(&ready, next);
+			}
+		}
+	}
+	GB_ASSERT(checked == group_count);
+}
+
+gb_internal void destroy_global_groups(GlobalGroupGraph *g) {
+	array_free(&g->nodes);
+	map_destroy(&g->node_of);
+	array_free(&g->offsets);
+	array_free(&g->targets);
+	array_free(&g->group_of);
+	array_free(&g->groups);
+	array_free(&g->members);
+}
+
+gb_internal void check_all_global_entities(Checker *c) {
+	in_single_threaded_checker_stage.store(true, std::memory_order_relaxed);
+
+	// NOTE(bill): the runtime types the checker looks up by name rather than through a declaration
+	init_preload(c);
+	{
+		u32 hash = 0;
+		InternedString name = string_interner_insert(str_lit("Load_Directory_File"), 0, &hash);
+		if (scope_lookup_current(c->info.runtime_package->scope, name, hash) != nullptr) {
+			init_core_load_directory_file(c);
+		}
+	}
+
+	TIME_SECTION("check all global entities - build groups");
+	GlobalGroupGraph *g = &global_groups;
+	build_global_groups(c, g);
+
+	TIME_SECTION("check all global entities - check groups");
+	g->active = true;
+	g->current_group = -1;
+	check_global_groups(c, g);
+	g->active = false;
+
+	if (build_context.internal_check_global_edges && g->missing_edges > 0) {
+		gb_printf_err("%td missing global dependencies\n", g->missing_edges);
+		gb_exit(1);
+	}
+
+	in_single_threaded_checker_stage.store(false, std::memory_order_relaxed);
+}
+
+
+// -internal-global-entity-graph: the groups, weighted by the measured self time of their entities
+
+struct GlobalGraphSortItem {
+	u64 key;
+	i32 id;
+};
+
+gb_internal GB_COMPARE_PROC(global_graph_sort_item_desc) {
+	GlobalGraphSortItem const *x = cast(GlobalGraphSortItem const *)a;
+	GlobalGraphSortItem const *y = cast(GlobalGraphSortItem const *)b;
+	if (x->key != y->key) {
+		return x->key > y->key ? -1 : +1;
+	}
+	return i32_cmp(x->id, y->id);
+}
+
+gb_internal f64 global_graph_ms(u64 ticks, u64 freq) {
+	return 1000.0 * cast(f64)ticks / cast(f64)freq;
+}
+
+gb_internal void print_global_group(GlobalGroupGraph *g, i32 gi, u64 ticks, u64 freq, isize max_names) {
+	GlobalGroup const &group = g->groups[gi];
+	gb_printf_err("    %10.3f ms %7d entities  ", global_graph_ms(ticks, freq), group.count);
+	for (i32 k = 0; k < group.count && k < max_names; k++) {
+		if (k > 0) {
+			gb_printf_err(", ");
+		}
+		global_graph_print_entity(g->nodes[g->members[group.start + k]]);
+	}
+	if (group.count > max_names) {
+		gb_printf_err(", ...");
+	}
+	gb_printf_err("\n");
+}
+
+gb_internal void print_global_groups(GlobalGroupGraph *g) {
+	u64 const freq = time_stamp__freq();
+	i32 group_count = cast(i32)g->groups.count;
+
+	auto ticks = array_make<u64>(heap_allocator(), group_count);
+	auto path  = array_make<u64>(heap_allocator(), group_count); // heaviest chain of dependencies ending at a group
+	auto len   = array_make<i32>(heap_allocator(), group_count);
+	auto prev  = array_make<i32>(heap_allocator(), group_count);
+	auto seen  = array_make<i32>(heap_allocator(), group_count);
+	defer (array_free(&ticks));
+	defer (array_free(&path));
+	defer (array_free(&len));
+	defer (array_free(&prev));
+	defer (array_free(&seen));
+
+	auto pkgs         = array_make<AstPackage *>(heap_allocator(), 0, 64);
+	auto pkg_ticks    = array_make<u64>(heap_allocator(), 0, 64);
+	auto pkg_entities = array_make<i32>(heap_allocator(), 0, 64);
+	PtrMap<AstPackage *, i32> pkg_index = {};
+	map_init(&pkg_index);
+	defer (array_free(&pkgs));
+	defer (array_free(&pkg_ticks));
+	defer (array_free(&pkg_entities));
+	defer (map_destroy(&pkg_index));
+
+	u64 total_ticks = 0;
+	u64 when_ticks = 0;
+	isize untimed = 0;
+	i32 largest = -1;
+	isize cyclic = 0;
+
+	mutex_lock(&global_entity_time_mutex);
+	for (auto const &entry : global_entity_times) {
+		if (!entry.value.in_global_loop) {
+			when_ticks += entry.value.ticks;
+		}
+	}
+	for (i32 gi = 0; gi < group_count; gi++) {
+		GlobalGroup const &group = g->groups[gi];
+		ticks[gi] = 0;
+		for (i32 k = 0; k < group.count; k++) {
+			Entity *e = g->nodes[g->members[group.start + k]];
+			GlobalEntityTime *t = map_get(&global_entity_times, e);
+			untimed += t == nullptr;
+			u64 et = t ? t->ticks : 0;
+			ticks[gi] += et;
+
+			i32 *p = map_get(&pkg_index, e->pkg);
+			if (p == nullptr) {
+				map_set(&pkg_index, e->pkg, cast(i32)pkgs.count);
+				array_add(&pkgs, e->pkg);
+				array_add(&pkg_ticks, et);
+				array_add(&pkg_entities, 1);
+			} else {
+				pkg_ticks[*p] += et;
+				pkg_entities[*p] += 1;
+			}
+		}
+		total_ticks += ticks[gi];
+		if (largest < 0 || group.count > g->groups[largest].count) {
+			largest = gi;
+		}
+		cyclic += group.count > 1;
+	}
+	mutex_unlock(&global_entity_time_mutex);
+
+	// NOTE: every dependency of a group has a lower index
+	i32 critical = -1;
+	for (i32 gi = 0; gi < group_count; gi++) {
+		seen[gi] = -1;
+	}
+	for (i32 gi = 0; gi < group_count; gi++) {
+		GlobalGroup const &group = g->groups[gi];
+		prev[gi] = -1;
+		for (i32 k = 0; k < group.count; k++) {
+			i32 v = g->members[group.start + k];
+			for (i32 i = g->offsets[v]; i < g->offsets[v+1]; i++) {
+				i32 dep = g->group_of[g->targets[i]];
+				if (dep != gi && seen[dep] != gi) {
+					seen[dep] = gi;
+					if (prev[gi] < 0 || path[dep] > path[prev[gi]]) {
+						prev[gi] = dep;
+					}
+				}
+			}
+		}
+		path[gi] = ticks[gi] + (prev[gi] >= 0 ? path[prev[gi]] : 0);
+		len[gi]  = 1 + (prev[gi] >= 0 ? len[prev[gi]] : 0);
+		if (critical < 0 || path[gi] > path[critical]) {
+			critical = gi;
+		}
+	}
+
+	f64 total_ms = global_graph_ms(total_ticks, freq);
+	f64 critical_ms = critical >= 0 ? global_graph_ms(path[critical], freq) : 0;
+
+	gb_printf_err("Global entity groups\n");
+	gb_printf_err("  entities: %td (%td not timed), dependency edges: %td, missing edges: %td\n", g->nodes.count, untimed, g->targets.count, g->missing_edges);
+	gb_printf_err("  self time: %.3f ms in the groups, %.3f ms during 'when' resolution\n", total_ms, global_graph_ms(when_ticks, freq));
+	gb_printf_err("  groups:    %d (%td with a cycle), largest has %d entities\n", group_count, cyclic, largest >= 0 ? g->groups[largest].count : 0);
+	gb_printf_err("  critical path: %.3f ms over %d groups -> at most %.2fx speedup\n",
+	              critical_ms, critical >= 0 ? len[critical] : 0, critical_ms > 0 ? total_ms/critical_ms : 0.0);
+
+	gb_printf_err("  check_import_entities (sequential, includes entity checks it triggers):\n");
+	for (isize i = 0; i < GlobalImportStage_COUNT; i++) {
+		gb_printf_err("    %10.3f ms  %s\n", global_graph_ms(global_import_stage_ticks[i], freq), global_import_stage_names[i]);
+	}
+
+	{
+		i32 const BUCKET_COUNT = 10;
+		i32 const   bucket_max     [BUCKET_COUNT] = {1, 2, 4, 8, 16, 64, 256, 1024, 4096, 0x7fffffff};
+		char const *bucket_name    [BUCKET_COUNT] = {"1", "2", "3-4", "5-8", "9-16", "17-64", "65-256", "257-1024", "1025-4096", ">4096"};
+		isize       bucket_groups  [BUCKET_COUNT] = {};
+		isize       bucket_entities[BUCKET_COUNT] = {};
+		u64         bucket_ticks   [BUCKET_COUNT] = {};
+		for (i32 gi = 0; gi < group_count; gi++) {
+			i32 count = g->groups[gi].count;
+			for (i32 b = 0; b < BUCKET_COUNT; b++) {
+				if (count <= bucket_max[b]) {
+					bucket_groups[b] += 1;
+					bucket_entities[b] += count;
+					bucket_ticks[b] += ticks[gi];
+					break;
+				}
+			}
+		}
+		gb_printf_err("  group sizes:\n");
+		gb_printf_err("    %10s %9s %10s %12s\n", "size", "groups", "entities", "self time");
+		for (i32 b = 0; b < BUCKET_COUNT; b++) {
+			if (bucket_groups[b] != 0) {
+				gb_printf_err("    %10s %9td %10td %9.3f ms\n", bucket_name[b], bucket_groups[b], bucket_entities[b], global_graph_ms(bucket_ticks[b], freq));
+			}
+		}
+	}
+
+	auto items = array_make<GlobalGraphSortItem>(heap_allocator(), 0, gb_max(group_count, cast(i32)pkgs.count));
+	defer (array_free(&items));
+	isize const TOP = 10;
+
+	for (i32 gi = 0; gi < group_count; gi++) {
+		array_add(&items, GlobalGraphSortItem{ticks[gi], gi});
+	}
+	array_sort(items, global_graph_sort_item_desc);
+	gb_printf_err("  slowest groups:\n");
+	for (isize i = 0; i < items.count && i < TOP; i++) {
+		print_global_group(g, items[i].id, items[i].key, freq, 4);
+	}
+
+	array_clear(&items);
+	for (i32 gi = 0; gi < group_count; gi++) {
+		if (g->groups[gi].count > 1) {
+			array_add(&items, GlobalGraphSortItem{cast(u64)g->groups[gi].count, gi});
+		}
+	}
+	array_sort(items, global_graph_sort_item_desc);
+	gb_printf_err("  largest groups:\n");
+	for (isize i = 0; i < items.count && i < TOP; i++) {
+		print_global_group(g, items[i].id, ticks[items[i].id], freq, 4);
+	}
+
+	gb_printf_err("  critical path, last group first:\n");
+	isize printed = 0;
+	for (i32 gi = critical; gi >= 0; gi = prev[gi]) {
+		if (printed == 30) {
+			gb_printf_err("    ... %d more groups\n", len[gi]);
+			break;
+		}
+		print_global_group(g, gi, ticks[gi], freq, 2);
+		printed += 1;
+	}
+
+	array_clear(&items);
+	for (i32 p = 0; p < pkgs.count; p++) {
+		array_add(&items, GlobalGraphSortItem{pkg_ticks[p], p});
+	}
+	array_sort(items, global_graph_sort_item_desc);
+	gb_printf_err("  slowest packages:\n");
+	for (isize i = 0; i < items.count && i < TOP; i++) {
+		i32 p = items[i].id;
+		String name = pkgs[p] ? pkgs[p]->name : str_lit("?");
+		gb_printf_err("    %10.3f ms %7d entities  %.*s\n", global_graph_ms(pkg_ticks[p], freq), pkg_entities[p], LIT(name));
+	}
+}
diff --git a/src/checker_global_graph.cpp b/src/checker_global_graph.cpp
deleted file mode 100644
index 67a2c7c07..000000000
--- a/src/checker_global_graph.cpp
+++ /dev/null
@@ -1,539 +0,0 @@
-// -internal-global-entity-graph: per-entity self time of global declaration checking,
-// plus statistics of the dependency graph between global entities (DeclInfo::deps)
-
-struct GlobalEntityTime {
-	u64  ticks;
-	bool in_global_loop;
-};
-
-struct GlobalEntityTimingFrame {
-	u64  start;
-	u64  saved_child_ticks;
-	bool active;
-};
-
-enum GlobalImportStagePart {
-	GlobalImportStage_Imports,
-	GlobalImportStage_Placeholders,
-	GlobalImportStage_DeclSources,
-	GlobalImportStage_TypeAliases,
-	GlobalImportStage_DelayedExprs,
-
-	GlobalImportStage_COUNT,
-};
-
-gb_global char const *global_import_stage_names[GlobalImportStage_COUNT] = {
-	"imports",
-	"'when' and 'foreign' placeholders",
-	"resolve 'when' and 'foreign' blocks",
-	"type alias correction",
-	"delayed expressions (#assert etc.)",
-};
-
-gb_global u64 global_import_stage_ticks[GlobalImportStage_COUNT];
-
-gb_internal u64 global_import_stage_begin(void) {
-	return build_context.internal_global_entity_graph ? time_stamp_time_now() : 0;
-}
-
-gb_internal void global_import_stage_end(GlobalImportStagePart part, u64 start) {
-	if (build_context.internal_global_entity_graph) {
-		global_import_stage_ticks[part] += time_stamp_time_now() - start;
-	}
-}
-
-gb_global BlockingMutex global_entity_time_mutex;
-gb_global PtrMap<Entity *, GlobalEntityTime> global_entity_times;
-gb_thread_local u64 global_entity_child_ticks;
-
-gb_internal GlobalEntityTimingFrame global_entity_timing_begin(Entity *e) {
-	GlobalEntityTimingFrame f = {};
-	if (!build_context.internal_global_entity_graph) {
-		return f;
-	}
-	if (e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
-		return f;
-	}
-	f.active = true;
-	f.saved_child_ticks = global_entity_child_ticks;
-	global_entity_child_ticks = 0;
-	f.start = time_stamp_time_now();
-	return f;
-}
-
-gb_internal void global_entity_timing_end(GlobalEntityTimingFrame const &f, Entity *e) {
-	if (!f.active) {
-		return;
-	}
-	u64 total = time_stamp_time_now() - f.start;
-	u64 self  = total - gb_min(total, global_entity_child_ticks);
-	global_entity_child_ticks = f.saved_child_ticks + total;
-
-	bool in_global_loop = in_single_threaded_checker_stage.load(std::memory_order_relaxed);
-
-	MUTEX_GUARD(&global_entity_time_mutex);
-	GlobalEntityTime *found = map_get(&global_entity_times, e);
-	if (found) {
-		found->ticks += self;
-	} else {
-		map_set(&global_entity_times, e, GlobalEntityTime{self, in_global_loop});
-	}
-}
-
-
-// Iterative Tarjan; components are numbered so that every edge v->w has comp(w) <= comp(v)
-gb_internal i32 global_graph_scc(i32 node_count, Array<i32> const &offsets, Array<i32> const &targets, Array<i32> *comp_of_) {
-	struct Frame {
-		i32 v;
-		i32 pos;
-	};
-
-	auto index    = array_make<i32>(heap_allocator(), node_count);
-	auto low      = array_make<i32>(heap_allocator(), node_count);
-	auto on_stack = array_make<bool>(heap_allocator(), node_count);
-	auto stack    = array_make<i32>(heap_allocator(), 0, node_count);
-	auto frames   = array_make<Frame>(heap_allocator(), 0, 64);
-	defer (array_free(&index));
-	defer (array_free(&low));
-	defer (array_free(&on_stack));
-	defer (array_free(&stack));
-	defer (array_free(&frames));
-
-	Array<i32> &comp_of = *comp_of_;
-	for (i32 v = 0; v < node_count; v++) {
-		index[v]    = -1;
-		low[v]      = 0;
-		on_stack[v] = false;
-		comp_of[v]  = -1;
-	}
-
-	i32 counter = 0;
-	i32 comp_count = 0;
-	for (i32 root = 0; root < node_count; root++) {
-		if (index[root] >= 0) {
-			continue;
-		}
-		index[root] = low[root] = counter++;
-		array_add(&stack, root);
-		on_stack[root] = true;
-		array_add(&frames, Frame{root, 0});
-
-		while (frames.count > 0) {
-			Frame *top = &frames[frames.count-1];
-			i32 v = top->v;
-			if (offsets[v] + top->pos < offsets[v+1]) {
-				i32 w = targets[offsets[v] + top->pos];
-				top->pos += 1;
-				if (index[w] < 0) {
-					index[w] = low[w] = counter++;
-					array_add(&stack, w);
-					on_stack[w] = true;
-					array_add(&frames, Frame{w, 0});
-				} else if (on_stack[w]) {
-					low[v] = gb_min(low[v], index[w]);
-				}
-				continue;
-			}
-
-			if (low[v] == index[v]) {
-				for (;;) {
-					i32 w = array_pop(&stack);
-					on_stack[w] = false;
-					comp_of[w] = comp_count;
-					if (w == v) {
-						break;
-					}
-				}
-				comp_count += 1;
-			}
-			array_pop(&frames);
-			if (frames.count > 0) {
-				i32 u = frames[frames.count-1].v;
-				low[u] = gb_min(low[u], low[v]);
-			}
-		}
-	}
-	return comp_count;
-}
-
-struct GlobalGraphComp {
-	i32  start; // into the member order array
-	i32  count;
-	u64  ticks;
-	u64  path_ticks; // heaviest dependency chain ending at this component, inclusive
-	i32  path_len;
-	i32  path_prev;
-	bool has_self_edge;
-};
-
-struct GlobalGraphSortItem {
-	u64 key;
-	i32 id;
-};
-
-gb_internal GB_COMPARE_PROC(global_graph_sort_item_desc) {
-	GlobalGraphSortItem const *x = cast(GlobalGraphSortItem const *)a;
-	GlobalGraphSortItem const *y = cast(GlobalGraphSortItem const *)b;
-	if (x->key != y->key) {
-		return x->key > y->key ? -1 : +1;
-	}
-	return i32_cmp(x->id, y->id);
-}
-
-// Fills `comps` (indexed by component) and `order` (node indices grouped by component)
-gb_internal void global_graph_condense(i32 node_count, Array<i32> const &offsets, Array<i32> const &targets, Array<u64> const &node_ticks,
-                                       Array<i32> const &comp_of, i32 comp_count, Array<GlobalGraphComp> *comps_, Array<i32> *order_) {
-	Array<GlobalGraphComp> &comps = *comps_;
-	Array<i32> &order = *order_;
-	for (i32 i = 0; i < comp_count; i++) {
-		comps[i] = {};
-		comps[i].path_prev = -1;
-	}
-	for (i32 v = 0; v < node_count; v++) {
-		GlobalGraphComp *g = &comps[comp_of[v]];
-		g->count += 1;
-		g->ticks += node_ticks[v];
-	}
-	i32 start = 0;
-	for (i32 i = 0; i < comp_count; i++) {
-		comps[i].start = start;
-		start += comps[i].count;
-		comps[i].count = 0;
-	}
-	for (i32 v = 0; v < node_count; v++) {
-		GlobalGraphComp *g = &comps[comp_of[v]];
-		order[g->start + g->count] = v;
-		g->count += 1;
-	}
-
-	for (i32 ci = 0; ci < comp_count; ci++) {
-		GlobalGraphComp *g = &comps[ci];
-		u64 best_ticks = 0;
-		i32 best_len = 0;
-		i32 best_prev = -1;
-		for (i32 k = 0; k < g->count; k++) {
-			i32 v = order[g->start + k];
-			for (i32 e = offsets[v]; e < offsets[v+1]; e++) {
-				i32 w = targets[e];
-				if (w == v) {
-					g->has_self_edge = true;
-				}
-				i32 cw = comp_of[w];
-				if (cw == ci) {
-					continue;
-				}
-				GB_ASSERT(cw < ci);
-				GlobalGraphComp *d = &comps[cw];
-				if (best_prev < 0 || d->path_ticks > best_ticks) {
-					best_ticks = d->path_ticks;
-					best_prev  = cw;
-				}
-				best_len = gb_max(best_len, d->path_len);
-			}
-		}
-		g->path_ticks = g->ticks + best_ticks;
-		g->path_len   = 1 + best_len;
-		g->path_prev  = best_prev;
-	}
-}
-
-gb_internal f64 global_graph_ms(u64 ticks, u64 freq) {
-	return 1000.0 * cast(f64)ticks / cast(f64)freq;
-}
-
-gb_internal void global_graph_print_entity(Entity *e) {
-	String pkg  = e->pkg  ? e->pkg->name : str_lit("?");
-	String file = e->file ? filename_without_directory(e->file->fullpath) : str_lit("?");
-	gb_printf_err("%.*s.%.*s (%.*s:%d)", LIT(pkg), LIT(e->token.string), LIT(file), e->token.pos.line);
-}
-
-gb_internal void global_graph_print_comp(Array<Entity *> const &nodes, Array<i32> const &order, GlobalGraphComp const *g, u64 ticks, u64 freq, isize max_names) {
-	gb_printf_err("    %10.3f ms %7d entities  ", global_graph_ms(ticks, freq), g->count);
-	for (i32 k = 0; k < g->count && k < max_names; k++) {
-		if (k > 0) {
-			gb_printf_err(", ");
-		}
-		global_graph_print_entity(nodes[order[g->start + k]]);
-	}
-	if (g->count > max_names) {
-		gb_printf_err(", ...");
-	}
-	gb_printf_err("\n");
-}
-
-gb_internal void print_global_entity_graph(Checker *c) {
-	u64 const freq = time_stamp__freq();
-
-	// Nodes
-	auto nodes = array_make<Entity *>(heap_allocator(), 0, c->info.entities.count);
-	defer (array_free(&nodes));
-	PtrMap<Entity *, i32> node_index = {};
-	map_init(&node_index, c->info.entities.count);
-	defer (map_destroy(&node_index));
-
-	for (Entity *e : c->info.entities) {
-		if (e->decl_info == nullptr || e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
-			continue;
-		}
-		if (map_get(&node_index, e) != nullptr) {
-			continue;
-		}
-		map_set(&node_index, e, cast(i32)nodes.count);
-		array_add(&nodes, e);
-	}
-	i32 node_count = cast(i32)nodes.count;
-
-	// Edges, from what each declaration actually used while being checked
-	auto offsets = array_make<i32>(heap_allocator(), node_count+1);
-	auto targets = array_make<i32>(heap_allocator(), 0, node_count*4);
-	defer (array_free(&offsets));
-	defer (array_free(&targets));
-	isize self_edges = 0;
-	for (i32 v = 0; v < node_count; v++) {
-		offsets[v] = cast(i32)targets.count;
-		DeclInfo *d = nodes[v]->decl_info;
-		FOR_PTR_SET(dep, d->deps) {
-			i32 *w = map_get(&node_index, dep);
-			if (w != nullptr) {
-				array_add(&targets, *w);
-				self_edges += *w == v;
-			}
-		}
-	}
-	offsets[node_count] = cast(i32)targets.count;
-
-	// Weights
-	auto node_ticks = array_make<u64>(heap_allocator(), node_count);
-	defer (array_free(&node_ticks));
-	u64 total_ticks = 0;
-	u64 when_ticks = 0;
-	isize untimed = 0;
-	mutex_lock(&global_entity_time_mutex);
-	for (i32 v = 0; v < node_count; v++) {
-		GlobalEntityTime *t = map_get(&global_entity_times, nodes[v]);
-		node_ticks[v] = t ? t->ticks : 0;
-		total_ticks += node_ticks[v];
-		if (t == nullptr) {
-			untimed += 1;
-		} else if (!t->in_global_loop) {
-			when_ticks += t->ticks;
-		}
-	}
-	mutex_unlock(&global_entity_time_mutex);
-
-	// Entity groups
-	auto comp_of = array_make<i32>(heap_allocator(), node_count);
-	defer (array_free(&comp_of));
-	i32 comp_count = global_graph_scc(node_count, offsets, targets, &comp_of);
-
-	auto comps = array_make<GlobalGraphComp>(heap_allocator(), comp_count);
-	auto order = array_make<i32>(heap_allocator(), node_count);
-	defer (array_free(&comps));
-	defer (array_free(&order));
-	global_graph_condense(node_count, offsets, targets, node_ticks, comp_of, comp_count, &comps, &order);
-
-	i32 critical = -1;
-	i32 largest = -1;
-	isize cyclic_comps = 0;
-	for (i32 ci = 0; ci < comp_count; ci++) {
-		GlobalGraphComp *g = &comps[ci];
-		if (critical < 0 || g->path_ticks > comps[critical].path_ticks) {
-			critical = ci;
-		}
-		if (largest < 0 || g->count > comps[largest].count) {
-			largest = ci;
-		}
-		cyclic_comps += g->count > 1 || g->has_self_edge;
-	}
-
-	// Packages, weighted by the entities they own
-	PtrMap<AstPackage *, i32> pkg_index = {};
-	map_init(&pkg_index, c->info.packages.count);
-	defer (map_destroy(&pkg_index));
-	auto pkgs = array_make<AstPackage *>(heap_allocator(), 0, c->info.packages.count);
-	defer (array_free(&pkgs));
-	auto node_pkg = array_make<i32>(heap_allocator(), node_count);
-	defer (array_free(&node_pkg));
-	for (i32 v = 0; v < node_count; v++) {
-		AstPackage *p = nodes[v]->pkg;
-		i32 *found = map_get(&pkg_index, p);
-		if (found == nullptr) {
-			map_set(&pkg_index, p, cast(i32)pkgs.count);
-			node_pkg[v] = cast(i32)pkgs.count;
-			array_add(&pkgs, p);
-		} else {
-			node_pkg[v] = *found;
-		}
-	}
-	i32 pkg_count = cast(i32)pkgs.count;
-
-	auto pkg_ticks = array_make<u64>(heap_allocator(), pkg_count);
-	auto pkg_entities = array_make<i32>(heap_allocator(), pkg_count);
-	defer (array_free(&pkg_ticks));
-	defer (array_free(&pkg_entities));
-	for (i32 p = 0; p < pkg_count; p++) {
-		pkg_ticks[p] = 0;
-		pkg_entities[p] = 0;
-	}
-	for (i32 v = 0; v < node_count; v++) {
-		pkg_ticks[node_pkg[v]] += node_ticks[v];
-		pkg_entities[node_pkg[v]] += 1;
-	}
-
-	auto pkg_offsets = array_make<i32>(heap_allocator(), pkg_count+1);
-	auto pkg_targets = array_make<i32>(heap_allocator(), 0, pkg_count*4);
-	defer (array_free(&pkg_offsets));
-	defer (array_free(&pkg_targets));
-	{
-		auto pkg_edges = array_make<Array<i32>>(heap_allocator(), pkg_count);
-		PtrMap<u64, bool> seen = {};
-		map_init(&seen);
-		for (i32 p = 0; p < pkg_count; p++) {
-			pkg_edges[p] = array_make<i32>(heap_allocator());
-		}
-		for (i32 v = 0; v < node_count; v++) {
-			for (i32 e = offsets[v]; e < offsets[v+1]; e++) {
-				i32 pv = node_pkg[v];
-				i32 pw = node_pkg[targets[e]];
-				if (pv == pw) {
-					continue;
-				}
-				u64 key = (cast(u64)(pv+1) << 32) | cast(u64)(pw+1);
-				if (map_get(&seen, key) == nullptr) {
-					map_set(&seen, key, true);
-					array_add(&pkg_edges[pv], pw);
-				}
-			}
-		}
-		for (i32 p = 0; p < pkg_count; p++) {
-			pkg_offsets[p] = cast(i32)pkg_targets.count;
-			for (i32 w : pkg_edges[p]) {
-				array_add(&pkg_targets, w);
-			}
-			array_free(&pkg_edges[p]);
-		}
-		pkg_offsets[pkg_count] = cast(i32)pkg_targets.count;
-		array_free(&pkg_edges);
-		map_destroy(&seen);
-	}
-
-	auto pkg_comp_of = array_make<i32>(heap_allocator(), pkg_count);
-	defer (array_free(&pkg_comp_of));
-	i32 pkg_comp_count = global_graph_scc(pkg_count, pkg_offsets, pkg_targets, &pkg_comp_of);
-	auto pkg_comps = array_make<GlobalGraphComp>(heap_allocator(), pkg_comp_count);
-	auto pkg_order = array_make<i32>(heap_allocator(), pkg_count);
-	defer (array_free(&pkg_comps));
-	defer (array_free(&pkg_order));
-	global_graph_condense(pkg_count, pkg_offsets, pkg_targets, pkg_ticks, pkg_comp_of, pkg_comp_count, &pkg_comps, &pkg_order);
-	u64 pkg_critical_ticks = 0;
-	isize pkg_cyclic = 0;
-	for (i32 ci = 0; ci < pkg_comp_count; ci++) {
-		pkg_critical_ticks = gb_max(pkg_critical_ticks, pkg_comps[ci].path_ticks);
-		pkg_cyclic += pkg_comps[ci].count > 1;
-	}
-
-	// Report
-	f64 total_ms = global_graph_ms(total_ticks, freq);
-	f64 critical_ms = critical >= 0 ? global_graph_ms(comps[critical].path_ticks, freq) : 0;
-	f64 pkg_critical_ms = global_graph_ms(pkg_critical_ticks, freq);
-
-	gb_printf_err("Global entity graph\n");
-	gb_printf_err("  entities:  %td (%td not timed), dependency edges: %td (%td self edges)\n", nodes.count, untimed, targets.count, self_edges);
-	gb_printf_err("  self time: %.3f ms total; %.3f ms during 'when' resolution, %.3f ms in the global loop\n",
-	              total_ms, global_graph_ms(when_ticks, freq), global_graph_ms(total_ticks - when_ticks, freq));
-	gb_printf_err("  groups:    %d (%td with a cycle), largest has %d entities\n",
-	              comp_count, cyclic_comps, largest >= 0 ? comps[largest].count : 0);
-	gb_printf_err("  critical path (entity groups): %.3f ms over %d groups -> at most %.2fx speedup\n",
-	              critical_ms, critical >= 0 ? comps[critical].path_len : 0, critical_ms > 0 ? total_ms/critical_ms : 0.0);
-	gb_printf_err("  critical path (packages):      %.3f ms -> at most %.2fx speedup (%d packages, %td package cycles)\n",
-	              pkg_critical_ms, pkg_critical_ms > 0 ? total_ms/pkg_critical_ms : 0.0, pkg_count, pkg_cyclic);
-
-	gb_printf_err("  check_import_entities (sequential, includes entity checks it triggers):\n");
-	for (isize i = 0; i < GlobalImportStage_COUNT; i++) {
-		gb_printf_err("    %10.3f ms  %s\n", global_graph_ms(global_import_stage_ticks[i], freq), global_import_stage_names[i]);
-	}
-
-	{
-		i32 const BUCKET_COUNT = 10;
-		i32 const bucket_max[BUCKET_COUNT] = {1, 2, 4, 8, 16, 64, 256, 1024, 4096, 0x7fffffff};
-		char const *bucket_name[BUCKET_COUNT] = {"1", "2", "3-4", "5-8", "9-16", "17-64", "65-256", "257-1024", "1025-4096", ">4096"};
-		isize bucket_groups[BUCKET_COUNT] = {};
-		isize bucket_entities[BUCKET_COUNT] = {};
-		u64   bucket_ticks[BUCKET_COUNT] = {};
-		for (i32 ci = 0; ci < comp_count; ci++) {
-			GlobalGraphComp *g = &comps[ci];
-			for (i32 b = 0; b < BUCKET_COUNT; b++) {
-				if (g->count <= bucket_max[b]) {
-					bucket_groups[b] += 1;
-					bucket_entities[b] += g->count;
-					bucket_ticks[b] += g->ticks;
-					break;
-				}
-			}
-		}
-		gb_printf_err("  group sizes:\n");
-		gb_printf_err("    %10s %9s %10s %12s\n", "size", "groups", "entities", "self time");
-		for (i32 b = 0; b < BUCKET_COUNT; b++) {
-			if (bucket_groups[b] == 0) {
-				continue;
-			}
-			gb_printf_err("    %10s %9td %10td %9.3f ms\n", bucket_name[b], bucket_groups[b], bucket_entities[b], global_graph_ms(bucket_ticks[b], freq));
-		}
-	}
-
-	auto items = array_make<GlobalGraphSortItem>(heap_allocator(), 0, gb_max(comp_count, pkg_count));
-	defer (array_free(&items));
-
-	isize const TOP = 10;
-	isize const MAX_NAMES = 4;
-
-	array_clear(&items);
-	for (i32 ci = 0; ci < comp_count; ci++) {
-		array_add(&items, GlobalGraphSortItem{comps[ci].ticks, ci});
-	}
-	array_sort(items, global_graph_sort_item_desc);
-	gb_printf_err("  slowest groups:\n");
-	for (isize i = 0; i < items.count && i < TOP; i++) {
-		GlobalGraphComp *g = &comps[items[i].id];
-		global_graph_print_comp(nodes, order, g, g->ticks, freq, MAX_NAMES);
-	}
-
-	array_clear(&items);
-	for (i32 ci = 0; ci < comp_count; ci++) {
-		if (comps[ci].count > 1) {
-			array_add(&items, GlobalGraphSortItem{cast(u64)comps[ci].count, ci});
-		}
-	}
-	array_sort(items, global_graph_sort_item_desc);
-	gb_printf_err("  largest groups:\n");
-	for (isize i = 0; i < items.count && i < TOP; i++) {
-		GlobalGraphComp *g = &comps[items[i].id];
-		global_graph_print_comp(nodes, order, g, g->ticks, freq, MAX_NAMES);
-	}
-
-	gb_printf_err("  critical path, last group first:\n");
-	{
-		isize printed = 0;
-		for (i32 ci = critical; ci >= 0; ci = comps[ci].path_prev) {
-			if (printed == 30) {
-				gb_printf_err("    ... %d more groups\n", comps[ci].path_len);
-				break;
-			}
-			global_graph_print_comp(nodes, order, &comps[ci], comps[ci].ticks, freq, 2);
-			printed += 1;
-		}
-	}
-
-	array_clear(&items);
-	for (i32 p = 0; p < pkg_count; p++) {
-		array_add(&items, GlobalGraphSortItem{pkg_ticks[p], p});
-	}
-	array_sort(items, global_graph_sort_item_desc);
-	gb_printf_err("  slowest packages:\n");
-	for (isize i = 0; i < items.count && i < TOP; i++) {
-		i32 p = items[i].id;
-		AstPackage *pkg = pkgs[p];
-		String name = pkg ? pkg->name : str_lit("?");
-		gb_printf_err("    %10.3f ms %7d entities  %.*s\n", global_graph_ms(pkg_ticks[p], freq), pkg_entities[p], LIT(name));
-	}
-}
diff --git a/src/checker_global_groups.cpp b/src/checker_global_groups.cpp
deleted file mode 100644
index cf3e3924e..000000000
--- a/src/checker_global_groups.cpp
+++ /dev/null
@@ -1,769 +0,0 @@
-// Global entities are checked in groups: the strongly connected components of a dependency graph built
-// from syntax, in dependency order. A group only names entities of its own or of finished groups, which
-// `-internal-check-global-edges` verifies
-
-struct GlobalGroup {
-	i32  start; // into `GlobalGroupGraph::members`
-	i32  count;
-	bool done;
-};
-
-struct GlobalGroupGraph {
-	Array<Entity *>       nodes;
-	PtrMap<Entity *, i32> node_of;
-	Array<i32>            offsets; // node -> the nodes it names, as `targets[offsets[v]..offsets[v+1]]`
-	Array<i32>            targets;
-	Array<i32>            group_of;
-	Array<GlobalGroup>    groups;  // every dependency of a group has a lower index
-	Array<i32>            members; // nodes, by group, in source order
-
-	bool   active;
-	i32    current_group;
-	Entity *current_entity;
-	isize  missing_edges;
-};
-
-gb_global GlobalGroupGraph global_groups;
-
-struct GlobalGraphWalk {
-	Scope *scope;
-	Array<Entity *> *refs;
-};
-
-gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node);
-
-gb_internal void global_graph_walk_slice(GlobalGraphWalk *w, Slice<Ast *> const &nodes) {
-	for (Ast *node : nodes) {
-		global_graph_walk(w, node);
-	}
-}
-
-gb_internal void global_graph_add_ref(GlobalGraphWalk *w, Entity *e) {
-	if (e != nullptr) {
-		array_add(w->refs, e);
-	}
-}
-
-// NOTE: names bound within the expression (parameters, fields, '$T') are also looked up globally, which at
-// worst adds an edge; only procedure bodies are skipped, as they are checked after this stage
-gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node) {
-	if (node == nullptr) {
-		return;
-	}
-	switch (node->kind) {
-	case Ast_Ident:
-		global_graph_add_ref(w, scope_lookup(w->scope, node->Ident.interned, node->Ident.hash));
-		break;
-
-	case Ast_SelectorExpr: {
-		Ast *expr     = node->SelectorExpr.expr;
-		Ast *selector = node->SelectorExpr.selector;
-		if (expr != nullptr && expr->kind == Ast_Ident) {
-			Entity *e = scope_lookup(w->scope, expr->Ident.interned, expr->Ident.hash);
-			if (e != nullptr && e->kind == Entity_ImportName && selector != nullptr && selector->kind == Ast_Ident) {
-				global_graph_add_ref(w, scope_lookup_current(e->ImportName.scope, selector->Ident.interned, selector->Ident.hash));
-			} else {
-				global_graph_add_ref(w, e);
-			}
-		} else {
-			global_graph_walk(w, expr);
-		}
-	} break;
-
-	case Ast_PolyType:
-		global_graph_walk(w, node->PolyType.specialization);
-		break;
-	case Ast_Ellipsis:
-		global_graph_walk(w, node->Ellipsis.expr);
-		break;
-	case Ast_ProcGroup:
-		global_graph_walk_slice(w, node->ProcGroup.args);
-		break;
-	case Ast_AsmGroup:
-		global_graph_walk_slice(w, node->AsmGroup.args);
-		break;
-	case Ast_ProcLit:
-		global_graph_walk(w, node->ProcLit.type);
-		global_graph_walk_slice(w, node->ProcLit.where_clauses);
-		break;
-	case Ast_CompoundLit:
-		global_graph_walk(w, node->CompoundLit.type);
-		global_graph_walk_slice(w, node->CompoundLit.elems);
-		global_graph_walk(w, node->CompoundLit.tag);
-		break;
-	case Ast_TagExpr:
-		global_graph_walk(w, node->TagExpr.expr);
-		break;
-	case Ast_UnaryExpr:
-		global_graph_walk(w, node->UnaryExpr.expr);
-		break;
-	case Ast_BinaryExpr:
-		global_graph_walk(w, node->BinaryExpr.left);
-		global_graph_walk(w, node->BinaryExpr.right);
-		break;
-	case Ast_ParenExpr:
-		global_graph_walk(w, node->ParenExpr.expr);
-		break;
-	case Ast_SelectorCallExpr:
-		global_graph_walk(w, node->SelectorCallExpr.expr);
-		global_graph_walk(w, node->SelectorCallExpr.call);
-		break;
-	case Ast_IndexExpr:
-		global_graph_walk(w, node->IndexExpr.expr);
-		global_graph_walk(w, node->IndexExpr.index);
-		break;
-	case Ast_MatrixIndexExpr:
-		global_graph_walk(w, node->MatrixIndexExpr.expr);
-		global_graph_walk(w, node->MatrixIndexExpr.row_index);
-		global_graph_walk(w, node->MatrixIndexExpr.column_index);
-		break;
-	case Ast_DerefExpr:
-		global_graph_walk(w, node->DerefExpr.expr);
-		break;
-	case Ast_SliceExpr:
-		global_graph_walk(w, node->SliceExpr.expr);
-		global_graph_walk(w, node->SliceExpr.low);
-		global_graph_walk(w, node->SliceExpr.high);
-		break;
-	case Ast_CallExpr:
-		global_graph_walk(w, node->CallExpr.proc);
-		global_graph_walk_slice(w, node->CallExpr.args);
-		break;
-	case Ast_FieldValue:
-		global_graph_walk(w, node->FieldValue.field);
-		global_graph_walk(w, node->FieldValue.value);
-		break;
-	case Ast_EnumFieldValue:
-		global_graph_walk(w, node->EnumFieldValue.value);
-		break;
-	case Ast_TernaryIfExpr:
-		global_graph_walk(w, node->TernaryIfExpr.x);
-		global_graph_walk(w, node->TernaryIfExpr.cond);
-		global_graph_walk(w, node->TernaryIfExpr.y);
-		break;
-	case Ast_TernaryWhenExpr:
-		global_graph_walk(w, node->TernaryWhenExpr.x);
-		global_graph_walk(w, node->TernaryWhenExpr.cond);
-		global_graph_walk(w, node->TernaryWhenExpr.y);
-		break;
-	case Ast_OrElseExpr:
-		global_graph_walk(w, node->OrElseExpr.x);
-		global_graph_walk(w, node->OrElseExpr.y);
-		break;
-	case Ast_OrReturnExpr:
-		global_graph_walk(w, node->OrReturnExpr.expr);
-		break;
-	case Ast_OrBranchExpr:
-		global_graph_walk(w, node->OrBranchExpr.expr);
-		break;
-	case Ast_TypeAssertion:
-		global_graph_walk(w, node->TypeAssertion.expr);
-		global_graph_walk(w, node->TypeAssertion.type);
-		break;
-	case Ast_TypeCast:
-		global_graph_walk(w, node->TypeCast.type);
-		global_graph_walk(w, node->TypeCast.expr);
-		break;
-	case Ast_AutoCast:
-		global_graph_walk(w, node->AutoCast.expr);
-		break;
-
-	case Ast_Field:
-		global_graph_walk(w, node->Field.type);
-		global_graph_walk(w, node->Field.default_value);
-		break;
-	case Ast_BitFieldField:
-		global_graph_walk(w, node->BitFieldField.type);
-		global_graph_walk(w, node->BitFieldField.bit_size);
-		break;
-	case Ast_FieldList:
-		global_graph_walk_slice(w, node->FieldList.list);
-		break;
-
-	case Ast_TypeidType:
-		global_graph_walk(w, node->TypeidType.specialization);
-		break;
-	case Ast_HelperType:
-		global_graph_walk(w, node->HelperType.type);
-		break;
-	case Ast_DistinctType:
-		global_graph_walk(w, node->DistinctType.type);
-		break;
-	case Ast_ProcType:
-		global_graph_walk(w, node->ProcType.params);
-		global_graph_walk(w, node->ProcType.results);
-		break;
-	case Ast_RelativeType:
-		global_graph_walk(w, node->RelativeType.tag);
-		global_graph_walk(w, node->RelativeType.type);
-		break;
-	case Ast_PointerType:
-		global_graph_walk(w, node->PointerType.type);
-		global_graph_walk(w, node->PointerType.tag);
-		break;
-	case Ast_MultiPointerType:
-		global_graph_walk(w, node->MultiPointerType.type);
-		break;
-	case Ast_ArrayType:
-		global_graph_walk(w, node->ArrayType.count);
-		global_graph_walk(w, node->ArrayType.elem);
-		global_graph_walk(w, node->ArrayType.tag);
-		break;
-	case Ast_DynamicArrayType:
-		global_graph_walk(w, node->DynamicArrayType.elem);
-		global_graph_walk(w, node->DynamicArrayType.tag);
-		break;
-	case Ast_FixedCapacityDynamicArrayType:
-		global_graph_walk(w, node->FixedCapacityDynamicArrayType.elem);
-		global_graph_walk(w, node->FixedCapacityDynamicArrayType.capacity);
-		global_graph_walk(w, node->FixedCapacityDynamicArrayType.tag);
-		break;
-	case Ast_StructType:
-		global_graph_walk_slice(w, node->StructType.fields);
-		global_graph_walk(w, node->StructType.polymorphic_params);
-		global_graph_walk(w, node->StructType.align);
-		global_graph_walk(w, node->StructType.min_field_align);
-		global_graph_walk(w, node->StructType.max_field_align);
-		global_graph_walk_slice(w, node->StructType.where_clauses);
-		break;
-	case Ast_UnionType:
-		global_graph_walk_slice(w, node->UnionType.variants);
-		global_graph_walk(w, node->UnionType.polymorphic_params);
-		global_graph_walk_slice(w, node->UnionType.where_clauses);
-		break;
-	case Ast_EnumType:
-		global_graph_walk(w, node->EnumType.base_type);
-		for (Ast *field : node->EnumType.fields) {
-			if (field->kind == Ast_EnumFieldValue) {
-				global_graph_walk(w, field->EnumFieldValue.value);
-			}
-		}
-		break;
-	case Ast_BitSetType:
-		global_graph_walk(w, node->BitSetType.elem);
-		global_graph_walk(w, node->BitSetType.underlying);
-		break;
-	case Ast_BitFieldType:
-		global_graph_walk(w, node->BitFieldType.backing_type);
-		global_graph_walk_slice(w, node->BitFieldType.fields);
-		break;
-	case Ast_MapType:
-		global_graph_walk(w, node->MapType.count);
-		global_graph_walk(w, node->MapType.key);
-		global_graph_walk(w, node->MapType.value);
-		break;
-	case Ast_MatrixType:
-		global_graph_walk(w, node->MatrixType.row_count);
-		global_graph_walk(w, node->MatrixType.column_count);
-		global_graph_walk(w, node->MatrixType.elem);
-		break;
-
-	case Ast_AsmTemplate:
-		global_graph_walk(w, node->AsmTemplate.signature);
-		global_graph_walk_slice(w, node->AsmTemplate.specs);
-		global_graph_walk_slice(w, node->AsmTemplate.clobbers);
-		global_graph_walk_slice(w, node->AsmTemplate.instructions);
-		break;
-	case Ast_AsmSpec:
-		global_graph_walk(w, node->AsmSpec.type);
-		global_graph_walk(w, node->AsmSpec.value);
-		for (Ast *d : node->AsmSpec.directives) {
-			global_graph_walk(w, d);
-		}
-		break;
-	case Ast_AsmClobber:
-		global_graph_walk(w, node->AsmClobber.value);
-		break;
-	case Ast_AsmInstruction:
-		global_graph_walk_slice(w, node->AsmInstruction.operands);
-		break;
-	case Ast_AsmMemoryTerm:
-		global_graph_walk(w, node->AsmMemoryTerm.operand);
-		global_graph_walk(w, node->AsmMemoryTerm.scale);
-		break;
-	case Ast_AsmMemoryOperand:
-		global_graph_walk(w, node->AsmMemoryOperand.segment_override);
-		global_graph_walk_slice(w, node->AsmMemoryOperand.terms);
-		global_graph_walk(w, node->AsmMemoryOperand.type);
-		break;
-	case Ast_AsmRegisterGroup:
-		for (Ast *r : node->AsmRegisterGroup.registers) {
-			global_graph_walk(w, r);
-		}
-		global_graph_walk(w, node->AsmRegisterGroup.type);
-		break;
-	case Ast_AsmDirective:
-		global_graph_walk_slice(w, node->AsmDirective.operands);
-		break;
-	}
-}
-
-gb_internal void global_graph_walk_entity(GlobalGraphWalk *w, Entity *e, DeclInfo *d) {
-	w->scope = d->scope;
-	global_graph_walk(w, d->type_expr);
-	global_graph_walk(w, d->init_expr);
-	for (Ast *attr : d->attributes) {
-		if (attr->kind != Ast_Attribute) {
-			continue;
-		}
-		for (Ast *elem : attr->Attribute.elems) {
-			if (elem->kind == Ast_FieldValue) {
-				global_graph_walk(w, elem->FieldValue.value);
-			}
-		}
-	}
-	if (e->kind == Entity_Procedure) {
-		global_graph_walk(w, e->Procedure.foreign_library_ident);
-	} else if (e->kind == Entity_Variable) {
-		global_graph_walk(w, e->Variable.foreign_library_ident);
-	}
-}
-
-gb_internal bool is_global_graph_node(Entity *e) {
-	if (e->state == EntityState_Resolved) {
-		return false;
-	}
-	DeclInfo *d = e->decl_info;
-	if (d == nullptr || e->scope == nullptr || d->scope != e->scope || (e->scope->flags & ScopeFlag_File) == 0) {
-		return false;
-	}
-	switch (e->kind) {
-	case Entity_Constant:
-	case Entity_TypeName:
-	case Entity_Variable:
-	case Entity_Procedure:
-	case Entity_ProcGroup:
-	case Entity_AsmTemplate:
-		return true;
-	}
-	return false;
-}
-
-gb_internal i32 global_graph_add_node(GlobalGroupGraph *g, Entity *e) {
-	i32 *found = map_get(&g->node_of, e);
-	if (found != nullptr) {
-		return *found;
-	}
-	i32 v = cast(i32)g->nodes.count;
-	map_set(&g->node_of, e, v);
-	array_add(&g->nodes, e);
-	return v;
-}
-
-gb_internal u64 global_group_random(u64 *state) {
-	*state = *state*6364136223846793005ull + 1442695040888963407ull;
-	return *state >> 33;
-}
-
-// The nodes `[lo, hi)` walked on one thread; a name that is not a node yet is kept as an entity in `refs`
-struct GlobalGraphWalkChunk {
-	GlobalGroupGraph *g;
-	i32               lo, hi;
-	Array<i32>        targets;
-	Array<i32>        target_ends; // per node
-	Array<Entity *>   refs;
-	Array<i32>        ref_ends;    // per node
-};
-
-gb_internal WORKER_TASK_PROC(global_graph_walk_worker) {
-	GlobalGraphWalkChunk *chunk = cast(GlobalGraphWalkChunk *)data;
-	GlobalGroupGraph *g = chunk->g;
-
-	auto refs = array_make<Entity *>(heap_allocator(), 0, 64);
-	defer (array_free(&refs));
-	GlobalGraphWalk w = {};
-	w.refs = &refs;
-	for (i32 v = chunk->lo; v < chunk->hi; v++) {
-		Entity *e = g->nodes[v];
-		array_clear(&refs);
-		global_graph_walk_entity(&w, e, e->decl_info);
-		for (Entity *r : refs) {
-			i32 *found = map_get(&g->node_of, r);
-			if (found != nullptr) {
-				array_add(&chunk->targets, *found);
-			} else if (r->flags & EntityFlag_Lazy) {
-				array_add(&chunk->refs, r);
-			}
-		}
-		array_add(&chunk->target_ends, cast(i32)chunk->targets.count);
-		array_add(&chunk->ref_ends,    cast(i32)chunk->refs.count);
-	}
-	return 0;
-}
-
-gb_internal void build_global_groups(Checker *c, GlobalGroupGraph *g) {
-	array_init(&g->nodes, heap_allocator(), 0, c->info.entities.count);
-	map_init(&g->node_of, c->info.entities.count);
-	for (Entity *e : c->info.entities) {
-		if ((e->flags & EntityFlag_Lazy) == 0 && is_global_graph_node(e)) {
-			global_graph_add_node(g, e);
-		}
-	}
-
-	// NOTE: walked in parallel, as nothing writes to the scopes now
-	i32 const CHUNK_SIZE = 64;
-	i32 initial_count = cast(i32)g->nodes.count;
-	auto chunks = array_make<GlobalGraphWalkChunk>(heap_allocator(), (initial_count + CHUNK_SIZE-1)/CHUNK_SIZE);
-	defer (array_free(&chunks));
-	for (isize i = 0; i < chunks.count; i++) {
-		GlobalGraphWalkChunk *chunk = &chunks[i];
-		*chunk = {};
-		chunk->g  = g;
-		chunk->lo = cast(i32)(i*CHUNK_SIZE);
-		chunk->hi = gb_min(chunk->lo + CHUNK_SIZE, initial_count);
-		array_init(&chunk->targets,     heap_allocator(), 0, 4*CHUNK_SIZE);
-		array_init(&chunk->target_ends, heap_allocator(), 0, CHUNK_SIZE);
-		array_init(&chunk->refs,        heap_allocator(), 0);
-		array_init(&chunk->ref_ends,    heap_allocator(), 0, CHUNK_SIZE);
-		thread_pool_add_task(global_graph_walk_worker, chunk);
-	}
-	thread_pool_wait();
-
-	auto edge_from = array_make<i32>(heap_allocator(), 0, 4*g->nodes.count);
-	auto edge_to   = array_make<i32>(heap_allocator(), 0, 4*g->nodes.count);
-	auto refs      = array_make<Entity *>(heap_allocator(), 0, 64);
-	defer (array_free(&edge_from));
-	defer (array_free(&edge_to));
-	defer (array_free(&refs));
-
-	auto add_ref = [&](i32 v, Entity *r) {
-		i32 *found = map_get(&g->node_of, r);
-		if (found != nullptr) {
-			array_add(&edge_from, v);
-			array_add(&edge_to, *found);
-		} else if ((r->flags & EntityFlag_Lazy) && is_global_graph_node(r)) {
-			// NOTE: a lazy entity becomes a node once a node names it
-			array_add(&edge_from, v);
-			array_add(&edge_to, global_graph_add_node(g, r));
-		}
-	};
-
-	GlobalGraphWalk w = {};
-	w.refs = &refs;
-	i32 first_of_decl = -1;
-	for (i32 v = 0; v < g->nodes.count; v++) {
-		Entity *e = g->nodes[v];
-		DeclInfo *d = e->decl_info;
-
-		// NOTE: entities sharing one declaration share its AST, e.g. `a, b: struct{x: int}`, so they share a group;
-		// in source order they are adjacent, and lazy ones are only checked under `lazy_mutex`
-		if (first_of_decl >= 0 && d->decl_node != nullptr && g->nodes[first_of_decl]->decl_info->decl_node == d->decl_node) {
-			array_add(&edge_from, v);
-			array_add(&edge_to,   first_of_decl);
-			array_add(&edge_from, first_of_decl);
-			array_add(&edge_to,   v);
-		} else {
-			first_of_decl = v;
-		}
-
-		if (v < initial_count) {
-			GlobalGraphWalkChunk *chunk = &chunks[v / CHUNK_SIZE];
-			i32 k = v - chunk->lo;
-			for (i32 i = k > 0 ? chunk->target_ends[k-1] : 0; i < chunk->target_ends[k]; i++) {
-				array_add(&edge_from, v);
-				array_add(&edge_to, chunk->targets[i]);
-			}
-			for (i32 i = k > 0 ? chunk->ref_ends[k-1] : 0; i < chunk->ref_ends[k]; i++) {
-				add_ref(v, chunk->refs[i]);
-			}
-		} else {
-			array_clear(&refs);
-			global_graph_walk_entity(&w, e, d);
-			for (Entity *r : refs) {
-				add_ref(v, r);
-			}
-		}
-	}
-	for (GlobalGraphWalkChunk &chunk : chunks) {
-		array_free(&chunk.targets);
-		array_free(&chunk.target_ends);
-		array_free(&chunk.refs);
-		array_free(&chunk.ref_ends);
-	}
-
-	i32 node_count = cast(i32)g->nodes.count;
-	array_init(&g->offsets, heap_allocator(), node_count+1);
-	array_init(&g->targets, heap_allocator(), edge_to.count);
-	for (i32 v = 0; v <= node_count; v++) {
-		g->offsets[v] = 0;
-	}
-	for (i32 from : edge_from) {
-		g->offsets[from+1] += 1;
-	}
-	for (i32 v = 0; v < node_count; v++) {
-		g->offsets[v+1] += g->offsets[v];
-	}
-	{
-		auto fill = array_clone(heap_allocator(), g->offsets);
-		defer (array_free(&fill));
-		for (isize i = 0; i < edge_from.count; i++) {
-			g->targets[fill[edge_from[i]]++] = edge_to[i];
-		}
-	}
-
-	array_init(&g->group_of, heap_allocator(), node_count);
-	i32 group_count = global_graph_scc(node_count, g->offsets, g->targets, &g->group_of);
-
-	array_init(&g->groups,  heap_allocator(), group_count);
-	array_init(&g->members, heap_allocator(), node_count);
-	for (i32 gi = 0; gi < group_count; gi++) {
-		g->groups[gi] = {};
-	}
-	for (i32 v = 0; v < node_count; v++) {
-		g->groups[g->group_of[v]].count += 1;
-	}
-	i32 start = 0;
-	for (i32 gi = 0; gi < group_count; gi++) {
-		g->groups[gi].start = start;
-		start += g->groups[gi].count;
-		g->groups[gi].count = 0;
-	}
-	// NOTE: in source order, as `c->info.entities` is sorted; lazy nodes come last, but are not checked here
-	for (i32 v = 0; v < node_count; v++) {
-		GlobalGroup *group = &g->groups[g->group_of[v]];
-		g->members[group->start + group->count++] = v;
-	}
-}
-
-gb_internal void global_group_print_entity(Entity *e) {
-	if (e == nullptr) {
-		gb_printf_err("?");
-		return;
-	}
-	global_graph_print_entity(e);
-}
-
-// Called when `e` starts being checked: it must be in the current group or a finished one
-gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e) {
-	GlobalGroupGraph *g = &global_groups;
-	if (!g->active) {
-		return;
-	}
-	i32 *v = map_get(&g->node_of, e);
-	if (v == nullptr) {
-		if (!is_global_graph_node(e)) {
-			return;
-		}
-	} else {
-		i32 gi = g->group_of[*v];
-		if (gi == g->current_group || g->groups[gi].done) {
-			return;
-		}
-	}
-
-	g->missing_edges += 1;
-	if (build_context.internal_check_global_edges) {
-		Entity *by = ctx->decl ? ctx->decl->entity.load() : nullptr;
-		gb_printf_err("Missing global dependency: ");
-		global_group_print_entity(by);
-		gb_printf_err(" needs ");
-		global_group_print_entity(e);
-		gb_printf_err(v == nullptr ? ", which is not in the graph" : "");
-		if (g->current_entity != by) {
-			gb_printf_err(", while checking ");
-			global_group_print_entity(g->current_entity);
-		}
-		gb_printf_err("\n");
-	}
-}
-
-// NOTE: members in a fixed order, as which member of a cycle is entered first can decide whether it checks,
-// e.g. an enum whose values are `union_variant_index`es of a union with pointers back to it
-gb_internal void check_global_group(Checker *c, GlobalGroupGraph *g, i32 gi) {
-	GlobalGroup *group = &g->groups[gi];
-	i32 *members = g->members.data + group->start;
-
-	g->current_group = gi;
-	for (i32 k = 0; k < group->count; k++) {
-		Entity *e = g->nodes[members[k]];
-		if (e->flags & EntityFlag_Lazy) {
-			// NOTE: only checked when something uses it; the group orders it after what it names
-			continue;
-		}
-		g->current_entity = e;
-		GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
-		check_single_global_entity(c, e, e->decl_info);
-		if (e->type != nullptr && is_type_typed(e->type)) {
-			for (Type *t = nullptr; mpsc_dequeue(&c->soa_types_to_complete, &t); /**/) {
-				complete_soa_type(c, t, false);
-			}
-
-			(void)type_size_of(e->type);
-			(void)type_align_of(e->type);
-		}
-		global_entity_timing_end(timing_frame, e);
-	}
-	group->done = true;
-	g->current_group = -1;
-	g->current_entity = nullptr;
-}
-
-// Groups in dependency order; with `-internal-shuffle-global-entities`, a random one of the groups whose
-// dependencies are done, as a parallel checker might
-gb_internal void check_global_groups(Checker *c, GlobalGroupGraph *g) {
-	i32 group_count = cast(i32)g->groups.count;
-	u64 seed = build_context.internal_shuffle_global_entities;
-	if (seed == 0) {
-		for (i32 gi = 0; gi < group_count; gi++) {
-			check_global_group(c, g, gi);
-		}
-		return;
-	}
-
-	auto dependents = array_make<Array<i32> >(heap_allocator(), group_count);
-	auto dep_count  = array_make<i32>        (heap_allocator(), group_count);
-	auto seen       = array_make<i32>        (heap_allocator(), group_count);
-	auto ready      = array_make<i32>        (heap_allocator(), 0, group_count);
-	defer ({
-		for (auto &d : dependents) {
-			array_free(&d);
-		}
-		array_free(&dependents);
-	});
-	defer (array_free(&dep_count));
-	defer (array_free(&seen));
-	defer (array_free(&ready));
-
-	for (i32 gi = 0; gi < group_count; gi++) {
-		dep_count[gi] = 0;
-		dependents[gi] = {};
-		seen[gi] = -1;
-	}
-	for (i32 gi = 0; gi < group_count; gi++) {
-		GlobalGroup const &group = g->groups[gi];
-		for (i32 k = 0; k < group.count; k++) {
-			i32 v = g->members[group.start + k];
-			for (i32 i = g->offsets[v]; i < g->offsets[v+1]; i++) {
-				i32 dep = g->group_of[g->targets[i]];
-				if (dep != gi && seen[dep] != gi) {
-					seen[dep] = gi;
-					dep_count[gi] += 1;
-					if (dependents[dep].allocator.proc == nullptr) {
-						array_init(&dependents[dep], heap_allocator());
-					}
-					array_add(&dependents[dep], gi);
-				}
-			}
-		}
-		if (dep_count[gi] == 0) {
-			array_add(&ready, gi);
-		}
-	}
-
-	u64 state = seed;
-	isize checked = 0;
-	while (ready.count > 0) {
-		isize i = cast(isize)(global_group_random(&state) % cast(u64)ready.count);
-		i32 gi = ready[i];
-		ready[i] = ready[ready.count-1];
-		array_pop(&ready);
-
-		check_global_group(c, g, gi);
-		checked += 1;
-		for (i32 next : dependents[gi]) {
-			if (--dep_count[next] == 0) {
-				array_add(&ready, next);
-			}
-		}
-	}
-	GB_ASSERT(checked == group_count);
-}
-
-gb_internal void destroy_global_groups(GlobalGroupGraph *g) {
-	array_free(&g->nodes);
-	map_destroy(&g->node_of);
-	array_free(&g->offsets);
-	array_free(&g->targets);
-	array_free(&g->group_of);
-	array_free(&g->groups);
-	array_free(&g->members);
-}
-
-// -internal-global-entity-graph: the graph the groups come from, weighted by the measured self times
-gb_internal void print_global_groups(GlobalGroupGraph *g) {
-	u64 const freq = time_stamp__freq();
-	i32 group_count = cast(i32)g->groups.count;
-
-	auto ticks = array_make<u64>(heap_allocator(), group_count);
-	auto path  = array_make<u64>(heap_allocator(), group_count);
-	auto seen  = array_make<i32>(heap_allocator(), group_count);
-	defer (array_free(&ticks));
-	defer (array_free(&path));
-	defer (array_free(&seen));
-
-	u64   total   = 0;
-	i32   largest = 0;
-	isize cyclic  = 0;
-	mutex_lock(&global_entity_time_mutex);
-	for (i32 gi = 0; gi < group_count; gi++) {
-		GlobalGroup const &group = g->groups[gi];
-		ticks[gi] = 0;
-		seen[gi] = -1;
-		for (i32 k = 0; k < group.count; k++) {
-			GlobalEntityTime *t = map_get(&global_entity_times, g->nodes[g->members[group.start + k]]);
-			ticks[gi] += t ? t->ticks : 0;
-		}
-		total += ticks[gi];
-		largest = gb_max(largest, group.count);
-		cyclic += group.count > 1;
-	}
-	mutex_unlock(&global_entity_time_mutex);
-
-	u64 critical = 0;
-	for (i32 gi = 0; gi < group_count; gi++) {
-		GlobalGroup const &group = g->groups[gi];
-		u64 longest = 0;
-		for (i32 k = 0; k < group.count; k++) {
-			i32 v = g->members[group.start + k];
-			for (i32 i = g->offsets[v]; i < g->offsets[v+1]; i++) {
-				i32 dep = g->group_of[g->targets[i]];
-				if (dep != gi && seen[dep] != gi) {
-					seen[dep] = gi;
-					longest = gb_max(longest, path[dep]);
-				}
-			}
-		}
-		path[gi] = ticks[gi] + longest;
-		critical = gb_max(critical, path[gi]);
-	}
-
-	f64 total_ms = global_graph_ms(total, freq);
-	f64 critical_ms = global_graph_ms(critical, freq);
-	gb_printf_err("Global groups (syntactic graph, as scheduled)\n");
-	gb_printf_err("  nodes: %td, edges: %td, groups: %d (%td with a cycle), largest has %d entities\n",
-	              g->nodes.count, g->targets.count, group_count, cyclic, largest);
-	gb_printf_err("  critical path: %.3f ms of %.3f ms -> at most %.2fx speedup\n",
-	              critical_ms, total_ms, critical_ms > 0 ? total_ms/critical_ms : 0.0);
-	gb_printf_err("  missing edges: %td\n", g->missing_edges);
-}
-
-gb_internal void check_all_global_entities(Checker *c) {
-	in_single_threaded_checker_stage.store(true, std::memory_order_relaxed);
-
-	// NOTE(bill): the runtime types the checker looks up by name rather than through a declaration
-	init_preload(c);
-	{
-		u32 hash = 0;
-		InternedString name = string_interner_insert(str_lit("Load_Directory_File"), 0, &hash);
-		if (scope_lookup_current(c->info.runtime_package->scope, name, hash) != nullptr) {
-			init_core_load_directory_file(c);
-		}
-	}
-
-	TIME_SECTION("check all global entities - build groups");
-	GlobalGroupGraph *g = &global_groups;
-	build_global_groups(c, g);
-
-	TIME_SECTION("check all global entities - check groups");
-	g->active = true;
-	g->current_group = -1;
-	check_global_groups(c, g);
-	g->active = false;
-
-	if (build_context.internal_check_global_edges && g->missing_edges > 0) {
-		gb_printf_err("%td missing global dependencies\n", g->missing_edges);
-		gb_exit(1);
-	}
-
-	in_single_threaded_checker_stage.store(false, std::memory_order_relaxed);
-}
diff --git a/src/checker_global_when.cpp b/src/checker_global_when.cpp
deleted file mode 100644
index 2b4187b68..000000000
--- a/src/checker_global_when.cpp
+++ /dev/null
@@ -1,474 +0,0 @@
-// Global 'when's and 'foreign' blocks: every name one may declare is a placeholder in its scope, and the
-// first lookup of a placeholder resolves them, so the order of files and declarations does not matter
-
-struct GlobalDeclSource {
-	Ast *             node; // WhenStmt or ForeignBlockDecl
-	AstFile *         file;
-	GlobalDeclSource *parent;
-	bool              in_else; // within the else branch of `parent`
-	bool              reachable;
-	bool              reported_cycle;
-	EntityState       state;
-	ForeignContext    foreign_context; // of a resolved 'foreign' block
-};
-
-struct GlobalDeclSourceFrame {
-	GlobalDeclSource *source;
-	InternedString    needs; // the placeholder being resolved for it
-};
-
-gb_global Array<GlobalDeclSource *>    global_decl_sources;
-gb_global Array<GlobalDeclSourceFrame> global_decl_source_stack;
-gb_global Array<Scope *>               global_placeholder_scopes;
-gb_global CheckerContext               global_decl_source_export_ctx;
-gb_global UntypedExprInfoMap           global_decl_source_export_untyped;
-
-enum : u8 {
-	PlaceholderScope_File = 1<<0,
-	PlaceholderScope_Pkg  = 1<<1,
-};
-
-// -1 when 'private' has a value that is not a string literal
-gb_internal i32 syntactic_visibility(Array<Ast *> const &attributes) {
-	for (Ast *attr : attributes) {
-		if (attr->kind != Ast_Attribute) {
-			continue;
-		}
-		for (Ast *elem : attr->Attribute.elems) {
-			if (elem->kind == Ast_Ident && elem->Ident.token.string == "private") {
-				return EntityVisiblity_PrivateToPackage;
-			}
-			if (elem->kind == Ast_FieldValue &&
-			    elem->FieldValue.field->kind == Ast_Ident &&
-			    elem->FieldValue.field->Ident.token.string == "private") {
-				Ast *value = elem->FieldValue.value;
-				if (value != nullptr && value->tav.value.kind == ExactValue_String) {
-					return value->tav.value.value_string == "file" ? EntityVisiblity_PrivateToFile : EntityVisiblity_PrivateToPackage;
-				}
-				return -1;
-			}
-		}
-	}
-	return EntityVisiblity_Public;
-}
-
-gb_internal bool has_syntactic_attribute(Array<Ast *> const &attributes, String const &name) {
-	for (Ast *attr : attributes) {
-		if (attr->kind != Ast_Attribute) {
-			continue;
-		}
-		for (Ast *elem : attr->Attribute.elems) {
-			Ast *field = elem->kind == Ast_FieldValue ? elem->FieldValue.field : elem;
-			if (field->kind == Ast_Ident && field->Ident.token.string == name) {
-				return true;
-			}
-		}
-	}
-	return false;
-}
-
-gb_internal void add_placeholder(Scope *s, InternedString name, GlobalDeclSource *src) {
-	if (name.value == 0 || name.is_blank()) {
-		return;
-	}
-	if (s->placeholders == nullptr) {
-		s->placeholders = permanent_alloc_item<PtrMap<u64, GlobalDeclSource *>>();
-		map_init(s->placeholders);
-		array_add(&global_placeholder_scopes, s);
-	}
-	u64 key = name.value;
-	for (auto *e = multi_map_find_first(s->placeholders, key); e != nullptr; e = multi_map_find_next(s->placeholders, e)) {
-		if (e->value == src) {
-			return;
-		}
-	}
-	multi_map_insert(s->placeholders, key, src);
-}
-
-gb_internal void add_placeholders(AstFile *f, u8 scopes, InternedString name, GlobalDeclSource *src) {
-	if (scopes & PlaceholderScope_File) {
-		add_placeholder(f->scope, name, src);
-	}
-	if (scopes & PlaceholderScope_Pkg) {
-		add_placeholder(f->pkg->scope, name, src);
-	}
-}
-
-gb_internal GlobalDeclSource *add_global_decl_source(Ast *node, AstFile *f, GlobalDeclSource *parent, bool in_else) {
-	GlobalDeclSource *src = permanent_alloc_item<GlobalDeclSource>();
-	src->node      = node;
-	src->file      = f;
-	src->parent    = parent;
-	src->in_else   = in_else;
-	src->reachable = true;
-	src->state     = EntityState_Unresolved;
-	array_add(&global_decl_sources, src);
-	return src;
-}
-
-gb_internal void scan_global_decl_sources(AstFile *f, Slice<Ast *> const &stmts, GlobalDeclSource *owner, bool in_else, i32 foreign_visibility);
-
-gb_internal void scan_global_when_stmt(AstFile *f, Ast *node, GlobalDeclSource *parent, bool in_else, i32 foreign_visibility) {
-	ast_node(ws, WhenStmt, node);
-	GlobalDeclSource *src = add_global_decl_source(node, f, parent, in_else);
-	if (ws->body != nullptr && ws->body->kind == Ast_BlockStmt) {
-		scan_global_decl_sources(f, ws->body->BlockStmt.stmts, src, false, foreign_visibility);
-	}
-	if (ws->else_stmt != nullptr) {
-		switch (ws->else_stmt->kind) {
-		case Ast_BlockStmt:
-			scan_global_decl_sources(f, ws->else_stmt->BlockStmt.stmts, src, true, foreign_visibility);
-			break;
-		case Ast_WhenStmt:
-			scan_global_when_stmt(f, ws->else_stmt, src, true, foreign_visibility);
-			break;
-		}
-	}
-}
-
-gb_internal void scan_global_decl_sources(AstFile *f, Slice<Ast *> const &stmts, GlobalDeclSource *owner, bool in_else, i32 foreign_visibility) {
-	// NOTE(bill): `owner == nullptr` is the file scope itself, whose other declarations are already collected
-	for (Ast *decl : stmts) {
-		switch (decl->kind) {
-		case_ast_node(vd, ValueDecl, decl);
-			if (owner == nullptr) {
-				break;
-			}
-			i32 visibility = syntactic_visibility(vd->attributes);
-			if (visibility == EntityVisiblity_Public) {
-				visibility = foreign_visibility;
-			}
-			if (visibility == EntityVisiblity_Public && (f->flags & AstFile_IsPrivateFile)) {
-				visibility = EntityVisiblity_PrivateToFile;
-			}
-			u8 scopes = PlaceholderScope_Pkg;
-			if (visibility == EntityVisiblity_PrivateToFile) {
-				scopes = PlaceholderScope_File;
-			} else if (visibility < 0) {
-				scopes = PlaceholderScope_File|PlaceholderScope_Pkg;
-			}
-			for (Ast *name : vd->names) {
-				if (name->kind == Ast_Ident) {
-					add_placeholders(f, scopes, name->Ident.interned, owner);
-				}
-			}
-		case_end;
-
-		case_ast_node(fl, ForeignImportDecl, decl);
-			if (owner == nullptr) {
-				break;
-			}
-			String library_name = fl->library_name.string;
-			if (library_name.len == 0 && fl->fullpaths.count != 0) {
-				library_name = path_to_entity_name(fl->library_name.string, fl->fullpaths[0]);
-			}
-			if (library_name.len != 0) {
-				u8 scopes = has_syntactic_attribute(fl->attributes, str_lit("export")) ? PlaceholderScope_Pkg : PlaceholderScope_File;
-				add_placeholders(f, scopes, string_interner_insert(library_name), owner);
-			}
-		case_end;
-
-		case_ast_node(fb, ForeignBlockDecl, decl);
-			GlobalDeclSource *src = add_global_decl_source(decl, f, owner, in_else);
-			if (fb->body != nullptr && fb->body->kind == Ast_BlockStmt) {
-				scan_global_decl_sources(f, fb->body->BlockStmt.stmts, src, false, syntactic_visibility(fb->attributes));
-			}
-		case_end;
-
-		case_ast_node(ws, WhenStmt, decl);
-			scan_global_when_stmt(f, decl, owner, in_else, foreign_visibility);
-		case_end;
-
-		case_ast_node(es, ExprStmt, decl);
-			if (owner == nullptr && es->expr->kind == Ast_CallExpr &&
-			    es->expr->CallExpr.proc->kind == Ast_BasicDirective &&
-			    (decl->state_flags & StateFlag_BeenHandled) == 0) {
-				decl->state_flags |= StateFlag_BeenHandled;
-				array_add(&f->delayed_decls_queues[AstDelayQueue_Expr], es->expr);
-			}
-		case_end;
-		}
-	}
-}
-
-gb_internal bool is_global_decl_source_in_when(GlobalDeclSource *src) {
-	for (; src != nullptr; src = src->parent) {
-		if (src->node->kind == Ast_WhenStmt) {
-			return true;
-		}
-	}
-	return false;
-}
-
-gb_internal Slice<Ast *> global_decl_source_taken_stmts(GlobalDeclSource *src) {
-	if (src->node->kind == Ast_ForeignBlockDecl) {
-		Ast *body = src->node->ForeignBlockDecl.body;
-		if (body != nullptr && body->kind == Ast_BlockStmt) {
-			return body->BlockStmt.stmts;
-		}
-		return {};
-	}
-	ast_node(ws, WhenStmt, src->node);
-	if (ws->determined_cond) {
-		if (ws->body != nullptr && ws->body->kind == Ast_BlockStmt) {
-			return ws->body->BlockStmt.stmts;
-		}
-	} else if (ws->else_stmt != nullptr && ws->else_stmt->kind == Ast_BlockStmt) {
-		return ws->else_stmt->BlockStmt.stmts;
-	}
-	return {};
-}
-
-gb_internal void collect_global_decl_source_stmts(CheckerContext *ctx, Slice<Ast *> const &stmts) {
-	AstFile *f = ctx->file;
-	for (Ast *decl : stmts) {
-		if (decl->kind == Ast_ValueDecl) {
-			check_collect_value_decl(ctx, decl);
-		}
-	}
-	check_export_entities_in_pkg(&global_decl_source_export_ctx, f->pkg, &global_decl_source_export_untyped);
-
-	// NOTE(bill): after the value declarations, as their attributes are evaluated
-	for (Ast *decl : stmts) {
-		switch (decl->kind) {
-		case_ast_node(fl, ForeignImportDecl, decl);
-			check_add_foreign_import_decl(ctx, decl);
-		case_end;
-
-		case_ast_node(es, ExprStmt, decl);
-			if (es->expr->kind == Ast_CallExpr && es->expr->CallExpr.proc->kind == Ast_BasicDirective &&
-			    (decl->state_flags & StateFlag_BeenHandled) == 0) {
-				decl->state_flags |= StateFlag_BeenHandled;
-				array_add(&f->delayed_decls_queues[AstDelayQueue_Expr], es->expr);
-			}
-		case_end;
-		}
-	}
-}
-
-gb_internal Token global_decl_source_token(GlobalDeclSource *src) {
-	if (src->node->kind == Ast_WhenStmt) {
-		return src->node->WhenStmt.token;
-	}
-	return src->node->ForeignBlockDecl.token;
-}
-
-gb_internal void report_global_decl_source_cycle(GlobalDeclSource *src, InternedString needed) {
-	if (src->reported_cycle) {
-		return;
-	}
-	src->reported_cycle = true;
-
-	isize start = 0;
-	for (isize i = global_decl_source_stack.count-1; i >= 0; i--) {
-		if (global_decl_source_stack[i].source == src) {
-			start = i;
-			break;
-		}
-	}
-
-	ERROR_BLOCK();
-	Token token = global_decl_source_token(src);
-	error(token, "Cyclic dependency between global '%.*s' declarations", LIT(token.string));
-	for (isize i = start; i < global_decl_source_stack.count; i++) {
-		Token t = global_decl_source_token(global_decl_source_stack[i].source);
-		InternedString name = i+1 < global_decl_source_stack.count ? global_decl_source_stack[i].needs : needed;
-		error_line("\t'%.*s' at %s needs '%s', which may be declared by\n", LIT(t.string), token_pos_to_string(t.pos), name.cstring());
-	}
-	error_line("\t'%.*s' at %s\n", LIT(token.string), token_pos_to_string(token.pos));
-}
-
-gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedString needed) {
-	if (src->state == EntityState_Resolved) {
-		return;
-	}
-	if (src->state == EntityState_InProgress) {
-		report_global_decl_source_cycle(src, needed);
-		return;
-	}
-
-	GlobalDeclSource *foreign_block = nullptr;
-	if (src->parent != nullptr) {
-		GlobalDeclSource *parent = src->parent;
-		resolve_global_decl_source(parent, needed);
-		if (parent->state != EntityState_Resolved) {
-			return;
-		}
-		bool reachable = parent->reachable;
-		if (parent->node->kind == Ast_WhenStmt) {
-			reachable = reachable && parent->node->WhenStmt.determined_cond != src->in_else;
-		}
-		if (!reachable) {
-			src->reachable = false;
-			src->state = EntityState_Resolved;
-			return;
-		}
-		for (GlobalDeclSource *p = parent; p != nullptr; p = p->parent) {
-			if (p->node->kind == Ast_ForeignBlockDecl) {
-				foreign_block = p;
-				break;
-			}
-		}
-	}
-
-	src->state = EntityState_InProgress;
-	array_add(&global_decl_source_stack, GlobalDeclSourceFrame{src, {}});
-
-	CheckerContext ctx = {};
-	init_checker_context(&ctx, global_checker_ptr.load(std::memory_order_relaxed));
-	UntypedExprInfoMap untyped = {};
-	reset_checker_context(&ctx, src->file, &untyped);
-	if (foreign_block != nullptr) {
-		ctx.foreign_context = foreign_block->foreign_context;
-	}
-
-	if (src->node->kind == Ast_WhenStmt) {
-		ast_node(ws, WhenStmt, src->node);
-		Operand operand = {Addressing_Invalid};
-		check_expr(&ctx, &operand, ws->cond);
-		if (operand.mode != Addressing_Invalid && !is_type_boolean(operand.type)) {
-			error(ws->cond, "Non-boolean condition in 'when' statement");
-		}
-		if (operand.mode != Addressing_Constant) {
-			error(ws->cond, "Non-constant condition in 'when' statement");
-		}
-		ws->is_cond_determined = true;
-		ws->determined_cond = operand.value.kind == ExactValue_Bool && operand.value.value_bool;
-		if (ws->body == nullptr || ws->body->kind != Ast_BlockStmt) {
-			error(ws->cond, "Invalid body for 'when' statement");
-		} else if (ws->else_stmt != nullptr && ws->else_stmt->kind != Ast_BlockStmt && ws->else_stmt->kind != Ast_WhenStmt) {
-			error(ws->else_stmt, "Invalid 'else' statement in 'when' statement");
-		}
-	} else {
-		ast_node(fb, ForeignBlockDecl, src->node);
-		if (fb->foreign_library->kind == Ast_Ident) {
-			ctx.foreign_context.curr_library = fb->foreign_library;
-		} else {
-			error(fb->foreign_library, "Foreign block name must be an identifier or 'export'");
-			ctx.foreign_context.curr_library = nullptr;
-		}
-		check_decl_attributes(&ctx, fb->attributes, foreign_block_decl_attribute, nullptr);
-		src->foreign_context = ctx.foreign_context;
-	}
-
-	// NOTE: resolved before its declarations are collected, which evaluates the attributes of 'foreign import's
-	src->state = EntityState_Resolved;
-	array_pop(&global_decl_source_stack);
-
-	collect_global_decl_source_stmts(&ctx, global_decl_source_taken_stmts(src));
-
-	add_untyped_expressions(ctx.info, &untyped);
-	map_destroy(&untyped);
-	destroy_checker_context(&ctx);
-}
-
-gb_internal Entity *force_scope_placeholders(Scope *s, InternedString name, u32 hash) {
-	PtrMap<u64, GlobalDeclSource *> *m = s->placeholders;
-	bool forced = false;
-	for (auto *e = multi_map_find_first(m, cast(u64)name.value); e != nullptr; e = multi_map_find_next(m, e)) {
-		GlobalDeclSource *src = e->value;
-		if (src->state != EntityState_Resolved) {
-			if (global_decl_source_stack.count > 0) {
-				global_decl_source_stack[global_decl_source_stack.count-1].needs = name;
-			}
-			resolve_global_decl_source(src, name);
-			forced = true;
-		}
-	}
-	if (!forced) {
-		return nullptr;
-	}
-	rw_mutex_shared_lock(&s->mutex);
-	Entity *found = scope_map_get(&s->elements, name, hash);
-	rw_mutex_shared_unlock(&s->mutex);
-	return found;
-}
-
-gb_internal void check_vet_when_shadowing_entity(Entity *e) {
-	if (e == nullptr || e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
-		return;
-	}
-	InternedString name = entity_interned_name(e);
-	u32 hash = e->interned_name_hash.load(std::memory_order_relaxed);
-	Scope *outer = e->scope->parent;
-	if (scope_map_get(&e->scope->elements, name, hash) != e) {
-		outer = outer->parent; // in the package scope
-	}
-	if (outer == nullptr) {
-		return;
-	}
-	Entity *shadowed = scope_lookup(outer, name, hash);
-	if (shadowed == nullptr || shadowed == e) {
-		return;
-	}
-	if (shadowed->scope == builtin_pkg->scope) {
-		error(e->token, "Declaration of '%.*s' within a global 'when' shadows the builtin '%.*s'", LIT(e->token.string), LIT(e->token.string));
-	} else {
-		error(e->token, "Declaration of '%.*s' within a global 'when' shadows the declaration at %s", LIT(e->token.string), token_pos_to_string(shadowed->token.pos));
-	}
-}
-
-gb_internal void check_vet_when_shadowing(void) {
-	for (GlobalDeclSource *src : global_decl_sources) {
-		if (!src->reachable || src->state != EntityState_Resolved) {
-			continue;
-		}
-		if ((ast_file_vet_flags(src->file) & VetFlag_WhenShadowing) == 0 || !is_global_decl_source_in_when(src)) {
-			continue;
-		}
-		for (Ast *decl : global_decl_source_taken_stmts(src)) {
-			if (decl->kind == Ast_ValueDecl) {
-				for (Ast *name : decl->ValueDecl.names) {
-					if (name->kind == Ast_Ident) {
-						check_vet_when_shadowing_entity(name->Ident.entity.load());
-					}
-				}
-			} else if (decl->kind == Ast_ForeignImportDecl) {
-				Token token = decl->ForeignImportDecl.library_name;
-				InternedString name = string_interner_insert(token.string);
-				for (Scope *s = src->file->scope; s != nullptr && s != builtin_pkg->scope; s = s->parent) {
-					Entity *e = scope_map_get(&s->elements, name, name.hash());
-					if (e != nullptr && e->kind == Entity_LibraryName && e->LibraryName.decl == decl) {
-						check_vet_when_shadowing_entity(e);
-						break;
-					}
-				}
-			}
-		}
-	}
-}
-
-// Placeholders for every file, then every source resolved in package, file and source order, which
-// only matters for which errors are reported
-gb_internal void resolve_global_decl_sources(Checker *c, Array<ImportGraphNode *> const &package_order) {
-	array_init(&global_decl_sources,       heap_allocator());
-	array_init(&global_decl_source_stack,  heap_allocator());
-	array_init(&global_placeholder_scopes, heap_allocator());
-	init_checker_context(&global_decl_source_export_ctx, c);
-	defer (destroy_checker_context(&global_decl_source_export_ctx));
-
-	u64 stage_start = global_import_stage_begin();
-	for (ImportGraphNode *node : package_order) {
-		for (AstFile *f : node->pkg->files) {
-			scan_global_decl_sources(f, f->decls, nullptr, false, EntityVisiblity_Public);
-		}
-	}
-	global_import_stage_end(GlobalImportStage_Placeholders, stage_start);
-
-	stage_start = global_import_stage_begin();
-	for (GlobalDeclSource *src : global_decl_sources) {
-		resolve_global_decl_source(src, {});
-	}
-	GB_ASSERT(global_decl_source_stack.count == 0);
-
-	for (Scope *s : global_placeholder_scopes) {
-		map_destroy(s->placeholders);
-		s->placeholders = nullptr;
-	}
-	array_clear(&global_placeholder_scopes);
-
-	check_vet_when_shadowing();
-	global_import_stage_end(GlobalImportStage_DeclSources, stage_start);
-
-	map_destroy(&global_decl_source_export_untyped);
-}

From 66c4fe1d4990359501bd327635bfa717e59227a2 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 18:49:51 +0100
Subject: [PATCH 128/215] Decide cycles of global `when`s by trying every
 choice of their branches; ambiguous or contradictory cycles are errors

---
 src/check_decl.cpp                            |   5 +
 src/checker.cpp                               |  35 +-
 src/checker.hpp                               |   9 +
 src/checker_global.cpp                        | 820 ++++++++++++++++--
 tests/issues/run.bat                          |   4 +-
 tests/issues/run.sh                           |   9 +-
 .../issues/test_issue_global_when_cycle.odin  |   8 +-
 7 files changed, 829 insertions(+), 61 deletions(-)

diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index fd9672f21..3343465ae 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -2140,6 +2140,11 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 	if (e->state == EntityState_Resolved)  {
 		return;
 	}
+	GlobalWhenTrialEntityScope trial_scope = {};
+	if (global_when_trial != nullptr && !global_when_trial_begin_entity(e, &trial_scope)) {
+		return;
+	}
+	defer (global_when_trial_end_entity(&trial_scope));
 	bool is_lazy = (e->flags & EntityFlag_Lazy) != 0;
 	if (is_lazy) {
 		mutex_lock(&ctx->info->lazy_mutex);
diff --git a/src/checker.cpp b/src/checker.cpp
index 7acd8f3f8..6bc02b9f6 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -387,8 +387,8 @@ gb_internal void check_open_scope(CheckerContext *c, Ast *node) {
 		break;
 	}
 	if (c->decl && c->decl->proc_lit) {
-		// NOTE: numbered by position rather than in checking order, as that order varies (e.g. with
-		// which caller instantiates a record first); 0 is the procedure's own scope
+		// NOTE(bill): numbered by position rather than in checking order, as that order varies
+		// (e.g. with which caller instantiates a record first); 0 is the procedure's own scope
 		scope->index = node->kind == Ast_ProcType ? 0 : 1 + ast_token(node).pos.offset;
 	}
 	c->scope = scope;
@@ -402,12 +402,19 @@ gb_internal void check_close_scope(CheckerContext *c) {
 
 gb_internal Entity *force_scope_placeholders(Scope *s, InternedString name, u32 hash);
 
+struct GlobalWhenTrial;
+gb_global GlobalWhenTrial *global_when_trial;
+gb_internal Entity *global_when_trial_lookup(Scope *s, InternedString name, u32 hash, Entity *found);
+
 gb_internal Entity *scope_lookup_current(Scope *s, InternedString name, u32 hash) {
 	// Entity **found = string_map_get(&s->elements, name);
 	if (hash == 0) {
 		hash = name.hash();
 	}
 	Entity *found = scope_map_get(&s->elements, name, hash);
+	if (global_when_trial != nullptr) {
+		found = global_when_trial_lookup(s, name, hash, found);
+	}
 	if (found) {
 		return found;
 	}
@@ -433,6 +440,9 @@ gb_internal void scope_lookup_parent(Scope *scope, InternedString name, Scope **
 			if (!is_single_threaded) rw_mutex_shared_lock(&s->mutex);
 			found = scope_map_get(&s->elements, name, hash);
 			if (!is_single_threaded) rw_mutex_shared_unlock(&s->mutex);
+			if (global_when_trial != nullptr) {
+				found = global_when_trial_lookup(s, name, hash, found);
+			}
 			if (found == nullptr && s->placeholders != nullptr) {
 				found = force_scope_placeholders(s, name, hash);
 			}
@@ -2093,8 +2103,8 @@ gb_internal bool redeclaration_error(String name, Entity *prev, Entity *found) {
 			// NOTE(bill): Error should have been handled already
 			return false;
 		}
-		// NOTE: the insertion order is a race between the files of a package, so order the pair by
-		// position; the later declaration stays the anchor, as it is the one being reported
+		// NOTE(bill): the insertion order is a race between the files of a package, so order the pair by position;
+		// the later declaration stays the anchor, as it is the one being reported
 		TokenPos first = prev->token.pos;
 		TokenPos second = pos;
 		if (second < first) {
@@ -2276,6 +2286,19 @@ gb_internal void add_entity_and_decl_info(CheckerContext *c, Ast *identifier, En
 		e->flags &= ~EntityFlag_Lazy;
 	}
 
+	if (c->trial_entities != nullptr) {
+		// NOTE(bill): a scratch copy for a global 'when' trial, put in no scope or queue
+		e->flags &= ~EntityFlag_Lazy;
+		e->file = c->file;
+		e->decl_info = d;
+		e->pkg = c->pkg;
+		d->entity.store(e);
+		identifier->Ident.entity = e;
+		e->identifier = identifier;
+		array_add(c->trial_entities, e);
+		return;
+	}
+
 	if (e->scope != nullptr) {
 		Scope *scope = e->scope;
 
@@ -5124,7 +5147,9 @@ gb_internal void check_collect_value_decl(CheckerContext *c, Ast *decl) {
 				}
 			}
 
-			check_builtin_attributes(c, e, &d->attributes);
+			if (c->trial_entities == nullptr) {
+				check_builtin_attributes(c, e, &d->attributes);
+			}
 
 			bool is_exported = entity_visibility_kind != EntityVisiblity_PrivateToFile;
 			add_entity_and_decl_info(c, name, e, d, is_exported);
diff --git a/src/checker.hpp b/src/checker.hpp
index 05eed75ef..633790405 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -850,6 +850,8 @@ struct CheckerContext {
 	u8         bit_field_bit_size;
 	Scope *    polymorphic_scope;
 
+	Array<Entity *> *trial_entities; // global declarations are collected here only, for a global 'when' trial
+
 	Ast *assignment_lhs_hint;
 	Ast *asm_template_hint;
 };
@@ -919,6 +921,13 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *c, Ast *decl);
 gb_internal void check_entity_decl(CheckerContext *c, Entity *e, DeclInfo *d, Type *named_type);
 gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e);
 
+struct GlobalWhenTrialEntityScope {
+	struct GlobalWhenTrial *trial;
+	i32 mute_depth;
+};
+gb_internal bool global_when_trial_begin_entity(Entity *e, GlobalWhenTrialEntityScope *scope);
+gb_internal void global_when_trial_end_entity(GlobalWhenTrialEntityScope *scope);
+
 // -internal-global-entity-graph
 struct GlobalEntityTimingFrame {
 	u64  start;
diff --git a/src/checker_global.cpp b/src/checker_global.cpp
index cf9bb6e84..ccc212505 100644
--- a/src/checker_global.cpp
+++ b/src/checker_global.cpp
@@ -83,17 +83,61 @@ gb_internal void global_entity_timing_end(GlobalEntityTimingFrame const &f, Enti
 // Global 'when's and 'foreign' blocks: every name one may declare is a placeholder in its scope, and the
 // first lookup of a placeholder resolves them, so the order of files and declarations does not matter
 
+struct GlobalDeclSourceName {
+	InternedString name;
+	Scope *        scope;
+	Ast *          decl;    // ValueDecl or ForeignImportDecl
+	bool           in_else; // within the else branch of a 'when'
+};
+
+struct GlobalWhenCycle;
+
 struct GlobalDeclSource {
 	Ast *             node; // WhenStmt or ForeignBlockDecl
 	AstFile *         file;
 	GlobalDeclSource *parent;
-	bool              in_else; // within the else branch of `parent`
+	bool              in_else;
 	bool              reachable;
 	bool              reported_cycle;
 	EntityState       state;
-	ForeignContext    foreign_context; // of a resolved 'foreign' block
+	ForeignContext    foreign_context;
+
+	Array<GlobalDeclSourceName> names;
+	GlobalWhenCycle * cycle;
+	i32               cycle_index;
+	bool              predetermined;
+	bool              predetermined_cond;
 };
 
+// A possible cycle between global 'when's, found from syntax; the branches are chosen by trying every
+// combination, see `search_global_when_cycle`
+struct GlobalWhenCycle {
+	Array<GlobalDeclSource *> sources; // in source order
+	PtrSet<Ast *>             decls;   // declarations in the cycle, whose checking depends on the choice
+	bool                      searched;
+};
+
+// One condition evaluated for one choice of branches: lookups see the declarations of the chosen
+// branches, and scratch copies of the declarations in `cycle->decls`
+struct GlobalWhenTrial {
+	GlobalWhenCycle *               cycle;
+	u32                             mask;      // bit i: `cycle->sources[i]` takes its first branch
+	u32                             reachable;
+	u32                             used;      // sources whose chosen branch a lookup found
+	isize                           real_depth; // within the check of an entity outside the trial
+	bool                            unsupported;
+	bool                            broken;    // that entity reached the cycle, which the graph missed
+	PtrMap<Ast *, Array<Entity *> *> decl_entities;
+	PtrSet<Entity *>                scratch;
+};
+
+gb_global isize global_when_cycle_count;
+gb_global isize global_when_cycle_sources;
+gb_global isize global_when_trial_count;
+
+gb_internal void find_global_when_cycles(void);
+gb_internal void search_global_when_cycle(GlobalWhenCycle *cycle);
+
 struct GlobalDeclSourceFrame {
 	GlobalDeclSource *source;
 	InternedString    needs; // the placeholder being resolved for it
@@ -167,12 +211,20 @@ gb_internal void add_placeholder(Scope *s, InternedString name, GlobalDeclSource
 	multi_map_insert(s->placeholders, key, src);
 }
 
-gb_internal void add_placeholders(AstFile *f, u8 scopes, InternedString name, GlobalDeclSource *src) {
+gb_internal void add_placeholders(AstFile *f, u8 scopes, InternedString name, GlobalDeclSource *src, Ast *decl, bool in_else) {
+	if (name.value == 0 || name.is_blank()) {
+		return;
+	}
+	if (src->names.allocator.proc == nullptr) {
+		array_init(&src->names, heap_allocator());
+	}
 	if (scopes & PlaceholderScope_File) {
 		add_placeholder(f->scope, name, src);
+		array_add(&src->names, GlobalDeclSourceName{name, f->scope, decl, in_else});
 	}
 	if (scopes & PlaceholderScope_Pkg) {
 		add_placeholder(f->pkg->scope, name, src);
+		array_add(&src->names, GlobalDeclSourceName{name, f->pkg->scope, decl, in_else});
 	}
 }
 
@@ -231,7 +283,7 @@ gb_internal void scan_global_decl_sources(AstFile *f, Slice<Ast *> const &stmts,
 			}
 			for (Ast *name : vd->names) {
 				if (name->kind == Ast_Ident) {
-					add_placeholders(f, scopes, name->Ident.interned, owner);
+					add_placeholders(f, scopes, name->Ident.interned, owner, decl, in_else);
 				}
 			}
 		case_end;
@@ -246,7 +298,7 @@ gb_internal void scan_global_decl_sources(AstFile *f, Slice<Ast *> const &stmts,
 			}
 			if (library_name.len != 0) {
 				u8 scopes = has_syntactic_attribute(fl->attributes, str_lit("export")) ? PlaceholderScope_Pkg : PlaceholderScope_File;
-				add_placeholders(f, scopes, string_interner_insert(library_name), owner);
+				add_placeholders(f, scopes, string_interner_insert(library_name), owner, decl, in_else);
 			}
 		case_end;
 
@@ -360,14 +412,19 @@ gb_internal void report_global_decl_source_cycle(GlobalDeclSource *src, Interned
 	error_line("\t'%.*s' at %s\n", LIT(token.string), token_pos_to_string(token.pos));
 }
 
-gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedString needed) {
-	if (src->state == EntityState_Resolved) {
-		return;
-	}
+gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedString needed);
+
+gb_internal void resolve_global_decl_source_internal(GlobalDeclSource *src, InternedString needed) {
 	if (src->state == EntityState_InProgress) {
 		report_global_decl_source_cycle(src, needed);
 		return;
 	}
+	if (src->cycle != nullptr && !src->cycle->searched) {
+		search_global_when_cycle(src->cycle);
+		if (src->state == EntityState_Resolved) {
+			return;
+		}
+	}
 
 	GlobalDeclSource *foreign_block = nullptr;
 	if (src->parent != nullptr) {
@@ -406,16 +463,21 @@ gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedStrin
 
 	if (src->node->kind == Ast_WhenStmt) {
 		ast_node(ws, WhenStmt, src->node);
-		Operand operand = {Addressing_Invalid};
-		check_expr(&ctx, &operand, ws->cond);
-		if (operand.mode != Addressing_Invalid && !is_type_boolean(operand.type)) {
-			error(ws->cond, "Non-boolean condition in 'when' statement");
+		if (src->predetermined) {
+			ws->is_cond_determined = true;
+			ws->determined_cond = src->predetermined_cond;
+		} else {
+			Operand operand = {Addressing_Invalid};
+			check_expr(&ctx, &operand, ws->cond);
+			if (operand.mode != Addressing_Invalid && !is_type_boolean(operand.type)) {
+				error(ws->cond, "Non-boolean condition in 'when' statement");
+			}
+			if (operand.mode != Addressing_Constant) {
+				error(ws->cond, "Non-constant condition in 'when' statement");
+			}
+			ws->is_cond_determined = true;
+			ws->determined_cond = operand.value.kind == ExactValue_Bool && operand.value.value_bool;
 		}
-		if (operand.mode != Addressing_Constant) {
-			error(ws->cond, "Non-constant condition in 'when' statement");
-		}
-		ws->is_cond_determined = true;
-		ws->determined_cond = operand.value.kind == ExactValue_Bool && operand.value.value_bool;
 		if (ws->body == nullptr || ws->body->kind != Ast_BlockStmt) {
 			error(ws->cond, "Invalid body for 'when' statement");
 		} else if (ws->else_stmt != nullptr && ws->else_stmt->kind != Ast_BlockStmt && ws->else_stmt->kind != Ast_WhenStmt) {
@@ -433,7 +495,7 @@ gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedStrin
 		src->foreign_context = ctx.foreign_context;
 	}
 
-	// NOTE: resolved before its declarations are collected, which evaluates the attributes of 'foreign import's
+	// NOTE(bill): resolved before its declarations are collected, which evaluates the attributes of 'foreign import's
 	src->state = EntityState_Resolved;
 	array_pop(&global_decl_source_stack);
 
@@ -444,11 +506,28 @@ gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedStrin
 	destroy_checker_context(&ctx);
 }
 
+gb_internal void resolve_global_decl_source(GlobalDeclSource *src, InternedString needed) {
+	if (src->state == EntityState_Resolved) {
+		return;
+	}
+	GlobalWhenTrial *trial = global_when_trial;
+	i32 mute_depth = global_error_mute_depth;
+	global_when_trial = nullptr;
+	global_error_mute_depth = 0;
+	resolve_global_decl_source_internal(src, needed);
+	global_when_trial = trial;
+	global_error_mute_depth = mute_depth;
+}
+
 gb_internal Entity *force_scope_placeholders(Scope *s, InternedString name, u32 hash) {
 	PtrMap<u64, GlobalDeclSource *> *m = s->placeholders;
 	bool forced = false;
 	for (auto *e = multi_map_find_first(m, cast(u64)name.value); e != nullptr; e = multi_map_find_next(m, e)) {
 		GlobalDeclSource *src = e->value;
+		if (global_when_trial != nullptr && src->cycle == global_when_trial->cycle) {
+			// NOTE: the trial's lookup decides what these declare
+			continue;
+		}
 		if (src->state != EntityState_Resolved) {
 			if (global_decl_source_stack.count > 0) {
 				global_decl_source_stack[global_decl_source_stack.count-1].needs = name;
@@ -535,6 +614,7 @@ gb_internal void resolve_global_decl_sources(Checker *c, Array<ImportGraphNode *
 			scan_global_decl_sources(f, f->decls, nullptr, false, EntityVisiblity_Public);
 		}
 	}
+	find_global_when_cycles();
 	global_import_stage_end(GlobalImportStage_Placeholders, stage_start);
 
 	stage_start = global_import_stage_begin();
@@ -635,6 +715,25 @@ gb_internal i32 global_graph_scc(i32 node_count, Array<i32> const &offsets, Arra
 	return comp_count;
 }
 
+gb_internal void global_graph_csr(i32 node_count, Array<i32> const &edge_from, Array<i32> const &edge_to, Array<i32> *offsets, Array<i32> *targets) {
+	array_init(offsets, heap_allocator(), node_count+1);
+	array_init(targets, heap_allocator(), edge_to.count);
+	for (i32 v = 0; v <= node_count; v++) {
+		(*offsets)[v] = 0;
+	}
+	for (i32 from : edge_from) {
+		(*offsets)[from+1] += 1;
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		(*offsets)[v+1] += (*offsets)[v];
+	}
+	auto fill = array_clone(heap_allocator(), *offsets);
+	defer (array_free(&fill));
+	for (isize i = 0; i < edge_from.count; i++) {
+		(*targets)[fill[edge_from[i]]++] = edge_to[i];
+	}
+}
+
 gb_internal void global_graph_print_entity(Entity *e) {
 	if (e == nullptr) {
 		gb_printf_err("?");
@@ -671,11 +770,38 @@ struct GlobalGroupGraph {
 
 gb_global GlobalGroupGraph global_groups;
 
+struct GlobalPlaceholderHit {
+	Scope *        scope;
+	InternedString name;
+};
+
 struct GlobalGraphWalk {
 	Scope *scope;
 	Array<Entity *> *refs;
+	Array<GlobalPlaceholderHit> *hits; // set: before any 'when' is resolved, a lookup passing a placeholder records it
 };
 
+gb_internal Entity *global_graph_lookup(GlobalGraphWalk *w, Scope *s, Ast *ident, bool parents) {
+	InternedString name = ident->Ident.interned;
+	u32 hash = ident->Ident.hash;
+	if (w->hits == nullptr) {
+		return parents ? scope_lookup(s, name, hash) : scope_lookup_current(s, name, hash);
+	}
+	for (; s != nullptr; s = s->parent) {
+		Entity *e = scope_map_get(&s->elements, name, hash);
+		if (e != nullptr) {
+			return e;
+		}
+		if (s->placeholders != nullptr && multi_map_find_first(s->placeholders, cast(u64)name.value) != nullptr) {
+			array_add(w->hits, GlobalPlaceholderHit{s, name});
+		}
+		if (!parents) {
+			break;
+		}
+	}
+	return nullptr;
+}
+
 gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node);
 
 gb_internal void global_graph_walk_slice(GlobalGraphWalk *w, Slice<Ast *> const &nodes) {
@@ -698,16 +824,16 @@ gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node) {
 	}
 	switch (node->kind) {
 	case Ast_Ident:
-		global_graph_add_ref(w, scope_lookup(w->scope, node->Ident.interned, node->Ident.hash));
+		global_graph_add_ref(w, global_graph_lookup(w, w->scope, node, true));
 		break;
 
 	case Ast_SelectorExpr: {
 		Ast *expr     = node->SelectorExpr.expr;
 		Ast *selector = node->SelectorExpr.selector;
 		if (expr != nullptr && expr->kind == Ast_Ident) {
-			Entity *e = scope_lookup(w->scope, expr->Ident.interned, expr->Ident.hash);
+			Entity *e = global_graph_lookup(w, w->scope, expr, true);
 			if (e != nullptr && e->kind == Entity_ImportName && selector != nullptr && selector->kind == Ast_Ident) {
-				global_graph_add_ref(w, scope_lookup_current(e->ImportName.scope, selector->Ident.interned, selector->Ident.hash));
+				global_graph_add_ref(w, global_graph_lookup(w, e->ImportName.scope, selector, false));
 			} else {
 				global_graph_add_ref(w, e);
 			}
@@ -944,11 +1070,8 @@ gb_internal void global_graph_walk(GlobalGraphWalk *w, Ast *node) {
 	}
 }
 
-gb_internal void global_graph_walk_entity(GlobalGraphWalk *w, Entity *e, DeclInfo *d) {
-	w->scope = d->scope;
-	global_graph_walk(w, d->type_expr);
-	global_graph_walk(w, d->init_expr);
-	for (Ast *attr : d->attributes) {
+gb_internal void global_graph_walk_attribute_values(GlobalGraphWalk *w, Array<Ast *> const &attributes) {
+	for (Ast *attr : attributes) {
 		if (attr->kind != Ast_Attribute) {
 			continue;
 		}
@@ -958,6 +1081,13 @@ gb_internal void global_graph_walk_entity(GlobalGraphWalk *w, Entity *e, DeclInf
 			}
 		}
 	}
+}
+
+gb_internal void global_graph_walk_entity(GlobalGraphWalk *w, Entity *e, DeclInfo *d) {
+	w->scope = d->scope;
+	global_graph_walk(w, d->type_expr);
+	global_graph_walk(w, d->init_expr);
+	global_graph_walk_attribute_values(w, d->attributes);
 	if (e->kind == Entity_Procedure) {
 		global_graph_walk(w, e->Procedure.foreign_library_ident);
 	} else if (e->kind == Entity_Variable) {
@@ -1129,24 +1259,7 @@ gb_internal void build_global_groups(Checker *c, GlobalGroupGraph *g) {
 	}
 
 	i32 node_count = cast(i32)g->nodes.count;
-	array_init(&g->offsets, heap_allocator(), node_count+1);
-	array_init(&g->targets, heap_allocator(), edge_to.count);
-	for (i32 v = 0; v <= node_count; v++) {
-		g->offsets[v] = 0;
-	}
-	for (i32 from : edge_from) {
-		g->offsets[from+1] += 1;
-	}
-	for (i32 v = 0; v < node_count; v++) {
-		g->offsets[v+1] += g->offsets[v];
-	}
-	{
-		auto fill = array_clone(heap_allocator(), g->offsets);
-		defer (array_free(&fill));
-		for (isize i = 0; i < edge_from.count; i++) {
-			g->targets[fill[edge_from[i]]++] = edge_to[i];
-		}
-	}
+	global_graph_csr(node_count, edge_from, edge_to, &g->offsets, &g->targets);
 
 	array_init(&g->group_of, heap_allocator(), node_count);
 	i32 group_count = global_graph_scc(node_count, g->offsets, g->targets, &g->group_of);
@@ -1350,7 +1463,609 @@ gb_internal void check_all_global_entities(Checker *c) {
 }
 
 
-// -internal-global-entity-graph: the groups, weighted by the measured self time of their entities
+// NOTE(bill, 2026-10-01)
+//
+// Cycles of global 'when's: a 'when' whose condition may need what its own branch declares,
+// directly or through other 'when's. Found from syntax before anything is resolved: the nodes
+// are the 'when's and 'foreign' blocks, the declarations in their branches, and the global
+// entities their conditions reach.
+//
+// Each cycle is decided by trying every choice of its branches; exactly one choice must be consistent
+
+enum GlobalWhenNodeKind : u8 {
+	GlobalWhenNode_Source,
+	GlobalWhenNode_Decl,
+	GlobalWhenNode_Entity,
+};
+
+struct GlobalWhenNode {
+	GlobalWhenNodeKind kind;
+	GlobalDeclSource * source; // of a source or a declaration
+	Ast *              decl;
+	Entity *           entity;
+};
+
+gb_internal void find_global_when_cycles(void) {
+	auto nodes     = array_make<GlobalWhenNode>      (heap_allocator(), 0, global_decl_sources.count);
+	auto edge_from = array_make<i32>                 (heap_allocator(), 0, global_decl_sources.count);
+	auto edge_to   = array_make<i32>                 (heap_allocator(), 0, global_decl_sources.count);
+	auto refs      = array_make<Entity *>            (heap_allocator(), 0, 64);
+	auto hits      = array_make<GlobalPlaceholderHit>(heap_allocator(), 0, 16);
+	defer (array_free(&nodes));
+	defer (array_free(&edge_from));
+	defer (array_free(&edge_to));
+	defer (array_free(&refs));
+	defer (array_free(&hits));
+
+	PtrMap<void *, i32> node_of = {};
+	map_init(&node_of, 2*global_decl_sources.count);
+	defer (map_destroy(&node_of));
+
+	auto add_node = [&](void *key, GlobalWhenNode const &node) -> i32 {
+		i32 *found = map_get(&node_of, key);
+		if (found != nullptr) {
+			return *found;
+		}
+		i32 v = cast(i32)nodes.count;
+		map_set(&node_of, key, v);
+		array_add(&nodes, node);
+		return v;
+	};
+	auto add_edge = [&](i32 from, i32 to) {
+		array_add(&edge_from, from);
+		array_add(&edge_to, to);
+	};
+
+	for (GlobalDeclSource *src : global_decl_sources) {
+		add_node(src, GlobalWhenNode{GlobalWhenNode_Source, src});
+	}
+
+	GlobalGraphWalk w = {};
+	w.refs = &refs;
+	w.hits = &hits;
+	for (i32 v = 0; v < nodes.count; v++) {
+		GlobalWhenNode node = nodes[v];
+		array_clear(&refs);
+		array_clear(&hits);
+		switch (node.kind) {
+		case GlobalWhenNode_Source:
+			w.scope = node.source->file->scope;
+			if (node.source->node->kind == Ast_WhenStmt) {
+				global_graph_walk(&w, node.source->node->WhenStmt.cond);
+			} else {
+				global_graph_walk_attribute_values(&w, node.source->node->ForeignBlockDecl.attributes);
+			}
+			if (node.source->parent != nullptr) {
+				add_edge(v, *map_get(&node_of, cast(void *)node.source->parent));
+			}
+			break;
+		case GlobalWhenNode_Decl:
+			w.scope = node.source->file->scope;
+			if (node.decl->kind == Ast_ValueDecl) {
+				global_graph_walk(&w, node.decl->ValueDecl.type);
+				global_graph_walk_slice(&w, node.decl->ValueDecl.values);
+				global_graph_walk_attribute_values(&w, node.decl->ValueDecl.attributes);
+			} else if (node.decl->kind == Ast_ForeignImportDecl) {
+				global_graph_walk_attribute_values(&w, node.decl->ForeignImportDecl.attributes);
+			}
+			add_edge(v, *map_get(&node_of, cast(void *)node.source));
+			break;
+		case GlobalWhenNode_Entity:
+			global_graph_walk_entity(&w, node.entity, node.entity->decl_info);
+			break;
+		}
+
+		for (Entity *e : refs) {
+			if (e->decl_info != nullptr && e->scope != nullptr && (e->scope->flags & ScopeFlag_File) != 0) {
+				add_edge(v, add_node(e, GlobalWhenNode{GlobalWhenNode_Entity, nullptr, nullptr, e}));
+			}
+		}
+
+		// NOTE(bill):: a name that may be declared by a 'when' depends on its declarations there, and on that 'when'
+		for (GlobalPlaceholderHit const &hit : hits) {
+			PtrMap<u64, GlobalDeclSource *> *m = hit.scope->placeholders;
+			for (auto *entry = multi_map_find_first(m, cast(u64)hit.name.value); entry != nullptr; entry = multi_map_find_next(m, entry)) {
+				GlobalDeclSource *src = entry->value;
+				for (GlobalDeclSourceName const &n : src->names) {
+					if (n.name == hit.name && n.scope == hit.scope) {
+						add_edge(v, add_node(n.decl, GlobalWhenNode{GlobalWhenNode_Decl, src, n.decl}));
+					}
+				}
+			}
+		}
+	}
+
+	i32 node_count = cast(i32)nodes.count;
+	Array<i32> offsets = {};
+	Array<i32> targets = {};
+	defer (array_free(&offsets));
+	defer (array_free(&targets));
+
+	global_graph_csr(node_count, edge_from, edge_to, &offsets, &targets);
+	auto comp_of = array_make<i32>(heap_allocator(), node_count);
+	defer (array_free(&comp_of));
+
+	i32 comp_count = global_graph_scc(node_count, offsets, targets, &comp_of);
+
+	auto comp_size  = array_make<i32>              (heap_allocator(), comp_count);
+	auto comp_cycle = array_make<GlobalWhenCycle *>(heap_allocator(), comp_count);
+	defer (array_free(&comp_size));
+	defer (array_free(&comp_cycle));
+
+	for (i32 ci = 0; ci < comp_count; ci++) {
+		comp_size[ci] = 0;
+		comp_cycle[ci] = nullptr;
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		comp_size[comp_of[v]] += 1;
+	}
+	auto is_cyclic = [&](i32 v) -> bool {
+		if (comp_size[comp_of[v]] > 1) {
+			return true;
+		}
+		for (i32 i = offsets[v]; i < offsets[v+1]; i++) {
+			if (targets[i] == v) {
+				return true;
+			}
+		}
+		return false;
+	};
+
+	// NOTE: sources are the first nodes, in source order
+	for (i32 v = 0; v < global_decl_sources.count; v++) {
+		if (!is_cyclic(v)) {
+			continue;
+		}
+		GlobalWhenCycle *&cycle = comp_cycle[comp_of[v]];
+		if (cycle == nullptr) {
+			cycle = permanent_alloc_item<GlobalWhenCycle>();
+			array_init(&cycle->sources, heap_allocator());
+			ptr_set_init(&cycle->decls);
+			global_when_cycle_count += 1;
+		}
+		GlobalDeclSource *src = nodes[v].source;
+		src->cycle = cycle;
+		src->cycle_index = cast(i32)cycle->sources.count;
+		array_add(&cycle->sources, src);
+		global_when_cycle_sources += 1;
+	}
+	for (i32 v = 0; v < node_count; v++) {
+		GlobalWhenCycle *cycle = comp_cycle[comp_of[v]];
+		if (cycle == nullptr) {
+			continue;
+		}
+		if (nodes[v].kind == GlobalWhenNode_Decl) {
+			ptr_set_add(&cycle->decls, nodes[v].decl);
+		} else if (nodes[v].kind == GlobalWhenNode_Entity && nodes[v].entity->decl_info->decl_node != nullptr) {
+			ptr_set_add(&cycle->decls, nodes[v].entity->decl_info->decl_node);
+		}
+	}
+}
+
+gb_internal ForeignContext global_decl_source_foreign_context(GlobalDeclSource *src) {
+	for (GlobalDeclSource *p = src; p != nullptr; p = p->parent) {
+		if (p->node->kind == Ast_ForeignBlockDecl) {
+			return p->foreign_context;
+		}
+	}
+	return {};
+}
+
+// Scratch entities for a declaration, made as `check_collect_value_decl` would but put nowhere
+gb_internal Entity *global_when_trial_entity(GlobalWhenTrial *t, Ast *decl, AstFile *file, ForeignContext const &foreign_context, InternedString name) {
+	Array<Entity *> **found = map_get(&t->decl_entities, decl);
+	Array<Entity *> *entities = found ? *found : nullptr;
+	if (entities == nullptr) {
+		entities = gb_alloc_item(heap_allocator(), Array<Entity *>);
+		array_init(entities, heap_allocator());
+		map_set(&t->decl_entities, decl, entities);
+		if (decl->kind != Ast_ValueDecl) {
+			t->unsupported = true;
+			return nullptr;
+		}
+		CheckerContext ctx = {};
+		init_checker_context(&ctx, global_checker_ptr.load(std::memory_order_relaxed));
+		UntypedExprInfoMap untyped = {};
+		reset_checker_context(&ctx, file, &untyped);
+		ctx.decl = make_decl_info(file->scope, nullptr); // not a child of the package's
+		ctx.foreign_context = foreign_context;
+		ctx.trial_entities = entities;
+		Ast *clone = clone_ast(decl);
+		clone->state_flags &= ~StateFlag_BeenHandled;
+		check_collect_value_decl(&ctx, clone);
+		map_destroy(&untyped);
+		destroy_checker_context(&ctx);
+		for (Entity *e : *entities) {
+			ptr_set_add(&t->scratch, e);
+		}
+	}
+	for (Entity *e : *entities) {
+		if (entity_interned_name(e) == name) {
+			return e;
+		}
+	}
+	t->unsupported = true;
+	return nullptr;
+}
+
+// Every scope lookup during a trial: `found` is what the scope itself holds
+gb_internal Entity *global_when_trial_lookup(Scope *s, InternedString name, u32 hash, Entity *found) {
+	GlobalWhenTrial *t = global_when_trial;
+	GlobalWhenCycle *cycle = t->cycle;
+	if (found != nullptr) {
+		DeclInfo *d = found->decl_info;
+		if (d == nullptr || d->decl_node == nullptr || !ptr_set_exists(&cycle->decls, d->decl_node) || ptr_set_exists(&t->scratch, found)) {
+			return found;
+		}
+		if (t->real_depth > 0) {
+			t->broken = true;
+			return found;
+		}
+		if ((found->kind == Entity_Procedure && found->Procedure.is_foreign) ||
+		    (found->kind == Entity_Variable  && found->Variable.is_foreign)) {
+			t->unsupported = true;
+			return found;
+		}
+		Entity *copy = global_when_trial_entity(t, d->decl_node, found->file, {}, name);
+		return copy != nullptr ? copy : found;
+	}
+	if (s->placeholders == nullptr) {
+		return nullptr;
+	}
+	PtrMap<u64, GlobalDeclSource *> *m = s->placeholders;
+	for (auto *entry = multi_map_find_first(m, cast(u64)name.value);
+	     entry != nullptr;
+	     entry = multi_map_find_next(m, entry)) {
+		GlobalDeclSource *src = entry->value;
+		if (src->cycle != cycle) {
+			continue;
+		}
+		if (t->real_depth > 0) {
+			t->broken = true;
+			return nullptr;
+		}
+		u32 bit = 1u << src->cycle_index;
+		if ((t->reachable & bit) == 0) {
+			continue;
+		}
+		bool in_else = (t->mask & bit) == 0;
+		for (GlobalDeclSourceName const &n : src->names) {
+			if (n.name == name && n.scope == s && n.in_else == in_else) {
+				// NOTE(bill): the branches around it are needed too
+				for (GlobalDeclSource *p = src; p != nullptr && p->cycle == cycle; p = p->parent) {
+					t->used |= 1u << p->cycle_index;
+				}
+				return global_when_trial_entity(t, n.decl, src->file, global_decl_source_foreign_context(src), name);
+			}
+		}
+	}
+	return nullptr;
+}
+
+// An entity outside the trial is checked for real, with errors shown; a scratch procedure is not checked,
+// as its body would be queued
+gb_internal bool global_when_trial_begin_entity(Entity *e, GlobalWhenTrialEntityScope *scope) {
+	GlobalWhenTrial *t = global_when_trial;
+	*scope = {};
+	if (ptr_set_exists(&t->scratch, e)) {
+		if (e->kind == Entity_Procedure || e->kind == Entity_AsmTemplate) {
+			t->unsupported = true;
+			e->type = t_invalid;
+			e->state = EntityState_Resolved;
+			return false;
+		}
+		return true;
+	}
+	scope->trial = t;
+	scope->mute_depth = global_error_mute_depth;
+	global_error_mute_depth = 0;
+	t->real_depth += 1;
+	return true;
+}
+
+gb_internal void global_when_trial_end_entity(GlobalWhenTrialEntityScope *scope) {
+	if (scope->trial != nullptr) {
+		scope->trial->real_depth -= 1;
+		global_error_mute_depth = scope->mute_depth;
+	}
+}
+
+enum GlobalWhenFailureKind : u8 {
+	GlobalWhenFailure_None,
+	GlobalWhenFailure_Invalid,   // Cannot be evaluated
+	GlobalWhenFailure_Disagrees, // Picks the other branch
+	GlobalWhenFailure_OwnBranch, // A chosen branch is needed to decide its own condition
+};
+
+struct GlobalWhenTrialResult {
+	GlobalWhenFailureKind failure;
+	i32  source;
+	bool value;
+	bool unsupported;
+	bool broken;
+};
+
+gb_internal GlobalWhenTrialResult try_global_when_choice(GlobalWhenCycle *cycle, u32 mask, u32 reachable) {
+	GlobalWhenTrialResult res = {};
+	i32 k = cast(i32)cycle->sources.count;
+	u32 used[32] = {};
+
+	for (i32 i = 0; i < k; i++) {
+		if ((reachable & (1u<<i)) == 0) {
+			continue;
+		}
+		GlobalDeclSource *src = cycle->sources[i];
+		ast_node(ws, WhenStmt, src->node);
+
+		GlobalWhenTrial t = {};
+		t.cycle     = cycle;
+		t.mask      = mask;
+		t.reachable = reachable;
+
+		map_init(&t.decl_entities);
+		defer ({
+			for (auto const &entry : t.decl_entities) {
+				array_free(entry.value);
+				gb_free(heap_allocator(), entry.value);
+			}
+			map_destroy(&t.decl_entities);
+		});
+
+		ptr_set_init(&t.scratch);
+		defer (ptr_set_destroy(&t.scratch));
+
+		CheckerContext ctx = {};
+		init_checker_context(&ctx, global_checker_ptr.load(std::memory_order_relaxed));
+		defer (destroy_checker_context(&ctx));
+
+		UntypedExprInfoMap untyped = {};
+		defer (map_destroy(&untyped));
+
+
+		reset_checker_context(&ctx, src->file, &untyped);
+		// so no dependency is recorded
+		ctx.decl = make_decl_info(src->file->scope, nullptr);
+		ctx.foreign_context = global_decl_source_foreign_context(src);
+
+		GlobalWhenTrial *prev = global_when_trial;
+		global_when_trial = &t;
+
+		Ast *cond = clone_ast(ws->cond);
+		i64 muted = error_mute_count();
+		begin_error_mute();
+
+		Operand o = {};
+		check_expr(&ctx, &o, cond);
+		end_error_mute();
+		global_when_trial = prev;
+		global_when_trial_count += 1;
+
+		bool ok = error_mute_count() == muted && o.mode == Addressing_Constant && o.value.kind == ExactValue_Bool;
+		used[i] = t.used;
+		res.unsupported = t.unsupported;
+		res.broken = t.broken;
+
+		if (res.unsupported || res.broken) {
+			return res;
+		}
+		if (!ok || o.value.value_bool != ((mask & (1u<<i)) != 0)) {
+			res.failure = ok ? GlobalWhenFailure_Disagrees : GlobalWhenFailure_Invalid;
+			res.source = i;
+			res.value = ok && o.value.value_bool;
+			return res;
+		}
+	}
+
+	// NOTE: the chosen branches must be decidable in some order, each from earlier ones
+	u32 decided = 0;
+	for (;;) {
+		bool progress = false;
+		for (i32 i = 0; i < k; i++) {
+			u32 bit = 1u << i;
+			if ((reachable & bit) && (decided & bit) == 0 && (used[i] & ~decided) == 0) {
+				decided |= bit;
+				progress = true;
+			}
+		}
+		if (!progress) {
+			break;
+		}
+	}
+	if (decided != reachable) {
+		res.failure = GlobalWhenFailure_OwnBranch;
+	}
+	return res;
+}
+
+gb_internal u32 global_when_cycle_reachable(GlobalWhenCycle *cycle, u32 mask, u32 unreachable) {
+	u32 reachable = 0;
+	for (i32 i = 0; i < cycle->sources.count; i++) {
+		GlobalDeclSource *src = cycle->sources[i];
+		GlobalDeclSource *p = src->parent;
+		bool r = (unreachable & (1u<<i)) == 0;
+		// NOTE(bill): a parent outside the cycle has no parent in it and its parents come first in source order
+		if (r && p != nullptr && p->cycle == cycle) {
+			u32 pb = 1u << p->cycle_index;
+			r = (reachable & pb) != 0;
+			if (p->node->kind == Ast_WhenStmt) {
+				r = r && ((mask & pb) != 0) != src->in_else;
+			}
+		}
+		if (r) {
+			reachable |= 1u << i;
+		}
+	}
+	return reachable;
+}
+
+gb_internal gbString global_when_choice_string(gbString s, GlobalWhenCycle *cycle, u32 mask, u32 reachable) {
+	for (i32 i = 0; i < cycle->sources.count; i++) {
+		u32 bit = 1u << i;
+		s = gb_string_append_fmt(s, "%s%s", i > 0 ? ", " : "", (reachable & bit) == 0 ? "unreachable" : (mask & bit) ? "taken" : "not taken");
+	}
+	return s;
+}
+
+gb_internal void error_line_global_when_sources(GlobalWhenCycle *cycle) {
+	for (GlobalDeclSource *src : cycle->sources) {
+		gbString cond = expr_to_string(src->node->WhenStmt.cond);
+		error_line("\t'when' at %s: %s\n", token_pos_to_string(src->node->WhenStmt.token.pos), cond);
+		gb_string_free(cond);
+	}
+}
+
+gb_internal void commit_global_when_cycle(GlobalWhenCycle *cycle, u32 mask, bool check_conditions) {
+	for (GlobalDeclSource *src : cycle->sources) {
+		src->predetermined = true;
+		src->predetermined_cond = (mask & (1u << src->cycle_index)) != 0;
+	}
+	for (GlobalDeclSource *src : cycle->sources) {
+		resolve_global_decl_source(src, {});
+	}
+	if (!check_conditions) {
+		return;
+	}
+	// NOTE: for real, now that every chosen branch is collected, which must give the same values
+	for (GlobalDeclSource *src : cycle->sources) {
+		if (!src->reachable) {
+			continue;
+		}
+		ast_node(ws, WhenStmt, src->node);
+
+		CheckerContext ctx = {};
+		init_checker_context(&ctx, global_checker_ptr.load(std::memory_order_relaxed));
+		defer (destroy_checker_context(&ctx));
+
+		UntypedExprInfoMap untyped = {};
+		reset_checker_context(&ctx, src->file, &untyped);
+		defer (map_destroy(&untyped));
+
+		ctx.foreign_context = global_decl_source_foreign_context(src);
+
+		Operand o = {};
+		check_expr(&ctx, &o, ws->cond);
+		if (o.mode != Addressing_Constant || o.value.kind != ExactValue_Bool || o.value.value_bool != ws->determined_cond) {
+			error(ws->token, "Internal compiler error: this global 'when' changed its branch after its cycle was decided");
+		}
+		add_untyped_expressions(ctx.info, &untyped);
+	}
+}
+
+gb_internal void search_global_when_cycle(GlobalWhenCycle *cycle) {
+	cycle->searched = true;
+	i32 k = cast(i32)cycle->sources.count;
+	for (GlobalDeclSource *src : cycle->sources) {
+		if (src->node->kind != Ast_WhenStmt) {
+			// NOTE(bill): resolved on demand where a cycle is reported as such
+			return;
+		}
+	}
+	Token token = cycle->sources[0]->node->WhenStmt.token;
+
+	i32 const MAX_SOURCES = 8; // 2^8 == 256 combinations
+	if (k > MAX_SOURCES) {
+		ERROR_BLOCK();
+		error(token, "Too many combinations of global 'when' branches: %d 'when's depend on each other, which gives 2^%d combinations, more than %d",
+		      k, k, 1 << MAX_SOURCES);
+		error_line_global_when_sources(cycle);
+		return;
+	}
+
+	// The parents outside the cycle are decided for real first
+	u32 unreachable = 0;
+	for (GlobalDeclSource *src : cycle->sources) {
+		GlobalDeclSource *p = src->parent;
+		if (p == nullptr || p->cycle == cycle) {
+			continue;
+		}
+		resolve_global_decl_source(p, {});
+		bool r = p->state == EntityState_Resolved && p->reachable;
+		if (p->node->kind == Ast_WhenStmt) {
+			r = r && p->node->WhenStmt.determined_cond != src->in_else;
+		}
+		if (!r) {
+			unreachable |= 1u << src->cycle_index;
+		}
+	}
+
+	auto consistent = array_make<u32>(heap_allocator());
+	auto failures   = array_make<GlobalWhenTrialResult>(heap_allocator());
+	auto failed     = array_make<u32>(heap_allocator());
+	defer (array_free(&consistent));
+	defer (array_free(&failures));
+	defer (array_free(&failed));
+
+	for (u32 mask = 0; mask < (1u << k); mask++) {
+		u32 reachable = global_when_cycle_reachable(cycle, mask, unreachable);
+		if (mask & ~reachable) {
+			// An unreachable 'when' is only counted as not taken
+			continue;
+		}
+		GlobalWhenTrialResult result = try_global_when_choice(cycle, mask, reachable);
+		if (result.broken) {
+			error(token, "Internal compiler error: deciding this cycle of global 'when's checked a declaration that depends on it");
+			return;
+		}
+		if (result.unsupported) {
+			// Needs a procedure or library declared in the cycle, so it is resolved on demand instead
+			return;
+		}
+		if (result.failure == GlobalWhenFailure_None) {
+			array_add(&consistent, mask);
+		} else {
+			array_add(&failures, result);
+			array_add(&failed, mask);
+		}
+	}
+
+	if (consistent.count == 1) {
+		commit_global_when_cycle(cycle, consistent[0], true);
+		return;
+	}
+
+	ERROR_BLOCK();
+	if (consistent.count == 0) {
+		error(token, "Contradictory global 'when' conditions: no choice of their branches is consistent");
+		error_line_global_when_sources(cycle);
+		for (isize i = 0; i < failed.count && i < 16; i++) {
+			GlobalWhenTrialResult const &r = failures[i];
+
+			u32 reachable = global_when_cycle_reachable(cycle, failed[i], unreachable);
+
+			gbString s = global_when_choice_string(gb_string_make(heap_allocator(), ""), cycle, failed[i], reachable);
+			defer (gb_string_free(s));
+
+			TokenPos pos = cycle->sources[r.source]->node->WhenStmt.token.pos;
+			switch (r.failure) {
+			case GlobalWhenFailure_Invalid:
+				error_line("\t[%s]: the 'when' at %s cannot be evaluated\n", s, token_pos_to_string(pos));
+				break;
+			case GlobalWhenFailure_Disagrees:
+				error_line("\t[%s]: the 'when' at %s evaluates to %s\n", s, token_pos_to_string(pos), r.value ? "true" : "false");
+				break;
+			case GlobalWhenFailure_OwnBranch:
+				error_line("\t[%s]: a taken branch is needed to decide its own condition\n", s);
+				break;
+			}
+		}
+		commit_global_when_cycle(cycle, 0, false);
+	} else {
+		error(token, "Ambiguous global 'when' conditions: %td choices of their branches are consistent", consistent.count);
+		error_line_global_when_sources(cycle);
+		for (isize i = 0; i < consistent.count; i++) {
+			u32 reachable = global_when_cycle_reachable(cycle, consistent[i], unreachable);
+			gbString s = global_when_choice_string(gb_string_make(heap_allocator(), ""), cycle, consistent[i], reachable);
+			defer (gb_string_free(s));
+
+			error_line("\tchoice %td: %s\n", i+1, s);
+		}
+		commit_global_when_cycle(cycle, consistent[0], false);
+	}
+}
+
+
+// `-internal-global-entity-graph`
+// The groups weighted by the measured self time of their entities
 
 struct GlobalGraphSortItem {
 	u64 key;
@@ -1410,11 +2125,11 @@ gb_internal void print_global_groups(GlobalGroupGraph *g) {
 	defer (array_free(&pkg_entities));
 	defer (map_destroy(&pkg_index));
 
-	u64 total_ticks = 0;
-	u64 when_ticks = 0;
-	isize untimed = 0;
-	i32 largest = -1;
-	isize cyclic = 0;
+	u64   total_ticks = 0;
+	u64   when_ticks  = 0;
+	isize untimed     = 0;
+	i32   largest     = -1;
+	isize cyclic      = 0;
 
 	mutex_lock(&global_entity_time_mutex);
 	for (auto const &entry : global_entity_times) {
@@ -1451,7 +2166,7 @@ gb_internal void print_global_groups(GlobalGroupGraph *g) {
 	}
 	mutex_unlock(&global_entity_time_mutex);
 
-	// NOTE: every dependency of a group has a lower index
+	// NOTE(bill): every dependency of a group has a lower index
 	i32 critical = -1;
 	for (i32 gi = 0; gi < group_count; gi++) {
 		seen[gi] = -1;
@@ -1488,6 +2203,7 @@ gb_internal void print_global_groups(GlobalGroupGraph *g) {
 	gb_printf_err("  critical path: %.3f ms over %d groups -> at most %.2fx speedup\n",
 	              critical_ms, critical >= 0 ? len[critical] : 0, critical_ms > 0 ? total_ms/critical_ms : 0.0);
 
+	gb_printf_err("  'when' cycles: %td (%td 'when's), %td conditions tried\n", global_when_cycle_count, global_when_cycle_sources, global_when_trial_count);
 	gb_printf_err("  check_import_entities (sequential, includes entity checks it triggers):\n");
 	for (isize i = 0; i < GlobalImportStage_COUNT; i++) {
 		gb_printf_err("    %10.3f ms  %s\n", global_graph_ms(global_import_stage_ticks[i], freq), global_import_stage_names[i]);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 991a87d7f..b5b90339c 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -54,7 +54,9 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin check ..\test_issue_ambiguous_union_literal.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "1" || exit /b
 ..\..\..\odin test ..\test_issue_proc_constant_instantiation.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_global_when_order.odin %COMMON%  || exit /b
-..\..\..\odin check ..\test_issue_global_when_cycle.odin -no-entry-point %COMMON% 2>&1 | find /c "Cyclic dependency between global" | findstr /x "3" || exit /b
+..\..\..\odin check ..\test_issue_global_when_cycle.odin -no-entry-point %COMMON% 2>&1 | find /c "Contradictory global" | findstr /x "4" || exit /b
+..\..\..\odin test ..\test_issue_global_when_cycle_accepted.odin %COMMON%  || exit /b
+..\..\..\odin check ..\test_issue_global_when_cycle_ambiguous.odin -no-entry-point %COMMON% 2>&1 | find /c "Ambiguous global" | findstr /x "1" || exit /b
 ..\..\..\odin check ..\test_issue_global_when_shadowing.odin -no-entry-point %COMMON% 2>&1 | find /c "within a global" | findstr /x "2" || exit /b
 ..\..\..\odin check ..\test_issue_7336.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_ellipsis_type_call.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 41f108d4d..8bc063be0 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -130,7 +130,14 @@ fi
 $ODIN test ../test_issue_proc_constant_instantiation.odin $COMMON
 $ODIN test ../test_issue_swizzle_multi_assign.odin $COMMON
 $ODIN test ../test_issue_global_when_order.odin $COMMON
-if [[ $($ODIN check ../test_issue_global_when_cycle.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Cyclic dependency between global") -eq 3 ]]; then
+if [[ $($ODIN check ../test_issue_global_when_cycle.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Contradictory global 'when'") -eq 4 ]]; then
+	echo "SUCCESSFUL 1/1"
+else
+	echo "SUCCESSFUL 0/1"
+	exit 1
+fi
+$ODIN test ../test_issue_global_when_cycle_accepted.odin $COMMON
+if [[ $($ODIN check ../test_issue_global_when_cycle_ambiguous.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Ambiguous global 'when'") -eq 1 ]]; then
 	echo "SUCCESSFUL 1/1"
 else
 	echo "SUCCESSFUL 0/1"
diff --git a/tests/issues/test_issue_global_when_cycle.odin b/tests/issues/test_issue_global_when_cycle.odin
index 77f83a028..3472c9331 100644
--- a/tests/issues/test_issue_global_when_cycle.odin
+++ b/tests/issues/test_issue_global_when_cycle.odin
@@ -1,10 +1,14 @@
-// Each of these global 'when's needs a name it may declare itself, so all three are cycles
+// Cycles of global 'when's where no choice of branches is consistent, so each is an error
 package test_issues
 
-// each 'when' needs a name the other may declare
+// taken, `int` becomes 4 bytes and the first condition is false; not taken, the second is true
 when size_of(int) == 8 { A :: 1 }
 when A == 1 { int :: i32 }
 
+// both taken is consistent, but each branch is needed to decide its own condition
+when Y == 1 { X :: 1 }
+when X == 1 { Y :: 1 }
+
 // a 'when' needing a name it may declare
 when B == 1 { B :: 1 }
 

From 94bb9558716636a327ed398b0944b7153d613181 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 19:05:15 +0100
Subject: [PATCH 129/215] Fix #7566: name polymorphic instances by the values
 of compound constant parameters and not their spelling

---
 src/name_canonicalization.cpp | 59 +++++++++++++++++++++++++++++++++--
 src/name_canonicalization.hpp |  1 +
 2 files changed, 57 insertions(+), 3 deletions(-)

diff --git a/src/name_canonicalization.cpp b/src/name_canonicalization.cpp
index 0a4f60fec..12b1f23cf 100644
--- a/src/name_canonicalization.cpp
+++ b/src/name_canonicalization.cpp
@@ -510,9 +510,7 @@ gb_internal void write_canonical_params(TypeWriter *w, Type *params) {
 						}
 					}
 				}
-				gbString s = exact_value_to_string(v->Constant.value, 1<<16);
-				type_writer_append(w, s, gb_string_length(s));
-				gb_string_free(s);
+				write_canonical_exact_value(w, v->Constant.value);
 			}
 			break;
 		default:
@@ -523,6 +521,61 @@ gb_internal void write_canonical_params(TypeWriter *w, Type *params) {
 	return;
 }
 
+gb_internal void write_canonical_exact_value(TypeWriter *w, ExactValue const &v);
+
+gb_internal void write_canonical_constant_expr(TypeWriter *w, Ast *expr) {
+	if (expr->tav.mode == Addressing_Constant) {
+		write_canonical_exact_value(w, expr->tav.value);
+		return;
+	}
+	gbString s = write_expr_to_string(gb_string_make(heap_allocator(), ""), expr, false);
+	type_writer_append(w, s, gb_string_length(s));
+	gb_string_free(s);
+}
+
+gb_internal void write_canonical_exact_value(TypeWriter *w, ExactValue const &v) {
+	if (v.kind == ExactValue_Compound && v.value_compound != nullptr && v.value_compound->kind == Ast_CompoundLit) {
+		ast_node(cl, CompoundLit, v.value_compound);
+		type_writer_appendb(w, '{');
+		for_array(i, cl->elems) {
+			if (i > 0) {
+				type_writer_appendc(w, CANONICAL_FIELD_SEPARATOR);
+			}
+			Ast *elem = cl->elems[i];
+			if (elem->kind == Ast_FieldValue) {
+				Ast *field = elem->FieldValue.field;
+				if (field->kind == Ast_Ident) {
+					type_writer_append(w, field->Ident.token.string.text, field->Ident.token.string.len);
+				} else if (is_ast_range(field)) {
+					write_canonical_constant_expr(w, field->BinaryExpr.left);
+					type_writer_append(w, field->BinaryExpr.op.string.text, field->BinaryExpr.op.string.len);
+					write_canonical_constant_expr(w, field->BinaryExpr.right);
+				} else {
+					write_canonical_constant_expr(w, field);
+				}
+				type_writer_appendc(w, "=");
+				elem = elem->FieldValue.value;
+			}
+			write_canonical_constant_expr(w, elem);
+		}
+		type_writer_appendb(w, '}');
+		return;
+	}
+	if (v.kind == ExactValue_Variant && v.value_variant != nullptr) {
+		Ast *expr = v.value_variant;
+		bool is_self = expr->tav.value.kind == ExactValue_Variant && expr->tav.value.value_variant == expr;
+		if (expr->tav.mode == Addressing_Constant && !is_self) {
+			write_type_to_canonical_string(w, expr->tav.type);
+			type_writer_appendc(w, "=");
+			write_canonical_exact_value(w, expr->tav.value);
+			return;
+		}
+	}
+	gbString s = exact_value_to_string(v, 1<<16);
+	type_writer_append(w, s, gb_string_length(s));
+	gb_string_free(s);
+}
+
 gb_internal u64 type_hash_canonical_type(Type *type) {
 	if (type == nullptr) {
 		return 0;
diff --git a/src/name_canonicalization.hpp b/src/name_canonicalization.hpp
index 00b450fbe..cec2b99d3 100644
--- a/src/name_canonicalization.hpp
+++ b/src/name_canonicalization.hpp
@@ -46,6 +46,7 @@
 struct TypeWriter;
 
 gb_internal void     write_type_to_canonical_string(TypeWriter *w, Type *type);
+gb_internal void     write_canonical_exact_value(TypeWriter *w, ExactValue const &v);
 gb_internal void     write_canonical_entity_name(TypeWriter *w, Entity *e);
 gb_internal u64      type_hash_canonical_type(Type *type);
 gb_internal String   type_to_canonical_string(gbAllocator allocator, Type *type);

From 73c3a96de1588cb532ac4fbf80323aefad67cd3e Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 21:07:41 +0100
Subject: [PATCH 130/215] Make global checking state thread-safe: read-only
 global scopes, per-group untyped and #soa, deferred link-name checks, fresh
 contexts for on-demand globals

---
 src/check_decl.cpp     | 204 +++++++++++++++++++++++++----------------
 src/check_expr.cpp     |  29 +++---
 src/check_stmt.cpp     |  18 +---
 src/check_type.cpp     |  69 +++++++-------
 src/checker.cpp        | 131 +++++++++++++++++---------
 src/checker.hpp        |  36 +++++++-
 src/checker_global.cpp |  30 +++++-
 src/entity.cpp         |   4 +
 src/llvm_backend.cpp   |   6 ++
 src/types.cpp          |  70 +++++++++++---
 10 files changed, 396 insertions(+), 201 deletions(-)

diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index 3343465ae..4a40ba7a4 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -170,7 +170,7 @@ gb_internal void override_entity_in_scope(Entity *original_entity, Entity *new_e
 	// has been "evaluated" and the variant data can be copied across
 
 	rw_mutex_lock(&found_scope->mutex);
-	scope_map_insert(&found_scope->elements, original_intern, hash, new_entity);
+	scope_map_replace(&found_scope->elements, original_intern, hash, new_entity);
 	rw_mutex_unlock(&found_scope->mutex);
 
 	original_entity->flags |= EntityFlag_Overridden;
@@ -1257,41 +1257,95 @@ gb_internal void check_target_feature_attributes(AttributeContext &ac, Entity *e
 	}
 }
 
-gb_internal void check_foreign_procedure(CheckerContext *ctx, Entity *e, DeclInfo *d) {
-	GB_ASSERT(e != nullptr);
-	GB_ASSERT(e->kind == Entity_Procedure);
-	String name = e->Procedure.link_name;
+gb_internal void add_link_name_use(CheckerInfo *info, String name, Entity *e, DeclInfo *d, LinkNameUseKind kind) {
+	mutex_lock(&info->foreign_mutex);
+	array_add(&info->link_names, LinkNameUse{name, e, d, kind});
+	mutex_unlock(&info->foreign_mutex);
+}
 
-	mutex_lock(&ctx->info->foreign_mutex);
+gb_internal GB_COMPARE_PROC(link_name_use_cmp) {
+	LinkNameUse const *x = cast(LinkNameUse const *)a;
+	LinkNameUse const *y = cast(LinkNameUse const *)b;
+	i32 cmp = string_compare(x->name, y->name);
+	if (cmp != 0) {
+		return cmp;
+	}
+	if (x->entity != y->entity) {
+		return entity_source_order_cmp(x->entity, y->entity);
+	}
+	return i32_cmp(x->kind, y->kind);
+}
+gb_internal void check_link_name_uses(Checker *c) {
+	auto &uses = c->info.link_names;
+	array_sort(uses, link_name_use_cmp);
+
+	LinkNameUse *first = nullptr;
+	for (isize i = 0; i < uses.count; i++) {
+		LinkNameUse *u = &uses[i];
+		if (i > 0 && uses[i-1].name != u->name) {
+			first = nullptr;
+		} else if (i > 0 && uses[i-1].entity == u->entity) {
+			continue;
+		}
+		String name = u->name;
+		if (name == "main" && u->kind != LinkNameUse_Variable) {
+			if (u->kind == LinkNameUse_ForeignProcedure || u->entity->pkg->kind != Package_Runtime) {
+				error(u->decl->proc_lit, "The link name 'main' is reserved for internal use");
+			}
+			continue;
+		}
+		if (first == nullptr) {
+			first = u;
+			continue;
+		}
+
+		Entity *e = u->entity;
+		Entity *f = first->entity;
 
-	auto *fp = &ctx->info->foreigns;
-	StringHashKey key = string_hash_string(name);
-	Entity **found = string_map_get(fp, key);
-	if (found && e != *found) {
-		Entity *f = *found;
 		TokenPos pos = f->token.pos;
+
 		Type *this_type = base_type(e->type);
 		Type *other_type = base_type(f->type);
-		if (is_type_proc(this_type) && is_type_proc(other_type)) {
-			if (!are_signatures_similar_enough(this_type, other_type)) {
-				error(d->proc_lit,
-				      "Redeclaration of foreign procedure '%.*s' with different type signatures\n"
+
+		switch (u->kind) {
+		case LinkNameUse_ForeignProcedure:
+			if (is_type_proc(this_type) && is_type_proc(other_type)) {
+				if (!are_signatures_similar_enough(this_type, other_type)) {
+					error(u->decl->proc_lit,
+					      "Redeclaration of foreign procedure '%.*s' with different type signatures\n"
+					      "\tat %s",
+					      LIT(name), token_pos_to_string(pos));
+				}
+			} else if (!signature_parameter_similar_enough(this_type, other_type)) {
+				error(u->decl->proc_lit,
+				      "Foreign entity '%.*s' previously declared elsewhere with a different type\n"
 				      "\tat %s",
 				      LIT(name), token_pos_to_string(pos));
 			}
-		} else if (!signature_parameter_similar_enough(this_type, other_type)) {
-			error(d->proc_lit,
-			      "Foreign entity '%.*s' previously declared elsewhere with a different type\n"
-			      "\tat %s",
+			break;
+		case LinkNameUse_Procedure:
+			// TODO(bill): Better error message?
+			error(u->decl->proc_lit,
+			      "Non-unique linking name for procedure '%.*s'\n"
+			      "\tother at %s",
 			      LIT(name), token_pos_to_string(pos));
+			break;
+		case LinkNameUse_Variable:
+			if (e->type == nullptr || f->type == nullptr || !signature_parameter_similar_enough(this_type, other_type)) {
+				error(e->token,
+				      "Foreign entity '%.*s' previously declared elsewhere with a different type\n"
+				      "\tat %s",
+				      LIT(name), token_pos_to_string(pos));
+			}
+			break;
 		}
-	} else if (name == "main") {
-		error(d->proc_lit, "The link name 'main' is reserved for internal use");
-	} else {
-		string_map_set(fp, key, e);
 	}
+}
 
-	mutex_unlock(&ctx->info->foreign_mutex);
+gb_internal void check_foreign_procedure(CheckerContext *ctx, Entity *e, DeclInfo *d) {
+	GB_ASSERT(e != nullptr);
+	GB_ASSERT(e->kind == Entity_Procedure);
+	add_link_name_use(ctx->info, e->Procedure.link_name, e, d, LinkNameUse_ForeignProcedure);
 }
 
 gb_internal void check_proc_decl(CheckerContext *ctx, Entity *e, DeclInfo *d) {
@@ -1562,14 +1616,17 @@ gb_internal void check_proc_decl(CheckerContext *ctx, Entity *e, DeclInfo *d) {
 			}
 
 			if (e->pkg->kind == Package_Init) {
-				if (ctx->info->entry_point != nullptr) {
+				mutex_lock(&ctx->info->entry_point_mutex);
+				Entity *prev_entry_point = ctx->info->entry_point;
+				if (prev_entry_point == nullptr) {
+					ctx->info->entry_point = e;
+				}
+				mutex_unlock(&ctx->info->entry_point_mutex);
+				if (prev_entry_point != nullptr) {
 					begin_error_block();
 					error(e->token, "Redeclaration of the entry point procedure 'main'");
 					error_line("\tSuggestion: Is this a single-file package? If so, try compiling using the `-file` flag.\n");
 					end_error_block();
-
-				} else {
-					ctx->info->entry_point = e;
 				}
 			}
 		}
@@ -1660,28 +1717,7 @@ gb_internal void check_proc_decl(CheckerContext *ctx, Entity *e, DeclInfo *d) {
 			name = e->Procedure.link_name;
 		}
 		if (e->Procedure.link_name.len > 0 || is_export) {
-			mutex_lock(&ctx->info->foreign_mutex);
-
-			auto *fp = &ctx->info->foreigns;
-			StringHashKey key = string_hash_string(name);
-			Entity **found = string_map_get(fp, key);
-			if (found) {
-				Entity *f = *found;
-				TokenPos pos = f->token.pos;
-				// TODO(bill): Better error message?
-				error(d->proc_lit,
-				      "Non unique linking name for procedure '%.*s'\n"
-				      "\tother at %s",
-				      LIT(name), token_pos_to_string(pos));
-			} else if (name == "main") {
-				if (d->entity.load()->pkg->kind != Package_Runtime) {
-					error(d->proc_lit, "The link name 'main' is reserved for internal use");
-				}
-			} else {
-				string_map_set(fp, key, e);
-			}
-
-			mutex_unlock(&ctx->info->foreign_mutex);
+			add_link_name_use(ctx->info, name, e, d, LinkNameUse_Procedure);
 		}
 	}
 	
@@ -1777,24 +1813,7 @@ gb_internal void check_global_variable_decl(CheckerContext *ctx, Entity *e, Ast
 			name = e->Variable.link_name;
 		}
 
-		auto *fp = &ctx->info->foreigns;
-		StringHashKey key = string_hash_string(name);
-		Entity **found = string_map_get(fp, key);
-		if (found) {
-			Entity *f = *found;
-			TokenPos pos = f->token.pos;
-			Type *this_type = base_type(e->type);
-			Type *other_type = base_type(f->type);
-			bool type_is_null = (e->type == nullptr || f->type == nullptr);
-			if (type_is_null || !signature_parameter_similar_enough(this_type, other_type)) {
-				error(e->token,
-				      "Foreign entity '%.*s' previously declared elsewhere with a different type\n"
-				      "\tat %s",
-				      LIT(name), token_pos_to_string(pos));
-			}
-		} else {
-			string_map_set(fp, key, e);
-		}
+		add_link_name_use(ctx->info, name, e, decl, LinkNameUse_Variable);
 	}
 	
 	if (e->Variable.link_name.len > 0) {
@@ -1910,9 +1929,15 @@ gb_internal void check_proc_group_decl(CheckerContext *ctx, Entity *pg_entity, D
 
 	ptr_set_destroy(&entity_set);
 
+	// NOTE(bill, 2026-10-01): an invalid overload is dropped from this group only, as others may be using that procedure
+	auto invalid = array_make<bool>(temporary_allocator(), pge->entities.count);
+	for (isize j = 0; j < pge->entities.count; j++) {
+		invalid[j] = false;
+	}
+
 	for (isize j = 0; j < pge->entities.count; j++) {
 		Entity *p = pge->entities[j];
-		if (p->type == t_invalid) {
+		if (p->type == t_invalid || invalid[j]) {
 			// NOTE(bill): This invalid overload has already been handled
 			continue;
 		}
@@ -1931,7 +1956,7 @@ gb_internal void check_proc_group_decl(CheckerContext *ctx, Entity *pg_entity, D
 
 			TokenPos pos = q->token.pos;
 
-			if (q->type == nullptr || q->type == t_invalid) {
+			if (q->type == nullptr || q->type == t_invalid || invalid[k]) {
 				continue;
 			}
 
@@ -1987,10 +2012,17 @@ gb_internal void check_proc_group_decl(CheckerContext *ctx, Entity *pg_entity, D
 
 			if (is_invalid) {
 				error_line("\tprevious procedure at %s\n", token_pos_to_string(pos));
-				q->type = t_invalid;
+				invalid[k] = true;
 			}
 		}
 	}
+	isize valid_count = 0;
+	for (isize j = 0; j < pge->entities.count; j++) {
+		if (!invalid[j]) {
+			pge->entities[valid_count++] = pge->entities[j];
+		}
+	}
+	pge->entities.count = valid_count;
 
 	AttributeContext ac = {};
 	check_decl_attributes(ctx, d->attributes, proc_group_attribute, &ac);
@@ -2153,6 +2185,7 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 			mutex_unlock(&ctx->info->lazy_mutex);
 			return;
 		}
+		lazy_mutex_depth += 1;
 	}
 	GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
 
@@ -2174,18 +2207,34 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 		}
 
 		CheckerContext c = *ctx;
+		if (d->scope->flags & ScopeFlag_File) {
+			// NOTE(bill): a global is checked in a context of its own file, never in that of whatever needed it first,
+			// which may be in another file or package, or a procedure body.
+			// Only the cycle detection carries over.
+			CheckerTypePath *type_path = c.type_path;
+			UntypedExprInfoMap *untyped = c.untyped;
+			gb_zero_size(&c.pkg, gb_size_of(CheckerContext) - gb_offset_of(CheckerContext, pkg));
+			add_curr_ast_file(&c, d->scope->file);
+			c.type_path = type_path;
+			c.untyped = untyped;
+		}
 		c.scope = d->scope;
 		c.decl  = d;
 		c.type_level = 0;
 		c.curr_proc_calling_convention = ProcCC_Contextless;
 
+		// NOTE: a file scope's is set from its own file and shared by every thread, see `create_scope_from_file`
+		bool set_context = (c.scope->flags & ScopeFlag_File) == 0;
 		auto prev_flags = c.scope->flags;
-		defer (c.scope->flags = prev_flags);
-
-		if (check_feature_flags(ctx, d->decl_node) & OptInFeatureFlag_GlobalContext) {
-			c.scope->flags |= ScopeFlag_ContextDefined;
-		} else {
-			c.scope->flags &= ~ScopeFlag_ContextDefined;
+		defer (if (set_context) {
+			c.scope->flags = prev_flags;
+		});
+		if (set_context) {
+			if (check_feature_flags(ctx, d->decl_node) & OptInFeatureFlag_GlobalContext) {
+				c.scope->flags |= ScopeFlag_ContextDefined;
+			} else {
+				c.scope->flags &= ~ScopeFlag_ContextDefined;
+			}
 		}
 
 		global_group_check_edge(ctx, e);
@@ -2242,6 +2291,7 @@ end:;
 	// NOTE(bill): Add it to the list of checked entities
 	if (is_lazy) {
 		array_add(&ctx->info->entities, e);
+		lazy_mutex_depth -= 1;
 		mutex_unlock(&ctx->info->lazy_mutex);
 	}
 }
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 2985c8c67..4f0feab8b 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -178,10 +178,10 @@ gb_internal void populate_check_did_you_mean_objc_entity(StringSet *set, Entity
 	if (e->kind != Entity_TypeName) {
 		return;
 	}
-	if (e->TypeName.objc_metadata == nullptr) {
+	TypeNameObjCMetadata *objc_metadata = entity_objc_metadata(e);
+	if (objc_metadata == nullptr) {
 		return;
 	}
-	TypeNameObjCMetadata *objc_metadata = e->TypeName.objc_metadata;
 	Type *t = base_type(e->type);
 	GB_ASSERT(t->kind == Type_Struct);
 
@@ -210,8 +210,8 @@ gb_internal void check_did_you_mean_objc_entity(String const &name, Entity *e, b
 
 	ERROR_BLOCK();
 	GB_ASSERT(e->kind == Entity_TypeName);
-	GB_ASSERT(e->TypeName.objc_metadata != nullptr);
-	auto *objc_metadata = e->TypeName.objc_metadata;
+	auto *objc_metadata = entity_objc_metadata(e);
+	GB_ASSERT(objc_metadata != nullptr);
 	MUTEX_GUARD(objc_metadata->mutex);
 
 	StringSet set = {};
@@ -515,7 +515,8 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	// NOTE(bill): This is slightly memory leaking if the type already exists
 	// Maybe it's better to check with the previous types first?
 	Type *final_proc_type = alloc_type_proc(scope, nullptr, 0, nullptr, 0, false, pt->calling_convention);
-	bool success = check_procedure_type(&nctx, final_proc_type, pt->node, &operands);
+	// NOTE: a clone, as other threads may be instantiating the same procedure, from the same AST
+	bool success = check_procedure_type(&nctx, final_proc_type, clone_ast(pt->node), &operands);
 
 	if (!success) {
 		return false;
@@ -655,14 +656,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 
 	d->entity.store(entity);
 
-	AstFile *file = nullptr;
-	{
-		Scope *s = entity->scope;
-		while (s != nullptr && s->file == nullptr) {
-			file = s->file;
-			s = s->parent;
-		}
-	}
+	AstFile *file = base_entity->file;
 
 	array_add(&gen_procs->procs, entity);
 	rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
@@ -6116,7 +6110,7 @@ gb_internal Entity *check_selector(CheckerContext *c, Operand *operand, Ast *nod
 				if (operand->type->kind == Type_Named &&
 				    operand->type->Named.type_name &&
 				    operand->type->Named.type_name->kind == Entity_TypeName &&
-				    operand->type->Named.type_name->TypeName.objc_metadata) {
+				    entity_objc_metadata(operand->type->Named.type_name)) {
 					check_did_you_mean_objc_entity(name, operand->type->Named.type_name, operand->mode == Addressing_Type);
 				} else if (bt->kind == Type_Struct) {
 					check_did_you_mean_type(name, bt->Struct.fields);
@@ -8816,6 +8810,11 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 		CheckerContext ctx = *c;
 		// NOTE(bill): We need to make sure the lookup scope for the record is the same as where it was created
 		ctx.scope = polymorphic_record_parent_scope(original_type);
+
+		if (original_type->Named.type_name && original_type->Named.type_name->file) {
+			ctx.file = original_type->Named.type_name->file;
+			ctx.pkg = ctx.file->pkg;
+		}
 		GB_ASSERT(ctx.scope != nullptr);
 
 		Type *bt = base_type(original_type);
@@ -8830,7 +8829,9 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 			set_base_type(named_type, struct_type);
 
 			check_open_scope(&ctx, node);
+			begin_filling_record(struct_type);
 			check_struct_type(&ctx, struct_type, node, &ordered_operands, named_type, original_type, found_gen_types);
+			end_filling_record(struct_type);
 			// check_struct_type released found_gen_types->mutex after publishing the instantiation.
 			gen_types_locked = false;
 			check_close_scope(&ctx);
diff --git a/src/check_stmt.cpp b/src/check_stmt.cpp
index ffc6f4cc0..dfb046da3 100644
--- a/src/check_stmt.cpp
+++ b/src/check_stmt.cpp
@@ -2355,23 +2355,7 @@ gb_internal void check_value_decl_stmt(CheckerContext *ctx, Ast *node, u32 mod_f
 			}
 			init_entity_foreign_library(ctx, e);
 
-			auto *fp = &ctx->checker->info.foreigns;
-			StringHashKey key = string_hash_string(name);
-			Entity **found = string_map_get(fp, key);
-			if (found) {
-				Entity *f = *found;
-				TokenPos pos = f->token.pos;
-				Type *this_type = base_type(e->type);
-				Type *other_type = base_type(f->type);
-				if (!signature_parameter_similar_enough(this_type, other_type)) {
-					error(e->token,
-					      "Foreign entity '%.*s' previously declared elsewhere with a different type\n"
-					      "\tat %s",
-					      LIT(name), token_pos_to_string(pos));
-				}
-			} else {
-				string_map_set(fp, key, e);
-			}
+			add_link_name_use(ctx->info, name, e, ctx->decl, LinkNameUse_Variable);
 		} else if (e->flags & EntityFlag_Static) {
 			if (vd->values.count > 0) {
 				if (entity_count != vd->values.count) {
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 61f5a7b3a..6c39472db 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -349,7 +349,9 @@ gb_internal void add_polymorphic_record_entity(CheckerContext *ctx, Ast *node, T
 
 		e = alloc_entity_type_name(s, token, named_type);
 		e->state = EntityState_Resolved;
-		e->file = ctx->file;
+
+		// NOTE(bille): the generic's file as its token is not that of whichever instantiated it first
+		e->file = original_type->Named.type_name && original_type->Named.type_name->file ? original_type->Named.type_name->file : ctx->file;
 		e->pkg = pkg;
 		e->TypeName.original_type_for_parapoly = original_type;
 		add_entity_use(ctx, node, e);
@@ -770,40 +772,15 @@ gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *
 		}
 	}
 
-	if (!struct_type->Struct.is_polymorphic) {
-		if (st->where_clauses.count > 0 && st->polymorphic_params == nullptr) {
-			error(st->where_clauses[0], "'where' clauses can only be used on structures with polymorphic parameters");
-		} else {
-			bool where_clause_ok = evaluate_where_clauses(ctx, node, ctx->scope, &st->where_clauses, true);
-			gb_unused(where_clause_ok);
-		}
-		check_struct_fields(ctx, node, &struct_type->Struct.fields, &struct_type->Struct.tags, st->fields, min_field_count, struct_type, context);
-
-		if (st->is_simple) {
-			bool success = true;
-			for (Entity *f : struct_type->Struct.fields) {
-				if (!is_type_nearly_simple_compare(f->type)) {
-					gbString s = type_to_string(f->type);
-					error(f->token, "'struct #simple' requires all fields to be at least 'nearly simple compare', got %s", s);
-					gb_string_free(s);
-				}
-			}
-			if (success) {
-				struct_type->Struct.is_simple = true;
-			}
-		}
-
-		wait_signal_set(&struct_type->Struct.fields_wait_signal);
-	}
 
 #define ST_ALIGN(_name) if (st->_name != nullptr) {                                                \
 		if (st->is_packed) {                                                               \
 			error(st->_name, "'#%s' cannot be applied with '#packed'", #_name); \
-			return;                                                                    \
-		}                                                                                  \
-		i64 align = 1;                                                                     \
-		if (check_custom_align(ctx, st->_name, &align, #_name)) {                          \
-			struct_type->Struct.custom_##_name = align;                                \
+		} else {                                                                           \
+			i64 align = 1;                                                             \
+			if (check_custom_align(ctx, st->_name, &align, #_name)) {                  \
+				struct_type->Struct.custom_##_name = align;                        \
+			}                                                                          \
 		}                                                                                  \
 	}
 
@@ -836,6 +813,33 @@ gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *
 	}
 
 #undef ST_ALIGN
+
+	if (!struct_type->Struct.is_polymorphic) {
+		if (st->where_clauses.count > 0 && st->polymorphic_params == nullptr) {
+			error(st->where_clauses[0], "'where' clauses can only be used on structures with polymorphic parameters");
+		} else {
+			bool where_clause_ok = evaluate_where_clauses(ctx, node, ctx->scope, &st->where_clauses, true);
+			gb_unused(where_clause_ok);
+		}
+		check_struct_fields(ctx, node, &struct_type->Struct.fields, &struct_type->Struct.tags, st->fields, min_field_count, struct_type, context);
+
+		if (st->is_simple) {
+			bool success = true;
+			for (Entity *f : struct_type->Struct.fields) {
+				if (!is_type_nearly_simple_compare(f->type)) {
+					gbString s = type_to_string(f->type);
+					error(f->token, "'struct #simple' requires all fields to be at least 'nearly simple compare', got %s", s);
+					gb_string_free(s);
+				}
+			}
+			if (success) {
+				struct_type->Struct.is_simple = true;
+			}
+		}
+
+		wait_signal_set(&struct_type->Struct.fields_wait_signal);
+	}
+
 }
 gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *node, Array<Operand> *poly_operands, Type *named_type, Type *original_type_for_poly, GenTypesData *poly_gen_types_to_unlock) {
 	GB_ASSERT(is_type_union(union_type));
@@ -4622,6 +4626,9 @@ gb_internal Type *make_soa_struct_internal(CheckerContext *ctx, Ast *array_typ_e
 	if (is_complete) {
 		add_type_info_type(ctx, soa_struct);
 		wait_signal_set(&soa_struct->Struct.fields_wait_signal);
+	} else if (global_group_soa_types != nullptr) {
+		// NOTE: no task waits on the element type, which could hold every thread of the pool
+		array_add(global_group_soa_types, soa_struct);
 	} else {
 		SoaTypeWorkerData *wd = permanent_alloc_item<SoaTypeWorkerData>();
 		wd->ctx = *ctx;
diff --git a/src/checker.cpp b/src/checker.cpp
index 6bc02b9f6..6b7f10159 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -246,10 +246,10 @@ gb_internal Scope *create_scope(CheckerInfo *info, Scope *parent) {
 	s->parent = parent;
 
 	if (parent != nullptr && parent != builtin_pkg->scope) {
-		Scope *prev_head_child = parent->head_child.exchange(s, std::memory_order_acq_rel);
-		if (prev_head_child) {
-			s->next.store(prev_head_child, std::memory_order_release);
-		}
+		Scope *prev_head_child = parent->head_child.load(std::memory_order_acquire);
+		do {
+			s->next.store(prev_head_child, std::memory_order_relaxed);
+		} while (!parent->head_child.compare_exchange_weak(prev_head_child, s, std::memory_order_acq_rel, std::memory_order_acquire));
 	}
 
 	if (parent != nullptr && parent->flags & ScopeFlag_ContextDefined) {
@@ -272,6 +272,13 @@ gb_internal Scope *create_scope_from_file(CheckerInfo *info, AstFile *f) {
 	s->file = f;
 	f->scope = s;
 
+	bool global_context = f->feature_flags_set && (f->feature_flags & OptInFeatureFlag_GlobalContext) != 0;
+	if (global_context) {
+		s->flags |= ScopeFlag_ContextDefined;
+	} else {
+		s->flags &= ~ScopeFlag_ContextDefined;
+	}
+
 	return s;
 }
 
@@ -425,10 +432,7 @@ gb_internal Entity *scope_lookup_current(Scope *s, InternedString name, u32 hash
 }
 
 
-gb_global std::atomic<bool> in_single_threaded_checker_stage;
-
 gb_internal void scope_lookup_parent(Scope *scope, InternedString name, Scope **scope_, Entity **entity_, u32 hash) {
-	bool is_single_threaded = in_single_threaded_checker_stage.load(std::memory_order_relaxed);
 	if (scope != nullptr) {
 		bool gone_thru_proc = false;
 		bool gone_thru_package = false;
@@ -437,9 +441,13 @@ gb_internal void scope_lookup_parent(Scope *scope, InternedString name, Scope **
 		}
 		for (Scope *s = scope; s != nullptr; s = s->parent) {
 			Entity *found = nullptr;
-			if (!is_single_threaded) rw_mutex_shared_lock(&s->mutex);
-			found = scope_map_get(&s->elements, name, hash);
-			if (!is_single_threaded) rw_mutex_shared_unlock(&s->mutex);
+			if (s->flags & ScopeFlag_ReadOnly) {
+				found = scope_map_get(&s->elements, name, hash);
+			} else {
+				rw_mutex_shared_lock(&s->mutex);
+				found = scope_map_get(&s->elements, name, hash);
+				rw_mutex_shared_unlock(&s->mutex);
+			}
 			if (global_when_trial != nullptr) {
 				found = global_when_trial_lookup(s, name, hash, found);
 			}
@@ -490,6 +498,7 @@ gb_internal Entity *scope_insert_with_name_no_mutex(Scope *s, InternedString nam
 	if (name.value == 0) {
 		return nullptr;
 	}
+	GB_ASSERT_MSG((s->flags & ScopeFlag_ReadOnly) == 0, "%.*s", LIT(entity->token.string));
 	Entity *found = nullptr;
 	Entity *result = nullptr;
 
@@ -526,6 +535,7 @@ gb_internal Entity *scope_insert_with_name(Scope *s, InternedString name, u32 ha
 	if (name.value == 0) {
 		return nullptr;
 	}
+	GB_ASSERT_MSG((s->flags & ScopeFlag_ReadOnly) == 0, "%.*s", LIT(entity->token.string));
 	Entity *found = nullptr;
 	Entity *result = nullptr;
 
@@ -568,11 +578,7 @@ gb_internal Entity *scope_insert(Scope *s, Entity *entity) {
 	auto name = entity_interned_name(entity);
 	u32 hash = entity->interned_name_hash.load(std::memory_order_relaxed);
 	GB_ASSERT(hash != 0);
-	if (in_single_threaded_checker_stage.load(std::memory_order_relaxed)) {
-		return scope_insert_with_name_no_mutex(s, name, hash, entity);
-	} else {
-		return scope_insert_with_name(s, name, hash, entity);
-	}
+	return scope_insert_with_name(s, name, hash, entity);
 }
 
 gb_internal Entity *scope_insert_no_mutex(Scope *s, Entity *entity) {
@@ -918,13 +924,9 @@ gb_internal void check_scope_usage(Checker *c, Scope *scope, u64 vet_flags) {
 
 
 gb_internal void add_dependency(CheckerInfo *info, DeclInfo *d, Entity *e) {
-	if (in_single_threaded_checker_stage.load(std::memory_order_relaxed)) {
-		ptr_set_add(&d->deps, e);
-	} else {
-		rw_mutex_lock(&d->deps_mutex);
-		ptr_set_add(&d->deps, e);
-		rw_mutex_unlock(&d->deps_mutex);
-	}
+	rw_mutex_lock(&d->deps_mutex);
+	ptr_set_add(&d->deps, e);
+	rw_mutex_unlock(&d->deps_mutex);
 }
 gb_internal void add_type_info_dependency(CheckerInfo *info, DeclInfo *d, Type *type) {
 	if (d == nullptr || type == nullptr) {
@@ -1649,7 +1651,7 @@ gb_internal void init_checker_info(CheckerInfo *i) {
 	array_init(&i->definitions,   a);
 	array_init(&i->entities,      a);
 	map_init(&i->global_untyped);
-	string_map_init(&i->foreigns);
+	array_init(&i->link_names, heap_allocator());
 
 	type_set_init(&i->min_dep_type_info_set);
 	map_init(&i->min_dep_type_info_index_map);
@@ -1691,7 +1693,7 @@ gb_internal void destroy_checker_info(CheckerInfo *i) {
 	array_free(&i->definitions);
 	array_free(&i->entities);
 	map_destroy(&i->global_untyped);
-	string_map_destroy(&i->foreigns);
+	array_free(&i->link_names);
 
 	type_set_destroy(&i->min_dep_type_info_set);
 	map_destroy(&i->min_dep_type_info_index_map);
@@ -1917,13 +1919,12 @@ gb_internal ExprInfo *check_get_expr_info(CheckerContext *c, Ast *expr) {
 		}
 		return nullptr;
 	} else {
+		// NOTE: read under the lock, as another thread's insert may move the entries
 		rw_mutex_shared_lock(&c->info->global_untyped_mutex);
 		ExprInfo **found = map_get(&c->info->global_untyped, expr);
+		ExprInfo *info = found ? *found : nullptr;
 		rw_mutex_shared_unlock(&c->info->global_untyped_mutex);
-		if (found) {
-			return *found;
-		}
-		return nullptr;
+		return info;
 	}
 }
 
@@ -2023,8 +2024,6 @@ gb_internal void add_type_and_value(CheckerContext *ctx, Ast *expr, AddressingMo
 		return;
 	}
 
-	BlockingMutex *mutex = tav_mutex_for_node(expr);
-
 	/* Previous logic:
 		BlockingMutex *mutex = &ctx->info->type_and_value_mutex;
 		if (ctx->decl) {
@@ -2034,10 +2033,11 @@ gb_internal void add_type_and_value(CheckerContext *ctx, Ast *expr, AddressingMo
 		}
 	*/
 
-	mutex_lock(mutex);
 	Ast *prev_expr = nullptr;
 	while (prev_expr != expr) {
 		prev_expr = expr;
+		BlockingMutex *mutex = tav_mutex_for_node(expr);
+		mutex_lock(mutex);
 		expr->tav.mode = mode;
 		if (type != nullptr && expr->tav.type != nullptr &&
 		    is_type_any(type) && is_type_untyped(expr->tav.type)) {
@@ -2053,13 +2053,13 @@ gb_internal void add_type_and_value(CheckerContext *ctx, Ast *expr, AddressingMo
 		} else if (mode == Addressing_Value && type != nullptr && is_type_proc(type)) {
 			expr->tav.value = value;
 		}
+		mutex_unlock(mutex);
 
 		expr = unparen_expr(expr);
 		if (expr == nullptr) {
 			break;
 		};
 	}
-	mutex_unlock(mutex);
 }
 
 gb_internal void add_entity_definition(CheckerInfo *i, Ast *identifier, Entity *entity) {
@@ -2629,7 +2629,9 @@ gb_internal void check_procedure_later(Checker *c, ProcInfo *info) {
 	if (global_procedure_body_in_worker_queue.load()) {
 		thread_pool_add_task(check_proc_info_worker_proc, info);
 	} else {
+		mutex_lock(&c->procs_to_check_mutex);
 		array_add(&c->procs_to_check, info);
+		mutex_unlock(&c->procs_to_check_mutex);
 	}
 
 	if (DEBUG_CHECK_ALL_PROCEDURES) {
@@ -3383,7 +3385,7 @@ gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInf
 }
 
 
-gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d);
+gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d, UntypedExprInfoMap *untyped=nullptr);
 
 
 gb_internal Entity *find_core_entity(Checker *c, String name) {
@@ -5329,7 +5331,7 @@ gb_internal CheckerContext *create_checker_context(Checker *c) {
 	return ctx;
 }
 
-gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d) {
+gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d, UntypedExprInfoMap *untyped) {
 	GB_ASSERT(e != nullptr);
 	if (e->state == EntityState_Resolved)  {
 		// NOTE: also an alias already overridden by what it aliases, which may have no `DeclInfo`
@@ -5352,6 +5354,7 @@ gb_internal void check_single_global_entity(Checker *c, Entity *e, DeclInfo *d)
 	GB_ASSERT(e->pkg != nullptr);
 	ctx->decl = d;
 	ctx->scope = d->scope;
+	ctx->untyped = untyped;
 
 	if (pkg->kind == Package_Init) {
 		if (e->kind != Entity_Procedure && e->token.string == "main") {
@@ -7164,6 +7167,22 @@ gb_internal void handle_raddbg_type_view(Checker *c, RaddbgTypeView const &type_
 	array_add(&c->info.raddbg_type_views, RaddbgTypeView{type, view});
 }
 
+gb_internal GB_COMPARE_PROC(raddbg_type_view_cmp) {
+	RaddbgTypeView const *x = cast(RaddbgTypeView const *)a;
+	RaddbgTypeView const *y = cast(RaddbgTypeView const *)b;
+	Entity *xe = (x->type && x->type->kind == Type_Named) ? x->type->Named.type_name : nullptr;
+	Entity *ye = (y->type && y->type->kind == Type_Named) ? y->type->Named.type_name : nullptr;
+	if (xe != nullptr && ye != nullptr && xe != ye) {
+		return entity_source_order_cmp(xe, ye);
+	}
+	u64 xh = type_hash_canonical_type(x->type);
+	u64 yh = type_hash_canonical_type(y->type);
+	if (xh != yh) {
+		return xh < yh ? -1 : +1;
+	}
+	return string_compare(x->view, y->view);
+}
+
 gb_internal void check_objc_context_provider_procedures(Checker *c) {
 	for (Entity *e = nullptr; mpsc_dequeue(&c->procs_with_objc_context_provider_to_check, &e); /**/) {
 		GB_ASSERT(e->kind == Entity_TypeName);
@@ -7343,18 +7362,18 @@ gb_internal void check_update_dependency_tree_for_procedures(Checker *c) {
 #else
 gb_internal void check_walk_all_dependencies(DeclInfo *decl);
 
-gb_internal WORKER_TASK_PROC(check_walk_all_dependencies_worker_proc) {
-	if (data == nullptr) {
-		return 0;
-	}
-	DeclInfo *decl = cast(DeclInfo *)data;
-
+// NOTE: post-order, so a declaration has the dependencies of all those nested in it before they are added to its parent
+gb_internal void check_walk_all_dependencies_post_order(DeclInfo *decl) {
 	for (DeclInfo *child = decl->next_child; child != nullptr; child = child->next_sibling) {
-		thread_pool_add_task(check_walk_all_dependencies_worker_proc, child);
-		check_walk_all_dependencies(child);
+		check_walk_all_dependencies_post_order(child);
 	}
-
 	add_deps_from_child_to_parent(decl);
+}
+
+gb_internal WORKER_TASK_PROC(check_walk_all_dependencies_worker_proc) {
+	if (data != nullptr) {
+		check_walk_all_dependencies_post_order(cast(DeclInfo *)data);
+	}
 	return 0;
 }
 
@@ -7488,6 +7507,17 @@ gb_internal void check_parsed_files(Checker *c) {
 	TIME_SECTION("export entities - post");
 	check_export_entities(c);
 
+	// NOTE: no global name is declared from here on, so their scopes are read without locking
+	for (AstPackage *pkg : c->parser->packages) {
+		pkg->scope->flags |= ScopeFlag_ReadOnly;
+		for (AstFile *f : pkg->files) {
+			f->scope->flags |= ScopeFlag_ReadOnly;
+		}
+	}
+	builtin_pkg->scope->flags    |= ScopeFlag_ReadOnly;
+	intrinsics_pkg->scope->flags |= ScopeFlag_ReadOnly;
+	config_pkg->scope->flags     |= ScopeFlag_ReadOnly;
+
 	TIME_SECTION("add entities from packages");
 	check_merge_queues_into_arrays(c);
 
@@ -7622,6 +7652,9 @@ gb_internal void check_parsed_files(Checker *c) {
 
 	debugf("Total Procedure Bodies Checked: %td\n", total_bodies_checked.load(std::memory_order_relaxed));
 
+	TIME_SECTION("check unique link names");
+	check_link_name_uses(c);
+
 	TIME_SECTION("check unique package names");
 	bool package_names_are_unique = check_unique_package_names(c);
 
@@ -7720,8 +7753,16 @@ gb_internal void check_parsed_files(Checker *c) {
 	}
 
 	TIME_SECTION("collate type info stuff");
-	for (RaddbgTypeView type_view; mpsc_dequeue(&c->info.raddbg_type_views_queue, &type_view); /**/) {
-		handle_raddbg_type_view(c, type_view);
+	{
+		auto views = array_make<RaddbgTypeView>(heap_allocator());
+		defer (array_free(&views));
+		for (RaddbgTypeView type_view; mpsc_dequeue(&c->info.raddbg_type_views_queue, &type_view); /**/) {
+			array_add(&views, type_view);
+		}
+		array_sort(views, raddbg_type_view_cmp);
+		for (RaddbgTypeView const &type_view : views) {
+			handle_raddbg_type_view(c, type_view);
+		}
 	}
 
 
diff --git a/src/checker.hpp b/src/checker.hpp
index 633790405..78f579c2d 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -269,6 +269,20 @@ struct ProcInfo {
 };
 
 
+enum LinkNameUseKind : u8 {
+	LinkNameUse_ForeignProcedure,
+	LinkNameUse_Procedure, // exported or with a link name
+	LinkNameUse_Variable,  // foreign or exported
+};
+
+struct LinkNameUse {
+	String          name;
+	Entity *        entity;
+	DeclInfo *      decl;
+	LinkNameUseKind kind;
+};
+
+
 enum { DEFAULT_SCOPE_CAPACITY = 32 };
 
 
@@ -461,6 +475,19 @@ gb_internal Entity *scope_map_get(ScopeMap *m, InternedString key, u32 hash) {
 	}
 }
 
+// NOTE: the key must be present; never grows, so lookups that do not lock see either value
+gb_internal void scope_map_replace(ScopeMap *m, InternedString key, u32 hash, Entity *value) {
+	u32 mask = m->cap-1;
+	for (u32 pos = hash & mask;; pos = (pos + 1) & mask) {
+		ScopeMapSlot *s = &m->slots[pos];
+		GB_ASSERT(s->hash != 0);
+		if (s->hash == hash && m->keys[pos] == key) {
+			s->value = value;
+			return;
+		}
+	}
+}
+
 gb_internal void scope_map_clear(ScopeMap *m) {
 	gb_memset(m->slots, 0, gb_size_of(*m->slots) * m->cap);
 	m->count = 0;
@@ -548,6 +575,7 @@ enum ScopeFlag : i32 {
 	ScopeFlag_Type    = 1<<7,
 
 	ScopeFlag_HasBeenImported = 1<<10, // This is only applicable to file scopes
+	ScopeFlag_ReadOnly        = 1<<11, // file, package and universe scopes once every global is declared: read without locking
 
 	ScopeFlag_ContextDefined = 1<<16,
 };
@@ -761,7 +789,9 @@ struct CheckerInfo {
 	// TypeSet type_info_set;
 
 	BlockingMutex foreign_mutex; // NOT recursive
-	StringMap<Entity *> foreigns;
+	Array<struct LinkNameUse> link_names; // checked for clashes once everything is checked, see `check_link_name_uses`
+
+	BlockingMutex entry_point_mutex;
 
 	MPSCQueue<Entity *> definition_queue;
 	MPSCQueue<Entity *> entity_queue;
@@ -868,6 +898,7 @@ struct Checker {
 
 	MPSCQueue<Entity *> procs_with_deferred_to_check;
 	MPSCQueue<Entity *> procs_with_objc_context_provider_to_check;
+	BlockingMutex     procs_to_check_mutex;
 	Array<ProcInfo *> procs_to_check;
 
 	BlockingMutex nested_proc_lits_mutex;
@@ -921,6 +952,9 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *c, Ast *decl);
 gb_internal void check_entity_decl(CheckerContext *c, Entity *e, DeclInfo *d, Type *named_type);
 gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e);
 
+// While a group of global entities is checked: its incomplete '#soa' types, completed by the same thread
+gb_thread_local Array<Type *> *global_group_soa_types;
+
 struct GlobalWhenTrialEntityScope {
 	struct GlobalWhenTrial *trial;
 	i32 mute_depth;
diff --git a/src/checker_global.cpp b/src/checker_global.cpp
index ccc212505..fd8b51130 100644
--- a/src/checker_global.cpp
+++ b/src/checker_global.cpp
@@ -39,6 +39,7 @@ gb_internal void global_import_stage_end(GlobalImportStagePart part, u64 start)
 	}
 }
 
+gb_global std::atomic<bool> in_global_entity_stage; // to tell the checks of the global stage from those during 'when' resolution
 gb_global BlockingMutex global_entity_time_mutex;
 gb_global PtrMap<Entity *, GlobalEntityTime> global_entity_times;
 gb_thread_local u64 global_entity_child_ticks;
@@ -68,7 +69,7 @@ gb_internal void global_entity_timing_end(GlobalEntityTimingFrame const &f, Enti
 	u64 self  = total - gb_min(total, global_entity_child_ticks);
 	global_entity_child_ticks = f.saved_child_ticks + total;
 
-	bool in_global_loop = in_single_threaded_checker_stage.load(std::memory_order_relaxed);
+	bool in_global_loop = in_global_entity_stage.load(std::memory_order_relaxed);
 
 	MUTEX_GUARD(&global_entity_time_mutex);
 	GlobalEntityTime *found = map_get(&global_entity_times, e);
@@ -1321,10 +1322,15 @@ gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e) {
 
 // NOTE: members in a fixed order, as which member of a cycle is entered first can decide whether it checks,
 // e.g. an enum whose values are `union_variant_index`es of a union with pointers back to it
+// NOTE: a group's untyped expressions and '#soa' types are its own, so it touches no shared queue meanwhile
 gb_internal void check_global_group(Checker *c, GlobalGroupGraph *g, i32 gi) {
 	GlobalGroup *group = &g->groups[gi];
 	i32 *members = g->members.data + group->start;
 
+	UntypedExprInfoMap untyped = {};
+	auto soa_types = array_make<Type *>(heap_allocator());
+	global_group_soa_types = &soa_types;
+
 	g->current_group = gi;
 	for (i32 k = 0; k < group->count; k++) {
 		Entity *e = g->nodes[members[k]];
@@ -1334,17 +1340,27 @@ gb_internal void check_global_group(Checker *c, GlobalGroupGraph *g, i32 gi) {
 		}
 		g->current_entity = e;
 		GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
-		check_single_global_entity(c, e, e->decl_info);
+		check_single_global_entity(c, e, e->decl_info, &untyped);
 		if (e->type != nullptr && is_type_typed(e->type)) {
-			for (Type *t = nullptr; mpsc_dequeue(&c->soa_types_to_complete, &t); /**/) {
+			for (Type *t : soa_types) {
 				complete_soa_type(c, t, false);
 			}
+			array_clear(&soa_types);
 
 			(void)type_size_of(e->type);
 			(void)type_align_of(e->type);
 		}
 		global_entity_timing_end(timing_frame, e);
 	}
+	for (Type *t : soa_types) {
+		complete_soa_type(c, t, false);
+	}
+	global_group_soa_types = nullptr;
+	array_free(&soa_types);
+
+	add_untyped_expressions(&c->info, &untyped);
+	map_destroy(&untyped);
+
 	group->done = true;
 	g->current_group = -1;
 	g->current_entity = nullptr;
@@ -1432,7 +1448,7 @@ gb_internal void destroy_global_groups(GlobalGroupGraph *g) {
 }
 
 gb_internal void check_all_global_entities(Checker *c) {
-	in_single_threaded_checker_stage.store(true, std::memory_order_relaxed);
+	in_global_entity_stage.store(true, std::memory_order_relaxed);
 
 	// NOTE(bill): the runtime types the checker looks up by name rather than through a declaration
 	init_preload(c);
@@ -1444,6 +1460,10 @@ gb_internal void check_all_global_entities(Checker *c) {
 		}
 	}
 
+	for (Type *t = nullptr; mpsc_dequeue(&c->soa_types_to_complete, &t); /**/) {
+		complete_soa_type(c, t, false);
+	}
+
 	TIME_SECTION("check all global entities - build groups");
 	GlobalGroupGraph *g = &global_groups;
 	build_global_groups(c, g);
@@ -1459,7 +1479,7 @@ gb_internal void check_all_global_entities(Checker *c) {
 		gb_exit(1);
 	}
 
-	in_single_threaded_checker_stage.store(false, std::memory_order_relaxed);
+	in_global_entity_stage.store(false, std::memory_order_relaxed);
 }
 
 
diff --git a/src/entity.cpp b/src/entity.cpp
index b5c1c336b..845e2b910 100644
--- a/src/entity.cpp
+++ b/src/entity.cpp
@@ -142,6 +142,10 @@ enum ProcedureOptimizationMode : u8 {
 
 BlockingMutex global_type_name_objc_metadata_mutex;
 
+struct TypeNameObjCMetadata;
+
+gb_internal TypeNameObjCMetadata *entity_objc_metadata(struct Entity *e);
+
 struct TypeNameObjCMetadataEntry {
 	InternedString interned;
 	Entity *entity;
diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index a0d87630c..ce6a8820a 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -1576,7 +1576,13 @@ gb_internal void lb_finalize_objc_names(lbGenerator *gen, lbProcedure *p) {
 	auto class_impls = array_make<lbObjCGlobalClass>(temporary_allocator(), 0, 16);
 
 	// Register all class implementations unconditionally, even if not statically referenced
+	auto implementations = array_make<Entity *>(temporary_allocator(), 0, 16);
 	for (Entity *e = {}; mpsc_dequeue(&gen->info->objc_class_implementations, &e); /**/) {
+		array_add(&implementations, e);
+	}
+	array_sort(implementations, init_procedures_cmp);
+
+	for (Entity *e : implementations) {
 		GB_ASSERT(e->kind == Entity_TypeName && e->TypeName.objc_is_implementation);
 		lb_handle_objc_find_or_register_class(p, e->TypeName.objc_class_name, e->type);
 
diff --git a/src/types.cpp b/src/types.cpp
index 6408669b0..c65a7c430 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -338,7 +338,6 @@ gb_global String const type_strings[] = {
 enum TypeFlag : u32 {
 	TypeFlag_Polymorphic     = 1<<1,
 	TypeFlag_PolySpecialized = 1<<2,
-	TypeFlag_InProcessOfCheckingPolymorphic = 1<<3,
 };
 
 struct Type {
@@ -2494,13 +2493,24 @@ gb_internal TypeTuple *get_record_polymorphic_params(Type *t) {
 }
 
 
+gb_internal TypeNameObjCMetadata *entity_objc_metadata(Entity *e) {
+	GB_ASSERT(e->kind == Entity_TypeName);
+	mutex_lock(&global_type_name_objc_metadata_mutex);
+	TypeNameObjCMetadata *md = e->TypeName.objc_metadata;
+	Type *original = e->TypeName.original_type_for_parapoly;
+	if (md == nullptr && original != nullptr && original->kind == Type_Named && original->Named.type_name != nullptr) {
+		md = original->Named.type_name->TypeName.objc_metadata;
+	}
+	mutex_unlock(&global_type_name_objc_metadata_mutex);
+	return md;
+}
+
+gb_internal gb_thread_local Array<Type *> is_type_polymorphic_named_stack;
+
 gb_internal bool is_type_polymorphic(Type *t, bool or_specialized=false) {
 	if (t == nullptr) {
 		return false;
 	}
-	if (t->flags & TypeFlag_InProcessOfCheckingPolymorphic) {
-		return false;
-	}
 
 	switch (t->kind) {
 	case Type_Generic:
@@ -2508,10 +2518,18 @@ gb_internal bool is_type_polymorphic(Type *t, bool or_specialized=false) {
 
 	case Type_Named:
 		{
-			u32 flags = t->flags;
-			t->flags |= TypeFlag_InProcessOfCheckingPolymorphic;
+			Array<Type *> &stack = is_type_polymorphic_named_stack;
+			for (Type *named : stack) {
+				if (named == t) {
+					return false;
+				}
+			}
+			if (stack.allocator.proc == nullptr) {
+				array_init(&stack, heap_allocator());
+			}
+			array_add(&stack, t);
 			bool ok = is_type_polymorphic(t->Named.base, or_specialized);
-			t->flags = flags;
+			array_pop(&stack);
 			return ok;
 		}
 
@@ -3815,8 +3833,7 @@ gb_internal Selection lookup_field_with_selection(Type *type_, InternedString fi
 		if (has_type_got_objc_class_attribute(original_type) && original_type->kind == Type_Named) {
 			Entity *e = original_type->Named.type_name;
 			GB_ASSERT(e->kind == Entity_TypeName);
-			if (e->TypeName.objc_metadata) {
-				auto *md = e->TypeName.objc_metadata;
+			if (auto *md = entity_objc_metadata(e)) {
 				mutex_lock(md->mutex);
 				defer (mutex_unlock(md->mutex));
 				for (TypeNameObjCMetadataEntry const &entry : md->type_entries) {
@@ -3907,8 +3924,7 @@ gb_internal Selection lookup_field_with_selection(Type *type_, InternedString fi
 		if (has_type_got_objc_class_attribute(original_type) && original_type->kind == Type_Named) {
 			Entity *e = original_type->Named.type_name;
 			GB_ASSERT(e->kind == Entity_TypeName);
-			if (e->TypeName.objc_metadata) {
-				auto *md = e->TypeName.objc_metadata;
+			if (auto *md = entity_objc_metadata(e)) {
 				mutex_lock(md->mutex);
 				defer (mutex_unlock(md->mutex));
 				for (TypeNameObjCMetadataEntry const &entry : md->value_entries) {
@@ -4405,6 +4421,35 @@ gb_internal i64 type_target_max_align(void) {
 	return max_align;
 }
 
+// Polymorphic record instances being filled by this thread, which another may already have found in the cache
+gb_internal gb_thread_local Array<Type *> records_being_filled;
+
+gb_internal void begin_filling_record(Type *t) {
+	if (records_being_filled.allocator.proc == nullptr) {
+		array_init(&records_being_filled, heap_allocator());
+	}
+	array_add(&records_being_filled, t);
+}
+
+gb_internal void end_filling_record(Type *t) {
+	GB_ASSERT(records_being_filled.count > 0 && records_being_filled[records_being_filled.count-1] == t);
+	array_pop(&records_being_filled);
+}
+
+gb_internal gb_thread_local i32 lazy_mutex_depth;
+
+gb_internal void wait_for_struct_fields(Type *t) {
+	if (t->Struct.polymorphic_parent == nullptr || t->Struct.fields_wait_signal.futex.load() != 0 || lazy_mutex_depth > 0) {
+		return;
+	}
+	for (Type *r : records_being_filled) {
+		if (r == t) {
+			return;
+		}
+	}
+	wait_signal_until_available(&t->Struct.fields_wait_signal);
+}
+
 gb_internal i64 type_align_of_internal(Type *t, TypePath *path) {
 	GB_ASSERT(path != nullptr);
 	if (t->failure) {
@@ -4529,6 +4574,7 @@ gb_internal i64 type_align_of_internal(Type *t, TypePath *path) {
 	} break;
 
 	case Type_Struct: {
+		wait_for_struct_fields(t);
 		if (t->Struct.custom_align > 0) {
 			return gb_max(t->Struct.custom_align, 1);
 		}
@@ -4643,6 +4689,7 @@ gb_internal i64 *type_set_offsets_of(Slice<Entity *> const &fields, bool is_pack
 gb_internal bool type_set_offsets(Type *t) {
 	t = base_type(t);
 	if (t->kind == Type_Struct) {
+		wait_for_struct_fields(t);
 		// if (t->Struct.are_offsets_being_processed.load()) {
 		// 	return true;
 		// }
@@ -4847,6 +4894,7 @@ gb_internal i64 type_size_of_internal(Type *t, TypePath *path) {
 
 
 	case Type_Struct: {
+		wait_for_struct_fields(t);
 		if (t->Struct.is_raw_union) {
 			i64 count = t->Struct.fields.count;
 			i64 align = type_align_of_internal(t, path);

From 5f579a1a10eeefd6c282f8f1f8af9c20eca7ca8a Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 21:55:25 +0100
Subject: [PATCH 131/215] Fix numerous race conditions: clone polymorphic
 defaults per call, evaluate foreign import attributes after collection, own
 dependencies for record instances, sorted Objective-C emission, no debug line
 for anonymous records

---
 src/check_expr.cpp         |  8 ++++++-
 src/check_type.cpp         |  1 +
 src/checker.cpp            | 49 +++++++++++++++++++++++---------------
 src/llvm_backend.cpp       | 49 +++++++++++++++++++++++++++++++++++---
 src/llvm_backend_debug.cpp | 16 +++++++------
 src/types.cpp              |  2 +-
 6 files changed, 94 insertions(+), 31 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 4f0feab8b..f655b206e 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -6867,7 +6867,8 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 						// then the default is materialized against the concrete type (reporting a clear error if it does not fit).
 						ordered_operands[i].mode = Addressing_Invalid;
 						ordered_operands[i].type = t_invalid;
-						ordered_operands[i].expr = e->Variable.param_value.original_ast_expr;
+						// NOTE(bill): Check a clone, as the callee's default expression is shared by every call site.
+						ordered_operands[i].expr = clone_ast(e->Variable.param_value.original_ast_expr);
 						ordered_operands[i].deferred_untyped_arg = true;
 					} else {
 						ordered_operands[i].mode = Addressing_Value;
@@ -8802,6 +8803,7 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 
 		Entity *found_entity = find_polymorphic_record_entity(found_gen_types, param_count, ordered_operands);
 		if (found_entity) {
+			add_declaration_dependency(c, found_entity);
 			operand->mode = Addressing_Type;
 			operand->type = found_entity->type;
 			return err;
@@ -8810,6 +8812,9 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 		CheckerContext ctx = *c;
 		// NOTE(bill): We need to make sure the lookup scope for the record is the same as where it was created
 		ctx.scope = polymorphic_record_parent_scope(original_type);
+		// NOTE(bill): the instance's members are only checked by its first use, so their dependencies are
+		// the instance's own, and each use depends on the instance instead
+		ctx.decl = make_decl_info(ctx.scope, nullptr);
 
 		if (original_type->Named.type_name && original_type->Named.type_name->file) {
 			ctx.file = original_type->Named.type_name->file;
@@ -8851,6 +8856,7 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 			GB_PANIC("Unsupported parametric polymorphic record type");
 		}
 
+		add_declaration_dependency(c, named_type->Named.type_name);
 		operand->mode = Addressing_Type;
 		operand->type = named_type;
 	}
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 6c39472db..247f52ea3 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -354,6 +354,7 @@ gb_internal void add_polymorphic_record_entity(CheckerContext *ctx, Ast *node, T
 		e->file = original_type->Named.type_name && original_type->Named.type_name->file ? original_type->Named.type_name->file : ctx->file;
 		e->pkg = pkg;
 		e->TypeName.original_type_for_parapoly = original_type;
+		e->decl_info = ctx->decl;
 		add_entity_use(ctx, node, e);
 	}
 
diff --git a/src/checker.cpp b/src/checker.cpp
index 6b7f10159..95961c8a1 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -5766,6 +5766,23 @@ gb_internal void check_foreign_import_fullpaths(Checker *c) {
 
 		GB_ASSERT(ctx.scope == e->scope);
 
+		AttributeContext ac = {};
+		check_decl_attributes(&ctx, fl->attributes, foreign_import_decl_attribute, &ac);
+		if (ac.require_declaration) {
+			mpsc_enqueue(&ctx.info->required_foreign_imports_through_force_queue, e);
+			add_entity_use(&ctx, nullptr, e);
+		}
+		if (ac.foreign_import_priority_index != 0) {
+			e->LibraryName.priority_index = ac.foreign_import_priority_index;
+		}
+		if (ac.ignore_duplicates) {
+			e->LibraryName.ignore_duplicates = true;
+		}
+		String extra_linker_flags = string_trim_whitespace(ac.extra_linker_flags);
+		if (extra_linker_flags.len != 0) {
+			e->LibraryName.extra_linker_flags = extra_linker_flags;
+		}
+
 		if (fl->fullpaths.count == 0) {
 			String base_dir = dir_from_path(decl->file()->fullpath);
 
@@ -5878,11 +5895,21 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *ctx, Ast *decl) {
 	GB_ASSERT(fl->library_name.pos.line != 0);
 	fl->library_name.string = library_name;
 
-	AttributeContext ac = {};
-	check_decl_attributes(ctx, fl->attributes, foreign_import_decl_attribute, &ac);
+	// NOTE(bill): Only 'export' is needed to declare the entity; the attribute values are evaluated in
+	// `check_foreign_import_fullpaths` as the globals they may name are not all collected yet
+	bool is_export = false;
+	for (Ast *attr : fl->attributes) {
+		if (attr->kind != Ast_Attribute) continue;
+		for (Ast *elem : attr->Attribute.elems) {
+			Ast *name = elem->kind == Ast_FieldValue ? elem->FieldValue.field : elem;
+			if (name->kind == Ast_Ident && name->Ident.token.string == "export") {
+				is_export = true;
+			}
+		}
+	}
 
 	Scope *scope = parent_scope;
-	if (ac.is_export) {
+	if (is_export) {
 		scope = parent_scope->parent;
 	}
 
@@ -5892,22 +5919,6 @@ gb_internal void check_add_foreign_import_decl(CheckerContext *ctx, Ast *decl) {
 	add_entity_flags_from_file(ctx, e, parent_scope);
 	add_entity(ctx, scope, nullptr, e);
 
-
-	if (ac.require_declaration) {
-		mpsc_enqueue(&ctx->info->required_foreign_imports_through_force_queue, e);
-		add_entity_use(ctx, nullptr, e);
-	}
-	if (ac.foreign_import_priority_index != 0) {
-		e->LibraryName.priority_index = ac.foreign_import_priority_index;
-	}
-	if (ac.ignore_duplicates) {
-		e->LibraryName.ignore_duplicates = true;
-	}
-	String extra_linker_flags = string_trim_whitespace(ac.extra_linker_flags);
-	if (extra_linker_flags.len != 0) {
-		e->LibraryName.extra_linker_flags = extra_linker_flags;
-	}
-
 	mpsc_enqueue(&ctx->info->foreign_imports_to_check_fullpaths, e);
 
 }
diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index ce6a8820a..05ce7ae17 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -1559,6 +1559,28 @@ gb_internal void lb_register_objc_thing(
 	}
 }
 
+gb_internal GB_COMPARE_PROC(objc_global_cmp) {
+	lbObjCGlobal const *x = cast(lbObjCGlobal const *)a;
+	lbObjCGlobal const *y = cast(lbObjCGlobal const *)b;
+	int cmp = string_compare(x->name, y->name);
+	if (cmp == 0) {
+		cmp = (x->class_impl_type != nullptr) - (y->class_impl_type != nullptr);
+	}
+	return cmp;
+}
+
+gb_internal GB_COMPARE_PROC(objc_class_type_cmp) {
+	Type *x = *cast(Type **)a;
+	Type *y = *cast(Type **)b;
+	return entity_source_order_cmp(x->Named.type_name, y->Named.type_name);
+}
+
+gb_internal GB_COMPARE_PROC(objc_method_data_cmp) {
+	ObjcMethodData const *x = cast(ObjcMethodData const *)a;
+	ObjcMethodData const *y = cast(ObjcMethodData const *)b;
+	return entity_source_order_cmp(x->proc_entity, y->proc_entity);
+}
+
 gb_internal void lb_finalize_objc_names(lbGenerator *gen, lbProcedure *p) {
 	if (p == nullptr) {
 		return;
@@ -1612,11 +1634,18 @@ gb_internal void lb_finalize_objc_names(lbGenerator *gen, lbProcedure *p) {
 		}
 	}
 
+	// NOTE(bill): the queues are filled by the codegen threads and the set is in address order, so all are sorted
+	auto class_types = array_make<Type *>(temporary_allocator(), 0, class_set.count);
 	for (auto pair : class_set) {
-		Entity *e = pair.type->Named.type_name;
+		array_add(&class_types, pair.type);
+	}
+	array_sort(class_types, objc_class_type_cmp);
+
+	for (Type *class_type : class_types) {
+		Entity *e = class_type->Named.type_name;
 		GB_ASSERT(e->kind == Entity_TypeName);
 		auto &tn = e->TypeName;
-		Type *class_impl = !tn.objc_is_implementation ? nullptr : pair.type;
+		Type *class_impl = !tn.objc_is_implementation ? nullptr : class_type;
 		lb_handle_objc_find_or_register_class(p, tn.objc_class_name, class_impl);
 
 		if (build_context.bedrock) {
@@ -1626,6 +1655,11 @@ gb_internal void lb_finalize_objc_names(lbGenerator *gen, lbProcedure *p) {
 	for (lbObjCGlobal g = {}; mpsc_dequeue(&gen->objc_classes, &g); /**/) {
 		array_add(&referenced_classes, g);
 	}
+	array_sort(referenced_classes, objc_global_cmp);
+
+	for (auto &kv : m->info->objc_method_implementations) {
+		array_sort(kv.value, objc_method_data_cmp);
+	}
 
 	// Add all class globals to a map so that we can look them up dynamically
 	// in order to resolve out-of-order because classes that are being implemented
@@ -1662,7 +1696,12 @@ gb_internal void lb_finalize_objc_names(lbGenerator *gen, lbProcedure *p) {
 	}
 
 	// Now we can register all referenced selectors
+	auto selectors = array_make<lbObjCGlobal>(temporary_allocator());
 	for (lbObjCGlobal g = {}; mpsc_dequeue(&gen->objc_selectors, &g); /**/) {
+		array_add(&selectors, g);
+	}
+	array_sort(selectors, objc_global_cmp);
+	for (lbObjCGlobal const &g : selectors) {
 		lb_register_objc_thing(handled, m, args, class_impls, global_class_map, p, g, "sel_registerName");
 	}
 
@@ -1943,8 +1982,12 @@ gb_internal void lb_finalize_objc_names(lbGenerator *gen, lbProcedure *p) {
 	}
 
 	// Register ivar offsets for any `objc_ivar_get` expressions emitted.
+	auto ivars = array_make<lbObjCGlobal>(temporary_allocator(), 0, ivar_map.count);
 	for (auto const& kv : ivar_map) {
-		lbObjCGlobal const& g = kv.value;
+		array_add(&ivars, kv.value);
+	}
+	array_sort(ivars, objc_global_cmp);
+	for (lbObjCGlobal const& g : ivars) {
 		lbAddr ivar_addr = {};
 		lbValue *found = string_map_get(&m->members, g.global_name);
 
diff --git a/src/llvm_backend_debug.cpp b/src/llvm_backend_debug.cpp
index d3e63cbf7..b70071e5b 100644
--- a/src/llvm_backend_debug.cpp
+++ b/src/llvm_backend_debug.cpp
@@ -65,8 +65,10 @@ gb_internal LLVMMetadataRef lb_debug_end_location_from_ast(lbProcedure *p, Ast *
 	return lb_debug_location_from_token_pos(p, ast_end_token(node).pos);
 }
 
-gb_internal void lb_debug_file_line(lbModule *m, Ast *node, LLVMMetadataRef *file, unsigned *line) {
-	if (*file == nullptr) {
+// NOTE(bill): not for an anonymous type, as identical ones are interchangeable, and which one is used
+// (e.g. by a polymorphic instance) depends on the checking order
+gb_internal void lb_debug_file_line(lbModule *m, Type *type, Ast *node, LLVMMetadataRef *file, unsigned *line) {
+	if (*file == nullptr && type->kind == Type_Named) {
 		if (node) {
 			*file = lb_get_llvm_metadata(m, node->file());
 			*line = cast(unsigned)ast_token(node).pos.line;
@@ -192,7 +194,7 @@ gb_internal LLVMMetadataRef lb_debug_basic_struct(lbModule *m, String const &nam
 gb_internal LLVMMetadataRef lb_debug_struct(lbModule *m, Type *type, Type *bt, String name, LLVMMetadataRef scope, LLVMMetadataRef file, unsigned line) {
 	GB_ASSERT(bt->kind == Type_Struct);
 
-	lb_debug_file_line(m, bt->Struct.node, &file, &line);
+	lb_debug_file_line(m, type, bt->Struct.node, &file, &line);
 
 	unsigned tag = DW_TAG_structure_type;
 	if (is_type_raw_union(bt)) {
@@ -476,7 +478,7 @@ gb_internal LLVMMetadataRef lb_debug_union(lbModule *m, Type *type, String name,
 	Type *bt = base_type(type);
 	GB_ASSERT(bt->kind == Type_Union);
 
-	lb_debug_file_line(m, bt->Union.node, &file, &line);
+	lb_debug_file_line(m, type, bt->Union.node, &file, &line);
 
 	u64 size_in_bits = 8*type_size_of(bt);
 	u32 align_in_bits = 8*cast(u32)type_align_of(bt);
@@ -560,7 +562,7 @@ gb_internal LLVMMetadataRef lb_debug_bitset(lbModule *m, Type *type, String name
 	Type *bt = base_type(type);
 	GB_ASSERT(bt->kind == Type_BitSet);
 
-	lb_debug_file_line(m, bt->BitSet.node, &file, &line);
+	lb_debug_file_line(m, type, bt->BitSet.node, &file, &line);
 
 	u64 size_in_bits = 8*type_size_of(bt);
 	u32 align_in_bits = 8*cast(u32)type_align_of(bt);
@@ -641,7 +643,7 @@ gb_internal LLVMMetadataRef lb_debug_bitfield(lbModule *m, Type *type, String na
 	Type *bt = base_type(type);
 	GB_ASSERT(bt->kind == Type_BitField);
 
-	lb_debug_file_line(m, bt->BitField.node, &file, &line);
+	lb_debug_file_line(m, type, bt->BitField.node, &file, &line);
 
 	u64 size_in_bits = 8*type_size_of(bt);
 	u32 align_in_bits = 8*cast(u32)type_align_of(bt);
@@ -682,7 +684,7 @@ gb_internal LLVMMetadataRef lb_debug_enum(lbModule *m, Type *type, String name,
 	Type *bt = base_type(type);
 	GB_ASSERT(bt->kind == Type_Enum);
 
-	lb_debug_file_line(m, bt->Enum.node, &file, &line);
+	lb_debug_file_line(m, type, bt->Enum.node, &file, &line);
 
 	u64 size_in_bits = 8*type_size_of(bt);
 	u32 align_in_bits = 8*cast(u32)type_align_of(bt);
diff --git a/src/types.cpp b/src/types.cpp
index c65a7c430..aad687ac7 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -353,7 +353,7 @@ struct Type {
 	std::atomic<i64> cached_align;
 	std::atomic<u64> canonical_hash;
 	std::atomic<u32> flags; // TypeFlag
-	bool failure;
+	std::atomic<bool> failure;
 };
 
 // IMPORTANT NOTE(bill): This must match the same as the in core.odin

From c494c7a503712c6c247ccd87b1dc0b08374fd0ba Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Thu, 1 Oct 2026 23:17:34 +0100
Subject: [PATCH 132/215] Check global entity groups in parallel

* CAS-claimed entities, cycle-safe waits for entities and records, lazy entities without lazy_mutex
* Build union type names only on error, take the error block only to report proc group overload errors
---
 src/check_decl.cpp                            |  55 +++---
 src/check_expr.cpp                            |  25 ++-
 src/check_stmt.cpp                            |   4 +-
 src/check_type.cpp                            |  12 +-
 src/checker.cpp                               |   4 +
 src/checker.hpp                               |   4 +-
 src/checker_global.cpp                        | 176 +++++++++++-------
 src/entity.cpp                                |   1 +
 src/thread_pool.cpp                           |  41 ++++
 src/threading.cpp                             |   4 +
 src/types.cpp                                 |  44 ++---
 tests/issues/run.bat                          |   2 +
 tests/issues/run.sh                           |   2 +
 tests/issues/test_issue_7566.odin             |  36 ++++
 .../test_issue_foreign_import_attributes.odin |  13 ++
 ...test_issue_global_when_cycle_accepted.odin |  28 +++
 ...est_issue_global_when_cycle_ambiguous.odin |   5 +
 17 files changed, 316 insertions(+), 140 deletions(-)
 create mode 100644 tests/issues/test_issue_7566.odin
 create mode 100644 tests/issues/test_issue_foreign_import_attributes.odin
 create mode 100644 tests/issues/test_issue_global_when_cycle_accepted.odin
 create mode 100644 tests/issues/test_issue_global_when_cycle_ambiguous.odin

diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index 4a40ba7a4..008959936 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -1953,6 +1953,7 @@ gb_internal void check_proc_group_decl(CheckerContext *ctx, Entity *pg_entity, D
 			GB_ASSERT(p != q);
 
 			bool is_invalid = false;
+			bool different_results = false;
 
 			TokenPos pos = q->token.pos;
 
@@ -1960,9 +1961,6 @@ gb_internal void check_proc_group_decl(CheckerContext *ctx, Entity *pg_entity, D
 				continue;
 			}
 
-
-			ERROR_BLOCK();
-
 			if (q->flags & EntityFlag_Disabled) {
 				continue;
 			}
@@ -1984,21 +1982,18 @@ gb_internal void check_proc_group_decl(CheckerContext *ctx, Entity *pg_entity, D
 
 			if (!both_have_where_clauses) switch (kind) {
 			case ProcOverload_Identical:
-				error(p->token, "Overloaded procedure '%.*s' has the same type as another procedure in the procedure group '%.*s'", LIT(name), LIT(proc_group_name));
 				is_invalid = true;
 				break;
 			// case ProcOverload_CallingConvention:
-				// error(p->token, "Overloaded procedure '%.*s' has the same type as another procedure in the procedure group '%.*s'", LIT(name), LIT(proc_group_name));
 				// is_invalid = true;
 				// break;
 			case ProcOverload_ParamVariadic:
-				error(p->token, "Overloaded procedure '%.*s' has the same type as another procedure in the procedure group '%.*s'", LIT(name), LIT(proc_group_name));
 				is_invalid = true;
 				break;
 			case ProcOverload_ResultCount:
 			case ProcOverload_ResultTypes:
-				error(p->token, "Overloaded procedure '%.*s' has the same parameters but different results in the procedure group '%.*s'", LIT(name), LIT(proc_group_name));
 				is_invalid = true;
+				different_results = true;
 				break;
 			case ProcOverload_Polymorphic:
 				break;
@@ -2011,6 +2006,13 @@ gb_internal void check_proc_group_decl(CheckerContext *ctx, Entity *pg_entity, D
 			}
 
 			if (is_invalid) {
+				// NOTE(bill): only now, as the error block is shared by every thread
+				ERROR_BLOCK();
+				if (different_results) {
+					error(p->token, "Overloaded procedure '%.*s' has the same parameters but different results in the procedure group '%.*s'", LIT(name), LIT(proc_group_name));
+				} else {
+					error(p->token, "Overloaded procedure '%.*s' has the same type as another procedure in the procedure group '%.*s'", LIT(name), LIT(proc_group_name));
+				}
 				error_line("\tprevious procedure at %s\n", token_pos_to_string(pos));
 				invalid[k] = true;
 			}
@@ -2177,16 +2179,25 @@ gb_internal void check_entity_decl(CheckerContext *ctx, Entity *e, DeclInfo *d,
 		return;
 	}
 	defer (global_when_trial_end_entity(&trial_scope));
-	bool is_lazy = (e->flags & EntityFlag_Lazy) != 0;
-	if (is_lazy) {
-		mutex_lock(&ctx->info->lazy_mutex);
-		if (e->state == EntityState_Resolved) {
-			// NOTE: another thread checked it whilst this one waited
-			mutex_unlock(&ctx->info->lazy_mutex);
+
+	// NOTE(bill): checked by whichever thread claims it first; any other that needs it meanwhile waits for it
+	i32 owner = 0;
+	if (!e->checking_thread.compare_exchange_strong(owner, cast(i32)current_thread_index() + 1)) {
+		if (thread_wait_for_owner(&e->checking_thread, owner, owner)) {
 			return;
 		}
-		lazy_mutex_depth += 1;
+		// NOTE: this thread is checking it already, or the thread checking it waits for this one
+		error(e->token, "Illegal declaration cycle of `%.*s`", LIT(e->token.string));
+		return;
 	}
+	if (e->state == EntityState_Resolved) {
+		// NOTE: another thread finished it before this one claimed it
+		e->checking_thread.store(0);
+		futex_broadcast(&e->checking_thread);
+		return;
+	}
+
+	bool is_lazy = (e->flags & EntityFlag_Lazy) != 0;
 	GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
 
 	String name = e->token.string;
@@ -2290,20 +2301,20 @@ end:;
 	global_entity_timing_end(timing_frame, e);
 	// NOTE(bill): Add it to the list of checked entities
 	if (is_lazy) {
+		mutex_lock(&ctx->info->lazy_mutex);
 		array_add(&ctx->info->entities, e);
-		lazy_mutex_depth -= 1;
 		mutex_unlock(&ctx->info->lazy_mutex);
 	}
+	e->checking_thread.store(0);
+	futex_broadcast(&e->checking_thread);
 }
 
-// A lazy entity is only ever in progress on the thread holding `lazy_mutex`, so taking it (it is
-// recursive) waits out another thread and is a no-op on the thread that is checking it
-gb_internal void wait_for_lazy_entity(CheckerContext *ctx, Entity *e) {
-	if ((e->flags & EntityFlag_Lazy) == 0 || e->state == EntityState_Resolved) {
-		return;
+// An entity in progress on another thread is waited for, unless that thread waits for this one
+gb_internal void wait_for_entity(Entity *e) {
+	i32 owner = e->checking_thread.load();
+	if (owner != 0) {
+		thread_wait_for_owner(&e->checking_thread, owner, owner);
 	}
-	mutex_lock(&ctx->info->lazy_mutex);
-	mutex_unlock(&ctx->info->lazy_mutex);
 }
 
 
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index f655b206e..50b59f0c1 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -955,7 +955,7 @@ gb_internal i64 check_distance_between_types(CheckerContext *c, Operand *operand
 	}
 
 	if (is_type_union(dst) && allow_unions) {
-		wait_signal_until_available(&dst->Union.variants_wait_signal);
+		wait_for_record_signal(&dst->Union.variants_wait_signal, &dst->Union.checking_thread);
 		for (Type *vt : dst->Union.variants) {
 			if (are_types_identical(vt, s)) {
 				return 1;
@@ -1713,7 +1713,7 @@ gb_internal Entity *check_ident(CheckerContext *c, Operand *o, Ast *n, Type *nam
 	if (e->state == EntityState_Unresolved) {
 		check_entity_decl(c, e, nullptr, named_type);
 	} else {
-		wait_for_lazy_entity(c, e);
+		wait_for_entity(e);
 	}
 	switch (e->kind) {
 	case Entity_Constant:
@@ -5172,7 +5172,7 @@ gb_internal void convert_to_typed(CheckerContext *c, Operand *operand, Type *tar
 	case Type_Union:
 		if (!is_operand_nil(*operand) && !is_operand_uninit(*operand)) {
 			TEMPORARY_ALLOCATOR_GUARD();
-			wait_signal_until_available(&t->Union.variants_wait_signal);
+			wait_for_record_signal(&t->Union.variants_wait_signal, &t->Union.checking_thread);
 
 			isize count = t->Union.variants.count;
 			ValidIndexAndScore *valids = temporary_alloc_array<ValidIndexAndScore>(count);
@@ -5205,9 +5205,6 @@ gb_internal void convert_to_typed(CheckerContext *c, Operand *operand, Type *tar
 				first_success_index = valids[0].index;
 			}
 
-			gbString type_str = type_to_string(target_type);
-			defer (gb_string_free(type_str));
-
 			if (valid_count == 1) {
 				Type *new_type = t->Union.variants[first_success_index];
 				if (operand->mode != Addressing_Constant ||
@@ -5219,6 +5216,8 @@ gb_internal void convert_to_typed(CheckerContext *c, Operand *operand, Type *tar
 				break;
 			} else if (valid_count > 1) {
 				ERROR_BLOCK();
+				gbString type_str = type_to_string(target_type);
+				defer (gb_string_free(type_str));
 
 				GB_ASSERT(first_success_index >= 0);
 				convert_untyped_error(c, operand, target_type, true);
@@ -5244,6 +5243,8 @@ gb_internal void convert_to_typed(CheckerContext *c, Operand *operand, Type *tar
 				target_type = t_untyped_uninit;
 			} else if (!is_type_untyped_nil(operand->type) || !type_has_nil(target_type)) {
 				ERROR_BLOCK();
+				gbString type_str = type_to_string(target_type);
+				defer (gb_string_free(type_str));
 
 				convert_untyped_error(c, operand, target_type, true);
 				if (count > 0) {
@@ -5746,7 +5747,7 @@ gb_internal Entity *check_entity_from_ident_or_selector(CheckerContext *c, Ast *
 		}
 		if (e != nullptr) {
 			// its kind and type are read by the caller
-			wait_for_lazy_entity(c, e);
+			wait_for_entity(e);
 		}
 		return e;
 	} else if (!ident_only) if (node->kind == Ast_SelectorExpr) {
@@ -8834,9 +8835,7 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 			set_base_type(named_type, struct_type);
 
 			check_open_scope(&ctx, node);
-			begin_filling_record(struct_type);
 			check_struct_type(&ctx, struct_type, node, &ordered_operands, named_type, original_type, found_gen_types);
-			end_filling_record(struct_type);
 			// check_struct_type released found_gen_types->mutex after publishing the instantiation.
 			gen_types_locked = false;
 			check_close_scope(&ctx);
@@ -9745,7 +9744,7 @@ gb_internal bool attempt_implicit_selector_expr(CheckerContext *c, Operand *o, A
 		TEMPORARY_ALLOCATOR_GUARD();
 
 		Type *union_type = base_type(th);
-		wait_signal_until_available(&union_type->Union.variants_wait_signal);
+		wait_for_record_signal(&union_type->Union.variants_wait_signal, &union_type->Union.checking_thread);
 		auto operands = array_make<Operand>(temporary_allocator(), 0, union_type->Union.variants.count);
 
 		for (Type *vt : union_type->Union.variants) {
@@ -11088,7 +11087,7 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 	// If exactly one matches, retarget to that variant and let the normal path build it (the surrounding assignment then wraps it into the union).
 	// Otherwise report a clear error.
 	if (t->kind == Type_Union && cl->type == nullptr && cl->elems.count > 0) {
-		wait_signal_until_available(&t->Union.variants_wait_signal);
+		wait_for_record_signal(&t->Union.variants_wait_signal, &t->Union.checking_thread);
 		auto matches = array_make<Type *>(temporary_allocator(), 0, t->Union.variants.count);
 		for (Type *variant : t->Union.variants) {
 			Operand trial = {};
@@ -11156,7 +11155,7 @@ gb_internal ExprKind check_compound_literal(CheckerContext *c, Operand *o, Ast *
 				break;
 			}
 
-			wait_signal_until_available(&t->Struct.fields_wait_signal);
+			wait_for_record_signal(&t->Struct.fields_wait_signal, &t->Struct.checking_thread);
 			isize field_count = t->Struct.fields.count;
 			isize min_field_count = t->Struct.fields.count;
 			for (isize i = min_field_count-1; i >= 0; i--) {
@@ -12105,7 +12104,7 @@ gb_internal ExprKind check_type_assertion(CheckerContext *c, Operand *o, Ast *no
 	Type *src = type_deref(o->type);
 	Type *bsrc = base_type(src);
 	if (bsrc->kind == Type_Union) {
-		wait_signal_until_available(&bsrc->Union.variants_wait_signal);
+		wait_for_record_signal(&bsrc->Union.variants_wait_signal, &bsrc->Union.checking_thread);
 	}
 
 
diff --git a/src/check_stmt.cpp b/src/check_stmt.cpp
index dfb046da3..1a8d90a1e 100644
--- a/src/check_stmt.cpp
+++ b/src/check_stmt.cpp
@@ -849,7 +849,7 @@ gb_internal bool check_using_stmt_entity(CheckerContext *ctx, AstUsingStmt *us,
 		bool is_ptr = is_type_pointer(e->type);
 		Type *t = base_type(type_deref(e->type));
 		if (t->kind == Type_Struct) {
-			wait_signal_until_available(&t->Struct.fields_wait_signal);
+			wait_for_record_signal(&t->Struct.fields_wait_signal, &t->Struct.checking_thread);
 
 			Scope *found = t->Struct.scope;
 			GB_ASSERT(found != nullptr);
@@ -1540,7 +1540,7 @@ gb_internal void check_type_switch_stmt(CheckerContext *ctx, Ast *node, u32 mod_
 		// TODO(bill): Make robust
 		Type *bt = base_type(type_deref(x.type));
 		if (bt->kind == Type_Union) {
-			wait_signal_until_available(&bt->Union.variants_wait_signal);
+			wait_for_record_signal(&bt->Union.variants_wait_signal, &bt->Union.checking_thread);
 		}
 
 		Type *case_type = nullptr;
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 247f52ea3..b7b525702 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -724,6 +724,9 @@ gb_internal void check_struct_type(CheckerContext *ctx, Type *struct_type, Ast *
 	GB_ASSERT(is_type_struct(struct_type));
 	ast_node(st, StructType, node);
 
+	struct_type->Struct.checking_thread.store(cast(i32)current_thread_index() + 1);
+	defer (struct_type->Struct.checking_thread.store(0));
+
 	String context = str_lit("struct");
 
 	isize min_field_count = 0;
@@ -846,6 +849,9 @@ gb_internal void check_union_type(CheckerContext *ctx, Type *union_type, Ast *no
 	GB_ASSERT(is_type_union(union_type));
 	ast_node(ut, UnionType, node);
 
+	union_type->Union.checking_thread.store(cast(i32)current_thread_index() + 1);
+	defer (union_type->Union.checking_thread.store(0));
+
 
 	union_type->Union.node  = node;
 	union_type->Union.scope = ctx->scope;
@@ -2254,8 +2260,8 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 		    pattern->Struct.is_packed != source->Struct.is_packed) {
 			return Subst_Unhandled;
 		}
-		wait_signal_until_available(&pattern->Struct.fields_wait_signal);
-		wait_signal_until_available(&source->Struct.fields_wait_signal);
+		wait_for_record_signal(&pattern->Struct.fields_wait_signal, &pattern->Struct.checking_thread);
+		wait_for_record_signal(&source->Struct.fields_wait_signal, &source->Struct.checking_thread);
 		if (pattern->Struct.fields.count != source->Struct.fields.count) {
 			return Subst_NoMatch;
 		}
@@ -4391,7 +4397,7 @@ gb_internal bool complete_soa_type(Checker *checker, Type *t, bool wait_to_finis
 	GB_ASSERT(old_struct->kind == Type_Struct);
 
 	if (wait_to_finish) {
-		wait_signal_until_available(&old_struct->Struct.fields_wait_signal);
+		wait_for_record_signal(&old_struct->Struct.fields_wait_signal, &old_struct->Struct.checking_thread);
 	} else {
 		GB_ASSERT(old_struct->Struct.fields_wait_signal.futex.load() != 0);
 	}
diff --git a/src/checker.cpp b/src/checker.cpp
index 95961c8a1..ff59665ec 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -7537,8 +7537,12 @@ gb_internal void check_parsed_files(Checker *c) {
 	array_sort(c->info.entities, init_procedures_cmp);
 
 	TIME_SECTION("check all global entities");
+	isize entity_count = c->info.entities.count;
 	check_all_global_entities(c);
 
+	// NOTE(bill): lazy entities are added once checked, which with several threads is in no fixed order
+	gb_sort_array(c->info.entities.data + entity_count, c->info.entities.count - entity_count, init_procedures_cmp);
+
 	if (build_context.internal_global_entity_graph) {
 		TIME_SECTION("print global entity graph");
 		print_global_groups(&global_groups);
diff --git a/src/checker.hpp b/src/checker.hpp
index 78f579c2d..52d43ad81 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -780,7 +780,7 @@ struct CheckerInfo {
 
 	BlockingMutex type_and_value_mutex;
 
-	RecursiveMutex lazy_mutex; // Mutex required for lazy type checking of specific files
+	RecursiveMutex lazy_mutex; // for adding checked lazy entities to `entities`
 
 
 	// BlockingMutex type_info_mutex; // NOT recursive
@@ -970,7 +970,7 @@ struct GlobalEntityTimingFrame {
 };
 gb_internal GlobalEntityTimingFrame global_entity_timing_begin(Entity *e);
 gb_internal void global_entity_timing_end(GlobalEntityTimingFrame const &f, Entity *e);
-gb_internal void wait_for_lazy_entity(CheckerContext *c, Entity *e);
+gb_internal void wait_for_entity(Entity *e);
 gb_internal Ast *remove_type_alias_clutter(Ast *node);
 gb_internal void check_const_decl(CheckerContext *c, Entity *e, Ast *type_expr, Ast *init_expr, Type *named_type);
 gb_internal void check_type_decl(CheckerContext *c, Entity *e, Ast *type_expr, Type *def);
diff --git a/src/checker_global.cpp b/src/checker_global.cpp
index fd8b51130..2ca4e0e27 100644
--- a/src/checker_global.cpp
+++ b/src/checker_global.cpp
@@ -749,27 +749,32 @@ gb_internal void global_graph_print_entity(Entity *e) {
 
 
 struct GlobalGroup {
-	i32  start; // into `GlobalGroupGraph::members`
-	i32  count;
-	bool done;
+	i32               start; // into `GlobalGroupGraph::members`
+	i32               count;
+	std::atomic<bool> done;
 };
 
 struct GlobalGroupGraph {
 	Array<Entity *>       nodes;
 	PtrMap<Entity *, i32> node_of;
-	Array<i32>            offsets; // node -> the nodes it names, as `targets[offsets[v]..offsets[v+1]]`
+	Array<i32>            offsets;           // node -> the nodes it names, as `targets[offsets[v]..<offsets[v+1]]`
 	Array<i32>            targets;
 	Array<i32>            group_of;
-	Array<GlobalGroup>    groups;  // every dependency of a group has a lower index
-	Array<i32>            members; // nodes, by group, in source order
+	Array<GlobalGroup>    groups;            // every dependency of a group has a lower index
+	Array<i32>            members;           // nodes by group in source order
 
-	bool   active;
-	i32    current_group;
-	Entity *current_entity;
-	isize  missing_edges;
+	Array<i32>            dependent_offsets; // group -> the groups that depend on it as `dependents[dependent_offsets[gi]..<dependent_offsets[gi+1]]`
+	Array<i32>            dependents;
+	std::atomic<i32> *    pending;           // per group its dependencies not yet done
+
+	Checker *          checker;
+	bool               active;
+	std::atomic<isize> missing_edges;
 };
 
 gb_global GlobalGroupGraph global_groups;
+gb_global gb_thread_local i32      global_group_current = -1;
+gb_global gb_thread_local Entity * global_group_current_entity;
 
 struct GlobalPlaceholderHit {
 	Scope *        scope;
@@ -1268,7 +1273,9 @@ gb_internal void build_global_groups(Checker *c, GlobalGroupGraph *g) {
 	array_init(&g->groups,  heap_allocator(), group_count);
 	array_init(&g->members, heap_allocator(), node_count);
 	for (i32 gi = 0; gi < group_count; gi++) {
-		g->groups[gi] = {};
+		g->groups[gi].start = 0;
+		g->groups[gi].count = 0;
+		g->groups[gi].done.store(false);
 	}
 	for (i32 v = 0; v < node_count; v++) {
 		g->groups[g->group_of[v]].count += 1;
@@ -1299,7 +1306,7 @@ gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e) {
 		}
 	} else {
 		i32 gi = g->group_of[*v];
-		if (gi == g->current_group || g->groups[gi].done) {
+		if (gi == global_group_current || g->groups[gi].done.load()) {
 			return;
 		}
 	}
@@ -1312,9 +1319,9 @@ gb_internal void global_group_check_edge(CheckerContext *ctx, Entity *e) {
 		gb_printf_err(" needs ");
 		global_graph_print_entity(e);
 		gb_printf_err(v == nullptr ? ", which is not in the graph" : "");
-		if (g->current_entity != by) {
+		if (global_group_current_entity != by) {
 			gb_printf_err(", while checking ");
-			global_graph_print_entity(g->current_entity);
+			global_graph_print_entity(global_group_current_entity);
 		}
 		gb_printf_err("\n");
 	}
@@ -1331,14 +1338,14 @@ gb_internal void check_global_group(Checker *c, GlobalGroupGraph *g, i32 gi) {
 	auto soa_types = array_make<Type *>(heap_allocator());
 	global_group_soa_types = &soa_types;
 
-	g->current_group = gi;
+	global_group_current = gi;
 	for (i32 k = 0; k < group->count; k++) {
 		Entity *e = g->nodes[members[k]];
 		if (e->flags & EntityFlag_Lazy) {
 			// NOTE: only checked when something uses it; the group orders it after what it names
 			continue;
 		}
-		g->current_entity = e;
+		global_group_current_entity = e;
 		GlobalEntityTimingFrame timing_frame = global_entity_timing_begin(e);
 		check_single_global_entity(c, e, e->decl_info, &untyped);
 		if (e->type != nullptr && is_type_typed(e->type)) {
@@ -1361,41 +1368,24 @@ gb_internal void check_global_group(Checker *c, GlobalGroupGraph *g, i32 gi) {
 	add_untyped_expressions(&c->info, &untyped);
 	map_destroy(&untyped);
 
-	group->done = true;
-	g->current_group = -1;
-	g->current_entity = nullptr;
+	group->done.store(true);
+	global_group_current = -1;
+	global_group_current_entity = nullptr;
 }
 
-// Groups in dependency order; with `-internal-shuffle-global-entities`, a random one of the groups whose
-// dependencies are done, as a parallel checker might
-gb_internal void check_global_groups(Checker *c, GlobalGroupGraph *g) {
+gb_internal void build_global_group_dependents(GlobalGroupGraph *g) {
 	i32 group_count = cast(i32)g->groups.count;
-	u64 seed = build_context.internal_shuffle_global_entities;
-	if (seed == 0) {
-		for (i32 gi = 0; gi < group_count; gi++) {
-			check_global_group(c, g, gi);
-		}
-		return;
-	}
-
-	auto dependents = array_make<Array<i32> >(heap_allocator(), group_count);
-	auto dep_count  = array_make<i32>        (heap_allocator(), group_count);
-	auto seen       = array_make<i32>        (heap_allocator(), group_count);
-	auto ready      = array_make<i32>        (heap_allocator(), 0, group_count);
-	defer ({
-		for (auto &d : dependents) {
-			array_free(&d);
-		}
-		array_free(&dependents);
-	});
-	defer (array_free(&dep_count));
+	auto edge_from = array_make<i32>(heap_allocator(), 0, group_count);
+	auto edge_to   = array_make<i32>(heap_allocator(), 0, group_count);
+	auto seen      = array_make<i32>(heap_allocator(), group_count);
+	defer (array_free(&edge_from));
+	defer (array_free(&edge_to));
 	defer (array_free(&seen));
-	defer (array_free(&ready));
 
+	g->pending = gb_alloc_array(heap_allocator(), std::atomic<i32>, group_count);
 	for (i32 gi = 0; gi < group_count; gi++) {
-		dep_count[gi] = 0;
-		dependents[gi] = {};
 		seen[gi] = -1;
+		g->pending[gi].store(0);
 	}
 	for (i32 gi = 0; gi < group_count; gi++) {
 		GlobalGroup const &group = g->groups[gi];
@@ -1405,36 +1395,79 @@ gb_internal void check_global_groups(Checker *c, GlobalGroupGraph *g) {
 				i32 dep = g->group_of[g->targets[i]];
 				if (dep != gi && seen[dep] != gi) {
 					seen[dep] = gi;
-					dep_count[gi] += 1;
-					if (dependents[dep].allocator.proc == nullptr) {
-						array_init(&dependents[dep], heap_allocator());
-					}
-					array_add(&dependents[dep], gi);
+					array_add(&edge_from, dep);
+					array_add(&edge_to, gi);
+					g->pending[gi].fetch_add(1);
 				}
 			}
 		}
-		if (dep_count[gi] == 0) {
+	}
+	global_graph_csr(group_count, edge_from, edge_to, &g->dependent_offsets, &g->dependents);
+}
+
+gb_internal void check_global_group_and_release(GlobalGroupGraph *g, i32 gi, Array<i32> *ready);
+
+gb_internal WORKER_TASK_PROC(check_global_group_worker) {
+	check_global_group_and_release(&global_groups, cast(i32)cast(intptr)data, nullptr);
+	return 0;
+}
+
+gb_internal void check_global_group_and_release(GlobalGroupGraph *g, i32 gi, Array<i32> *ready) {
+	check_global_group(g->checker, g, gi);
+	for (i32 i = g->dependent_offsets[gi]; i < g->dependent_offsets[gi+1]; i++) {
+		i32 next = g->dependents[i];
+		if (g->pending[next].fetch_sub(1) == 1) {
+			if (ready != nullptr) {
+				array_add(ready, next);
+			} else {
+				thread_pool_add_task(check_global_group_worker, cast(void *)cast(intptr)next);
+			}
+		}
+	}
+}
+
+gb_internal void check_global_groups(Checker *c, GlobalGroupGraph *g) {
+	i32 group_count = cast(i32)g->groups.count;
+	u64 seed = build_context.internal_shuffle_global_entities;
+	g->checker = c;
+
+	if (seed == 0 && (build_context.thread_count <= 1 || build_context.no_threaded_checker)) {
+		for (i32 gi = 0; gi < group_count; gi++) {
+			check_global_group(c, g, gi);
+		}
+		return;
+	}
+
+	build_global_group_dependents(g);
+
+	// NOTE: all found before any is checked, as checking one releases others
+	auto ready = array_make<i32>(heap_allocator(), 0, group_count);
+	defer (array_free(&ready));
+	for (i32 gi = 0; gi < group_count; gi++) {
+		if (g->pending[gi].load() == 0) {
 			array_add(&ready, gi);
 		}
 	}
 
-	u64 state = seed;
-	isize checked = 0;
-	while (ready.count > 0) {
-		isize i = cast(isize)(global_group_random(&state) % cast(u64)ready.count);
-		i32 gi = ready[i];
-		ready[i] = ready[ready.count-1];
-		array_pop(&ready);
-
-		check_global_group(c, g, gi);
-		checked += 1;
-		for (i32 next : dependents[gi]) {
-			if (--dep_count[next] == 0) {
-				array_add(&ready, next);
-			}
+	if (seed == 0) {
+		for (i32 gi : ready) {
+			thread_pool_add_task(check_global_group_worker, cast(void *)cast(intptr)gi);
+		}
+		thread_pool_wait();
+	} else {
+		u64 state = seed;
+		while (ready.count > 0) {
+			isize i = cast(isize)(global_group_random(&state) % cast(u64)ready.count);
+			i32 gi = ready[i];
+			ready[i] = ready[ready.count-1];
+			array_pop(&ready);
+			check_global_group_and_release(g, gi, &ready);
 		}
 	}
-	GB_ASSERT(checked == group_count);
+
+	for (i32 gi = 0; gi < group_count; gi++) {
+		GB_ASSERT(g->groups[gi].done.load());
+	}
 }
 
 gb_internal void destroy_global_groups(GlobalGroupGraph *g) {
@@ -1445,6 +1478,12 @@ gb_internal void destroy_global_groups(GlobalGroupGraph *g) {
 	array_free(&g->group_of);
 	array_free(&g->groups);
 	array_free(&g->members);
+	array_free(&g->dependent_offsets);
+	array_free(&g->dependents);
+	if (g->pending != nullptr) {
+		gb_free(heap_allocator(), g->pending);
+		g->pending = nullptr;
+	}
 }
 
 gb_internal void check_all_global_entities(Checker *c) {
@@ -1470,12 +1509,11 @@ gb_internal void check_all_global_entities(Checker *c) {
 
 	TIME_SECTION("check all global entities - check groups");
 	g->active = true;
-	g->current_group = -1;
 	check_global_groups(c, g);
 	g->active = false;
 
-	if (build_context.internal_check_global_edges && g->missing_edges > 0) {
-		gb_printf_err("%td missing global dependencies\n", g->missing_edges);
+	if (build_context.internal_check_global_edges && g->missing_edges.load() > 0) {
+		gb_printf_err("%td missing global dependencies\n", g->missing_edges.load());
 		gb_exit(1);
 	}
 
@@ -2217,7 +2255,7 @@ gb_internal void print_global_groups(GlobalGroupGraph *g) {
 	f64 critical_ms = critical >= 0 ? global_graph_ms(path[critical], freq) : 0;
 
 	gb_printf_err("Global entity groups\n");
-	gb_printf_err("  entities: %td (%td not timed), dependency edges: %td, missing edges: %td\n", g->nodes.count, untimed, g->targets.count, g->missing_edges);
+	gb_printf_err("  entities: %td (%td not timed), dependency edges: %td, missing edges: %td\n", g->nodes.count, untimed, g->targets.count, g->missing_edges.load());
 	gb_printf_err("  self time: %.3f ms in the groups, %.3f ms during 'when' resolution\n", total_ms, global_graph_ms(when_ticks, freq));
 	gb_printf_err("  groups:    %d (%td with a cycle), largest has %d entities\n", group_count, cyclic, largest >= 0 ? g->groups[largest].count : 0);
 	gb_printf_err("  critical path: %.3f ms over %d groups -> at most %.2fx speedup\n",
diff --git a/src/entity.cpp b/src/entity.cpp
index 845e2b910..4a7800450 100644
--- a/src/entity.cpp
+++ b/src/entity.cpp
@@ -210,6 +210,7 @@ struct Entity {
 	u64         id;
 	std::atomic<u64>         flags;
 	std::atomic<EntityState> state;
+	Futex                    checking_thread; // 1 + the index of the thread in `check_entity_decl` for it, else 0
 	std::atomic<i32>         min_dep_count;
 	Token       token;
 	Scope *     scope;
diff --git a/src/thread_pool.cpp b/src/thread_pool.cpp
index 0ffce8046..b62811a5a 100644
--- a/src/thread_pool.cpp
+++ b/src/thread_pool.cpp
@@ -174,6 +174,47 @@ gb_internal bool thread_pool_add_task(ThreadPool *pool, WorkerTaskProc *proc, vo
 	return true;
 }	
 
+gb_internal bool thread_wait_for_owner(Futex *futex, Footex value, i32 owner) {
+	if (futex->load() != value) {
+		return true;
+	}
+	Thread *self = current_thread;
+	if (self != nullptr && owner > 0) {
+		i32 me = cast(i32)self->idx + 1;
+		if (owner == me) {
+			return false;
+		}
+		self->waiting_futex.store(futex);
+		self->waiting_value.store(value);
+		self->waiting_for.store(owner);
+
+		// NOTE(bill): a thread counts as waiting only while what it waits on is unchanged
+		// when it clears its own `waiting_for` only once it has woken
+		Slice<Thread> threads = self->pool->threads;
+		i32 t = owner;
+		for (isize i = 0; i <= threads.count; i++) {
+			if (t == me) {
+				self->waiting_for.store(0);
+				return false;
+			}
+			Thread *other = &threads[t-1];
+			i32 next = other->waiting_for.load();
+			Futex *f = other->waiting_futex.load();
+			if (next == 0 || f == nullptr || f->load() != other->waiting_value.load()) {
+				break;
+			}
+			t = next;
+		}
+	}
+	while (futex->load() == value) {
+		futex_wait(futex, value);
+	}
+	if (self != nullptr) {
+		self->waiting_for.store(0);
+	}
+	return true;
+}
+
 gb_internal void thread_pool_wait(ThreadPool *pool) {
 	WorkerTask task;
 
diff --git a/src/threading.cpp b/src/threading.cpp
index 524c70e29..28882ea24 100644
--- a/src/threading.cpp
+++ b/src/threading.cpp
@@ -73,6 +73,10 @@ struct Thread {
 
 	struct Arena *permanent_arena;
 	struct Arena *temporary_arena;
+
+	std::atomic<std::atomic<i32> *> waiting_futex;
+	std::atomic<i32>                waiting_value;
+	std::atomic<i32>                waiting_for;
 };
 
 typedef std::atomic<i32> Futex;
diff --git a/src/types.cpp b/src/types.cpp
index aad687ac7..129a5afd1 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -155,6 +155,7 @@ struct TypeStruct {
 	i32             soa_count;
 	StructSoaKind   soa_kind;
 	Wait_Signal     fields_wait_signal;
+	Futex           checking_thread; // 1 + the index of the thread in `check_struct_type` for it, else 0
 	BlockingMutex   soa_mutex;
 	BlockingMutex   offset_mutex; // for settings offsets
 
@@ -181,6 +182,7 @@ struct TypeUnion {
 	Type *           polymorphic_parent;
 	Wait_Signal      polymorphic_wait_signal;
 	Wait_Signal      variants_wait_signal; // signalled once `variants` is populated (mirrors TypeStruct.fields_wait_signal)
+	Futex            checking_thread;      // 1 + the index of the thread in `check_union_type` for it, else 0
 
 	std::atomic<i16> tag_size;
 	bool             is_polymorphic;
@@ -413,6 +415,7 @@ gb_internal bool is_type_simple_compare(Type *t);
 gb_internal Type *type_deref(Type *t, bool allow_multi_pointer=false);
 gb_internal Type *base_type(Type *t);
 gb_internal Type *alloc_type_multi_pointer(Type *elem);
+gb_internal void wait_for_record_signal(Wait_Signal *signal, Futex *checking_thread);
 
 gb_internal u32 type_info_flags_of_type(Type *type) {
 	if (type == nullptr) {
@@ -2477,13 +2480,13 @@ gb_internal TypeTuple *get_record_polymorphic_params(Type *t) {
 	t = base_type(t);
 	switch (t->kind) {
 	case Type_Struct:
-		wait_signal_until_available(&t->Struct.polymorphic_wait_signal);
+		wait_for_record_signal(&t->Struct.polymorphic_wait_signal, &t->Struct.checking_thread);
 		if (t->Struct.polymorphic_params) {
 			return &t->Struct.polymorphic_params->Tuple;
 		}
 		break;
 	case Type_Union:
-		wait_signal_until_available(&t->Union.polymorphic_wait_signal);
+		wait_for_record_signal(&t->Union.polymorphic_wait_signal, &t->Union.checking_thread);
 		if (t->Union.polymorphic_params) {
 			return &t->Union.polymorphic_params->Tuple;
 		}
@@ -3560,7 +3563,7 @@ gb_internal bool union_variant_index_types_equal(Type *v, Type *vt) {
 gb_internal i64 union_variant_index_checked(Type *u, Type *v) {
 	u = base_type(u);
 	GB_ASSERT(u->kind == Type_Union);
-	wait_signal_until_available(&u->Union.variants_wait_signal);
+	wait_for_record_signal(&u->Union.variants_wait_signal, &u->Union.checking_thread);
 
 	for_array(i, u->Union.variants) {
 		Type *vt = u->Union.variants[i];
@@ -3579,7 +3582,7 @@ gb_internal i64 union_variant_index_checked(Type *u, Type *v) {
 gb_internal bool union_is_variant_of(Type *u, Type *v) {
 	u = base_type(u);
 	GB_ASSERT(u->kind == Type_Union);
-	wait_signal_until_available(&u->Union.variants_wait_signal);
+	wait_for_record_signal(&u->Union.variants_wait_signal, &u->Union.checking_thread);
 
 	for_array(i, u->Union.variants) {
 		Type *vt = u->Union.variants[i];
@@ -3770,7 +3773,7 @@ gb_internal Selection lookup_field_from_index(Type *type, i64 index) {
 	isize max_count = 0;
 	switch (type->kind) {
 	case Type_Struct:
-		wait_signal_until_available(&type->Struct.fields_wait_signal);
+		wait_for_record_signal(&type->Struct.fields_wait_signal, &type->Struct.checking_thread);
 		max_count = type->Struct.fields.count;
 		break;
 	case Type_Tuple:    max_count = type->Tuple.variables.count; break;
@@ -3782,7 +3785,7 @@ gb_internal Selection lookup_field_from_index(Type *type, i64 index) {
 
 	switch (type->kind) {
 	case Type_Struct: {
-		wait_signal_until_available(&type->Struct.fields_wait_signal);
+		wait_for_record_signal(&type->Struct.fields_wait_signal, &type->Struct.checking_thread);
 		for (isize i = 0; i < max_count; i++) {
 			Entity *f = type->Struct.fields[i];
 			if (f->kind == Entity_Variable) {
@@ -3951,7 +3954,7 @@ gb_internal Selection lookup_field_with_selection(Type *type_, InternedString fi
 			// NOTE(bill): A polymorphic struct has no fields, this only hits in the case of an error
 			return sel;
 		}
-		wait_signal_until_available(&type->Struct.fields_wait_signal);
+		wait_for_record_signal(&type->Struct.fields_wait_signal, &type->Struct.checking_thread);
 		isize field_count = type->Struct.fields.count;
 		if (field_count != 0) for_array(i, type->Struct.fields) {
 			Entity *f = type->Struct.fields[i];
@@ -4421,33 +4424,16 @@ gb_internal i64 type_target_max_align(void) {
 	return max_align;
 }
 
-// Polymorphic record instances being filled by this thread, which another may already have found in the cache
-gb_internal gb_thread_local Array<Type *> records_being_filled;
-
-gb_internal void begin_filling_record(Type *t) {
-	if (records_being_filled.allocator.proc == nullptr) {
-		array_init(&records_being_filled, heap_allocator());
+gb_internal void wait_for_record_signal(Wait_Signal *signal, Futex *checking_thread) {
+	if (signal->futex.load() == 0) {
+		thread_wait_for_owner(&signal->futex, 0, checking_thread->load());
 	}
-	array_add(&records_being_filled, t);
 }
 
-gb_internal void end_filling_record(Type *t) {
-	GB_ASSERT(records_being_filled.count > 0 && records_being_filled[records_being_filled.count-1] == t);
-	array_pop(&records_being_filled);
-}
-
-gb_internal gb_thread_local i32 lazy_mutex_depth;
-
 gb_internal void wait_for_struct_fields(Type *t) {
-	if (t->Struct.polymorphic_parent == nullptr || t->Struct.fields_wait_signal.futex.load() != 0 || lazy_mutex_depth > 0) {
-		return;
+	if (t->Struct.polymorphic_parent != nullptr) {
+		wait_for_record_signal(&t->Struct.fields_wait_signal, &t->Struct.checking_thread);
 	}
-	for (Type *r : records_being_filled) {
-		if (r == t) {
-			return;
-		}
-	}
-	wait_signal_until_available(&t->Struct.fields_wait_signal);
 }
 
 gb_internal i64 type_align_of_internal(Type *t, TypePath *path) {
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index b5b90339c..28fee09f4 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -61,6 +61,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin check ..\test_issue_7336.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_ellipsis_type_call.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b
 ..\..\..\odin check ..\test_issue_foreign_redeclaration.odin -no-entry-point %COMMON% || exit /b
+..\..\..\odin check ..\test_issue_foreign_import_attributes.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_foreign_redeclaration_mismatch.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "1" || exit /b
 ..\..\..\odin doc ..\test_issue_asm_doc_category.odin -file 2>&1 | find /c "asm templates" | findstr /x "1" || exit /b
 ..\..\..\odin build ..\test_issue_7037.odin %COMMON% -o:none  || exit /b
@@ -77,6 +78,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin run ..\test_issue_7482.odin %COMMON% || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local -o:speed || exit /b
+..\..\..\odin test ..\test_issue_7566.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 8bc063be0..209d2923d 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -101,6 +101,7 @@ $ODIN check ../test_issue_7012.odin -no-entry-point $COMMON_CHECK
 $ODIN build ../test_issue_7037.odin $COMMON -o:none
 $ODIN run ../test_issue_7482.odin $COMMON
 $ODIN run ../test_issue_7564.odin $COMMON
+$ODIN test ../test_issue_7566.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON
@@ -151,6 +152,7 @@ else
 fi
 
 $ODIN check ../test_issue_foreign_redeclaration.odin -no-entry-point $COMMON_CHECK
+$ODIN check ../test_issue_foreign_import_attributes.odin -no-entry-point $COMMON_CHECK
 if [[ $($ODIN check ../test_issue_foreign_redeclaration_mismatch.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 1 ]]; then
 	echo "SUCCESSFUL 1/1"
 else
diff --git a/tests/issues/test_issue_7566.odin b/tests/issues/test_issue_7566.odin
new file mode 100644
index 000000000..3bbef41e7
--- /dev/null
+++ b/tests/issues/test_issue_7566.odin
@@ -0,0 +1,36 @@
+// Tests issue #7566 https://github.com/odin-lang/Odin/issues/7566
+// Polymorphic instances whose constant parameters are spelt the same but have different values
+package test_issues
+
+import "core:testing"
+
+Dim :: enum{ C, F }
+Dims :: [Dim]int
+Arr2 :: [2][2]int
+
+get_dims :: proc($dims: Dims) -> Dims { return dims }
+get_arr2 :: proc($a: Arr2) -> Arr2 { return a }
+
+make_and_check :: proc($A, $I: int) -> Dims {
+	dims :: Dims{.C = I, .F = A}
+	return get_dims(dims)
+}
+
+make_inline :: proc($A, $I: int) -> Dims {
+	return get_dims(Dims{.C = I, .F = A})
+}
+
+make_nested :: proc($A: int) -> Arr2 {
+	a :: Arr2{{A, 1}, {2, A}}
+	return get_arr2(a)
+}
+
+@(test)
+test_issue_7566 :: proc(t: ^testing.T) {
+	testing.expect_value(t, make_and_check(2, 2), Dims{.C = 2, .F = 2})
+	testing.expect_value(t, make_and_check(3, 3), Dims{.C = 3, .F = 3})
+	testing.expect_value(t, make_inline(4, 5), Dims{.C = 5, .F = 4})
+	testing.expect_value(t, make_inline(6, 7), Dims{.C = 7, .F = 6})
+	testing.expect_value(t, make_nested(8), Arr2{{8, 1}, {2, 8}})
+	testing.expect_value(t, make_nested(9), Arr2{{9, 1}, {2, 9}})
+}
diff --git a/tests/issues/test_issue_foreign_import_attributes.odin b/tests/issues/test_issue_foreign_import_attributes.odin
new file mode 100644
index 000000000..d7dd1cb80
--- /dev/null
+++ b/tests/issues/test_issue_foreign_import_attributes.odin
@@ -0,0 +1,13 @@
+// 'foreign import' attributes may name constants declared after them
+package test_issues
+
+@(priority_index=PRIORITY, extra_linker_flags=FLAGS)
+foreign import lib "system:foo"
+
+foreign lib {
+	foo :: proc "c" () ---
+}
+
+PRIORITY :: LATER + 1
+FLAGS    :: "-L."
+LATER    :: 1
diff --git a/tests/issues/test_issue_global_when_cycle_accepted.odin b/tests/issues/test_issue_global_when_cycle_accepted.odin
new file mode 100644
index 000000000..5d4b1e2a1
--- /dev/null
+++ b/tests/issues/test_issue_global_when_cycle_accepted.odin
@@ -0,0 +1,28 @@
+// Cycles of global 'when's with exactly one consistent choice of branches
+package test_issues
+
+import "core:testing"
+
+// only the first branch of the second 'when' is consistent, so `int` stays the builtin
+when size_of(int) == 8 { Y :: 1 }
+when Y == 1 { Z :: 1 } else { int :: i32 }
+
+// through an unconditional declaration, whose value is checked for each choice
+SIZE :: size_of(uint)
+when SIZE == 8 { V :: 1 }
+when V == 1 { W :: 2 } else { uint :: u32 }
+
+// nested and 'else when' branches
+when size_of(rawptr) == 8 {
+	when true { N :: 1 }
+}
+when N != 1 { rawptr :: u32 } else when N == 1 { M :: 3 } else { rawptr :: u16 }
+
+@(test)
+test_global_when_cycle_accepted :: proc(t: ^testing.T) {
+	testing.expect_value(t, Z, 1)
+	testing.expect_value(t, size_of(int), 8)
+	testing.expect_value(t, SIZE, 8)
+	testing.expect_value(t, W, 2)
+	testing.expect_value(t, M, 3)
+}
diff --git a/tests/issues/test_issue_global_when_cycle_ambiguous.odin b/tests/issues/test_issue_global_when_cycle_ambiguous.odin
new file mode 100644
index 000000000..90ebb69db
--- /dev/null
+++ b/tests/issues/test_issue_global_when_cycle_ambiguous.odin
@@ -0,0 +1,5 @@
+// A cycle of global 'when's with two consistent choices of branches, which is an error
+package test_issues
+
+when size_of(int) == 8 { uint :: u32 }
+when size_of(uint) == 8 { int :: i32 }

From f01284d372e8588dd4f670b8f0fa63e198b0b2f2 Mon Sep 17 00:00:00 2001
From: Arthur031221 <levi74108520963@gmail.com>
Date: Fri, 2 Oct 2026 14:10:58 +0800
Subject: [PATCH 133/215] [core:encoding/csv] Read the final multiline record
 before EOF

The multiline line reader returned EOF with buffered data, so record
parsing discarded the last row when the file had no trailing newline.
Clear EOF while data remains, as the normal line reader does.

Add regressions for final records, empty input and unterminated quotes.
The normal core suite passes 627 tests with the new CSV tests included.
---
 core/encoding/csv/reader.odin              |  3 +
 tests/core/encoding/csv/test_core_csv.odin | 71 ++++++++++++++++++++++
 tests/core/normal.odin                     |  1 +
 3 files changed, 75 insertions(+)
 create mode 100644 tests/core/encoding/csv/test_core_csv.odin

diff --git a/core/encoding/csv/reader.odin b/core/encoding/csv/reader.odin
index 577ef219d..bfc4ec823 100644
--- a/core/encoding/csv/reader.odin
+++ b/core/encoding/csv/reader.odin
@@ -297,6 +297,9 @@ _read_record :: proc(r: ^Reader, dst: ^[dynamic]string, allocator := context.all
 				append(&r.raw_buffer, ..rune_buf[:rune_len])
 			}
 
+			if err == .EOF && len(r.raw_buffer) > 0 {
+				err = nil
+			}
 			return r.raw_buffer[:], err
 		}
 		unreachable()
diff --git a/tests/core/encoding/csv/test_core_csv.odin b/tests/core/encoding/csv/test_core_csv.odin
new file mode 100644
index 000000000..7cae4d1bc
--- /dev/null
+++ b/tests/core/encoding/csv/test_core_csv.odin
@@ -0,0 +1,71 @@
+package test_core_csv
+
+import "core:encoding/csv"
+import "core:testing"
+
+@(test)
+read_final_record :: proc(t: ^testing.T) {
+	cases := []struct {
+		input: string,
+		last:  [2]string,
+	}{
+		{"first,second\nthird,fourth", {"third", "fourth"}},
+		{"first,second\nthird,fourth\n", {"third", "fourth"}},
+		{"first,second\r\nthird,fourth\r\n", {"third", "fourth"}},
+		{"first,second\n\"third\nfourth\",last", {"third\nfourth", "last"}},
+		{"first,second\n\"\",last", {"", "last"}},
+	}
+
+	for c in cases {
+		for multiline in ([2]bool{false, true}) {
+			r := csv.Reader{
+				multiline_fields    = multiline,
+				reuse_record        = true,
+				reuse_record_buffer = true,
+			}
+			csv.reader_init_with_string(&r, c.input)
+			defer csv.reader_destroy(&r)
+
+			record, err := csv.read(&r)
+			testing.expect_value(t, err, nil)
+			if testing.expect_value(t, len(record), 2) {
+				testing.expect_value(t, record[0], "first")
+				testing.expect_value(t, record[1], "second")
+			}
+
+			record, err = csv.read(&r)
+			testing.expectf(t, err == nil, "input %q, multiline %v: %v", c.input, multiline, err)
+			if testing.expect_value(t, len(record), 2) {
+				testing.expect_value(t, record[0], c.last[0])
+				testing.expect_value(t, record[1], c.last[1])
+			}
+
+			record, err = csv.read(&r)
+			testing.expect(t, csv.is_io_error(err, .EOF))
+			testing.expect_value(t, len(record), 0)
+		}
+	}
+}
+
+@(test)
+read_empty_multiline_input :: proc(t: ^testing.T) {
+	r := csv.Reader{multiline_fields = true}
+	csv.reader_init_with_string(&r, "")
+	defer csv.reader_destroy(&r)
+
+	record, err := csv.read(&r)
+	testing.expect(t, csv.is_io_error(err, .EOF))
+	testing.expect_value(t, len(record), 0)
+}
+
+@(test)
+read_unterminated_multiline_quote :: proc(t: ^testing.T) {
+	r := csv.Reader{multiline_fields = true, reuse_record = true, reuse_record_buffer = true}
+	csv.reader_init_with_string(&r, "\"unfinished")
+	defer csv.reader_destroy(&r)
+
+	_, err := csv.read(&r)
+	if reader_err, ok := err.(csv.Reader_Error); testing.expect(t, ok) {
+		testing.expect_value(t, reader_err.kind, csv.Reader_Error_Kind.Quote)
+	}
+}
diff --git a/tests/core/normal.odin b/tests/core/normal.odin
index a6b193651..e3c771db6 100644
--- a/tests/core/normal.odin
+++ b/tests/core/normal.odin
@@ -18,6 +18,7 @@ download_assets :: proc "contextless" () {
 @(require) import "encoding/base32"
 @(require) import "encoding/base64"
 @(require) import "encoding/cbor"
+@(require) import "encoding/csv"
 @(require) import "encoding/hex"
 @(require) import "encoding/hxa"
 @(require) import "encoding/ini"

From 0de3f92449a1d4bfbd4845ac91e370866ca16f64 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 11:24:28 +0100
Subject: [PATCH 134/215] Thread pool: wake one sleeping worker per task
 instead of all, spin briefly before sleeping; walk the procedure dependency
 tree in chunks

---
 src/checker.cpp     |  39 +++++++++------
 src/thread_pool.cpp | 118 +++++++++++++++++++++++++-------------------
 2 files changed, 92 insertions(+), 65 deletions(-)

diff --git a/src/checker.cpp b/src/checker.cpp
index ff59665ec..bd92cad9e 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -7371,8 +7371,6 @@ gb_internal void check_update_dependency_tree_for_procedures(Checker *c) {
 	}
 }
 #else
-gb_internal void check_walk_all_dependencies(DeclInfo *decl);
-
 // NOTE: post-order, so a declaration has the dependencies of all those nested in it before they are added to its parent
 gb_internal void check_walk_all_dependencies_post_order(DeclInfo *decl) {
 	for (DeclInfo *child = decl->next_child; child != nullptr; child = child->next_sibling) {
@@ -7381,30 +7379,41 @@ gb_internal void check_walk_all_dependencies_post_order(DeclInfo *decl) {
 	add_deps_from_child_to_parent(decl);
 }
 
+// NOTE(bill): in chunks, as with a task for each entity, adding the tasks was most of the work
+struct CheckWalkDependenciesChunk {
+	DeclInfo **decls;    // either these
+	Entity **  entities; // or the declarations of these
+	isize      count;
+};
+
 gb_internal WORKER_TASK_PROC(check_walk_all_dependencies_worker_proc) {
-	if (data != nullptr) {
-		check_walk_all_dependencies_post_order(cast(DeclInfo *)data);
+	CheckWalkDependenciesChunk *chunk = cast(CheckWalkDependenciesChunk *)data;
+	for (isize i = 0; i < chunk->count; i++) {
+		DeclInfo *decl = chunk->decls != nullptr ? chunk->decls[i] : chunk->entities[i]->decl_info;
+		if (decl != nullptr) {
+			check_walk_all_dependencies_post_order(decl);
+		}
 	}
 	return 0;
 }
 
-gb_internal void check_walk_all_dependencies(DeclInfo *decl) {
-	if (decl != nullptr) {
-		thread_pool_add_task(check_walk_all_dependencies_worker_proc, decl);
-	}
-}
-
 gb_internal void check_update_dependency_tree_for_procedures(Checker *c) {
+	isize const CHUNK_SIZE = 256;
+	auto chunks = array_make<CheckWalkDependenciesChunk>(heap_allocator(), 0, c->info.entities.count/CHUNK_SIZE + 16);
+	defer (array_free(&chunks));
+
 	mutex_lock(&c->nested_proc_lits_mutex);
-	for (DeclInfo *decl : c->nested_proc_lits) {
-		check_walk_all_dependencies(decl);
+	for (isize i = 0; i < c->nested_proc_lits.count; i += CHUNK_SIZE) {
+		array_add(&chunks, CheckWalkDependenciesChunk{c->nested_proc_lits.data + i, nullptr, gb_min(CHUNK_SIZE, c->nested_proc_lits.count - i)});
 	}
 	mutex_unlock(&c->nested_proc_lits_mutex);
-	for (Entity *e : c->info.entities) {
-		DeclInfo *decl = e->decl_info;
-		check_walk_all_dependencies(decl);
+	for (isize i = 0; i < c->info.entities.count; i += CHUNK_SIZE) {
+		array_add(&chunks, CheckWalkDependenciesChunk{nullptr, c->info.entities.data + i, gb_min(CHUNK_SIZE, c->info.entities.count - i)});
 	}
 
+	for (CheckWalkDependenciesChunk &chunk : chunks) {
+		thread_pool_add_task(check_walk_all_dependencies_worker_proc, &chunk);
+	}
 	thread_pool_wait();
 }
 #endif
diff --git a/src/thread_pool.cpp b/src/thread_pool.cpp
index b62811a5a..0f1e59c93 100644
--- a/src/thread_pool.cpp
+++ b/src/thread_pool.cpp
@@ -29,20 +29,20 @@ enum GrabState {
 	Grab_Failed  = 2,
 };
 
-enum BroadcastWaitState {
-	Nobody_Waiting  = 0,
-	Someone_Waiting = 1,
-};
-
 struct ThreadPool {
 	gbAllocator       threads_allocator;
 	Slice<Thread>     threads;
 	std::atomic<bool> running;
 
-	Futex tasks_available;
-	Futex tasks_left;
+	Futex            tasks_available; // bumped to wake a sleeping worker
+	std::atomic<i32> sleeping;        // workers asleep on `tasks_available`, or about to be
+	Futex            tasks_left;
 };
 
+// NOTE(bill): how many times an idle worker looks for a task before sleeping, so one adding small tasks
+// one after another keeps the workers busy rather than waking one for each
+enum { THREAD_POOL_SPIN_COUNT = 64 };
+
 gb_internal isize current_thread_index(void) {
 	return current_thread ? current_thread->idx : 0;
 }
@@ -69,8 +69,8 @@ gb_internal void thread_pool_destroy(ThreadPool *pool) {
 
 	for_array_off(i, 1, pool->threads) {
 		Thread *t = &pool->threads[i];
-		pool->tasks_available.store(Nobody_Waiting);
-		futex_broadcast(&t->pool->tasks_available);
+		pool->tasks_available.fetch_add(1);
+		futex_broadcast(&pool->tasks_available);
 		thread_join_and_destroy(t);
 	}
 
@@ -103,9 +103,13 @@ void thread_pool_queue_push(Thread *thread, WorkerTask task) {
 	thread->queue.bottom.store(bot + 1, std::memory_order_relaxed);
 
 	thread->pool->tasks_left.fetch_add(1, std::memory_order_release);
-	i32 state = Someone_Waiting;
-	if (thread->pool->tasks_available.compare_exchange_strong(state, Nobody_Waiting)) {
-		futex_broadcast(&thread->pool->tasks_available);
+
+	// NOTE(bill): one sleeping worker per task; waking them all made a loop adding small tasks mostly
+	// wake-ups, as they were back asleep before the next. The fence pairs with the one in the worker loop.
+	std::atomic_thread_fence(std::memory_order_seq_cst);
+	if (thread->pool->sleeping.load(std::memory_order_relaxed) > 0) {
+		thread->pool->tasks_available.fetch_add(1);
+		futex_signal(&thread->pool->tasks_available);
 	}
 }
 
@@ -165,6 +169,40 @@ GrabState thread_pool_queue_steal(Thread *thread, WorkerTask *task) {
 	return ret;
 }
 
+gb_internal bool thread_pool_queue_has_tasks(Thread *thread) {
+	return thread->queue.top.load(std::memory_order_acquire) < thread->queue.bottom.load(std::memory_order_acquire);
+}
+
+// Runs a task from another thread's queue; false if none had one
+gb_internal bool thread_pool_steal(ThreadPool *pool) {
+	usize idx = cast(usize)current_thread->idx;
+	for_array(i, pool->threads) {
+		idx = (idx + 1) % cast(usize)pool->threads.count;
+		Thread *thread = &pool->threads.data[idx];
+		if (!thread_pool_queue_has_tasks(thread)) {
+			continue;
+		}
+
+		WorkerTask task;
+		switch (thread_pool_queue_steal(thread, &task)) {
+		case Grab_Empty:
+			continue;
+		case Grab_Success:
+			task.do_work(task.data);
+			pool->tasks_left.fetch_sub(1, std::memory_order_release);
+
+			if (pool->tasks_left.load(std::memory_order_acquire) == 0) {
+				futex_signal(&pool->tasks_left);
+			}
+			return true;
+		case Grab_Failed:
+			// NOTE: another thread took it, so there may be more
+			return true;
+		}
+	}
+	return false;
+}
+
 gb_internal bool thread_pool_add_task(ThreadPool *pool, WorkerTaskProc *proc, void *data) {
 	WorkerTask task = {};
 	task.do_work = proc;
@@ -247,7 +285,6 @@ gb_internal THREAD_PROC(thread_pool_thread_proc) {
 	while (pool->running.load(std::memory_order_seq_cst)) {
 		// If we've got tasks to process, work through them
 		usize finished_tasks = 0;
-		i32 state;
 
 		while (!thread_pool_queue_take(current_thread, &task)) {
 			task.do_work(task.data);
@@ -260,48 +297,29 @@ gb_internal THREAD_PROC(thread_pool_thread_proc) {
 		}
 
 		// If there's still work somewhere and we don't have it, steal it
-		if (pool->tasks_left.load(std::memory_order_acquire)) {
-			usize idx = cast(usize)current_thread->idx;
-			for_array(i, pool->threads) {
-				if (pool->tasks_left.load(std::memory_order_acquire) == 0) {
-					break;
-				}
-
-				idx = (idx + 1) % cast(usize)pool->threads.count;
-
-				Thread *thread = &pool->threads.data[idx];
-				WorkerTask task;
-
-				GrabState ret = thread_pool_queue_steal(thread, &task);
-				switch (ret) {
-				case Grab_Empty:
-					continue;
-				case Grab_Success:
-					task.do_work(task.data);
-					pool->tasks_left.fetch_sub(1, std::memory_order_release);
-
-					if (pool->tasks_left.load(std::memory_order_acquire) == 0) {
-						futex_signal(&pool->tasks_left);
-					}
-
-					/*fallthrough*/
-				case Grab_Failed:
-					goto main_loop_continue;
-				}
+		for (isize spin = 0; spin < THREAD_POOL_SPIN_COUNT; spin++) {
+			if (thread_pool_steal(pool)) {
+				goto main_loop_continue;
 			}
+			yield_thread();
 		}
 
 		// if we've done all our work, and there's nothing to steal, go to sleep
-		pool->tasks_available.store(Someone_Waiting);
-		if (!pool->running) {
-			// do not leave the word published on the way out: a worker still on its way to
-			// futex_wait would sleep on it, and the destroyer does not broadcast again once it
-			// has committed to its first join
-			pool->tasks_available.store(Nobody_Waiting);
-			futex_broadcast(&pool->tasks_available);
-			break;
+		{
+			Footex epoch = pool->tasks_available.load();
+			pool->sleeping.fetch_add(1, std::memory_order_relaxed);
+			std::atomic_thread_fence(std::memory_order_seq_cst);
+
+			// NOTE: a task added before `sleeping` was raised woke nobody, so look again
+			bool has_tasks = false;
+			for (Thread &t : pool->threads) {
+				has_tasks |= thread_pool_queue_has_tasks(&t);
+			}
+			if (!has_tasks && pool->running.load()) {
+				futex_wait(&pool->tasks_available, epoch);
+			}
+			pool->sleeping.fetch_sub(1, std::memory_order_relaxed);
 		}
-		futex_wait(&pool->tasks_available, Someone_Waiting);
 
 		main_loop_continue:;
 	}

From 5fbcbd17da14f962d018a2ab52b070f5eb980326 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 11:44:50 +0100
Subject: [PATCH 135/215] Compare entity source order by each file's index in
 its package rather than its name; search the initialization-order graph's
 edges in parallel

---
 src/checker.cpp | 86 ++++++++++++++++++++++++++++++++++---------------
 src/parser.hpp  |  1 +
 2 files changed, 61 insertions(+), 26 deletions(-)

diff --git a/src/checker.cpp b/src/checker.cpp
index bd92cad9e..ae2729b9a 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -96,12 +96,17 @@ gb_internal int entity_source_order_cmp(Entity *x, Entity *y) {
 		}
 	}
 	if (x->file != y->file) {
-		String fullpath_x = x->file ? x->file->fullpath : (String{});
-		String fullpath_y = y->file ? y->file->fullpath : (String{});
-		String file_x = filename_from_path(fullpath_x);
-		String file_y = filename_from_path(fullpath_y);
+		if (x->file != nullptr && y->file != nullptr && x->file->pkg != nullptr && x->file->pkg == y->file->pkg) {
+			// NOTE(bill): the same order as by name, as a package's files are sorted by it
+			cmp = i32_cmp(x->file->index_in_pkg, y->file->index_in_pkg);
+		} else {
+			String fullpath_x = x->file ? x->file->fullpath : (String{});
+			String fullpath_y = y->file ? y->file->fullpath : (String{});
+			String file_x = filename_from_path(fullpath_x);
+			String file_y = filename_from_path(fullpath_y);
 
-		cmp = string_compare(file_x, file_y);
+			cmp = string_compare(file_x, file_y);
+		}
 		if (cmp) {
 			return cmp;
 		}
@@ -3306,32 +3311,23 @@ gb_internal gb_inline bool is_entity_a_dependency(Entity *e) {
 	return false;
 }
 
-gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInfo *info, Arena *arena) {
-	PtrMap<Entity *, EntityGraphNode *> M_vars = {};
-	map_init(&M_vars, info->entities.count);
-	defer (map_destroy(&M_vars));
+struct EntityGraphEdgesChunk {
+	PtrMap<Entity *, EntityGraphNode *> *vars;
+	Slice<EntityGraphNode *>             nodes;
+};
 
-	auto G = array_make<EntityGraphNode *>(arena_allocator(arena), 0, info->entities.count);
-	for (Entity *e : info->entities) {
-		if (e == nullptr || e->kind != Entity_Variable || !is_entity_a_dependency(e)) {
-			continue;
-		}
-		EntityGraphNode *n = arena_alloc_item<EntityGraphNode>(arena);
-		n->entity = e;
-		map_set(&M_vars, e, n);
-		array_add(&G, n);
-	}
+// NOTE(bill): A variable depends on every variable reachable from its declaration through procedures and constants,
+// as its initializer may read any of them. Variables are not walked through, as they are ordered by their own edges.
+// Each node's search only reads, and only writes its own successors, so the searches run in parallel.
+gb_internal WORKER_TASK_PROC(generate_entity_dependency_graph_edges_worker) {
+	EntityGraphEdgesChunk *chunk = cast(EntityGraphEdgesChunk *)data;
 
-	TIME_SECTION("generate_entity_dependency_graph: Calculate edges");
-
-	// NOTE(bill): A variable depends on every variable reachable from its declaration through procedures and constants,
-	// as its initializer may read any of them. Variables are not walked through, as they are ordered by their own edges.
 	PtrSet<Entity *> visited = {};
 	defer (ptr_set_destroy(&visited));
 	auto stack = array_make<Entity *>(heap_allocator(), 0, 64);
 	defer (array_free(&stack));
 
-	for (EntityGraphNode *n : G) {
+	for (EntityGraphNode *n : chunk->nodes) {
 		ptr_set_clear(&visited);
 		array_clear(&stack);
 
@@ -3353,11 +3349,10 @@ gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInf
 				continue;
 			}
 			if (dep->kind == Entity_Variable) {
-				EntityGraphNode **m = map_get(&M_vars, dep);
+				EntityGraphNode **m = map_get(chunk->vars, dep);
 				// NOTE(bill): a variable naming itself, e.g. `t: struct { next: ^type_of(t) }`, is not an initialization cycle
 				if (m != nullptr && *m != n) {
 					entity_graph_node_set_add(&n->succ, *m);
-					entity_graph_node_set_add(&(*m)->pred, n);
 				}
 				continue;
 			}
@@ -3372,6 +3367,44 @@ gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInf
 			}
 		}
 	}
+	return 0;
+}
+
+gb_internal Array<EntityGraphNode *> generate_entity_dependency_graph(CheckerInfo *info, Arena *arena) {
+	PtrMap<Entity *, EntityGraphNode *> M_vars = {};
+	map_init(&M_vars, info->entities.count);
+	defer (map_destroy(&M_vars));
+
+	auto G = array_make<EntityGraphNode *>(arena_allocator(arena), 0, info->entities.count);
+	for (Entity *e : info->entities) {
+		if (e == nullptr || e->kind != Entity_Variable || !is_entity_a_dependency(e)) {
+			continue;
+		}
+		EntityGraphNode *n = arena_alloc_item<EntityGraphNode>(arena);
+		n->entity = e;
+		map_set(&M_vars, e, n);
+		array_add(&G, n);
+	}
+
+	TIME_SECTION("generate_entity_dependency_graph: Calculate edges");
+
+	isize const CHUNK_SIZE = 32;
+	auto chunks = array_make<EntityGraphEdgesChunk>(heap_allocator(), 0, G.count/CHUNK_SIZE + 1);
+	defer (array_free(&chunks));
+	for (isize i = 0; i < G.count; i += CHUNK_SIZE) {
+		array_add(&chunks, EntityGraphEdgesChunk{&M_vars, slice(slice_from_array(G), i, gb_min(i + CHUNK_SIZE, G.count))});
+	}
+	for (EntityGraphEdgesChunk &chunk : chunks) {
+		thread_pool_add_task(generate_entity_dependency_graph_edges_worker, &chunk);
+	}
+	thread_pool_wait();
+
+	// NOTE: in the order of the nodes, so each node's predecessors are added in the order they were before
+	for (EntityGraphNode *n : G) {
+		FOR_PTR_SET(m, n->succ) {
+			entity_graph_node_set_add(&m->pred, n);
+		}
+	}
 
 	TIME_SECTION("generate_entity_dependency_graph: Dependency Count Checker");
 	for_array(i, G) {
@@ -5940,6 +5973,7 @@ gb_internal void check_create_file_scopes(Checker *c) {
 		isize total_pkg_decl_count = 0;
 		for_array(j, pkg->files) {
 			AstFile *f = pkg->files[j];
+			f->index_in_pkg = cast(i32)j;
 			string_map_set(&c->info.files, f->fullpath, f);
 
 			create_scope_from_file(nullptr, f);
diff --git a/src/parser.hpp b/src/parser.hpp
index f9d8da6af..d1988f89b 100644
--- a/src/parser.hpp
+++ b/src/parser.hpp
@@ -106,6 +106,7 @@ enum AstDelayQueueKind {
 
 struct AstFile {
 	i32          id;
+	i32          index_in_pkg; // once the package's files are sorted by name, see `check_create_file_scopes`
 	u32          flags;
 	AstPackage * pkg;
 	Scope *      scope;

From eaa1cb34eb73b7ad2a98564f3ea74da6a0bb2627 Mon Sep 17 00:00:00 2001
From: Arthur031221 <levi74108520963@gmail.com>
Date: Fri, 2 Oct 2026 18:57:49 +0800
Subject: [PATCH 136/215] Fix CBOR bit set byte order conversion

---
 core/encoding/cbor/marshal.odin              |  4 +-
 core/encoding/cbor/unmarshal.odin            |  2 +-
 tests/core/encoding/cbor/test_core_cbor.odin | 52 +++++++++++++++++++-
 3 files changed, 54 insertions(+), 4 deletions(-)

diff --git a/core/encoding/cbor/marshal.odin b/core/encoding/cbor/marshal.odin
index b9333bf2b..fb61f52c7 100644
--- a/core/encoding/cbor/marshal.odin
+++ b/core/encoding/cbor/marshal.odin
@@ -615,8 +615,8 @@ _marshal_into_encoder :: proc(e: Encoder, v: any, ti: ^runtime.Type_Info) -> (er
 		return marshal_into(e, any{v.data, vti.id})
 
 	case runtime.Type_Info_Bit_Set:
-		// Store bit_set as big endian just like the protocol.
-		do_byte_swap := !reflect.bit_set_is_big_endian(v)
+		// Convert the bit set storage to a native integer before encoding.
+		do_byte_swap := reflect.bit_set_is_big_endian(v) != (ODIN_ENDIAN == .Big)
 		switch ti.size * 8 {
 		case  0:
 			return _encode_u8(e.writer, 0)
diff --git a/core/encoding/cbor/unmarshal.odin b/core/encoding/cbor/unmarshal.odin
index a4c7176ec..dd23dc3c7 100644
--- a/core/encoding/cbor/unmarshal.odin
+++ b/core/encoding/cbor/unmarshal.odin
@@ -905,7 +905,7 @@ _assign_int :: proc(val: any, i: $T) -> bool {
 	case:
 		ti := type_info_of(v.id)
 		if _, ok := ti.variant.(runtime.Type_Info_Bit_Set); ok {
-			do_byte_swap := !reflect.bit_set_is_big_endian(v)
+			do_byte_swap := reflect.bit_set_is_big_endian(v) != (ODIN_ENDIAN == .Big)
 			switch ti.size * 8 {
 			case 0: // no-op.
 			case 8:
diff --git a/tests/core/encoding/cbor/test_core_cbor.odin b/tests/core/encoding/cbor/test_core_cbor.odin
index 6e3312779..37c27eebd 100644
--- a/tests/core/encoding/cbor/test_core_cbor.odin
+++ b/tests/core/encoding/cbor/test_core_cbor.odin
@@ -201,7 +201,7 @@ test_marshalling :: proc(t: ^testing.T) {
 	},
 	"base64": 34("MTYgaXMgYSBuaWNlIG51bWJlcg=="),
 	"biggie": 18446744073709551615,
-	"ennieb": 512,
+	"ennieb": 2,
 	"iamint": -256,
 	"biggest": 2(h'0f951a9fd3c158afdff08ab8e0'),
 	"smallie": -18446744073709551616,
@@ -910,3 +910,53 @@ expect_streamed_encoding :: proc(t: ^testing.T, encoded: string, values: ..cbor.
 
 	testing.expect_value(t, fmt.tprint(bytes.buffer_to_bytes(&buf)), fmt.tprint(transmute([]byte)encoded), loc)
 }
+
+
+@(test)
+test_bit_set_endianness :: proc(t: ^testing.T) {
+	check :: proc(t: ^testing.T, $Backing: typeid, wide_encoding: string) {
+		Flag :: enum { First = 0, Second = 9, Last = 12 }
+		Flags :: bit_set[Flag; Backing]
+		value := Flags{.First, .Second, .Last}
+
+		options := [2]cbor.Encoder_Flags{cbor.ENCODE_SMALL, {}}
+		for flags in options {
+			expected := flags == cbor.ENCODE_SMALL ? "\x19\x12\x01" : wide_encoding
+			data, err := cbor.marshal(value, flags)
+			defer delete(data)
+			testing.expect_value(t, err, nil)
+			testing.expect_value(t, string(data), expected)
+
+			decoded: Flags
+			uerr := cbor.unmarshal(expected, &decoded)
+			testing.expect_value(t, uerr, nil)
+			testing.expect_value(t, decoded, value)
+		}
+
+		data, err := cbor.marshal(Flags{})
+		defer delete(data)
+		testing.expect_value(t, err, nil)
+		testing.expect_value(t, string(data), "\x00")
+	}
+
+	Small_Flags :: bit_set[0..=7; u8]
+	control := Small_Flags{1, 5}
+	data, err := cbor.marshal(control)
+	defer delete(data)
+	testing.expect_value(t, err, nil)
+	testing.expect_value(t, string(data), "\x18\x22")
+	decoded: Small_Flags
+	uerr := cbor.unmarshal("\x18\x22", &decoded)
+	testing.expect_value(t, uerr, nil)
+	testing.expect_value(t, decoded, control)
+
+	check(t, u16,   "\x19\x12\x01")
+	check(t, u16le, "\x19\x12\x01")
+	check(t, u16be, "\x19\x12\x01")
+	check(t, u32,   "\x1a\x00\x00\x12\x01")
+	check(t, u32le, "\x1a\x00\x00\x12\x01")
+	check(t, u32be, "\x1a\x00\x00\x12\x01")
+	check(t, u64,   "\x1b\x00\x00\x00\x00\x00\x00\x12\x01")
+	check(t, u64le, "\x1b\x00\x00\x00\x00\x00\x00\x12\x01")
+	check(t, u64be, "\x1b\x00\x00\x00\x00\x00\x00\x12\x01")
+}

From ff9d3584f4a471e09c61f8f4c7fe48d1b2a71c91 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 12:07:06 +0100
Subject: [PATCH 137/215] Per-thread arrays instead of MPSC queues for
 entities, definitions and untyped expressions; walk the minimum dependency
 set from per-task stacks, and scan its root definitions in parallel

---
 src/array.cpp       |  13 +++
 src/checker.cpp     | 217 +++++++++++++++++++++++++-------------------
 src/checker.hpp     |   7 +-
 src/thread_pool.cpp |  53 +++++++++++
 4 files changed, 192 insertions(+), 98 deletions(-)

diff --git a/src/array.cpp b/src/array.cpp
index 5176f2511..853a0fc03 100644
--- a/src/array.cpp
+++ b/src/array.cpp
@@ -94,6 +94,19 @@ gb_internal Slice<T> slice_make(gbAllocator const &allocator, isize count) {
 	return s;
 }
 
+
+template <typename T>
+gb_internal Slice<T> slice_make_aligned(gbAllocator const &allocator, isize count, isize alignment) {
+	GB_ASSERT(count >= 0);
+	Slice<T> s = {};
+	s.data  = cast(T *)gb_alloc_align(allocator, count*gb_size_of(T), alignment);
+	if (count > 0) {
+		GB_ASSERT(s.data != nullptr);
+	}
+	s.count = count;
+	return s;
+}
+
 template <typename T>
 gb_internal void slice_init(Slice<T> *s, gbAllocator const &allocator, isize count) {
 	GB_ASSERT(count >= 0);
diff --git a/src/checker.cpp b/src/checker.cpp
index ae2729b9a..cc8a3d18d 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -1679,8 +1679,8 @@ gb_internal void init_checker_info(CheckerInfo *i) {
 	array_init(&i->all_procedures, a);
 	mpsc_init(&i->all_procedures_queue, a);
 
-	mpsc_init(&i->entity_queue, a); // 1<<20);
-	mpsc_init(&i->definition_queue, a); //); // 1<<20);
+	per_thread_array_init(&i->entity_queue,     global_thread_pool.threads.count);
+	per_thread_array_init(&i->definition_queue, global_thread_pool.threads.count);
 	mpsc_init(&i->required_global_variable_queue, a); // 1<<10);
 	mpsc_init(&i->required_foreign_imports_through_force_queue, a); // 1<<10);
 	mpsc_init(&i->foreign_imports_to_check_fullpaths, a); // 1<<10);
@@ -1713,8 +1713,8 @@ gb_internal void destroy_checker_info(CheckerInfo *i) {
 
 	mpsc_destroy(&i->all_procedures_queue);
 
-	mpsc_destroy(&i->entity_queue);
-	mpsc_destroy(&i->definition_queue);
+	per_thread_array_destroy(&i->entity_queue);
+	per_thread_array_destroy(&i->definition_queue);
 	mpsc_destroy(&i->required_global_variable_queue);
 	mpsc_destroy(&i->required_foreign_imports_through_force_queue);
 	mpsc_destroy(&i->foreign_imports_to_check_fullpaths);
@@ -1807,7 +1807,7 @@ gb_internal void init_checker(Checker *c) {
 	array_init(&c->procs_to_check, heap_allocator(), 0, 1<<20);
 	array_init(&c->nested_proc_lits, heap_allocator(), 0, 1<<20);
 
-	mpsc_init(&c->global_untyped_queue, a); // , 1<<20);
+	per_thread_array_init(&c->global_untyped_queue, global_thread_pool.threads.count);
 	mpsc_init(&c->soa_types_to_complete, a); // , 1<<20);
 
 	init_checker_context(&c->builtin_ctx, c);
@@ -1820,7 +1820,7 @@ gb_internal void destroy_checker(Checker *c) {
 
 	array_free(&c->nested_proc_lits);
 	array_free(&c->procs_to_check);
-	mpsc_destroy(&c->global_untyped_queue);
+	per_thread_array_destroy(&c->global_untyped_queue);
 	mpsc_destroy(&c->soa_types_to_complete);
 }
 
@@ -2079,7 +2079,7 @@ gb_internal void add_entity_definition(CheckerInfo *i, Ast *identifier, Entity *
 	GB_ASSERT(entity != nullptr);
 	identifier->Ident.entity = entity;
 	entity->identifier = identifier;
-	mpsc_enqueue(&i->definition_queue, entity);
+	per_thread_array_add(&i->definition_queue, entity);
 }
 
 gb_internal bool redeclaration_error(String name, Entity *prev, Entity *found) {
@@ -2332,19 +2332,16 @@ gb_internal void add_entity_and_decl_info(CheckerContext *c, Ast *identifier, En
 	e->pkg = c->pkg;
 	d->entity.store(e);
 
-	isize queue_count = -1;
-	bool is_lazy = false;
-
-	is_lazy = (e->flags & EntityFlag_Lazy) == EntityFlag_Lazy;
+	bool is_lazy = (e->flags & EntityFlag_Lazy) == EntityFlag_Lazy;
 	if (!is_lazy) {
-		queue_count = mpsc_enqueue(&info->entity_queue, e);
+		per_thread_array_add(&info->entity_queue, e);
 	}
 
 	if (e->token.pos.file_id != 0) {
 		e->order_in_src = cast(u64)(e->token.pos.file_id)<<32 | u32(e->token.pos.offset);
 	} else {
 		GB_ASSERT(!is_lazy);
-		e->order_in_src = cast(u64)(1+queue_count);
+		e->order_in_src = 1 + info->entities_without_file.fetch_add(1);
 	}
 }
 
@@ -2912,73 +2909,91 @@ gb_internal void add_dependency_to_set(Checker *c, Entity *entity) {
 	}
 
 }
-gb_internal WORKER_TASK_PROC(add_dependency_to_set_worker) {
-	Checker *c = global_checker_ptr.load(std::memory_order_relaxed);
-	Entity *entity = cast(Entity *)data;
-	if (entity == nullptr) {
-		return 0;
-	}
-
+gb_internal bool min_dep_visit(Entity *entity) {
 	if (entity->type != nullptr &&
 	    is_type_polymorphic(entity->type)) {
 		DeclInfo *decl = decl_info_of_entity(entity);
 		if (decl != nullptr && decl->gen_proc_type == nullptr) {
-			return 0;
+			return false;
+		}
+	}
+	return entity->min_dep_count.fetch_add(1, std::memory_order_relaxed) == 0;
+}
+
+// NOTE(bill): a task walks from its own stack of entities, and hands half of it to a new task once it is large,
+// as with a task for each dependency, adding the tasks was most of the work
+enum { MIN_DEP_TASK_SPLIT = 256 };
+
+gb_internal WORKER_TASK_PROC(add_dependency_to_set_worker) {
+	Checker *c = global_checker_ptr.load(std::memory_order_relaxed);
+	Array<Entity *> *stack = cast(Array<Entity *> *)data;
+
+	while (stack->count > 0) {
+		Entity *entity = array_pop(stack);
+		if (entity == nullptr || !min_dep_visit(entity)) {
+			continue;
+		}
+		DeclInfo *decl = decl_info_of_entity(entity);
+		if (decl == nullptr) {
+			continue;
+		}
+		for (TypeInfoPair const tt : decl->type_info_deps) {
+			add_min_dep_type_info(c, tt.type);
+		}
+
+		FOR_PTR_SET(e, decl->deps) {
+			Entity *fl = nullptr;
+			switch (e->kind) {
+			case Entity_Procedure:
+				if (e->Procedure.is_foreign) {
+					fl = e->Procedure.foreign_library;
+				}
+				break;
+			case Entity_Variable:
+				if (e->Variable.is_foreign) {
+					fl = e->Variable.foreign_library;
+				}
+				break;
+			}
+			if (fl != nullptr) {
+				GB_ASSERT_MSG(fl->kind == Entity_LibraryName &&
+				              (fl->flags&EntityFlag_Used),
+				              "%.*s", LIT(entity->token.string));
+				array_add(stack, fl);
+			}
+		}
+
+		FOR_PTR_SET(e, decl->deps) {
+			if (e->min_dep_count.load(std::memory_order_relaxed) == 0) {
+				array_add(stack, e);
+			}
+		}
+
+		if (stack->count >= MIN_DEP_TASK_SPLIT) {
+			isize half = stack->count/2;
+			Array<Entity *> *other = gb_alloc_item(heap_allocator(), Array<Entity *>);
+			array_init(other, heap_allocator(), 0, MIN_DEP_TASK_SPLIT);
+			array_add_elems(other, stack->data, half);
+			gb_memmove(stack->data, stack->data + half, (stack->count - half)*gb_size_of(Entity *));
+			stack->count -= half;
+			thread_pool_add_task(add_dependency_to_set_worker, other);
 		}
 	}
 
-	if (entity->min_dep_count.fetch_add(1, std::memory_order_relaxed) > 0) {
-		return 0;
-	}
-
-	DeclInfo *decl = decl_info_of_entity(entity);
-	if (decl == nullptr) {
-		return 0;
-	}
-	for (TypeInfoPair const tt : decl->type_info_deps) {
-		add_min_dep_type_info(c, tt.type);
-	}
-
-	FOR_PTR_SET(e, decl->deps) {
-		switch (e->kind) {
-		case Entity_Procedure:
-			if (e->Procedure.is_foreign) {
-				Entity *fl = e->Procedure.foreign_library;
-				if (fl != nullptr) {
-					GB_ASSERT_MSG(fl->kind == Entity_LibraryName &&
-					              (fl->flags&EntityFlag_Used),
-					              "%.*s", LIT(entity->token.string));
-					add_dependency_to_set_threaded(c, fl);
-				}
-			}
-			break;
-		case Entity_Variable:
-			if (e->Variable.is_foreign) {
-				Entity *fl = e->Variable.foreign_library;
-				if (fl != nullptr) {
-					GB_ASSERT_MSG(fl->kind == Entity_LibraryName &&
-					              (fl->flags&EntityFlag_Used),
-					              "%.*s", LIT(entity->token.string));
-					add_dependency_to_set_threaded(c, fl);
-				}
-			}
-			break;
-		}
-	}
-
-	FOR_PTR_SET(e, decl->deps) {
-		add_dependency_to_set_threaded(c, e);
-	}
-
+	array_free(stack);
+	gb_free(heap_allocator(), stack);
 	return 0;
 }
 
 
 gb_internal void add_dependency_to_set_threaded(Checker *c, Entity *entity) {
-	if (entity == nullptr) {
+	if (entity == nullptr || entity->min_dep_count.load(std::memory_order_relaxed) > 0) {
 		return;
 	}
-	thread_pool_add_task(add_dependency_to_set_worker, entity);
+	Array<Entity *> *stack = gb_alloc_item(heap_allocator(), Array<Entity *>);
+	array_init(stack, heap_allocator(), 0, 64);
+	array_add(stack, entity);
+	thread_pool_add_task(add_dependency_to_set_worker, stack);
 }
 
 
@@ -3036,26 +3051,43 @@ gb_internal void collect_testing_procedures_of_package(Checker *c, AstPackage *p
 	}
 }
 
+gb_internal WORKER_TASK_PROC(add_definitions_to_set_worker) {
+	Checker *c = global_checker_ptr.load(std::memory_order_relaxed);
+	Scope *builtin_scope = builtin_pkg->scope;
+	for (Entity *e : *cast(Slice<Entity *> *)data) {
+		if (e->scope == builtin_scope) {
+			if (e->type == nullptr) {
+				add_dependency_to_set_threaded(c, e);
+			}
+		} else if (e->kind == Entity_Procedure) {
+			if (e->Procedure.is_export) {
+				add_dependency_to_set_threaded(c, e);
+			}
+		} else if (e->kind == Entity_Variable) {
+			if (e->Variable.is_export) {
+				add_dependency_to_set_threaded(c, e);
+			}
+		}
+	}
+	return 0;
+}
+
 gb_internal void generate_minimum_dependency_set_internal(Checker *c, Entity *start) {
 	// auto const &add_to_set = add_dependency_to_set;
 	auto const &add_to_set = add_dependency_to_set_threaded;
 
-	Scope *builtin_scope = builtin_pkg->scope;
-	for_array(i, c->info.definitions) {
-		Entity *e = c->info.definitions[i];
-		if (e->scope == builtin_scope) {
-			if (e->type == nullptr) {
-				add_to_set(c, e);
-			}
-		} else if (e->kind == Entity_Procedure) {
-			if (e->Procedure.is_export) {
-				add_to_set(c, e);
-			}
-		} else if (e->kind == Entity_Variable) {
-			if (e->Variable.is_export) {
-				add_to_set(c, e);
-			}
+	{
+		// NOTE(bill): in parallel, as nearly all definitions are of locals, which add nothing
+		isize const CHUNK_SIZE = 4096;
+		auto chunks = array_make<Slice<Entity *> >(heap_allocator(), 0, c->info.definitions.count/CHUNK_SIZE + 1);
+		defer (array_free(&chunks));
+		for (isize i = 0; i < c->info.definitions.count; i += CHUNK_SIZE) {
+			array_add(&chunks, slice(slice_from_array(c->info.definitions), i, gb_min(i + CHUNK_SIZE, c->info.definitions.count)));
 		}
+		for (Slice<Entity *> &chunk : chunks) {
+			thread_pool_add_task(add_definitions_to_set_worker, &chunk);
+		}
+		thread_pool_wait();
 	}
 
 	for (Entity *e; mpsc_dequeue(&c->info.required_foreign_imports_through_force_queue, &e); /**/) {
@@ -6714,7 +6746,7 @@ gb_internal void add_untyped_expressions(CheckerInfo *cinfo, UntypedExprInfoMap
 		Ast *expr = entry.key;
 		ExprInfo *info = entry.value;
 		if (expr != nullptr && info != nullptr) {
-			mpsc_enqueue(&cinfo->checker->global_untyped_queue, UntypedExprInfo{expr, info});
+			per_thread_array_add(&cinfo->checker->global_untyped_queue, UntypedExprInfo{expr, info});
 		}
 	}
 	map_clear(untyped);
@@ -7323,19 +7355,11 @@ gb_internal bool check_unique_package_names(Checker *c) {
 }
 
 gb_internal void check_add_entities_from_queues(Checker *c) {
-	isize cap = c->info.entities.count + c->info.entity_queue.count.load(std::memory_order_relaxed);
-	array_reserve(&c->info.entities, cap);
-	for (Entity *e; mpsc_dequeue(&c->info.entity_queue, &e); /**/) {
-		array_add(&c->info.entities, e);
-	}
+	per_thread_array_gather(&c->info.entity_queue, &c->info.entities);
 }
 
 gb_internal void check_add_definitions_from_queues(Checker *c) {
-	isize cap = c->info.definitions.count + c->info.definition_queue.count.load(std::memory_order_relaxed);
-	array_reserve(&c->info.definitions, cap);
-	for (Entity *e; mpsc_dequeue(&c->info.definition_queue, &e); /**/) {
-		array_add(&c->info.definitions, e);
-	}
+	per_thread_array_gather(&c->info.definition_queue, &c->info.definitions);
 }
 
 gb_internal void check_merge_queues_into_arrays(Checker *c) {
@@ -7718,8 +7742,8 @@ gb_internal void check_parsed_files(Checker *c) {
 
 	TIME_SECTION("sanity checks");
 	check_merge_queues_into_arrays(c);
-	GB_ASSERT(c->info.entity_queue.count.load(std::memory_order_relaxed) == 0);
-	GB_ASSERT(c->info.definition_queue.count.load(std::memory_order_relaxed) == 0);
+	GB_ASSERT(per_thread_array_count(&c->info.entity_queue) == 0);
+	GB_ASSERT(per_thread_array_count(&c->info.definition_queue) == 0);
 
 	TIME_SECTION("check instrumentation calls");
 	{
@@ -7733,7 +7757,10 @@ gb_internal void check_parsed_files(Checker *c) {
 
 
 	TIME_SECTION("add untyped expression values");
-	for (UntypedExprInfo u = {}; mpsc_dequeue(&c->global_untyped_queue, &u); /**/) {
+	auto untyped = array_make<UntypedExprInfo>(heap_allocator());
+	defer (array_free(&untyped));
+	per_thread_array_gather(&c->global_untyped_queue, &untyped);
+	for (UntypedExprInfo const &u : untyped) {
 		GB_ASSERT(u.expr != nullptr && u.info != nullptr);
 		if (is_type_typed(u.info->type)) {
 			compiler_error("%s (type %s) is typed!", expr_to_string(u.expr), type_to_string(u.info->type));
diff --git a/src/checker.hpp b/src/checker.hpp
index 52d43ad81..2bcf4fcec 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -793,8 +793,9 @@ struct CheckerInfo {
 
 	BlockingMutex entry_point_mutex;
 
-	MPSCQueue<Entity *> definition_queue;
-	MPSCQueue<Entity *> entity_queue;
+	PerThreadArray<Entity *> definition_queue;
+	PerThreadArray<Entity *> entity_queue;
+	std::atomic<u64>         entities_without_file; // for their `order_in_src`
 	MPSCQueue<Entity *> required_global_variable_queue;
 	MPSCQueue<Entity *> required_foreign_imports_through_force_queue;
 	MPSCQueue<Entity *> foreign_imports_to_check_fullpaths;
@@ -905,7 +906,7 @@ struct Checker {
 	Array<DeclInfo *> nested_proc_lits;
 
 
-	MPSCQueue<UntypedExprInfo> global_untyped_queue;
+	PerThreadArray<UntypedExprInfo> global_untyped_queue;
 	MPSCQueue<Type *> soa_types_to_complete;
 };
 
diff --git a/src/thread_pool.cpp b/src/thread_pool.cpp
index 0f1e59c93..3509c9fc4 100644
--- a/src/thread_pool.cpp
+++ b/src/thread_pool.cpp
@@ -327,3 +327,56 @@ gb_internal THREAD_PROC(thread_pool_thread_proc) {
 	return 0;
 }
 
+
+template <typename T>
+struct alignas(2*GB_CACHE_LINE_SIZE) PerThreadArraySlot {
+	Array<T> array;
+	u8       padding[2*GB_CACHE_LINE_SIZE - gb_size_of(Array<T>)];
+};
+
+template <typename T>
+struct PerThreadArray {
+	Slice<PerThreadArraySlot<T> > slots;
+};
+
+template <typename T>
+gb_internal void per_thread_array_init(PerThreadArray<T> *a, isize thread_count) {
+	isize align = gb_align_of(PerThreadArraySlot<T>);
+	a->slots = slice_make_aligned<PerThreadArraySlot<T> >(permanent_allocator(), thread_count, align);
+	GB_ASSERT((cast(uintptr)a->slots.data & (align - 1)) == 0);
+	for (PerThreadArraySlot<T> &slot : a->slots) {
+		array_init(&slot.array, heap_allocator());
+	}
+}
+
+template <typename T>
+gb_internal void per_thread_array_destroy(PerThreadArray<T> *a) {
+	for (PerThreadArraySlot<T> &slot : a->slots) {
+		array_free(&slot.array);
+	}
+}
+
+template <typename T>
+gb_internal void per_thread_array_add(PerThreadArray<T> *a, T const &value) {
+	isize index = current_thread_index();
+	GB_ASSERT(0 <= index && index < a->slots.count);
+	array_add(&a->slots[index].array, value);
+}
+
+template <typename T>
+gb_internal isize per_thread_array_count(PerThreadArray<T> *a) {
+	isize count = 0;
+	for (PerThreadArraySlot<T> &slot : a->slots) {
+		count += slot.array.count;
+	}
+	return count;
+}
+
+template <typename T>
+gb_internal void per_thread_array_gather(PerThreadArray<T> *a, Array<T> *dst) {
+	array_reserve(dst, dst->count + per_thread_array_count(a));
+	for (PerThreadArraySlot<T> &slot : a->slots) {
+		array_add_elems(dst, slot.array.data, slot.array.count);
+		array_clear(&slot.array);
+	}
+}

From 14950b8ae9fef5aa990e90969525c94401db3089 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 12:55:09 +0100
Subject: [PATCH 138/215] Park nested procedures on their parent until its body
 is checked instead of re-queuing; per-entry #load caches and parallel
 #load_directory reads; don't merge dependencies into package-level
 declarations; separate the thread pool's contended fields onto their own
 cache lines

---
 src/check_builtin.cpp | 243 ++++++++++++++++++++++++------------------
 src/check_decl.cpp    |   2 +-
 src/checker.cpp       |  26 ++++-
 src/checker.hpp       |   9 +-
 src/thread_pool.cpp   |   9 +-
 src/threading.cpp     |  10 +-
 6 files changed, 181 insertions(+), 118 deletions(-)

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 6777ca8b1..701de7a67 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -2029,7 +2029,61 @@ gb_internal bool check_builtin_simd_operation(CheckerContext *c, Operand *operan
 	return false;
 }
 
-gb_internal bool cache_load_file_directive(CheckerContext *c, Ast *call, String const &original_string, bool err_on_not_found, LoadFileCache **cache_, LoadFileTier tier, bool use_mutex=true) {
+// NOTE(bill, 2026-10-02) The cache entry of `path` loaded to at least `tier`.
+// The map is only locked to find or add the entry, and the file is loaded under the entry's own mutex, so different files load at once.
+gb_internal LoadFileCache *load_file_cache_entry(CheckerInfo *info, String const &path, LoadFileTier tier) {
+	LoadFileCache *cache = nullptr;
+	mutex_lock(&info->load_file_mutex);
+	LoadFileCache **cache_ptr = string_map_get(&info->load_file_cache, path);
+	if (cache_ptr != nullptr) {
+		cache = *cache_ptr;
+	} else {
+		cache = permanent_alloc_item<LoadFileCache>();
+		cache->path = path;
+		string_map_init(&cache->hashes, 32);
+		string_map_set(&info->load_file_cache, path, cache);
+	}
+	mutex_unlock(&info->load_file_mutex);
+
+	MUTEX_GUARD(&cache->mutex);
+	if (tier > cache->tier) {
+		cache->tier = tier;
+
+		TEMPORARY_ALLOCATOR_GUARD();
+		char *c_str = alloc_cstring(temporary_allocator(), path);
+
+		gbFile f = {};
+		cache->file_error = gb_file_open(&f, c_str);
+		defer (gb_file_close(&f));
+
+		if (cache->file_error == gbFileError_None) {
+			cache->exists = true;
+
+			switch(tier) {
+			case LoadFileTier_Exists:
+				// Nothing to do.
+				break;
+			case LoadFileTier_Contents: {
+				isize file_size = cast(isize)gb_file_size(&f);
+				if (file_size > 0) {
+					u8 *ptr = permanent_alloc_array<u8>(file_size+1);
+					gb_file_read_at(&f, ptr, file_size, 0);
+					ptr[file_size] = '\0';
+					cache->data.text = ptr;
+					cache->data.len = file_size;
+				}
+				break;
+			}
+			default:
+				GB_PANIC("Unhandled LoadFileTier");
+				break;
+			};
+		}
+	}
+	return cache;
+}
+
+gb_internal bool cache_load_file_directive(CheckerContext *c, Ast *call, String const &original_string, bool err_on_not_found, LoadFileCache **cache_, LoadFileTier tier) {
 	ast_node(ce, CallExpr, call);
 	ast_node(bd, BasicDirective, ce->proc);
 	String builtin_name = bd->name.string;
@@ -2051,75 +2105,12 @@ gb_internal bool cache_load_file_directive(CheckerContext *c, Ast *call, String
 		}
 	}
 
-	if (use_mutex) mutex_lock(&c->info->load_file_mutex);
-	defer (if (use_mutex) mutex_unlock(&c->info->load_file_mutex));
+	LoadFileCache *cache = load_file_cache_entry(c->info, path, tier);
+	if (cache_) *cache_ = cache;
 
-	gbFileError file_error = gbFileError_None;
-	String data = {};
-	bool exists = false;
-	LoadFileTier cache_tier = LoadFileTier_Invalid;
-
-	LoadFileCache **cache_ptr = string_map_get(&c->info->load_file_cache, path);
-	LoadFileCache *cache = cache_ptr ? *cache_ptr : nullptr;
-	if (cache) {
-		file_error = cache->file_error;
-		data = cache->data;
-		exists = cache->exists;
-		cache_tier = cache->tier;
-	}
-	defer ({
-		if (cache == nullptr) {
-			LoadFileCache *new_cache = permanent_alloc_item<LoadFileCache>();
-			new_cache->path = path;
-			new_cache->data = data;
-			new_cache->file_error = file_error;
-			new_cache->exists = exists;
-			new_cache->tier = cache_tier;
-			string_map_init(&new_cache->hashes, 32);
-			string_map_set(&c->info->load_file_cache, path, new_cache);
-			if (cache_) *cache_ = new_cache;
-		} else {
-			cache->data = data;
-			cache->file_error = file_error;
-			cache->exists = exists;
-			cache->tier = cache_tier;
-			if (cache_) *cache_ = cache;
-		}
-	});
-
-	if (tier > cache_tier) {
-		cache_tier = tier;
-
-		TEMPORARY_ALLOCATOR_GUARD();
-		char *c_str = alloc_cstring(temporary_allocator(), path);
-
-		gbFile f = {};
-		file_error = gb_file_open(&f, c_str);
-		defer (gb_file_close(&f));
-
-		if (file_error == gbFileError_None) {
-			exists = true;
-
-			switch(tier) {
-			case LoadFileTier_Exists:
-				// Nothing to do.
-				break;
-			case LoadFileTier_Contents: {
-				isize file_size = cast(isize)gb_file_size(&f);
-				if (file_size > 0) {
-					u8 *ptr = permanent_alloc_array<u8>(file_size+1);
-					gb_file_read_at(&f, ptr, file_size, 0);
-					ptr[file_size] = '\0';
-					data.text = ptr;
-					data.len = file_size;
-				}
-				break;
-			}
-			default:
-				GB_PANIC("Unhandled LoadFileTier");
-			};
-		}
-	}
+	mutex_lock(&cache->mutex);
+	gbFileError file_error = cache->file_error;
+	mutex_unlock(&cache->mutex);
 
 	switch (file_error) {
 	default:
@@ -2253,6 +2244,62 @@ gb_internal int file_cache_sort_cmp(void const *x, void const *y) {
 	return string_compare(a->path, b->path);
 }
 
+// NOTE(bill): a directory may hold thousands of files, which are read one at a time otherwise.
+// This thread and a few helper tasks take them in turn and this thread only waits for the ones a running helper has taken,
+// and the job is freed by whichever of them finishes with it last.
+struct LoadDirectoryPrefetch {
+	CheckerInfo *      info;
+	Array<String>      paths;
+	std::atomic<isize> next;
+	std::atomic<isize> done;
+	std::atomic<i32>   refs;
+};
+
+gb_internal void load_directory_prefetch_run(LoadDirectoryPrefetch *job) {
+	for (isize i = job->next.fetch_add(1); i < job->paths.count; i = job->next.fetch_add(1)) {
+		load_file_cache_entry(job->info, job->paths[i], LoadFileTier_Contents);
+		job->done.fetch_add(1);
+	}
+	if (job->refs.fetch_sub(1) == 1) {
+		array_free(&job->paths);
+		gb_free(heap_allocator(), job);
+	}
+}
+
+gb_internal WORKER_TASK_PROC(load_directory_prefetch_worker) {
+	load_directory_prefetch_run(cast(LoadDirectoryPrefetch *)data);
+	return 0;
+}
+
+gb_internal void load_directory_prefetch(CheckerInfo *info, Array<FileInfo> const &list) {
+	isize const FILES_PER_HELPER = 64;
+
+	LoadDirectoryPrefetch *job = gb_alloc_item(heap_allocator(), LoadDirectoryPrefetch);
+	job->info = info;
+	array_init(&job->paths, heap_allocator(), 0, list.count);
+	for (FileInfo const &fi : list) {
+		if (!fi.is_dir) {
+			array_add(&job->paths, fi.fullpath);
+		}
+	}
+	isize count = job->paths.count;
+	isize helpers = gb_min(global_thread_pool.threads.count - 1, count/FILES_PER_HELPER);
+	job->refs.store(cast(i32)(helpers + 1));
+	for (isize i = 0; i < helpers; i++) {
+		thread_pool_add_task(load_directory_prefetch_worker, job);
+	}
+
+	job->refs.fetch_add(1); // NOTE(bill): kept until every file is done
+	load_directory_prefetch_run(job);
+	while (job->done.load() < count) {
+		yield_thread();
+	}
+	if (job->refs.fetch_sub(1) == 1) {
+		array_free(&job->paths);
+		gb_free(heap_allocator(), job);
+	}
+}
+
 gb_internal LoadDirectiveResult check_load_directory_directive(CheckerContext *c, Operand *operand, Ast *call, Type *type_hint, bool err_on_not_found) {
 	ast_node(ce, CallExpr, call);
 	ast_node(bd, BasicDirective, ce->proc);
@@ -2301,39 +2348,26 @@ gb_internal LoadDirectiveResult check_load_directory_directive(CheckerContext *c
 		bool ok = determine_path_from_string(ignore_mutex, call, base_dir, original_string, &path);
 		gb_unused(ok);
 	}
-	MUTEX_GUARD(&c->info->load_directory_mutex);
-
-
-	gbFileError file_error = gbFileError_None;
-
-	Array<LoadFileCache *> file_caches = {};
-
+	// NOTE(bill): the map is only locked to find or add the directory's entry which is loaded under its own mutex
+	LoadDirectoryCache *cache = nullptr;
+	mutex_lock(&c->info->load_directory_mutex);
 	LoadDirectoryCache **cache_ptr = string_map_get(&c->info->load_directory_cache, path);
-	LoadDirectoryCache *cache = cache_ptr ? *cache_ptr : nullptr;
-	if (cache) {
-		file_error = cache->file_error;
+	if (cache_ptr != nullptr) {
+		cache = *cache_ptr;
+	} else {
+		cache = permanent_alloc_item<LoadDirectoryCache>();
+		cache->path = path;
+		string_map_set(&c->info->load_directory_cache, path, cache);
 	}
-	defer ({
-		if (cache == nullptr) {
-			LoadDirectoryCache *new_cache = permanent_alloc_item<LoadDirectoryCache>();
-			new_cache->path = path;
-			new_cache->files = file_caches;
-			new_cache->file_error = file_error;
-			string_map_set(&c->info->load_directory_cache, path, new_cache);
-
-			map_set(&c->info->load_directory_map, call, new_cache);
-		} else {
-			cache->file_error = file_error;
-
-			map_set(&c->info->load_directory_map, call, cache);
-		}
-	});
+	map_set(&c->info->load_directory_map, call, cache);
+	mutex_unlock(&c->info->load_directory_mutex);
 
+	MUTEX_GUARD(&cache->mutex);
 
 	LoadDirectiveResult result = LoadDirective_Success;
 
-
-	if (cache == nullptr)  {
+	if (!cache->loaded)  {
+		cache->loaded = true;
 		Array<FileInfo> list = {};
 		ReadDirectoryError rd_err = read_directory(path, &list);
 		defer (array_free(&list));
@@ -2364,27 +2398,26 @@ gb_internal LoadDirectiveResult check_load_directory_directive(CheckerContext *c
 			return LoadDirective_Error;
 		}
 
+		load_directory_prefetch(c->info, list);
+
 		isize files_to_reserve = list.count+1; // always reserve 1
 
-		file_caches = array_make<LoadFileCache *>(heap_allocator(), 0, files_to_reserve);
-
-		mutex_lock(&c->info->load_file_mutex);
-		defer (mutex_unlock(&c->info->load_file_mutex));
+		cache->files = array_make<LoadFileCache *>(heap_allocator(), 0, files_to_reserve);
 
 		for (FileInfo fi : list) {
-			LoadFileCache *cache = nullptr;
+			LoadFileCache *file_cache = nullptr;
 			if (fi.is_dir) {
 				continue;
 			}
 
-			if (cache_load_file_directive(c, call, fi.fullpath, err_on_not_found, &cache, LoadFileTier_Contents, /*use_mutex*/false)) {
-				array_add(&file_caches, cache);
+			if (cache_load_file_directive(c, call, fi.fullpath, err_on_not_found, &file_cache, LoadFileTier_Contents)) {
+				array_add(&cache->files, file_cache);
 			} else {
 				result = LoadDirective_Error;
 			}
 		}
 
-		array_sort(file_caches, file_cache_sort_cmp);
+		array_sort(cache->files, file_cache_sort_cmp);
 
 	}
 
@@ -2574,7 +2607,7 @@ gb_internal bool check_builtin_procedure_directive(CheckerContext *c, Operand *o
 
 		LoadFileCache *cache = nullptr;
 		if (cache_load_file_directive(c, call, original_string, true, &cache, LoadFileTier_Contents)) {
-			MUTEX_GUARD(&c->info->load_file_mutex);
+			MUTEX_GUARD(&cache->mutex);
 			// TODO(bill): make these procedures fast :P
 			u64 hash_value = 0;
 			u64 *hash_value_ptr = string_map_get(&cache->hashes, hash_kind);
diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index 008959936..2c225c61f 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -2321,7 +2321,7 @@ gb_internal void wait_for_entity(Entity *e) {
 gb_internal void add_deps_from_child_to_parent(DeclInfo *decl) {
 	if (decl && decl->parent) {
 		Scope *ps = decl->parent->scope;
-		if (ps->flags & (ScopeFlag_File & ScopeFlag_Pkg & ScopeFlag_Global)) {
+		if (ps->flags & (ScopeFlag_Pkg | ScopeFlag_Global)) {
 			return;
 		} else {
 			// NOTE(bill): Add the dependencies from the procedure literal (lambda)
diff --git a/src/checker.cpp b/src/checker.cpp
index cc8a3d18d..d9e5f208a 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -207,6 +207,7 @@ gb_internal void init_decl_info(DeclInfo *d, Scope *scope, DeclInfo *parent) {
 	ptr_set_init(&d->deps, 0);
 	type_set_init(&d->type_info_deps, 0);
 	d->labels.allocator = heap_allocator();
+	d->nested_to_check.allocator = heap_allocator();
 	d->variadic_reuses.allocator = heap_allocator();
 	d->variadic_reuse_max_bytes = 0;
 	d->variadic_reuse_max_align = 1;
@@ -6521,6 +6522,17 @@ gb_internal bool check_proc_info(Checker *c, ProcInfo *pi, UntypedExprInfoMap *u
 		}
 	}
 
+	// NOTE(bill): the nested procedures that waited for this body, see `check_proc_info_worker_proc`
+	mutex_lock(&pi->decl->next_mutex);
+	Array<ProcInfo *> nested = pi->decl->nested_to_check;
+	pi->decl->nested_to_check = {};
+	pi->decl->nested_to_check.allocator = heap_allocator();
+	mutex_unlock(&pi->decl->next_mutex);
+	for (ProcInfo *nested_pi : nested) {
+		thread_pool_add_task(check_proc_info_worker_proc, nested_pi);
+	}
+	array_free(&nested);
+
 	add_untyped_expressions(&c->info, ctx.untyped);
 
 	rw_mutex_shared_lock(&ctx.decl->deps_mutex);
@@ -6682,8 +6694,18 @@ gb_internal WORKER_TASK_PROC(check_proc_info_worker_proc) {
 		if (parent->kind == Entity_Procedure && (parent->flags & EntityFlag_ProcBodyChecked) == 0) {
 			Type *pt = base_type(parent->type);
 			if (!pt->Proc.is_polymorphic || pt->Proc.is_poly_specialized) {
-				thread_pool_add_task(check_proc_info_worker_proc, pi);
-				return 1;
+				// NOTE(bill): waits for the parent's body to be checked, which then adds it again,
+				// rather than adding itself again and again until then
+				DeclInfo *pd = pi->decl->parent;
+				mutex_lock(&pd->next_mutex);
+				bool waiting = (parent->flags & EntityFlag_ProcBodyChecked) == 0;
+				if (waiting) {
+					array_add(&pd->nested_to_check, pi);
+				}
+				mutex_unlock(&pd->next_mutex);
+				if (waiting) {
+					return 1;
+				}
 			}
 		}
 	}
diff --git a/src/checker.hpp b/src/checker.hpp
index 2bcf4fcec..57a3ae11b 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -207,10 +207,12 @@ struct VariadicReuseData {
 struct DeclInfo {
 	DeclInfo *    parent; // NOTE(bill): only used for procedure literals at the moment
 
-	BlockingMutex next_mutex;
+	BlockingMutex next_mutex; // also used for `nested_to_check`
 	DeclInfo *    next_child;
 	DeclInfo *    next_sibling;
 
+	Array<struct ProcInfo *> nested_to_check; // nested procedures to check once this body is checked
+
 	Scope *       scope;
 
 	std::atomic<Entity *> entity;
@@ -693,6 +695,8 @@ enum LoadFileTier {
 struct LoadFileCache {
 	LoadFileTier   tier;
 	bool           exists;
+
+	BlockingMutex  mutex; // for everything below
 	String         path;
 	gbFileError    file_error;
 	String         data;
@@ -706,6 +710,9 @@ struct LoadDirectoryFile {
 };
 
 struct LoadDirectoryCache {
+	bool                   loaded;
+
+	BlockingMutex          mutex; // for everything below
 	String                 path;
 	gbFileError            file_error;
 	Array<LoadFileCache *> files;
diff --git a/src/thread_pool.cpp b/src/thread_pool.cpp
index 3509c9fc4..7ab66a479 100644
--- a/src/thread_pool.cpp
+++ b/src/thread_pool.cpp
@@ -34,9 +34,10 @@ struct ThreadPool {
 	Slice<Thread>     threads;
 	std::atomic<bool> running;
 
-	Futex            tasks_available; // bumped to wake a sleeping worker
-	std::atomic<i32> sleeping;        // workers asleep on `tasks_available`, or about to be
-	Futex            tasks_left;
+	// NOTE: on separate cache lines, as every task changes `tasks_left`
+	alignas(2*GB_CACHE_LINE_SIZE) Futex            tasks_available; // bumped to wake a sleeping worker
+	                              std::atomic<i32> sleeping;        // workers asleep on `tasks_available`, or about to be
+	alignas(2*GB_CACHE_LINE_SIZE) Futex            tasks_left;
 };
 
 // NOTE(bill): how many times an idle worker looks for a task before sleeping, so one adding small tasks
@@ -49,7 +50,7 @@ gb_internal isize current_thread_index(void) {
 
 gb_internal void thread_pool_init(ThreadPool *pool, isize worker_count, char const *worker_name) {
 	pool->threads_allocator = permanent_allocator();
-	slice_init(&pool->threads, pool->threads_allocator, worker_count + 1);
+	pool->threads = slice_make_aligned<Thread>(pool->threads_allocator, worker_count + 1, gb_align_of(Thread));
 
 	// NOTE: this needs to be initialized before any thread starts
 	pool->running.store(true, std::memory_order_seq_cst);
diff --git a/src/threading.cpp b/src/threading.cpp
index 28882ea24..fe890583b 100644
--- a/src/threading.cpp
+++ b/src/threading.cpp
@@ -51,11 +51,11 @@ typedef struct TaskRingBuffer {
 	std::atomic<WorkerTask *> buffer;
 } TaskRingBuffer;
 
+// NOTE(bill, 2026-10-02): each on cache lines of its own as "thieves" take from `top` whilst the owner works at `bottom`
 typedef struct TaskQueue {
-	std::atomic<isize> top;
-	std::atomic<isize> bottom;
-
-	std::atomic<TaskRingBuffer *> ring;
+	alignas(2*GB_CACHE_LINE_SIZE) std::atomic<isize> top;
+	alignas(2*GB_CACHE_LINE_SIZE) std::atomic<isize> bottom;
+	alignas(2*GB_CACHE_LINE_SIZE) std::atomic<TaskRingBuffer *> ring;
 } TaskQueue;
 
 struct Thread {
@@ -74,7 +74,7 @@ struct Thread {
 	struct Arena *permanent_arena;
 	struct Arena *temporary_arena;
 
-	std::atomic<std::atomic<i32> *> waiting_futex;
+	alignas(2*GB_CACHE_LINE_SIZE) std::atomic<std::atomic<i32> *> waiting_futex;
 	std::atomic<i32>                waiting_value;
 	std::atomic<i32>                waiting_for;
 };

From 6bc4b69ab80f9451236362751a3213dcfb2e805a Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 13:03:48 +0100
Subject: [PATCH 139/215] Fix #7316: a polymorphic procedure in a constant
 compound literal is its instance, not nil

---
 src/check_expr.cpp                |  2 +-
 tests/issues/run.bat              |  1 +
 tests/issues/run.sh               |  1 +
 tests/issues/test_issue_7316.odin | 47 +++++++++++++++++++++++++++++++
 4 files changed, 50 insertions(+), 1 deletion(-)
 create mode 100644 tests/issues/test_issue_7316.odin

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 50b59f0c1..3556017ca 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -1006,7 +1006,7 @@ gb_internal i64 check_distance_between_types(CheckerContext *c, Operand *operand
 		PolyProcData poly_proc_data = {};
 		if (check_polymorphic_procedure_assignment(c, operand, type, operand->expr, &poly_proc_data)) {
 			Entity *e = poly_proc_data.gen_entity;
-			add_type_and_value(c, operand->expr, Addressing_Value, e->type, {});
+			add_type_and_value(c, operand->expr, Addressing_Value, e->type, exact_value_procedure(operand->expr));
 			Ast *expr = unparen_expr(operand->expr);
 			if (expr->kind == Ast_SelectorExpr) {
 				add_entity_use(c, expr->SelectorExpr.selector, e);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 28fee09f4..f54c28eaf 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -78,6 +78,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin run ..\test_issue_7482.odin %COMMON% || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local -o:speed || exit /b
+..\..\..\odin test ..\test_issue_7316.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7566.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 209d2923d..15d208d9a 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -101,6 +101,7 @@ $ODIN check ../test_issue_7012.odin -no-entry-point $COMMON_CHECK
 $ODIN build ../test_issue_7037.odin $COMMON -o:none
 $ODIN run ../test_issue_7482.odin $COMMON
 $ODIN run ../test_issue_7564.odin $COMMON
+$ODIN test ../test_issue_7316.odin $COMMON
 $ODIN test ../test_issue_7566.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
diff --git a/tests/issues/test_issue_7316.odin b/tests/issues/test_issue_7316.odin
new file mode 100644
index 000000000..7f0edd503
--- /dev/null
+++ b/tests/issues/test_issue_7316.odin
@@ -0,0 +1,47 @@
+// Tests issue #7316 https://github.com/odin-lang/Odin/issues/7316
+// A polymorphic procedure in a constant compound literal is its instance, not nil
+package test_issues
+
+import "core:testing"
+
+Foo :: struct($N: int) {
+	data:   [N]u8,
+	number: int,
+	update: proc(f: ^Foo(N), delta: int),
+	get:    proc(f: Foo(N)) -> int,
+}
+
+foo_update :: proc(f: ^Foo($N), delta: int) { f.number += delta }
+foo_get    :: proc(f: Foo($N)) -> int { return f.number }
+
+foo_init :: proc(f: ^Foo($N)) {
+	f^ = {
+		number = 333,
+		update = foo_update,
+		get    = foo_get,
+	}
+}
+
+identity :: proc(x: $T) -> T { return x }
+
+global_foo   := Foo(4){number = 1, update = foo_update, get = foo_get}
+global_procs := [2]proc(int) -> int{identity, identity}
+
+@(test)
+test_issue_7316 :: proc(t: ^testing.T) {
+	f: Foo(10)
+	foo_init(&f)
+	testing.expect(t, f.update != nil)
+	testing.expect(t, f.get != nil)
+	f.update(&f, 5)
+	testing.expect_value(t, f.get(f), 338)
+
+	g := Foo(10){number = 1, update = foo_update}
+	testing.expect(t, g.update != nil)
+
+	procs := [2]proc(int) -> int{identity, identity}
+	testing.expect_value(t, procs[1](7), 7)
+
+	testing.expect(t, global_foo.update != nil)
+	testing.expect_value(t, global_procs[0](9), 9)
+}

From 0915bdcb9282e168e07c1cf5f7fa7188de83005e Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 13:37:32 +0100
Subject: [PATCH 140/215] Reject procedure group candidates whose `$T/S`
 parameters cannot take the operands before checking their signatures; compare
 polymorphic instances by an identity hash before `are_types_identical`

---
 src/check_expr.cpp | 170 +++++++++++++++++++++++++++++++++++++++++++--
 src/checker.hpp    |   1 +
 2 files changed, 167 insertions(+), 4 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 3556017ca..535325cb0 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -389,6 +389,149 @@ gb_internal void check_scope_decls(CheckerContext *c, Slice<Ast *> const &nodes,
 	}
 }
 
+gb_internal bool poly_specialization_shape_mismatch(Type *s, Type *o, isize depth) {
+	if (s == nullptr || o == nullptr || depth > 8) {
+		return false;
+	}
+	if (s->kind == Type_Generic) {
+		if (s->Generic.specialized == nullptr) {
+			return false;
+		}
+		s = s->Generic.specialized;
+	}
+	Type *bs = base_type(s);
+	Type *bo = base_type(o);
+	if (bs == nullptr || bo == nullptr || bs->kind == Type_Generic || bo->kind == Type_Generic) {
+		return false;
+	}
+	if (bs->kind != bo->kind) {
+		return true;
+	}
+	switch (bs->kind) {
+	case Type_Pointer:                    return poly_specialization_shape_mismatch(bs->Pointer.elem,                   bo->Pointer.elem,                   depth+1);
+	case Type_MultiPointer:               return poly_specialization_shape_mismatch(bs->MultiPointer.elem,              bo->MultiPointer.elem,              depth+1);
+	case Type_Slice:                      return poly_specialization_shape_mismatch(bs->Slice.elem,                     bo->Slice.elem,                     depth+1);
+	case Type_DynamicArray:               return poly_specialization_shape_mismatch(bs->DynamicArray.elem,              bo->DynamicArray.elem,              depth+1);
+	case Type_Array:                      return poly_specialization_shape_mismatch(bs->Array.elem,                     bo->Array.elem,                     depth+1);
+	case Type_FixedCapacityDynamicArray:  return poly_specialization_shape_mismatch(bs->FixedCapacityDynamicArray.elem, bo->FixedCapacityDynamicArray.elem, depth+1);
+	case Type_Map:
+		return poly_specialization_shape_mismatch(bs->Map.key,   bo->Map.key,   depth+1) ||
+		       poly_specialization_shape_mismatch(bs->Map.value, bo->Map.value, depth+1);
+	case Type_Struct:
+		return bs->Struct.soa_kind != bo->Struct.soa_kind;
+	}
+	return false;
+}
+
+gb_internal bool poly_candidate_cannot_match(TypeProc *pt, Array<Operand> const &operands) {
+	if (pt->params == nullptr) {
+		return false;
+	}
+	auto const &params = pt->params->Tuple.variables;
+	for (isize i = 0; i < params.count && i < operands.count; i++) {
+		if (pt->variadic && i == pt->variadic_index) {
+			continue;
+		}
+		Entity *param = params[i];
+		Operand const &o = operands[i];
+		if (param == nullptr || o.type == nullptr || o.deferred_untyped_arg || is_type_untyped(o.type)) {
+			continue;
+		}
+
+		Type *t = param->type;
+		Type *ot = o.type;
+		if (param->kind == Entity_TypeName) {
+			if (o.mode != Addressing_Type) {
+				continue;
+			}
+		} else if (param->kind == Entity_Variable) {
+			if (o.mode != Addressing_Value && o.mode != Addressing_Variable && o.mode != Addressing_Constant) {
+				continue;
+			}
+			if (t != nullptr && t->kind == Type_Pointer) {
+				Type *bot = base_type(ot);
+				if (bot == nullptr || bot->kind != Type_Pointer) {
+					continue;
+				}
+				t  = t->Pointer.elem;
+				ot = bot->Pointer.elem;
+			}
+		} else {
+			continue;
+		}
+		if (t != nullptr && t->kind == Type_Generic && t->Generic.specialized != nullptr &&
+		    poly_specialization_shape_mismatch(t, ot, 0)) {
+			return true;
+		}
+	}
+	return false;
+}
+
+gb_internal u64 type_identity_hash(Type *t, isize depth) {
+	if (t == nullptr) {
+		return 0;
+	}
+	if (t->kind == Type_Named && t->Named.type_name != nullptr && t->Named.type_name->TypeName.is_type_alias) {
+		return type_identity_hash(t->Named.base, depth);
+	}
+	u64 h = (cast(u64)t->kind + 1) * 0x9e3779b97f4a7c15ull;
+	auto mix = [&](u64 x) {
+		h ^= x + 0x9e3779b97f4a7c15ull + (h << 6) + (h >> 2);
+	};
+	if (depth > 8) {
+		return h;
+	}
+	switch (t->kind) {
+	case Type_Named: mix(cast(u64)cast(uintptr)t->Named.type_name); break;
+	case Type_Basic: mix(cast(u64)t->Basic.kind);                   break;
+
+	case Type_Pointer:                   mix(type_identity_hash(t->Pointer.elem,                   depth+1)); break;
+	case Type_MultiPointer:              mix(type_identity_hash(t->MultiPointer.elem,              depth+1)); break;
+	case Type_SoaPointer:                mix(type_identity_hash(t->SoaPointer.elem,                depth+1)); break;
+	case Type_Slice:                     mix(type_identity_hash(t->Slice.elem,                     depth+1)); break;
+	case Type_DynamicArray:              mix(type_identity_hash(t->DynamicArray.elem,              depth+1)); break;
+	case Type_FixedCapacityDynamicArray: mix(type_identity_hash(t->FixedCapacityDynamicArray.elem, depth+1)); break;
+	case Type_EnumeratedArray:           mix(type_identity_hash(t->EnumeratedArray.elem,           depth+1)); break;
+	case Type_Matrix:                    mix(type_identity_hash(t->Matrix.elem,                    depth+1)); break;
+
+	case Type_Array:
+		mix(cast(u64)t->Array.count);
+		mix(type_identity_hash(t->Array.elem, depth+1));
+		break;
+
+	case Type_Map:
+		mix(type_identity_hash(t->Map.key,   depth+1));
+		mix(type_identity_hash(t->Map.value, depth+1));
+		break;
+	}
+	return h;
+}
+
+gb_internal u64 tuple_identity_hash(Type *t) {
+	u64 h = 0x84222325cbf29ce4ull;
+	if (t != nullptr && t->kind == Type_Tuple) {
+		h ^= cast(u64)t->Tuple.variables.count * 31 + cast(u64)t->Tuple.is_packed;
+		for (Entity *e : t->Tuple.variables) {
+			h = (h ^ (cast(u64)e->kind * 0x100000001b3ull)) * 0x100000001b3ull;
+			h ^= type_identity_hash(e->type, 0) + 0x9e3779b97f4a7c15ull + (h << 6) + (h >> 2);
+		}
+	}
+	return h;
+}
+
+gb_internal u64 proc_type_identity_hash(Type *t) {
+	t = base_type(t);
+	GB_ASSERT(t->kind == Type_Proc);
+	u64 h = cast(u64)t->Proc.calling_convention;
+	h = h*31 + cast(u64)t->Proc.c_vararg;
+	h = h*31 + cast(u64)t->Proc.variadic;
+	h = h*31 + cast(u64)t->Proc.diverging;
+	h = h*31 + cast(u64)t->Proc.optional_ok;
+	h ^= tuple_identity_hash(t->Proc.params)  + 0x9e3779b97f4a7c15ull + (h << 6) + (h >> 2);
+	h ^= tuple_identity_hash(t->Proc.results) + 0x9e3779b97f4a7c15ull + (h << 6) + (h >> 2);
+	return h;
+}
+
 // Reuse an existing generated specialization `other`, scheduling its body if unchecked.
 // Caller must have released gen_procs->mutex first.
 gb_internal bool reuse_gen_polymorphic_procedure(Checker *checker, Entity *other, Ast *poly_def_node, PolyProcData *poly_proc_data) {
@@ -475,6 +618,11 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	}
 
 
+	// NOTE(bill): only whilst trying a procedure group's candidates as their errors are not reported
+	if (param_operands != nullptr && old_c->no_polymorphic_errors && poly_candidate_cannot_match(&src->Proc, *param_operands)) {
+		return false;
+	}
+
 	DeclInfo *old_decl = decl_info_of_entity(base_entity);
 	if (old_decl == nullptr) {
 		return false;
@@ -534,7 +682,12 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 
 		mutex_unlock(&base_entity->Procedure.gen_procs_mutex); // @entity-mutex
 
-		for (Entity *other : gen_procs->procs) {
+		u64 hash = proc_type_identity_hash(final_proc_type);
+		for_array(i, gen_procs->procs) {
+			if (gen_procs->hashes[i] != hash) {
+				continue;
+			}
+			Entity *other = gen_procs->procs[i];
 			Type *pt = base_type(other->type);
 			if (are_types_identical(pt, final_proc_type)) {
 				rw_mutex_shared_unlock(&gen_procs->mutex); // @local-mutex
@@ -550,6 +703,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	} else {
 		gen_procs = permanent_alloc_item<GenProcsData>();
 		gen_procs->procs.allocator = heap_allocator();
+		gen_procs->hashes.allocator = heap_allocator();
 		base_entity->Procedure.gen_procs = gen_procs;
 		mutex_unlock(&base_entity->Procedure.gen_procs_mutex); // @entity-mutex
 	}
@@ -573,8 +727,13 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 			return false;
 		}
 
+		u64 hash = proc_type_identity_hash(final_proc_type);
 		rw_mutex_shared_lock(&gen_procs->mutex); // @local-mutex
-		for (Entity *other : gen_procs->procs) {
+		for_array(i, gen_procs->procs) {
+			if (gen_procs->hashes[i] != hash) {
+				continue;
+			}
+			Entity *other = gen_procs->procs[i];
 			Type *pt = base_type(other->type);
 			if (are_types_identical(pt, final_proc_type)) {
 				rw_mutex_shared_unlock(&gen_procs->mutex); // @local-mutex
@@ -587,9 +746,11 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 
 	// Re-check under the exclusive lock (the lookups above ran under a released shared lock) and
 	// hold it across construction + array_add so find-then-publish is atomic. (@local-mutex)
+	u64 final_hash = proc_type_identity_hash(final_proc_type);
 	rw_mutex_lock(&gen_procs->mutex); // @local-mutex
-	for (Entity *other : gen_procs->procs) {
-		if (are_types_identical(base_type(other->type), final_proc_type)) {
+	for_array(i, gen_procs->procs) {
+		Entity *other = gen_procs->procs[i];
+		if (gen_procs->hashes[i] == final_hash && are_types_identical(base_type(other->type), final_proc_type)) {
 			rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
 			return reuse_gen_polymorphic_procedure(nctx.checker, other, poly_def_node, poly_proc_data);
 		}
@@ -659,6 +820,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	AstFile *file = base_entity->file;
 
 	array_add(&gen_procs->procs, entity);
+	array_add(&gen_procs->hashes, proc_type_identity_hash(final_proc_type));
 	rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
 
 	ProcInfo *proc_info = permanent_alloc_item<ProcInfo>();
diff --git a/src/checker.hpp b/src/checker.hpp
index 57a3ae11b..300395fb2 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -721,6 +721,7 @@ struct LoadDirectoryCache {
 
 struct GenProcsData {
 	Array<Entity *> procs;
+	Array<u64>      hashes; // `proc_type_identity_hash` of each of `procs`
 	RwMutex         mutex;
 };
 

From 4a3a7a92cbfcdcfd33826fd4a2e9e593b48e77f2 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Fri, 2 Oct 2026 09:18:30 -0400
Subject: [PATCH 141/215] Fix the length of fixed capacity dynamic array
 literals whose elements can't be constant

---
 src/llvm_backend_expr.cpp         |  7 +++++--
 tests/issues/run.bat              |  1 +
 tests/issues/run.sh               |  1 +
 tests/issues/test_issue_7430.odin | 13 +++++++++++++
 4 files changed, 20 insertions(+), 2 deletions(-)
 create mode 100644 tests/issues/test_issue_7430.odin

diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index 0e90d8d74..cfa31344c 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -6458,13 +6458,16 @@ gb_internal lbAddr lb_build_addr_compound_lit(lbProcedure *p, Ast *expr) {
 
 	case Type_FixedCapacityDynamicArray: {
 		if (cl->elems.count > 0) {
-			lb_addr_store(p, v, lb_const_value(p->module, type, exact_value_compound(expr)));
+			// NOTE: the length isn't taken from the literal's constant, which is nil when its elements can't be constant
+			lbValue dst_ptr = lb_addr_get_ptr(p, v);
+			lbValue value = lb_const_value(p->module, type, exact_value_compound(expr));
+			lb_emit_store(p, lb_emit_struct_ep(p, dst_ptr, 0), lb_emit_struct_ev(p, value, 0));
+			lb_emit_store(p, lb_emit_struct_ep(p, dst_ptr, 1), lb_const_int(p->module, t_int, cl->max_count));
 
 			auto temp_data = array_make<lbCompoundLitElemTempData>(temporary_allocator(), 0, cl->elems.count);
 
 			lb_build_addr_compound_lit_populate(p, cl->elems, &temp_data, type);
 
-			lbValue dst_ptr = lb_addr_get_ptr(p, v);
 			for_array(i, temp_data) {
 				i32 index = cast(i32)(temp_data[i].elem_index);
 				temp_data[i].gep = lb_emit_array_epi(p, dst_ptr, index);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 5c92eb840..a276b04a7 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -59,6 +59,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin build ..\test_issue_7037.odin %COMMON% -o:none  || exit /b
 ..\..\..\odin test ..\test_issue_7421.odin %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_7421_tagged_duplicate.odin %COMMON% 2>&1 | find /c "Error: Duplicate case" | findstr /x "1" || exit /b
+..\..\..\odin test ..\test_issue_7430.odin %COMMON%  || exit /b
 ..\..\..\odin build ..\test_issue_7188.odin %COMMON%  || exit /b
 clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_sysv_abi.odin %COMMON%  || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 22b84524f..53c4aa855 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -112,6 +112,7 @@ else
 	exit 1
 fi
 $ODIN check ../test_issue_7429.odin $COMMON_CHECK
+$ODIN test ../test_issue_7430.odin $COMMON
 $ODIN test ../test_issue_7356.odin $COMMON
 $ODIN test ../test_issue_7336.odin $COMMON
 $ODIN build ../test_issue_7167.odin $COMMON
diff --git a/tests/issues/test_issue_7430.odin b/tests/issues/test_issue_7430.odin
new file mode 100644
index 000000000..edf248356
--- /dev/null
+++ b/tests/issues/test_issue_7430.odin
@@ -0,0 +1,13 @@
+// Tests issue #7430 https://github.com/odin-lang/Odin/issues/7430
+package test_issues
+
+import "core:testing"
+
+@(test)
+test_issue_7430 :: proc(t: ^testing.T) {
+	U :: union {T}
+	T :: struct {_: []i32}
+
+	u := [dynamic; 4]U{T{}}
+	testing.expect_value(t, len(u), 1)
+}

From 56e7efb1d4ebf33a74ccbb242fdd3d172f7e494e Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 14:36:03 +0100
Subject: [PATCH 142/215] Adjust doc comments that misrender as CommonMark

---
 core/c/libc/stdio.odin             |  2 +-
 core/math/big/prime.odin           |  6 +++---
 core/math/big/private.odin         | 14 +++++++-------
 core/math/rand/distributions.odin  | 16 ++++++++--------
 core/net/addr.odin                 |  8 ++++----
 core/simd/x86/avx.odin             |  8 ++------
 core/strconv/strconv.odin          |  2 +-
 core/sys/windows/gdi32.odin        | 20 ++++++++++----------
 core/sys/windows/key_codes.odin    |  4 ++--
 core/sys/windows/types.odin        |  9 +++------
 vendor/glfw/bindings/types.odin    |  1 +
 vendor/glfw/constants.odin         |  3 ++-
 vendor/glfw/types.odin             |  1 +
 vendor/stb/vorbis/stb_vorbis.odin  | 28 ++++++++++++++--------------
 vendor/wgpu/wgpu_native_types.odin |  4 +---
 15 files changed, 60 insertions(+), 66 deletions(-)

diff --git a/core/c/libc/stdio.odin b/core/c/libc/stdio.odin
index ffdb06f67..d76c24119 100644
--- a/core/c/libc/stdio.odin
+++ b/core/c/libc/stdio.odin
@@ -38,7 +38,7 @@ when ODIN_OS == .Windows {
 
 	FILENAME_MAX :: 260
 
-	L_tmpnam     :: 15 // "\\" + 12 + NUL
+	L_tmpnam     :: 15 // `"\\" + 12 + NUL`
 
 	SEEK_SET     :: 0
 	SEEK_CUR     :: 1
diff --git a/core/math/big/prime.odin b/core/math/big/prime.odin
index 7fa6d8e4a..a1d1bc5f2 100644
--- a/core/math/big/prime.odin
+++ b/core/math/big/prime.odin
@@ -833,9 +833,9 @@ internal_int_prime_strong_lucas_selfridge :: proc(a: ^Int, allocator := context.
 /*
 	Performs one Fermat test.
 
-	If "a" were prime then b**a == b (mod a) since the order of
-	the multiplicative sub-group would be phi(a) = a-1.  That means
-	it would be the same as b**(a mod (a-1)) == b**1 == b (mod a).
+	If "a" were prime then `b**a == b (mod a)` since the order of
+	the multiplicative sub-group would be `phi(a) = a-1`.  That means
+	it would be the same as `b**(a mod (a-1)) == b**1 == b (mod a)`.
 
 	Returns `true` if the congruence holds, or `false` otherwise.
 
diff --git a/core/math/big/private.odin b/core/math/big/private.odin
index 1ca706c6d..c096d7efc 100644
--- a/core/math/big/private.odin
+++ b/core/math/big/private.odin
@@ -227,15 +227,15 @@ _private_int_mul_toom :: proc(dest, a, b: ^Int, allocator := context.allocator)
 }
 
 /*
-	product = |a| * |b| using Karatsuba Multiplication using three half size multiplications.
+	`product = |a| * |b|` using Karatsuba Multiplication using three half size multiplications.
 
-	Let `B` represent the radix [e.g. 2**_DIGIT_BITS] and let `n` represent
+	Let `B` represent the radix [e.g. `2**_DIGIT_BITS`] and let `n` represent
 	half of the number of digits in the min(a,b)
 
-	`a` = `a1` * `B`**`n` + `a0`
-	`b` = `b`1 * `B`**`n` + `b0`
+	`a = a1 * B**n + a0`
+	`b = b1 * B**n + b0`
 
-	Then, a * b => 1b1 * B**2n + ((a1 + a0)(b1 + b0) - (a0b0 + a1b1)) * B + a0b0
+	Then, `a * b => a1b1 * B**2n + ((a1 + a0)(b1 + b0) - (a0b0 + a1b1)) * B + a0b0`
 
 	Note that a1b1 and a0b0 are used twice and only need to be computed once.
 	So in total three half size (half # of digit) multiplications are performed,
@@ -248,8 +248,8 @@ _private_int_mul_toom :: proc(dest, a, b: ^Int, allocator := context.allocator)
 	Note also that the call to `internal_mul` can end up back in this function
 	if the a0, a1, b0, or b1 are above the threshold.
 
-	This is known as divide-and-conquer and leads to the famous O(N**lg(3)) or O(N**1.584)
-	work which is asymptopically lower than the standard O(N**2) that the
+	This is known as divide-and-conquer and leads to the famous `O(N**lg(3))` or `O(N**1.584)`
+	work which is asymptopically lower than the standard `O(N**2)` that the
 	baseline/comba methods use. Generally though, the overhead of this method doesn't pay off
 	until a certain size is reached, of around 80 used DIGITs.
 */
diff --git a/core/math/rand/distributions.odin b/core/math/rand/distributions.odin
index 7718bef9a..28db615e9 100644
--- a/core/math/rand/distributions.odin
+++ b/core/math/rand/distributions.odin
@@ -91,11 +91,11 @@ float32_exponential :: proc(lambda: f32, gen := context.random_generator) -> f32
 //
 // Required: alpha > 0 and beta > 0
 //
-//             math.pow(x, alpha-1) * math.exp(-x / beta)
-//   pdf(x) = --------------------------------------------
-//              math.gamma(alpha) * math.pow(beta, alpha)
+// 	          math.pow(x, alpha-1) * math.exp(-x / beta)
+// 	pdf(x) = --------------------------------------------
+// 	           math.gamma(alpha) * math.pow(beta, alpha)
 //
-// mean is alpha*beta, variance is math.pow(alpha*beta, 2)
+// mean is `alpha*beta`, variance is `math.pow(alpha*beta, 2)`
 @(require_results)
 float64_gamma :: proc(alpha, beta: f64, gen := context.random_generator) -> f64 {
 	if alpha <= 0 || beta <= 0 {
@@ -157,11 +157,11 @@ float64_gamma :: proc(alpha, beta: f64, gen := context.random_generator) -> f64
 //
 // Required: alpha > 0 and beta > 0
 //
-//             math.pow(x, alpha-1) * math.exp(-x / beta)
-//   pdf(x) = --------------------------------------------
-//              math.gamma(alpha) * math.pow(beta, alpha)
+// 	          math.pow(x, alpha-1) * math.exp(-x / beta)
+// 	pdf(x) = --------------------------------------------
+// 	           math.gamma(alpha) * math.pow(beta, alpha)
 //
-// mean is alpha*beta, variance is math.pow(alpha*beta, 2)
+// mean is `alpha*beta`, variance is `math.pow(alpha*beta, 2)`
 @(require_results)
 float32_gamma :: proc(alpha, beta: f32, gen := context.random_generator) -> f32 {
 	return f32(float64_gamma(f64(alpha), f64(beta), gen))
diff --git a/core/net/addr.odin b/core/net/addr.odin
index 747aacbaf..842cbb0ab 100644
--- a/core/net/addr.odin
+++ b/core/net/addr.odin
@@ -24,12 +24,12 @@ import "core:strings"
 
 /*
 	Expects an IPv4 address with no leading or trailing whitespace:
-	- a.b.c.d
-	- a.b.c.d:port
-	- [a.b.c.d]:port
+	- `a.b.c.d`
+	- `a.b.c.d:port`
+	- `[a.b.c.d]:port`
 
 	If the IP address is bracketed, the port must be present and valid (though it will be ignored):
-	- [a.b.c.d] will be treated as a parsing failure.
+	- `[a.b.c.d]` will be treated as a parsing failure.
 
 	The port, if present, is required to be a base 10 number in the range 0-65535, inclusive.
 
diff --git a/core/simd/x86/avx.odin b/core/simd/x86/avx.odin
index bc7a89f14..9b779b9a1 100644
--- a/core/simd/x86/avx.odin
+++ b/core/simd/x86/avx.odin
@@ -200,9 +200,7 @@ _mm256_div_pd :: #force_inline proc "c" (a, b: __m256d) -> __m256d {
 // - `0x02`: Round up, toward positive infinity.
 // - `0x03`: Truncate the values.
 //
-// For a complete list of options, check [the LLVM docs][llvm_docs].
-//
-// [llvm_docs]: https://github.com/llvm-mirror/clang/blob/dcd8d797b20291f1a6b3e0ddda085aa2bbb382a8/lib/Headers/avxintrin.h#L382
+// For a complete list of options, check [the LLVM docs](https://github.com/llvm-mirror/clang/blob/dcd8d797b20291f1a6b3e0ddda085aa2bbb382a8/lib/Headers/avxintrin.h#L382).
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_round_pd)
 @(require_results, enable_target_feature="avx")
@@ -234,9 +232,7 @@ _mm256_floor_pd :: #force_inline proc "c" (a: __m256d) -> __m256d {
 // - `0x02`: Round up, toward positive infinity.
 // - `0x03`: Truncate the values.
 //
-// For a complete list of options, check [the LLVM docs][llvm_docs].
-//
-// [llvm_docs]: https://github.com/llvm-mirror/clang/blob/dcd8d797b20291f1a6b3e0ddda085aa2bbb382a8/lib/Headers/avxintrin.h#L382
+// For a complete list of options, check [the LLVM docs](https://github.com/llvm-mirror/clang/blob/dcd8d797b20291f1a6b3e0ddda085aa2bbb382a8/lib/Headers/avxintrin.h#L382).
 //
 // [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_round_ps)
 @(require_results, enable_target_feature="avx")
diff --git a/core/strconv/strconv.odin b/core/strconv/strconv.odin
index f6fe48e8d..828c25b35 100644
--- a/core/strconv/strconv.odin
+++ b/core/strconv/strconv.odin
@@ -1642,7 +1642,7 @@ Writes a quoted string representation of the input string to a given byte slice
 - buf: The byte slice to which the quoted string will be written
 - str: The input string to be quoted
 
-!! ISSUE !! NOT EXPECTED -- "\"hello\"" was expected
+!! ISSUE !! NOT EXPECTED -- `"\"hello\""` was expected
 
 Example:
 
diff --git a/core/sys/windows/gdi32.odin b/core/sys/windows/gdi32.odin
index b11589d41..336f62c83 100644
--- a/core/sys/windows/gdi32.odin
+++ b/core/sys/windows/gdi32.odin
@@ -229,20 +229,20 @@ BS_DIBPATTERN8X8 :: 8
 BS_MONOPATTERN   :: 9
 
 /* Hatch Styles */
-HS_HORIZONTAL    :: 0       /* ----- */
-HS_VERTICAL      :: 1       /* ||||| */
-HS_FDIAGONAL     :: 2       /* \\\\\ */
-HS_BDIAGONAL     :: 3       /* ///// */
-HS_CROSS         :: 4       /* +++++ */
-HS_DIAGCROSS     :: 5       /* xxxxx */
+HS_HORIZONTAL    :: 0       /* `-----` */
+HS_VERTICAL      :: 1       /* `|||||` */
+HS_FDIAGONAL     :: 2       /* `\\\\\` */
+HS_BDIAGONAL     :: 3       /* `/////` */
+HS_CROSS         :: 4       /* `+++++` */
+HS_DIAGCROSS     :: 5       /* `xxxxx` */
 HS_API_MAX       :: 12
 
 /* Pen Styles */
 PS_SOLID         ::  0
-PS_DASH          ::  1      /* ------- */
-PS_DOT           ::  2      /* ....... */
-PS_DASHDOT       ::  3      /* _._._._ */
-PS_DASHDOTDOT    ::  4      /* _.._.._ */
+PS_DASH          ::  1      /* `-------` */
+PS_DOT           ::  2      /* `.......` */
+PS_DASHDOT       ::  3      /* `_._._._` */
+PS_DASHDOTDOT    ::  4      /* `_.._.._` */
 PS_NULL          ::  5
 PS_INSIDEFRAME   ::  6
 PS_USERSTYLE     ::  7
diff --git a/core/sys/windows/key_codes.odin b/core/sys/windows/key_codes.odin
index a2910ecd1..f92e16fc2 100644
--- a/core/sys/windows/key_codes.odin
+++ b/core/sys/windows/key_codes.odin
@@ -213,7 +213,7 @@ VK_OEM_3      :: 0xC0 // '`~' for US
 // 0xC1 - 0xDA : reserved
 
 VK_OEM_4 :: 0xDB // '[{' for US
-VK_OEM_5 :: 0xDC // '\|' for US
+VK_OEM_5 :: 0xDC // `'\|'` for US
 VK_OEM_6 :: 0xDD // ']}' for US
 VK_OEM_7 :: 0xDE // ''"' for US
 VK_OEM_8 :: 0xDF
@@ -222,7 +222,7 @@ VK_OEM_8 :: 0xDF
 
 // Various extended or enhanced keyboards
 VK_OEM_AX   :: 0xE1  //  'AX' key on Japanese AX kbd
-VK_OEM_102  :: 0xE2  //  "<>" or "\|" on RT 102-key kbd.
+VK_OEM_102  :: 0xE2  //  `"<>"` or `"\|"` on RT 102-key kbd.
 VK_ICO_HELP :: 0xE3  //  Help key on ICO
 VK_ICO_00   :: 0xE4  //  00 key on ICO
 
diff --git a/core/sys/windows/types.odin b/core/sys/windows/types.odin
index 00586e240..f643283f2 100644
--- a/core/sys/windows/types.odin
+++ b/core/sys/windows/types.odin
@@ -2249,7 +2249,7 @@ SEE_MASK_WAITFORINPUTIDLE  :: 0x02000000
 SEE_MASK_FLAG_LOG_USAGE    :: 0x04000000
 
 // When SEE_MASK_FLAG_HINST_IS_SITE is specified SHELLEXECUTEINFO.hInstApp is used as an
-// _In_ parameter and specifies a IUnknown* to be used as a site pointer. The site pointer
+// `_In_` parameter and specifies a `IUnknown*` to be used as a site pointer. The site pointer
 // is used to provide services to shell execute, the handler binding process and the verb handlers
 // once they are invoked.
 SEE_MASK_FLAG_HINST_IS_SITE :: 0x08000000
@@ -4304,7 +4304,7 @@ SHCONTF_ENABLE_ASYNC          :: 0x8000
 SHCONTF_INCLUDESUPERHIDDEN    :: 0x10000
 
 SHACF_DEFAULT               :: 0x00000000  // Currently (SHACF_FILESYSTEM | SHACF_URLALL)
-SHACF_FILESYSTEM            :: 0x00000001  // This includes the File System as well as the rest of the shell (Desktop\My Computer\Control Panel\)
+SHACF_FILESYSTEM            :: 0x00000001  // This includes the File System as well as the rest of the shell (`Desktop\My Computer\Control Panel\`)
 SHACF_URLALL                :: (SHACF_URLHISTORY | SHACF_URLMRU)
 SHACF_URLHISTORY            :: 0x00000002  // URLs in the User's History
 SHACF_URLMRU                :: 0x00000004  // URLs in the User's Recently Used list.
@@ -5481,10 +5481,9 @@ CRYPT_DIGEST_BLOB   :: distinct CRYPTOAPI_BLOB
 CRYPT_DER_BLOB      :: distinct CRYPTOAPI_BLOB
 CRYPT_ATTR_BLOB     :: distinct CRYPTOAPI_BLOB
 
-//+-------------------------------------------------------------------------
 //  In a CRYPT_BIT_BLOB the last byte may contain 0-7 unused bits. Therefore, the
 //  overall bit length is cbData * 8 - cUnusedBits.
-//--------------------------------------------------------------------------
+//
 // certenrolls_begin -- CERT_CONTEXT
 CRYPT_BIT_BLOB :: struct {
 	cbData:      DWORD,
@@ -5492,12 +5491,10 @@ CRYPT_BIT_BLOB :: struct {
 	cUnusedBits: DWORD,
 }
 
-//+-------------------------------------------------------------------------
 //  Type used for any algorithm
 //
 //  Where the Parameters CRYPT_OBJID_BLOB is in its encoded representation. For most
 //  algorithm types, the Parameters CRYPT_OBJID_BLOB is NULL (Parameters.cbData = 0).
-//--------------------------------------------------------------------------
 CRYPT_ALGORITHM_IDENTIFIER :: struct {
 	pszObjId:   LPSTR,
 	Parameters: CRYPT_OBJID_BLOB,
diff --git a/vendor/glfw/bindings/types.odin b/vendor/glfw/bindings/types.odin
index bb1c7e431..78ad0dc71 100644
--- a/vendor/glfw/bindings/types.odin
+++ b/vendor/glfw/bindings/types.odin
@@ -38,6 +38,7 @@ Allocator :: struct {
 }
 
 /*** Procedure type declarations ***/
+
 WindowIconifyProc      :: #type proc "c" (window: WindowHandle, iconified: c.int)
 WindowRefreshProc      :: #type proc "c" (window: WindowHandle)
 WindowFocusProc        :: #type proc "c" (window: WindowHandle, focused: c.int)
diff --git a/vendor/glfw/constants.odin b/vendor/glfw/constants.odin
index ce4f80584..40bc1fc5d 100644
--- a/vendor/glfw/constants.odin
+++ b/vendor/glfw/constants.odin
@@ -4,6 +4,7 @@ package glfw
 GLFW_SHARED :: #config(GLFW_SHARED, false)
 
 /*** Constants ***/
+
 /* Versions */
 VERSION_MAJOR    :: 3
 VERSION_MINOR    :: 4
@@ -38,7 +39,7 @@ KEY_UNKNOWN :: -1
 KEY_SPACE         :: 32
 KEY_APOSTROPHE    :: 39  /* ' */
 KEY_COMMA         :: 44  /* , */
-KEY_MINUS         :: 45  /* - */
+KEY_MINUS         :: 45  /* `-` */
 KEY_PERIOD        :: 46  /* . */
 KEY_SLASH         :: 47  /* / */
 KEY_SEMICOLON     :: 59  /* ; */
diff --git a/vendor/glfw/types.odin b/vendor/glfw/types.odin
index a89e0d1ba..645d313ed 100644
--- a/vendor/glfw/types.odin
+++ b/vendor/glfw/types.odin
@@ -15,6 +15,7 @@ GamepadState :: glfw.GamepadState
 Allocator :: glfw.Allocator
 
 /*** Procedure type declarations ***/
+
 WindowIconifyProc      :: glfw.WindowIconifyProc
 WindowRefreshProc      :: glfw.WindowRefreshProc
 WindowFocusProc        :: glfw.WindowFocusProc
diff --git a/vendor/stb/vorbis/stb_vorbis.odin b/vendor/stb/vorbis/stb_vorbis.odin
index 2616585c6..43897f79c 100644
--- a/vendor/stb/vorbis/stb_vorbis.odin
+++ b/vendor/stb/vorbis/stb_vorbis.odin
@@ -152,14 +152,14 @@ foreign lib {
 	// to avoid missing parts of a page header if they cross a datablock boundary,
 	// without writing state-machiney code to record a partial detection.
 	//
-	// The number of channels returned are stored in *channels (which can be
+	// The number of channels returned are stored in `*channels` (which can be
 	// NULL--it is always the same as the number of channels reported by
-	// get_info). *output will contain an array of float* buffers, one per
-	// channel. In other words, (*output)[0][0] contains the first sample from
-	// the first channel, and (*output)[1][0] contains the first sample from
+	// get_info). `*output` will contain an array of `float*` buffers, one per
+	// channel. In other words, `(*output)[0][0]` contains the first sample from
+	// the first channel, and `(*output)[1][0]` contains the first sample from
 	// the second channel.
 	//
-	// *output points into stb_vorbis's internal output buffer storage; these
+	// `*output` points into stb_vorbis's internal output buffer storage; these
 	// buffers are owned by stb_vorbis and application code should not free
 	// them or modify their contents. They are transient and will be overwritten
 	// once you ask for more data to get decoded, so be sure to grab any data
@@ -239,10 +239,10 @@ foreign lib {
 	}
 
 	// these functions seek in the Vorbis file to (approximately) 'sample_number'.
-	// after calling seek_frame(), the next call to get_frame_*() will include
+	// after calling seek_frame(), the next call to `get_frame_*()` will include
 	// the specified sample. after calling stb_vorbis_seek(), the next call to
-	// stb_vorbis_get_samples_* will start with the specified sample. If you
-	// do not need to seek to EXACTLY the target sample when using get_samples_*,
+	// `stb_vorbis_get_samples_*` will start with the specified sample. If you
+	// do not need to seek to EXACTLY the target sample when using `get_samples_*`,
 	// you can also use seek_frame().
 	seek_frame :: proc(f: ^vorbis, sample_number: c.uint) -> c.int ---
 	seek       :: proc(f: ^vorbis, sample_number: c.uint) -> c.int ---
@@ -255,13 +255,13 @@ foreign lib {
 	stream_length_in_seconds :: proc(f: ^vorbis) -> f32 ---
 
 	// decode the next frame and return the number of samples. the number of
-	// channels returned are stored in *channels (which can be NULL--it is always
-	// the same as the number of channels reported by get_info). *output will
-	// contain an array of float* buffers, one per channel. These outputs will
-	// be overwritten on the next call to stb_vorbis_get_frame_*.
+	// channels returned are stored in `*channels` (which can be NULL--it is always
+	// the same as the number of channels reported by get_info). `*output` will
+	// contain an array of `float*` buffers, one per channel. These outputs will
+	// be overwritten on the next call to `stb_vorbis_get_frame_*`.
 	//
-	// You generally should not intermix calls to stb_vorbis_get_frame_*()
-	// and stb_vorbis_get_samples_*(), since the latter calls the former.
+	// You generally should not intermix calls to `stb_vorbis_get_frame_*()`
+	// and `stb_vorbis_get_samples_*()`, since the latter calls the former.
 	get_frame_float :: proc(f: ^vorbis, channels: ^c.int, output: ^[^]^f32) -> c.int ---
 
 	// decode the next frame and return the number of *samples* per channel.
diff --git a/vendor/wgpu/wgpu_native_types.odin b/vendor/wgpu/wgpu_native_types.odin
index c0cbbf2a5..5bf2b7643 100644
--- a/vendor/wgpu/wgpu_native_types.odin
+++ b/vendor/wgpu/wgpu_native_types.odin
@@ -228,9 +228,7 @@ SurfaceConfigurationExtras :: struct {
 	desiredMaximumFrameLatency: u32,
 }
 
-/**
-* Chained in `SurfaceDescriptor` to make a `Surface` wrapping a WinUI [[ SwapChainPanel ; https://learn.microsoft.com/en-us/windows/windows-app-sdk/api/winrt/microsoft.ui.xaml.controls.swapchainpanel ]].
-*/
+// Chained in `SurfaceDescriptor` to make a `Surface` wrapping a WinUI [[ SwapChainPanel ; https://learn.microsoft.com/en-us/windows/windows-app-sdk/api/winrt/microsoft.ui.xaml.controls.swapchainpanel ]].
 SurfaceSourceSwapChainPanel :: struct {
 	using chain: ChainedStruct,
     /**

From c941c3fd2b82a6743da49b37fb8a1f77ae6b38a7 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 14:45:00 +0100
Subject: [PATCH 143/215] Accept a pointer to a `using` subtype for a
 `$T/^Base` constraint again, binding `T` to the argument's type

---
 src/check_type.cpp                            |  7 +++--
 tests/issues/run.bat                          |  1 +
 tests/issues/run.sh                           |  1 +
 .../issues/test_issue_poly_using_subtype.odin | 31 +++++++++++++++++++
 4 files changed, 37 insertions(+), 3 deletions(-)
 create mode 100644 tests/issues/test_issue_poly_using_subtype.odin

diff --git a/src/check_type.cpp b/src/check_type.cpp
index b7b525702..d04fbfe8e 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -1925,7 +1925,8 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 		}
 		if (base_type(pattern->Pointer.elem)->kind == Type_Struct &&
 		    check_is_assignable_to_using_subtype(src_elem, pattern->Pointer.elem, 0, false, allow_poly) > 0) {
-			return Subst_Unhandled; // genuine subtype match (no binding), handled by the mutator
+			// NOTE(bill): a subtype, e.g. `^Expr` for `$T/^Node`, which has nothing to bind unless the pattern is polymorphic
+			return is_type_polymorphic(pattern->Pointer.elem) ? Subst_Unhandled : Subst_Matched;
 		}
 		return subst_unify(c, pattern->Pointer.elem, src_elem, subst);
 	}
@@ -1940,7 +1941,7 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 		}
 		if (base_type(pattern->MultiPointer.elem)->kind == Type_Struct &&
 		    check_is_assignable_to_using_subtype(src_elem, pattern->MultiPointer.elem) > 0) {
-			return Subst_Unhandled;
+			return is_type_polymorphic(pattern->MultiPointer.elem) ? Subst_Unhandled : Subst_Matched;
 		}
 		return subst_unify(c, pattern->MultiPointer.elem, src_elem, subst);
 	}
@@ -2178,7 +2179,7 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 		}
 		if (base_type(pattern->SoaPointer.elem)->kind == Type_Struct &&
 		    check_is_assignable_to_using_subtype(source->SoaPointer.elem, pattern->SoaPointer.elem, 0, false, true) > 0) {
-			return Subst_Unhandled; // genuine subtype match (no binding), handled by the mutator
+			return is_type_polymorphic(pattern->SoaPointer.elem) ? Subst_Unhandled : Subst_Matched;
 		}
 		return subst_unify(c, pattern->SoaPointer.elem, source->SoaPointer.elem, subst);
 	case Type_FixedCapacityDynamicArray:
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index d01507e36..fa0f8463a 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -82,6 +82,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin run ..\test_issue_7562.odin %COMMON% -no-crt -no-thread-local -o:speed || exit /b
 ..\..\..\odin test ..\test_issue_7316.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7566.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_poly_using_subtype.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 4302577d5..e4dff48e4 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -104,6 +104,7 @@ $ODIN run ../test_issue_7482.odin $COMMON
 $ODIN run ../test_issue_7564.odin $COMMON
 $ODIN test ../test_issue_7316.odin $COMMON
 $ODIN test ../test_issue_7566.odin $COMMON
+$ODIN test ../test_issue_poly_using_subtype.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON
diff --git a/tests/issues/test_issue_poly_using_subtype.odin b/tests/issues/test_issue_poly_using_subtype.odin
new file mode 100644
index 000000000..17b416ea6
--- /dev/null
+++ b/tests/issues/test_issue_poly_using_subtype.odin
@@ -0,0 +1,31 @@
+// A pointer to a `using` subtype satisfies a `$T/^Base` constraint, with `T` as the argument's type
+package test_issues
+
+import "core:testing"
+
+Node  :: struct { id: int }
+Expr  :: struct { using node: Node, e: int }
+Ident :: struct { using expr: Expr, name: string }
+
+slice_of :: proc(nodes: []$T/^Node) -> typeid { return T }
+ptr_of   :: proc(node: $T/^Node) -> typeid { return T }
+multi_of :: proc(node: $T/[^]Node) -> typeid { return T }
+
+group_node :: proc(node: $T/^Node) -> string { return "node" }
+group_int  :: proc(node: ^int) -> string { return "int" }
+group      :: proc{group_node, group_int}
+
+@(test)
+test_poly_using_subtype :: proc(t: ^testing.T) {
+	exprs:  []^Expr
+	idents: []^Ident
+	e:      ^Expr
+	m:      [^]Expr
+	i:      ^int
+	testing.expect_value(t, slice_of(exprs),  typeid_of(^Expr))
+	testing.expect_value(t, slice_of(idents), typeid_of(^Ident))
+	testing.expect_value(t, ptr_of(e),        typeid_of(^Expr))
+	testing.expect_value(t, multi_of(m),      typeid_of([^]Expr))
+	testing.expect_value(t, group(e), "node")
+	testing.expect_value(t, group(i), "int")
+}

From 03852e7af8253a40d8304cf0f962c9eaffb8633f Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 15:36:04 +0100
Subject: [PATCH 144/215] Generate each global's initialization in its own
 block of the startup procedure; generate the procedure literals reached from
 the initializations of globals in their own package's module rather than the
 default module

---
 src/llvm_backend.cpp                          |  6 +++
 src/llvm_backend.hpp                          |  3 ++
 src/llvm_backend_general.cpp                  | 13 +++++-
 tests/issues/run.bat                          |  1 +
 tests/issues/run.sh                           |  1 +
 tests/issues/test_issue_global_proc_lits.odin | 40 +++++++++++++++++++
 6 files changed, 62 insertions(+), 2 deletions(-)
 create mode 100644 tests/issues/test_issue_global_proc_lits.odin

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 05ce7ae17..cfb0005be 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2210,6 +2210,11 @@ gb_internal void lb_create_startup_runtime_generate_body(lbModule *m, lbProcedur
 		} else {
 			lb_init_global_var(m, p, e, init_expr, var);
 		}
+
+		// NOTE(bill): a block per global, as instruction selection is superlinear in the size of a block
+		lbBlock *next = lb_create_block(p, "global.init", true);
+		lb_emit_jump(p, next);
+		lb_start_block(p, next);
 	}
 	CheckerInfo *info = m->gen->info;
 
@@ -2383,6 +2388,7 @@ gb_internal void lb_create_global_procedures_and_types(lbGenerator *gen, Checker
 		array_sort(m->global_procedures_to_create, llvm_global_entity_cmp);
 	}
 
+	gen->modules_in_parallel = true;
 	if (do_threading) {
 		for (auto const &entry : gen->modules) {
 			lbModule *m = entry.value;
diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index 1303bb4b0..a9a067ae0 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -209,6 +209,9 @@ struct lbGenerator : LinkerData {
 
 	isize used_module_count;
 
+	// NOTE(bill): set once the modules are generated in parallel, after which a module may only be added to by its own thread
+	bool modules_in_parallel;
+
 	lbProcedure *startup_runtime;
 	lbProcedure *cleanup_runtime;
 	lbProcedure *objc_names;
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 9687fd49c..dc3d51f8e 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -3676,6 +3676,11 @@ gb_internal lbValue lb_generate_anonymous_proc_lit(lbModule *m, String const &pr
 	e->scope = e->file->scope;
 
 	lbModule *target_module = m;
+	// NOTE(bill): a literal reached whilst generating the initializations of the globals (in the default module) is
+	// generated in its own package's module, which may only be added to before the modules are generated in parallel
+	if (m == &gen->default_module && parent == nullptr && !gen->modules_in_parallel) {
+		target_module = lb_module_of_expr(gen, expr);
+	}
 	GB_ASSERT(target_module != nullptr);
 
 	// NOTE(bill): this is to prevent a race condition since these procedure literals can be created anywhere at any time
@@ -3693,8 +3698,12 @@ gb_internal lbValue lb_generate_anonymous_proc_lit(lbModule *m, String const &pr
 		lbValue *found = map_get(&target_module->values, e);
 		rw_mutex_shared_unlock(&target_module->values_mutex);
 		if (found == nullptr) {
-			lbProcedure *missing_proc_in_target_module = lb_create_procedure(target_module, e, false);
-			mpsc_enqueue(&target_module->missing_procedures_to_check, missing_proc_in_target_module);
+			lbProcedure *target_proc = lb_create_procedure(target_module, e, false);
+			if (gen->modules_in_parallel) {
+				mpsc_enqueue(&target_module->missing_procedures_to_check, target_proc);
+			} else {
+				mpsc_enqueue(&target_module->procedures_to_generate, target_proc);
+			}
 		}
 
 		lbProcedure *p = lb_create_procedure(m, e, true);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 2c2004955..443028dc5 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -84,6 +84,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_7316.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7566.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_poly_using_subtype.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_global_proc_lits.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index fb50f87cd..a1ad01264 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -105,6 +105,7 @@ $ODIN run ../test_issue_7564.odin $COMMON
 $ODIN test ../test_issue_7316.odin $COMMON
 $ODIN test ../test_issue_7566.odin $COMMON
 $ODIN test ../test_issue_poly_using_subtype.odin $COMMON
+$ODIN test ../test_issue_global_proc_lits.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON
diff --git a/tests/issues/test_issue_global_proc_lits.odin b/tests/issues/test_issue_global_proc_lits.odin
new file mode 100644
index 000000000..750261d41
--- /dev/null
+++ b/tests/issues/test_issue_global_proc_lits.odin
@@ -0,0 +1,40 @@
+// Procedure literals within the initializations of globals, constant and not, nested, and called through them
+package test_issues
+
+import "core:testing"
+
+Op :: struct {
+	name: string,
+	f:    proc(a, b: int) -> int,
+}
+
+// constant, so its literals are generated with the global's initializer
+CONST_OPS := [?]Op{
+	{"add", proc(a, b: int) -> int { return a + b }},
+	{"sub", proc(a, b: int) -> int { return a - b }},
+}
+
+// not constant, so it is initialized at startup
+runtime_ops := []Op{
+	{"mul", proc(a, b: int) -> int { return a * b }},
+	{"twice", proc(a, b: int) -> int {
+		inner := proc(x: int) -> int { return x * 2 }
+		return inner(a) + inner(b)
+	}},
+}
+
+lazy_op := make_op(proc(a, b: int) -> int { return max(a, b) })
+
+make_op :: proc "contextless" (f: proc(a, b: int) -> int) -> Op {
+	return {"made", f}
+}
+
+@(test)
+test_global_proc_lits :: proc(t: ^testing.T) {
+	testing.expect_value(t, CONST_OPS[0].f(7, 3), 10)
+	testing.expect_value(t, CONST_OPS[1].f(7, 3), 4)
+	testing.expect_value(t, runtime_ops[0].f(7, 3), 21)
+	testing.expect_value(t, runtime_ops[1].f(7, 3), 20)
+	testing.expect_value(t, lazy_op.f(7, 3), 7)
+	testing.expect_value(t, lazy_op.name, "made")
+}

From 6a8d6e0ca4fc673acf8734e8fe736e082180cd85 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 15:55:54 +0100
Subject: [PATCH 145/215] Verify each module once its procedures are generated
 rather than each procedure, which for those referenced by the type info
 walked all of the type info each time; only verify the procedures on their
 own on a failure

---
 src/llvm_backend.cpp | 41 +++++++++++++++++++++++++++++++++++++++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index cfb0005be..e3e0a3fb7 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -3120,12 +3120,46 @@ gb_internal void lb_generate_procedure(lbModule *m, lbProcedure *p) {
 		p->flags |= lbProcedureFlag_WithoutMemcpyPass;
 	}
 
-	lb_verify_function(m, p, true);
-
 	MUTEX_GUARD(&m->generated_procedures_mutex);
 	array_add(&m->generated_procedures, p);
 }
 
+// NOTE(bill): Each module is verified once its procedures are generated, rather than each procedure as it is
+// generated. Verifying a procedure on its own walks every constant which uses it, which for one referenced by the
+// type info (e.g. `__$equal`) is all of the type info. Only on a failure are its procedures verified on their own,
+// to report which ones are invalid.
+gb_internal WORKER_TASK_PROC(lb_verify_generated_procedures_worker_proc) {
+	lbModule *m = cast(lbModule *)data;
+	if (!LLVMVerifyModule(m->mod, LLVMReturnStatusAction, nullptr)) {
+		return 0;
+	}
+	for (lbProcedure *p : m->generated_procedures) {
+		lb_verify_function(m, p, true);
+	}
+	lb_llvm_module_verification_worker_proc(m);
+	return 0;
+}
+
+gb_internal void lb_verify_generated_procedures(lbGenerator *gen, bool do_threading) {
+	if (LLVM_IGNORE_VERIFICATION) {
+		return;
+	}
+	for (auto const &entry : gen->modules) {
+		lbModule *m = entry.value;
+		// NOTE(bill): with debug information, its procedures were never verified on their own, only the module after its passes
+		if (m->debug_builder != nullptr) {
+			continue;
+		}
+		if (do_threading) {
+			thread_pool_add_task(lb_verify_generated_procedures_worker_proc, m);
+		} else {
+			lb_verify_generated_procedures_worker_proc(m);
+		}
+	}
+	thread_pool_wait();
+	lb_exit_if_worker_failed();
+}
+
 
 gb_internal bool lb_generate_code(lbGenerator *gen) {
 	TIME_SECTION("LLVM Initializtion");
@@ -3773,6 +3807,9 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 	TIME_SECTION("LLVM Add Foreign Library Paths");
 	lb_add_foreign_library_paths(gen);
 
+	TIME_SECTION("LLVM Verify Procedures");
+	lb_verify_generated_procedures(gen, do_threading);
+
 	TIME_SECTION("LLVM Function Pass");
 	lb_llvm_function_passes(gen, do_threading && !build_context.ODIN_DEBUG);
 

From cbcf31518446c7d06ecb4bd5acd0476c8984a025 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 16:11:18 +0100
Subject: [PATCH 146/215] Generate a package with much more code than a 32nd of
 all of it in several modules of contiguous files, estimated by the bodies of
 its used procedures, as each module is generated by one thread

---
 src/llvm_backend.hpp         |   1 +
 src/llvm_backend_general.cpp | 101 +++++++++++++++++++++++++++++++++++
 2 files changed, 102 insertions(+)

diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index a9a067ae0..eb93b7919 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -203,6 +203,7 @@ struct lbGenerator : LinkerData {
 
 	PtrMap<void *, lbModule *> modules; // key is `AstPackage *` (`void *` is used for future use)
 	PtrMap<LLVMContextRef, lbModule *> modules_through_ctx; 
+	PtrMap<AstFile *, lbModule *> file_modules; // NOTE(bill): of the files of a package which is split into several modules
 	lbModule default_module;
 
 	lbModule *equal_module;
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index dc3d51f8e..8d6208536 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -185,6 +185,87 @@ gb_internal void lb_init_module(lbModule *m, bool do_threading) {
 	}
 }
 
+// NOTE(bill): an estimate of the code generated for each file: the size of the bodies of its procedures which are used,
+// polymorphic instances included as each is generated with its procedure's file
+gb_internal i64 lb_estimate_file_code_sizes(CheckerInfo *info, PtrMap<AstFile *, i64> *sizes) {
+	i64 total = 0;
+	for (Entity *e : info->entities) {
+		if (e->kind != Entity_Procedure || e->file == nullptr || e->min_dep_count.load(std::memory_order_relaxed) == 0) {
+			continue;
+		}
+		if (e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
+			continue;
+		}
+		DeclInfo *d = e->decl_info;
+		if (d == nullptr || d->proc_lit == nullptr || d->proc_lit->kind != Ast_ProcLit || d->proc_lit->ProcLit.body == nullptr) {
+			continue;
+		}
+		Ast *body = d->proc_lit->ProcLit.body;
+		i64 size = gb_max(cast(i64)(ast_end_token(body).pos.offset - ast_token(body).pos.offset), 1);
+		i64 *found = map_get(sizes, e->file);
+		if (found) {
+			*found += size;
+		} else {
+			map_set(sizes, e->file, size);
+		}
+		total += size;
+	}
+	return total;
+}
+
+gb_internal void lb_split_package_into_modules(lbGenerator *gen, Checker *c, AstPackage *pkg, PtrMap<AstFile *, i64> *file_sizes, i64 share, bool do_threading) {
+	i64 pkg_size = 0;
+	for (AstFile *f : pkg->files) {
+		i64 *size = map_get(file_sizes, f);
+		pkg_size += size ? *size : 0;
+	}
+	if (pkg_size <= share + share/2) {
+		return;
+	}
+
+	auto files = array_make<AstFile *>(heap_allocator(), 0, pkg->files.count);
+	defer (array_free(&files));
+	for (AstFile *f : pkg->files) {
+		array_add(&files, f);
+	}
+	array_sort(files, [](void const *a, void const *b) -> int {
+		return string_compare((*cast(AstFile **)a)->fullpath, (*cast(AstFile **)b)->fullpath);
+	});
+
+	i64 group_count = (pkg_size + share - 1) / share;
+	i64 group_size_target = pkg_size / group_count;
+
+	lbModule *group = nullptr;
+	i64 group_size = 0;
+	for (AstFile *f : files) {
+		if (group == nullptr || group_size >= group_size_target) {
+			group = permanent_alloc_item<lbModule>();
+			group->file    = f;
+			group->pkg     = pkg;
+			group->gen     = gen;
+			group->checker = c;
+			map_set(&gen->modules, cast(void *)group, group); // point to itself just add it to the list
+			lb_init_module(group, do_threading);
+
+			if (LLVM_WEAK_MONOMORPHIZATION) {
+				auto pm = permanent_alloc_item<lbModule>();
+				pm->file    = f;
+				pm->pkg     = pkg;
+				pm->gen     = gen;
+				pm->checker = c;
+				group->polymorphic_module = pm;
+				pm->polymorphic_module    = pm;
+				map_set(&gen->modules, cast(void *)pm, pm);
+				lb_init_module(pm, do_threading);
+			}
+			group_size = 0;
+		}
+		map_set(&gen->file_modules, f, group);
+		i64 *size = map_get(file_sizes, f);
+		group_size += size ? *size : 0;
+	}
+}
+
 gb_internal bool lb_init_generator(lbGenerator *gen, Checker *c) {
 	if (global_error_collector.count != 0) {
 		return false;
@@ -206,9 +287,17 @@ gb_internal bool lb_init_generator(lbGenerator *gen, Checker *c) {
 
 	map_init(&gen->modules, gen->info->packages.count*2);
 	map_init(&gen->modules_through_ctx, gen->info->packages.count*2);
+	map_init(&gen->file_modules);
 
 	if (USE_SEPARATE_MODULES) {
 		bool module_per_file = build_context.module_per_file && (build_context.optimization_level <= 0 || build_context.lto_kind != LTO_None);
+		// NOTE(bill): A package with much more code than an even share of all of it is generated in several modules
+		// of contiguous files, as each module is generated by one thread. The share does not depend on the number of
+		// threads, so neither do the modules.
+		PtrMap<AstFile *, i64> file_sizes = {};
+		map_init(&file_sizes, 1024);
+		i64 share = gb_max(lb_estimate_file_code_sizes(gen->info, &file_sizes) / 32, 1);
+
 		for (auto const &entry : gen->info->packages) {
 			AstPackage *pkg = entry.value;
 			auto m = permanent_alloc_item<lbModule>();
@@ -232,6 +321,9 @@ gb_internal bool lb_init_generator(lbGenerator *gen, Checker *c) {
 			}
 
 			bool allow_for_per_file = pkg->kind == Package_Runtime || module_per_file;
+			if (!allow_for_per_file) {
+				lb_split_package_into_modules(gen, c, pkg, &file_sizes, share, do_threading);
+			}
 
 			#if 0
 			if (!allow_for_per_file) {
@@ -572,6 +664,10 @@ gb_internal lbModule *lb_module_of_expr(lbGenerator *gen, Ast *expr) {
 		if (found) {
 			return *found;
 		}
+		found = map_get(&gen->file_modules, file);
+		if (found) {
+			return *found;
+		}
 
 		if (file->pkg) {
 			found = map_get(&gen->modules, cast(void *)file->pkg);
@@ -599,6 +695,11 @@ gb_internal lbModule *lb_module_of_entity_internal(lbGenerator *gen, Entity *e,
 			GB_ASSERT(*found != nullptr);
 			return *found;
 		}
+		found = map_get(&gen->file_modules, e->file);
+		if (found) {
+			GB_ASSERT(*found != nullptr);
+			return *found;
+		}
 	}
 	if (e->pkg) {
 		found = map_get(&gen->modules, cast(void *)e->pkg);

From d958fd7abbc083956ab56178218bc03f141ca219 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 16:36:33 +0100
Subject: [PATCH 147/215] Allow `-build-mode` with `odin test`; Copy a "just
 loaded" aggregate as integers in the startup procedure and with `-o:none` as
 LLVM's fast instruction selector cannot select an aggregate load or store

---
 src/llvm_backend.cpp         |  6 ++-
 src/llvm_backend_general.cpp | 91 ++++++++++++++++++++++++++++++++++++
 src/main.cpp                 |  7 +--
 3 files changed, 99 insertions(+), 5 deletions(-)

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index e3e0a3fb7..5822b549a 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2147,9 +2147,11 @@ gb_internal bool lb_init_global_var(lbModule *m, lbProcedure *p, Entity *e, Ast
 
 			LLVMTypeRef vt = llvm_addr_type(p->module, var.var);
 			lbValue src0 = lb_emit_conv(p, var.init, t);
-			LLVMValueRef src = OdinLLVMBuildTransmute(p, src0.value, vt);
 			LLVMValueRef dst = var.var.value;
-			LLVMBuildStore(p->builder, src, dst);
+			if (LLVMTypeOf(src0.value) != vt || !lb_try_copy_loaded_aggregate(p, dst, src0.value)) {
+				LLVMValueRef src = OdinLLVMBuildTransmute(p, src0.value, vt);
+				LLVMBuildStore(p->builder, src, dst);
+			}
 		}
 
 		var.is_initialized = true;
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 8d6208536..d7a663e53 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -1585,6 +1585,94 @@ gb_internal bool lb_is_type_proc_recursive(Type *t) {
 	}
 }
 
+// NOTE(bill): LLVM's fast instruction selector cannot select an aggregate load or store, and for one falls back to its
+// slow instruction selection for all of the block before it, which is superlinear in its size. When the passes do not
+// split the aggregates of a procedure first (SROA), a copy of a loaded aggregate is made of integers instead, all loaded
+// before any is stored, as the aggregate is.
+// Oh, how do I love LLVM /s
+gb_internal bool lb_copies_aggregates_as_scalars(lbProcedure *p) {
+	return p->is_startup || build_context.optimization_level < 0;
+}
+
+gb_internal unsigned lb_alignment_at_offset(unsigned alignment, i64 offset, i64 size) {
+	unsigned a = gb_max(alignment, 1u);
+	while (a > 1 && (offset % a) != 0) {
+		a >>= 1;
+	}
+	return cast(unsigned)gb_min(cast(i64)a, size);
+}
+
+gb_internal bool lb_try_copy_loaded_aggregate(lbProcedure *p, LLVMValueRef dst, LLVMValueRef load) {
+	enum {MAX_SCALAR_COPY_SIZE = 64};
+
+	if (load == nullptr || !LLVMIsALoadInst(load) || LLVMGetVolatile(load) || LLVMGetOrdering(load) != LLVMAtomicOrderingNotAtomic) {
+		return false;
+	}
+	LLVMTypeRef type = LLVMTypeOf(load);
+	LLVMTypeKind kind = LLVMGetTypeKind(type);
+	if (kind != LLVMStructTypeKind && kind != LLVMArrayTypeKind) {
+		return false;
+	}
+	i64 size = lb_sizeof(type);
+	if (size <= 0) {
+		return false;
+	}
+
+	// NOTE(bill): the memory loaded must not have been written to since
+	LLVMBasicBlockRef block = LLVMGetInsertBlock(p->builder);
+	if (block == nullptr || LLVMGetInstructionParent(load) != block) {
+		return false;
+	}
+	isize steps = 0;
+	for (LLVMValueRef i = LLVMGetLastInstruction(block); i != load; i = LLVMGetPreviousInstruction(i)) {
+		if (i == nullptr || ++steps > 16 ||
+		    LLVMIsAStoreInst(i) || LLVMIsACallInst(i) || LLVMIsAInvokeInst(i) ||
+		    LLVMIsAAtomicRMWInst(i) || LLVMIsAAtomicCmpXchgInst(i)) {
+			return false;
+		}
+	}
+
+	LLVMContextRef ctx = p->module->ctx;
+	LLVMValueRef src = LLVMGetOperand(load, 0);
+	LLVMTypeRef i8  = LLVMInt8TypeInContext(ctx);
+	LLVMTypeRef i64_type = LLVMInt64TypeInContext(ctx);
+
+	if (size > MAX_SCALAR_COPY_SIZE) {
+		LLVMBuildMemMove(p->builder, dst, lb_try_get_alignment(dst, 1), src, LLVMGetAlignment(load), LLVMConstInt(i64_type, size, false));
+		return true;
+	}
+
+	unsigned src_alignment = LLVMGetAlignment(load);
+	unsigned dst_alignment = lb_try_get_alignment(dst, 1);
+
+	LLVMValueRef values [MAX_SCALAR_COPY_SIZE/8 + 3] = {};
+	i64          offsets[MAX_SCALAR_COPY_SIZE/8 + 3] = {};
+	i64          sizes  [MAX_SCALAR_COPY_SIZE/8 + 3] = {};
+	isize count = 0;
+	for (i64 offset = 0; offset < size; /**/) {
+		i64 n = 8;
+		while (offset + n > size) {
+			n >>= 1;
+		}
+		LLVMValueRef index = LLVMConstInt(i64_type, offset, false);
+		LLVMValueRef ptr = offset ? LLVMBuildInBoundsGEP2(p->builder, i8, src, &index, 1, "") : src;
+		LLVMValueRef v = LLVMBuildLoad2(p->builder, LLVMIntTypeInContext(ctx, cast(unsigned)(8*n)), ptr, "");
+		LLVMSetAlignment(v, lb_alignment_at_offset(src_alignment, offset, n));
+		values [count] = v;
+		offsets[count] = offset;
+		sizes  [count] = n;
+		count += 1;
+		offset += n;
+	}
+	for (isize i = 0; i < count; i++) {
+		LLVMValueRef index = LLVMConstInt(i64_type, offsets[i], false);
+		LLVMValueRef ptr = offsets[i] ? LLVMBuildInBoundsGEP2(p->builder, i8, dst, &index, 1, "") : dst;
+		LLVMValueRef s = LLVMBuildStore(p->builder, values[i], ptr);
+		LLVMSetAlignment(s, lb_alignment_at_offset(dst_alignment, offsets[i], sizes[i]));
+	}
+	return true;
+}
+
 gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 	GB_ASSERT(value.value != nullptr);
 
@@ -1666,6 +1754,9 @@ gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 			GB_ASSERT_MSG(are_types_identical(a, value.type), "%s != %s", type_to_string(a), type_to_string(value.type));
 		}
 
+		if (lb_copies_aggregates_as_scalars(p) && lb_try_copy_loaded_aggregate(p, ptr.value, value.value)) {
+			return;
+		}
 		instr = LLVMBuildStore(p->builder, value.value, ptr.value);
 	}
 	// LLVMSetVolatile(instr, p->in_multi_assignment);
diff --git a/src/main.cpp b/src/main.cpp
index 9d661bb16..aafd06ba9 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -1347,8 +1347,8 @@ gb_internal bool parse_build_flags(Array<String> args) {
 							GB_ASSERT(value.kind == ExactValue_String);
 							String str = value.value_string;
 
-							if (build_context.command != "build") {
-								gb_printf_err("'build-mode' can only be used with the 'build' command\n");
+							if (build_context.command != "build" && build_context.command != "test") {
+								gb_printf_err("'build-mode' can only be used with the 'build' and 'test' commands\n");
 								bad_flags = true;
 								break;
 							}
@@ -4582,7 +4582,8 @@ end_of_code_gen:;
 		show_import_graph(checker);
 	}
 
-	if (run_output) {
+	// NOTE(bill): e.g. `odin test -build-mode:llvm-ir` only generates the tests
+	if (run_output && build_context.build_mode == BuildMode_Executable) {
 		String exe_name = path_to_string(heap_allocator(), build_context.build_paths[BuildPath_Output]);
 		defer (gb_free(heap_allocator(), exe_name.text));
 

From ff02184b2e0beebeb5d0bbc3ce86bf78e583d28f Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 16:42:33 +0100
Subject: [PATCH 148/215] Fix #7708: compare a polymorphic record's constant
 parameters by value in `subst_unify`

---
 src/check_type.cpp   | 5 +++++
 tests/issues/run.bat | 2 ++
 tests/issues/run.sh  | 7 +++++++
 3 files changed, 14 insertions(+)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index d04fbfe8e..8555140cc 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -2127,6 +2127,11 @@ gb_internal SubstResult subst_unify(CheckerContext *c, Type *pattern, Type *sour
 				if (r != Subst_Matched) {
 					return r; // NoMatch or Unhandled
 				}
+				// e.g. `M(1, 1, $T)` vs `M(3, 3, f64)`
+				if (s_e->kind == Entity_Constant && t_e->kind == Entity_Constant &&
+				    !compare_exact_values(Token_CmpEq, s_e->Constant.value, t_e->Constant.value)) {
+					return Subst_NoMatch;
+				}
 			}
 		}
 		return Subst_Matched;
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 2c2004955..1c68c582d 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -84,6 +84,8 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_7316.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7566.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_poly_using_subtype.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_7708.odin %COMMON%  || exit /b
+..\..\..\odin check ..\test_issue_7708_mismatch.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index fb50f87cd..e8912b635 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -105,6 +105,13 @@ $ODIN run ../test_issue_7564.odin $COMMON
 $ODIN test ../test_issue_7316.odin $COMMON
 $ODIN test ../test_issue_7566.odin $COMMON
 $ODIN test ../test_issue_poly_using_subtype.odin $COMMON
+$ODIN test ../test_issue_7708.odin $COMMON
+if [[ $($ODIN check ../test_issue_7708_mismatch.odin $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 2 ]]; then
+	echo "SUCCESSFUL 1/1"
+else
+	echo "SUCCESSFUL 0/1"
+	exit 1
+fi
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON

From f0ac6c3fba70e6e5c8c1f33ea86ebf062c959c85 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 16:55:57 +0100
Subject: [PATCH 149/215] Fix #7700: constant `#soa` field access yields the
 per-element field array; compare and canonicalize typeid constants

---
 src/check_expr.cpp            | 131 ++++++++++++++++++++++++++++++++++
 src/exact_value.cpp           |   1 +
 src/name_canonicalization.cpp |   4 ++
 tests/issues/run.bat          |   1 +
 tests/issues/run.sh           |   1 +
 5 files changed, 138 insertions(+)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index fd01f8cf7..45fa8b7f7 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -5759,6 +5759,134 @@ gb_internal ExactValue get_constant_field_single(CheckerContext *c, ExactValue v
 
 
 
+gb_internal Ast *constant_compound_elem_node(AstCompoundLit *cl, i64 index) {
+	if (cl->elems.count == 0) {
+		return nullptr;
+	}
+	if (cl->elems[0]->kind != Ast_FieldValue) {
+		return index < cl->elems.count ? cl->elems[index] : nullptr;
+	}
+	for (Ast *elem : cl->elems) {
+		ast_node(fv, FieldValue, elem);
+		if (is_ast_range(fv->field)) {
+			ast_node(ie, BinaryExpr, fv->field);
+			i64 lo = exact_value_to_i64(ie->left->tav.value);
+			i64 hi = exact_value_to_i64(ie->right->tav.value);
+			if (ie->op.kind != Token_RangeHalf) {
+				hi += 1;
+			}
+			if (lo <= index && index < hi) {
+				return fv->value;
+			}
+		} else if (fv->field->tav.mode == Addressing_Constant && exact_value_to_i64(fv->field->tav.value) == index) {
+			return fv->value;
+		}
+	}
+	return nullptr;
+}
+
+gb_internal ExactValue get_constant_soa_field(Type *soa, ExactValue value, Selection sel, bool *success_) {
+	if (success_) *success_ = false;
+
+	Type *elem = base_type(soa->Struct.soa_elem);
+	if (sel.index.count != 1 || soa->Struct.soa_kind != StructSoa_Fixed ||
+	    value.value_compound->kind != Ast_CompoundLit ||
+	    !(elem->kind == Type_Array || (elem->kind == Type_Struct && !elem->Struct.is_raw_union))) {
+		return empty_exact_value;
+	}
+
+	i32 field_index = sel.index[0];
+	Entity *field   = soa->Struct.fields[field_index];
+
+	Type *field_elem_type = base_type(field->type)->Array.elem;
+
+	isize count   = soa->Struct.soa_count;
+	Ast *soa_node = value.value_compound;
+
+	AstFile *f = soa_node->file();
+	ast_node(cl, CompoundLit, soa_node);
+
+	auto  nodes = permanent_slice_make<Ast *>(count);
+
+	isize last     = -1;
+	bool  has_gaps = false;
+
+	for (isize i = 0; i < count; i++) {
+		Ast *en = constant_compound_elem_node(cl, i);
+		if (en == nullptr || en->tav.value.kind == ExactValue_Invalid) {
+			continue;
+		}
+		ExactValue ev = en->tav.value;
+		if (ev.kind != ExactValue_Compound || ev.value_compound->kind != Ast_CompoundLit) {
+			return empty_exact_value;
+		}
+		ast_node(ecl, CompoundLit, ev.value_compound);
+
+		Ast *fn = nullptr;
+		if (elem->kind == Type_Struct && ecl->elems.count > 0 && ecl->elems[0]->kind == Ast_FieldValue) {
+			for (Ast *e : ecl->elems) {
+				ast_node(fv, FieldValue, e);
+				if (fv->field->kind == Ast_Ident && fv->field->Ident.token.string == field->token.string) {
+					fn = fv->value;
+					break;
+				}
+			}
+		} else {
+			fn = constant_compound_elem_node(ecl, field_index);
+		}
+		if (fn == nullptr) {
+			continue;
+		}
+
+		ExactValue fvalue = fn->tav.value;
+		if (fn->tav.mode == Addressing_Type) {
+			fvalue = exact_value_typeid(fn->tav.type);
+		}
+		if (fvalue.kind == ExactValue_Invalid) {
+			continue;
+		}
+
+		Ast *node = alloc_ast_node(nullptr, fn->kind);
+		gb_memmove(node, fn, ast_node_size(fn->kind));
+		node->tav.mode  = Addressing_Constant;
+		node->tav.type  = field_elem_type;
+		node->tav.value = fvalue;
+
+		nodes[i] = node;
+		has_gaps |= last+1 != i;
+		last = i;
+	}
+
+	auto elems = array_make<Ast *>(permanent_allocator(), 0, last+1);
+	for (isize i = 0; i <= last; i++) {
+		if (!has_gaps) {
+			array_add(&elems, nodes[i]);
+		} else if (nodes[i] != nullptr) {
+			Token token = {Token_Integer};
+			token.string = copy_string(permanent_allocator(), make_string_c(gb_bprintf("%td", i)));
+			token.pos    = ast_token(nodes[i]).pos;
+
+			Ast *index = alloc_ast_node(f, Ast_BasicLit);
+			index->BasicLit.token = token;
+			index->tav.mode  = Addressing_Constant;
+			index->tav.type  = t_untyped_integer;
+			index->tav.value = exact_value_i64(i);
+
+			Token eq = {Token_Eq};
+			eq.string = str_lit("=");
+			array_add(&elems, ast_field_value(f, index, nodes[i], eq));
+		}
+	}
+
+	Ast *result = ast_compound_lit(f, nullptr, elems, cl->open, cl->close);
+	result->tav.mode  = Addressing_Constant;
+	result->tav.type  = field->type;
+	result->tav.value = exact_value_compound(result);
+
+	if (success_) *success_ = true;
+	return result->tav.value;
+}
+
 gb_internal ExactValue get_constant_field(CheckerContext *c, Operand const *operand, Selection sel, bool *success_) {
 	if (operand->mode != Addressing_Constant) {
 		if (success_) *success_ = false;
@@ -5777,6 +5905,9 @@ gb_internal ExactValue get_constant_field(CheckerContext *c, Operand const *oper
 
 
 	ExactValue value = operand->value;
+	if (value.kind == ExactValue_Compound && is_type_soa_struct(operand->type)) {
+		return get_constant_soa_field(base_type(operand->type), value, sel, success_);
+	}
 	if (value.kind == ExactValue_Compound) {
 		while (sel.index.count > 0) {
 			i32 index = sel.index[0];
diff --git a/src/exact_value.cpp b/src/exact_value.cpp
index e1266ff01..b2f855e25 100644
--- a/src/exact_value.cpp
+++ b/src/exact_value.cpp
@@ -823,6 +823,7 @@ gb_internal i32 exact_value_order(ExactValue const &v) {
 	case ExactValue_Pointer:
 		return 7;
 	case ExactValue_Procedure:
+	case ExactValue_Typeid:
 		return 8;
 
 	default:
diff --git a/src/name_canonicalization.cpp b/src/name_canonicalization.cpp
index 12b1f23cf..46bf5fb31 100644
--- a/src/name_canonicalization.cpp
+++ b/src/name_canonicalization.cpp
@@ -571,6 +571,10 @@ gb_internal void write_canonical_exact_value(TypeWriter *w, ExactValue const &v)
 			return;
 		}
 	}
+	if (v.kind == ExactValue_Typeid) {
+		write_type_to_canonical_string(w, v.value_typeid);
+		return;
+	}
 	gbString s = exact_value_to_string(v, 1<<16);
 	type_writer_append(w, s, gb_string_length(s));
 	gb_string_free(s);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 1c68c582d..a8d9a2b64 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -86,6 +86,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_poly_using_subtype.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7708.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_7708_mismatch.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
+..\..\..\odin test ..\test_issue_7700.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index e8912b635..2d9b70b34 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -112,6 +112,7 @@ else
 	echo "SUCCESSFUL 0/1"
 	exit 1
 fi
+$ODIN test ../test_issue_7700.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON

From a7f840408ed3786003f554af2560fb330ad2e24e Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 17:01:44 +0100
Subject: [PATCH 150/215] Wait for the variants of a polymorphic union's
 instance before computing its size, alignment or tag, as it is found before
 they are checked, and laying out a struct containing it would otherwise treat
 it as empty

---
 src/types.cpp | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/src/types.cpp b/src/types.cpp
index 40e608249..61e4082af 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -2063,9 +2063,14 @@ gb_internal bool is_type_map(Type *t) {
 	return t->kind == Type_Map;
 }
 
+gb_internal void wait_for_union_variants(Type *t);
+
 gb_internal bool is_type_union_maybe_pointer(Type *t) {
 	t = base_type(t);
 	if (t == nullptr) { return false; }
+	if (t->kind == Type_Union) {
+		wait_for_union_variants(t);
+	}
 	if (t->kind == Type_Union && t->Union.variants.count == 1) {
 		Type *v = t->Union.variants[0];
 		return is_type_internally_pointer_like(v);
@@ -2077,6 +2082,9 @@ gb_internal bool is_type_union_maybe_pointer(Type *t) {
 gb_internal bool is_type_union_maybe_pointer_original_alignment(Type *t) {
 	t = base_type(t);
 	if (t == nullptr) { return false; }
+	if (t->kind == Type_Union) {
+		wait_for_union_variants(t);
+	}
 	if (t->kind == Type_Union && t->Union.variants.count == 1) {
 		Type *v = t->Union.variants[0];
 		if (is_type_internally_pointer_like(v)) {
@@ -3614,6 +3622,7 @@ gb_internal bool union_is_variant_of(Type *u, Type *v) {
 gb_internal i64 union_tag_size(Type *u) {
 	u = base_type(u);
 	GB_ASSERT(u->kind == Type_Union);
+	wait_for_union_variants(u);
 	if (u->Union.tag_size > 0) {
 		return u->Union.tag_size;
 	}
@@ -4453,6 +4462,14 @@ gb_internal void wait_for_struct_fields(Type *t) {
 	}
 }
 
+// NOTE(bill): a polymorphic union's instance is found before its variants are checked (see `check_union_type`),
+// and until then, it has none, so its size, alignment and tag would be those of an empty union
+gb_internal void wait_for_union_variants(Type *t) {
+	if (t->Union.polymorphic_parent != nullptr) {
+		wait_for_record_signal(&t->Union.variants_wait_signal, &t->Union.checking_thread);
+	}
+}
+
 gb_internal i64 type_align_of_internal(Type *t, TypePath *path) {
 	GB_ASSERT(path != nullptr);
 	if (t->failure) {
@@ -4553,6 +4570,7 @@ gb_internal i64 type_align_of_internal(Type *t, TypePath *path) {
 		return type_align_of_internal(t->Enum.base_type, path);
 
 	case Type_Union: {
+		wait_for_union_variants(t);
 		if (t->Union.variants.count == 0) {
 			return 1;
 		}
@@ -4857,6 +4875,7 @@ gb_internal i64 type_size_of_internal(Type *t, TypePath *path) {
 		return type_size_of_internal(t->Enum.base_type, path);
 
 	case Type_Union: {
+		wait_for_union_variants(t);
 		if (t->Union.variants.count == 0) {
 			return 0;
 		}

From 1d3f982b50f160d17d4b99c0ea0ed8ccebcfd5bc Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 17:10:03 +0100
Subject: [PATCH 151/215] Allow `intrinsics.procedure_of` on procedures without
 results or requiring a `context`; treat a specialized procedure's type as
 concrete

---
 src/check_builtin.cpp                         |  6 +-
 src/check_expr.cpp                            |  8 +--
 src/checker.cpp                               |  4 +-
 src/checker.hpp                               |  1 +
 src/name_canonicalization.cpp                 |  6 +-
 src/types.cpp                                 | 11 ++++
 tests/issues/run.bat                          |  1 +
 tests/issues/run.sh                           |  1 +
 tests/issues/test_issue_7700.odin             | 55 ++++++++++++++++
 tests/issues/test_issue_7708.odin             | 66 +++++++++++++++++++
 tests/issues/test_issue_7708_mismatch.odin    | 14 ++++
 .../test_issue_procedure_of_specialized.odin  | 55 ++++++++++++++++
 12 files changed, 218 insertions(+), 10 deletions(-)
 create mode 100644 tests/issues/test_issue_7700.odin
 create mode 100644 tests/issues/test_issue_7708.odin
 create mode 100644 tests/issues/test_issue_7708_mismatch.odin
 create mode 100644 tests/issues/test_issue_procedure_of_specialized.odin

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 701de7a67..8de99553c 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -8518,8 +8518,12 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 		{
 			Ast *call_expr = unparen_expr(ce->args[0]);
 			Operand op = {};
+			bool prev_in_procedure_of = c->in_procedure_of;
+			c->in_procedure_of = true;
 			check_expr_base(c, &op, ce->args[0], nullptr);
-			if (op.mode != Addressing_Value || call_expr == nullptr || call_expr->kind != Ast_CallExpr) {
+			c->in_procedure_of = prev_in_procedure_of;
+			bool is_call_mode = op.mode == Addressing_Value || op.mode == Addressing_NoValue || op.mode == Addressing_OptionalOk;
+			if (!is_call_mode || call_expr == nullptr || call_expr->kind != Ast_CallExpr) {
 				error(ce->args[0], "Expected a call expression for '%.*s'", LIT(builtin_name));
 				return false;
 			}
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 45fa8b7f7..a3bf9704f 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -4071,7 +4071,7 @@ gb_internal void check_cast(CheckerContext *c, Operand *x, Type *type, bool forb
 		// identical casts that cannot be foreseen or otherwise
 		// forbidden, so just skip them.
 		if (forbid_identical && check_vet_flags(c) & VetFlag_Cast &&
-		    (c->curr_proc_sig == nullptr || !is_type_polymorphic(c->curr_proc_sig))) {
+		    (c->curr_proc_sig == nullptr || !is_type_polymorphic_or_specialized_proc(c->curr_proc_sig))) {
 			Type *src_exact = x->type;
 			Type *dst_exact = type;
 
@@ -4212,7 +4212,7 @@ gb_internal bool check_transmute(CheckerContext *c, Ast *node, Operand *o, Type
 		// identical casts that cannot be foreseen or otherwise
 		// forbidden, so just skip them.
 		if (forbid_identical && check_vet_flags(c) & VetFlag_Cast &&
-		    (c->curr_proc_sig == nullptr || !is_type_polymorphic(c->curr_proc_sig)) &&
+		    (c->curr_proc_sig == nullptr || !is_type_polymorphic_or_specialized_proc(c->curr_proc_sig)) &&
 		    check_is_castable_to(c, &src, dst_t)) {
 			if (are_types_identical(src_t, dst_t)) {
 				gbString oper_str = expr_to_string(o->expr);
@@ -7977,7 +7977,7 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 			CheckerContext ctx = *c;
 
 			ctx.no_polymorphic_errors = true;
-			ctx.allow_polymorphic_types = is_type_polymorphic(pt);
+			ctx.allow_polymorphic_types = is_type_polymorphic_or_specialized_proc(pt);
 			ctx.hide_polymorphic_errors = true;
 
 			bool is_a_candidate = check_call_arguments_single(&ctx, call, operand,
@@ -9543,7 +9543,7 @@ gb_internal ExprKind check_call_expr(CheckerContext *c, Operand *operand, Ast *c
 	}
 	pt = base_type(pt);
 
-	if (pt->kind == Type_Proc && pt->Proc.calling_convention == ProcCC_Odin) {
+	if (pt->kind == Type_Proc && pt->Proc.calling_convention == ProcCC_Odin && !c->in_procedure_of) {
 		if ((c->scope->flags & ScopeFlag_ContextDefined) == 0) {
 			ERROR_BLOCK();
 			if (c->scope->flags & ScopeFlag_File) {
diff --git a/src/checker.cpp b/src/checker.cpp
index d9e5f208a..5b919d8a8 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -6826,8 +6826,8 @@ gb_internal void check_deferred_procedures(Checker *c) {
 			continue;
 		}
 
-		bool src_poly = is_type_polymorphic(src->type);
-		bool dst_poly = is_type_polymorphic(dst->type);
+		bool src_poly = is_type_polymorphic_or_specialized_proc(src->type);
+		bool dst_poly = is_type_polymorphic_or_specialized_proc(dst->type);
 		if (dst_poly && !src_poly) {
 			error(src->token, "A polymorphic deferred procedure '%.*s' requires the initial procedure '%.*s' to be polymorphic as well", LIT(dst->token.string), LIT(src->token.string));
 			continue;
diff --git a/src/checker.hpp b/src/checker.hpp
index 300395fb2..6c91c2b91 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -878,6 +878,7 @@ struct CheckerContext {
 	u32        stmt_flags;
 	bool       in_enum_type;
 	bool       in_proc_group;
+	bool       in_procedure_of;
 	bool       allow_polymorphic_types;
 	bool       disallow_polymorphic_return_types; // NOTE(zen3ger): no poly type decl in return types
 	bool       no_polymorphic_errors;
diff --git a/src/name_canonicalization.cpp b/src/name_canonicalization.cpp
index 46bf5fb31..c93c4fc8b 100644
--- a/src/name_canonicalization.cpp
+++ b/src/name_canonicalization.cpp
@@ -658,7 +658,7 @@ gb_internal void write_canonical_parent_prefix(TypeWriter *w, Entity *e) {
 			Entity *p = e->parent_proc_decl.load(std::memory_order_relaxed)->entity;
 			write_canonical_parent_prefix(w, p);
 			type_writer_append(w, p->token.string.text, p->token.string.len);
-			if (is_type_polymorphic(p->type)) {
+			if (is_type_polymorphic_or_specialized_proc(p->type)) {
 				type_writer_appendc(w, CANONICAL_TYPE_SEPARATOR);
 				write_type_to_canonical_string(w, p->type);
 			}
@@ -688,7 +688,7 @@ gb_internal void write_canonical_parent_prefix(TypeWriter *w, Entity *e) {
 		type_writer_append(w, e->token.string.text, e->token.string.len);
 	}
 
-	if (is_type_polymorphic(e->type)) {
+	if (is_type_polymorphic_or_specialized_proc(e->type)) {
 		type_writer_appendc(w, CANONICAL_TYPE_SEPARATOR);
 		write_type_to_canonical_string(w, e->type);
 	}
@@ -828,7 +828,7 @@ write_base_name:
 	case Entity_AsmTemplate:
 	case Entity_Variable:
 		type_writer_append(w, e->token.string.text, e->token.string.len);
-		if (is_type_polymorphic(e->type)) {
+		if (is_type_polymorphic_or_specialized_proc(e->type)) {
 			type_writer_appendc(w, CANONICAL_TYPE_SEPARATOR);
 			write_type_to_canonical_string(w, e->type);
 		}
diff --git a/src/types.cpp b/src/types.cpp
index 40e608249..72210bbcf 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -2609,6 +2609,9 @@ gb_internal bool is_type_polymorphic(Type *t, bool or_specialized=false) {
 		break;
 
 	case Type_Proc:
+		if (t->Proc.is_poly_specialized) {
+			return or_specialized;
+		}
 		if (t->Proc.is_polymorphic) {
 			return true;
 		}
@@ -2680,6 +2683,14 @@ gb_internal bool is_type_polymorphic(Type *t, bool or_specialized=false) {
 	return false;
 }
 
+// e.g. to name a procedure after its specialization
+gb_internal bool is_type_polymorphic_or_specialized_proc(Type *t) {
+	if (t != nullptr && t->kind == Type_Proc && t->Proc.is_poly_specialized) {
+		return true;
+	}
+	return is_type_polymorphic(t);
+}
+
 
 gb_internal bool type_has_nil(Type *t) {
 	t = base_type(t);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index a8d9a2b64..4beb41ee6 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -87,6 +87,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_7708.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_7708_mismatch.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
 ..\..\..\odin test ..\test_issue_7700.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_procedure_of_specialized.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 2d9b70b34..89ccbc2bd 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -113,6 +113,7 @@ else
 	exit 1
 fi
 $ODIN test ../test_issue_7700.odin $COMMON
+$ODIN test ../test_issue_procedure_of_specialized.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON
diff --git a/tests/issues/test_issue_7700.odin b/tests/issues/test_issue_7700.odin
new file mode 100644
index 000000000..aac7dbf5c
--- /dev/null
+++ b/tests/issues/test_issue_7700.odin
@@ -0,0 +1,55 @@
+// Tests issue #7700 https://github.com/odin-lang/Odin/issues/7700
+// A field of a constant `#soa` array is the array of that field of each element
+package test_issues
+
+import "base:intrinsics"
+import "core:fmt"
+import "core:testing"
+
+Field :: struct { name: string, type: typeid, n: int }
+
+F1 :: Field{"x", int, 7}
+
+STUFF  :: #soa[3]Field{{"i", i64, 1}, {"f", f64, 2}, {"p", rawptr, 3}}
+NAMED  :: #soa[3]Field{{name = "a"}, {type = f32, n = 2}, {name = "c", type = bool}}
+GAPS   :: #soa[4]Field{1 = {"b", u8, 1}, 3 = {"d", u16, 3}}
+RANGES :: #soa[4]Field{0..<2 = {"r", i8, 5}, 3 = F1}
+VECS   :: #soa[3][2]f32{{1, 2}, {3, 4}, {5, 6}}
+
+Strings :: struct($strings: [3]string) {}
+Types   :: struct($types: [3]typeid) {}
+
+strings_proc :: proc($s: [3]string) -> [3]string { return s }
+types_proc   :: proc($t: [3]typeid) -> [3]typeid { return t }
+
+#assert(STUFF.name[1] == "f")
+#assert(STUFF.n[2] == 3)
+#assert(Types(STUFF.type) == Types([3]typeid{i64, f64, rawptr}))
+#assert(Types([3]typeid{i64, f64, rawptr}) != Types([3]typeid{int, int, int}))
+
+@(test)
+test_issue_7700 :: proc(t: ^testing.T) {
+	testing.expect_value(t, fmt.tprint(typeid_of(Strings(STUFF.name))), `Strings($strings={"i", "f", "p"})`)
+	testing.expect_value(t, fmt.tprint(typeid_of(Types(STUFF.type))), `Types($types={i64, f64, rawptr})`)
+	testing.expect_value(t, intrinsics.type_canonical_name(Strings(STUFF.name)), `test_issues::Strings(strings:$${"i","f","p"})`)
+	testing.expect_value(t, intrinsics.type_canonical_name(Types(STUFF.type)), `test_issues::Types(types:$${i64,f64,rawptr})`)
+
+	testing.expect_value(t, STUFF.name, [3]string{"i", "f", "p"})
+	testing.expect_value(t, STUFF.type, [3]typeid{i64, f64, rawptr})
+	testing.expect_value(t, STUFF.n, [3]int{1, 2, 3})
+	testing.expect_value(t, strings_proc(STUFF.name), [3]string{"i", "f", "p"})
+	testing.expect_value(t, types_proc(STUFF.type), [3]typeid{i64, f64, rawptr})
+
+	testing.expect_value(t, NAMED.name, [3]string{"a", "", "c"})
+	testing.expect_value(t, NAMED.type, [3]typeid{nil, f32, bool})
+	testing.expect_value(t, NAMED.n, [3]int{0, 2, 0})
+
+	testing.expect_value(t, GAPS.name, [4]string{"", "b", "", "d"})
+	testing.expect_value(t, GAPS.type, [4]typeid{nil, u8, nil, u16})
+
+	testing.expect_value(t, RANGES.name, [4]string{"r", "r", "", "x"})
+	testing.expect_value(t, RANGES.n, [4]int{5, 5, 0, 7})
+
+	testing.expect_value(t, VECS.x, [3]f32{1, 3, 5})
+	testing.expect_value(t, VECS.y, [3]f32{2, 4, 6})
+}
diff --git a/tests/issues/test_issue_7708.odin b/tests/issues/test_issue_7708.odin
new file mode 100644
index 000000000..e0ce853b6
--- /dev/null
+++ b/tests/issues/test_issue_7708.odin
@@ -0,0 +1,66 @@
+// Tests issue #7708 https://github.com/odin-lang/Odin/issues/7708
+// A record's concrete constant parameters must match, e.g. `M(1, 1, $T)` does not take a `M(3, 3, f64)`
+package test_issues
+
+import "core:testing"
+
+M :: struct($R, $C: int, $T: typeid) { data: [C][R]T }
+
+m11 :: proc(m: M(1, 1, $T)) -> int { return 11 }
+m33 :: proc(m: M(3, 3, $T)) -> int { return 33 }
+m_group :: proc{m11, m33}
+
+m_forward :: proc(m: M($R, $C, $T)) -> int { return m_group(m) }
+
+c11 :: proc(m: $X/M(1, 1, $T)) -> int { return 11 }
+c33 :: proc(m: $X/M(3, 3, $T)) -> int { return 33 }
+c_group :: proc{c11, c33}
+
+p11 :: proc(m: ^M(1, 1, $T)) -> int { return 11 }
+p33 :: proc(m: ^M(3, 3, $T)) -> int { return 33 }
+p_group :: proc{p11, p33}
+
+Kind :: enum { A, B }
+E :: struct($K: Kind, $T: typeid) { x: T }
+ea :: proc(e: E(.A, $T)) -> int { return 1 }
+eb :: proc(e: E(.B, $T)) -> int { return 2 }
+e_group :: proc{ea, eb}
+
+S :: struct($N: string, $T: typeid) { x: T }
+sa :: proc(s: S("a", $T)) -> int { return 1 }
+sb :: proc(s: S("b", $T)) -> int { return 2 }
+s_group :: proc{sa, sb}
+
+U :: union($N: int, $T: typeid) { [N]T }
+u1 :: proc(u: U(1, $T)) -> int { return 1 }
+u2 :: proc(u: U(2, $T)) -> int { return 2 }
+u_group :: proc{u1, u2}
+
+@(test)
+test_issue_7708 :: proc(t: ^testing.T) {
+	a: M(1, 1, i32)
+	b: M(3, 3, f64)
+	testing.expect_value(t, m_group(a), 11)
+	testing.expect_value(t, m_group(b), 33)
+	testing.expect_value(t, m_forward(a), 11)
+	testing.expect_value(t, m_forward(b), 33)
+	testing.expect_value(t, c_group(a), 11)
+	testing.expect_value(t, c_group(b), 33)
+	testing.expect_value(t, p_group(&a), 11)
+	testing.expect_value(t, p_group(&b), 33)
+
+	ea_: E(.A, int)
+	eb_: E(.B, int)
+	testing.expect_value(t, e_group(ea_), 1)
+	testing.expect_value(t, e_group(eb_), 2)
+
+	sa_: S("a", int)
+	sb_: S("b", int)
+	testing.expect_value(t, s_group(sa_), 1)
+	testing.expect_value(t, s_group(sb_), 2)
+
+	u1_: U(1, int)
+	u2_: U(2, int)
+	testing.expect_value(t, u_group(u1_), 1)
+	testing.expect_value(t, u_group(u2_), 2)
+}
diff --git a/tests/issues/test_issue_7708_mismatch.odin b/tests/issues/test_issue_7708_mismatch.odin
new file mode 100644
index 000000000..cc812b3a2
--- /dev/null
+++ b/tests/issues/test_issue_7708_mismatch.odin
@@ -0,0 +1,14 @@
+// Tests issue #7708 https://github.com/odin-lang/Odin/issues/7708
+// A record argument whose constant parameters differ from the parameter's must be rejected
+package test_issues
+
+M :: struct($R, $C: int, $T: typeid) { data: [C][R]T }
+
+m11 :: proc(m: M(1, 1, $T)) -> int { return 11 }
+c11 :: proc(m: $X/M(1, 1, $T)) -> int { return 11 }
+
+main :: proc() {
+	m: M(3, 3, f64)
+	_ = m11(m)
+	_ = c11(m)
+}
diff --git a/tests/issues/test_issue_procedure_of_specialized.odin b/tests/issues/test_issue_procedure_of_specialized.odin
new file mode 100644
index 000000000..cdd888f4a
--- /dev/null
+++ b/tests/issues/test_issue_procedure_of_specialized.odin
@@ -0,0 +1,55 @@
+// `intrinsics.procedure_of` of a polymorphic call: procedures without results, any calling convention,
+// and the specialized procedure is a concrete value usable through `type_of`
+package test_issues
+
+import "base:intrinsics"
+import "core:fmt"
+import "core:testing"
+
+without_return :: proc "contextless" ($i: int) {}
+without_return_1 :: intrinsics.procedure_of(without_return(1))
+
+with_return :: proc "contextless" ($i: int) -> int { return i }
+with_return_1 :: intrinsics.procedure_of(with_return(1))
+with_return_1_type :: type_of(with_return_1)
+
+contextfull :: proc($i: int) -> int { return i }
+global_contextfull_1 :: intrinsics.procedure_of(contextfull(1))
+
+double :: proc(x: $T) -> T { return x * 2 }
+double_int :: intrinsics.procedure_of(double(int(0)))
+double_f32 :: intrinsics.procedure_of(double(f32(0)))
+
+Holder :: struct {
+	f: type_of(double_int),
+	g: [2]type_of(double_f32),
+}
+
+@(test)
+test_procedure_of_specialized :: proc(t: ^testing.T) {
+	main_contextfull_2 :: intrinsics.procedure_of(contextfull(2))
+
+	without_return_1()
+	testing.expect_value(t, with_return_1(), 1)
+	testing.expect_value(t, global_contextfull_1(), 1)
+	testing.expect_value(t, main_contextfull_2(), 2)
+
+	f: with_return_1_type = with_return_1
+	testing.expect_value(t, f(), 1)
+
+	g := double_int
+	testing.expect_value(t, g(21), 42)
+	testing.expect(t, type_of(double_int) != type_of(double_f32))
+
+	h := Holder{double_int, {double_f32, double_f32}}
+	testing.expect_value(t, h.f(4), 8)
+	testing.expect_value(t, h.g[1](1.5), 3)
+
+	fs: [dynamic]type_of(double_int)
+	defer delete(fs)
+	append(&fs, double_int)
+	testing.expect_value(t, fs[0](5), 10)
+
+	testing.expect_value(t, fmt.tprint(typeid_of(type_of(double_int))), "proc(int) -> int")
+	testing.expect(t, fmt.tprint(double_int) != "")
+}

From 63d28377bbb00d1d20cab80e8a2bf8808789db0c Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 17:22:15 +0100
Subject: [PATCH 152/215] Pass a copy of a value within a packed struct to a
 procedure by reference when its address is not known to be aligned to its
 type, and lower the alignment of loads and stores to that known from the GEPs
 leading to their address

---
 src/llvm_backend_general.cpp                  | 92 ++++++++++++++++++-
 src/llvm_backend_utility.cpp                  | 12 ++-
 tests/issues/run.bat                          |  1 +
 tests/issues/run.sh                           |  1 +
 .../test_issue_packed_field_by_value.odin     | 31 +++++++
 5 files changed, 132 insertions(+), 5 deletions(-)
 create mode 100644 tests/issues/test_issue_packed_field_by_value.odin

diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index d7a663e53..937bd1db7 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -1221,6 +1221,86 @@ gb_internal bool lb_try_vector_cast(lbModule *m, lbValue ptr, LLVMTypeRef *vecto
 	return false;
 }
 
+gb_internal u64 lb_gcd_u64(u64 a, u64 b) {
+	while (b != 0) {
+		u64 t = a % b;
+		a = b;
+		b = t;
+	}
+	return a;
+}
+
+gb_internal u64 lb_known_address_alignment(lbModule *m, LLVMValueRef ptr, u64 assumed) {
+	// NOTE(bill): The alignment an address is known to have from the GEPs leading to it: within a local or a global, that
+	// of its offset from it, and none beyond a field of a packed struct, or that a struct caps its fields to, as marked on
+	// the GEP of the field. Of an address within anything else, it is `assumed`, i.e. that of the type it points to.
+
+	LLVMTargetDataRef td = LLVMGetModuleDataLayout(m->mod);
+	u64 offsets = 0;
+	for (isize depth = 0; ptr != nullptr && depth < 64; depth++) {
+		if (LLVMIsAAllocaInst(ptr) || LLVMIsAGlobalVariable(ptr)) {
+			u64 base = LLVMGetAlignment(ptr);
+			if (base == 0) {
+				base = LLVMABIAlignmentOfType(td, LLVMIsAAllocaInst(ptr) ? LLVMGetAllocatedType(ptr) : LLVMGlobalGetValueType(ptr));
+			}
+			return offsets ? lb_gcd_u64(base, offsets) : base;
+		}
+
+		bool is_instruction = LLVMIsAGetElementPtrInst(ptr) != nullptr;
+		if (!is_instruction && !(LLVMIsAConstantExpr(ptr) && LLVMGetConstOpcode(ptr) == LLVMGetElementPtr)) {
+			break;
+		}
+		if (is_instruction) {
+			if (lb_get_metadata_custom_u64(m, ptr, ODIN_METADATA_IS_PACKED)) {
+				return 1;
+			}
+			u64 max_align = lb_get_metadata_custom_u64(m, ptr, ODIN_METADATA_MAX_ALIGN);
+			if (max_align != 0) {
+				assumed = gb_min(assumed, max_align);
+			}
+		}
+
+		LLVMTypeRef t = LLVMGetGEPSourceElementType(ptr);
+		unsigned index_count = LLVMGetNumIndices(ptr);
+		for (unsigned i = 0; i < index_count; i++) {
+			LLVMValueRef index = LLVMGetOperand(ptr, i+1);
+			u64 stride = 0;
+			if (i == 0) {
+				stride = LLVMABISizeOfType(td, t);
+			} else if (LLVMGetTypeKind(t) == LLVMStructTypeKind) {
+				if (!LLVMIsAConstantInt(index)) {
+					return 1;
+				}
+				unsigned field = cast(unsigned)LLVMConstIntGetZExtValue(index);
+				offsets = lb_gcd_u64(offsets, LLVMOffsetOfElement(td, t, field));
+				t = LLVMStructGetTypeAtIndex(t, field);
+				continue;
+			} else if (LLVMGetTypeKind(t) == LLVMArrayTypeKind || LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
+				t = LLVMGetElementType(t);
+				stride = LLVMABISizeOfType(td, t);
+			} else {
+				return 1;
+			}
+			if (LLVMIsAConstantInt(index)) {
+				i64 k = LLVMConstIntGetSExtValue(index);
+				offsets = lb_gcd_u64(offsets, cast(u64)(k < 0 ? -k : k) * stride);
+			} else {
+				offsets = lb_gcd_u64(offsets, stride);
+			}
+		}
+		ptr = LLVMGetOperand(ptr, 0);
+	}
+	return offsets ? lb_gcd_u64(assumed, offsets) : assumed;
+}
+
+gb_internal void lb_lower_store_alignment_to_known(lbProcedure *p, LLVMValueRef store, LLVMValueRef ptr) {
+	u64 align = LLVMGetAlignment(store);
+	u64 known = lb_known_address_alignment(p->module, ptr, align);
+	if (known < align) {
+		LLVMSetAlignment(store, cast(unsigned)known);
+	}
+}
+
 gb_internal LLVMValueRef OdinLLVMBuildLoad(lbProcedure *p, LLVMTypeRef type, LLVMValueRef value) {
 	LLVMValueRef result = LLVMBuildLoad2(p->builder, type, value, "");
 
@@ -1244,6 +1324,12 @@ gb_internal LLVMValueRef OdinLLVMBuildLoad(lbProcedure *p, LLVMTypeRef type, LLV
 		LLVMSetAlignment(result, (unsigned int)align);
 	}
 
+	u64 align = LLVMGetAlignment(result);
+	u64 known = lb_known_address_alignment(p->module, value, align);
+	if (known < align) {
+		LLVMSetAlignment(result, cast(unsigned)known);
+	}
+
 	return result;
 }
 
@@ -1692,7 +1778,8 @@ gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 		} else if (is_type_bit_set(a)) {
 			lb_mem_zero_ptr(p, ptr.value, a, 1);
 		} else if (lb_sizeof(src_t) <= lb_max_zero_init_size()) {
-			LLVMBuildStore(p->builder, LLVMConstNull(src_t), ptr.value);
+			LLVMValueRef store = LLVMBuildStore(p->builder, LLVMConstNull(src_t), ptr.value);
+			lb_lower_store_alignment_to_known(p, store, ptr.value);
 		} else {
 			lb_mem_zero_ptr(p, ptr.value, a, 1);
 		}
@@ -1759,6 +1846,9 @@ gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 		}
 		instr = LLVMBuildStore(p->builder, value.value, ptr.value);
 	}
+	if (instr != nullptr) {
+		lb_lower_store_alignment_to_known(p, instr, ptr.value);
+	}
 	// LLVMSetVolatile(instr, p->in_multi_assignment);
 }
 
diff --git a/src/llvm_backend_utility.cpp b/src/llvm_backend_utility.cpp
index 430677aa3..3a9a74415 100644
--- a/src/llvm_backend_utility.cpp
+++ b/src/llvm_backend_utility.cpp
@@ -995,10 +995,14 @@ gb_internal lbAddr lb_find_or_generate_context_ptr(lbProcedure *p) {
 
 gb_internal lbValue lb_address_from_load_or_generate_local(lbProcedure *p, lbValue value) {
 	if (!p->in_multi_assignment && LLVMIsALoadInst(value.value)) {
-		lbValue res = {};
-		res.value = LLVMGetOperand(value.value, 0);
-		res.type = alloc_type_pointer(value.type);
-		return res;
+		LLVMValueRef ptr = LLVMGetOperand(value.value, 0);
+		u64 align = cast(u64)type_align_of(value.type);
+		if (lb_known_address_alignment(p->module, ptr, align) >= align) {
+			lbValue res = {};
+			res.value = ptr;
+			res.type = alloc_type_pointer(value.type);
+			return res;
+		}
 	}
 
 	GB_ASSERT(is_type_typed(value.type));
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 443028dc5..157b50a6f 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -85,6 +85,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_7566.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_poly_using_subtype.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_global_proc_lits.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_packed_field_by_value.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index a1ad01264..58619a6af 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -106,6 +106,7 @@ $ODIN test ../test_issue_7316.odin $COMMON
 $ODIN test ../test_issue_7566.odin $COMMON
 $ODIN test ../test_issue_poly_using_subtype.odin $COMMON
 $ODIN test ../test_issue_global_proc_lits.odin $COMMON
+$ODIN test ../test_issue_packed_field_by_value.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON
diff --git a/tests/issues/test_issue_packed_field_by_value.odin b/tests/issues/test_issue_packed_field_by_value.odin
new file mode 100644
index 000000000..247f250a9
--- /dev/null
+++ b/tests/issues/test_issue_packed_field_by_value.odin
@@ -0,0 +1,31 @@
+// A value within a packed struct, passed to a procedure by reference, is passed by an address as aligned as its type
+package test_issues
+
+import "core:testing"
+
+Packed_Field_S :: struct { x: union { int, string }, y: u128 }
+Packed_Field_P :: struct #packed { pad: u8, s: Packed_Field_S, arr: [2]Packed_Field_S }
+
+// the address a value parameter is passed by
+packed_field_address :: proc(s: Packed_Field_S) -> uintptr {
+	a: any = s
+	return uintptr(a.data)
+}
+
+packed_field_global: Packed_Field_P
+
+@(test)
+test_packed_field_by_value :: proc(t: ^testing.T) {
+	p := Packed_Field_P{s = {x = 1, y = 2}, arr = {{x = 3}, {x = "four", y = 5}}}
+	packed_field_global = p
+
+	A :: align_of(Packed_Field_S)
+	testing.expect_value(t, packed_field_address(p.s)                        % A, 0)
+	testing.expect_value(t, packed_field_address(p.arr[1])                   % A, 0)
+	testing.expect_value(t, packed_field_address(packed_field_global.s)      % A, 0)
+	testing.expect_value(t, packed_field_address(packed_field_global.arr[1]) % A, 0)
+
+	testing.expect_value(t, p.s,                        Packed_Field_S{x = 1, y = 2})
+	testing.expect_value(t, p.arr[1],                   Packed_Field_S{x = "four", y = 5})
+	testing.expect_value(t, packed_field_global.arr[0], Packed_Field_S{x = 3})
+}

From 3b8e53a991f201fc7495876521e6ba04f4ac2418 Mon Sep 17 00:00:00 2001
From: Louis Novy <101842021+louisnovy@users.noreply.github.com>
Date: Fri, 2 Oct 2026 13:39:33 -0400
Subject: [PATCH 153/215] Handle globals initialized with the address of a non
 constant literal

---
 src/llvm_backend_expr.cpp                     |  4 ++-
 tests/issues/run.bat                          |  1 +
 tests/issues/run.sh                           |  1 +
 .../test_issue_global_address_of_literal.odin | 36 +++++++++++++++++++
 4 files changed, 41 insertions(+), 1 deletion(-)
 create mode 100644 tests/issues/test_issue_global_address_of_literal.odin

diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index f7096b795..acb1a8ca0 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -4365,7 +4365,9 @@ gb_internal lbValue lb_build_unary_and(lbProcedure *p, Ast *expr) {
 		Type *type = v.type;
 		lbAddr addr = {};
 		if (p->is_startup) {
-			addr = lb_add_global_generated_from_procedure(p, type, v);
+			// NOTE: only a constant can be the global's initializer, any other value is written by the store below
+			lbValue initializer = LLVMIsConstant(v.value) ? v : lbValue{};
+			addr = lb_add_global_generated_from_procedure(p, type, initializer);
 		} else {
 			addr = lb_add_local_generated(p, type, false);
 		}
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index d01507e36..812952fbb 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -44,6 +44,7 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused
 ..\..\..\odin test ..\test_issue_6951_5214.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_6979.odin -no-entry-point %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7008.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_global_address_of_literal.odin %COMMON%  || exit /b
 ..\..\..\odin check ..\test_issue_7012.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin check ..\test_issue_7260.odin -no-entry-point %COMMON% || exit /b
 ..\..\..\odin test ..\test_issue_bool_to_be_conversion.odin %COMMON%  || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 4302577d5..95e06f526 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -97,6 +97,7 @@ fi
 $ODIN test ../test_issue_6951_5214.odin $COMMON
 $ODIN check ../test_issue_6979.odin -no-entry-point $COMMON_CHECK
 $ODIN test ../test_issue_7008.odin $COMMON
+$ODIN test ../test_issue_global_address_of_literal.odin $COMMON
 $ODIN check ../test_issue_7012.odin -no-entry-point $COMMON_CHECK
 $ODIN build ../test_issue_7037.odin $COMMON -o:none
 $ODIN test ../test_issue_7477_7506.odin $COMMON
diff --git a/tests/issues/test_issue_global_address_of_literal.odin b/tests/issues/test_issue_global_address_of_literal.odin
new file mode 100644
index 000000000..041bacaca
--- /dev/null
+++ b/tests/issues/test_issue_global_address_of_literal.odin
@@ -0,0 +1,36 @@
+// A global initialized with the address of a compound literal used to crash the backend
+// if the literal's value was not a constant.
+package test_issues
+
+import "core:testing"
+
+Holder     :: struct { target: ^int }
+Outer      :: struct { inner: ^Inner }
+Inner      :: struct { value: int }
+Type       :: struct { variant: union { Array_Type } }
+Array_Type :: struct { elem: ^Type }
+
+initial_value :: proc "contextless" () -> int { return 42 }
+
+number := 7
+
+address_of_global := &Holder{target = &number}         // https://github.com/odin-lang/Odin/issues/4337
+nested_literal    := &Outer{inner = &Inner{value = 3}} // https://github.com/odin-lang/Odin/issues/5950
+value_from_call   := &Inner{value = initial_value()}   // https://github.com/odin-lang/Odin/issues/3995
+union_variant     := &Type{variant = Array_Type{}}     // https://github.com/odin-lang/Odin/issues/7197
+dynamic_array     := &[dynamic]int{}                   // https://github.com/odin-lang/Odin/issues/7640
+
+@(test)
+global_address_of_literal :: proc(t: ^testing.T) {
+	testing.expect(t, address_of_global.target == &number)
+	testing.expect_value(t, address_of_global.target^, 7)
+	testing.expect_value(t, nested_literal.inner.value, 3)
+	testing.expect_value(t, value_from_call.value, 42)
+
+	_, is_array := union_variant.variant.(Array_Type)
+	testing.expect(t, is_array)
+
+	append(dynamic_array, 1)
+	defer delete(dynamic_array^)
+	testing.expect_value(t, len(dynamic_array), 1)
+}

From 735b2c706016665965406825c4ebd634cd2a6619 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 22:49:26 +0100
Subject: [PATCH 154/215] Pass a copy of a packed struct's field by reference
 when it may be under-aligned; lower load and store alignment to that known

---
 src/llvm_backend.hpp         |  9 +++++++++
 src/llvm_backend_general.cpp |  3 +++
 src/llvm_backend_utility.cpp | 19 +++++++++++++++++--
 3 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index eb93b7919..961c2bda7 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -108,6 +108,11 @@ struct lbPadType {
 	LLVMTypeRef type;
 };
 
+struct NamedMetaDataKind {
+	String   name;
+	unsigned kind;
+};
+
 struct lbModule {
 	LLVMModuleRef mod;
 	LLVMContextRef ctx;
@@ -124,6 +129,9 @@ struct lbModule {
 	AstFile *file;   // possibly associated
 	char const *module_name;
 
+	NamedMetaDataKind metadata_kinds[4];
+	isize metadata_kind_count;
+
 	PtrMap<u64/*type hash*/, LLVMTypeRef>  types;                  // mutex: types_mutex
 	PtrMap<void *, lbStructFieldRemapping> struct_field_remapping; // Key: LLVMTypeRef or Type *, mutex: types_mutex
 	PtrMap<u64/*type hash*/, LLVMTypeRef>  func_raw_types;         // mutex: func_raw_types_mutex
@@ -651,6 +659,7 @@ gb_internal lbValue lb_make_string_value(lbProcedure *p, Type *string_type, lbVa
 gb_internal String lb_internal_gen_name_from_type(char const *prefix, Type *type);
 
 
+gb_internal unsigned lb_metadata_kind(lbModule *m, String const &name);
 gb_internal void lb_set_metadata_custom_u64(lbModule *m, LLVMValueRef v_ref, String name, u64 value);
 gb_internal u64 lb_get_metadata_custom_u64(lbModule *m, LLVMValueRef v_ref, String name);
 
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 937bd1db7..a8f31afdf 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -93,6 +93,9 @@ gb_internal WORKER_TASK_PROC(lb_init_module_worker_proc) {
 
 	m->module_name = module_name;
 	m->ctx = LLVMContextCreate();
+	lb_metadata_kind(m, ODIN_METADATA_IS_PACKED);
+	lb_metadata_kind(m, ODIN_METADATA_MIN_ALIGN);
+	lb_metadata_kind(m, ODIN_METADATA_MAX_ALIGN);
 	LLVMContextSetDiagnosticHandler(m->ctx, lb_llvm_diagnostic_handler, nullptr);
 	m->mod = LLVMModuleCreateWithNameInContext(m->module_name, m->ctx);
 	// m->debug_builder = nullptr;
diff --git a/src/llvm_backend_utility.cpp b/src/llvm_backend_utility.cpp
index 3a9a74415..19b203e3c 100644
--- a/src/llvm_backend_utility.cpp
+++ b/src/llvm_backend_utility.cpp
@@ -59,14 +59,29 @@ gb_internal lbValue lb_correct_endianness(lbProcedure *p, lbValue value) {
 }
 
 
+gb_internal unsigned lb_metadata_kind(lbModule *m, String const &name) {
+	for (isize i = 0; i < m->metadata_kind_count; i++) {
+		if (m->metadata_kinds[i].name == name) {
+			return m->metadata_kinds[i].kind;
+		}
+	}
+	unsigned kind = LLVMGetMDKindIDInContext(m->ctx, cast(char const *)name.text, cast(unsigned)name.len);
+	if (m->metadata_kind_count < gb_count_of(m->metadata_kinds)) {
+		m->metadata_kinds[m->metadata_kind_count].name = name;
+		m->metadata_kinds[m->metadata_kind_count].kind = kind;
+		m->metadata_kind_count += 1;
+	}
+	return kind;
+}
+
 gb_internal void lb_set_metadata_custom_u64(lbModule *m, LLVMValueRef v_ref, String name, u64 value) {
-	unsigned md_id = LLVMGetMDKindIDInContext(m->ctx, cast(char const *)name.text, cast(unsigned)name.len);
+	unsigned md_id = lb_metadata_kind(m, name);
 	LLVMMetadataRef md = LLVMValueAsMetadata(LLVMConstInt(lb_type(m, t_u64), value, false));
 	LLVMValueRef node = LLVMMetadataAsValue(m->ctx, LLVMMDNodeInContext2(m->ctx, &md, 1));
 	LLVMSetMetadata(v_ref, md_id, node);
 }
 gb_internal u64 lb_get_metadata_custom_u64(lbModule *m, LLVMValueRef v_ref, String name) {
-	unsigned md_id = LLVMGetMDKindIDInContext(m->ctx, cast(char const *)name.text, cast(unsigned)name.len);
+	unsigned md_id = lb_metadata_kind(m, name);
 	LLVMValueRef v_md = LLVMGetMetadata(v_ref, md_id);
 	if (v_md == nullptr) {
 		return 0;

From c628768c5efc54fdfa37e9c99ddcbfc9acf10c90 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 23:11:13 +0100
Subject: [PATCH 155/215] Strip constant parameters from specialized procedure
 types; fix calling a parenthesized polymorphic callee

---
 src/check_expr.cpp                            | 83 +++++++++++++++----
 src/checker.cpp                               |  9 +-
 src/llvm_backend_proc.cpp                     | 15 +++-
 src/llvm_backend_stmt.cpp                     | 12 +--
 src/name_canonicalization.cpp                 | 12 +--
 .../issues/test_issue_paren_poly_callee.odin  | 23 +++++
 6 files changed, 126 insertions(+), 28 deletions(-)
 create mode 100644 tests/issues/test_issue_paren_poly_callee.odin

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index a3bf9704f..6aedd7d17 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -532,6 +532,42 @@ gb_internal u64 proc_type_identity_hash(Type *t) {
 	return h;
 }
 
+gb_internal Type *strip_poly_specialized_proc_type(Type *full) {
+	TypeProc *fp = &full->Proc;
+	auto vars = array_make<Entity *>(permanent_allocator(), 0, fp->param_count);
+	i32 variadic_index = -1;
+	if (fp->params != nullptr) {
+		for_array(i, fp->params->Tuple.variables) {
+			Entity *e = fp->params->Tuple.variables[i];
+			if (e->kind != Entity_Variable) {
+				continue;
+			}
+			if (fp->variadic && i == fp->variadic_index) {
+				variadic_index = cast(i32)vars.count;
+			}
+			array_add(&vars, e);
+		}
+	}
+	Type *params = nullptr;
+	if (vars.count > 0) {
+		params = alloc_type_tuple();
+		params->Tuple.variables = slice_from_array(vars);
+	}
+
+	Type *t = alloc_type_proc(fp->scope, params, vars.count, fp->results, fp->result_count, false, fp->calling_convention);
+	t->Proc.variadic               = fp->variadic;
+	t->Proc.variadic_index         = variadic_index;
+	t->Proc.require_results        = fp->require_results;
+	t->Proc.c_vararg               = fp->c_vararg;
+	t->Proc.has_named_results      = fp->has_named_results;
+	t->Proc.diverging              = fp->diverging;
+	t->Proc.return_by_pointer      = fp->return_by_pointer;
+	t->Proc.optional_ok            = fp->optional_ok;
+	t->Proc.enable_target_feature  = fp->enable_target_feature;
+	t->Proc.require_target_feature = fp->require_target_feature;
+	return t;
+}
+
 // Reuse an existing generated specialization `other`, scheduling its body if unchecked.
 // Caller must have released gen_procs->mutex first.
 gb_internal bool reuse_gen_polymorphic_procedure(Checker *checker, Entity *other, Ast *poly_def_node, PolyProcData *poly_proc_data) {
@@ -545,7 +581,7 @@ gb_internal bool reuse_gen_polymorphic_procedure(Checker *checker, Entity *other
 		proc_info->file  = other->file;
 		proc_info->token = other->token;
 		proc_info->decl  = decl;
-		proc_info->type  = other->type;
+		proc_info->type  = proc_entity_full_type(other);
 		proc_info->body  = decl->proc_lit->ProcLit.body;
 		proc_info->tags  = other->Procedure.tags;
 		proc_info->generated_from_polymorphic = true;
@@ -580,7 +616,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 
 	String name = base_entity->token.string;
 
-	Type *src = base_type(base_entity->type);
+	Type *src = base_type(proc_entity_full_type(base_entity));
 	Type *dst = nullptr;
 	if (type != nullptr) {
 		dst = base_type(type);
@@ -596,7 +632,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	if (!src->Proc.is_polymorphic || src->Proc.is_poly_specialized) {
 		// NOTE: polymorphic procedure check not idempotent without this
 		if (src->Proc.is_poly_specialized && base_entity->Procedure.generated_from_polymorphic) {
-			if (are_types_identical(src, dst)) {
+			if (are_types_identical(src, dst) || are_types_identical(base_type(base_entity->type), dst)) {
 				if (poly_proc_data) {
 					poly_proc_data->gen_entity = base_entity;
 				}
@@ -688,7 +724,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 				continue;
 			}
 			Entity *other = gen_procs->procs[i];
-			Type *pt = base_type(other->type);
+			Type *pt = base_type(proc_entity_full_type(other));
 			if (are_types_identical(pt, final_proc_type)) {
 				rw_mutex_shared_unlock(&gen_procs->mutex); // @local-mutex
 
@@ -734,7 +770,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 				continue;
 			}
 			Entity *other = gen_procs->procs[i];
-			Type *pt = base_type(other->type);
+			Type *pt = base_type(proc_entity_full_type(other));
 			if (are_types_identical(pt, final_proc_type)) {
 				rw_mutex_shared_unlock(&gen_procs->mutex); // @local-mutex
 				return reuse_gen_polymorphic_procedure(nctx.checker, other, poly_def_node, poly_proc_data);
@@ -750,7 +786,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	rw_mutex_lock(&gen_procs->mutex); // @local-mutex
 	for_array(i, gen_procs->procs) {
 		Entity *other = gen_procs->procs[i];
-		if (gen_procs->hashes[i] == final_hash && are_types_identical(base_type(other->type), final_proc_type)) {
+		if (gen_procs->hashes[i] == final_hash && are_types_identical(base_type(proc_entity_full_type(other)), final_proc_type)) {
 			rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
 			return reuse_gen_polymorphic_procedure(nctx.checker, other, poly_def_node, poly_proc_data);
 		}
@@ -795,7 +831,11 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	d->defer_use_checked = false;
 	d->para_poly_original = old_decl->entity;
 
-	Entity *entity = alloc_entity_procedure(nullptr, token, final_proc_type, tags);
+	Type *entity_type = final_proc_type;
+	if (final_proc_type->Proc.is_poly_specialized) {
+		entity_type = strip_poly_specialized_proc_type(final_proc_type);
+	}
+	Entity *entity = alloc_entity_procedure(nullptr, token, entity_type, tags);
 	entity->state.store(EntityState_Resolved);
 	entity->identifier = ident;
 
@@ -7310,9 +7350,9 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A
 			PolyProcData poly_proc_data = {};
 			if (find_or_generate_polymorphic_procedure_from_parameters(c, entity, &ordered_operands, call, &poly_proc_data)) {
 				gen_entity = poly_proc_data.gen_entity;
-				Type *gept = base_type(gen_entity->type);
+				Type *gept = base_type(proc_entity_full_type(gen_entity));
 				GB_ASSERT(is_type_proc(gept));
-				final_proc_type = gen_entity->type;
+				final_proc_type = proc_entity_full_type(gen_entity);
 				pt = &gept->Proc;
 
 			} else {
@@ -7656,7 +7696,8 @@ gb_internal bool check_call_arguments_single(CheckerContext *c, Ast *call, Opera
 
 	bool return_on_failure = show_error_mode == CallArgumentErrorMode::NoErrors;
 
-	Ast *ident = operand->expr;
+	Ast *callee = unparen_expr(operand->expr);
+	Ast *ident = callee;
 	while (ident->kind == Ast_SelectorExpr) {
 		Ast *s = ident->SelectorExpr.selector;
 		ident = s;
@@ -7670,6 +7711,7 @@ gb_internal bool check_call_arguments_single(CheckerContext *c, Ast *call, Opera
 	}
 
 	GB_ASSERT(proc_type != nullptr);
+	Type *checked_type = proc_type;
 	proc_type = base_type(proc_type);
 	if (proc_type == t_invalid) {
 		return false;
@@ -7683,9 +7725,20 @@ gb_internal bool check_call_arguments_single(CheckerContext *c, Ast *call, Opera
 
 	Entity *entity_to_use = data->gen_entity != nullptr ? data->gen_entity : e;
 	if (!return_on_failure && entity_to_use != nullptr) {
+		// a specializing call's arguments include its constant parameters
+		Type *callee_type = entity_to_use->type;
+		if (data->gen_entity != nullptr) {
+			callee_type = proc_entity_full_type(data->gen_entity);
+		} else if (proc_type->Proc.is_poly_specialized) {
+			callee_type = checked_type;
+		}
 		add_entity_use(c, ident, entity_to_use);
-		update_untyped_expr_type(c, operand->expr, entity_to_use->type, true);
-		add_type_and_value(c, operand->expr, operand->mode, entity_to_use->type, operand->value);
+		update_untyped_expr_type(c, operand->expr, callee_type, true);
+		add_type_and_value(c, operand->expr, operand->mode, callee_type, operand->value);
+		if (callee != operand->expr) {
+			// e.g. `(foo)(x)`, as the backend calls through the unparenthesized callee
+			add_type_and_value(c, callee, operand->mode, callee_type, operand->value);
+		}
 	}
 
 	if (data->gen_entity != nullptr) {
@@ -7708,7 +7761,7 @@ gb_internal bool check_call_arguments_single(CheckerContext *c, Ast *call, Opera
 		} else {
 			decl->where_clauses_evaluated = true;
 			if (ok && (data->gen_entity->flags & EntityFlag_ProcBodyChecked) == 0) {
-				check_procedure_later(c->checker, e->file, e->token, decl, e->type, decl->proc_lit->ProcLit.body, decl->proc_lit->ProcLit.tags);
+				check_procedure_later(c->checker, e->file, e->token, decl, proc_entity_full_type(e), decl->proc_lit->ProcLit.body, decl->proc_lit->ProcLit.tags);
 			}
 			if (is_type_proc(data->gen_entity->type)) {
 				Type *t = base_type(entity_to_use->type);
@@ -8635,9 +8688,11 @@ gb_internal CallArgumentData check_call_arguments_proc_group(CheckerContext *c,
 
 		Entity *e = proc_entities[valids[0].index];
 		GB_ASSERT(e != nullptr);
+		// an entity generated by this call takes the arguments of its full signature
+		Type *e_type = valids[0].index >= procs.count ? proc_entity_full_type(e) : e->type;
 
 		check_call_arguments_single(c, call, operand,
-			e, e->type,
+			e, e_type,
 			positional_operands, named_operands,
 			CallArgumentErrorMode::ShowErrors,
 			&data, false);
diff --git a/src/checker.cpp b/src/checker.cpp
index 5b919d8a8..dea5f0a01 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -1906,6 +1906,13 @@ gb_internal DeclInfo *decl_info_of_entity(Entity *e) {
 	return nullptr;
 }
 
+gb_internal Type *proc_entity_full_type(Entity *e) {
+	if (e->kind == Entity_Procedure && e->decl_info != nullptr && e->decl_info->gen_proc_type != nullptr) {
+		return e->decl_info->gen_proc_type;
+	}
+	return e->type;
+}
+
 // gb_internal DeclInfo *decl_info_of_ident(Ast *ident) {
 // 	return decl_info_of_entity(entity_of_node(ident));
 // }
@@ -6402,7 +6409,7 @@ gb_internal void check_procedure_later_from_entity(Checker *c, Entity *e, char c
 	pi->file  = e->file;
 	pi->token = e->token;
 	pi->decl  = e->decl_info;
-	pi->type  = e->type;
+	pi->type  = proc_entity_full_type(e);
 
 	Ast *pl = e->decl_info->proc_lit;
 	GB_ASSERT(pl != nullptr);
diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp
index 902a43e36..a135904d9 100644
--- a/src/llvm_backend_proc.cpp
+++ b/src/llvm_backend_proc.cpp
@@ -894,7 +894,7 @@ gb_internal void lb_build_nested_proc(lbProcedure *p, AstProcLit *pd, Entity *e)
 	i32 guid = e->token.pos.offset;
 	if (e->decl_info != nullptr && e->decl_info->para_poly_original != nullptr) {
 		name_len = gb_snprintf(name_text, name_len, "%.*s" ABI_PKG_NAME_SEPARATOR "%.*s-%d-%llx", LIT(p->name), LIT(pd_name), guid,
-		                       cast(unsigned long long)type_hash_canonical_type(e->type));
+		                       cast(unsigned long long)type_hash_canonical_type(proc_entity_full_type(e)));
 	} else {
 		name_len = gb_snprintf(name_text, name_len, "%.*s" ABI_PKG_NAME_SEPARATOR "%.*s-%d", LIT(p->name), LIT(pd_name), guid);
 	}
@@ -1403,7 +1403,12 @@ gb_internal lbValue lb_emit_call(lbProcedure *p, lbValue value, Array<lbValue> c
 
 
 			bool by_ptr = false;
-			auto in_args = args;
+			auto in_args = array_make<lbValue>(permanent_allocator(), 0, args.count);
+			for_array(i, args) {
+				if (i >= pt->Proc.param_count || pt->Proc.params->Tuple.variables[i]->kind == Entity_Variable) {
+					array_add(&in_args, args[i]);
+				}
+			}
 			Array<lbValue> result_as_args = {};
 			switch (kind) {
 			case DeferredProcedure_none:
@@ -5192,6 +5197,12 @@ gb_internal lbValue lb_build_call_expr_internal(lbProcedure *p, Ast *expr, lbVal
 		}
 	}
 
+	Type *callee_type = proc_expr->tav.type;
+	if (value.value != nullptr && callee_type != nullptr && callee_type != value.type &&
+	    is_type_proc(callee_type) && base_type(callee_type)->Proc.is_poly_specialized) {
+		value.type = callee_type;
+		proc_value_type = callee_type;
+	}
 
 	GB_ASSERT(value.value != nullptr || is_objc_call || asm_template != nullptr);
 	Type *proc_type_ = base_type(proc_value_type);
diff --git a/src/llvm_backend_stmt.cpp b/src/llvm_backend_stmt.cpp
index e8a86ce8b..025de69ad 100644
--- a/src/llvm_backend_stmt.cpp
+++ b/src/llvm_backend_stmt.cpp
@@ -3,18 +3,20 @@
 
 // NOTE(bill): Orders entities by their canonical type
 gb_internal i32 lb_entity_type_cmp(Entity *x, Entity *y) {
-	if (x->type == y->type || x->type == nullptr || y->type == nullptr) {
+	Type *xt = proc_entity_full_type(x);
+	Type *yt = proc_entity_full_type(y);
+	if (xt == yt || xt == nullptr || yt == nullptr) {
 		return 0;
 	}
-	u64 hx = type_hash_canonical_type(x->type);
-	u64 hy = type_hash_canonical_type(y->type);
+	u64 hx = type_hash_canonical_type(xt);
+	u64 hy = type_hash_canonical_type(yt);
 	if (hx != hy) {
 		return hx < hy ? -1 : +1;
 	}
 	// NOTE(bill): Polymorphic instances share their declaration's token, so this is what tells them apart deterministically
 	TEMPORARY_ALLOCATOR_GUARD();
-	return string_compare(type_to_canonical_string(temporary_allocator(), x->type),
-	                      type_to_canonical_string(temporary_allocator(), y->type));
+	return string_compare(type_to_canonical_string(temporary_allocator(), xt),
+	                      type_to_canonical_string(temporary_allocator(), yt));
 }
 
 gb_internal GB_COMPARE_PROC(lb_polymorphic_instance_cmp) {
diff --git a/src/name_canonicalization.cpp b/src/name_canonicalization.cpp
index c93c4fc8b..a8ed42a8d 100644
--- a/src/name_canonicalization.cpp
+++ b/src/name_canonicalization.cpp
@@ -658,9 +658,9 @@ gb_internal void write_canonical_parent_prefix(TypeWriter *w, Entity *e) {
 			Entity *p = e->parent_proc_decl.load(std::memory_order_relaxed)->entity;
 			write_canonical_parent_prefix(w, p);
 			type_writer_append(w, p->token.string.text, p->token.string.len);
-			if (is_type_polymorphic_or_specialized_proc(p->type)) {
+			if (is_type_polymorphic_or_specialized_proc(proc_entity_full_type(p))) {
 				type_writer_appendc(w, CANONICAL_TYPE_SEPARATOR);
-				write_type_to_canonical_string(w, p->type);
+				write_type_to_canonical_string(w, proc_entity_full_type(p));
 			}
 			type_writer_appendc(w, CANONICAL_NAME_SEPARATOR);
 
@@ -688,9 +688,9 @@ gb_internal void write_canonical_parent_prefix(TypeWriter *w, Entity *e) {
 		type_writer_append(w, e->token.string.text, e->token.string.len);
 	}
 
-	if (is_type_polymorphic_or_specialized_proc(e->type)) {
+	if (is_type_polymorphic_or_specialized_proc(proc_entity_full_type(e))) {
 		type_writer_appendc(w, CANONICAL_TYPE_SEPARATOR);
-		write_type_to_canonical_string(w, e->type);
+		write_type_to_canonical_string(w, proc_entity_full_type(e));
 	}
 	type_writer_appendc(w, CANONICAL_NAME_SEPARATOR);
 
@@ -828,9 +828,9 @@ write_base_name:
 	case Entity_AsmTemplate:
 	case Entity_Variable:
 		type_writer_append(w, e->token.string.text, e->token.string.len);
-		if (is_type_polymorphic_or_specialized_proc(e->type)) {
+		if (is_type_polymorphic_or_specialized_proc(proc_entity_full_type(e))) {
 			type_writer_appendc(w, CANONICAL_TYPE_SEPARATOR);
-			write_type_to_canonical_string(w, e->type);
+			write_type_to_canonical_string(w, proc_entity_full_type(e));
 		}
 		break;
 
diff --git a/tests/issues/test_issue_paren_poly_callee.odin b/tests/issues/test_issue_paren_poly_callee.odin
new file mode 100644
index 000000000..e2ef45e5c
--- /dev/null
+++ b/tests/issues/test_issue_paren_poly_callee.odin
@@ -0,0 +1,23 @@
+// Calling a polymorphic procedure through a parenthesized callee, e.g. `(foo)(x)`
+package test_issues
+
+import "core:testing"
+
+@(private="file")
+double :: proc(x: $T) -> T { return x * 2 }
+@(private="file")
+splat :: proc($N: int, x: $T) -> [N]T { return x }
+
+@(test)
+test_paren_poly_callee :: proc(t: ^testing.T) {
+	testing.expect_value(t, (double)(int(2)), 4)
+	testing.expect_value(t, ((double))(f32(1.5)), 3)
+	testing.expect_value(t, (splat)(2, i32(3)), [2]i32{3, 3})
+
+	big := (splat)(16, f64(1))
+	testing.expect_value(t, big[15], 1)
+
+	s := (make)([]int, 3)
+	defer delete(s)
+	testing.expect_value(t, len(s), 3)
+}

From a7ded94e529cfbae1e03a6a3be7f517e989d109f Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 23:15:43 +0100
Subject: [PATCH 156/215] Begin the costliest modules first in each backend
 stage; run function passes in parallel with `-debug`; spread the instances of
 oversized modules over further modules; trim comments

---
 src/llvm_backend.cpp         |  69 ++++++++++-----
 src/llvm_backend.hpp         |  12 +--
 src/llvm_backend_general.cpp | 159 +++++++++++++++++++++++++++++++----
 src/main.cpp                 |   1 -
 src/types.cpp                |   2 -
 5 files changed, 199 insertions(+), 44 deletions(-)

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 5822b549a..fb128c363 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2213,7 +2213,6 @@ gb_internal void lb_create_startup_runtime_generate_body(lbModule *m, lbProcedur
 			lb_init_global_var(m, p, e, init_expr, var);
 		}
 
-		// NOTE(bill): a block per global, as instruction selection is superlinear in the size of a block
 		lbBlock *next = lb_create_block(p, "global.init", true);
 		lb_emit_jump(p, next);
 		lb_start_block(p, next);
@@ -2469,6 +2468,8 @@ gb_internal void lb_llvm_function_pass_per_function_internal(lbModule *module, l
 	lb_run_function_pass_manager(pass_manager, p, pass_manager_kind);
 }
 
+gb_internal i64 lb_module_cost(lbModule *m);
+
 gb_internal WORKER_TASK_PROC(lb_llvm_function_pass_per_module) {
 	lbModule *m = cast(lbModule *)data;
 	{
@@ -2529,6 +2530,7 @@ gb_internal WORKER_TASK_PROC(lb_llvm_function_pass_per_module) {
 		}
 	}
 
+	m->estimated_cost = lb_module_cost(m);
 	return 0;
 }
 
@@ -2644,6 +2646,37 @@ gb_internal WORKER_TASK_PROC(lb_llvm_module_pass_worker_proc) {
 
 
 
+gb_internal Array<lbModule *> lb_modules_by_cost(lbGenerator *gen) {
+	auto modules = array_make<lbModule *>(temporary_allocator(), 0, gen->modules.count);
+	for (auto const &entry : gen->modules) {
+		array_add(&modules, entry.value);
+	}
+	array_sort(modules, [](void const *a, void const *b) -> int {
+		lbModule *x = *cast(lbModule **)a;
+		lbModule *y = *cast(lbModule **)b;
+		if (x->estimated_cost != y->estimated_cost) {
+			return x->estimated_cost > y->estimated_cost ? -1 : +1;
+		}
+		return gb_strcmp(x->module_name, y->module_name);
+	});
+	return modules;
+}
+
+gb_internal i64 lb_module_cost(lbModule *m) {
+	i64 cost = 0;
+	for (LLVMValueRef f = LLVMGetFirstFunction(m->mod); f != nullptr; f = LLVMGetNextFunction(f)) {
+		for (LLVMBasicBlockRef b = LLVMGetFirstBasicBlock(f); b != nullptr; b = LLVMGetNextBasicBlock(b)) {
+			for (LLVMValueRef i = LLVMGetFirstInstruction(b); i != nullptr; i = LLVMGetNextInstruction(i)) {
+				cost += 1;
+			}
+		}
+	}
+	for (LLVMValueRef g = LLVMGetFirstGlobal(m->mod); g != nullptr; g = LLVMGetNextGlobal(g)) {
+		cost += 1;
+	}
+	return cost;
+}
+
 gb_internal WORKER_TASK_PROC(lb_generate_procedures_worker_proc) {
 	lbModule *m = cast(lbModule *)data;
 	for (lbProcedure *p = nullptr; mpsc_dequeue(&m->procedures_to_generate, &p); /**/) {
@@ -2656,6 +2689,9 @@ gb_internal void lb_generate_procedures(lbGenerator *gen, bool do_threading) {
 	if (do_threading) {
 		for (auto const &entry : gen->modules) {
 			lbModule *m = entry.value;
+			m->estimated_cost = m->procedures_to_generate.count.load(std::memory_order_relaxed);
+		}
+		for (lbModule *m : lb_modules_by_cost(gen)) {
 			thread_pool_add_task(lb_generate_procedures_worker_proc, m);
 		}
 
@@ -2729,8 +2765,7 @@ gb_internal void lb_debug_info_complete_types_and_finalize(lbGenerator *gen) {
 
 gb_internal void lb_llvm_function_passes(lbGenerator *gen, bool do_threading) {
 	if (do_threading) {
-		for (auto const &entry : gen->modules) {
-			lbModule *m = entry.value;
+		for (lbModule *m : lb_modules_by_cost(gen)) {
 			thread_pool_add_task(lb_llvm_function_pass_per_module, m);
 		}
 		thread_pool_wait();
@@ -2747,8 +2782,7 @@ gb_internal void lb_llvm_function_passes(lbGenerator *gen, bool do_threading) {
 
 gb_internal void lb_llvm_module_passes_and_verification(lbGenerator *gen, bool do_threading) {
 	if (do_threading) {
-		for (auto const &entry : gen->modules) {
-			lbModule *m = entry.value;
+		for (lbModule *m : lb_modules_by_cost(gen)) {
 			auto wd = permanent_alloc_item<lbLLVMModulePassWorkerData>();
 			wd->m = m;
 			wd->target_machine = m->target_machine;
@@ -2884,16 +2918,17 @@ gb_internal bool lb_llvm_object_generation(lbGenerator *gen, bool do_threading)
 			if (lb_is_module_empty(m)) {
 				continue;
 			}
-
-			String filepath_ll = lb_filepath_ll_for_module(m);
-			String filepath_obj = lb_filepath_obj_for_module(m);
-			array_add(&gen->output_object_paths, filepath_obj);
-			array_add(&gen->output_temp_paths, filepath_ll);
-
+			array_add(&gen->output_object_paths, lb_filepath_obj_for_module(m));
+			array_add(&gen->output_temp_paths, lb_filepath_ll_for_module(m));
+		}
+		for (lbModule *m : lb_modules_by_cost(gen)) {
+			if (lb_is_module_empty(m)) {
+				continue;
+			}
 			auto *wd = permanent_alloc_item<lbLLVMEmitWorker>();
 			wd->target_machine = m->target_machine;
 			wd->code_gen_file_type = code_gen_file_type;
-			wd->filepath_obj = filepath_obj;
+			wd->filepath_obj = lb_filepath_obj_for_module(m);
 			wd->m = m;
 			thread_pool_add_task(lb_llvm_emit_worker_proc, wd);
 		}
@@ -3126,10 +3161,6 @@ gb_internal void lb_generate_procedure(lbModule *m, lbProcedure *p) {
 	array_add(&m->generated_procedures, p);
 }
 
-// NOTE(bill): Each module is verified once its procedures are generated, rather than each procedure as it is
-// generated. Verifying a procedure on its own walks every constant which uses it, which for one referenced by the
-// type info (e.g. `__$equal`) is all of the type info. Only on a failure are its procedures verified on their own,
-// to report which ones are invalid.
 gb_internal WORKER_TASK_PROC(lb_verify_generated_procedures_worker_proc) {
 	lbModule *m = cast(lbModule *)data;
 	if (!LLVMVerifyModule(m->mod, LLVMReturnStatusAction, nullptr)) {
@@ -3146,9 +3177,7 @@ gb_internal void lb_verify_generated_procedures(lbGenerator *gen, bool do_thread
 	if (LLVM_IGNORE_VERIFICATION) {
 		return;
 	}
-	for (auto const &entry : gen->modules) {
-		lbModule *m = entry.value;
-		// NOTE(bill): with debug information, its procedures were never verified on their own, only the module after its passes
+	for (lbModule *m : lb_modules_by_cost(gen)) {
 		if (m->debug_builder != nullptr) {
 			continue;
 		}
@@ -3813,7 +3842,7 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 	lb_verify_generated_procedures(gen, do_threading);
 
 	TIME_SECTION("LLVM Function Pass");
-	lb_llvm_function_passes(gen, do_threading && !build_context.ODIN_DEBUG);
+	lb_llvm_function_passes(gen, do_threading);
 
 	TIME_SECTION("LLVM Remove Unused Functions and Globals");
 	lb_remove_unused_functions_and_globals(gen);
diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index 961c2bda7..02808aecc 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -125,13 +125,16 @@ struct lbModule {
 	lbModule *polymorphic_module;
 
 	CheckerInfo *info;
-	AstPackage *pkg; // possibly associated
-	AstFile *file;   // possibly associated
-	char const *module_name;
+	AstPackage * pkg;  // possibly associated
+	AstFile *    file; // possibly associated
+	char const * module_name;
 
 	NamedMetaDataKind metadata_kinds[4];
 	isize metadata_kind_count;
 
+	i64 estimated_cost;
+	i32 split_part;
+
 	PtrMap<u64/*type hash*/, LLVMTypeRef>  types;                  // mutex: types_mutex
 	PtrMap<void *, lbStructFieldRemapping> struct_field_remapping; // Key: LLVMTypeRef or Type *, mutex: types_mutex
 	PtrMap<u64/*type hash*/, LLVMTypeRef>  func_raw_types;         // mutex: func_raw_types_mutex
@@ -211,14 +214,13 @@ struct lbGenerator : LinkerData {
 
 	PtrMap<void *, lbModule *> modules; // key is `AstPackage *` (`void *` is used for future use)
 	PtrMap<LLVMContextRef, lbModule *> modules_through_ctx; 
-	PtrMap<AstFile *, lbModule *> file_modules; // NOTE(bill): of the files of a package which is split into several modules
+	PtrMap<AstFile *, lbModule *> file_modules;
 	lbModule default_module;
 
 	lbModule *equal_module;
 
 	isize used_module_count;
 
-	// NOTE(bill): set once the modules are generated in parallel, after which a module may only be added to by its own thread
 	bool modules_in_parallel;
 
 	lbProcedure *startup_runtime;
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index a8f31afdf..fd9964529 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -90,6 +90,9 @@ gb_internal WORKER_TASK_PROC(lb_init_module_worker_proc) {
 		}
 		module_name = gb_string_appendc(module_name, "$parapoly");
 	}
+	if (m->split_part > 0) {
+		module_name = gb_string_append_fmt(module_name, "$%d", m->split_part);
+	}
 
 	m->module_name = module_name;
 	m->ctx = LLVMContextCreate();
@@ -188,8 +191,6 @@ gb_internal void lb_init_module(lbModule *m, bool do_threading) {
 	}
 }
 
-// NOTE(bill): an estimate of the code generated for each file: the size of the bodies of its procedures which are used,
-// polymorphic instances included as each is generated with its procedure's file
 gb_internal i64 lb_estimate_file_code_sizes(CheckerInfo *info, PtrMap<AstFile *, i64> *sizes) {
 	i64 total = 0;
 	for (Entity *e : info->entities) {
@@ -247,7 +248,7 @@ gb_internal void lb_split_package_into_modules(lbGenerator *gen, Checker *c, Ast
 			group->pkg     = pkg;
 			group->gen     = gen;
 			group->checker = c;
-			map_set(&gen->modules, cast(void *)group, group); // point to itself just add it to the list
+			map_set(&gen->modules, cast(void *)group, group);
 			lb_init_module(group, do_threading);
 
 			if (LLVM_WEAK_MONOMORPHIZATION) {
@@ -269,6 +270,139 @@ gb_internal void lb_split_package_into_modules(lbGenerator *gen, Checker *c, Ast
 	}
 }
 
+gb_internal lbModule *lb_module_of_file(lbGenerator *gen, AstFile *file) {
+	lbModule **found = map_get(&gen->modules, cast(void *)file);
+	if (found == nullptr) {
+		found = map_get(&gen->file_modules, file);
+	}
+	if (found == nullptr && file->pkg != nullptr) {
+		found = map_get(&gen->modules, cast(void *)file->pkg);
+	}
+	return found ? *found : &gen->default_module;
+}
+
+gb_internal GB_COMPARE_PROC(llvm_global_entity_cmp);
+
+struct lbInstanceSize {
+	Entity *e;
+	i64     size;
+};
+
+gb_internal void lb_split_instances_into_modules(lbGenerator *gen, Checker *c, PtrMap<AstFile *, i64> *file_sizes, i64 share, bool do_threading) {
+	PtrMap<lbModule *, i64> module_sizes = {};
+	map_init(&module_sizes);
+	defer (map_destroy(&module_sizes));
+	for (auto const &entry : gen->info->packages) {
+		for (AstFile *f : entry.value->files) {
+			i64 *size = map_get(file_sizes, f);
+			lbModule *m = lb_module_of_file(gen, f);
+			i64 *total = map_get(&module_sizes, m);
+			if (total) {
+				*total += size ? *size : 0;
+			} else {
+				map_set(&module_sizes, m, size ? *size : 0);
+			}
+		}
+	}
+
+	PtrMap<lbModule *, isize> module_instances = {};
+	map_init(&module_instances);
+	defer (map_destroy(&module_instances));
+	auto instances = array_make<Array<lbInstanceSize>>(heap_allocator());
+	defer ({
+		for (auto &list : instances) {
+			array_free(&list);
+		}
+		array_free(&instances);
+	});
+	auto modules = array_make<lbModule *>(heap_allocator());
+	defer (array_free(&modules));
+
+	for (Entity *e : gen->info->entities) {
+		if (e->kind != Entity_Procedure || !e->Procedure.generated_from_polymorphic || e->file == nullptr ||
+		    e->min_dep_count.load(std::memory_order_relaxed) == 0) {
+			continue;
+		}
+		if (e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
+			continue;
+		}
+		DeclInfo *d = e->decl_info;
+		if (d == nullptr || d->proc_lit == nullptr || d->proc_lit->kind != Ast_ProcLit || d->proc_lit->ProcLit.body == nullptr) {
+			continue;
+		}
+		lbModule *m = lb_module_of_file(gen, e->file);
+		i64 *total = map_get(&module_sizes, m);
+		if (total == nullptr || *total <= share + share/2) {
+			continue;
+		}
+		Ast *body = d->proc_lit->ProcLit.body;
+		i64 size = gb_max(cast(i64)(ast_end_token(body).pos.offset - ast_token(body).pos.offset), 1);
+
+		isize *index = map_get(&module_instances, m);
+		if (index == nullptr) {
+			map_set(&module_instances, m, instances.count);
+			array_add(&instances, array_make<lbInstanceSize>(heap_allocator()));
+			array_add(&modules, m);
+			index = map_get(&module_instances, m);
+		}
+		array_add(&instances[*index], lbInstanceSize{e, size});
+	}
+
+	for_array(i, modules) {
+		lbModule *m = modules[i];
+		auto &list = instances[i];
+		i64 total = *map_get(&module_sizes, m);
+		i64 instances_size = 0;
+		for (auto const &inst : list) {
+			instances_size += inst.size;
+		}
+
+		isize part_count = cast(isize)((total + share - 1) / share);
+		if (part_count < 2) {
+			continue;
+		}
+		array_sort(list, [](void const *a, void const *b) -> int {
+			lbInstanceSize const *x = cast(lbInstanceSize const *)a;
+			lbInstanceSize const *y = cast(lbInstanceSize const *)b;
+			if (x->size != y->size) {
+				return x->size > y->size ? -1 : +1;
+			}
+			return llvm_global_entity_cmp(&x->e, &y->e);
+		});
+
+		auto parts = array_make<lbModule *>(heap_allocator(), part_count);
+		auto loads = array_make<i64>(heap_allocator(), part_count);
+		defer (array_free(&parts));
+		defer (array_free(&loads));
+		parts[0] = m;
+		loads[0] = gb_max(total - instances_size, 0);
+		for (isize k = 1; k < part_count; k++) {
+			lbModule *pm = permanent_alloc_item<lbModule>();
+			pm->file       = m->file;
+			pm->pkg        = m->pkg;
+			pm->gen        = gen;
+			pm->checker    = c;
+			pm->split_part = cast(i32)k;
+			map_set(&gen->modules, cast(void *)pm, pm);
+			lb_init_module(pm, do_threading);
+			parts[k] = pm;
+		}
+
+		for (auto const &inst : list) {
+			isize best = 0;
+			for (isize k = 1; k < part_count; k++) {
+				if (loads[k] < loads[best]) {
+					best = k;
+				}
+			}
+			loads[best] += inst.size;
+			if (best != 0) {
+				inst.e->decl_info->code_gen_module.store(parts[best], std::memory_order_relaxed);
+			}
+		}
+	}
+}
+
 gb_internal bool lb_init_generator(lbGenerator *gen, Checker *c) {
 	if (global_error_collector.count != 0) {
 		return false;
@@ -294,9 +428,6 @@ gb_internal bool lb_init_generator(lbGenerator *gen, Checker *c) {
 
 	if (USE_SEPARATE_MODULES) {
 		bool module_per_file = build_context.module_per_file && (build_context.optimization_level <= 0 || build_context.lto_kind != LTO_None);
-		// NOTE(bill): A package with much more code than an even share of all of it is generated in several modules
-		// of contiguous files, as each module is generated by one thread. The share does not depend on the number of
-		// threads, so neither do the modules.
 		PtrMap<AstFile *, i64> file_sizes = {};
 		map_init(&file_sizes, 1024);
 		i64 share = gb_max(lb_estimate_file_code_sizes(gen->info, &file_sizes) / 32, 1);
@@ -381,6 +512,10 @@ gb_internal bool lb_init_generator(lbGenerator *gen, Checker *c) {
 			}
 		}
 
+		if (!LLVM_WEAK_MONOMORPHIZATION) {
+			lb_split_instances_into_modules(gen, c, &file_sizes, share, do_threading);
+		}
+
 		if (LLVM_WEAK_MONOMORPHIZATION) {
 			lbModule *m = permanent_alloc_item<lbModule>();
 			gen->equal_module = m;
@@ -1234,9 +1369,6 @@ gb_internal u64 lb_gcd_u64(u64 a, u64 b) {
 }
 
 gb_internal u64 lb_known_address_alignment(lbModule *m, LLVMValueRef ptr, u64 assumed) {
-	// NOTE(bill): The alignment an address is known to have from the GEPs leading to it: within a local or a global, that
-	// of its offset from it, and none beyond a field of a packed struct, or that a struct caps its fields to, as marked on
-	// the GEP of the field. Of an address within anything else, it is `assumed`, i.e. that of the type it points to.
 
 	LLVMTargetDataRef td = LLVMGetModuleDataLayout(m->mod);
 	u64 offsets = 0;
@@ -1674,10 +1806,7 @@ gb_internal bool lb_is_type_proc_recursive(Type *t) {
 	}
 }
 
-// NOTE(bill): LLVM's fast instruction selector cannot select an aggregate load or store, and for one falls back to its
-// slow instruction selection for all of the block before it, which is superlinear in its size. When the passes do not
-// split the aggregates of a procedure first (SROA), a copy of a loaded aggregate is made of integers instead, all loaded
-// before any is stored, as the aggregate is.
+// LLVM's fast instruction selector cannot select an aggregate load or store
 // Oh, how do I love LLVM /s
 gb_internal bool lb_copies_aggregates_as_scalars(lbProcedure *p) {
 	return p->is_startup || build_context.optimization_level < 0;
@@ -1707,7 +1836,6 @@ gb_internal bool lb_try_copy_loaded_aggregate(lbProcedure *p, LLVMValueRef dst,
 		return false;
 	}
 
-	// NOTE(bill): the memory loaded must not have been written to since
 	LLVMBasicBlockRef block = LLVMGetInsertBlock(p->builder);
 	if (block == nullptr || LLVMGetInstructionParent(load) != block) {
 		return false;
@@ -3961,8 +4089,7 @@ gb_internal lbValue lb_generate_anonymous_proc_lit(lbModule *m, String const &pr
 	e->scope = e->file->scope;
 
 	lbModule *target_module = m;
-	// NOTE(bill): a literal reached whilst generating the initializations of the globals (in the default module) is
-	// generated in its own package's module, which may only be added to before the modules are generated in parallel
+	// another module may only be added to before the modules are generated in parallel
 	if (m == &gen->default_module && parent == nullptr && !gen->modules_in_parallel) {
 		target_module = lb_module_of_expr(gen, expr);
 	}
diff --git a/src/main.cpp b/src/main.cpp
index aafd06ba9..17306bfe1 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -4582,7 +4582,6 @@ end_of_code_gen:;
 		show_import_graph(checker);
 	}
 
-	// NOTE(bill): e.g. `odin test -build-mode:llvm-ir` only generates the tests
 	if (run_output && build_context.build_mode == BuildMode_Executable) {
 		String exe_name = path_to_string(heap_allocator(), build_context.build_paths[BuildPath_Output]);
 		defer (gb_free(heap_allocator(), exe_name.text));
diff --git a/src/types.cpp b/src/types.cpp
index 61e4082af..e823fd19f 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -4462,8 +4462,6 @@ gb_internal void wait_for_struct_fields(Type *t) {
 	}
 }
 
-// NOTE(bill): a polymorphic union's instance is found before its variants are checked (see `check_union_type`),
-// and until then, it has none, so its size, alignment and tag would be those of an empty union
 gb_internal void wait_for_union_variants(Type *t) {
 	if (t->Union.polymorphic_parent != nullptr) {
 		wait_for_record_signal(&t->Union.variants_wait_signal, &t->Union.checking_thread);

From e7b77050428f3fc25872ca4b3b1b7483906a8dab Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Fri, 2 Oct 2026 23:30:24 +0100
Subject: [PATCH 157/215] Setup the type info data in the default module's task
 rather than before the modules are generated in parallel

---
 src/llvm_backend.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index fb128c363..f2057f6dc 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2167,8 +2167,6 @@ gb_internal bool lb_init_global_var(lbModule *m, lbProcedure *p, Entity *e, Ast
 gb_internal void lb_create_startup_runtime_generate_body(lbModule *m, lbProcedure *p) {
 	lb_begin_procedure_body(p);
 
-	lb_setup_type_info_data(m);
-
 	if (p->objc_names) {
 		LLVMBuildCall2(p->builder, lb_type_internal_for_procedures_raw(m, p->objc_names->type), p->objc_names->value, nullptr, 0, "");
 	}
@@ -2679,6 +2677,9 @@ gb_internal i64 lb_module_cost(lbModule *m) {
 
 gb_internal WORKER_TASK_PROC(lb_generate_procedures_worker_proc) {
 	lbModule *m = cast(lbModule *)data;
+	if (m == &m->gen->default_module) {
+		lb_setup_type_info_data(m);
+	}
 	for (lbProcedure *p = nullptr; mpsc_dequeue(&m->procedures_to_generate, &p); /**/) {
 		lb_generate_procedure(p->module, p);
 	}
@@ -2691,6 +2692,7 @@ gb_internal void lb_generate_procedures(lbGenerator *gen, bool do_threading) {
 			lbModule *m = entry.value;
 			m->estimated_cost = m->procedures_to_generate.count.load(std::memory_order_relaxed);
 		}
+		gen->default_module.estimated_cost = I64_MAX;
 		for (lbModule *m : lb_modules_by_cost(gen)) {
 			thread_pool_add_task(lb_generate_procedures_worker_proc, m);
 		}

From 29106aaa1e14a2aa82a99363837405b9be293353 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 01:26:01 +0100
Subject: [PATCH 158/215] Cache type layouts and union constantability, build
 nested constants once, create debug files lazily

---
 src/llvm_abi.cpp             | 84 +++++++++++++++++-------------------
 src/llvm_backend.cpp         | 18 +++-----
 src/llvm_backend_const.cpp   | 65 +++++++++++++++++++++++++++-
 src/llvm_backend_debug.cpp   | 29 ++++++++++---
 src/llvm_backend_general.cpp | 13 +++---
 src/llvm_backend_proc.cpp    |  6 +--
 src/llvm_backend_stmt.cpp    |  2 +-
 src/types.cpp                | 35 +++++++++++----
 8 files changed, 168 insertions(+), 84 deletions(-)

diff --git a/src/llvm_abi.cpp b/src/llvm_abi.cpp
index f4c91256e..fd60d5482 100644
--- a/src/llvm_abi.cpp
+++ b/src/llvm_abi.cpp
@@ -240,6 +240,44 @@ gb_internal void lb_add_function_type_attributes(LLVMValueRef fn, lbFunctionType
 }
 
 
+struct lbTypeLayout {
+	i64 size;
+	i64 align;
+};
+
+gb_thread_local PtrMap<LLVMTypeRef, lbTypeLayout> lb_aggregate_layouts;
+
+gb_internal lbTypeLayout lb_aggregate_layout(LLVMTypeRef type) {
+	if (lbTypeLayout *found = map_get(&lb_aggregate_layouts, type)) {
+		return *found;
+	}
+	lbTypeLayout layout = {0, 1};
+	if (LLVMGetTypeKind(type) == LLVMArrayTypeKind) {
+		LLVMTypeRef elem = OdinLLVMGetArrayElementType(type);
+		layout.size  = cast(i64)LLVMGetArrayLength(type) * lb_sizeof(elem);
+		layout.align = lb_alignof(elem);
+	} else {
+		GB_ASSERT(LLVMGetTypeKind(type) == LLVMStructTypeKind);
+		if (LLVMIsOpaqueStruct(type)) {
+			return layout;
+		}
+		bool is_packed = LLVMIsPackedStruct(type);
+		unsigned field_count = LLVMCountStructElementTypes(type);
+		for (unsigned i = 0; i < field_count; i++) {
+			LLVMTypeRef field = LLVMStructGetTypeAtIndex(type, i);
+			if (!is_packed) {
+				i64 field_align = lb_alignof(field);
+				layout.size  = llvm_align_formula(layout.size, field_align);
+				layout.align = gb_max(layout.align, field_align);
+			}
+			layout.size += lb_sizeof(field);
+		}
+		layout.size = llvm_align_formula(layout.size, layout.align);
+	}
+	map_set(&lb_aggregate_layouts, type, layout);
+	return layout;
+}
+
 gb_internal i64 lb_sizeof(LLVMTypeRef type) {
 	LLVMTypeKind kind = LLVMGetTypeKind(type);
 	switch (kind) {
@@ -259,35 +297,8 @@ gb_internal i64 lb_sizeof(LLVMTypeRef type) {
 	case LLVMPointerTypeKind:
 		return build_context.ptr_size;
 	case LLVMStructTypeKind:
-		{
-			unsigned field_count = LLVMCountStructElementTypes(type);
-			i64 offset = 0;
-			if (LLVMIsPackedStruct(type)) {
-				for (unsigned i = 0; i < field_count; i++) {
-					LLVMTypeRef field = LLVMStructGetTypeAtIndex(type, i);
-					offset += lb_sizeof(field);
-				}
-			} else {
-				for (unsigned i = 0; i < field_count; i++) {
-					LLVMTypeRef field = LLVMStructGetTypeAtIndex(type, i);
-					i64 align = lb_alignof(field);
-					offset = llvm_align_formula(offset, align);
-					offset += lb_sizeof(field);
-				}
-				offset = llvm_align_formula(offset, lb_alignof(type));
-			}
-			return offset;
-		}
-		break;
 	case LLVMArrayTypeKind:
-		{
-			LLVMTypeRef elem = OdinLLVMGetArrayElementType(type);
-			i64 elem_size = lb_sizeof(elem);
-			i64 count = LLVMGetArrayLength(type);
-			i64 size = count * elem_size;
-			return size;
-		}
-		break;
+		return lb_aggregate_layout(type).size;
 
 #if LLVM_VERSION_MAJOR < 20
 	case LLVMX86_MMXTypeKind:
@@ -327,23 +338,8 @@ gb_internal i64 lb_alignof(LLVMTypeRef type) {
 	case LLVMPointerTypeKind:
 		return build_context.ptr_size;
 	case LLVMStructTypeKind:
-		{
-			if (LLVMIsPackedStruct(type)) {
-				return 1;
-			} else {
-				unsigned field_count = LLVMCountStructElementTypes(type);
-				i64 max_align = 1;
-				for (unsigned i = 0; i < field_count; i++) {
-					LLVMTypeRef field = LLVMStructGetTypeAtIndex(type, i);
-					i64 field_align = lb_alignof(field);
-					max_align = gb_max(max_align, field_align);
-				}
-				return max_align;
-			}
-		}
-		break;
 	case LLVMArrayTypeKind:
-		return lb_alignof(OdinLLVMGetArrayElementType(type));
+		return lb_aggregate_layout(type).align;
 
 #if LLVM_VERSION_MAJOR < 20
 	case LLVMX86_MMXTypeKind:
diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index f2057f6dc..031a71f3d 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2316,6 +2316,8 @@ gb_internal GB_COMPARE_PROC(llvm_global_entity_cmp) {
 	return lb_entity_type_cmp(x, y);
 }
 
+gb_internal Array<lbModule *> lb_modules_by_cost(lbGenerator *gen);
+
 gb_internal void lb_create_global_procedures_and_types(lbGenerator *gen, CheckerInfo *info, bool do_threading) {
 	for (Entity *e : info->entities) {
 		String  name  = e->token.string;
@@ -2385,12 +2387,12 @@ gb_internal void lb_create_global_procedures_and_types(lbGenerator *gen, Checker
 		lbModule *m = entry.value;
 		array_sort(m->global_types_to_create, llvm_global_entity_cmp);
 		array_sort(m->global_procedures_to_create, llvm_global_entity_cmp);
+		m->estimated_cost = m->global_types_to_create.count + m->global_procedures_to_create.count;
 	}
 
 	gen->modules_in_parallel = true;
 	if (do_threading) {
-		for (auto const &entry : gen->modules) {
-			lbModule *m = entry.value;
+		for (lbModule *m : lb_modules_by_cost(gen)) {
 			thread_pool_add_task(lb_generate_procedures_and_types_per_module, m);
 		}
 	} else {
@@ -3346,14 +3348,6 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 	for (auto const &entry : gen->modules) {
 		lbModule *m = entry.value;
 		if (m->debug_builder) { // Debug Info
-			for (auto const &file_entry : info->files) {
-				AstFile *f = file_entry.value;
-				LLVMMetadataRef res = LLVMDIBuilderCreateFile(m->debug_builder,
-					cast(char const *)f->filename.text, f->filename.len,
-					cast(char const *)f->directory.text, f->directory.len);
-				lb_set_llvm_metadata(m, f, res);
-			}
-
 			TEMPORARY_ALLOCATOR_GUARD();
 
 			gbString producer = gb_string_make(temporary_allocator(), "odin");
@@ -3382,7 +3376,7 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 			LLVMBool debug_info_for_profiling = false;
 
 			m->debug_compile_unit = LLVMDIBuilderCreateCompileUnit(m->debug_builder, LLVMDWARFSourceLanguageC99,
-				lb_get_llvm_metadata(m, init_file),
+				lb_get_file_metadata(m, init_file),
 				producer, gb_string_length(producer),
 				is_optimized, "", 0,
 				1, split_name, gb_string_length(split_name),
@@ -3619,7 +3613,7 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 		if (m->debug_builder) {
 			String global_name = e->token.string;
 			if (global_name.len != 0 && global_name != "_") {
-				LLVMMetadataRef llvm_file = lb_get_llvm_metadata(m, e->file);
+				LLVMMetadataRef llvm_file = lb_get_file_metadata(m, e->file);
 				LLVMMetadataRef llvm_scope = llvm_file;
 
 				LLVMBool local_to_unit = LLVMGetLinkage(g.value) == LLVMInternalLinkage;
diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index df674b913..aa080dca8 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -239,6 +239,60 @@ gb_internal LLVMValueRef llvm_const_array(lbModule *m, LLVMTypeRef elem_type, LL
 	return LLVMConstArray(elem_type, values, value_count);
 }
 
+// Each constant `insertvalue` rebuilds and uniques the whole aggregate,
+// so the nested fields of a compound literal are collected and built once.
+struct lbConstAggregate {
+	LLVMValueRef      value;
+	lbConstAggregate *elems;
+	unsigned          elem_count;
+};
+
+gb_internal void lb_const_aggregate_insert(lbModule *m, lbConstAggregate *agg, LLVMValueRef base, LLVMValueRef val, unsigned *indices, isize count) {
+	if (agg->elems == nullptr) {
+		agg->value = base;
+	}
+	for (isize i = 0; i < count; i++) {
+		if (agg->elems == nullptr) {
+			LLVMTypeRef type = LLVMTypeOf(agg->value);
+			if (LLVMGetTypeKind(type) == LLVMArrayTypeKind) {
+				agg->elem_count = cast(unsigned)LLVMGetArrayLength(type);
+			} else {
+				agg->elem_count = LLVMCountStructElementTypes(type);
+			}
+			agg->elems = gb_alloc_array(temporary_allocator(), lbConstAggregate, agg->elem_count);
+			for (unsigned j = 0; j < agg->elem_count; j++) {
+				agg->elems[j].value = llvm_const_extract_value(m, agg->value, j);
+			}
+		}
+		agg = &agg->elems[indices[i]];
+	}
+	agg->value = val;
+	agg->elems = nullptr;
+}
+
+gb_internal LLVMValueRef lb_const_aggregate_build(lbModule *m, lbConstAggregate *agg) {
+	if (agg->elems == nullptr) {
+		return agg->value;
+	}
+	LLVMTypeRef type = LLVMTypeOf(agg->value);
+	LLVMValueRef *values = gb_alloc_array(temporary_allocator(), LLVMValueRef, agg->elem_count);
+	for (unsigned i = 0; i < agg->elem_count; i++) {
+		values[i] = lb_const_aggregate_build(m, &agg->elems[i]);
+	}
+	if (LLVMGetTypeKind(type) == LLVMArrayTypeKind) {
+		return llvm_const_array(m, OdinLLVMGetArrayElementType(type), values, agg->elem_count);
+	}
+	return llvm_const_named_struct_internal(m, type, values, agg->elem_count);
+}
+
+gb_internal LLVMValueRef lb_const_aggregate_take(lbModule *m, lbConstAggregate *agg, LLVMValueRef value) {
+	if (agg->elems != nullptr) {
+		value = lb_const_aggregate_build(m, agg);
+	}
+	*agg = {};
+	return value;
+}
+
 gb_internal LLVMValueRef llvm_const_slice_internal(lbModule *m, LLVMValueRef data, LLVMValueRef len) {
 	if (build_context.metrics.ptr_size < build_context.metrics.int_size) {
 		GB_ASSERT(build_context.metrics.ptr_size == 4);
@@ -2005,6 +2059,8 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 			bool *visited = gb_alloc_array(temporary_allocator(), bool, value_count);
 
 			if (cl->elems[0]->kind == Ast_FieldValue) {
+				lbConstAggregate *nested = gb_alloc_array(temporary_allocator(), lbConstAggregate, value_count);
+
 				isize elem_count = cl->elems.count;
 				for (isize i = 0; i < elem_count; i++) {
 					ast_node(fv, FieldValue, cl->elems[i]);
@@ -2026,6 +2082,7 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 							GB_ASSERT_MSG(lb_sizeof(value_type) == type_size_of(f->type), "%s vs %s", LLVMPrintTypeToString(value_type), type_to_string(f->type));
 							values[index]  = value.value;
 							visited[index] = true;
+							nested[index]  = {};
 						} else {
 							if (!visited[index]) {
 								auto new_cc = cc;
@@ -2073,13 +2130,15 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 									if (LLVMIsConstant(elem_value) && LLVMIsConstant(values[index])) {
 										if (is_type_union(cv_type) || is_type_raw_union(cv_type)) {
 											force_non_named = true;
+											values[index] = lb_const_aggregate_take(m, &nested[index], values[index]);
 											values[index] = llvm_const_insert_value_with_rebuild(m, values[index], elem_value, idx_list, idx_list_len);
 										} else {
-											values[index] = llvm_const_insert_value(m, values[index], elem_value, idx_list, idx_list_len);
+											lb_const_aggregate_insert(m, &nested[index], values[index], elem_value, idx_list, idx_list_len);
 										}
 									} else if (is_local) {
 										lbProcedure *p = m->curr_procedure;
 										GB_ASSERT(p != nullptr);
+										values[index] = lb_const_aggregate_take(m, &nested[index], values[index]);
 
 										LLVMTypeRef field_llvm_type = lb_type(m, f->type);
 
@@ -2123,6 +2182,10 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 						}
 					}
 				}
+
+				for (unsigned i = 0; i < value_count; i++) {
+					values[i] = lb_const_aggregate_take(m, &nested[i], values[i]);
+				}
 			} else {
 				isize multiple_return_offset = 0;
 				for_array(i, cl->elems) {
diff --git a/src/llvm_backend_debug.cpp b/src/llvm_backend_debug.cpp
index b70071e5b..2b1cbf872 100644
--- a/src/llvm_backend_debug.cpp
+++ b/src/llvm_backend_debug.cpp
@@ -18,6 +18,21 @@ gb_internal void lb_set_llvm_metadata(lbModule *m, void *key, LLVMMetadataRef va
 	}
 }
 
+gb_internal LLVMMetadataRef lb_get_file_metadata(lbModule *m, AstFile *f) {
+	if (f == nullptr || m->debug_builder == nullptr) {
+		return nullptr;
+	}
+	MUTEX_GUARD(&m->debug_values_mutex);
+	LLVMMetadataRef res = lb_get_llvm_metadata(m, f);
+	if (res == nullptr) {
+		res = LLVMDIBuilderCreateFile(m->debug_builder,
+			cast(char const *)f->filename.text, f->filename.len,
+			cast(char const *)f->directory.text, f->directory.len);
+		lb_set_llvm_metadata(m, f, res);
+	}
+	return res;
+}
+
 gb_internal void lb_add_raddbg_string(lbModule *m, String const &str) {
 	mpsc_enqueue(&m->gen->raddebug_section_strings, copy_string(permanent_allocator(), str));
 }
@@ -70,7 +85,7 @@ gb_internal LLVMMetadataRef lb_debug_end_location_from_ast(lbProcedure *p, Ast *
 gb_internal void lb_debug_file_line(lbModule *m, Type *type, Ast *node, LLVMMetadataRef *file, unsigned *line) {
 	if (*file == nullptr && type->kind == Type_Named) {
 		if (node) {
-			*file = lb_get_llvm_metadata(m, node->file());
+			*file = lb_get_file_metadata(m, node->file());
 			*line = cast(unsigned)ast_token(node).pos.line;
 		}
 	}
@@ -174,7 +189,7 @@ gb_internal LLVMMetadataRef lb_debug_struct_field(lbModule *m, String const &nam
 
 	AstPackage *pkg = m->info->runtime_package;
 	GB_ASSERT(pkg->files.count != 0);
-	LLVMMetadataRef file = lb_get_llvm_metadata(m, pkg->files[0]);
+	LLVMMetadataRef file = lb_get_file_metadata(m, pkg->files[0]);
 	LLVMMetadataRef scope = file;
 
 	return LLVMDIBuilderCreateMemberType(m->debug_builder, scope, cast(char const *)name.text, name.len, file, field_line,
@@ -185,7 +200,7 @@ gb_internal LLVMMetadataRef lb_debug_struct_field(lbModule *m, String const &nam
 gb_internal LLVMMetadataRef lb_debug_basic_struct(lbModule *m, String const &name, u64 size_in_bits, u32 align_in_bits, LLVMMetadataRef *elements, unsigned element_count) {
 	AstPackage *pkg = m->info->runtime_package;
 	GB_ASSERT(pkg->files.count != 0);
-	LLVMMetadataRef file = lb_get_llvm_metadata(m, pkg->files[0]);
+	LLVMMetadataRef file = lb_get_file_metadata(m, pkg->files[0]);
 	LLVMMetadataRef scope = file;
 
 	return LLVMDIBuilderCreateStructType(m->debug_builder, scope, cast(char const *)name.text, name.len, file, 1, size_in_bits, align_in_bits, LLVMDIFlagZero, nullptr, elements, element_count, 0, nullptr, "", 0);
@@ -1119,7 +1134,7 @@ gb_internal LLVMMetadataRef lb_get_base_scope_metadata(lbModule *m, Scope *scope
 			}
 		}
 		if (scope->flags & ScopeFlag_File) {
-			found = lb_get_llvm_metadata(m, scope->file);
+			found = lb_get_file_metadata(m, scope->file);
 			if (found) {
 				return found;
 			}
@@ -1219,7 +1234,7 @@ gb_internal void lb_add_debug_local_variable(lbProcedure *p, LLVMValueRef ptr, T
 	AstFile *file = p->body->file();
 
 	LLVMMetadataRef llvm_scope = lb_get_current_debug_scope(p);
-	LLVMMetadataRef llvm_file = lb_get_llvm_metadata(m, file);
+	LLVMMetadataRef llvm_file = lb_get_file_metadata(m, file);
 	GB_ASSERT(llvm_scope != nullptr);
 	if (llvm_file == nullptr) {
 		llvm_file = LLVMDIScopeGetFile(llvm_scope);
@@ -1286,7 +1301,7 @@ gb_internal void lb_add_debug_param_variable(lbProcedure *p, LLVMValueRef ptr, T
 	AstFile *file = p->body->file();
 
 	LLVMMetadataRef llvm_scope = lb_get_current_debug_scope(p);
-	LLVMMetadataRef llvm_file = lb_get_llvm_metadata(m, file);
+	LLVMMetadataRef llvm_file = lb_get_file_metadata(m, file);
 	GB_ASSERT(llvm_scope != nullptr);
 	if (llvm_file == nullptr) {
 		llvm_file = LLVMDIScopeGetFile(llvm_scope);
@@ -1479,7 +1494,7 @@ gb_internal void lb_add_debug_label(lbProcedure *p, Ast *label, lbBlock *target)
 	}
 
 	AstFile *file = label->file();
-	LLVMMetadataRef llvm_file = lb_get_llvm_metadata(m, file);
+	LLVMMetadataRef llvm_file = lb_get_file_metadata(m, file);
 	if (llvm_file == nullptr) {
 		debugf("llvm file not found for label\n");
 		return;
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index fd9964529..6b7fefcc6 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -407,6 +407,7 @@ gb_internal bool lb_init_generator(lbGenerator *gen, Checker *c) {
 	if (global_error_collector.count != 0) {
 		return false;
 	}
+	global_types_are_complete.store(true);
 
 	isize tc = c->parser->total_token_count;
 	if (tc < 2) {
@@ -700,20 +701,16 @@ gb_internal lbValue lb_zero(lbModule *m, Type *t) {
 	return v;
 }
 gb_internal LLVMValueRef llvm_const_extract_value(lbModule *m, LLVMValueRef agg, unsigned index) {
-	LLVMValueRef res = agg;
-	GB_ASSERT(LLVMIsConstant(res));
-	res = LLVMBuildExtractValue(m->const_dummy_builder, res, index, "");
-	GB_ASSERT(LLVMIsConstant(res));
+	GB_ASSERT(LLVMIsConstant(agg));
+	LLVMValueRef res = LLVMGetAggregateElement(agg, index);
+	GB_ASSERT(res != nullptr);
 	return res;
 }
 
 gb_internal LLVMValueRef llvm_const_extract_value(lbModule *m, LLVMValueRef agg, unsigned *indices, isize count) {
-	// return LLVMConstExtractValue(value, indices, count);
 	LLVMValueRef res = agg;
-	GB_ASSERT(LLVMIsConstant(res));
 	for (isize i = 0; i < count; i++) {
-		res = LLVMBuildExtractValue(m->const_dummy_builder, res, indices[i], "");
-		GB_ASSERT(LLVMIsConstant(res));
+		res = llvm_const_extract_value(m, res, indices[i]);
 	}
 	return res;
 }
diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp
index a135904d9..a5f8ba66a 100644
--- a/src/llvm_backend_proc.cpp
+++ b/src/llvm_backend_proc.cpp
@@ -362,13 +362,13 @@ gb_internal lbProcedure *lb_create_procedure(lbModule *m, Entity *entity, bool i
 
 		Ast *ident = entity->identifier.load();
 		if (entity->file != nullptr) {
-			file = lb_get_llvm_metadata(m, entity->file);
+			file = lb_get_file_metadata(m, entity->file);
 			scope = file;
 		} else if (ident != nullptr && ident->file_id != 0) {
-			file = lb_get_llvm_metadata(m, ident->file());
+			file = lb_get_file_metadata(m, ident->file());
 			scope = file;
 		} else if (entity->scope != nullptr) {
-			file = lb_get_llvm_metadata(m, entity->scope->file);
+			file = lb_get_file_metadata(m, entity->scope->file);
 			scope = file;
 		}
 		GB_ASSERT_MSG(file != nullptr, "%.*s", LIT(entity->token.string));
diff --git a/src/llvm_backend_stmt.cpp b/src/llvm_backend_stmt.cpp
index 025de69ad..d35b48835 100644
--- a/src/llvm_backend_stmt.cpp
+++ b/src/llvm_backend_stmt.cpp
@@ -334,7 +334,7 @@ gb_internal void lb_open_scope(lbProcedure *p, Scope *s, bool lifetime_scope=fal
 			LLVMMetadataRef file = nullptr;
 			AstFile *ast_file = s->node->file();
 			if (ast_file != nullptr) {
-				file = lb_get_llvm_metadata(m, ast_file);
+				file = lb_get_file_metadata(m, ast_file);
 			}
 			LLVMMetadataRef scope = nullptr;
 			if (p->scope_stack.count > 0) {
diff --git a/src/types.cpp b/src/types.cpp
index 6067cd1d6..015b61ed3 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -188,6 +188,7 @@ struct TypeUnion {
 	bool             is_polymorphic;
 	bool             is_poly_specialized;
 	UnionTypeKind    kind;
+	std::atomic<u8>  constantable; // 0 unknown, 1 false, 2 true
 };
 
 struct TypeProc {
@@ -417,6 +418,9 @@ gb_internal Type *base_type(Type *t);
 gb_internal Type *alloc_type_multi_pointer(Type *elem);
 gb_internal void wait_for_record_signal(Wait_Signal *signal, Futex *checking_thread);
 
+// set once checking is done; until then a type may still be incomplete or part of an illegal cycle
+gb_global std::atomic<bool> global_types_are_complete;
+
 gb_internal u32 type_info_flags_of_type(Type *type) {
 	if (type == nullptr) {
 		return 0;
@@ -2787,16 +2791,25 @@ gb_internal bool is_type_union_constantable(Type *type) {
 	Type *bt = base_type(type);
 	GB_ASSERT(bt->kind == Type_Union);
 
-	if (bt->Union.variants.count == 0) {
-		return true;
-	}
-
-	for (Type *v : bt->Union.variants) {
-		if (!is_type_constant_type_for_unions(v)) {
-			return false;
+	bool use_cache = global_types_are_complete.load(std::memory_order_relaxed);
+	if (use_cache) {
+		u8 cached = bt->Union.constantable.load(std::memory_order_relaxed);
+		if (cached != 0) {
+			return cached == 2;
 		}
 	}
-	return true;
+
+	bool res = true;
+	for (Type *v : bt->Union.variants) {
+		if (!is_type_constant_type_for_unions(v)) {
+			res = false;
+			break;
+		}
+	}
+	if (use_cache) {
+		bt->Union.constantable.store(res ? 2 : 1, std::memory_order_relaxed);
+	}
+	return res;
 }
 
 gb_internal bool is_type_raw_union_constantable(Type *type) {
@@ -4389,6 +4402,9 @@ gb_internal i64 type_size_of_struct_pretend_is_packed(Type *ot) {
 
 
 gb_internal i64 type_size_of(Type *t) {
+	if (t != nullptr && t->kind == Type_Named && global_types_are_complete.load(std::memory_order_relaxed)) {
+		t = base_type(t);
+	}
 	if (t == nullptr) {
 		return 0;
 	}
@@ -4431,6 +4447,9 @@ gb_internal i64 type_size_of(Type *t) {
 }
 
 gb_internal i64 type_align_of(Type *t) {
+	if (t != nullptr && t->kind == Type_Named && global_types_are_complete.load(std::memory_order_relaxed)) {
+		t = base_type(t);
+	}
 	if (t == nullptr) {
 		return 1;
 	}

From 093357f63e7d422929928e86641d0aa6d614fd1d Mon Sep 17 00:00:00 2001
From: Arthur031221 <levi74108520963@gmail.com>
Date: Sat, 3 Oct 2026 11:26:45 +0800
Subject: [PATCH 159/215] Preserve zero-initialized arrays in
 intrinsics.concatenate

Co-authored-by: blob1807 <12388588+blob1807@users.noreply.github.com>
---
 src/check_builtin.cpp             |  27 ++++++-
 tests/issues/run.sh               |   1 +
 tests/issues/test_issue_7490.odin | 115 ++++++++++++++++++++++++++++++
 3 files changed, 142 insertions(+), 1 deletion(-)
 create mode 100644 tests/issues/test_issue_7490.odin

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 8de99553c..50c2e3465 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -5551,17 +5551,42 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 			ExactValue value = arg->tav.value;
 			GB_ASSERT(value.kind == ExactValue_Compound);
 			ast_node(cl, CompoundLit, value.value_compound);
-			count_needed += cl->elems.count;
+			count_needed += is_type_array(arg->tav.type)
+			              ? cast(isize)get_array_type_count(arg->tav.type)
+			              : cl->elems.count;
 		}
 
 		Array<Ast *> new_elems = {};
 		array_init(&new_elems, permanent_allocator(), 0, count_needed);
 
+		CheckerContext zero_context = *c;
+		zero_context.type_hint_expr = nullptr;
+
 		for (Ast *arg : ce->args) {
 			ExactValue value = arg->tav.value;
 			GB_ASSERT(value.kind == ExactValue_Compound);
 			ast_node(cl, CompoundLit, value.value_compound);
 			array_add_elems(&new_elems, cl->elems.data, cl->elems.count);
+
+			if (is_type_array(arg->tav.type)) {
+				isize count = cast(isize)get_array_type_count(arg->tav.type);
+				GB_ASSERT(cl->elems.count <= count);
+				for (isize i = cl->elems.count; i < count; i++) {
+					Ast *zero = ast_compound_lit(arg->file(), nullptr, {}, cl->open, cl->close);
+					if (is_type_constant_type(elem_type)) {
+						Operand z = {};
+						check_expr_with_type_hint(&zero_context, &z, zero, elem_type);
+						if (z.mode == Addressing_Invalid) {
+							return false;
+						}
+						GB_ASSERT(z.mode == Addressing_Constant);
+						GB_ASSERT(are_types_identical(z.type, elem_type));
+					} else {
+						add_type_and_value(c, zero, Addressing_Constant, elem_type, exact_value_compound(zero));
+					}
+					array_add(&new_elems, zero);
+				}
+			}
 		}
 
 		Ast *new_compound_lit = ast_compound_lit(lhs.expr->file(), nullptr, new_elems, ast_token(lhs.expr), ast_end_token(ce->args[ce->args.count-1]));
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 8defd7ea0..7d22af3e7 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -247,6 +247,7 @@ fi
 $ODIN test ../test_lifetime_markers.odin $COMMON -o:size -lifetime-markers
 $ODIN test ../test_lifetime_markers.odin $COMMON -o:speed -lifetime-markers
 $ODIN test ../test_issue_7547.odin $COMMON
+$ODIN test ../test_issue_7490.odin $COMMON
 
 set +x
 
diff --git a/tests/issues/test_issue_7490.odin b/tests/issues/test_issue_7490.odin
new file mode 100644
index 000000000..da1f14ab0
--- /dev/null
+++ b/tests/issues/test_issue_7490.odin
@@ -0,0 +1,115 @@
+package test_issue_7490
+
+import "base:intrinsics"
+import "core:mem"
+import "core:slice"
+import "core:testing"
+
+expect_elements :: proc(t: ^testing.T, got, expected: []$T) {
+	testing.expect_value(t, len(got), len(expected))
+	testing.expectf(t, slice.equal(got, expected), "Expected %v, got %v", expected, got)
+}
+
+@test
+concatenate_zero_arrays :: proc(t: ^testing.T) {
+	ARR :: [2]u8{}
+	arr :: intrinsics.concatenate(ARR, [1]u8{1}, [2]u8{}, [3]u8{5, 4, 3})
+	actual := arr
+	expected := [8]u8{0, 0, 1, 0, 0, 5, 4, 3}
+	expect_elements(t, actual[:], expected[:])
+	when len(arr) == 8 {
+		#assert(arr[0] == 0 && arr[2] == 1 && arr[7] == 3)
+	}
+
+	zeros := intrinsics.concatenate([2]int{}, [3]int{})
+	expect_elements(t, zeros[:], []int{0, 0, 0, 0, 0})
+	tail := intrinsics.concatenate([1]int{9}, [2]int{})
+	expect_elements(t, tail[:], []int{9, 0, 0})
+	empty := intrinsics.concatenate([0]int{}, [0]int{})
+	testing.expect_value(t, len(empty), 0)
+
+	s := intrinsics.concatenate([]u8{}, []u8{1}, []u8{}, []u8{5, 4, 3})
+	expect_elements(t, s, []u8{1, 5, 4, 3})
+	empty_slice := intrinsics.concatenate([]u8{}, []u8{})
+	testing.expect_value(t, len(empty_slice), 0)
+}
+
+@test
+concatenate_typed_zeros :: proc(t: ^testing.T) {
+	Word :: distinct u16
+	words := intrinsics.concatenate([2]Word{}, [1]Word{7})
+	expect_elements(t, words[:], []Word{0, 0, 7})
+	floats := intrinsics.concatenate([1]f64{}, [1]f64{1.5})
+	expect_elements(t, floats[:], []f64{0, 1.5})
+	complexes := intrinsics.concatenate([1]complex128{}, [1]complex128{1 + 2i})
+	expect_elements(t, complexes[:], []complex128{0, 1 + 2i})
+	quaternions := intrinsics.concatenate([1]quaternion256{}, [1]quaternion256{1 + 2i})
+	expect_elements(t, quaternions[:], []quaternion256{0, 1 + 2i})
+	bools := intrinsics.concatenate([2]bool{}, [1]bool{true})
+	expect_elements(t, bools[:], []bool{false, false, true})
+	strings := intrinsics.concatenate([2]string{}, [1]string{"x"}, [1]string{})
+	expect_elements(t, strings[:], []string{"", "", "x", ""})
+
+	Pair :: [2]int
+	Record :: struct {
+		number: int,
+		enabled: bool,
+		text: string,
+		pair: Pair,
+	}
+	r :: Record{7, true, "x", {3, 4}}
+	records := intrinsics.concatenate([2]Record{}, [1]Record{r}, [1]Record{})
+	expect_elements(t, records[:], []Record{{}, {}, r, {}})
+	rows := intrinsics.concatenate([2]Pair{}, [1]Pair{{3, 4}}, [1]Pair{})
+	expect_elements(t, rows[:], []Pair{{0, 0}, {0, 0}, {3, 4}, {0, 0}})
+}
+
+@test
+concatenate_nested_arrays :: proc(t: ^testing.T) {
+	nested := intrinsics.concatenate(
+		intrinsics.concatenate([2]u8{}, [1]u8{1}),
+		intrinsics.concatenate([2]u8{}, [3]u8{5, 4, 3}))
+	expect_elements(t, nested[:], []u8{0, 0, 1, 0, 0, 5, 4, 3})
+	nested_slice := intrinsics.concatenate(intrinsics.concatenate([]u8{}, []u8{1}), []u8{})
+	expect_elements(t, nested_slice, []u8{1})
+}
+
+@test
+concatenate_nil_elements :: proc(t: ^testing.T) {
+	values := intrinsics.concatenate([2][dynamic]int{}, [0][dynamic]int{})
+	testing.expect_value(t, len(values), 2)
+	for value in values {
+		raw := transmute(mem.Raw_Dynamic_Array)value
+		testing.expect(t, raw.data == nil)
+		testing.expect_value(t, raw.len, 0)
+		testing.expect_value(t, raw.cap, 0)
+		testing.expect(t, raw.allocator.procedure == nil && raw.allocator.data == nil)
+	}
+
+	Nested :: [2][dynamic]int
+	nested := intrinsics.concatenate([2]Nested{}, [0]Nested{})
+	testing.expect_value(t, len(nested), 2)
+	for row in nested {
+		for value in row {
+			raw := transmute(mem.Raw_Dynamic_Array)value
+			testing.expect(t, raw.data == nil && raw.allocator.procedure == nil && raw.allocator.data == nil)
+			testing.expect_value(t, raw.len, 0)
+			testing.expect_value(t, raw.cap, 0)
+		}
+	}
+
+	Record :: struct {
+		marker: int,
+		data: [dynamic]int,
+	}
+	r :: Record{marker = 7}
+	records := intrinsics.concatenate([2]Record{}, [1]Record{r}, [1]Record{})
+	testing.expect_value(t, len(records), 4)
+	for record, i in records {
+		testing.expect_value(t, record.marker, i == 2 ? 7 : 0)
+		raw := transmute(mem.Raw_Dynamic_Array)record.data
+		testing.expect(t, raw.data == nil && raw.allocator.procedure == nil && raw.allocator.data == nil)
+		testing.expect_value(t, raw.len, 0)
+		testing.expect_value(t, raw.cap, 0)
+	}
+}

From f670de9e806d4eaeac166f0f061e94e7342f308a Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 08:28:31 +0100
Subject: [PATCH 160/215] Define and initialize global variables in their own
 modules

---
 src/llvm_backend.cpp                          | 410 +++++++++---------
 src/llvm_backend.hpp                          |   6 +-
 src/llvm_backend_general.cpp                  |  19 +-
 tests/issues/run.bat                          |   2 +
 tests/issues/run.sh                           |   2 +
 .../issues/test_issue_split_globals/main.odin |  47 ++
 .../other/data/data.odin                      |   4 +
 .../test_issue_split_globals/other/other.odin |  36 ++
 8 files changed, 311 insertions(+), 215 deletions(-)
 create mode 100644 tests/issues/test_issue_split_globals/main.odin
 create mode 100644 tests/issues/test_issue_split_globals/other/data/data.odin
 create mode 100644 tests/issues/test_issue_split_globals/other/other.odin

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 031a71f3d..d39318215 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -192,7 +192,7 @@ gb_internal void lb_correct_entity_linkage(lbGenerator *gen) {
 		LLVMValueRef other_global = nullptr;
 		if (ec.e->kind == Entity_Variable) {
 			other_global = LLVMGetNamedGlobal(ec.other_module->mod, ec.cname);
-			if (other_global && (LLVMGetInitializer(other_global) != nullptr || LLVMIsExternallyInitialized(other_global))) {
+			if (other_global && !LLVMIsDeclaration(other_global)) {
 				LLVM_SET_INTERNAL_WEAK_LINKAGE(other_global);
 				if (!ec.e->Variable.is_export && !ec.e->Variable.is_foreign) {
 					LLVMSetVisibility(other_global, LLVMHiddenVisibility);
@@ -2164,73 +2164,130 @@ gb_internal bool lb_init_global_var(lbModule *m, lbProcedure *p, Entity *e, Ast
 }
 
 
-gb_internal void lb_create_startup_runtime_generate_body(lbModule *m, lbProcedure *p) {
-	lb_begin_procedure_body(p);
-
-	if (p->objc_names) {
-		LLVMBuildCall2(p->builder, lb_type_internal_for_procedures_raw(m, p->objc_names->type), p->objc_names->value, nullptr, 0, "");
+gb_internal bool lb_global_variable_has_constant_init(Entity *e, DeclInfo *decl) {
+	TypeAndValue tav = type_and_value_of_expr(decl->init_expr);
+	if (!is_type_any(e->type) && tav.mode != Addressing_Invalid && tav.value.kind != ExactValue_Invalid) {
+		return true;
 	}
-	Type *dummy_type = alloc_type_proc(nullptr, nullptr, 0, nullptr, 0, false, ProcCC_Odin);
-	LLVMTypeRef raw_dummy_type = lb_type_internal_for_procedures_raw(m, dummy_type);
-
-	for (auto &var : *p->global_variables) {
-		if (var.is_initialized) {
-			continue;
-		}
-
-		lbModule *entity_module = m;
-
-		Entity *e = var.decl->entity;
-		GB_ASSERT(e->kind == Entity_Variable);
-		e->code_gen_module = entity_module;
-		Ast *init_expr = var.decl->init_expr;
-
-		if (init_expr == nullptr && var.init.value == nullptr) {
-			continue;
-		}
-
-		if (false && type_size_of(e->type) > 8) {
-			String ename = lb_get_entity_name(m, e);
-			gbString name = gb_string_make(permanent_allocator(), "");
-			name = gb_string_appendc(name, "__$startup$");
-			name = gb_string_append_length(name, ename.text, ename.len);
-
-			lbProcedure *dummy = lb_create_dummy_procedure(m, make_string_c(name), dummy_type);
-			dummy->is_startup = true;
-			LLVMSetVisibility(dummy->value, LLVMHiddenVisibility);
-			LLVM_SET_INTERNAL_WEAK_LINKAGE(p->value);
-
-			lb_begin_procedure_body(dummy);
-			lb_init_global_var(m, dummy, e, init_expr, var);
-			lb_end_procedure_body(dummy);
-
-			LLVMValueRef context_ptr = lb_find_or_generate_context_ptr(p).addr.value;
-			LLVMValueRef cast_ctx = LLVMBuildBitCast(p->builder, context_ptr, LLVMPointerType(LLVMInt8TypeInContext(m->ctx), 0), "");
-			LLVMBuildCall2(p->builder, raw_dummy_type, dummy->value, &cast_ctx, 1, "");
-		} else {
-			lb_init_global_var(m, p, e, init_expr, var);
-		}
-
-		lbBlock *next = lb_create_block(p, "global.init", true);
-		lb_emit_jump(p, next);
-		lb_start_block(p, next);
-	}
-	CheckerInfo *info = m->gen->info;
-
-	for (Entity *e : info->init_procedures) {
-		lbValue value = lb_find_procedure_value_from_entity(m, e);
-		lb_emit_call(p, value, {}, ProcInlining_none, ProcTailing_none);
-	}
-
-
-	lb_end_procedure_body(p);
+	return is_type_untyped_nil(tav.type);
 }
 
+gb_internal void lb_create_global_variable(lbModule *m, lbGlobalVariable *var) {
+	DeclInfo *decl = var->decl;
+	Entity *e = decl->entity;
 
-gb_internal lbProcedure *lb_create_startup_runtime(lbModule *main_module, lbProcedure *objc_names, Array<lbGlobalVariable> &global_variables) { // Startup Runtime
+	bool is_foreign = e->Variable.is_foreign;
+	bool is_export  = e->Variable.is_export;
+
+	String name = lb_get_entity_name(m, e);
+
+	lbValue g = {};
+	g.type = alloc_type_pointer(e->type);
+	g.value = LLVMAddGlobal(m->mod, lb_type(m, e->type), alloc_cstring(permanent_allocator(), name));
+
+	if (decl->init_expr != nullptr) {
+		TypeAndValue tav = type_and_value_of_expr(decl->init_expr);
+		if (!is_type_any(e->type)) {
+			if (tav.mode != Addressing_Invalid) {
+				if (tav.value.kind != ExactValue_Invalid) {
+					auto cc = LB_CONST_CONTEXT_DEFAULT;
+					cc.is_rodata = e->kind == Entity_Variable && e->Variable.is_rodata;
+					cc.allow_local = false;
+					cc.link_section = e->Variable.link_section;
+
+					ExactValue v = tav.value;
+					lbValue init = lb_const_value(m, e->type, v, cc);
+
+					LLVMDeleteGlobal(g.value);
+					g.value = nullptr;
+					g.value = LLVMAddGlobal(m->mod, LLVMTypeOf(init.value), alloc_cstring(permanent_allocator(), name));
+
+					LLVMSetInitializer(g.value, init.value);
+					var->is_initialized = true;
+					if (cc.is_rodata) {
+						LLVMSetGlobalConstant(g.value, true);
+					}
+				}
+			}
+		}
+		if (!var->is_initialized && is_type_untyped_nil(tav.type)) {
+			var->is_initialized = true;
+			if (e->kind == Entity_Variable && e->Variable.is_rodata) {
+				LLVMSetGlobalConstant(g.value, true);
+			}
+		}
+	} else if (e->kind == Entity_Variable && e->Variable.is_rodata) {
+		LLVMSetGlobalConstant(g.value, true);
+	}
+
+	lb_apply_thread_local_model(g.value, e->Variable.thread_local_model);
+
+	if (is_foreign) {
+		LLVMSetLinkage(g.value, LLVMExternalLinkage);
+		LLVMSetDLLStorageClass(g.value, LLVMDLLImportStorageClass);
+		LLVMSetExternallyInitialized(g.value, true);
+		lb_add_foreign_library_path(m, e->Variable.foreign_library);
+	} else if (LLVMGetInitializer(g.value) == nullptr) {
+		LLVMSetInitializer(g.value, LLVMConstNull(lb_type(m, e->type)));
+	}
+	if (is_export) {
+		LLVMSetLinkage(g.value, LLVMDLLExportLinkage);
+		LLVMSetDLLStorageClass(g.value, LLVMDLLExportStorageClass);
+	} else if (!is_foreign) {
+		LLVM_SET_INTERNAL_WEAK_LINKAGE(g.value);
+	}
+	lb_set_linkage_from_entity_flags(m, g.value, e->flags);
+	LLVMSetAlignment(g.value, cast(u32)type_align_of(e->type));
+
+	if (e->Variable.link_section.len > 0) {
+		LLVMSetSection(g.value, alloc_cstring(permanent_allocator(), e->Variable.link_section));
+	}
+	if (e->flags & EntityFlag_Require) {
+		lb_append_to_compiler_used(m, g.value);
+	}
+
+	if (m->debug_builder) {
+		String global_name = e->token.string;
+		if (global_name.len != 0 && global_name != "_") {
+			LLVMMetadataRef llvm_file = lb_get_file_metadata(m, e->file);
+			LLVMMetadataRef llvm_scope = llvm_file;
+
+			LLVMBool local_to_unit = LLVMGetLinkage(g.value) == LLVMInternalLinkage;
+
+			LLVMMetadataRef llvm_expr = LLVMDIBuilderCreateExpression(m->debug_builder, nullptr, 0);
+			LLVMMetadataRef llvm_decl = nullptr;
+
+			u32 align_in_bits = cast(u32)(8*type_align_of(e->type));
+
+			LLVMMetadataRef global_variable_metadata = LLVMDIBuilderCreateGlobalVariableExpression(
+				m->debug_builder, llvm_scope,
+				cast(char const *)global_name.text, global_name.len,
+				"", 0, // linkage
+				llvm_file, e->token.pos.line,
+				lb_debug_type(m, e->type),
+				local_to_unit,
+				llvm_expr,
+				llvm_decl,
+				align_in_bits
+			);
+			lb_set_llvm_metadata(m, g.value, global_variable_metadata);
+			LLVMGlobalSetMetadata(g.value, 0, global_variable_metadata);
+		}
+	}
+
+	g.value = LLVMConstPointerCast(g.value, lb_type(m, alloc_type_pointer(e->type)));
+	var->var = g;
+
+	lb_add_entity(m, e, g);
+	lb_add_member(m, name, g);
+
+	GB_ASSERT(var->is_initialized == (decl->init_expr != nullptr && lb_global_variable_has_constant_init(e, decl)));
+}
+
+gb_internal lbProcedure *lb_create_startup_procedure(lbModule *m, String const &name) {
 	Type *proc_type = alloc_type_proc(nullptr, nullptr, 0, nullptr, 0, false, ProcCC_Odin);
 
-	lbProcedure *p = lb_create_dummy_procedure(main_module, str_lit(LB_STARTUP_RUNTIME_PROC_NAME), proc_type);
+	lbProcedure *p = lb_create_dummy_procedure(m, name, proc_type);
 	p->is_startup = true;
 	if (build_context.no_plt) {
 		lb_add_attribute_to_proc(p->module, p->value, "nonlazybind");
@@ -2241,11 +2298,71 @@ gb_internal lbProcedure *lb_create_startup_runtime(lbModule *main_module, lbProc
 	// Make sure shared libraries call their own runtime startup on Linux.
 	LLVMSetVisibility(p->value, LLVMHiddenVisibility);
 	LLVM_SET_INTERNAL_WEAK_LINKAGE(p->value);
+	return p;
+}
 
-	p->global_variables = &global_variables;
-	p->objc_names       = objc_names;
+gb_internal void lb_global_init_procedure_generate_body(lbModule *m, lbProcedure *p) {
+	lb_begin_procedure_body(p);
 
-	lb_create_startup_runtime_generate_body(main_module, p);
+	for (lbGlobalVariable *var : p->global_variables) {
+		lb_init_global_var(m, p, var->decl->entity, var->decl->init_expr, *var);
+
+		lbBlock *next = lb_create_block(p, "global.init", true);
+		lb_emit_jump(p, next);
+		lb_start_block(p, next);
+	}
+
+	lb_end_procedure_body(p);
+}
+
+// A global is initialized by the module it is defined in, so each run of the init order
+// within one module gets its own procedure, and the startup calls them in that order.
+gb_internal void lb_add_global_variable_to_initialize(lbModule *m, lbGlobalVariable *var) {
+	lbGenerator *gen = m->gen;
+	lbProcedure *p = nullptr;
+	if (gen->global_init_procedures.count != 0) {
+		p = gen->global_init_procedures[gen->global_init_procedures.count-1];
+	}
+	if (p == nullptr || p->module != m) {
+		gbString name = gb_string_make(permanent_allocator(), LB_STARTUP_RUNTIME_PROC_NAME);
+		name = gb_string_append_fmt(name, "$%td", gen->global_init_procedures.count);
+
+		p = lb_create_startup_procedure(m, make_string_c(name));
+		array_init(&p->global_variables, heap_allocator());
+		p->generate_body = lb_global_init_procedure_generate_body;
+
+		string_map_set(&m->gen_procs, p->name, p);
+		mpsc_enqueue(&m->procedures_to_generate, p);
+		array_add(&gen->global_init_procedures, p);
+	}
+	array_add(&p->global_variables, var);
+}
+
+gb_internal lbProcedure *lb_create_startup_runtime(lbModule *main_module, lbProcedure *objc_names) { // Startup Runtime
+	lbProcedure *p = lb_create_startup_procedure(main_module, str_lit(LB_STARTUP_RUNTIME_PROC_NAME));
+	p->objc_names = objc_names;
+
+	lb_begin_procedure_body(p);
+
+	if (p->objc_names) {
+		LLVMBuildCall2(p->builder, lb_type_internal_for_procedures_raw(main_module, p->objc_names->type), p->objc_names->value, nullptr, 0, "");
+	}
+
+	for (lbProcedure *init : main_module->gen->global_init_procedures) {
+		lbValue value = {init->value, init->type};
+		if (init->module != main_module) {
+			lbProcedure *decl = lb_create_dummy_procedure(main_module, init->name, init->type);
+			value = {decl->value, decl->type};
+		}
+		lb_emit_call(p, value, {}, ProcInlining_none, ProcTailing_none);
+	}
+
+	for (Entity *e : main_module->gen->info->init_procedures) {
+		lbValue value = lb_find_procedure_value_from_entity(main_module, e);
+		lb_emit_call(p, value, {}, ProcInlining_none, ProcTailing_none);
+	}
+
+	lb_end_procedure_body(p);
 
 	return p;
 }
@@ -2421,12 +2538,7 @@ gb_internal bool lb_is_module_empty(lbModule *m) {
 	}
 
 	for (auto g = LLVMGetFirstGlobal(m->mod); g != nullptr; g = LLVMGetNextGlobal(g)) {
-		LLVMLinkage linkage = LLVMGetLinkage(g);
-		if (linkage == LLVMExternalLinkage ||
-		    linkage == LLVMWeakAnyLinkage) {
-			continue;
-		}
-		if (!LLVMIsExternallyInitialized(g)) {
+		if (!LLVMIsDeclaration(g) && !LLVMIsExternallyInitialized(g)) {
 			return false;
 		}
 	}
@@ -2679,6 +2791,9 @@ gb_internal i64 lb_module_cost(lbModule *m) {
 
 gb_internal WORKER_TASK_PROC(lb_generate_procedures_worker_proc) {
 	lbModule *m = cast(lbModule *)data;
+	for (lbGlobalVariable *var : m->global_variables) {
+		lb_create_global_variable(m, var);
+	}
 	if (m == &m->gen->default_module) {
 		lb_setup_type_info_data(m);
 	}
@@ -2692,7 +2807,7 @@ gb_internal void lb_generate_procedures(lbGenerator *gen, bool do_threading) {
 	if (do_threading) {
 		for (auto const &entry : gen->modules) {
 			lbModule *m = entry.value;
-			m->estimated_cost = m->procedures_to_generate.count.load(std::memory_order_relaxed);
+			m->estimated_cost = m->procedures_to_generate.count.load(std::memory_order_relaxed) + m->global_variables.count;
 		}
 		gen->default_module.estimated_cost = I64_MAX;
 		for (lbModule *m : lb_modules_by_cost(gen)) {
@@ -3474,15 +3589,12 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 	}
 
 
-	isize global_variable_max_count = 0;
 	bool already_has_entry_point = false;
 
 	for (Entity *e : info->entities) {
 		String name = e->token.string;
 
-		if (e->kind == Entity_Variable) {
-			global_variable_max_count++;
-		} else if (e->kind == Entity_Procedure) {
+		if (e->kind == Entity_Procedure) {
 			if ((e->scope->flags&ScopeFlag_Init) && name == "main") {
 				GB_ASSERT(e == info->entry_point);
 			}
@@ -3504,8 +3616,8 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 		}
 	}
 
-
-	auto global_variables = array_make<lbGlobalVariable>(permanent_allocator(), 0, global_variable_max_count);
+	// `lb_setup_type_info_data` sets its initializer
+	Entity *type_table = scope_lookup_current(info->runtime_package->scope, string_interner_insert(str_lit("type_table")));
 
 	for (DeclInfo *d : info->variable_init_order) {
 		Entity *e = d->entity;
@@ -3524,141 +3636,19 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 		}
 		GB_ASSERT(e->kind == Entity_Variable);
 
-
-		bool is_foreign = e->Variable.is_foreign;
-		bool is_export  = e->Variable.is_export;
-
-		lbModule *default_module = &gen->default_module;
-
-		lbModule *m = default_module;
-		lbModule *e_module = lb_module_of_entity(gen, e, default_module);
-
-		bool const split_globals_across_modules = false;
-		if (split_globals_across_modules) {
-			m = e_module;
+		lbModule *m = lb_module_of_entity(gen, e, default_module);
+		if (e == type_table) {
+			m = default_module;
 		}
+		e->code_gen_module = m;
 
-		String name = lb_get_entity_name(m, e);
+		lbGlobalVariable *var = permanent_alloc_item<lbGlobalVariable>();
+		var->decl = decl;
+		array_add(&m->global_variables, var);
 
-		lbGlobalVariable var = {};
-		var.decl = decl;
-
-		lbValue g = {};
-		g.type = alloc_type_pointer(e->type);
-		g.value = LLVMAddGlobal(m->mod, lb_type(m, e->type), alloc_cstring(permanent_allocator(), name));
-
-		if (decl->init_expr != nullptr) {
-			TypeAndValue tav = type_and_value_of_expr(decl->init_expr);
-			if (!is_type_any(e->type)) {
-				if (tav.mode != Addressing_Invalid) {
-					if (tav.value.kind != ExactValue_Invalid) {
-						auto cc = LB_CONST_CONTEXT_DEFAULT;
-						cc.is_rodata = e->kind == Entity_Variable && e->Variable.is_rodata;
-						cc.allow_local = false;
-						cc.link_section = e->Variable.link_section;
-
-						ExactValue v = tav.value;
-						lbValue init = lb_const_value(m, e->type, v, cc);
-
-
-						LLVMDeleteGlobal(g.value);
-						g.value = nullptr;
-						g.value = LLVMAddGlobal(m->mod, LLVMTypeOf(init.value), alloc_cstring(permanent_allocator(), name));
-
-						LLVMSetInitializer(g.value, init.value);
-						var.is_initialized = true;
-						if (cc.is_rodata) {
-							LLVMSetGlobalConstant(g.value, true);
-						}
-					}
-				}
-			}
-			if (!var.is_initialized && is_type_untyped_nil(tav.type)) {
-				var.is_initialized = true;
-				if (e->kind == Entity_Variable && e->Variable.is_rodata) {
-					LLVMSetGlobalConstant(g.value, true);
-				}
-			}
-		} else if (e->kind == Entity_Variable && e->Variable.is_rodata) {
-			LLVMSetGlobalConstant(g.value, true);
+		if (decl->init_expr != nullptr && !lb_global_variable_has_constant_init(e, decl)) {
+			lb_add_global_variable_to_initialize(m, var);
 		}
-
-
-		lb_apply_thread_local_model(g.value, e->Variable.thread_local_model);
-
-		if (is_foreign) {
-			LLVMSetLinkage(g.value, LLVMExternalLinkage);
-			LLVMSetDLLStorageClass(g.value, LLVMDLLImportStorageClass);
-			LLVMSetExternallyInitialized(g.value, true);
-			lb_add_foreign_library_path(m, e->Variable.foreign_library);
-		} else if (LLVMGetInitializer(g.value) == nullptr) {
-			LLVMSetInitializer(g.value, LLVMConstNull(lb_type(m, e->type)));
-		}
-		if (is_export) {
-			LLVMSetLinkage(g.value, LLVMDLLExportLinkage);
-			LLVMSetDLLStorageClass(g.value, LLVMDLLExportStorageClass);
-		} else if (!is_foreign) {
-			LLVM_SET_INTERNAL_WEAK_LINKAGE(g.value);
-		}
-		lb_set_linkage_from_entity_flags(m, g.value, e->flags);
-		LLVMSetAlignment(g.value, cast(u32)type_align_of(e->type));
-
-		if (e->Variable.link_section.len > 0) {
-			LLVMSetSection(g.value, alloc_cstring(permanent_allocator(), e->Variable.link_section));
-		}
-		if (e->flags & EntityFlag_Require) {
-			lb_append_to_compiler_used(m, g.value);
-		}
-
-		if (m->debug_builder) {
-			String global_name = e->token.string;
-			if (global_name.len != 0 && global_name != "_") {
-				LLVMMetadataRef llvm_file = lb_get_file_metadata(m, e->file);
-				LLVMMetadataRef llvm_scope = llvm_file;
-
-				LLVMBool local_to_unit = LLVMGetLinkage(g.value) == LLVMInternalLinkage;
-
-				LLVMMetadataRef llvm_expr = LLVMDIBuilderCreateExpression(m->debug_builder, nullptr, 0);
-				LLVMMetadataRef llvm_decl = nullptr;
-
-				u32 align_in_bits = cast(u32)(8*type_align_of(e->type));
-
-				LLVMMetadataRef global_variable_metadata = LLVMDIBuilderCreateGlobalVariableExpression(
-					m->debug_builder, llvm_scope,
-					cast(char const *)global_name.text, global_name.len,
-					"", 0, // linkage
-					llvm_file, e->token.pos.line,
-					lb_debug_type(m, e->type),
-					local_to_unit,
-					llvm_expr,
-					llvm_decl,
-					align_in_bits
-				);
-				lb_set_llvm_metadata(m, g.value, global_variable_metadata);
-				LLVMGlobalSetMetadata(g.value, 0, global_variable_metadata);
-			}
-		}
-
-		if (default_module == m) {
-			g.value = LLVMConstPointerCast(g.value, lb_type(m, alloc_type_pointer(e->type)));
-
-			var.var = g;
-			array_add(&global_variables, var);
-		} else {
-			lbValue local_g = {};
-			local_g.type  = alloc_type_pointer(e->type);
-			local_g.value = LLVMAddGlobal(default_module->mod, lb_type(default_module, e->type), alloc_cstring(permanent_allocator(), name));
-			LLVMSetLinkage(local_g.value, LLVMExternalLinkage);
-
-			var.var = local_g;
-			array_add(&global_variables, var);
-
-			lb_add_entity(default_module, e, local_g);
-			lb_add_member(default_module, name, local_g);
-		}
-
-		lb_add_entity(m, e, g);
-		lb_add_member(m, name, g);
 	}
 
 	if (build_context.ODIN_DEBUG) {
@@ -3687,7 +3677,7 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 	gen->objc_names = lb_create_objc_names(default_module);
 
 	TIME_SECTION("LLVM Runtime Startup Creation (Global Variables & @(init))");
-	gen->startup_runtime = lb_create_startup_runtime(default_module, gen->objc_names, global_variables);
+	gen->startup_runtime = lb_create_startup_runtime(default_module, gen->objc_names);
 
 	TIME_SECTION("LLVM Runtime Cleanup Creation & @(fini)");
 	gen->cleanup_runtime = lb_create_cleanup_runtime(default_module);
diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index 02808aecc..ac2d452fe 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -24,6 +24,7 @@
 #endif
 
 struct lbProcedure;
+struct lbGlobalVariable;
 
 struct lbValue {
 	LLVMValueRef value;
@@ -164,6 +165,7 @@ struct lbModule {
 	MPSCQueue<lbProcedure *> procedures_to_generate;
 	Array<Entity *> global_procedures_to_create;
 	Array<Entity *> global_types_to_create;
+	Array<lbGlobalVariable *> global_variables;
 
 	BlockingMutex generated_procedures_mutex;
 	Array<lbProcedure *> generated_procedures;
@@ -227,6 +229,8 @@ struct lbGenerator : LinkerData {
 	lbProcedure *cleanup_runtime;
 	lbProcedure *objc_names;
 
+	Array<lbProcedure *> global_init_procedures;
+
 	MPSCQueue<lbEntityCorrection> entities_to_correct_linkage;
 	MPSCQueue<lbObjCGlobal> objc_selectors;
 	MPSCQueue<lbObjCGlobal> objc_classes;
@@ -401,7 +405,7 @@ struct lbProcedure {
 	Array<bool>            lifetime_scopes;
 
 	void (*generate_body)(lbModule *m, lbProcedure *p);
-	Array<lbGlobalVariable> *global_variables;
+	Array<lbGlobalVariable *> global_variables;
 	lbProcedure *objc_names;
 
 	Type *internal_gen_type; // map_set, map_get, etc.
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 6b7fefcc6..417504376 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -164,6 +164,7 @@ gb_internal WORKER_TASK_PROC(lb_init_module_worker_proc) {
 
 	array_init(&m->global_procedures_to_create, a, 0, 1024);
 	array_init(&m->global_types_to_create, a, 0, 1024);
+	array_init(&m->global_variables, a);
 	mpsc_init(&m->missing_procedures_to_check, a);
 	map_init(&m->debug_values);
 
@@ -194,18 +195,27 @@ gb_internal void lb_init_module(lbModule *m, bool do_threading) {
 gb_internal i64 lb_estimate_file_code_sizes(CheckerInfo *info, PtrMap<AstFile *, i64> *sizes) {
 	i64 total = 0;
 	for (Entity *e : info->entities) {
-		if (e->kind != Entity_Procedure || e->file == nullptr || e->min_dep_count.load(std::memory_order_relaxed) == 0) {
+		if (e->file == nullptr || e->min_dep_count.load(std::memory_order_relaxed) == 0) {
 			continue;
 		}
 		if (e->scope == nullptr || (e->scope->flags & ScopeFlag_File) == 0) {
 			continue;
 		}
 		DeclInfo *d = e->decl_info;
-		if (d == nullptr || d->proc_lit == nullptr || d->proc_lit->kind != Ast_ProcLit || d->proc_lit->ProcLit.body == nullptr) {
+		Ast *code = nullptr;
+		if (e->kind == Entity_Procedure) {
+			if (d != nullptr && d->proc_lit != nullptr && d->proc_lit->kind == Ast_ProcLit) {
+				code = d->proc_lit->ProcLit.body;
+			}
+		} else if (e->kind == Entity_Variable) {
+			if (d != nullptr) {
+				code = d->init_expr;
+			}
+		}
+		if (code == nullptr) {
 			continue;
 		}
-		Ast *body = d->proc_lit->ProcLit.body;
-		i64 size = gb_max(cast(i64)(ast_end_token(body).pos.offset - ast_token(body).pos.offset), 1);
+		i64 size = gb_max(cast(i64)(ast_end_token(code).pos.offset - ast_token(code).pos.offset), 1);
 		i64 *found = map_get(sizes, e->file);
 		if (found) {
 			*found += size;
@@ -426,6 +436,7 @@ gb_internal bool lb_init_generator(lbGenerator *gen, Checker *c) {
 	map_init(&gen->modules, gen->info->packages.count*2);
 	map_init(&gen->modules_through_ctx, gen->info->packages.count*2);
 	map_init(&gen->file_modules);
+	array_init(&gen->global_init_procedures, heap_allocator());
 
 	if (USE_SEPARATE_MODULES) {
 		bool module_per_file = build_context.module_per_file && (build_context.optimization_level <= 0 || build_context.lto_kind != LTO_None);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index a921c04b3..f7538ca21 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -93,6 +93,8 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_procedure_of_specialized.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
+..\..\..\odin test ..\test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables || exit /b
+..\..\..\odin test ..\test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables -debug || exit /b
 
 @echo off
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index e7edc7d0e..523c52322 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -119,6 +119,8 @@ $ODIN test ../test_issue_7700.odin $COMMON
 $ODIN test ../test_issue_procedure_of_specialized.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
+$ODIN test ../test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables
+$ODIN test ../test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables -debug
 $ODIN test ../test_issue_7421.odin $COMMON
 if [[ $($ODIN check ../test_issue_7421_tagged_duplicate.odin $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error: Duplicate case") -eq 1 ]]; then
 	echo "SUCCESSFUL 1/1"
diff --git a/tests/issues/test_issue_split_globals/main.odin b/tests/issues/test_issue_split_globals/main.odin
new file mode 100644
index 000000000..4ac49658e
--- /dev/null
+++ b/tests/issues/test_issue_split_globals/main.odin
@@ -0,0 +1,47 @@
+// Globals are defined and initialized in the module of their own package
+package test_issue_split_globals
+
+import "core:testing"
+import "other"
+import "other/data"
+
+C := other.A + 10*other.B
+D := other.next() + 0*C
+E := data.PTR^
+F := other.callback()
+G := other.P_ptr
+H := &other.TABLE
+
+init_counter: int
+
+@(init)
+record_counter :: proc "contextless" () {
+	init_counter = other.counter
+}
+
+@(test)
+test_split_globals :: proc(t: ^testing.T) {
+	values := [4]int{other.A, other.B, other.get_internal(), D}
+	seen: [5]bool
+	for v in values {
+		testing.expect(t, 1 <= v && v <= 4)
+		if 1 <= v && v <= 4 {
+			testing.expect(t, !seen[v])
+			seen[v] = true
+		}
+	}
+	testing.expect(t, D > other.A && D > other.B)
+	testing.expect_value(t, C, other.A + 10*other.B)
+	testing.expect_value(t, other.counter, 4)
+	testing.expect_value(t, init_counter, 4)
+
+	testing.expect_value(t, E, 20)
+	testing.expect_value(t, data.PTR, &data.VALUES[1])
+	testing.expect_value(t, F, 7)
+	testing.expect_value(t, G, &other.P)
+	testing.expect_value(t, H^[0], &other.P)
+	testing.expect_value(t, other.boxed^, other.Point{3, 4})
+	testing.expect_value(t, other.NAMES[2], "z")
+	testing.expect_value(t, other.RO[3], 4)
+	testing.expect_value(t, other.any_p.(other.Point), other.Point{1, 2})
+}
diff --git a/tests/issues/test_issue_split_globals/other/data/data.odin b/tests/issues/test_issue_split_globals/other/data/data.odin
new file mode 100644
index 000000000..eb00a93e8
--- /dev/null
+++ b/tests/issues/test_issue_split_globals/other/data/data.odin
@@ -0,0 +1,4 @@
+package data
+
+VALUES := [3]int{10, 20, 30}
+PTR    := &VALUES[1]
diff --git a/tests/issues/test_issue_split_globals/other/other.odin b/tests/issues/test_issue_split_globals/other/other.odin
new file mode 100644
index 000000000..79a7805f8
--- /dev/null
+++ b/tests/issues/test_issue_split_globals/other/other.odin
@@ -0,0 +1,36 @@
+package other
+
+counter: int
+
+next :: proc "contextless" () -> int {
+	counter += 1
+	return counter
+}
+
+A := next()
+B := next()
+
+@(linkage="internal")
+internal_value := next()
+
+get_internal :: proc "contextless" () -> int {
+	return internal_value
+}
+
+Point :: struct {
+	x, y: int,
+}
+
+P      := Point{1, 2}
+P_ptr  := &P
+TABLE  := []^Point{&P}
+boxed  := &Point{3, 4}
+NAMES  := [3]string{"x", "y", "z"}
+any_p: any = P
+
+@(rodata)
+RO := [4]int{1, 2, 3, 4}
+
+callback := proc "contextless" () -> int {
+	return 7
+}

From 8b4f855fc65864d3bdc22d4ace10792bb19b5bc1 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 09:42:26 +0100
Subject: [PATCH 161/215] Fix a union constant from a field omitted in a
 constant compound literal being nil

---
 src/llvm_backend_const.cpp                    |  6 ++-
 .../test_issue_omitted_field_union.odin       | 51 +++++++++++++++++++
 2 files changed, 56 insertions(+), 1 deletion(-)
 create mode 100644 tests/issues/test_issue_omitted_field_union.odin

diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index aa080dca8..db123b142 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -946,7 +946,11 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 		Type *value_type = value.variant_type;
 		switch (value.kind) {
 		case ExactValue_Invalid:
-			return lb_const_nil(m, original_type);
+			// the zero value of a variant, e.g. a field omitted from a constant compound literal
+			if (value_type == nullptr || are_types_identical(value_type, original_type)) {
+				return lb_const_nil(m, original_type);
+			}
+			break;
 
 		case ExactValue_Compound: {
 			ast_node(cl, CompoundLit, value.value_compound);
diff --git a/tests/issues/test_issue_omitted_field_union.odin b/tests/issues/test_issue_omitted_field_union.odin
new file mode 100644
index 000000000..c71246ba0
--- /dev/null
+++ b/tests/issues/test_issue_omitted_field_union.odin
@@ -0,0 +1,51 @@
+// A field omitted from a constant compound literal is the zero value of its type,
+// so converting it to a union holds that variant rather than nil
+package test_issues
+
+import "core:testing"
+
+Apply :: struct {
+	position:         [3]f64,
+	roll, pitch, yaw: f64,
+}
+
+APPLY_DEFAULT : Apply : { position = {1, 2, 3}, yaw = 26.5, pitch = -24 }
+
+Value :: union { bool, f64, [3]f64 }
+
+Info :: struct {
+	name:          string,
+	default_value: Value,
+}
+
+INFOS :: []Info{
+	{ name = "yaw",  default_value = APPLY_DEFAULT.yaw },
+	{ name = "roll", default_value = APPLY_DEFAULT.roll },
+}
+
+infos := INFOS
+
+global_roll: Value = APPLY_DEFAULT.roll
+
+@(test)
+test_omitted_field_union :: proc(t: ^testing.T) {
+	yaw, yaw_ok := infos[0].default_value.(f64)
+	testing.expect(t, yaw_ok)
+	testing.expect_value(t, yaw, 26.5)
+
+	roll, roll_ok := infos[1].default_value.(f64)
+	testing.expect(t, roll_ok)
+	testing.expect_value(t, roll, 0)
+
+	for info in INFOS {
+		_, ok := info.default_value.(f64)
+		testing.expect(t, ok)
+	}
+
+	_, global_ok := global_roll.(f64)
+	testing.expect(t, global_ok)
+
+	local_roll: Value = APPLY_DEFAULT.roll
+	_, local_ok := local_roll.(f64)
+	testing.expect(t, local_ok)
+}

From e5cc35c44554caa4f9f56a7772269bbe48c3eabb Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 11:02:55 +0100
Subject: [PATCH 162/215] Lower what LLVM's fast instruction selector cannot
 select before emitting objects, and declare debug variables through stack
 slots

---
 src/llvm_backend.cpp                          | 529 ++++++++++++++++++
 src/llvm_backend_debug.cpp                    |  21 +
 src/llvm_backend_general.cpp                  |  55 +-
 src/llvm_backend_proc.cpp                     |   7 +-
 src/llvm_backend_utility.cpp                  |  21 +
 tests/issues/run.bat                          |   3 +
 tests/issues/run.sh                           |   3 +
 .../issues/test_issue_fast_isel_lowering.odin | 121 ++++
 8 files changed, 750 insertions(+), 10 deletions(-)
 create mode 100644 tests/issues/test_issue_fast_isel_lowering.odin

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index d39318215..6acc3c723 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2545,6 +2545,531 @@ gb_internal bool lb_is_module_empty(lbModule *m) {
 	return true;
 }
 
+// NOTE(bill, 2026-10-03)
+//
+// LLVM's fast instruction selector cannot select a first class aggregate `load`, `store`, `insertvalue`, or `select`,
+// and hands the rest of the block to SelectionDAG.
+// SROA leaves many behind so it stores/loads the fields instead
+enum {
+	LB_SCALARIZE_MAX_LEAVES = 32,
+	LB_SCALARIZE_MAX_DEPTH  = 8,
+};
+
+struct lbAggregateLeaf {
+	unsigned path[LB_SCALARIZE_MAX_DEPTH];
+	unsigned depth;
+};
+
+struct lbScalarizedPhi {
+	LLVMValueRef aggregate;
+	unsigned     path[LB_SCALARIZE_MAX_DEPTH];
+	unsigned     depth;
+	LLVMValueRef field;
+	bool         ok;
+};
+
+struct lbFastIselLowering {
+	lbModule *     m;
+	LLVMBuilderRef builder;
+	LLVMValueRef   store;
+	Array<lbScalarizedPhi> phis;
+};
+
+gb_internal i64 lb_aggregate_path_offset(LLVMTypeRef type, unsigned const *path, unsigned depth, LLVMTypeRef *leaf_type_) {
+	i64 offset = 0;
+	for (unsigned d = 0; d < depth; d++) {
+		if (LLVMGetTypeKind(type) == LLVMStructTypeKind) {
+			bool is_packed = LLVMIsPackedStruct(type);
+			i64 field_offset = 0;
+			for (unsigned i = 0; i <= path[d]; i++) {
+				LLVMTypeRef field = LLVMStructGetTypeAtIndex(type, i);
+				if (!is_packed) {
+					field_offset = llvm_align_formula(field_offset, lb_alignof(field));
+				}
+				if (i == path[d]) {
+					type = field;
+					break;
+				}
+				field_offset += lb_sizeof(field);
+			}
+			offset += field_offset;
+		} else {
+			type = OdinLLVMGetArrayElementType(type);
+			offset += cast(i64)path[d] * lb_sizeof(type);
+		}
+	}
+	if (leaf_type_) *leaf_type_ = type;
+	return offset;
+}
+
+gb_internal bool lb_aggregate_leaves(LLVMTypeRef type, unsigned *path, unsigned depth, lbAggregateLeaf *leaves, isize *leaf_count) {
+	LLVMTypeKind kind = LLVMGetTypeKind(type);
+	if (kind == LLVMStructTypeKind || kind == LLVMArrayTypeKind) {
+		if (depth >= LB_SCALARIZE_MAX_DEPTH) {
+			return false;
+		}
+		if (kind == LLVMStructTypeKind && LLVMIsOpaqueStruct(type)) {
+			return false;
+		}
+		unsigned count = kind == LLVMStructTypeKind ? LLVMCountStructElementTypes(type) : cast(unsigned)LLVMGetArrayLength(type);
+		for (unsigned i = 0; i < count; i++) {
+			path[depth] = i;
+			LLVMTypeRef elem = kind == LLVMStructTypeKind ? LLVMStructGetTypeAtIndex(type, i) : OdinLLVMGetArrayElementType(type);
+			if (!lb_aggregate_leaves(elem, path, depth+1, leaves, leaf_count)) {
+				return false;
+			}
+		}
+		return true;
+	}
+
+	if (*leaf_count >= LB_SCALARIZE_MAX_LEAVES) {
+		return false;
+	}
+
+	lbAggregateLeaf *leaf = &leaves[(*leaf_count)++];
+	gb_memmove(leaf->path, path, depth*gb_size_of(unsigned));
+	leaf->depth = depth;
+	return true;
+}
+
+gb_internal unsigned lb_alignment_at_offset(unsigned alignment, i64 offset) {
+	unsigned a = gb_max(alignment, 1u);
+	while (offset % a != 0) {
+		a >>= 1;
+	}
+	return a;
+}
+
+gb_internal LLVMValueRef lb_aggregate_field_gep(lbModule *m, LLVMBuilderRef b, LLVMTypeRef type, LLVMValueRef ptr, unsigned const *path, unsigned depth) {
+	LLVMValueRef indices[LB_SCALARIZE_MAX_DEPTH+1] = {};
+	LLVMTypeRef i32 = LLVMInt32TypeInContext(m->ctx);
+	indices[0] = LLVMConstInt(i32, 0, false);
+	for (unsigned d = 0; d < depth; d++) {
+		indices[d+1] = LLVMConstInt(i32, path[d], false);
+	}
+	return LLVMBuildInBoundsGEP2(b, type, ptr, indices, depth+1, "");
+}
+
+// returns false if the field cannot be reached without an aggregate value, and sets `*field_` to nullptr when it is undefined
+gb_internal bool lb_aggregate_field_value(lbFastIselLowering *s, LLVMValueRef v, unsigned const *path, unsigned depth, LLVMValueRef *field_) {
+	if (depth == 0) {
+		*field_ = (LLVMIsUndef(v) || LLVMIsPoison(v)) ? nullptr : v;
+		return true;
+	}
+	if (LLVMIsUndef(v) || LLVMIsPoison(v)) {
+		*field_ = nullptr;
+		return true;
+	}
+
+	if (LLVMIsAConstant(v)) {
+		LLVMValueRef elem = LLVMGetAggregateElement(v, path[0]);
+		if (elem != nullptr) {
+			return lb_aggregate_field_value(s, elem, path+1, depth-1, field_);
+		}
+	} else if (LLVMIsAInsertValueInst(v)) {
+		unsigned n = LLVMGetNumIndices(v);
+		unsigned const *indices = LLVMGetIndices(v);
+
+		unsigned k = 0;
+		while (k < n && k < depth && indices[k] == path[k]) {
+			k += 1;
+		}
+
+		if (k == n) {
+			return lb_aggregate_field_value(s, LLVMGetOperand(v, 1), path+n, depth-n, field_);
+		} else if (k < depth) {
+			return lb_aggregate_field_value(s, LLVMGetOperand(v, 0), path, depth, field_);
+		}
+		return false;
+	} else if (LLVMIsAExtractValueInst(v)) {
+		unsigned n = LLVMGetNumIndices(v);
+		if (n + depth <= LB_SCALARIZE_MAX_DEPTH) {
+			unsigned full[LB_SCALARIZE_MAX_DEPTH];
+			gb_memmove(full, LLVMGetIndices(v), n*gb_size_of(unsigned));
+			gb_memmove(full+n, path, depth*gb_size_of(unsigned));
+			return lb_aggregate_field_value(s, LLVMGetOperand(v, 0), full, n+depth, field_);
+		}
+		return false;
+	} else if (LLVMIsASelectInst(v)) {
+		LLVMValueRef x = nullptr;
+		LLVMValueRef y = nullptr;
+		if (!lb_aggregate_field_value(s, LLVMGetOperand(v, 1), path, depth, &x) ||
+		    !lb_aggregate_field_value(s, LLVMGetOperand(v, 2), path, depth, &y)) {
+			return false;
+		}
+		if (x == nullptr || y == nullptr) {
+			*field_ = x ? x : y;
+			return true;
+		}
+		LLVMPositionBuilderBefore(s->builder, s->store);
+		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(s->store));
+		*field_ = LLVMBuildSelect(s->builder, LLVMGetOperand(v, 0), x, y, "");
+		return true;
+	} else if (LLVMIsAPHINode(v)) {
+		for (lbScalarizedPhi const &e : s->phis) {
+			if (e.aggregate == v &&
+			    e.depth == depth &&
+			    gb_memcompare(e.path, path, depth*gb_size_of(unsigned)) == 0) {
+				*field_ = e.field;
+				return e.ok;
+			}
+		}
+
+		LLVMTypeRef field_type = nullptr;
+		lb_aggregate_path_offset(LLVMTypeOf(v), path, depth, &field_type);
+
+		LLVMPositionBuilderBefore(s->builder, v);
+		LLVMSetCurrentDebugLocation2(s->builder, nullptr);
+
+
+		// NOTE(bill): cached before its incoming values, as a loop reaches it again
+		isize index = s->phis.count;
+		lbScalarizedPhi entry = {};
+		entry.aggregate = v;
+		gb_memmove(entry.path, path, depth*gb_size_of(unsigned));
+
+		LLVMValueRef phi = LLVMBuildPhi(s->builder, field_type, "");
+		entry.depth = depth;
+		entry.field = phi;
+		entry.ok    = true;
+		array_add(&s->phis, entry);
+
+		LLVMValueRef saved_store = s->store;
+		bool ok = true;
+		unsigned incoming_count = LLVMCountIncoming(v);
+		for (unsigned k = 0; k < incoming_count; k++) {
+			LLVMBasicBlockRef block = LLVMGetIncomingBlock(v, k);
+			s->store = LLVMGetBasicBlockTerminator(block);
+			LLVMValueRef field = nullptr;
+			if (!lb_aggregate_field_value(s, LLVMGetIncomingValue(v, k), path, depth, &field)) {
+				ok = false;
+				field = nullptr;
+			}
+			if (field == nullptr) {
+				field = LLVMGetUndef(field_type);
+			}
+			LLVMAddIncoming(phi, &field, &block, 1);
+		}
+		s->store = saved_store;
+		s->phis[index].ok = ok;
+		*field_ = phi;
+		return ok;
+	} else if (LLVMIsALoadInst(v) && !LLVMGetVolatile(v) && LLVMGetOrdering(v) == LLVMAtomicOrderingNotAtomic) {
+		// NOTE(bill): Read the field where the aggregate was read, as the memory may change before the store
+		LLVMTypeRef type       = LLVMTypeOf(v);
+		LLVMTypeRef field_type = nullptr;
+		i64 offset = lb_aggregate_path_offset(type, path, depth, &field_type);
+
+		LLVMPositionBuilderBefore(s->builder, LLVMGetNextInstruction(v));
+		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(v));
+
+		LLVMValueRef ptr   = lb_aggregate_field_gep(s->m, s->builder, type, LLVMGetOperand(v, 0), path, depth);
+		LLVMValueRef field = LLVMBuildLoad2(s->builder, field_type, ptr, "");
+		LLVMSetAlignment(field, lb_alignment_at_offset(LLVMGetAlignment(v), offset));
+
+		*field_ = field;
+		return true;
+	}
+
+	if (depth == 1) {
+		LLVMPositionBuilderBefore(s->builder, s->store);
+		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(s->store));
+		*field_ = LLVMBuildExtractValue(s->builder, v, path[0], "");
+		return true;
+	}
+	return false;
+}
+
+gb_internal bool lb_scalarize_aggregate_store(lbFastIselLowering *s, LLVMValueRef store) {
+	LLVMValueRef value = LLVMGetOperand(store, 0);
+	LLVMValueRef ptr   = LLVMGetOperand(store, 1);
+	LLVMTypeRef  type  = LLVMTypeOf(value);
+
+	lbAggregateLeaf leaves[LB_SCALARIZE_MAX_LEAVES] = {};
+	isize leaf_count = 0;
+	unsigned path[LB_SCALARIZE_MAX_DEPTH] = {};
+
+	if (!lb_aggregate_leaves(type, path, 0, leaves, &leaf_count)) {
+		return false;
+	}
+	s->store = store;
+
+	LLVMValueRef fields[LB_SCALARIZE_MAX_LEAVES] = {};
+	for (isize i = 0; i < leaf_count; i++) {
+		if (!lb_aggregate_field_value(s, value, leaves[i].path, leaves[i].depth, &fields[i])) {
+			return false;
+		}
+	}
+
+	unsigned alignment = LLVMGetAlignment(store);
+
+	LLVMPositionBuilderBefore(s->builder, store);
+	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(store));
+
+	for (isize i = 0; i < leaf_count; i++) {
+		if (fields[i] == nullptr) {
+			continue;
+		}
+		i64 offset = lb_aggregate_path_offset(type, leaves[i].path, leaves[i].depth, nullptr);
+		LLVMValueRef field_ptr = lb_aggregate_field_gep(s->m, s->builder, type, ptr, leaves[i].path, leaves[i].depth);
+		LLVMValueRef field_store = LLVMBuildStore(s->builder, fields[i], field_ptr);
+		LLVMSetAlignment(field_store, lb_alignment_at_offset(alignment, offset));
+	}
+	LLVMInstructionEraseFromParent(store);
+	return true;
+}
+
+gb_internal bool lb_is_aggregate_type(LLVMTypeRef type) {
+	LLVMTypeKind kind = LLVMGetTypeKind(type);
+	return kind == LLVMStructTypeKind || kind == LLVMArrayTypeKind;
+}
+
+gb_internal bool lb_is_plain_access(LLVMValueRef inst) {
+	return !LLVMGetVolatile(inst) && LLVMGetOrdering(inst) == LLVMAtomicOrderingNotAtomic;
+}
+
+gb_internal void lb_lower_bool_select(lbFastIselLowering *s, LLVMValueRef select) {
+	LLVMValueRef c = LLVMGetOperand(select, 0);
+	LLVMValueRef x = LLVMGetOperand(select, 1);
+	LLVMValueRef y = LLVMGetOperand(select, 2);
+	if (LLVMGetTypeKind(LLVMTypeOf(c)) != LLVMIntegerTypeKind) {
+		return;
+	}
+	LLVMPositionBuilderBefore(s->builder, select);
+	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(select));
+	LLVMValueRef t = LLVMConstInt(LLVMTypeOf(c), 1, false);
+
+	LLVMValueRef res = nullptr;
+	if (LLVMIsAConstantInt(x)) {
+		res = LLVMConstIntGetZExtValue(x) ? LLVMBuildOr(s->builder, c, y, "") : LLVMBuildAnd(s->builder, LLVMBuildXor(s->builder, c, t, ""), y, "");
+	} else if (LLVMIsAConstantInt(y)) {
+		res = LLVMConstIntGetZExtValue(y) ? LLVMBuildOr(s->builder, LLVMBuildXor(s->builder, c, t, ""), x, "") : LLVMBuildAnd(s->builder, c, x, "");
+	} else {
+		LLVMValueRef a = LLVMBuildAnd(s->builder, c, x, "");
+		LLVMValueRef b = LLVMBuildAnd(s->builder, LLVMBuildXor(s->builder, c, t, ""), y, "");
+		res = LLVMBuildOr(s->builder, a, b, "");
+	}
+	LLVMReplaceAllUsesWith(select, res);
+	LLVMInstructionEraseFromParent(select);
+}
+
+gb_internal void lb_truncate_bool_arguments(lbFastIselLowering *s, LLVMValueRef call) {
+	LLVMTypeRef i1 = LLVMInt1TypeInContext(s->m->ctx);
+	LLVMTypeRef i8 = LLVMInt8TypeInContext(s->m->ctx);
+	LLVMBasicBlockRef block = LLVMGetInstructionParent(call);
+	unsigned arg_count = LLVMGetNumArgOperands(call);
+	for (unsigned a = 0; a < arg_count; a++) {
+		LLVMValueRef arg = LLVMGetOperand(call, a);
+		if (LLVMTypeOf(arg) != i1 || LLVMIsAConstantInt(arg)) {
+			continue;
+		}
+		LLVMUseRef first_use = LLVMGetFirstUse(arg);
+		if (LLVMIsATruncInst(arg) && LLVMGetInstructionParent(arg) == block &&
+		    first_use != nullptr && LLVMGetNextUse(first_use) == nullptr) {
+			continue;
+		}
+		LLVMPositionBuilderBefore(s->builder, call);
+		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(call));
+		LLVMValueRef byte = LLVMBuildZExt(s->builder, arg, i8, "");
+		LLVMSetOperand(call, a, LLVMBuildTrunc(s->builder, byte, i1, ""));
+	}
+}
+
+gb_internal void lb_lower_small_switch(lbFastIselLowering *s, LLVMValueRef sw) {
+	enum {MAX_CASES = 3};
+	LLVMValueRef cond = LLVMGetOperand(sw, 0);
+	unsigned case_count = (cast(unsigned)LLVMGetNumOperands(sw) - 2) / 2;
+	if (case_count == 0 || case_count > MAX_CASES || LLVMGetIntTypeWidth(LLVMTypeOf(cond)) > 64) {
+		return;
+	}
+
+	LLVMBasicBlockRef block      = LLVMGetInstructionParent(sw);
+	LLVMBasicBlockRef next_block = LLVMGetNextBasicBlock(block);
+
+	LLVMValueRef fn     = LLVMGetBasicBlockParent(block);
+	LLVMMetadataRef loc = LLVMInstructionGetDebugLoc(sw);
+
+	LLVMBasicBlockRef from[MAX_CASES+1] = {};
+	LLVMBasicBlockRef to  [MAX_CASES+1] = {};
+
+	LLVMBasicBlockRef curr = block;
+
+	LLVMPositionBuilderBefore(s->builder, sw);
+	LLVMSetCurrentDebugLocation2(s->builder, loc);
+
+	for (unsigned j = 0; j < case_count; j++) {
+		LLVMBasicBlockRef dest = LLVMGetSuccessor(sw, j+1);
+		LLVMBasicBlockRef else_block = LLVMGetSwitchDefaultDest(sw);
+		if (j+1 < case_count) {
+			if (next_block != nullptr) {
+				else_block = LLVMInsertBasicBlockInContext(s->m->ctx, next_block, "");
+			} else {
+				else_block = LLVMAppendBasicBlockInContext(s->m->ctx, fn, "");
+			}
+		}
+
+		LLVMValueRef cmp = LLVMBuildICmp(s->builder, LLVMIntEQ, cond, LLVMGetOperand(sw, 2 + 2*j), "");
+		LLVMBuildCondBr(s->builder, cmp, dest, else_block);
+
+		from[j] = curr;
+		to[j]   = dest;
+
+		if (j+1 < case_count) {
+			curr = else_block;
+			LLVMPositionBuilderAtEnd(s->builder, curr);
+			LLVMSetCurrentDebugLocation2(s->builder, loc);
+		}
+	}
+	from[case_count] = curr;
+	to  [case_count] = LLVMGetSwitchDefaultDest(sw);
+	LLVMInstructionEraseFromParent(sw);
+
+	// the incoming entries for `block` become one for each new edge
+	for (unsigned e = 0; e <= case_count; e++) {
+		bool seen = false;
+		for (unsigned k = 0; k < e; k++) {
+			seen |= to[k] == to[e];
+		}
+		if (seen) {
+			continue;
+		}
+
+		LLVMBasicBlockRef dest = to[e];
+		for (LLVMValueRef phi = LLVMGetFirstInstruction(dest); phi != nullptr && LLVMIsAPHINode(phi); /**/) {
+			LLVMValueRef next             = LLVMGetNextInstruction(phi);
+			LLVMValueRef value_from_block = nullptr;
+
+			unsigned incoming_count = LLVMCountIncoming(phi);
+			for (unsigned k = 0; k < incoming_count; k++) {
+				if (LLVMGetIncomingBlock(phi, k) == block) {
+					value_from_block = LLVMGetIncomingValue(phi, k);
+				}
+			}
+
+			if (value_from_block != nullptr) {
+				LLVMPositionBuilderBefore(s->builder, phi);
+				LLVMSetCurrentDebugLocation2(s->builder, nullptr);
+
+				LLVMValueRef new_phi = LLVMBuildPhi(s->builder, LLVMTypeOf(phi), "");
+				for (unsigned k = 0; k < incoming_count; k++) {
+					LLVMBasicBlockRef incoming_block = LLVMGetIncomingBlock(phi, k);
+					if (incoming_block != block) {
+						LLVMValueRef incoming_value = LLVMGetIncomingValue(phi, k);
+						LLVMAddIncoming(new_phi, &incoming_value, &incoming_block, 1);
+					}
+				}
+				for (unsigned k = 0; k <= case_count; k++) {
+					if (to[k] == dest) {
+						LLVMAddIncoming(new_phi, &value_from_block, &from[k], 1);
+					}
+				}
+				LLVMReplaceAllUsesWith(phi, new_phi);
+				LLVMInstructionEraseFromParent(phi);
+			}
+
+			phi = next;
+		}
+	}
+}
+
+gb_internal void lb_lower_for_fast_isel(lbModule *m) {
+	lbFastIselLowering s = {};
+	s.m = m;
+
+	s.builder = LLVMCreateBuilderInContext(m->ctx);
+	defer (LLVMDisposeBuilder(s.builder));
+
+	array_init(&s.phis, heap_allocator());
+	defer (array_free(&s.phis));
+
+	auto work = array_make<LLVMValueRef>(heap_allocator(), 0, 64);
+	defer (array_free(&work));
+
+	for (LLVMValueRef fn = LLVMGetFirstFunction(m->mod); fn != nullptr; fn = LLVMGetNextFunction(fn)) {
+		array_clear(&work);
+		array_clear(&s.phis);
+
+		for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
+			for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; i = LLVMGetNextInstruction(i)) {
+				if (LLVMIsAStoreInst(i) && lb_is_plain_access(i) && lb_is_aggregate_type(LLVMTypeOf(LLVMGetOperand(i, 0)))) {
+					array_add(&work, i);
+				}
+			}
+		}
+		for (LLVMValueRef store : work) {
+			lb_scalarize_aggregate_store(&s, store);
+		}
+
+		// NOTE(bill): A field read out of an aggregate value is read where that aggregate came from
+		array_clear(&work);
+		for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
+			for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; i = LLVMGetNextInstruction(i)) {
+				if (LLVMIsAExtractValueInst(i) && !lb_is_aggregate_type(LLVMTypeOf(i))) {
+					array_add(&work, i);
+				} else if (LLVMIsASelectInst(i) && LLVMTypeOf(i) == LLVMInt1TypeInContext(m->ctx)) {
+					array_add(&work, i);
+				} else if (LLVMIsACallInst(i)) {
+					array_add(&work, i);
+				} else if (LLVMIsASwitchInst(i)) {
+					array_add(&work, i);
+				}
+			}
+		}
+		for (LLVMValueRef i : work) {
+			if (LLVMIsASelectInst(i)) {
+				lb_lower_bool_select(&s, i);
+				continue;
+			}
+			if (LLVMIsACallInst(i)) {
+				lb_truncate_bool_arguments(&s, i);
+				continue;
+			}
+			if (LLVMIsASwitchInst(i)) {
+				lb_lower_small_switch(&s, i);
+				continue;
+			}
+			LLVMValueRef agg = LLVMGetOperand(i, 0);
+			unsigned n = LLVMGetNumIndices(i);
+			if (n > LB_SCALARIZE_MAX_DEPTH) {
+				continue;
+			}
+
+			if (!(LLVMIsAConstant(agg)        ||
+			      LLVMIsAInsertValueInst(agg) ||
+			      LLVMIsASelectInst(agg)      ||
+			      LLVMIsAPHINode(agg)         ||
+			      (LLVMIsALoadInst(agg) && lb_is_plain_access(agg)))) {
+				continue;
+			}
+
+			s.store = i;
+
+			LLVMValueRef field = nullptr;
+			if (lb_aggregate_field_value(&s, agg, LLVMGetIndices(i), n, &field) && field != nullptr) {
+				LLVMReplaceAllUsesWith(i, field);
+				LLVMInstructionEraseFromParent(i);
+			}
+		}
+
+		bool removed = true;
+		while (removed) {
+			removed = false;
+			for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
+				for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; /**/) {
+					LLVMValueRef next = LLVMGetNextInstruction(i);
+					if (LLVMGetFirstUse(i) == nullptr &&
+					    (LLVMIsAInsertValueInst(i) || LLVMIsAExtractValueInst(i) || LLVMIsASelectInst(i) || LLVMIsAPHINode(i) ||
+					     LLVMIsAGetElementPtrInst(i) || (LLVMIsALoadInst(i) && lb_is_plain_access(i)))) {
+						LLVMInstructionEraseFromParent(i);
+						removed = true;
+					}
+					i = next;
+				}
+			}
+		}
+	}
+}
+
 struct lbLLVMEmitWorker {
 	LLVMTargetMachineRef target_machine;
 	LLVMCodeGenFileType code_gen_file_type;
@@ -2743,6 +3268,10 @@ gb_internal WORKER_TASK_PROC(lb_llvm_module_pass_worker_proc) {
 		return 1;
 	}
 
+	if (lb_uses_fast_isel()) {
+		lb_lower_for_fast_isel(wd->m);
+	}
+
 	if (LLVM_IGNORE_VERIFICATION) {
 		return 0;
 	}
diff --git a/src/llvm_backend_debug.cpp b/src/llvm_backend_debug.cpp
index 2b1cbf872..af9f1323e 100644
--- a/src/llvm_backend_debug.cpp
+++ b/src/llvm_backend_debug.cpp
@@ -1206,6 +1206,25 @@ gb_internal LLVMMetadataRef lb_debug_type(lbModule *m, Type *type) {
 	return dt;
 }
 
+// A variable whose address is not a stack slot of its own (an argument, or an element or a pointer it refers to)
+// would have its location tracked with `DBG_VALUE`s through every block of the procedure,
+// so it is described through a stack slot holding that address instead
+gb_internal LLVMValueRef lb_debug_storage(lbProcedure *p, LLVMValueRef storage, LLVMMetadataRef *expr) {
+	bool is_argument = LLVMIsAArgument(storage) != nullptr;
+	if (!is_argument && (!LLVMIsAInstruction(storage) || LLVMIsAAllocaInst(storage))) {
+		return storage;
+	}
+	LLVMBasicBlockRef insert_block = LLVMGetInsertBlock(p->builder);
+	LLVMValueRef slot = llvm_alloca(p, LLVMTypeOf(storage), build_context.ptr_size, "");
+	LLVMPositionBuilderAtEnd(p->builder, is_argument ? p->decl_block->block : insert_block);
+	LLVMBuildStore(p->builder, storage, slot);
+	LLVMPositionBuilderAtEnd(p->builder, insert_block);
+
+	uint64_t deref = 0x06; // DW_OP_deref
+	*expr = LLVMDIBuilderCreateExpression(p->module->debug_builder, &deref, 1);
+	return slot;
+}
+
 gb_internal void lb_add_debug_local_variable(lbProcedure *p, LLVMValueRef ptr, Type *type, Token const &token) {
 	if (p->debug_info == nullptr) {
 		return;
@@ -1264,6 +1283,7 @@ gb_internal void lb_add_debug_local_variable(lbProcedure *p, LLVMValueRef ptr, T
 	LLVMMetadataRef llvm_debug_loc = lb_debug_location_from_token_pos(p, token.pos);
 	LLVMMetadataRef llvm_expr = LLVMDIBuilderCreateExpression(m->debug_builder, nullptr, 0);
 	lb_set_llvm_metadata(m, ptr, llvm_expr);
+	storage = lb_debug_storage(p, storage, &llvm_expr);
 
 #if LLVM_VERSION_MAJOR <= 18
 	LLVMDIBuilderInsertDeclareAtEnd(m->debug_builder, storage, var_info, llvm_expr, llvm_debug_loc, block);
@@ -1329,6 +1349,7 @@ gb_internal void lb_add_debug_param_variable(lbProcedure *p, LLVMValueRef ptr, T
 	LLVMMetadataRef llvm_debug_loc = lb_debug_location_from_token_pos(p, token.pos);
 	LLVMMetadataRef llvm_expr = LLVMDIBuilderCreateExpression(m->debug_builder, nullptr, 0);
 	lb_set_llvm_metadata(m, ptr, llvm_expr);
+	storage = lb_debug_storage(p, storage, &llvm_expr);
 
 	// NOTE(bill, 2022-02-01): For parameter values, you must insert them at the end of the decl block
 	// The reason is that if the parameter is at index 0 and a pointer, there is not such things as an
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 417504376..16fee3c8f 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -1814,6 +1814,43 @@ gb_internal bool lb_is_type_proc_recursive(Type *t) {
 	}
 }
 
+// LLVM's fast instruction selector, used for unoptimized code, hands anything it cannot select
+// (such as `llvm.memmove` or the `*.inline` intrinsics) to SelectionDAG, which is far slower
+gb_internal bool lb_uses_fast_isel(void) {
+	return (build_context.optimization_level <= 0 || build_context.fast_isel) && is_arch_x86();
+}
+
+gb_internal void lb_emit_memmove(lbProcedure *p, LLVMValueRef dst, unsigned dst_align, LLVMValueRef src, unsigned src_align, LLVMValueRef len) {
+	if (!lb_uses_fast_isel()) {
+		LLVMBuildMemMove(p->builder, dst, dst_align, src, src_align, len);
+		return;
+	}
+	lbModule *m = p->module;
+	LLVMTypeRef ptr_type = lb_type(m, t_rawptr);
+	LLVMTypeRef int_type = lb_type(m, t_int);
+
+	if (LLVMIsConstant(len)) {
+		i64 size = cast(i64)LLVMConstIntGetZExtValue(len);
+		if (size == 1 || size == 2 || size == 4 || size == 8) {
+			LLVMTypeRef chunk_type = LLVMIntTypeInContext(m->ctx, cast(unsigned)(8*size));
+			LLVMValueRef value = LLVMBuildLoad2(p->builder, chunk_type, src, "");
+			LLVMSetAlignment(value, gb_max(src_align, 1u));
+			LLVMValueRef store = LLVMBuildStore(p->builder, value, dst);
+			LLVMSetAlignment(store, gb_max(dst_align, 1u));
+			return;
+		}
+	}
+
+	LLVMTypeRef params[3] = {ptr_type, ptr_type, int_type};
+	LLVMTypeRef proc_type = LLVMFunctionType(ptr_type, params, gb_count_of(params), false);
+	LLVMValueRef proc = LLVMGetNamedFunction(m->mod, "memmove");
+	if (proc == nullptr) {
+		proc = LLVMAddFunction(m->mod, "memmove", proc_type);
+	}
+	LLVMValueRef args[3] = {dst, src, LLVMBuildIntCast2(p->builder, len, int_type, false, "")};
+	LLVMBuildCall2(p->builder, proc_type, proc, args, gb_count_of(args), "");
+}
+
 // LLVM's fast instruction selector cannot select an aggregate load or store
 // Oh, how do I love LLVM /s
 gb_internal bool lb_copies_aggregates_as_scalars(lbProcedure *p) {
@@ -1863,7 +1900,7 @@ gb_internal bool lb_try_copy_loaded_aggregate(lbProcedure *p, LLVMValueRef dst,
 	LLVMTypeRef i64_type = LLVMInt64TypeInContext(ctx);
 
 	if (size > MAX_SCALAR_COPY_SIZE) {
-		LLVMBuildMemMove(p->builder, dst, lb_try_get_alignment(dst, 1), src, LLVMGetAlignment(load), LLVMConstInt(i64_type, size, false));
+		lb_emit_memmove(p, dst, lb_try_get_alignment(dst, 1), src, LLVMGetAlignment(load), LLVMConstInt(i64_type, size, false));
 		return true;
 	}
 
@@ -1941,10 +1978,10 @@ gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 			LLVMValueRef src_ptr_original = LLVMGetOperand(value.value, 0);
 			LLVMValueRef src_ptr = LLVMBuildPointerCast(p->builder, src_ptr_original, LLVMTypeOf(dst_ptr), "");
 
-			LLVMBuildMemMove(p->builder,
-			                 dst_ptr, lb_try_get_alignment(dst_ptr, 1),
-			                 src_ptr, lb_try_get_alignment(src_ptr_original, 1),
-			                 LLVMConstInt(LLVMInt64TypeInContext(p->module->ctx), lb_sizeof(LLVMTypeOf(value.value)), false));
+			lb_emit_memmove(p,
+			                dst_ptr, lb_try_get_alignment(dst_ptr, 1),
+			                src_ptr, lb_try_get_alignment(src_ptr_original, 1),
+			                LLVMConstInt(LLVMInt64TypeInContext(p->module->ctx), lb_sizeof(LLVMTypeOf(value.value)), false));
 			return;
 		} else if (LLVMIsConstant(value.value)) {
 			lbAddr addr = lb_add_global_generated_from_procedure(p, value.type, value);
@@ -1954,10 +1991,10 @@ gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 			LLVMValueRef src_ptr = addr.addr.value;
 			src_ptr = LLVMBuildPointerCast(p->builder, src_ptr, LLVMTypeOf(dst_ptr), "");
 
-			LLVMBuildMemMove(p->builder,
-			                 dst_ptr, lb_try_get_alignment(dst_ptr, 1),
-			                 src_ptr, lb_try_get_alignment(src_ptr, 1),
-			                 LLVMConstInt(LLVMInt64TypeInContext(p->module->ctx), lb_sizeof(LLVMTypeOf(value.value)), false));
+			LLVMBuildMemCpy(p->builder,
+			                dst_ptr, lb_try_get_alignment(dst_ptr, 1),
+			                src_ptr, lb_try_get_alignment(src_ptr, 1),
+			                LLVMConstInt(LLVMInt64TypeInContext(p->module->ctx), lb_sizeof(LLVMTypeOf(value.value)), false));
 			return;
 		}
 	}
diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp
index a5f8ba66a..3172bc0b0 100644
--- a/src/llvm_backend_proc.cpp
+++ b/src/llvm_backend_proc.cpp
@@ -17,6 +17,11 @@ gb_internal void lb_mem_copy_overlapping(lbProcedure *p, lbValue dst, lbValue sr
 	src = lb_emit_conv(p, src, t_rawptr);
 	len = lb_emit_conv(p, len, t_int);
 	
+	if (!is_volatile && lb_uses_fast_isel()) {
+		lb_emit_memmove(p, dst.value, 1, src.value, 1, len.value);
+		return;
+	}
+
 	char const *name = "llvm.memmove";
 	if (!p->is_startup && LLVMIsConstant(len.value)) {
 		i64 const_len = cast(i64)LLVMConstIntGetSExtValue(len.value);
@@ -47,7 +52,7 @@ gb_internal void lb_mem_copy_non_overlapping(lbProcedure *p, lbValue dst, lbValu
 	len = lb_emit_conv(p, len, t_int);
 	
 	char const *name = "llvm.memcpy";
-	if (!p->is_startup && LLVMIsConstant(len.value)) {
+	if (!p->is_startup && !lb_uses_fast_isel() && LLVMIsConstant(len.value)) {
 		i64 const_len = cast(i64)LLVMConstIntGetSExtValue(len.value);
 		if (const_len <= lb_max_zero_init_size()) {
 			name = "llvm.memcpy.inline";
diff --git a/src/llvm_backend_utility.cpp b/src/llvm_backend_utility.cpp
index 19b203e3c..aa33073c5 100644
--- a/src/llvm_backend_utility.cpp
+++ b/src/llvm_backend_utility.cpp
@@ -113,6 +113,27 @@ gb_internal LLVMValueRef lb_mem_zero_ptr_internal(lbProcedure *p, LLVMValueRef p
 	}
 
 
+	if (is_inlinable && !is_volatile && lb_uses_fast_isel()) {
+		LLVMValueRef dst = LLVMBuildPointerCast(p->builder, ptr, lb_type(p->module, t_rawptr), "");
+		LLVMValueRef last = nullptr;
+		for (i64 offset = 0; offset < const_len; /**/) {
+			i64 chunk = 8;
+			while (chunk > const_len - offset) {
+				chunk >>= 1;
+			}
+			LLVMTypeRef chunk_type = LLVMIntTypeInContext(p->module->ctx, cast(unsigned)(8*chunk));
+			LLVMValueRef chunk_ptr = dst;
+			if (offset != 0) {
+				LLVMValueRef index = LLVMConstInt(lb_type(p->module, t_int), offset, false);
+				chunk_ptr = LLVMBuildGEP2(p->builder, LLVMInt8TypeInContext(p->module->ctx), dst, &index, 1, "");
+			}
+			last = LLVMBuildStore(p->builder, LLVMConstNull(chunk_type), chunk_ptr);
+			LLVMSetAlignment(last, 1);
+			offset += chunk;
+		}
+		return last;
+	}
+
 	char const *name = "llvm.memset";
 	if (is_inlinable) {
 		name = "llvm.memset.inline";
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index f7538ca21..939041d70 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -95,6 +95,9 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 ..\..\..\odin test ..\test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables || exit /b
 ..\..\..\odin test ..\test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables -debug || exit /b
+..\..\..\odin test ..\test_issue_omitted_field_union.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_fast_isel_lowering.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_fast_isel_lowering.odin %COMMON% -o:none || exit /b
 
 @echo off
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 523c52322..0207e012e 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -121,6 +121,9 @@ $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables
 $ODIN test ../test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables -debug
+$ODIN test ../test_issue_omitted_field_union.odin $COMMON
+$ODIN test ../test_issue_fast_isel_lowering.odin $COMMON
+$ODIN test ../test_issue_fast_isel_lowering.odin $COMMON -o:none
 $ODIN test ../test_issue_7421.odin $COMMON
 if [[ $($ODIN check ../test_issue_7421_tagged_duplicate.odin $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error: Duplicate case") -eq 1 ]]; then
 	echo "SUCCESSFUL 1/1"
diff --git a/tests/issues/test_issue_fast_isel_lowering.odin b/tests/issues/test_issue_fast_isel_lowering.odin
new file mode 100644
index 000000000..138371a15
--- /dev/null
+++ b/tests/issues/test_issue_fast_isel_lowering.odin
@@ -0,0 +1,121 @@
+// What unoptimized x86 code is lowered to before LLVM's fast instruction selector sees it
+package test_issues
+
+import "core:testing"
+
+Pair :: struct {
+	name:  string,
+	value: int,
+}
+
+Wide :: struct {
+	a, b, c: i32,
+	d:       [3]f32,
+	e:       Pair,
+	f:       bool,
+}
+
+@(require_results)
+pick :: proc(cond: bool, x, y: Pair) -> Pair {
+	return x if cond else y
+}
+
+@(require_results)
+copy_through :: proc(dst, src: ^Wide) -> Wide {
+	dst^ = src^
+	return dst^
+}
+
+@(require_results)
+classify :: proc(x: int) -> (res: string) {
+	switch x {
+	case 1:  res = "one"
+	case 2:  res = "two"
+	case 7:  res = "seven"
+	case:    res = "other"
+	}
+	return
+}
+
+@(require_results)
+shared_target :: proc(x: u8) -> int {
+	r := 0
+	switch x {
+	case 3, 9: r = 10
+	case 4:    r = 20
+	}
+	return r + int(x)
+}
+
+@(require_results)
+both :: proc(a, b: bool) -> bool {
+	return a && b
+}
+
+@(require_results)
+either :: proc(a, b: bool) -> bool {
+	return a || b
+}
+
+@(require_results)
+count_true :: proc(xs: ..bool) -> (n: int) {
+	for x in xs {
+		n += int(x)
+	}
+	return
+}
+
+global_pair: Pair
+
+@(test)
+test_fast_isel_lowering :: proc(t: ^testing.T) {
+	p := pick(true, {"a", 1}, {"bb", 2})
+	q := pick(false, {"a", 1}, {"bb", 2})
+	testing.expect_value(t, p, Pair{"a", 1})
+	testing.expect_value(t, q, Pair{"bb", 2})
+
+	s := "yes" if p.value == 1 else "no"
+	testing.expect_value(t, s, "yes")
+
+	global_pair = q
+	testing.expect_value(t, global_pair.name, "bb")
+
+	src := Wide{1, 2, 3, {4, 5, 6}, {"wide", 7}, true}
+	dst: Wide
+	w := copy_through(&dst, &src)
+	testing.expect_value(t, w, src)
+	testing.expect_value(t, dst, src)
+
+	ws := []Wide{src, {}, src}
+	ws[1] = ws[0]
+	testing.expect_value(t, ws[1], src)
+
+	merged: Pair
+	if w.f {
+		merged = p
+	} else {
+		merged = q
+	}
+	testing.expect_value(t, merged, p)
+
+	names := [4]string{"one", "two", "seven", "other"}
+	for x, i in ([]int{1, 2, 7, 5}) {
+		testing.expect_value(t, classify(x), names[i])
+	}
+	testing.expect_value(t, shared_target(3), 13)
+	testing.expect_value(t, shared_target(9), 19)
+	testing.expect_value(t, shared_target(4), 24)
+	testing.expect_value(t, shared_target(5), 5)
+
+	a, b := w.a == 1, w.b == 3
+	testing.expect_value(t, both(a, b), false)
+	testing.expect_value(t, either(a, b), true)
+	testing.expect_value(t, count_true(a, b, a && !b, a || b), 3)
+
+	buf := [8]u8{1, 2, 3, 4, 5, 6, 7, 8}
+	copy(buf[1:], buf[:4])
+	testing.expect_value(t, buf, [8]u8{1, 1, 2, 3, 4, 6, 7, 8})
+	small: [3]u8 = {9, 9, 9}
+	small = {}
+	testing.expect_value(t, small, [3]u8{})
+}

From d8a598b1a392121f67e111555b908e6c37b54439 Mon Sep 17 00:00:00 2001
From: Artur Leite <arturleite164@gmail.com>
Date: Sat, 3 Oct 2026 13:01:17 +0200
Subject: [PATCH 163/215] Accept `.Recv` channels in `chan.recv` and
 `chan.try_recv`

---
 core/sync/chan/chan.odin                      |  4 +--
 tests/core/sync/chan/test_core_sync_chan.odin | 27 +++++++++++++++++++
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/core/sync/chan/chan.odin b/core/sync/chan/chan.odin
index 5daabe2eb..ef3de62e0 100644
--- a/core/sync/chan/chan.odin
+++ b/core/sync/chan/chan.odin
@@ -529,7 +529,7 @@ Example:
 	}
 */
 @(require_results)
-recv :: proc "contextless" (c: $C/Chan($T)) -> (data: T, ok: bool) where C.D >= .Both {
+recv :: proc "contextless" (c: $C/Chan($T, $D)) -> (data: T, ok: bool) where C.D >= .Both {
 	ok = recv_raw(c, &data)
 	return
 }
@@ -559,7 +559,7 @@ Example:
 	}
 */
 @(require_results)
-try_recv :: proc "contextless" (c: $C/Chan($T)) -> (data: T, ok: bool) where C.D >= .Both {
+try_recv :: proc "contextless" (c: $C/Chan($T, $D)) -> (data: T, ok: bool) where C.D >= .Both {
 	ok = try_recv_raw(c, &data)
 	return
 }
diff --git a/tests/core/sync/chan/test_core_sync_chan.odin b/tests/core/sync/chan/test_core_sync_chan.odin
index 8ede19c7d..0e47c240f 100644
--- a/tests/core/sync/chan/test_core_sync_chan.odin
+++ b/tests/core/sync/chan/test_core_sync_chan.odin
@@ -443,6 +443,33 @@ test_accept_message_from_closed_buffered_chan :: proc(t: ^testing.T) {
 	testing.expect(t, ok)
 }
 
+// Ensures that the typed send and receive procedures accept unidirectional
+// channels, not just `.Both` channels.
+@test
+test_unidirectional_chan_send_recv :: proc(t: ^testing.T) {
+	testing.set_fail_timeout(t, FAIL_TIME)
+
+	ch, alloc_err := chan.create_buffered(chan.Chan(int), 4, context.allocator)
+	assert(alloc_err == nil, "allocation failed")
+	defer chan.destroy(ch)
+
+	send_only: chan.Chan(int, .Send) = chan.as_send(ch)
+	recv_only: chan.Chan(int, .Recv) = chan.as_recv(ch)
+
+	testing.expect(t, chan.send(send_only, 32))
+	testing.expect(t, chan.try_send(send_only, 64))
+
+	result, ok := chan.recv(recv_only)
+	testing.expect_value(t, result, 32)
+	testing.expect(t, ok)
+	result, ok = chan.try_recv(recv_only)
+	testing.expect_value(t, result, 64)
+	testing.expect(t, ok)
+
+	result, ok = chan.try_recv(recv_only)
+	testing.expect(t, !ok, "channel should be empty")
+}
+
 // Ensures that if any input channel is eligible to receive or send, the try_select_raw
 // operation will process it.
 @test

From d31ed5ee5f6549689052fa97d7f289bdabb28d2b Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 12:02:15 +0100
Subject: [PATCH 164/215] Use a response file for MSVC-style linkers
 (`link.exe` and `radlink.exe`) when the command line exceeds the
 `CreateProcess` limit of 32KiB

---
 src/linker.cpp | 85 ++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 82 insertions(+), 3 deletions(-)

diff --git a/src/linker.cpp b/src/linker.cpp
index 0d8fa79e0..519480826 100644
--- a/src/linker.cpp
+++ b/src/linker.cpp
@@ -13,6 +13,85 @@ struct LinkerData {
 gb_internal i32 system_exec_command_line_app(char const *name, char const *fmt, ...);
 gb_internal bool system_exec_command_line_app_output(char const *command, gbString *output);
 
+gb_internal i32 system_exec_msvc_linker_app(char const *name, char const *fmt, ...) {
+	isize const cmd_cap = 64<<20;
+	char *cmd = gb_alloc_array(heap_allocator(), char, cmd_cap);
+	defer (gb_free(heap_allocator(), cmd));
+
+	va_list va;
+	va_start(va, fmt);
+	isize cmd_len = gb_snprintf_va(cmd, cmd_cap-1, fmt, va) - 1;
+	va_end(va);
+
+#if defined(GB_SYSTEM_WINDOWS)
+	// NOTE(bill, 2026-10-03): CreateProcessW limits the command line to 32767 UTF-16 code units so we need to pass the arguments into a response file
+	if (cmd_len >= 32767 && !build_context.print_linker_flags) {
+		char const *exe_end = cmd[0] == '"' ? gb_char_first_occurence(cmd+1, '"') : nullptr;
+		GB_ASSERT(exe_end != nullptr);
+		isize exe_len = exe_end+1 - cmd;
+
+		gbString rsp = gb_string_make_reserve(heap_allocator(), cmd_len);
+		defer (gb_string_free(rsp));
+
+		// NOTE(bill): link.exe rejects response file lines of 128 KiB or more
+		bool  in_quotes   = false;
+		bool  separate    = false;
+		isize backslashes = 0;
+		for (char const *c = cmd+exe_len; *c; c++) {
+			if (!in_quotes && (*c == ' ' || *c == '\t')) {
+				separate = gb_string_length(rsp) > 0;
+				continue;
+			}
+			if (separate) {
+				rsp = gb_string_appendc(rsp, "\n");
+				separate = false;
+			}
+			if (*c == '"' && (backslashes & 1) == 0) {
+				in_quotes = !in_quotes;
+			}
+			backslashes = *c == '\\' ? backslashes+1 : 0;
+			rsp = gb_string_append_length(rsp, c, 1);
+		}
+
+		String dir = temporary_directory(temporary_allocator());
+		if (dir.len == 0) {
+			dir = build_context.build_paths[BuildPath_Output].basename;
+		}
+
+		gbString rsp_path = gb_string_make(heap_allocator(), "");
+		defer (gb_string_free(rsp_path));
+
+		rsp_path = gb_string_append_fmt(rsp_path, "%.*s/%.*s-%u.rsp", LIT(dir), LIT(build_context.build_paths[BuildPath_Output].name), GetCurrentProcessId());
+
+		{
+			gbFile f = {};
+			if (gb_file_create(&f, rsp_path) != gbFileError_None) {
+				gb_printf_err("Failed to create linker response file: %s\n", rsp_path);
+				return -1;
+			}
+			if (build_context.linker_choice != Linker_radlink) {
+				// NOTE(bill): link.exe reads a response file without a BOM in the ANSI code page but radlink does not skip a BOM
+				gb_file_write(&f, "\xef\xbb\xbf", 3);
+			}
+			gb_file_write(&f, rsp, gb_string_length(rsp));
+			gb_file_close(&f);
+		}
+
+		if (build_context.show_system_calls) {
+			gb_printf_err("[RESPONSE FILE] %s\n%s\n\n", rsp_path, rsp);
+		}
+
+		i32 result = system_exec_command_line_app(name, "%.*s @\"%s\"", cast(int)exe_len, cmd, rsp_path);
+		if (!build_context.keep_temp_files) {
+			gb_file_remove(rsp_path);
+		}
+		return result;
+	}
+#endif
+
+	return system_exec_command_line_app(name, "%.*s", cast(int)cmd_len, cmd);
+}
+
 // No longer required not that LLVM 14 is removed(?)
 gb_internal void linker_enable_system_library_linking(LinkerData *ld) {
 	ld->needs_system_library_linked = true;
@@ -327,7 +406,7 @@ try_cross_linking:;
 
 			switch (build_context.linker_choice) {
 			case Linker_lld:
-				result = system_exec_command_line_app("msvc-lld-link",
+				result = system_exec_msvc_linker_app("msvc-lld-link",
 					"\"%.*s\\bin\\lld-link\" %s -OUT:\"%.*s\" %s "
 					"/nologo /incremental:no /opt:ref /subsystem:%.*s "
 					"%.*s "
@@ -349,7 +428,7 @@ try_cross_linking:;
 				}
 				break;
 			case Linker_radlink:
-				result = system_exec_command_line_app("msvc-rad-link",
+				result = system_exec_msvc_linker_app("msvc-rad-link",
 					"\"%.*s\\bin\\radlink\" %s -OUT:\"%.*s\" %s "
 					"/nologo /incremental:no /opt:ref /subsystem:%.*s "
 					"%.*s "
@@ -412,7 +491,7 @@ try_cross_linking:;
 				}
 
 
-				result = system_exec_command_line_app("msvc-link",
+				result = system_exec_msvc_linker_app("msvc-link",
 					"\"%.*s%.*s\" %s %.*s -OUT:\"%.*s\" %s "
 					"/nologo /subsystem:%.*s "
 					"%.*s "

From 9f2a5147bdc72533b57c91d88d817f64184d9fd4 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 12:10:12 +0100
Subject: [PATCH 165/215] Fix: Mark a generated polymorphic procedure before
 publishing it to other threads

---
 src/check_expr.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 6aedd7d17..4c5a9e601 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -847,6 +847,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	entity->flags = 0;
 
 	entity->Procedure.optimization_mode = base_entity->Procedure.optimization_mode;
+	entity->Procedure.generated_from_polymorphic = true;
 
 	if (base_entity->flags & EntityFlag_Cold) {
 		entity->flags |= EntityFlag_Cold;
@@ -877,7 +878,6 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	if (poly_proc_data) {
 		poly_proc_data->gen_entity = entity;
 		poly_proc_data->proc_info  = proc_info;
-		entity->Procedure.generated_from_polymorphic = proc_info->generated_from_polymorphic;
 	}
 
 	if (base_entity->Procedure.deferred_procedure.entity != nullptr) {

From 5031e2733e9758d18215ff83e31688c782920918 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 12:38:00 +0100
Subject: [PATCH 166/215] Add the comparison procedures of types in the type
 table and map keys as dependencies making the backend no longer has to create
 missing procedures

---
 src/check_builtin.cpp                         |  5 +-
 src/check_expr.cpp                            | 11 +++
 src/check_type.cpp                            |  1 +
 src/checker.cpp                               | 61 +++++++++++++
 src/llvm_backend.cpp                          | 16 ++--
 src/llvm_backend.hpp                          |  2 +-
 src/llvm_backend_general.cpp                  | 42 ++++-----
 tests/issues/run.bat                          |  2 +
 tests/issues/run.sh                           |  7 ++
 .../test_issue_equal_proc_dependencies.odin   | 87 +++++++++++++++++++
 10 files changed, 203 insertions(+), 31 deletions(-)
 create mode 100644 tests/issues/test_issue_equal_proc_dependencies.odin

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index 8de99553c..7d810129f 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -8429,6 +8429,8 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 				return false;
 			}
 
+			add_comparison_procedures_for_fields(c, type);
+
 			operand->mode = Addressing_Value;
 			operand->type = t_equal_proc;
 			break;
@@ -8477,7 +8479,8 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
 				return false;
 			}
 
-			add_map_key_type_dependencies(c, type);
+			add_map_key_type_dependencies(c, type->Map.key);
+			add_comparison_procedures_for_fields(c, type->Map.key);
 
 			operand->mode = Addressing_Value;
 			operand->type = t_map_info_ptr;
diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 6aedd7d17..e67d6c0fd 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -3310,6 +3310,17 @@ gb_internal void add_comparison_procedures_for_fields(CheckerContext *c, Type *t
 			add_comparison_procedures_for_fields(c, field->type);
 		}
 		break;
+	case Type_Union:
+		for (Type *variant : t->Union.variants) {
+			add_comparison_procedures_for_fields(c, variant);
+		}
+		break;
+	case Type_Array:
+		add_comparison_procedures_for_fields(c, t->Array.elem);
+		break;
+	case Type_EnumeratedArray:
+		add_comparison_procedures_for_fields(c, t->EnumeratedArray.elem);
+		break;
 	}
 }
 
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 8555140cc..98e562501 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -4276,6 +4276,7 @@ gb_internal void check_map_type(CheckerContext *ctx, Type *type, Ast *node) {
 	type->Map.value = value;
 
 	add_map_key_type_dependencies(ctx, key);
+	add_comparison_procedures_for_fields(ctx, key);
 
 	init_core_map_type(ctx->checker);
 	init_map_internal_types(type);
diff --git a/src/checker.cpp b/src/checker.cpp
index dea5f0a01..fd65d42fc 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -2663,6 +2663,38 @@ gb_internal void check_procedure_later(Checker *c, AstFile *file, Token token, D
 }
 
 
+gb_global Entity *min_dep_basic_equal_procs[Basic_COUNT];
+
+gb_internal void add_dependency_to_set_threaded(Checker *c, Entity *entity);
+
+gb_internal void add_min_dep_equal_procedures(Checker *c, Type *t) {
+	t = base_type(t);
+	if (t == nullptr || !is_type_comparable(t)) {
+		return;
+	}
+	switch (t->kind) {
+	case Type_Basic:
+		add_dependency_to_set_threaded(c, min_dep_basic_equal_procs[t->Basic.kind]);
+		break;
+	case Type_Struct:
+		for (Entity *f : t->Struct.fields) {
+			add_min_dep_equal_procedures(c, f->type);
+		}
+		break;
+	case Type_Union:
+		for (Type *v : t->Union.variants) {
+			add_min_dep_equal_procedures(c, v);
+		}
+		break;
+	case Type_Array:
+		add_min_dep_equal_procedures(c, t->Array.elem);
+		break;
+	case Type_EnumeratedArray:
+		add_min_dep_equal_procedures(c, t->EnumeratedArray.elem);
+		break;
+	}
+}
+
 gb_internal void add_min_dep_type_info(Checker *c, Type *t) {
 	if (t == nullptr) {
 		return;
@@ -2780,6 +2812,9 @@ gb_internal void add_min_dep_type_info(Checker *c, Type *t) {
 		for_array(i, bt->Union.variants) {
 			add_min_dep_type_info(c, bt->Union.variants[i]);
 		}
+		if (is_type_comparable(bt) && !is_type_simple_compare(bt)) {
+			add_min_dep_equal_procedures(c, bt);
+		}
 		break;
 
 	case Type_Struct:
@@ -2810,10 +2845,14 @@ gb_internal void add_min_dep_type_info(Checker *c, Type *t) {
 			Entity *f = bt->Struct.fields[i];
 			add_min_dep_type_info(c, f->type);
 		}
+		if (is_type_comparable(bt) && !is_type_simple_compare(bt)) {
+			add_min_dep_equal_procedures(c, bt);
+		}
 		break;
 
 	case Type_Map:
 		init_map_internal_types(bt);
+		add_min_dep_equal_procedures(c, bt->Map.key);
 		add_min_dep_type_info(c, bt->Map.key);
 		add_min_dep_type_info(c, bt->Map.value);
 		add_min_dep_type_info(c, t_uintptr); // hash value
@@ -3327,6 +3366,28 @@ gb_internal void generate_minimum_dependency_set(Checker *c, Entity *start) {
 		str_lit("multi_pointer_slice_expr_error"),
 	);
 
+
+	{ // init min dep basic equal procs
+		struct { BasicKind kind; char const *name; } const procs[] = {
+			{Basic_complex32,     "complex32_eq"},
+			{Basic_complex64,     "complex64_eq"},
+			{Basic_complex128,    "complex128_eq"},
+			{Basic_quaternion64,  "quaternion64_eq"},
+			{Basic_quaternion128, "quaternion128_eq"},
+			{Basic_quaternion256, "quaternion256_eq"},
+			{Basic_cstring,       "cstring_eq"},
+			{Basic_string,        "string_eq"},
+			{Basic_cstring16,     "cstring16_eq"},
+			{Basic_string16,      "string16_eq"},
+		};
+		for (auto const &p : procs) {
+			u32 hash = 0;
+			InternedString key = string_interner_insert(make_string_c(p.name), 0, &hash);
+			min_dep_basic_equal_procs[p.kind] = scope_lookup(c->info.runtime_package->scope, key, hash);
+		}
+	}
+
+
 	add_dependency_to_set(c, c->info.instrumentation_enter_entity);
 	add_dependency_to_set(c, c->info.instrumentation_exit_entity);
 
diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 6acc3c723..8a015669d 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -3356,15 +3356,15 @@ gb_internal void lb_generate_procedures(lbGenerator *gen, bool do_threading) {
 
 gb_internal WORKER_TASK_PROC(lb_generate_missing_procedures_to_check_worker_proc) {
 	lbModule *m = cast(lbModule *)data;
-	for (lbProcedure *p = nullptr; mpsc_dequeue(&m->missing_procedures_to_check, &p); /**/) {
+	for (Entity *e = nullptr; mpsc_dequeue(&m->missing_procedures_to_check, &e); /**/) {
+		lbProcedure *p = lb_create_procedure(m, e, false);
 		if (!p->is_done.load(std::memory_order_relaxed)) {
 			debugf("Generate missing procedure: %.*s module %p\n", LIT(p->name), m);
-			lb_generate_procedure(m, p);
-		}
-
-		for (lbProcedure *nested = nullptr; mpsc_dequeue(&m->procedures_to_generate, &nested); /**/) {
-			mpsc_enqueue(&m->missing_procedures_to_check, nested);
 		}
+		mpsc_enqueue(&m->procedures_to_generate, p);
+	}
+	for (lbProcedure *p = nullptr; mpsc_dequeue(&m->procedures_to_generate, &p); /**/) {
+		lb_generate_procedure(m, p);
 	}
 	return 0;
 }
@@ -3389,9 +3389,9 @@ retry:;
 
 	for (auto const &entry : gen->modules) {
 		lbModule *m = entry.value;
-		if (m->missing_procedures_to_check.count != 0) {
+		if (m->missing_procedures_to_check.count != 0 || m->procedures_to_generate.count != 0) {
 			if (retry_count > gen->modules.count) {
-				GB_ASSERT(m->missing_procedures_to_check.count == 0);
+				GB_ASSERT(m->missing_procedures_to_check.count == 0 && m->procedures_to_generate.count == 0);
 			}
 
 			retry_count += 1;
diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index ac2d452fe..824fe2f88 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -153,7 +153,7 @@ struct lbModule {
 	StringMap<lbProcedure *> procedures;
 	PtrMap<LLVMValueRef, Entity *> procedure_values;
 
-	MPSCQueue<lbProcedure *> missing_procedures_to_check;
+	MPSCQueue<Entity *> missing_procedures_to_check;
 
 	StringMap<LLVMValueRef>   const_strings;
 	String16Map<LLVMValueRef> const_string16s;
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 16fee3c8f..1a299689e 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -4041,19 +4041,14 @@ gb_internal lbValue lb_find_procedure_value_from_entity(lbModule *m, Entity *e)
 		return *found;
 	}
 
-	bool ignore_body = false;
-
 	lbModule *other_module = m;
 	if (USE_SEPARATE_MODULES) {
 		other_module = lb_module_of_entity(gen, e, m);
 	}
-	if (other_module == m) {
-		debugf("Missing Procedure (lb_find_procedure_value_from_entity): %.*s module %p\n", LIT(e->token.string), m);
-	}
-	ignore_body = other_module != m;
+	bool ignore_body = other_module != m;
 
-	lbProcedure *missing_proc = lb_create_procedure(m, e, ignore_body);
-	if (missing_proc == nullptr) {
+	lbProcedure *proc = lb_create_procedure(m, e, ignore_body);
+	if (proc == nullptr) {
 		// This is an unspecialized polymorphic procedure, which should not be codegen'd
 		lbValue dummy = {};
 		dummy.value = nullptr;
@@ -4061,18 +4056,28 @@ gb_internal lbValue lb_find_procedure_value_from_entity(lbModule *m, Entity *e)
 		return dummy;
 	}
 
-	if (ignore_body) {
-		GB_ASSERT(other_module != nullptr);
+	// NOTE(bill): Until the modules are generated in parallel, a procedure may be referenced before it is created
+	// (e.g. an @(init) procedure by the startup procedure), but after that it was missed by the frontend
+	bool missing = gen->modules_in_parallel;
+
+	if (!ignore_body) {
+		if (missing) {
+			debugf("Missing Procedure (lb_find_procedure_value_from_entity): %.*s module %p\n", LIT(e->token.string), m);
+		}
+		mpsc_enqueue(&m->procedures_to_generate, proc);
+	} else {
 		rw_mutex_shared_lock(&other_module->values_mutex);
 		auto *found = map_get(&other_module->values, e);
 		rw_mutex_shared_unlock(&other_module->values_mutex);
 		if (found == nullptr) {
-			// THIS IS THE RACE CONDITION
-			lbProcedure *missing_proc_in_other_module = lb_create_procedure(other_module, e, false);
-			mpsc_enqueue(&other_module->missing_procedures_to_check, missing_proc_in_other_module);
+			if (missing) {
+				debugf("Missing Procedure (lb_find_procedure_value_from_entity): %.*s module %p\n", LIT(e->token.string), other_module);
+				// another module's context may only be used by the thread generating that module
+				mpsc_enqueue(&other_module->missing_procedures_to_check, e);
+			} else {
+				mpsc_enqueue(&other_module->procedures_to_generate, lb_create_procedure(other_module, e, false));
+			}
 		}
-	} else {
-		mpsc_enqueue(&m->missing_procedures_to_check, missing_proc);
 	}
 
 	rw_mutex_shared_lock(&m->values_mutex);
@@ -4155,12 +4160,7 @@ gb_internal lbValue lb_generate_anonymous_proc_lit(lbModule *m, String const &pr
 		lbValue *found = map_get(&target_module->values, e);
 		rw_mutex_shared_unlock(&target_module->values_mutex);
 		if (found == nullptr) {
-			lbProcedure *target_proc = lb_create_procedure(target_module, e, false);
-			if (gen->modules_in_parallel) {
-				mpsc_enqueue(&target_module->missing_procedures_to_check, target_proc);
-			} else {
-				mpsc_enqueue(&target_module->procedures_to_generate, target_proc);
-			}
+			mpsc_enqueue(&target_module->procedures_to_generate, lb_create_procedure(target_module, e, false));
 		}
 
 		lbProcedure *p = lb_create_procedure(m, e, true);
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 939041d70..75d94c400 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -98,6 +98,8 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_omitted_field_union.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_fast_isel_lowering.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_fast_isel_lowering.odin %COMMON% -o:none || exit /b
+..\..\..\odin test ..\test_issue_equal_proc_dependencies.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_equal_proc_dependencies.odin %COMMON% -build-mode:obj -show-debug-messages 2>&1 | find /i /c "missing procedure" | findstr /x "0" || exit /b
 
 @echo off
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 0207e012e..3a1cc16b9 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -124,6 +124,13 @@ $ODIN test ../test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -stric
 $ODIN test ../test_issue_omitted_field_union.odin $COMMON
 $ODIN test ../test_issue_fast_isel_lowering.odin $COMMON
 $ODIN test ../test_issue_fast_isel_lowering.odin $COMMON -o:none
+$ODIN test ../test_issue_equal_proc_dependencies.odin $COMMON
+if [[ $($ODIN test ../test_issue_equal_proc_dependencies.odin $COMMON -build-mode:obj -show-debug-messages 2>&1 | grep -ci "missing procedure") -eq 0 ]]; then
+	echo "SUCCESSFUL 1/1"
+else
+	echo "SUCCESSFUL 0/1"
+	exit 1
+fi
 $ODIN test ../test_issue_7421.odin $COMMON
 if [[ $($ODIN check ../test_issue_7421_tagged_duplicate.odin $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error: Duplicate case") -eq 1 ]]; then
 	echo "SUCCESSFUL 1/1"
diff --git a/tests/issues/test_issue_equal_proc_dependencies.odin b/tests/issues/test_issue_equal_proc_dependencies.odin
new file mode 100644
index 000000000..d237b95b9
--- /dev/null
+++ b/tests/issues/test_issue_equal_proc_dependencies.odin
@@ -0,0 +1,87 @@
+// The backend gives each comparable struct and union in the type table, and the key of each map, an equality
+// procedure, so the runtime procedures it compares fields with must be dependencies however the type was reached
+package test_issues
+
+import "base:runtime"
+import "core:fmt"
+import "core:testing"
+
+Quaternion :: distinct quaternion128
+
+// only reached through type info, and recursive through its union
+Entity :: struct {
+	name:        string,
+	orientation: Quaternion,
+	small:       complex32,
+	derived:     union {Frog},
+}
+
+Frog :: struct {
+	entity: ^Entity,
+	height: f32,
+}
+
+Key :: struct {
+	name: string,
+	q:    quaternion256,
+}
+
+Holder :: struct {
+	m:    map[Key]int,
+	next: ^Holder,
+}
+
+Variants :: union {complex128, quaternion64, cstring}
+
+Wrapper :: struct {
+	v: Variants,
+}
+
+struct_equal :: proc(ti: ^runtime.Type_Info) -> runtime.Equal_Proc {
+	return runtime.type_info_base(ti).variant.(runtime.Type_Info_Struct).equal
+}
+
+@(test)
+test_equal_procs_of_type_info :: proc(t: ^testing.T) {
+	a := new(Entity)
+	defer free(a)
+	a.name = "frog"
+	a.orientation = 1
+	a.small = complex(f16(1), f16(2))
+	a.derived = Frog{a, 1}
+	s := fmt.tprint(a)
+	testing.expect(t, len(s) > 0)
+
+	b := new(Entity)
+	defer free(b)
+	b^ = a^
+
+	entity_equal := struct_equal(runtime.type_info_base(type_info_of(^Entity)).variant.(runtime.Type_Info_Pointer).elem)
+	testing.expect(t, entity_equal(a, b))
+	b.small = complex(f16(1), f16(3))
+	testing.expect(t, !entity_equal(a, b))
+	b.small = a.small
+	b.orientation = 2
+	testing.expect(t, !entity_equal(a, b))
+
+	h: ^Holder
+	s = fmt.tprint(h)
+	testing.expect(t, len(s) > 0)
+	holder_info := runtime.type_info_base(type_info_of(^Holder)).variant.(runtime.Type_Info_Pointer).elem
+	map_info := runtime.type_info_base(runtime.type_info_base(holder_info).variant.(runtime.Type_Info_Struct).types[0]).variant.(runtime.Type_Info_Map).map_info
+	k1 := Key{"a", 1}
+	k2 := Key{"a", 2}
+	testing.expect(t, map_info.key_equal(&k1, &k1))
+	testing.expect(t, !map_info.key_equal(&k1, &k2))
+
+	w1 := Wrapper{quaternion64(1)}
+	w2 := Wrapper{quaternion64(1)}
+	s = fmt.tprint(&w1)
+	testing.expect(t, len(s) > 0)
+	wrapper_equal := struct_equal(runtime.type_info_base(type_info_of(^Wrapper)).variant.(runtime.Type_Info_Pointer).elem)
+	testing.expect(t, wrapper_equal(&w1, &w2))
+	w2.v = complex128(1)
+	testing.expect(t, !wrapper_equal(&w1, &w2))
+	w1.v = complex128(1)
+	testing.expect(t, wrapper_equal(&w1, &w2))
+}

From b785a3fc77140e1146fa6c0788c0462112943420 Mon Sep 17 00:00:00 2001
From: corley <28909106+corleypc@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:39:22 +0300
Subject: [PATCH 167/215] adds a config for opting out of Eisel-Lemire

---
 core/strconv/fast_float.odin |  8 ++++++++
 core/strconv/strconv.odin    | 20 +++++++++++---------
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/core/strconv/fast_float.odin b/core/strconv/fast_float.odin
index 83e63b2a5..16363cdd3 100644
--- a/core/strconv/fast_float.odin
+++ b/core/strconv/fast_float.odin
@@ -2,6 +2,8 @@ package strconv
 
 import "core:math/bits"
 
+_ :: bits // needed for STRCONV_FAST_FLOAT=false
+
 /*
 	Eisel-Lemire decimal to binary conversion.
 
@@ -22,6 +24,12 @@ import "core:math/bits"
 	  Software: Practice and Experience 53 (7), 2023. https://arxiv.org/abs/2212.06644
 */
 
+/*
+	Disable with `-define:STRCONV_FAST_FLOAT=false` to drop the Eisel-Lemire step
+	and its table.
+*/
+FAST_FLOAT :: #config(STRCONV_FAST_FLOAT, true)
+
 _SMALLEST_POWER_OF_FIVE :: -342
 
 /*
diff --git a/core/strconv/strconv.odin b/core/strconv/strconv.odin
index 828c25b35..1c71b688d 100644
--- a/core/strconv/strconv.odin
+++ b/core/strconv/strconv.odin
@@ -1211,16 +1211,18 @@ parse_float_prefix_generic :: proc($T: typeid, str: string) -> (value: T, nr: in
 	}
 
 	// Eisel-Lemire's fast float algorithm
-	fast_float: {
-		b := fast_float_compute_float(T, exp, mantissa)
-		if trunc && b != fast_float_compute_float(T, exp, mantissa+1) {
-			break fast_float
+	when FAST_FLOAT {
+		fast_float: {
+			b := fast_float_compute_float(T, exp, mantissa)
+			if trunc && b != fast_float_compute_float(T, exp, mantissa+1) {
+				break fast_float
+			}
+			ok = b >> info.mantbits != 1<<info.expbits - 1 // infinity means overflow
+			if neg {
+				b |= 1 << info.mantbits << info.expbits
+			}
+			return transmute(T)Bits(b), nr, ok
 		}
-		ok = b >> info.mantbits != 1<<info.expbits - 1 // infinity means overflow
-		if neg {
-			b |= 1 << info.mantbits << info.expbits
-		}
-		return transmute(T)Bits(b), nr, ok
 	}
 
 	// Slow path for arbitrary-precision decimal

From 80dd40add701f03cf801d2e105a0fe8faf7d01c4 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 13:46:29 +0100
Subject: [PATCH 168/215] Replace the division in `map_cell_index_dynamic `
 with a reciprocal multiply trick

---
 base/runtime/dynamic_map_internal.odin | 55 ++++++++++++++++++--------
 1 file changed, 38 insertions(+), 17 deletions(-)

diff --git a/base/runtime/dynamic_map_internal.odin b/base/runtime/dynamic_map_internal.odin
index c15bc9cc0..65c81d54e 100644
--- a/base/runtime/dynamic_map_internal.odin
+++ b/base/runtime/dynamic_map_internal.odin
@@ -53,24 +53,45 @@ map_cell_info :: intrinsics.type_map_cell_info
 
 // Same as the above procedure but at runtime with the cell Map_Cell_Info value.
 @(require_results)
-map_cell_index_dynamic :: #force_inline proc "contextless" (base: uintptr, #no_alias info: ^Map_Cell_Info, index: uintptr) -> uintptr {
-	// Micro-optimize the common cases to save on integer division.
-	elements_per_cell := uintptr(info.elements_per_cell)
-	size_of_cell      := uintptr(info.size_of_cell)
-	switch elements_per_cell {
-	case 1:
-		return base + (index * size_of_cell)
-	case 2:
-		cell_index   := index >> 1
-		data_index   := index & 1
-		size_of_type := uintptr(info.size_of_type)
-		return base + (cell_index * size_of_cell) + (data_index * size_of_type)
-	case:
-		cell_index   := index / elements_per_cell
-		data_index   := index % elements_per_cell
-		size_of_type := uintptr(info.size_of_type)
-		return base + (cell_index * size_of_cell) + (data_index * size_of_type)
+map_cell_index_dynamic :: #force_inline proc "contextless" (base: uintptr, #no_alias info: ^Map_Cell_Info, index: uintptr) -> uintptr #no_bounds_check {
+	#assert(MAP_CACHE_LINE_SIZE == 64)
+
+	// ceil(2^64 / N) for each N = MAP_CACHE_LINE_SIZE / size_of(T) > 1
+	@(static, rodata)
+	MAP_CELL_RECIPROCALS := [MAP_CACHE_LINE_SIZE+1]u64{
+		2  = (1<<64 +  1) /  2,
+		3  = (1<<64 +  2) /  3,
+		4  = (1<<64 +  3) /  4,
+		5  = (1<<64 +  4) /  5,
+		6  = (1<<64 +  5) /  6,
+		7  = (1<<64 +  6) /  7,
+		8  = (1<<64 +  7) /  8,
+		9  = (1<<64 +  8) /  9,
+		10 = (1<<64 +  9) / 10,
+		12 = (1<<64 + 11) / 12,
+		16 = (1<<64 + 15) / 16,
+		21 = (1<<64 + 20) / 21,
+		32 = (1<<64 + 31) / 32,
+		64 = (1<<64 + 63) / 64,
 	}
+
+	// cell_index*size_of_cell + data_index*size_of_type == index*size_of_type + cell_index*padding
+
+	n       := info.elements_per_cell
+	stride  := info.size_of_cell if n == 1 else info.size_of_type
+	padding := info.size_of_cell - n*stride
+	offset  := index*stride
+	if padding != 0 {
+		r := MAP_CELL_RECIPROCALS[n]
+		when size_of(uintptr) == 8 {
+			cell_index := uintptr((u128(index)*u128(r)) >> 64) // NOTE(bill): on many platforms, this use of `u128` is actually a single instruction
+		} else {
+			lo := u64(index)*(r & 0xffff_ffff)
+			cell_index := uintptr((u64(index)*(r >> 32) + (lo >> 32)) >> 32)
+		}
+		offset += cell_index*padding
+	}
+	return base + offset
 }
 
 // Same as above procedure but with compile-time constant index.

From d8da5185c98f4586d942f3f3ae4a4e046f125f7a Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 14:47:38 +0100
Subject: [PATCH 169/215] Store a constant holding a misaligned pointer
 directly rather than copying it from a constant global, which Apple's linker
 rejects

---
 src/llvm_backend_general.cpp | 30 +++++++++++++++++++++++++++++-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 1a299689e..a2b2a44b9 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -1935,6 +1935,33 @@ gb_internal bool lb_try_copy_loaded_aggregate(lbProcedure *p, LLVMValueRef dst,
 	return true;
 }
 
+// Apple's linker rejects the address of a symbol stored in data at an address not aligned to a pointer,
+// as a constant of a packed struct may hold
+gb_internal bool lb_const_has_misaligned_pointer(LLVMTargetDataRef td, LLVMValueRef c, u64 offset, u64 base_align) {
+	if (LLVMIsAGlobalValue(c) || LLVMIsAConstantExpr(c) || LLVMIsABlockAddress(c)) {
+		u64 ptr_size = cast(u64)build_context.ptr_size;
+		return base_align < ptr_size || offset % ptr_size != 0;
+	}
+	LLVMTypeRef t = LLVMTypeOf(c);
+	if (LLVMIsAConstantStruct(c)) {
+		unsigned n = LLVMCountStructElementTypes(t);
+		for (unsigned i = 0; i < n; i++) {
+			if (lb_const_has_misaligned_pointer(td, LLVMGetOperand(c, i), offset + LLVMOffsetOfElement(td, t, i), base_align)) {
+				return true;
+			}
+		}
+	} else if (LLVMIsAConstantArray(c)) {
+		u64 stride = LLVMABISizeOfType(td, LLVMGetElementType(t));
+		unsigned n = cast(unsigned)LLVMGetNumOperands(c);
+		for (unsigned i = 0; i < n; i++) {
+			if (lb_const_has_misaligned_pointer(td, LLVMGetOperand(c, i), offset + i*stride, base_align)) {
+				return true;
+			}
+		}
+	}
+	return false;
+}
+
 gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 	GB_ASSERT(value.value != nullptr);
 
@@ -1983,7 +2010,8 @@ gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 			                src_ptr, lb_try_get_alignment(src_ptr_original, 1),
 			                LLVMConstInt(LLVMInt64TypeInContext(p->module->ctx), lb_sizeof(LLVMTypeOf(value.value)), false));
 			return;
-		} else if (LLVMIsConstant(value.value)) {
+		} else if (LLVMIsConstant(value.value) &&
+		           !lb_const_has_misaligned_pointer(LLVMGetModuleDataLayout(p->module->mod), value.value, 0, cast(u64)type_align_of(value.type))) {
 			lbAddr addr = lb_add_global_generated_from_procedure(p, value.type, value);
 			lb_make_global_private_const(addr);
 

From 0ea9b17c3637106796b61bf7ce1c77b441e21297 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 14:53:55 +0100
Subject: [PATCH 170/215] Fix the probe distance in `__$map_get` and store
 directly into an empty slot in `__$map_set`, which also improves a `map`'s
 performance

---
 src/llvm_backend.cpp | 161 +++++++++++++++++++++++++++++++------------
 1 file changed, 117 insertions(+), 44 deletions(-)

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 05ce7ae17..e5bcce87f 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -651,6 +651,42 @@ gb_internal lbValue lb_hasher_proc_for_type(lbModule *m, Type *type) {
 
 #define LLVM_SET_VALUE_NAME(value, name) LLVMSetValueName2((value), (name), gb_count_of((name))-1);
 
+struct lbMapKVH {
+	lbValue mask; // capacity-1
+	lbValue ks;   // ^Key
+	lbValue vs;   // ^Value
+	lbValue hs;   // ^uintptr
+};
+
+gb_internal lbMapKVH lb_map_kvh_data_static(lbProcedure *p, Type *type, lbValue map) {
+	// NOTE(bill): This assumes that the map has been allocated already (i.e. `data != 0`)
+
+	lbModule *m = p->module;
+	lbValue one = lb_const_int(m, t_uintptr, 1);
+
+	lbValue data     = lb_emit_struct_ev(p, map, 0);
+	lbValue log2_cap = lb_emit_arith(p, Token_And, data, lb_const_int(m, t_uintptr, MAP_CACHE_LINE_SIZE-1), t_uintptr);
+	lbValue capacity = lb_emit_arith(p, Token_Shl, one, log2_cap, t_uintptr);
+	LLVM_SET_VALUE_NAME(capacity.value, "capacity");
+
+	lbMapKVH res = {};
+	res.mask = lb_emit_arith(p, Token_Sub, capacity, one, t_uintptr);
+	LLVM_SET_VALUE_NAME(res.mask.value, "mask");
+
+	lbValue ks = lb_map_data_uintptr(p, map);
+	lbValue vs = lb_map_cell_index_static(p, type->Map.key, ks, capacity);
+	lbValue hs = lb_map_cell_index_static(p, type->Map.value, vs, capacity);
+
+	res.ks = lb_emit_conv(p, ks, alloc_type_pointer(type->Map.key));
+	res.vs = lb_emit_conv(p, vs, alloc_type_pointer(type->Map.value));
+	res.hs = lb_emit_conv(p, hs, alloc_type_pointer(t_uintptr));
+
+	LLVM_SET_VALUE_NAME(res.ks.value, "ks");
+	LLVM_SET_VALUE_NAME(res.vs.value, "vs");
+	LLVM_SET_VALUE_NAME(res.hs.value, "hs");
+	return res;
+}
+
 
 gb_internal lbValue lb_map_get_proc_for_type(lbModule *m, Type *type) {
 	GB_ASSERT(!build_context.dynamic_map_calls);
@@ -695,10 +731,10 @@ gb_internal lbValue lb_map_get_proc_for_type(lbModule *m, Type *type) {
 
 	lbBlock *loop_block         = lb_create_block(p, "loop");
 	lbBlock *hash_block         = lb_create_block(p, "hash");
+	lbBlock *key_compare_block  = lb_create_block(p, "key_compare");
+	lbBlock *empty_block        = lb_create_block(p, "empty");
 	lbBlock *probe_block        = lb_create_block(p, "probe");
 	lbBlock *increment_block    = lb_create_block(p, "increment");
-	lbBlock *hash_compare_block = lb_create_block(p, "hash_compare");
-	lbBlock *key_compare_block  = lb_create_block(p, "key_compare");
 	lbBlock *value_block        = lb_create_block(p, "value");
 	lbBlock *nil_block          = lb_create_block(p, "nil");
 
@@ -724,63 +760,38 @@ gb_internal lbValue lb_map_get_proc_for_type(lbModule *m, Type *type) {
 	LLVM_SET_VALUE_NAME(pos.addr.value, "pos");
 	LLVM_SET_VALUE_NAME(distance.addr.value, "distance");
 
-	lbValue capacity = lb_map_cap(p, map);
-	LLVM_SET_VALUE_NAME(capacity.value, "capacity");
-	lbValue cap_minus_1 = lb_emit_arith(p, Token_Sub, capacity, lb_const_int(m, t_int, 1), t_int);
-	lbValue mask = lb_emit_conv(p, cap_minus_1, t_uintptr);
-	LLVM_SET_VALUE_NAME(mask.value, "mask");
+	// NOTE(bill): length != 0, so the map has been allocated
+	lbMapKVH kvh = lb_map_kvh_data_static(p, type, map);
+	lbValue mask = kvh.mask;
+	lbValue ks = kvh.ks;
+	lbValue vs = kvh.vs;
+	lbValue hs = kvh.hs;
+
+	lb_addr_store(p, pos, lb_emit_arith(p, Token_And, h, mask, t_uintptr));
 
-	{
-		// map_desired_position inlined
-		lbValue the_pos = lb_emit_arith(p, Token_And, h, mask, t_uintptr);
-		the_pos = lb_emit_conv(p, the_pos, t_uintptr);
-		lb_addr_store(p, pos, the_pos);
-	}
 	lbValue zero_uintptr = lb_const_int(m, t_uintptr, 0);
 	lbValue one_uintptr = lb_const_int(m, t_uintptr, 1);
 
-	lbValue ks = lb_map_data_uintptr(p, map);
-	lbValue vs = lb_map_cell_index_static(p, type->Map.key, ks, capacity);
-	lbValue hs = lb_map_cell_index_static(p, type->Map.value, vs, capacity);
-
-	ks = lb_emit_conv(p, ks, alloc_type_pointer(type->Map.key));
-	vs = lb_emit_conv(p, vs, alloc_type_pointer(type->Map.value));
-	hs = lb_emit_conv(p, hs, alloc_type_pointer(t_uintptr));
-
-	LLVM_SET_VALUE_NAME(ks.value, "ks");
-	LLVM_SET_VALUE_NAME(vs.value, "vs");
-	LLVM_SET_VALUE_NAME(hs.value, "hs");
-
 	lb_emit_jump(p, loop_block);
 	lb_start_block(p, loop_block);
 
 	lbValue element_hash = lb_emit_load(p, lb_emit_ptr_offset(p, hs, lb_addr_load(p, pos)));
 	LLVM_SET_VALUE_NAME(element_hash.value, "element_hash");
 
-	{
-		// if element_hash == 0 { return nil }
-		lb_emit_if(p, lb_emit_comp(p, Token_CmpEq, element_hash, zero_uintptr), nil_block, probe_block);
-	}
+	// `h` is never empty nor a tombstone, so check for a match first
+	lb_emit_if(p, lb_emit_comp(p, Token_CmpEq, element_hash, h), key_compare_block, empty_block);
+
+	lb_start_block(p, empty_block);
+	lb_emit_if(p, lb_emit_comp(p, Token_CmpEq, element_hash, zero_uintptr), nil_block, probe_block);
 
 	lb_start_block(p, probe_block);
 	{
-		// map_probe_distance inlined
-		lbValue probe_distance = lb_emit_arith(p, Token_And, h, mask, t_uintptr);
-		probe_distance = lb_emit_conv(p, probe_distance, t_uintptr);
-
-		lbValue cap = lb_emit_conv(p, capacity, t_uintptr);
-		lbValue base = lb_emit_arith(p, Token_Add, lb_addr_load(p, pos), cap, t_uintptr);
-		probe_distance = lb_emit_arith(p, Token_Sub, base, probe_distance, t_uintptr);
+		lbValue probe_distance = lb_emit_arith(p, Token_Sub, lb_addr_load(p, pos), element_hash, t_uintptr);
 		probe_distance = lb_emit_arith(p, Token_And, probe_distance, mask, t_uintptr);
 		LLVM_SET_VALUE_NAME(probe_distance.value, "probe_distance");
 
 		lbValue cond = lb_emit_comp(p, Token_Gt, lb_addr_load(p, distance), probe_distance);
-		lb_emit_if(p, cond, nil_block, hash_compare_block);
-	}
-
-	lb_start_block(p, hash_compare_block);
-	{
-		lb_emit_if(p, lb_emit_comp(p, Token_CmpEq, element_hash, h), key_compare_block, increment_block);
+		lb_emit_if(p, cond, nil_block, increment_block);
 	}
 
 	lb_start_block(p, key_compare_block);
@@ -817,7 +828,6 @@ gb_internal lbValue lb_map_get_proc_for_type(lbModule *m, Type *type) {
 		LLVMBuildRet(p->builder, res.value);
 	}
 
-	// gb_printf_err("%s\n", LLVMPrintValueToString(p->value));
 
 	return {p->value, p->type};
 }
@@ -912,6 +922,12 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 	lbBlock *insert_block     = lb_create_block(p, "insert");
 	lbBlock *check_has_grown_block = lb_create_block(p, "check-has-grown");
 	lbBlock *rehash_block     = lb_create_block(p, "rehash");
+	lbBlock *slot_block       = lb_create_block(p, "slot");
+	lbBlock *slot_loop_block  = lb_create_block(p, "slot-loop");
+	lbBlock *slot_used_block  = lb_create_block(p, "slot-used");
+	lbBlock *slot_probe_block = lb_create_block(p, "slot-probe");
+	lbBlock *slot_next_block  = lb_create_block(p, "slot-next");
+	lbBlock *place_block      = lb_create_block(p, "place");
 
 	lb_emit_if(p, lb_emit_comp_against_nil(p, Token_NotEq, found_ptr), found_block, check_grow_block);
 	lb_start_block(p, found_block);
@@ -943,7 +959,7 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 
 		lb_start_block(p, check_has_grown_block);
 
-		lb_emit_if(p, has_grown, rehash_block, insert_block);
+		lb_emit_if(p, has_grown, rehash_block, slot_block);
 		lb_start_block(p, rehash_block);
 		lbValue key = lb_emit_load(p, key_ptr);
 		lbValue new_hash = lb_gen_map_key_hash(p, map_ptr, key, nullptr);
@@ -952,6 +968,63 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 		lb_emit_jump(p, insert_block);
 	}
 
+	lb_start_block(p, slot_block);
+	{
+		lbValue map = lb_emit_load(p, lb_emit_conv(p, map_ptr, t_raw_map_ptr));
+		lbMapKVH kvh = lb_map_kvh_data_static(p, type, map);
+		lbValue h = lb_addr_load(p, hash_addr);
+
+		lbAddr pos = lb_add_local_generated(p, t_uintptr, false);
+		lbAddr distance = lb_add_local_generated(p, t_uintptr, true);
+		LLVM_SET_VALUE_NAME(pos.addr.value,      "slot_pos");
+		LLVM_SET_VALUE_NAME(distance.addr.value, "slot_distance");
+		lb_addr_store(p, pos, lb_emit_arith(p, Token_And, h, kvh.mask, t_uintptr));
+
+		lb_emit_jump(p,   slot_loop_block);
+		lb_start_block(p, slot_loop_block);
+
+		lbValue element_hash = lb_emit_load(p, lb_emit_ptr_offset(p, kvh.hs, lb_addr_load(p, pos)));
+		LLVM_SET_VALUE_NAME(element_hash.value, "slot_hash");
+
+		lb_emit_if(p, lb_emit_comp(p, Token_CmpEq, element_hash, lb_const_int(m, t_uintptr, 0)), place_block, slot_used_block);
+
+		lb_start_block(p, slot_used_block);
+		{
+			lbValue tombstone_mask = lb_const_int(m, t_uintptr, 1ull << (8*type_size_of(t_uintptr) - 1));
+			lbValue tombstone = lb_emit_arith(p, Token_And, element_hash, tombstone_mask, t_uintptr);
+			lb_emit_if(p, lb_emit_comp(p, Token_NotEq, tombstone, lb_const_int(m, t_uintptr, 0)), insert_block, slot_probe_block);
+		}
+
+		lb_start_block(p, slot_probe_block);
+		{
+			lbValue probe_distance = lb_emit_arith(p, Token_Sub, lb_addr_load(p, pos), element_hash, t_uintptr);
+			probe_distance         = lb_emit_arith(p, Token_And, probe_distance, kvh.mask, t_uintptr);
+			lb_emit_if(p, lb_emit_comp(p, Token_Gt, lb_addr_load(p, distance), probe_distance), insert_block, slot_next_block);
+		}
+
+		lb_start_block(p, slot_next_block);
+		{
+			lbValue pp = lb_emit_arith(p, Token_Add, lb_addr_load(p, pos), lb_const_int(m, t_uintptr, 1), t_uintptr);
+			lb_addr_store(p, pos, lb_emit_arith(p, Token_And, pp, kvh.mask, t_uintptr));
+			lb_emit_increment(p, distance.addr);
+			lb_emit_jump(p, slot_loop_block);
+		}
+
+		lb_start_block(p, place_block);
+		{
+			lbValue slot = lb_addr_load(p, pos);
+			lbValue key_dst   = lb_map_cell_index_static(p, type->Map.key,   kvh.ks, slot);
+			lbValue value_dst = lb_map_cell_index_static(p, type->Map.value, kvh.vs, slot);
+			lb_mem_copy_non_overlapping(p, key_dst,   key_ptr,   lb_const_int(m, t_int, type_size_of(type->Map.key)));
+			lb_mem_copy_non_overlapping(p, value_dst, value_ptr, lb_const_int(m, t_int, type_size_of(type->Map.value)));
+			lb_emit_store(p, lb_emit_ptr_offset(p, kvh.hs, slot), h);
+
+			lb_emit_increment(p, lb_map_len_ptr(p, map_ptr));
+
+			LLVMBuildRet(p->builder, lb_emit_conv(p, value_dst, t_rawptr).value);
+		}
+	}
+
 	lb_start_block(p, insert_block);
 	{
 		auto args = array_make<lbValue>(temporary_allocator(), 5);

From 24ff27e6c8ff2d3a5ffe21c0339c9e30d65ed565 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:09:56 +0100
Subject: [PATCH 171/215] Hash fixed-size map keys a "word" at a time with
 `default_hasher_fixed`

---
 base/runtime/doc.odin                  |  1 +
 base/runtime/dynamic_map_internal.odin | 54 ++++++++++++++++++++++++--
 2 files changed, 52 insertions(+), 3 deletions(-)

diff --git a/base/runtime/doc.odin b/base/runtime/doc.odin
index 58ae21c5a..543ff881a 100644
--- a/base/runtime/doc.odin
+++ b/base/runtime/doc.odin
@@ -156,6 +156,7 @@ complain if they're missing.
 Required if maps are used
 
 * `default_hasher`
+* `default_hasher_fixed`
 * `default_hasher_cstring`
 * `default_hasher_string`
 
diff --git a/base/runtime/dynamic_map_internal.odin b/base/runtime/dynamic_map_internal.odin
index 65c81d54e..fd6fb9413 100644
--- a/base/runtime/dynamic_map_internal.odin
+++ b/base/runtime/dynamic_map_internal.odin
@@ -984,6 +984,54 @@ default_hasher :: #force_inline proc "contextless" (data: rawptr, seed: uintptr,
 	return uintptr(h) | uintptr(uintptr(h) == 0)
 }
 
+default_hasher_fixed :: #force_inline proc "contextless" (data: rawptr, seed: uintptr, N: int) -> uintptr {
+	@(require_results)
+	hash_fold :: #force_inline proc "contextless" (x, y: uintptr) -> uintptr {
+		when size_of(uintptr) == 8 {
+			p := u128(x) * u128(y)
+			return uintptr(p) ~ uintptr(p >> 64)
+		} else {
+			p := u64(x) * u64(y)
+			return uintptr(p) ~ uintptr(p >> 32)
+		}
+	}
+
+	@(require_results)
+	hash_load_short :: #force_inline proc "contextless" (p: uintptr, N: int) -> uintptr {
+		when size_of(uintptr) == 8 {
+			if N >= 4 {
+				lo := intrinsics.unaligned_load((^u32)(p))
+				hi := intrinsics.unaligned_load((^u32)(p + uintptr(N-4)))
+				return uintptr(lo) | uintptr(hi) << 32
+			}
+		}
+		b := ([^]u8)(p)
+		return uintptr(b[0]) | uintptr(b[N/2]) << 8 | uintptr(b[N-1]) << 16
+	}
+
+
+	HASH_K0 :: 0x9e3779b97f4a7c15 when size_of(uintptr) == 8 else 0x9e3779b9
+	HASH_K1 :: 0xbf58476d1ce4e5b9 when size_of(uintptr) == 8 else 0x85ebca6b
+
+	W :: size_of(uintptr)
+	p := uintptr(data)
+	h := seed ~ uintptr(N)
+	if N >= W {
+		for i := 0; i+W <= N; i += W {
+			h = hash_fold(h ~ intrinsics.unaligned_load((^uintptr)(p + uintptr(i))), HASH_K0)
+		}
+		if N % W != 0 {
+			// overlap the previous word rather than read past the end
+			h = hash_fold(h ~ intrinsics.unaligned_load((^uintptr)(p + uintptr(N-W))), HASH_K0)
+		}
+	} else if N > 0 {
+		h = hash_fold(h ~ hash_load_short(p, N), HASH_K0)
+	}
+	h = hash_fold(h, HASH_K1)
+	h &= HASH_MASK
+	return h | uintptr(h == 0)
+}
+
 default_hasher_string :: proc "contextless" (data: rawptr, seed: uintptr) -> uintptr {
 	str := (^[]byte)(data)
 	return default_hasher(raw_data(str^), seed, len(str))
@@ -1004,13 +1052,13 @@ default_hasher_f64 :: proc "contextless" (f: f64, seed: uintptr) -> uintptr {
 	f := f
 	buf: [size_of(f)]u8
 	if f == 0 {
-		return default_hasher(&buf, seed, size_of(buf))
+		return default_hasher_fixed(&buf, seed, size_of(buf))
 	}
 	if f != f {
 		// TODO(bill): What should the logic be for NaNs?
-		return default_hasher(&f, seed, size_of(f))
+		return default_hasher_fixed(&f, seed, size_of(f))
 	}
-	return default_hasher(&f, seed, size_of(f))
+	return default_hasher_fixed(&f, seed, size_of(f))
 }
 
 default_hasher_complex128 :: proc "contextless" (x, y: f64, seed: uintptr) -> uintptr {

From d57f6d8232775479ab7c7f0a1ad1223c93b6e182 Mon Sep 17 00:00:00 2001
From: Jeroen van Rijn <Kelimion@users.noreply.github.com>
Date: Sat, 3 Oct 2026 16:15:37 +0200
Subject: [PATCH 172/215] Add a few more #no_bounds_check to XXH3.

---
 core/hash/xxhash/streaming.odin | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/core/hash/xxhash/streaming.odin b/core/hash/xxhash/streaming.odin
index 22d99be1d..6761f0410 100644
--- a/core/hash/xxhash/streaming.odin
+++ b/core/hash/xxhash/streaming.odin
@@ -179,7 +179,7 @@ XXH3_reset_internal :: proc(state: ^XXH3_state, seed: XXH64_hash, secret: []u8,
 XXH3_consume_stripes :: #force_inline proc(
 		acc: []xxh_u64, stripes_so_far: ^uint, stripes_per_block: uint, input: []u8,
 		number_of_stripes: uint, secret: []u8, secret_limit: uint,
-		f_acc512: XXH3_accumulate_512_f, f_scramble: XXH3_scramble_accumulator_f) {
+		f_acc512: XXH3_accumulate_512_f, f_scramble: XXH3_scramble_accumulator_f)  #no_bounds_check {
 
 	assert(number_of_stripes <= stripes_per_block) /* can handle max 1 scramble per invocation */
 	assert(stripes_so_far^ < stripes_per_block)
@@ -206,7 +206,7 @@ XXH3_consume_stripes :: #force_inline proc(
 XXH3_update :: #force_inline proc(
 		state: ^XXH3_state, input: []u8,
 		f_acc512: XXH3_accumulate_512_f,
-		f_scramble: XXH3_scramble_accumulator_f) -> (err: Error) {
+		f_scramble: XXH3_scramble_accumulator_f) -> (err: Error) #no_bounds_check {
 
 	input  := input
 	length := len(input)

From d783e8b1f635589cd7016fe85e5151fa02f3172c Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:16:25 +0100
Subject: [PATCH 173/215] Inline more of the code in `default_hasher_fixed`

---
 base/runtime/dynamic_map_internal.odin | 27 +++++++++-----------------
 1 file changed, 9 insertions(+), 18 deletions(-)

diff --git a/base/runtime/dynamic_map_internal.odin b/base/runtime/dynamic_map_internal.odin
index fd6fb9413..b7dc2e1b9 100644
--- a/base/runtime/dynamic_map_internal.odin
+++ b/base/runtime/dynamic_map_internal.odin
@@ -996,36 +996,27 @@ default_hasher_fixed :: #force_inline proc "contextless" (data: rawptr, seed: ui
 		}
 	}
 
-	@(require_results)
-	hash_load_short :: #force_inline proc "contextless" (p: uintptr, N: int) -> uintptr {
-		when size_of(uintptr) == 8 {
-			if N >= 4 {
-				lo := intrinsics.unaligned_load((^u32)(p))
-				hi := intrinsics.unaligned_load((^u32)(p + uintptr(N-4)))
-				return uintptr(lo) | uintptr(hi) << 32
-			}
-		}
-		b := ([^]u8)(p)
-		return uintptr(b[0]) | uintptr(b[N/2]) << 8 | uintptr(b[N-1]) << 16
-	}
-
-
 	HASH_K0 :: 0x9e3779b97f4a7c15 when size_of(uintptr) == 8 else 0x9e3779b9
 	HASH_K1 :: 0xbf58476d1ce4e5b9 when size_of(uintptr) == 8 else 0x85ebca6b
 
 	W :: size_of(uintptr)
 	p := uintptr(data)
 	h := seed ~ uintptr(N)
-	if N >= W {
+	switch {
+	case N >= W:
 		for i := 0; i+W <= N; i += W {
 			h = hash_fold(h ~ intrinsics.unaligned_load((^uintptr)(p + uintptr(i))), HASH_K0)
 		}
 		if N % W != 0 {
-			// overlap the previous word rather than read past the end
 			h = hash_fold(h ~ intrinsics.unaligned_load((^uintptr)(p + uintptr(N-W))), HASH_K0)
 		}
-	} else if N > 0 {
-		h = hash_fold(h ~ hash_load_short(p, N), HASH_K0)
+	case N >= 4:
+		lo := intrinsics.unaligned_load((^u32)(p))
+		hi := intrinsics.unaligned_load((^u32)(p + uintptr(N-4)))
+		h = hash_fold(h ~ uintptr(u64(lo) | u64(hi) << 32), HASH_K0)
+	case N > 0:
+		b := ([^]u8)(p)
+		h = hash_fold(h ~ (uintptr(b[0]) | uintptr(b[N/2]) << 8 | uintptr(b[N-1]) << 16), HASH_K0)
 	}
 	h = hash_fold(h, HASH_K1)
 	h &= HASH_MASK

From ecfd651f95248b50e075abf504d6221f40acada8 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:26:49 +0100
Subject: [PATCH 174/215] Use atomics for the flags `name_test`

---
 tests/core/thread/test_core_thread.odin | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tests/core/thread/test_core_thread.odin b/tests/core/thread/test_core_thread.odin
index e06fcc3cf..56f42bc86 100644
--- a/tests/core/thread/test_core_thread.odin
+++ b/tests/core/thread/test_core_thread.odin
@@ -59,9 +59,9 @@ name_test :: proc(_t: ^testing.T) {
 	name_test_t = _t
 
 	t := thread.create_and_start(name = "test_name", fn = proc() {
-		main_wait = false
+		intrinsics.atomic_store(&main_wait, false)
 
-		for (child_wait) {}
+		for intrinsics.atomic_load(&child_wait) {}
 
 		n, err  := thread.get_name()
 		defer if err != nil {
@@ -73,7 +73,7 @@ name_test :: proc(_t: ^testing.T) {
 	})
 	defer free(t)
 
-	for (main_wait) {}
+	for intrinsics.atomic_load(&main_wait) {}
 
 	n, err := thread.get_name(t)
 	defer if err != nil {
@@ -82,7 +82,7 @@ name_test :: proc(_t: ^testing.T) {
 	testing.expect(name_test_t, err == nil, "thread name allocation failed")
 	testing.expectf(name_test_t, n == "test_name","thread name on main did not match : got %v", n)
 
-	child_wait = false
+	intrinsics.atomic_store(&child_wait, false)
 
 	thread.join(t)
 }

From f86c53f13a12baed42094b8241e68cd2fb0cc6c2 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:32:09 +0100
Subject: [PATCH 175/215] Do Robin Hood displacement in `__$map_set` when no
 tombstone is in the way

---
 src/check_type.cpp   |   2 +-
 src/llvm_backend.cpp | 136 ++++++++++++++++++++++++++++++++++++++-----
 2 files changed, 121 insertions(+), 17 deletions(-)

diff --git a/src/check_type.cpp b/src/check_type.cpp
index 8555140cc..7bdb7d4e5 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -4197,7 +4197,7 @@ gb_internal void add_map_key_type_dependencies(CheckerContext *ctx, Type *key) {
 		}
 
 		if (is_type_simple_compare(key)) {
-			add_package_dependency(ctx, "runtime", "default_hasher");
+			add_package_dependency(ctx, "runtime", "default_hasher_fixed");
 			return;
 		}
 
diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index e5bcce87f..720e6fba8 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -434,7 +434,7 @@ gb_internal lbValue lb_simple_compare_hash(lbProcedure *p, Type *type, lbValue d
 	args[0] = data;
 	args[1] = seed;
 	args[2] = lb_const_int(p->module, t_int, type_size_of(type));
-	return lb_emit_runtime_call(p, "default_hasher", args);
+	return lb_emit_runtime_call(p, "default_hasher_fixed", args);
 }
 
 gb_internal void lb_add_callsite_force_inline(lbProcedure *p, lbValue ret_value) {
@@ -928,6 +928,8 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 	lbBlock *slot_probe_block = lb_create_block(p, "slot-probe");
 	lbBlock *slot_next_block  = lb_create_block(p, "slot-next");
 	lbBlock *place_block      = lb_create_block(p, "place");
+	lbBlock *scan_block       = lb_create_block(p, "scan");
+	lbBlock *displace_block   = lb_create_block(p, "displace");
 
 	lb_emit_if(p, lb_emit_comp_against_nil(p, Token_NotEq, found_ptr), found_block, check_grow_block);
 	lb_start_block(p, found_block);
@@ -974,6 +976,29 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 		lbMapKVH kvh = lb_map_kvh_data_static(p, type, map);
 		lbValue h = lb_addr_load(p, hash_addr);
 
+		lbValue zero_uintptr   = lb_const_int(m, t_uintptr, 0);
+		lbValue tombstone_mask = lb_const_int(m, t_uintptr, 1ull << (8*type_size_of(t_uintptr) - 1));
+		lbValue key_size       = lb_const_int(m, t_int, type_size_of(type->Map.key));
+		lbValue value_size     = lb_const_int(m, t_int, type_size_of(type->Map.value));
+
+		auto hash_ptr_at = [&](lbValue slot) -> lbValue {
+			return lb_emit_ptr_offset(p, kvh.hs, slot);
+		};
+		auto is_empty = [&](lbValue hash) -> lbValue {
+			return lb_emit_comp(p, Token_CmpEq, hash, zero_uintptr);
+		};
+		auto is_tombstone = [&](lbValue hash) -> lbValue {
+			return lb_emit_comp(p, Token_NotEq, lb_emit_arith(p, Token_And, hash, tombstone_mask, t_uintptr), zero_uintptr);
+		};
+		// map_probe_distance inlined
+		auto probe_distance_of = [&](lbValue hash, lbValue slot) -> lbValue {
+			return lb_emit_arith(p, Token_And, lb_emit_arith(p, Token_Sub, slot, hash, t_uintptr), kvh.mask, t_uintptr);
+		};
+		auto next_slot = [&](lbAddr slot) {
+			lbValue next = lb_emit_arith(p, Token_Add, lb_addr_load(p, slot), lb_const_int(m, t_uintptr, 1), t_uintptr);
+			lb_addr_store(p, slot, lb_emit_arith(p, Token_And, next, kvh.mask, t_uintptr));
+		};
+
 		lbAddr pos = lb_add_local_generated(p, t_uintptr, false);
 		lbAddr distance = lb_add_local_generated(p, t_uintptr, true);
 		LLVM_SET_VALUE_NAME(pos.addr.value,      "slot_pos");
@@ -983,29 +1008,23 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 		lb_emit_jump(p,   slot_loop_block);
 		lb_start_block(p, slot_loop_block);
 
-		lbValue element_hash = lb_emit_load(p, lb_emit_ptr_offset(p, kvh.hs, lb_addr_load(p, pos)));
+		lbValue element_hash = lb_emit_load(p, hash_ptr_at(lb_addr_load(p, pos)));
 		LLVM_SET_VALUE_NAME(element_hash.value, "slot_hash");
 
-		lb_emit_if(p, lb_emit_comp(p, Token_CmpEq, element_hash, lb_const_int(m, t_uintptr, 0)), place_block, slot_used_block);
+		lb_emit_if(p, is_empty(element_hash), place_block, slot_used_block);
 
 		lb_start_block(p, slot_used_block);
-		{
-			lbValue tombstone_mask = lb_const_int(m, t_uintptr, 1ull << (8*type_size_of(t_uintptr) - 1));
-			lbValue tombstone = lb_emit_arith(p, Token_And, element_hash, tombstone_mask, t_uintptr);
-			lb_emit_if(p, lb_emit_comp(p, Token_NotEq, tombstone, lb_const_int(m, t_uintptr, 0)), insert_block, slot_probe_block);
-		}
+		lb_emit_if(p, is_tombstone(element_hash), insert_block, slot_probe_block);
 
 		lb_start_block(p, slot_probe_block);
 		{
-			lbValue probe_distance = lb_emit_arith(p, Token_Sub, lb_addr_load(p, pos), element_hash, t_uintptr);
-			probe_distance         = lb_emit_arith(p, Token_And, probe_distance, kvh.mask, t_uintptr);
-			lb_emit_if(p, lb_emit_comp(p, Token_Gt, lb_addr_load(p, distance), probe_distance), insert_block, slot_next_block);
+			lbValue probe_distance = probe_distance_of(element_hash, lb_addr_load(p, pos));
+			lb_emit_if(p, lb_emit_comp(p, Token_Gt, lb_addr_load(p, distance), probe_distance), scan_block, slot_next_block);
 		}
 
 		lb_start_block(p, slot_next_block);
 		{
-			lbValue pp = lb_emit_arith(p, Token_Add, lb_addr_load(p, pos), lb_const_int(m, t_uintptr, 1), t_uintptr);
-			lb_addr_store(p, pos, lb_emit_arith(p, Token_And, pp, kvh.mask, t_uintptr));
+			next_slot(pos);
 			lb_emit_increment(p, distance.addr);
 			lb_emit_jump(p, slot_loop_block);
 		}
@@ -1015,9 +1034,94 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 			lbValue slot = lb_addr_load(p, pos);
 			lbValue key_dst   = lb_map_cell_index_static(p, type->Map.key,   kvh.ks, slot);
 			lbValue value_dst = lb_map_cell_index_static(p, type->Map.value, kvh.vs, slot);
-			lb_mem_copy_non_overlapping(p, key_dst,   key_ptr,   lb_const_int(m, t_int, type_size_of(type->Map.key)));
-			lb_mem_copy_non_overlapping(p, value_dst, value_ptr, lb_const_int(m, t_int, type_size_of(type->Map.value)));
-			lb_emit_store(p, lb_emit_ptr_offset(p, kvh.hs, slot), h);
+			lb_mem_copy_non_overlapping(p, key_dst,   key_ptr,   key_size);
+			lb_mem_copy_non_overlapping(p, value_dst, value_ptr, value_size);
+			lb_emit_store(p, hash_ptr_at(slot), h);
+
+			lb_emit_increment(p, lb_map_len_ptr(p, map_ptr));
+
+			LLVMBuildRet(p->builder, lb_emit_conv(p, value_dst, t_rawptr).value);
+		}
+
+		// NOTE(bill): The entry takes over this slot.
+		// If no tombstone comes before the next empty slot, do what map_insert_hash_dynamic` does without them:
+		// carry each displaced entry on to the next slot whose entry it is poorer than, until an empty slot
+		lb_start_block(p, scan_block);
+		{
+			lbBlock *scan_loop_block = lb_create_block(p, "scan-loop");
+			lbBlock *scan_used_block = lb_create_block(p, "scan-used");
+			lbBlock *scan_next_block = lb_create_block(p, "scan-next");
+
+			lbAddr scan = lb_add_local_generated(p, t_uintptr, false);
+			lb_addr_store(p, scan, lb_addr_load(p, pos));
+
+			lb_emit_jump(p,   scan_loop_block);
+			lb_start_block(p, scan_loop_block);
+			lbValue scan_hash = lb_emit_load(p, hash_ptr_at(lb_addr_load(p, scan)));
+			lb_emit_if(p, is_empty(scan_hash), displace_block, scan_used_block);
+
+			lb_start_block(p, scan_used_block);
+			lb_emit_if(p, is_tombstone(scan_hash), insert_block, scan_next_block);
+
+			lb_start_block(p, scan_next_block);
+			next_slot(scan);
+			lb_emit_jump(p, scan_loop_block);
+		}
+
+		lb_start_block(p, displace_block);
+		{
+			lbBlock *swap_loop_block  = lb_create_block(p, "swap-loop");
+			lbBlock *swap_probe_block = lb_create_block(p, "swap-probe");
+			lbBlock *swap_block       = lb_create_block(p, "swap");
+			lbBlock *swap_next_block  = lb_create_block(p, "swap-next");
+			lbBlock *swap_place_block = lb_create_block(p, "swap-place");
+
+			lbValue value_dst = lb_map_cell_index_static(p, type->Map.value, kvh.vs, lb_addr_load(p, pos));
+
+			lbAddr carried_key   = lb_add_local_generated(p, type->Map.key,   false);
+			lbAddr carried_value = lb_add_local_generated(p, type->Map.value, false);
+			lbAddr carried_hash  = lb_add_local_generated(p, t_uintptr,       false);
+			lbAddr temp_key      = lb_add_local_generated(p, type->Map.key,   false);
+			lbAddr temp_value    = lb_add_local_generated(p, type->Map.value, false);
+			lb_mem_copy_non_overlapping(p, carried_key.addr,   key_ptr,   key_size);
+			lb_mem_copy_non_overlapping(p, carried_value.addr, value_ptr, value_size);
+			lb_addr_store(p, carried_hash, h);
+
+			auto swap_memory = [&](lbValue a, lbValue b, lbValue temp, lbValue size) {
+				lb_mem_copy_non_overlapping(p, temp, a,    size);
+				lb_mem_copy_non_overlapping(p, a,    b,    size);
+				lb_mem_copy_non_overlapping(p, b,    temp, size);
+			};
+
+			lb_emit_jump(p,   swap_loop_block);
+			lb_start_block(p, swap_loop_block);
+			lbValue slot       = lb_addr_load(p, pos);
+			lbValue key_cell   = lb_map_cell_index_static(p, type->Map.key,   kvh.ks, slot);
+			lbValue value_cell = lb_map_cell_index_static(p, type->Map.value, kvh.vs, slot);
+			lbValue slot_hash  = lb_emit_load(p, hash_ptr_at(slot));
+			lb_emit_if(p, is_empty(slot_hash), swap_place_block, swap_probe_block);
+
+			lb_start_block(p, swap_probe_block);
+			lbValue probe_distance = probe_distance_of(slot_hash, slot);
+			lb_emit_if(p, lb_emit_comp(p, Token_Gt, lb_addr_load(p, distance), probe_distance), swap_block, swap_next_block);
+
+			lb_start_block(p, swap_block);
+			swap_memory(key_cell,   carried_key.addr,   temp_key.addr,   key_size);
+			swap_memory(value_cell, carried_value.addr, temp_value.addr, value_size);
+			lb_emit_store(p, hash_ptr_at(slot), lb_addr_load(p, carried_hash));
+			lb_addr_store(p, carried_hash, slot_hash);
+			lb_addr_store(p, distance, probe_distance);
+			lb_emit_jump(p, swap_next_block);
+
+			lb_start_block(p, swap_next_block);
+			next_slot(pos);
+			lb_emit_increment(p, distance.addr);
+			lb_emit_jump(p, swap_loop_block);
+
+			lb_start_block(p, swap_place_block);
+			lb_mem_copy_non_overlapping(p, key_cell,   carried_key.addr,   key_size);
+			lb_mem_copy_non_overlapping(p, value_cell, carried_value.addr, value_size);
+			lb_emit_store(p, hash_ptr_at(slot), lb_addr_load(p, carried_hash));
 
 			lb_emit_increment(p, lb_map_len_ptr(p, map_ptr));
 

From 32f30c3eb351f8a05000eaea4e255d531037306f Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 16:00:23 +0100
Subject: [PATCH 176/215] Tokenize whilst parsing rather than storing every
 token of a file first

---
 src/checker.cpp |   4 +-
 src/error.cpp   |   8 +++
 src/main.cpp    |  29 +-------
 src/parser.cpp  | 186 ++++++++++++++++++++++++++----------------------
 src/parser.hpp  |  11 +--
 5 files changed, 119 insertions(+), 119 deletions(-)

diff --git a/src/checker.cpp b/src/checker.cpp
index fd65d42fc..01702b14e 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -7803,9 +7803,7 @@ gb_internal void check_parsed_files(Checker *c) {
 			token.pos.column  = 1;
 			if (s->pkg->files.count > 0) {
 				AstFile *f = s->pkg->files[0];
-				if (f->tokens.count > 0) {
-					token = f->tokens[0];
-				}
+				token = f->first_token;
 			}
 
 			error(token, "Undefined entry point procedure 'main'");
diff --git a/src/error.cpp b/src/error.cpp
index 5879fbeec..f19829928 100644
--- a/src/error.cpp
+++ b/src/error.cpp
@@ -812,6 +812,10 @@ gb_internal void error_no_newline_va(TokenPos const &pos, char const *fmt, va_li
 
 
 gb_internal void syntax_error_va(TokenPos const &pos, TokenPos end, char const *fmt, va_list va) {
+	if (global_error_mute_depth > 0) {
+		global_error_mute_count += 1;
+		return;
+	}
 	global_error_collector.count.fetch_add(1);
 	mutex_lock(&global_error_collector.mutex);
 	if (global_error_collector.count > MAX_ERROR_COLLECTOR_COUNT()) {
@@ -844,6 +848,10 @@ gb_internal void syntax_error_va(TokenPos const &pos, TokenPos end, char const *
 }
 
 gb_internal void syntax_error_with_verbose_va(TokenPos const &pos, TokenPos end, char const *fmt, va_list va) {
+	if (global_error_mute_depth > 0) {
+		global_error_mute_count += 1;
+		return;
+	}
 	global_error_collector.count.fetch_add(1);
 	mutex_lock(&global_error_collector.mutex);
 	if (global_error_collector.count > MAX_ERROR_COLLECTOR_COUNT()) {
diff --git a/src/main.cpp b/src/main.cpp
index 17306bfe1..b541dc0aa 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -2390,12 +2390,10 @@ gb_internal void show_timings(Checker *c, Timings *t) {
 	isize files    = 0;
 	isize packages = p->packages.count;
 	isize total_file_size = 0;
-	f64 total_tokenizing_time = 0;
 	f64 total_parsing_time = 0;
 	for (AstPackage *pkg : p->packages) {
 		files += pkg->files.count;
 		for (AstFile *file : pkg->files) {
-			total_tokenizing_time += file->time_to_tokenize;
 			total_parsing_time += file->time_to_parse;
 			total_file_size += file->tokenizer.end - file->tokenizer.start;
 		}
@@ -2419,22 +2417,9 @@ gb_internal void show_timings(Checker *c, Timings *t) {
 			gb_printf_err("Total File Size - %td\n", total_file_size);
 			gb_printf_err("\n");
 		}
-		{
-			f64 time = total_tokenizing_time;
-			gb_printf_err("Tokenization Only\n");
-			gb_printf_err("LOC/s        - %.3f\n", cast(f64)lines/time);
-			gb_printf_err("us/LOC       - %.3f\n", 1.0e6*time/cast(f64)lines);
-			gb_printf_err("Tokens/s     - %.3f\n", cast(f64)tokens/time);
-			gb_printf_err("us/Token     - %.3f\n", 1.0e6*time/cast(f64)tokens);
-			gb_printf_err("bytes/s      - %.3f\n", cast(f64)total_file_size/time);
-			gb_printf_err("MiB/s        - %.3f\n", cast(f64)(total_file_size/time)/(1024*1024));
-			gb_printf_err("us/bytes     - %.3f\n", 1.0e6*time/cast(f64)total_file_size);
-
-			gb_printf_err("\n");
-		}
 		{
 			f64 time = total_parsing_time;
-			gb_printf_err("Parsing Only\n");
+			gb_printf_err("Tokenizing and Parsing Only\n");
 			gb_printf_err("LOC/s        - %.3f\n", cast(f64)lines/time);
 			gb_printf_err("us/LOC       - %.3f\n", 1.0e6*time/cast(f64)lines);
 			gb_printf_err("Tokens/s     - %.3f\n", cast(f64)tokens/time);
@@ -3631,7 +3616,7 @@ gb_internal gbFileError write_file_with_stripped_tokens(gbFile *f, AstFile *file
 	u8 const *file_data = file->tokenizer.start;
 	i32 prev_offset = 0;
 	i32 const end_offset = cast(i32)(file->tokenizer.end - file->tokenizer.start);
-	for (Token const &token : file->tokens) {
+	for (Token const &token : file->token_edits) {
 		if (token.flags & (TokenFlag_Remove|TokenFlag_Replace)) {
 			i32 offset = token.pos.offset;
 			i32 to_write = offset-prev_offset;
@@ -3674,15 +3659,7 @@ gb_internal int strip_semicolons(Parser *parser) {
 
 	for (AstPackage *pkg : parser->packages) {
 		for (AstFile *file : pkg->files) {
-			bool nothing_to_change = true;
-			for (Token const &token : file->tokens) {
-				if (token.flags) {
-					nothing_to_change = false;
-					break;
-				}
-			}
-
-			if (nothing_to_change) {
+			if (file->token_edits.count == 0) {
 				continue;
 			}
 
diff --git a/src/parser.cpp b/src/parser.cpp
index 3f6578ab4..31561f39c 100644
--- a/src/parser.cpp
+++ b/src/parser.cpp
@@ -1575,13 +1575,35 @@ gb_internal Ast *ast_attribute(AstFile *f, Token token, Token open, Token close,
 }
 
 
-gb_internal bool next_token0(AstFile *f) {
-	if (f->curr_token_index+1 < f->tokens.count) {
-		f->curr_token = f->tokens[++f->curr_token_index];
-		return true;
+gb_internal Token tokenize_next(AstFile *f) {
+	Token token = {};
+	tokenizer_get_token(&f->tokenizer, &token);
+	f->token_count += 1;
+	if (token.kind == Token_Invalid) {
+		f->invalid_token_pos = token.pos;
+		syntax_error(token.pos, "Failed to parse file: %.*s; invalid token found in file", LIT(f->fullpath));
+		begin_error_mute();
+		token.kind = Token_EOF;
 	}
-	syntax_error(f->curr_token, "Token is EOF");
-	return false;
+	return token;
+}
+
+gb_internal bool next_token0(AstFile *f) {
+	if (f->curr_token.kind == Token_EOF) {
+		syntax_error(f->curr_token, "Token is EOF");
+		return false;
+	}
+	f->curr_token_index += 1;
+	if (f->lookahead_index < f->lookahead.count) {
+		f->curr_token = f->lookahead[f->lookahead_index++];
+		if (f->lookahead_index == f->lookahead.count) {
+			array_clear(&f->lookahead);
+			f->lookahead_index = 0;
+		}
+	} else {
+		f->curr_token = tokenize_next(f);
+	}
+	return true;
 }
 
 
@@ -1665,7 +1687,6 @@ gb_internal Token advance_token(AstFile *f) {
 	f->lead_comment = nullptr;
 	f->line_comment = nullptr;
 
-	f->prev_token_index = f->curr_token_index;
 	Token prev = f->prev_token = f->curr_token;
 
 	bool ok = next_token0(f);
@@ -1688,30 +1709,40 @@ gb_internal Token advance_token(AstFile *f) {
 }
 
 
-gb_internal Token peek_token(AstFile *f) {
-	for (isize i = f->curr_token_index+1; i < f->tokens.count; i++) {
-		Token tok = f->tokens[i];
+gb_internal Token peek_token_n(AstFile *f, isize n) {
+	if (f->curr_token.kind == Token_EOF) {
+		return {};
+	}
+	for (isize i = f->lookahead_index; /**/; i++) {
+		if (i == f->lookahead.count) {
+			array_add(&f->lookahead, tokenize_next(f));
+		}
+		Token tok = f->lookahead[i];
 		if (tok.kind == Token_Comment) {
 			continue;
 		}
-		return tok;
+		if (n-- == 0) {
+			return tok;
+		}
+		if (tok.kind == Token_EOF) {
+			return {};
+		}
 	}
-	return {};
 }
 
-gb_internal Token peek_token_n(AstFile *f, isize n) {
-	Token found = {};
-	for (isize i = f->curr_token_index+1; i < f->tokens.count; i++) {
-		Token tok = f->tokens[i];
-		if (tok.kind == Token_Comment) {
-			continue;
-		}
-		found = tok;
-		if (n-- == 0) {
-			return found;
-		}
+gb_internal Token peek_token(AstFile *f) {
+	return peek_token_n(f, 0);
+}
+
+// the next token, even if it is a comment
+gb_internal Token peek_raw_token(AstFile *f) {
+	if (f->curr_token.kind == Token_EOF) {
+		return f->curr_token;
 	}
-	return {};
+	if (f->lookahead_index == f->lookahead.count) {
+		array_add(&f->lookahead, tokenize_next(f));
+	}
+	return f->lookahead[f->lookahead_index];
 }
 
 
@@ -1778,6 +1809,9 @@ gb_internal Token expect_token(AstFile *f, TokenKind kind) {
 		end_error_block();
 
 		if (prev.kind == Token_EOF) {
+			if (f->invalid_token_pos.line != 0) {
+				end_error_mute();
+			}
 			exit_with_errors();
 		}
 	}
@@ -1827,6 +1861,18 @@ gb_internal bool is_token_range(Token tok) {
 }
 
 
+gb_internal void add_token_edit(AstFile *f, Token token, u8 flag) {
+	if (f->token_edits.count > 0) {
+		Token *last = &f->token_edits[f->token_edits.count-1];
+		if (last->pos.offset == token.pos.offset) {
+			last->flags |= flag;
+			return;
+		}
+	}
+	token.flags |= flag;
+	array_add(&f->token_edits, token);
+}
+
 gb_internal Token expect_operator(AstFile *f) {
 	Token prev = f->curr_token;
 	if ((prev.kind == Token_in || prev.kind == Token_not_in) && (f->expr_level >= 0 || f->allow_in_expr)) {
@@ -1847,7 +1893,7 @@ gb_internal Token expect_operator(AstFile *f) {
 	}
 	if (prev.kind == Token_Ellipsis) {
 		syntax_error(prev, "'..' for ranges are not allowed, did you mean '..<' or '..='?");
-		f->tokens[f->curr_token_index].flags |= TokenFlag_Replace;
+		add_token_edit(f, prev, TokenFlag_Replace);
 	}
 
 	advance_token(f);
@@ -1962,8 +2008,8 @@ gb_internal Token expect_closing(AstFile *f, TokenKind kind, String const &conte
 
 gb_internal void assign_removal_flag_to_semicolon(AstFile *f) {
 	// NOTE(bill): this is used for rewriting files to strip unneeded semicolons
-	Token *prev_token = &f->tokens[f->prev_token_index];
-	Token *curr_token = &f->tokens[f->curr_token_index];
+	Token const *prev_token = &f->prev_token;
+	Token const *curr_token = &f->curr_token;
 	GB_ASSERT(prev_token->kind == Token_Semicolon);
 	if (prev_token->string != ";") {
 		return;
@@ -1987,7 +2033,7 @@ gb_internal void assign_removal_flag_to_semicolon(AstFile *f) {
 	if (is_strict_style(f) || (ast_file_vet_flags(f) & VetFlag_Semicolon)) {
 		syntax_error(*prev_token, "Found unneeded semicolon");
 	}
-	prev_token->flags |= TokenFlag_Remove;
+	add_token_edit(f, *prev_token, TokenFlag_Remove);
 }
 
 gb_internal void expect_semicolon(AstFile *f) {
@@ -2262,11 +2308,7 @@ gb_internal Ast *convert_stmt_to_expr(AstFile *f, Ast *statement, String const &
 	}
 
 	syntax_error(f->curr_token, "Expected '%.*s', found a simple statement.", LIT(kind));
-	Token end = f->curr_token;
-	if (f->tokens.count < f->curr_token_index) {
-		end = f->tokens[f->curr_token_index+1];
-	}
-	return ast_bad_expr(f, f->curr_token, end);
+	return ast_bad_expr(f, f->curr_token, f->curr_token);
 }
 
 gb_internal Ast *convert_stmt_to_body(AstFile *f, Ast *stmt) {
@@ -5471,7 +5513,7 @@ if_else_chain:;
 			break;
 		default:
 			syntax_error(f->curr_token, "Expected if statement block statement");
-			else_stmt = ast_bad_stmt(f, f->curr_token, f->tokens[f->curr_token_index+1]);
+			else_stmt = ast_bad_stmt(f, f->curr_token, peek_raw_token(f));
 			break;
 		}
 	}
@@ -5529,7 +5571,7 @@ gb_internal Ast *parse_when_stmt(AstFile *f) {
 		} break;
 		default:
 			syntax_error(f->curr_token, "Expected when statement block statement");
-			else_stmt = ast_bad_stmt(f, f->curr_token, f->tokens[f->curr_token_index+1]);
+			else_stmt = ast_bad_stmt(f, f->curr_token, peek_raw_token(f));
 			break;
 		}
 	}
@@ -6357,7 +6399,7 @@ gb_internal Array<Ast *> parse_stmt_list(AstFile *f) {
 }
 
 
-gb_internal ParseFileError init_ast_file(AstFile *f, String const &fullpath, TokenPos *err_pos) {
+gb_internal ParseFileError init_ast_file(AstFile *f, String const &fullpath) {
 	GB_ASSERT(f != nullptr);
 	f->fullpath  = string_trim_whitespace(fullpath); // Just in case
 	f->filename  = remove_directory_from_path(f->fullpath);
@@ -6387,51 +6429,23 @@ gb_internal ParseFileError init_ast_file(AstFile *f, String const &fullpath, Tok
 
 	}
 
-	isize file_size = f->tokenizer.end - f->tokenizer.start;
-
-	// NOTE(bill): Determine allocation size required for tokens
-	isize token_cap = file_size/3ll;
-	isize pow2_cap = gb_max(cast(isize)prev_pow2(cast(i64)token_cap)/2, 16);
-	token_cap = ((token_cap + pow2_cap-1)/pow2_cap) * pow2_cap;
-
-	isize init_token_cap = gb_max(token_cap, 16);
-	array_init(&f->tokens, ast_allocator(f), 0, gb_max(init_token_cap, 16));
+	array_init(&f->lookahead,   ast_allocator(f), 0, 4);
+	array_init(&f->token_edits, ast_allocator(f), 0, 0);
+	array_init(&f->comments,    ast_allocator(f), 0, 0);
+	array_init(&f->imports,     ast_allocator(f), 0, 0);
 
 	if (err == TokenizerInit_Empty) {
 		Token token = {Token_EOF};
 		token.pos.file_id = f->id;
 		token.pos.line    = 1;
 		token.pos.column  = 1;
-		array_add(&f->tokens, token);
+		f->token_count = 1;
+		f->first_token = f->prev_token = f->curr_token = token;
 		return ParseFile_None;
 	}
 
-	u64 start = time_stamp_time_now();
-
-	for (;;) {
-		Token *token = array_add_and_get(&f->tokens);
-		tokenizer_get_token(&f->tokenizer, token);
-		if (token->kind == Token_Invalid) {
-			err_pos->line   = token->pos.line;
-			err_pos->column = token->pos.column;
-			return ParseFile_InvalidToken;
-		}
-
-		if (token->kind == Token_EOF) {
-			break;
-		}
-	}
-
-	u64 end = time_stamp_time_now();
-	f->time_to_tokenize = cast(f64)(end-start)/cast(f64)time_stamp__freq();
-
-	f->prev_token_index = 0;
 	f->curr_token_index = 0;
-	f->prev_token = f->tokens[f->prev_token_index];
-	f->curr_token = f->tokens[f->curr_token_index];
-
-	array_init(&f->comments, ast_allocator(f), 0, 0);
-	array_init(&f->imports,  ast_allocator(f), 0, 0);
+	f->first_token = f->prev_token = f->curr_token = tokenize_next(f);
 
 	f->curr_proc = nullptr;
 
@@ -6440,7 +6454,8 @@ gb_internal ParseFileError init_ast_file(AstFile *f, String const &fullpath, Tok
 
 gb_internal void destroy_ast_file(AstFile *f) {
 	GB_ASSERT(f != nullptr);
-	array_free(&f->tokens);
+	array_free(&f->lookahead);
+	array_free(&f->token_edits);
 	array_free(&f->comments);
 	array_free(&f->imports);
 }
@@ -7473,11 +7488,8 @@ gb_internal bool parse_file_tag(const String &lc, const Token &tok, AstFile *f)
 }
 
 gb_internal bool parse_file(Parser *p, AstFile *f) {
-	if (f->tokens.count == 0) {
-		return true;
-	}
-	if (f->tokens.count > 0 && f->tokens[0].kind == Token_EOF) {
-		return true;
+	if (f->first_token.kind == Token_EOF) {
+		return f->invalid_token_pos.line == 0;
 	}
 
 	u64 start = time_stamp_time_now();
@@ -7604,9 +7616,7 @@ gb_internal ParseFileError process_imported_file(Parser *p, ImportedFile importe
 	AstFile *file = permanent_alloc_item<AstFile>();
 	file->pkg = pkg;
 	file->id = cast(i32)(imported_file.index+1);
-	TokenPos err_pos = {0};
-	ParseFileError err = init_ast_file(file, fi.fullpath, &err_pos);
-	err_pos.file_id = file->id;
+	ParseFileError err = init_ast_file(file, fi.fullpath);
 	file->last_error = err;
 
 	if (err != ParseFile_None) {
@@ -7629,9 +7639,6 @@ gb_internal ParseFileError process_imported_file(Parser *p, ImportedFile importe
 			case ParseFile_NotFound:
 				syntax_error(pos, "Failed to parse file: %.*s; file cannot be found ('%.*s')", LIT(fi.name), LIT(fi.fullpath));
 				break;
-			case ParseFile_InvalidToken:
-				syntax_error(err_pos, "Failed to parse file: %.*s; invalid token found in file", LIT(fi.name));
-				break;
 			case ParseFile_EmptyFile:
 				syntax_error(pos, "Failed to parse file: %.*s; file contains no tokens", LIT(fi.name));
 				break;
@@ -7660,7 +7667,14 @@ gb_internal ParseFileError process_imported_file(Parser *p, ImportedFile importe
 	}
 
 
-	if (parse_file(p, file)) {
+	bool parsed = parse_file(p, file);
+	if (file->invalid_token_pos.line != 0) {
+		end_error_mute();
+		file->last_error = ParseFile_InvalidToken;
+		return ParseFile_InvalidToken;
+	}
+
+	if (parsed) {
 		MUTEX_GUARD_BLOCK(&pkg->files_mutex) {
 			array_add(&pkg->files, file);
 		}
@@ -7669,7 +7683,7 @@ gb_internal ParseFileError process_imported_file(Parser *p, ImportedFile importe
 		if (pkg->name.len == 0) {
 			pkg->name = file->package_name;
 		} else if (pkg->name != file->package_name) {
-			if (file->tokens.count > 0 && file->tokens[0].kind != Token_EOF) {
+			if (file->first_token.kind != Token_EOF) {
 				Token tok = file->package_token;
 				tok.pos.file_id = file->id;
 				tok.pos.line = gb_max(tok.pos.line, 1);
@@ -7683,7 +7697,7 @@ gb_internal ParseFileError process_imported_file(Parser *p, ImportedFile importe
 		mutex_unlock(&pkg->name_mutex);
 
 		p->total_line_count.fetch_add(file->tokenizer.line_count);
-		p->total_token_count.fetch_add(file->tokens.count);
+		p->total_token_count.fetch_add(file->token_count);
 	}
 
 	return ParseFile_None;
diff --git a/src/parser.hpp b/src/parser.hpp
index d1988f89b..1f5869883 100644
--- a/src/parser.hpp
+++ b/src/parser.hpp
@@ -118,11 +118,15 @@ struct AstFile {
 	String       directory;
 
 	Tokenizer    tokenizer;
-	Array<Token> tokens;
+	Array<Token> lookahead; // read by peeking, before the parser reaches them
+	isize        lookahead_index;
+	isize        token_count;
 	isize        curr_token_index;
-	isize        prev_token_index;
+	Token        first_token;
 	Token        curr_token;
 	Token        prev_token; // previous non-comment
+	TokenPos     invalid_token_pos;
+	Array<Token> token_edits; // for `-strip-semicolon`
 	Token        package_token;
 	String       package_name;
 
@@ -151,8 +155,7 @@ struct AstFile {
 	Ast *          curr_proc;
 	isize          error_count;
 	ParseFileError last_error;
-	f64            time_to_tokenize; // seconds
-	f64            time_to_parse;    // seconds
+	f64            time_to_parse;    // seconds, including tokenizing
 
 	CommentGroup *lead_comment;     // Comment (block) before the decl
 	CommentGroup *line_comment;     // Comment after the semicolon

From 70f67677767598685239c71a1f4c094e9ce06e35 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 16:15:59 +0100
Subject: [PATCH 177/215] Make `lb_map_set_proc_for_type` prefer to go through
 the runtime for unoptimized builds

---
 base/runtime/dynamic_map_internal.odin |  2 +-
 src/llvm_backend.cpp                   | 29 ++++++++++++++++----------
 2 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/base/runtime/dynamic_map_internal.odin b/base/runtime/dynamic_map_internal.odin
index b7dc2e1b9..ed644e101 100644
--- a/base/runtime/dynamic_map_internal.odin
+++ b/base/runtime/dynamic_map_internal.odin
@@ -205,7 +205,7 @@ map_hash_is_empty :: #force_inline proc "contextless" (hash: Map_Hash) -> bool {
 }
 
 @(require_results)
-map_hash_is_deleted :: #force_no_inline proc "contextless" (hash: Map_Hash) -> bool {
+map_hash_is_deleted :: #force_inline proc "contextless" (hash: Map_Hash) -> bool {
 	// The MSB indicates a tombstone
 	return hash & TOMBSTONE_MASK != 0
 }
diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 720e6fba8..17bfb4b0c 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -922,14 +922,12 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 	lbBlock *insert_block     = lb_create_block(p, "insert");
 	lbBlock *check_has_grown_block = lb_create_block(p, "check-has-grown");
 	lbBlock *rehash_block     = lb_create_block(p, "rehash");
-	lbBlock *slot_block       = lb_create_block(p, "slot");
-	lbBlock *slot_loop_block  = lb_create_block(p, "slot-loop");
-	lbBlock *slot_used_block  = lb_create_block(p, "slot-used");
-	lbBlock *slot_probe_block = lb_create_block(p, "slot-probe");
-	lbBlock *slot_next_block  = lb_create_block(p, "slot-next");
-	lbBlock *place_block      = lb_create_block(p, "place");
-	lbBlock *scan_block       = lb_create_block(p, "scan");
-	lbBlock *displace_block   = lb_create_block(p, "displace");
+
+	// NOTE(bill): Unoptimized builds always insert through the runtime, keeping the code for each map type small
+	lbBlock *slot_block = nullptr;
+	if (build_context.optimization_level >= OptimizationLevel_Size) {
+		slot_block = lb_create_block(p, "slot");
+	}
 
 	lb_emit_if(p, lb_emit_comp_against_nil(p, Token_NotEq, found_ptr), found_block, check_grow_block);
 	lb_start_block(p, found_block);
@@ -961,7 +959,7 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 
 		lb_start_block(p, check_has_grown_block);
 
-		lb_emit_if(p, has_grown, rehash_block, slot_block);
+		lb_emit_if(p, has_grown, rehash_block, slot_block != nullptr ? slot_block : insert_block);
 		lb_start_block(p, rehash_block);
 		lbValue key = lb_emit_load(p, key_ptr);
 		lbValue new_hash = lb_gen_map_key_hash(p, map_ptr, key, nullptr);
@@ -970,8 +968,17 @@ gb_internal lbValue lb_map_set_proc_for_type(lbModule *m, Type *type) {
 		lb_emit_jump(p, insert_block);
 	}
 
-	lb_start_block(p, slot_block);
-	{
+	if (slot_block != nullptr) {
+		lbBlock *slot_loop_block  = lb_create_block(p, "slot-loop");
+		lbBlock *slot_used_block  = lb_create_block(p, "slot-used");
+		lbBlock *slot_probe_block = lb_create_block(p, "slot-probe");
+		lbBlock *slot_next_block  = lb_create_block(p, "slot-next");
+		lbBlock *place_block      = lb_create_block(p, "place");
+		lbBlock *scan_block       = lb_create_block(p, "scan");
+		lbBlock *displace_block   = lb_create_block(p, "displace");
+
+		lb_start_block(p, slot_block);
+
 		lbValue map = lb_emit_load(p, lb_emit_conv(p, map_ptr, t_raw_map_ptr));
 		lbMapKVH kvh = lb_map_kvh_data_static(p, type, map);
 		lbValue h = lb_addr_load(p, hash_addr);

From 3bd53e2a80c2ed728276b5696a9655ed0878f56c Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 16:26:58 +0100
Subject: [PATCH 178/215] Improve the parsing for tokenizing + parsing speeds
 under `-show-more-timings -show-debug-messages`

---
 src/main.cpp    | 164 +++++++++++++++++++++++++++++++++++++-----------
 src/parser.cpp  |  28 ++++++++-
 src/parser.hpp  |  10 ++-
 src/timings.cpp |  35 +++++++++++
 4 files changed, 197 insertions(+), 40 deletions(-)

diff --git a/src/main.cpp b/src/main.cpp
index b541dc0aa..29fcfc899 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -2383,6 +2383,132 @@ gb_internal void show_import_graph(Checker *c) {
 	gb_printf("}\n\n");
 }
 
+gb_internal void add_time_to_tokenize_only(AstFile *f, f64 *time, u64 *cpu_time) {
+	isize size = f->tokenizer.end - f->tokenizer.start;
+	if (size <= 0) {
+		return;
+	}
+	Tokenizer t = {};
+	t.curr_file_id = f->id;
+	init_tokenizer_with_data(&t, f->fullpath, f->tokenizer.start, size);
+
+	u64 start     = time_stamp_time_now();
+	u64 cpu_start = thread_cpu_time_now();
+	Token token = {};
+	do {
+		tokenizer_get_token(&t, &token);
+	} while (token.kind != Token_EOF && token.kind != Token_Invalid);
+	*cpu_time += thread_cpu_time_now()-cpu_start;
+	*time     += cast(f64)(time_stamp_time_now()-start)/cast(f64)time_stamp__freq();
+}
+
+gb_internal GB_COMPARE_PROC(file_cpu_time_to_parse_cmp) {
+	AstFile *x = *(AstFile **)a;
+	AstFile *y = *(AstFile **)b;
+	if (x->cpu_time_to_parse != y->cpu_time_to_parse) {
+		return x->cpu_time_to_parse > y->cpu_time_to_parse ? -1 : +1;
+	}
+	return string_compare(x->fullpath, y->fullpath);
+}
+
+gb_internal void show_parse_timings(Parser *p, Timings *t) {
+	auto all_files = array_make<AstFile *>(heap_allocator(), 0, p->packages.count*8);
+	defer (array_free(&all_files));
+	for (AstPackage *pkg : p->packages) {
+		for (AstFile *file : pkg->files) {
+			array_add(&all_files, file);
+		}
+	}
+
+	f64 cpu_freq = thread_cpu_time_freq();
+
+	isize tokens = p->total_token_count;
+	isize lines  = p->total_line_count;
+	isize total_file_size = 0;
+
+	f64 load_time          = 0;
+	f64 load_cpu_time      = 0;
+	f64 parse_time         = 0;
+	f64 parse_cpu_time     = 0;
+	f64 setup_time         = 0;
+	f64 setup_cpu_time     = 0;
+	f64 tokenize_time      = 0;
+	u64 tokenize_cpu_ticks = 0;
+
+	for (AstFile *file : all_files) {
+		total_file_size += file->tokenizer.end - file->tokenizer.start;
+		load_time       += file->time_to_load;
+		parse_time      += file->time_to_parse;
+		setup_time      += file->time_to_setup_decls;
+		load_cpu_time   += cast(f64)file->cpu_time_to_load/cpu_freq;
+		parse_cpu_time  += cast(f64)file->cpu_time_to_parse/cpu_freq;
+		setup_cpu_time  += cast(f64)file->cpu_time_to_setup_decls/cpu_freq;
+
+		add_time_to_tokenize_only(file, &tokenize_time, &tokenize_cpu_ticks);
+	}
+
+	f64 tokenize_cpu_time = cast(f64)tokenize_cpu_ticks/cpu_freq;
+
+	f64 wall_time = 0;
+	for (TimeStamp const &s : t->sections) {
+		if (s.label == "parse files") {
+			wall_time = time_stamp_as_s(s, t->freq);
+			break;
+		}
+	}
+
+	isize thread_count = gb_max(global_thread_pool.threads.count, 1);
+	f64 task_time     = load_time + parse_time + setup_time;
+	f64 task_cpu_time = load_cpu_time + parse_cpu_time + setup_cpu_time;
+	f64 mib = cast(f64)total_file_size/(1024.0*1024.0);
+
+	auto const &row = [&](char const *label, f64 time, f64 cpu_time, bool rates) {
+		gb_printf_err("    %s - %9.3f ms  %9.3f ms", label, 1.0e3*time, 1.0e3*cpu_time);
+		if (rates) {
+			f64 lines_per_second = cast(f64)lines/cpu_time;
+			char const *loc = "  LOC/s";
+			if (lines_per_second >= 1.0e6) {
+				lines_per_second /= 1.0e6;
+				loc = " MLOC/s";
+			} else if (lines_per_second >= 1.0e3) {
+				lines_per_second /= 1.0e3;
+				loc = " kLOC/s";
+			}
+			gb_printf_err("  %7.3f us/token  %7.3f us/line  %8.2f MiB/s  %7.2f%s",
+			              1.0e6*cpu_time/cast(f64)tokens, 1.0e6*cpu_time/cast(f64)lines, mib/cpu_time, lines_per_second, loc);
+		}
+		gb_printf_err("\n");
+	};
+
+	gb_printf_err("Parsing (%td files, %td lines, %td tokens, %.2f MiB, %td threads)\n", all_files.count, lines, tokens, mib, thread_count);
+	gb_printf_err("    parse files                      - %9.3f ms (wall time)\n", 1.0e3*wall_time);
+	gb_printf_err("                                         wall time   CPU time  (rates from the CPU time)\n");
+	row(          "file tasks                      ", task_time, task_cpu_time, false);
+	row(          "  loading files                 ", load_time, load_cpu_time, false);
+	row(          "  tokenizing and parsing        ", parse_time, parse_cpu_time, true);
+	row(          "  setting up decls and imports  ", setup_time, setup_cpu_time, false);
+	row(          "tokenizing alone, 1 thread      ", tokenize_time, tokenize_cpu_time, true);
+	if (build_context.thread_count == 1) {
+		row(      "parsing alone (estimated)       ", parse_time-tokenize_time, parse_cpu_time-tokenize_cpu_time, true);
+	} else {
+		gb_printf_err("    parsing alone                    - estimated with -thread-count:1\n");
+	}
+	gb_printf_err("    the file tasks kept the threads %.0f%% busy and %.0f%% of their time was spent running\n",
+	              100.0*task_time/(wall_time*cast(f64)thread_count), 100.0*task_cpu_time/task_time);
+	gb_printf_err("\n");
+
+	array_sort(all_files, file_cpu_time_to_parse_cmp);
+	gb_printf_err("Slowest files to tokenize and parse, by CPU time\n");
+	for (isize i = 0; i < gb_min(all_files.count, 8); i++) {
+		AstFile *file = all_files[i];
+		f64 cpu_time = cast(f64)file->cpu_time_to_parse/cpu_freq;
+		gb_printf_err("    %9.3f ms  %9.3f ms (wall)  %8td tokens  %7.3f us/token  %.*s\n",
+		              1.0e3*cpu_time, 1.0e3*file->time_to_parse, file->token_count,
+		              1.0e6*cpu_time/cast(f64)gb_max(file->token_count, 1), LIT(file->fullpath));
+	}
+	gb_printf_err("\n");
+}
+
 gb_internal void show_timings(Checker *c, Timings *t) {
 	Parser *p      = c->parser;
 	isize lines    = p->total_line_count;
@@ -2390,11 +2516,9 @@ gb_internal void show_timings(Checker *c, Timings *t) {
 	isize files    = 0;
 	isize packages = p->packages.count;
 	isize total_file_size = 0;
-	f64 total_parsing_time = 0;
 	for (AstPackage *pkg : p->packages) {
 		files += pkg->files.count;
 		for (AstFile *file : pkg->files) {
-			total_parsing_time += file->time_to_parse;
 			total_file_size += file->tokenizer.end - file->tokenizer.start;
 		}
 	}
@@ -2417,41 +2541,7 @@ gb_internal void show_timings(Checker *c, Timings *t) {
 			gb_printf_err("Total File Size - %td\n", total_file_size);
 			gb_printf_err("\n");
 		}
-		{
-			f64 time = total_parsing_time;
-			gb_printf_err("Tokenizing and Parsing Only\n");
-			gb_printf_err("LOC/s        - %.3f\n", cast(f64)lines/time);
-			gb_printf_err("us/LOC       - %.3f\n", 1.0e6*time/cast(f64)lines);
-			gb_printf_err("Tokens/s     - %.3f\n", cast(f64)tokens/time);
-			gb_printf_err("us/Token     - %.3f\n", 1.0e6*time/cast(f64)tokens);
-			gb_printf_err("bytes/s      - %.3f\n", cast(f64)total_file_size/time);
-			gb_printf_err("MiB/s        - %.3f\n", cast(f64)(total_file_size/time)/(1024*1024));
-			gb_printf_err("us/bytes     - %.3f\n", 1.0e6*time/cast(f64)total_file_size);
-
-			gb_printf_err("\n");
-		}
-		{
-			TimeStamp ts = {};
-			for (TimeStamp const &s : t->sections) {
-				if (s.label == "parse files") {
-					ts = s;
-					break;
-				}
-			}
-			GB_ASSERT(ts.label == "parse files");
-
-			f64 parse_time = time_stamp_as_s(ts, t->freq);
-			gb_printf_err("Parse pass\n");
-			gb_printf_err("LOC/s        - %.3f\n", cast(f64)lines/parse_time);
-			gb_printf_err("us/LOC       - %.3f\n", 1.0e6*parse_time/cast(f64)lines);
-			gb_printf_err("Tokens/s     - %.3f\n", cast(f64)tokens/parse_time);
-			gb_printf_err("us/Token     - %.3f\n", 1.0e6*parse_time/cast(f64)tokens);
-			gb_printf_err("bytes/s      - %.3f\n", cast(f64)total_file_size/parse_time);
-			gb_printf_err("MiB/s        - %.3f\n", cast(f64)(total_file_size/parse_time)/(1024*1024));
-			gb_printf_err("us/bytes     - %.3f\n", 1.0e6*parse_time/cast(f64)total_file_size);
-
-			gb_printf_err("\n");
-		}
+		show_parse_timings(p, t);
 		{
 			TimeStamp ts = {};
 			TimeStamp ts_end = {};
diff --git a/src/parser.cpp b/src/parser.cpp
index 31561f39c..5b8329ba6 100644
--- a/src/parser.cpp
+++ b/src/parser.cpp
@@ -6399,6 +6399,15 @@ gb_internal Array<Ast *> parse_stmt_list(AstFile *f) {
 }
 
 
+// Only the report of `-show-more-timings -show-debug-messages` uses a file's CPU time,
+// and getting a thread's CPU time is a system call
+gb_internal u64 parse_thread_cpu_time_now(void) {
+	if (build_context.show_debug_messages && build_context.show_more_timings) {
+		return thread_cpu_time_now();
+	}
+	return 0;
+}
+
 gb_internal ParseFileError init_ast_file(AstFile *f, String const &fullpath) {
 	GB_ASSERT(f != nullptr);
 	f->fullpath  = string_trim_whitespace(fullpath); // Just in case
@@ -6412,7 +6421,11 @@ gb_internal ParseFileError init_ast_file(AstFile *f, String const &fullpath) {
 	gb_zero_item(&f->tokenizer);
 	f->tokenizer.curr_file_id = f->id;
 
+	u64 load_start     = time_stamp_time_now();
+	u64 load_cpu_start = parse_thread_cpu_time_now();
 	TokenizerInitError err = init_tokenizer_from_fullpath(&f->tokenizer, f->fullpath, build_context.copy_file_contents);
+	f->cpu_time_to_load = parse_thread_cpu_time_now()-load_cpu_start;
+	f->time_to_load     = cast(f64)(time_stamp_time_now()-load_start)/cast(f64)time_stamp__freq();
 	if (err != TokenizerInit_None) {
 		switch (err) {
 		case TokenizerInit_Empty:
@@ -7493,6 +7506,9 @@ gb_internal bool parse_file(Parser *p, AstFile *f) {
 	}
 
 	u64 start = time_stamp_time_now();
+	u64 cpu_start = parse_thread_cpu_time_now();
+	u64 setup_start = 0;
+	u64 setup_cpu_start = 0;
 
 	String filepath = f->tokenizer.fullpath;
 	String base_dir = dir_from_path(filepath);
@@ -7593,11 +7609,19 @@ gb_internal bool parse_file(Parser *p, AstFile *f) {
 
 		f->decls = slice_from_array(decls);
 
+		setup_start     = time_stamp_time_now();
+		setup_cpu_start = parse_thread_cpu_time_now();
 		parse_setup_file_decls(p, f, base_dir, f->decls);
 	}
 
-	u64 end = time_stamp_time_now();
-	f->time_to_parse = cast(f64)(end-start)/cast(f64)time_stamp__freq();
+	u64 end     = time_stamp_time_now();
+	u64 cpu_end = parse_thread_cpu_time_now();
+	u64 setup_ticks     = setup_start     != 0 ? end-setup_start         : 0;
+	u64 setup_cpu_ticks = setup_cpu_start != 0 ? cpu_end-setup_cpu_start : 0;
+	f->time_to_parse           = cast(f64)(end-start-setup_ticks)/cast(f64)time_stamp__freq();
+	f->time_to_setup_decls     = cast(f64)setup_ticks/cast(f64)time_stamp__freq();
+	f->cpu_time_to_parse       = cpu_end-cpu_start-setup_cpu_ticks;
+	f->cpu_time_to_setup_decls = setup_cpu_ticks;
 
 	for (int i = 0; i < AstDelayQueue_COUNT; i++) {
 		array_init(f->delayed_decls_queues+i, ast_allocator(f), 0, f->delayed_decl_count);
diff --git a/src/parser.hpp b/src/parser.hpp
index 1f5869883..65d0cde3a 100644
--- a/src/parser.hpp
+++ b/src/parser.hpp
@@ -155,7 +155,6 @@ struct AstFile {
 	Ast *          curr_proc;
 	isize          error_count;
 	ParseFileError last_error;
-	f64            time_to_parse;    // seconds, including tokenizing
 
 	CommentGroup *lead_comment;     // Comment (block) before the decl
 	CommentGroup *line_comment;     // Comment after the semicolon
@@ -173,6 +172,15 @@ struct AstFile {
 
 	struct LLVMOpaqueMetadata *llvm_metadata;
 	struct LLVMOpaqueMetadata *llvm_metadata_scope;
+
+	//// Profiling /////
+
+	f64            time_to_load;        // seconds
+	f64            time_to_parse;       // seconds, tokenizing included, setting up the decls excluded
+	f64            time_to_setup_decls; // seconds, mostly finding and adding the imported packages
+	u64            cpu_time_to_load;
+	u64            cpu_time_to_parse;
+	u64            cpu_time_to_setup_decls;
 };
 
 enum AstForeignFileKind {
diff --git a/src/timings.cpp b/src/timings.cpp
index f6e86867f..f1d6e5eb3 100644
--- a/src/timings.cpp
+++ b/src/timings.cpp
@@ -32,6 +32,7 @@ gb_internal u64 win32_time_stamp__freq(void) {
 #elif defined(GB_SYSTEM_OSX)
 
 #include <mach/mach_time.h>
+#include <time.h>
 
 gb_internal mach_timebase_info_data_t osx_init_timebase_info(void) {
 	mach_timebase_info_data_t data;
@@ -105,6 +106,40 @@ gb_internal u64 time_stamp__freq(void) {
 #endif
 }
 
+gb_internal u64 thread_cpu_time_now(void) {
+#if defined(GB_SYSTEM_WINDOWS)
+	ULONG64 cycles = 0;
+	QueryThreadCycleTime(GetCurrentThread(), &cycles);
+	return cycles;
+#else
+	struct timespec ts;
+	clock_gettime(CLOCK_THREAD_CPUTIME_ID, &ts);
+	return (cast(u64)ts.tv_sec * 1000000000ull) + cast(u64)ts.tv_nsec;
+#endif
+}
+
+gb_internal f64 thread_cpu_time_freq(void) {
+#if defined(GB_SYSTEM_WINDOWS)
+	gb_local_persist f64 freq = 0;
+	if (freq == 0) {
+		for (isize i = 0; i < 5; i++) {
+			u64 start = time_stamp_time_now();
+			u64 start_cycles = thread_cpu_time_now();
+			u64 end = start;
+			while (end-start < time_stamp__freq()/100) {
+				end = time_stamp_time_now();
+			}
+			u64 end_cycles = thread_cpu_time_now();
+			f64 measured = cast(f64)(end_cycles-start_cycles) * cast(f64)time_stamp__freq() / cast(f64)(end-start);
+			freq = gb_max(freq, measured);
+		}
+	}
+	return freq;
+#else
+	return 1.0e9;
+#endif
+}
+
 gb_internal TimeStamp make_time_stamp(String const &label) {
 	TimeStamp ts = {0};
 	ts.start = time_stamp_time_now();

From 93e160582ce774ca4e4770e0590e9a6d24e39874 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 16:41:48 +0100
Subject: [PATCH 179/215] Pass a copy of a value within a packed struct to a
 procedure by reference when its address is not known to be aligned to its
 type, and lower the alignment of loads and stores to that known from the GEPs
 leading to their address

---
 src/llvm_backend_general.cpp                  | 92 ++++++++++++++++++-
 src/llvm_backend_utility.cpp                  | 12 ++-
 tests/issues/run.bat                          |  1 +
 tests/issues/run.sh                           |  1 +
 .../test_issue_packed_field_by_value.odin     | 31 +++++++
 5 files changed, 132 insertions(+), 5 deletions(-)
 create mode 100644 tests/issues/test_issue_packed_field_by_value.odin

diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 9687fd49c..d54eeee0e 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -1120,6 +1120,86 @@ gb_internal bool lb_try_vector_cast(lbModule *m, lbValue ptr, LLVMTypeRef *vecto
 	return false;
 }
 
+gb_internal u64 lb_gcd_u64(u64 a, u64 b) {
+	while (b != 0) {
+		u64 t = a % b;
+		a = b;
+		b = t;
+	}
+	return a;
+}
+
+gb_internal u64 lb_known_address_alignment(lbModule *m, LLVMValueRef ptr, u64 assumed) {
+	// NOTE(bill): The alignment an address is known to have from the GEPs leading to it: within a local or a global, that
+	// of its offset from it, and none beyond a field of a packed struct, or that a struct caps its fields to, as marked on
+	// the GEP of the field. Of an address within anything else, it is `assumed`, i.e. that of the type it points to.
+
+	LLVMTargetDataRef td = LLVMGetModuleDataLayout(m->mod);
+	u64 offsets = 0;
+	for (isize depth = 0; ptr != nullptr && depth < 64; depth++) {
+		if (LLVMIsAAllocaInst(ptr) || LLVMIsAGlobalVariable(ptr)) {
+			u64 base = LLVMGetAlignment(ptr);
+			if (base == 0) {
+				base = LLVMABIAlignmentOfType(td, LLVMIsAAllocaInst(ptr) ? LLVMGetAllocatedType(ptr) : LLVMGlobalGetValueType(ptr));
+			}
+			return offsets ? lb_gcd_u64(base, offsets) : base;
+		}
+
+		bool is_instruction = LLVMIsAGetElementPtrInst(ptr) != nullptr;
+		if (!is_instruction && !(LLVMIsAConstantExpr(ptr) && LLVMGetConstOpcode(ptr) == LLVMGetElementPtr)) {
+			break;
+		}
+		if (is_instruction) {
+			if (lb_get_metadata_custom_u64(m, ptr, ODIN_METADATA_IS_PACKED)) {
+				return 1;
+			}
+			u64 max_align = lb_get_metadata_custom_u64(m, ptr, ODIN_METADATA_MAX_ALIGN);
+			if (max_align != 0) {
+				assumed = gb_min(assumed, max_align);
+			}
+		}
+
+		LLVMTypeRef t = LLVMGetGEPSourceElementType(ptr);
+		unsigned index_count = LLVMGetNumIndices(ptr);
+		for (unsigned i = 0; i < index_count; i++) {
+			LLVMValueRef index = LLVMGetOperand(ptr, i+1);
+			u64 stride = 0;
+			if (i == 0) {
+				stride = LLVMABISizeOfType(td, t);
+			} else if (LLVMGetTypeKind(t) == LLVMStructTypeKind) {
+				if (!LLVMIsAConstantInt(index)) {
+					return 1;
+				}
+				unsigned field = cast(unsigned)LLVMConstIntGetZExtValue(index);
+				offsets = lb_gcd_u64(offsets, LLVMOffsetOfElement(td, t, field));
+				t = LLVMStructGetTypeAtIndex(t, field);
+				continue;
+			} else if (LLVMGetTypeKind(t) == LLVMArrayTypeKind || LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
+				t = LLVMGetElementType(t);
+				stride = LLVMABISizeOfType(td, t);
+			} else {
+				return 1;
+			}
+			if (LLVMIsAConstantInt(index)) {
+				i64 k = LLVMConstIntGetSExtValue(index);
+				offsets = lb_gcd_u64(offsets, cast(u64)(k < 0 ? -k : k) * stride);
+			} else {
+				offsets = lb_gcd_u64(offsets, stride);
+			}
+		}
+		ptr = LLVMGetOperand(ptr, 0);
+	}
+	return offsets ? lb_gcd_u64(assumed, offsets) : assumed;
+}
+
+gb_internal void lb_lower_store_alignment_to_known(lbProcedure *p, LLVMValueRef store, LLVMValueRef ptr) {
+	u64 align = LLVMGetAlignment(store);
+	u64 known = lb_known_address_alignment(p->module, ptr, align);
+	if (known < align) {
+		LLVMSetAlignment(store, cast(unsigned)known);
+	}
+}
+
 gb_internal LLVMValueRef OdinLLVMBuildLoad(lbProcedure *p, LLVMTypeRef type, LLVMValueRef value) {
 	LLVMValueRef result = LLVMBuildLoad2(p->builder, type, value, "");
 
@@ -1143,6 +1223,12 @@ gb_internal LLVMValueRef OdinLLVMBuildLoad(lbProcedure *p, LLVMTypeRef type, LLV
 		LLVMSetAlignment(result, (unsigned int)align);
 	}
 
+	u64 align = LLVMGetAlignment(result);
+	u64 known = lb_known_address_alignment(p->module, value, align);
+	if (known < align) {
+		LLVMSetAlignment(result, cast(unsigned)known);
+	}
+
 	return result;
 }
 
@@ -1503,7 +1589,8 @@ gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 		} else if (is_type_bit_set(a)) {
 			lb_mem_zero_ptr(p, ptr.value, a, 1);
 		} else if (lb_sizeof(src_t) <= lb_max_zero_init_size()) {
-			LLVMBuildStore(p->builder, LLVMConstNull(src_t), ptr.value);
+			LLVMValueRef store = LLVMBuildStore(p->builder, LLVMConstNull(src_t), ptr.value);
+			lb_lower_store_alignment_to_known(p, store, ptr.value);
 		} else {
 			lb_mem_zero_ptr(p, ptr.value, a, 1);
 		}
@@ -1567,6 +1654,9 @@ gb_internal void lb_emit_store(lbProcedure *p, lbValue ptr, lbValue value) {
 
 		instr = LLVMBuildStore(p->builder, value.value, ptr.value);
 	}
+	if (instr != nullptr) {
+		lb_lower_store_alignment_to_known(p, instr, ptr.value);
+	}
 	// LLVMSetVolatile(instr, p->in_multi_assignment);
 }
 
diff --git a/src/llvm_backend_utility.cpp b/src/llvm_backend_utility.cpp
index 430677aa3..3a9a74415 100644
--- a/src/llvm_backend_utility.cpp
+++ b/src/llvm_backend_utility.cpp
@@ -995,10 +995,14 @@ gb_internal lbAddr lb_find_or_generate_context_ptr(lbProcedure *p) {
 
 gb_internal lbValue lb_address_from_load_or_generate_local(lbProcedure *p, lbValue value) {
 	if (!p->in_multi_assignment && LLVMIsALoadInst(value.value)) {
-		lbValue res = {};
-		res.value = LLVMGetOperand(value.value, 0);
-		res.type = alloc_type_pointer(value.type);
-		return res;
+		LLVMValueRef ptr = LLVMGetOperand(value.value, 0);
+		u64 align = cast(u64)type_align_of(value.type);
+		if (lb_known_address_alignment(p->module, ptr, align) >= align) {
+			lbValue res = {};
+			res.value = ptr;
+			res.type = alloc_type_pointer(value.type);
+			return res;
+		}
 	}
 
 	GB_ASSERT(is_type_typed(value.type));
diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 5c8dcb3fc..51c4a3661 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -89,6 +89,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin check ..\test_issue_7708_mismatch.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
 ..\..\..\odin test ..\test_issue_7700.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_procedure_of_specialized.odin %COMMON%  || exit /b
+..\..\..\odin test ..\test_issue_packed_field_by_value.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 7d22af3e7..d85867c7b 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -115,6 +115,7 @@ else
 fi
 $ODIN test ../test_issue_7700.odin $COMMON
 $ODIN test ../test_issue_procedure_of_specialized.odin $COMMON
+$ODIN test ../test_issue_packed_field_by_value.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_7421.odin $COMMON
diff --git a/tests/issues/test_issue_packed_field_by_value.odin b/tests/issues/test_issue_packed_field_by_value.odin
new file mode 100644
index 000000000..247f250a9
--- /dev/null
+++ b/tests/issues/test_issue_packed_field_by_value.odin
@@ -0,0 +1,31 @@
+// A value within a packed struct, passed to a procedure by reference, is passed by an address as aligned as its type
+package test_issues
+
+import "core:testing"
+
+Packed_Field_S :: struct { x: union { int, string }, y: u128 }
+Packed_Field_P :: struct #packed { pad: u8, s: Packed_Field_S, arr: [2]Packed_Field_S }
+
+// the address a value parameter is passed by
+packed_field_address :: proc(s: Packed_Field_S) -> uintptr {
+	a: any = s
+	return uintptr(a.data)
+}
+
+packed_field_global: Packed_Field_P
+
+@(test)
+test_packed_field_by_value :: proc(t: ^testing.T) {
+	p := Packed_Field_P{s = {x = 1, y = 2}, arr = {{x = 3}, {x = "four", y = 5}}}
+	packed_field_global = p
+
+	A :: align_of(Packed_Field_S)
+	testing.expect_value(t, packed_field_address(p.s)                        % A, 0)
+	testing.expect_value(t, packed_field_address(p.arr[1])                   % A, 0)
+	testing.expect_value(t, packed_field_address(packed_field_global.s)      % A, 0)
+	testing.expect_value(t, packed_field_address(packed_field_global.arr[1]) % A, 0)
+
+	testing.expect_value(t, p.s,                        Packed_Field_S{x = 1, y = 2})
+	testing.expect_value(t, p.arr[1],                   Packed_Field_S{x = "four", y = 5})
+	testing.expect_value(t, packed_field_global.arr[0], Packed_Field_S{x = 3})
+}

From 85f02a8304cee96cb2959584b30c2224ce951be9 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 16:50:33 +0100
Subject: [PATCH 180/215] Hash `string` and `cstring` map keys a word at a time
 with `default_hasher_fixed`

---
 base/runtime/dynamic_map_internal.odin | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/base/runtime/dynamic_map_internal.odin b/base/runtime/dynamic_map_internal.odin
index ed644e101..33078c121 100644
--- a/base/runtime/dynamic_map_internal.odin
+++ b/base/runtime/dynamic_map_internal.odin
@@ -1025,18 +1025,17 @@ default_hasher_fixed :: #force_inline proc "contextless" (data: rawptr, seed: ui
 
 default_hasher_string :: proc "contextless" (data: rawptr, seed: uintptr) -> uintptr {
 	str := (^[]byte)(data)
-	return default_hasher(raw_data(str^), seed, len(str))
+	return default_hasher_fixed(raw_data(str^), seed, len(str))
 }
 default_hasher_cstring :: proc "contextless" (data: rawptr, seed: uintptr) -> uintptr {
-	h := u64(seed) + INITIAL_HASH_SEED
-	if ptr := (^[^]byte)(data)^; ptr != nil {
-		for ptr[0] != 0 {
-			h = (h ~ u64(ptr[0])) * 0x100000001b3
-			ptr = ptr[1:]
+	ptr := (^[^]byte)(data)^
+	n := 0
+	if ptr != nil {
+		for ptr[n] != 0 {
+			n += 1
 		}
 	}
-	h &= HASH_MASK
-	return uintptr(h) | uintptr(uintptr(h) == 0)
+	return default_hasher_fixed(ptr, seed, n)
 }
 
 default_hasher_f64 :: proc "contextless" (f: f64, seed: uintptr) -> uintptr {

From 1ad14bb82452d0c273f2647f7a5f37175f2a9d48 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 17:06:42 +0100
Subject: [PATCH 181/215] Change how a map gets seeded with a folded multiply
 of the address as the seed instead

---
 base/runtime/dynamic_map_internal.odin | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/base/runtime/dynamic_map_internal.odin b/base/runtime/dynamic_map_internal.odin
index 33078c121..bd9c83f90 100644
--- a/base/runtime/dynamic_map_internal.odin
+++ b/base/runtime/dynamic_map_internal.odin
@@ -220,19 +220,14 @@ map_seed :: #force_inline proc "contextless" (m: Raw_Map) -> uintptr {
 	return map_seed_from_map_data(map_data(m))
 }
 
-// splitmix for uintptr
 @(require_results)
 map_seed_from_map_data :: #force_inline proc "contextless" (data: uintptr) -> uintptr {
 	when size_of(uintptr) == size_of(u64) {
-		mix := data + 0x9e3779b97f4a7c15
-		mix = (mix ~ (mix >> 30)) * 0xbf58476d1ce4e5b9
-		mix = (mix ~ (mix >> 27)) * 0x94d049bb133111eb
-		return mix ~ (mix >> 31)
+		p := u128(data) * 0x94d049bb133111eb
+		return uintptr(p) ~ uintptr(p >> 64)
 	} else {
-		mix := data + 0x9e3779b9
-		mix = (mix ~ (mix >> 16)) * 0x21f0aaad
-		mix = (mix ~ (mix >> 15)) * 0x735a2d97
-		return mix ~ (mix >> 15)
+		p := u64(data) * 0x735a2d97
+		return uintptr(p) ~ uintptr(p >> 32)
 	}
 }
 
@@ -1001,7 +996,7 @@ default_hasher_fixed :: #force_inline proc "contextless" (data: rawptr, seed: ui
 
 	W :: size_of(uintptr)
 	p := uintptr(data)
-	h := seed ~ uintptr(N)
+	h := uintptr(N)
 	switch {
 	case N >= W:
 		for i := 0; i+W <= N; i += W {
@@ -1018,7 +1013,8 @@ default_hasher_fixed :: #force_inline proc "contextless" (data: rawptr, seed: ui
 		b := ([^]u8)(p)
 		h = hash_fold(h ~ (uintptr(b[0]) | uintptr(b[N/2]) << 8 | uintptr(b[N-1]) << 16), HASH_K0)
 	}
-	h = hash_fold(h, HASH_K1)
+	// the seed goes in after the key is mixed, so no key pattern can line up with the difference between two maps' seeds
+	h = hash_fold(h ~ seed, HASH_K1)
 	h &= HASH_MASK
 	return h | uintptr(h == 0)
 }

From 2a57037287dcfea3174705fe7baf32f7ae2867fe Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 17:13:31 +0100
Subject: [PATCH 182/215] Add `map_erase_static` and use when compiling for
 optimizations

---
 base/runtime/core_builtin.odin         |  6 ++-
 base/runtime/dynamic_map_internal.odin | 67 ++++++++++++++++++++------
 2 files changed, 57 insertions(+), 16 deletions(-)

diff --git a/base/runtime/core_builtin.odin b/base/runtime/core_builtin.odin
index df8a36ff6..0deafea96 100644
--- a/base/runtime/core_builtin.odin
+++ b/base/runtime/core_builtin.odin
@@ -718,7 +718,11 @@ when MAP_ENABLED {
 	delete_key :: proc(m: ^$T/map[$K]$V, key: K) -> (deleted_key: K, deleted_value: V) {
 		if m != nil {
 			key := key
-			old_k, old_v, ok := map_erase_dynamic((^Raw_Map)(m), map_info(T), uintptr(&key))
+			when ODIN_OPTIMIZATION_MODE >= .Size {
+				old_k, old_v, ok := map_erase_static(m, &key)
+			} else {
+				old_k, old_v, ok := map_erase_dynamic((^Raw_Map)(m), map_info(T), uintptr(&key))
+			}
 			if ok {
 				deleted_key   = (^K)(old_k)^
 				deleted_value = (^V)(old_v)^
diff --git a/base/runtime/dynamic_map_internal.odin b/base/runtime/dynamic_map_internal.odin
index bd9c83f90..ca6d4eb11 100644
--- a/base/runtime/dynamic_map_internal.odin
+++ b/base/runtime/dynamic_map_internal.odin
@@ -689,6 +689,33 @@ map_lookup_dynamic :: #force_no_inline proc "contextless" (m: Raw_Map, #no_alias
 		d += 1
 	}
 }
+
+@(require_results)
+map_lookup_static :: #force_inline proc "contextless" (m: $T/map[$K]$V, key: ^K) -> (index: uintptr, ok: bool) {
+	rm := transmute(Raw_Map)m
+	if rm.len == 0 {
+		return
+	}
+	info := intrinsics.type_map_info(T)
+	h := info.key_hasher(key, map_seed(rm))
+	pos := map_desired_position(rm, h)
+	distance := uintptr(0)
+	mask := (uintptr(1) << map_log2_cap(rm)) - 1
+	ks, _, hs := map_kvh_data_static(m)
+	for {
+		element_hash := hs[pos]
+		if map_hash_is_empty(element_hash) {
+			return
+		} else if distance > map_probe_distance(rm, element_hash, pos) {
+			return
+		} else if element_hash == h && info.key_equal(key, rawptr(map_cell_index_static(ks, pos))) {
+			return pos, true
+		}
+		pos = (pos + 1) & mask
+		distance += 1
+	}
+}
+
 @(require_results)
 map_exists_dynamic :: #force_no_inline proc "contextless" (m: Raw_Map, #no_alias info: ^Map_Info, k: uintptr) -> (ok: bool) {
 	if map_len(m) == 0 {
@@ -719,28 +746,38 @@ map_exists_dynamic :: #force_no_inline proc "contextless" (m: Raw_Map, #no_alias
 map_erase_dynamic :: #force_no_inline proc "contextless" (#no_alias m: ^Raw_Map, #no_alias info: ^Map_Info, k: uintptr) -> (old_k, old_v: uintptr, ok: bool) {
 	index := map_lookup_dynamic(m^, info, k) or_return
 	ks, vs, hs, _, _ := map_kvh_data_dynamic(m^, info)
-	hs[index] |= TOMBSTONE_MASK
 	old_k = map_cell_index_dynamic(ks, info.ks, index)
 	old_v = map_cell_index_dynamic(vs, info.vs, index)
 	m.len -= 1
 	ok = true
-
-	mask := (uintptr(1)<<map_log2_cap(m^)) - 1
-	curr_index := uintptr(index)
-	next_index := (curr_index + 1) & mask
-
-	// if the next element is empty or has zero probe distance, then any lookup
-	// will always fail on the next, so we can clear both of them
-	hash := hs[next_index]
-	if map_hash_is_empty(hash) || map_probe_distance(m^, hash, next_index) == 0 {
-		hs[curr_index] = 0
-	} else {
-		hs[curr_index] |= TOMBSTONE_MASK
-	}
-
+	map_erase_slot(m^, hs, index)
 	return
 }
 
+@(require_results)
+map_erase_static :: #force_inline proc "contextless" (m: ^$T/map[$K]$V, key: ^K) -> (old_k, old_v: uintptr, ok: bool) {
+	index := map_lookup_static(m^, key) or_return
+	ks, vs, hs := map_kvh_data_static(m^)
+	old_k = uintptr(map_cell_index_static(ks, index))
+	old_v = uintptr(map_cell_index_static(vs, index))
+	(^Raw_Map)(m).len -= 1
+	ok = true
+	map_erase_slot((^Raw_Map)(m)^, hs, index)
+	return
+}
+
+map_erase_slot :: #force_inline proc "contextless" (m: Raw_Map, hs: [^]Map_Hash, index: uintptr) {
+	mask := (uintptr(1)<<map_log2_cap(m)) - 1
+	next_index := (index + 1) & mask
+
+	hash := hs[next_index]
+	if map_hash_is_empty(hash) || map_probe_distance(m, hash, next_index) == 0 {
+		hs[index] = 0
+	} else {
+		hs[index] |= TOMBSTONE_MASK
+	}
+}
+
 map_clear_dynamic :: #force_inline proc "contextless" (#no_alias m: ^Raw_Map, #no_alias info: ^Map_Info) {
 	if m.data == 0 {
 		return

From 27e12a53cd19ad1649259a6d1d1500f6fd2e3399 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 17:18:38 +0100
Subject: [PATCH 183/215] Inline the ASCII paths of `advance_to_next_rune`

---
 src/tokenizer.cpp | 28 ++++++++++++++++++++--------
 src/unicode.cpp   | 34 ++++++++++++++--------------------
 2 files changed, 34 insertions(+), 28 deletions(-)

diff --git a/src/tokenizer.cpp b/src/tokenizer.cpp
index 84d4d3041..d3bf23519 100644
--- a/src/tokenizer.cpp
+++ b/src/tokenizer.cpp
@@ -348,18 +348,14 @@ gb_internal void tokenizer_err(Tokenizer *t, TokenPos const &pos, char const *ms
 	t->error_count++;
 }
 
-gb_internal void advance_to_next_rune(Tokenizer *t) {
-	if (t->curr_rune == '\n') {
-		t->column_minus_one = -1;
-		t->line_count++;
-	}
+gb_internal void advance_to_next_rune_slow(Tokenizer *t) {
 	if (t->read_curr < t->end) {
 		t->curr = t->read_curr;
 		Rune rune = *t->read_curr;
 		if (rune == 0) {
 			tokenizer_err(t, "Illegal character NUL");
 			t->read_curr++;
-		} else if (rune & 0x80) { // not ASCII
+		} else { // not ASCII
 			isize width = utf8_decode(t->read_curr, t->end-t->read_curr, &rune);
 			t->read_curr += width;
 			if (rune == GB_RUNE_INVALID && width == 1) {
@@ -367,8 +363,6 @@ gb_internal void advance_to_next_rune(Tokenizer *t) {
 			} else if (rune == GB_RUNE_BOM && t->curr-t->start > 0){
 				tokenizer_err(t, "Illegal byte order mark");
 			}
-		} else {
-			t->read_curr++;
 		}
 		t->curr_rune = rune;
 		t->column_minus_one++;
@@ -378,6 +372,24 @@ gb_internal void advance_to_next_rune(Tokenizer *t) {
 	}
 }
 
+gb_internal gb_inline void advance_to_next_rune(Tokenizer *t) {
+	if (t->curr_rune == '\n') {
+		t->column_minus_one = -1;
+		t->line_count++;
+	}
+	if (t->read_curr < t->end) {
+		u8 c = *t->read_curr;
+		if (c != 0 && c < 0x80) {
+			t->curr = t->read_curr;
+			t->read_curr++;
+			t->curr_rune = c;
+			t->column_minus_one++;
+			return;
+		}
+	}
+	advance_to_next_rune_slow(t);
+}
+
 gb_internal void init_tokenizer_with_data(Tokenizer *t, String const &fullpath, void const *data, isize size) {
 	t->fullpath = fullpath;
 	t->column_minus_one = -1;
diff --git a/src/unicode.cpp b/src/unicode.cpp
index b38c6d601..98fa27b1c 100644
--- a/src/unicode.cpp
+++ b/src/unicode.cpp
@@ -12,13 +12,7 @@ extern "C" {
 #endif
 
 
-gb_internal bool rune_is_letter(Rune r) {
-	if (r < 0x80) {
-		if (r == '_') {
-			return true;
-		}
-		return ((cast(u32)r | 0x20) - 0x61) < 26;
-	}
+gb_internal bool rune_is_letter_non_ascii(Rune r) {
 	switch (utf8proc_category(r)) {
 	case UTF8PROC_CATEGORY_LU:
 	case UTF8PROC_CATEGORY_LL:
@@ -30,14 +24,24 @@ gb_internal bool rune_is_letter(Rune r) {
 	return false;
 }
 
-gb_internal bool rune_is_digit(Rune r) {
+gb_internal gb_inline bool rune_is_letter(Rune r) {
+	if (r < 0x80) {
+		if (r == '_') {
+			return true;
+		}
+		return ((cast(u32)r | 0x20) - 0x61) < 26;
+	}
+	return rune_is_letter_non_ascii(r);
+}
+
+gb_internal gb_inline bool rune_is_digit(Rune r) {
 	if (r < 0x80) {
 		return (cast(u32)r - '0') < 10;
 	}
 	return utf8proc_category(r) == UTF8PROC_CATEGORY_ND;
 }
 
-gb_internal bool rune_is_letter_or_digit(Rune r) {
+gb_internal gb_inline bool rune_is_letter_or_digit(Rune r) {
 	if (r < 0x80) {
 		if (r == '_') {
 			return true;
@@ -47,17 +51,7 @@ gb_internal bool rune_is_letter_or_digit(Rune r) {
 		}
 		return (cast(u32)r - '0') < 10;
 	}
-	switch (utf8proc_category(r)) {
-	case UTF8PROC_CATEGORY_LU:
-	case UTF8PROC_CATEGORY_LL:
-	case UTF8PROC_CATEGORY_LT:
-	case UTF8PROC_CATEGORY_LM:
-	case UTF8PROC_CATEGORY_LO:
-		return true;
-	case UTF8PROC_CATEGORY_ND:
-		return true;
-	}
-	return false;
+	return rune_is_letter_non_ascii(r) || utf8proc_category(r) == UTF8PROC_CATEGORY_ND;
 }
 
 gb_internal bool rune_is_whitespace(Rune r) {

From 9187b7acfcb7e7ec2189eb71cca74da3dc82fd87 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 17:34:16 +0100
Subject: [PATCH 184/215] Remove `map_cell_index_dynamic_const`; Re-insert
 entries directly when growing/shrinking a `map`

---
 base/runtime/dynamic_map_internal.odin | 109 +++++++++++--------------
 1 file changed, 47 insertions(+), 62 deletions(-)

diff --git a/base/runtime/dynamic_map_internal.odin b/base/runtime/dynamic_map_internal.odin
index ca6d4eb11..2e8b60f4a 100644
--- a/base/runtime/dynamic_map_internal.odin
+++ b/base/runtime/dynamic_map_internal.odin
@@ -94,17 +94,6 @@ map_cell_index_dynamic :: #force_inline proc "contextless" (base: uintptr, #no_a
 	return base + offset
 }
 
-// Same as above procedure but with compile-time constant index.
-@(require_results)
-map_cell_index_dynamic_const :: proc "contextless" (base: uintptr, #no_alias info: ^Map_Cell_Info, $INDEX: uintptr) -> uintptr {
-	elements_per_cell := uintptr(info.elements_per_cell)
-	size_of_cell      := uintptr(info.size_of_cell)
-	size_of_type      := uintptr(info.size_of_type)
-	cell_index        := INDEX / elements_per_cell
-	data_index        := INDEX % elements_per_cell
-	return base + (cell_index * size_of_cell) + (data_index * size_of_type)
-}
-
 // We always round the capacity to a power of two so this becomes [16]Foo, which
 // works out to [4]Cell(Foo).
 //
@@ -264,7 +253,7 @@ map_kvh_data_dynamic :: proc "contextless" (m: Raw_Map, #no_alias info: ^Map_Inf
 	sk   = map_cell_index_dynamic(hs_, INFO_HS, capacity) // Skip past hs to get start of sk
 	// Need to skip past two elements in the scratch key space to get to the start
 	// of the scratch value space, of which there's only two elements as well.
-	sv = map_cell_index_dynamic_const(sk, info.ks, 2)
+	sv = map_cell_index_dynamic(sk, info.ks, 2)
 
 	hs = ([^]Map_Hash)(hs_)
 	return
@@ -562,36 +551,57 @@ map_reserve_dynamic :: #force_no_inline proc "odin" (#no_alias m: ^Raw_Map, #no_
 	}
 
 	resized := map_alloc_dynamic(info, log2_min_cap, m.allocator, loc) or_return
-
-	ks, vs, hs, _, _ := map_kvh_data_dynamic(m^, info)
-
-	// Cache these loads to avoid hitting them in the for loop.
-	n := m.len
-	for i in 0..<old_capacity {
-		hash := hs[i]
-		if map_hash_is_empty(hash) {
-			continue
-		}
-		if map_hash_is_deleted(hash) {
-			continue
-		}
-		k := map_cell_index_dynamic(ks, info.ks, i)
-		v := map_cell_index_dynamic(vs, info.vs, i)
-		hash = info.key_hasher(rawptr(k), map_seed(resized))
-		_ = map_insert_hash_dynamic(&resized, info, hash, k, v)
-		// Only need to do this comparison on each actually added pair, so do not
-		// fold it into the for loop comparator as a micro-optimization.
-		n -= 1
-		if n == 0 {
-			break
-		}
-	}
+	map_rehash_dynamic(m^, &resized, info)
 
 	map_free_dynamic(m^, info, loc) or_return
 	m.data = resized.data
 	return nil
 }
 
+// NOTE(bill): `dst` must be newly allocated, as it is assumed to have no tombstones
+map_rehash_dynamic :: proc "odin" (src: Raw_Map, #no_alias dst: ^Raw_Map, #no_alias info: ^Map_Info) {
+	ks, vs, hs, _, _ := map_kvh_data_dynamic(src, info)
+	dks, dvs, dhs, _, _ := map_kvh_data_dynamic(dst^, info)
+	mask := (uintptr(1) << map_log2_cap(dst^)) - 1
+	seed := map_seed(dst^)
+	size_of_k := info.ks.size_of_type
+	size_of_v := info.vs.size_of_type
+
+	n := src.len
+	for i in 0..<uintptr(1) << map_log2_cap(src) {
+		if n == 0 {
+			break
+		}
+		if !map_hash_is_valid(hs[i]) {
+			continue
+		}
+		n -= 1
+
+		k := map_cell_index_dynamic(ks, info.ks, i)
+		v := map_cell_index_dynamic(vs, info.vs, i)
+		h := info.key_hasher(rawptr(k), seed)
+
+		pos := h & mask
+		distance := uintptr(0)
+		for {
+			element_hash := dhs[pos]
+			if map_hash_is_empty(element_hash) || distance > map_probe_distance(dst^, element_hash, pos) {
+				break
+			}
+			pos = (pos + 1) & mask
+			distance += 1
+		}
+
+		if map_hash_is_empty(dhs[pos]) {
+			intrinsics.mem_copy_non_overlapping(rawptr(map_cell_index_dynamic(dks, info.ks, pos)), rawptr(k), size_of_k)
+			intrinsics.mem_copy_non_overlapping(rawptr(map_cell_index_dynamic(dvs, info.vs, pos)), rawptr(v), size_of_v)
+			dhs[pos] = h
+		} else {
+			_ = map_insert_hash_dynamic(dst, info, h, k, v)
+		}
+	}
+}
+
 
 @(require_results)
 map_shrink_dynamic :: #force_no_inline proc "odin" (#no_alias m: ^Raw_Map, #no_alias info: ^Map_Info, loc := #caller_location) -> (did_shrink: bool, err: Allocator_Error) {
@@ -622,32 +632,7 @@ map_shrink_dynamic :: #force_no_inline proc "odin" (#no_alias m: ^Raw_Map, #no_a
 	}
 
 	shrunk := map_alloc_dynamic(info, log2_capacity_new, m.allocator) or_return
-
-	capacity := uintptr(1) << log2_capacity_new
-
-	ks, vs, hs, _, _ := map_kvh_data_dynamic(m^, info)
-
-	n := m.len
-	for i in 0..<capacity {
-		hash := hs[i]
-		if map_hash_is_empty(hash) {
-			continue
-		}
-		if map_hash_is_deleted(hash) {
-			continue
-		}
-
-		k := map_cell_index_dynamic(ks, info.ks, i)
-		v := map_cell_index_dynamic(vs, info.vs, i)
-		hash = info.key_hasher(rawptr(k), map_seed(shrunk))
-		_ = map_insert_hash_dynamic(&shrunk, info, hash, k, v)
-		// Only need to do this comparison on each actually added pair, so do not
-		// fold it into the for loop comparator as a micro-optimization.
-		n -= 1
-		if n == 0 {
-			break
-		}
-	}
+	map_rehash_dynamic(m^, &shrunk, info)
 
 	map_free_dynamic(m^, info, loc) or_return
 	m.data = shrunk.data

From 001be12b3440ff9ef145effe03bf5c2f0be8b687 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 17:36:19 +0100
Subject: [PATCH 185/215] Scan the runs of ASCII characters is identifiers, and
 simplify the hash for the keyword look up

---
 src/tokenizer.cpp | 52 +++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 48 insertions(+), 4 deletions(-)

diff --git a/src/tokenizer.cpp b/src/tokenizer.cpp
index d3bf23519..6900a2098 100644
--- a/src/tokenizer.cpp
+++ b/src/tokenizer.cpp
@@ -154,16 +154,29 @@ GB_STATIC_ASSERT(Token__KeywordEnd-Token__KeywordBegin <= gb_count_of(keyword_ha
 gb_global isize const min_keyword_size = 2;
 gb_global isize max_keyword_size = 11;
 gb_global bool keyword_indices[16] = {};
+gb_global u32  keyword_first_letters = 0; // a bit for each letter from 'a' which a keyword starts with
 
 
 gb_internal gb_inline u32 keyword_hash(u8 const *text, isize len) {
-	return fnv32a(text, len);
+	return cast(u32)len + text[0] + 3*text[1] + 26*text[len-1];
 }
+
+gb_internal gb_inline bool could_be_keyword(String const &s) {
+	if (s.len < min_keyword_size || s.len > max_keyword_size || !keyword_indices[s.len]) {
+		return false;
+	}
+	u32 first = cast(u32)s[0] - 'a';
+	return first < 26 && (keyword_first_letters & (1u<<first)) != 0;
+}
+
 gb_internal void add_keyword_hash_entry(String const &s, TokenKind kind) {
 	max_keyword_size = gb_max(max_keyword_size, s.len);
 
 	keyword_indices[s.len] = true;
 
+	GB_ASSERT('a' <= s[0] && s[0] <= 'z');
+	keyword_first_letters |= 1u<<(s[0]-'a');
+
 	u32 hash = keyword_hash(s.text, s.len);
 
 	// NOTE(bill): This is a bit of an empirical hack in order to speed things up
@@ -390,6 +403,16 @@ gb_internal gb_inline void advance_to_next_rune(Tokenizer *t) {
 	advance_to_next_rune_slow(t);
 }
 
+// Skips over the characters before `p`, which are ASCII and not newlines, as `advance_to_next_rune` would one at a time
+gb_internal gb_inline void tokenizer_skip_ascii_to(Tokenizer *t, u8 *p) {
+	if (p > t->read_curr) {
+		t->column_minus_one += cast(i32)(p - t->read_curr);
+		t->curr      = p-1;
+		t->curr_rune = p[-1];
+		t->read_curr = p;
+	}
+}
+
 gb_internal void init_tokenizer_with_data(Tokenizer *t, String const &fullpath, void const *data, isize size) {
 	t->fullpath = fullpath;
 	t->column_minus_one = -1;
@@ -663,10 +686,24 @@ gb_internal bool scan_escape(Tokenizer *t) {
 
 gb_internal gb_inline void tokenizer_skip_line(Tokenizer *t) {
 	while (t->curr_rune != '\n' && t->curr_rune != GB_RUNE_EOF) {
+		u8 *p = t->read_curr;
+		while (p < t->end && *p != '\n' && *p != 0 && *p < 0x80) {
+			p++;
+		}
+		tokenizer_skip_ascii_to(t, p);
 		advance_to_next_rune(t);
 	}
 }
 
+gb_internal gb_inline void tokenizer_skip_spaces(Tokenizer *t) {
+	u8 *p = t->read_curr;
+	while (p < t->end && (*p == ' ' || *p == '\t' || *p == '\r')) {
+		p++;
+	}
+	tokenizer_skip_ascii_to(t, p);
+	advance_to_next_rune(t);
+}
+
 gb_internal gb_inline void tokenizer_skip_whitespace(Tokenizer *t, bool on_newline) {
 	if (on_newline) {
 		for (;;) {
@@ -674,7 +711,7 @@ gb_internal gb_inline void tokenizer_skip_whitespace(Tokenizer *t, bool on_newli
 			case ' ':
 			case '\t':
 			case '\r':
-				advance_to_next_rune(t);
+				tokenizer_skip_spaces(t);
 				continue;
 			}
 			break;
@@ -683,10 +720,12 @@ gb_internal gb_inline void tokenizer_skip_whitespace(Tokenizer *t, bool on_newli
 		for (;;) {
 			switch (t->curr_rune) {
 			case '\n':
+				advance_to_next_rune(t);
+				continue;
 			case ' ':
 			case '\t':
 			case '\r':
-				advance_to_next_rune(t);
+				tokenizer_skip_spaces(t);
 				continue;
 			}
 			break;
@@ -710,6 +749,11 @@ gb_internal void tokenizer_get_token(Tokenizer *t, Token *token, int repeat=0) {
 	Rune curr_rune = t->curr_rune;
 	if (rune_is_letter(curr_rune)) {
 		token->kind = Token_Ident;
+		u8 *p = t->read_curr;
+		while (p < t->end && *p < 0x80 && rune_is_letter_or_digit(*p)) {
+			p++;
+		}
+		tokenizer_skip_ascii_to(t, p);
 		while (rune_is_letter_or_digit(t->curr_rune)) {
 			advance_to_next_rune(t);
 		}
@@ -717,7 +761,7 @@ gb_internal void tokenizer_get_token(Tokenizer *t, Token *token, int repeat=0) {
 		token->string.len = t->curr - token->string.text;
 
 		// NOTE(bill): Heavily optimize to make it faster to find keywords
-		if (1 < token->string.len && token->string.len <= max_keyword_size && keyword_indices[token->string.len]) {
+		if (could_be_keyword(token->string)) {
 			u32 hash = keyword_hash(token->string.text, token->string.len);
 			u32 index = hash & KEYWORD_HASH_TABLE_MASK;
 			KeywordHashEntry *entry = &keyword_hash_table[index];

From 6fbe128c8f85d78bd31b093afebb742a2701fcf4 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:09:06 +0100
Subject: [PATCH 186/215] Remove duplicate test

---
 tests/issues/run.bat | 1 -
 tests/issues/run.sh  | 1 -
 2 files changed, 2 deletions(-)

diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 07f6ab701..75d94c400 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -91,7 +91,6 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin check ..\test_issue_7708_mismatch.odin %COMMON% 2>&1 | find /c "Error:" | findstr /x "2" || exit /b
 ..\..\..\odin test ..\test_issue_7700.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_procedure_of_specialized.odin %COMMON%  || exit /b
-..\..\..\odin test ..\test_issue_packed_field_by_value.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_7587.odin %COMMON%  || exit /b
 ..\..\..\odin run ..\test_issue_7596.odin %COMMON% || exit /b
 ..\..\..\odin test ..\test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables || exit /b
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index 2203410ae..e14677895 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -117,7 +117,6 @@ else
 fi
 $ODIN test ../test_issue_7700.odin $COMMON
 $ODIN test ../test_issue_procedure_of_specialized.odin $COMMON
-$ODIN test ../test_issue_packed_field_by_value.odin $COMMON
 $ODIN test ../test_issue_7587.odin $COMMON
 $ODIN run ../test_issue_7596.odin $COMMON
 $ODIN test ../test_issue_split_globals -define:ODIN_TEST_FANCY=false -vet -strict-style -ignore-unused-defineables

From 5c787d0e729fcfc5a67c780435d94b7a4f5ddcee Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:17:25 +0100
Subject: [PATCH 187/215] Re-enable the `temporary_allocator()` and fix the
 `arena_temp_end`

---
 src/check_expr.cpp    |  1 -
 src/common_memory.cpp | 18 +++++++++---------
 2 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 75190b66a..72f57da35 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -8897,7 +8897,6 @@ gb_internal CallArgumentError check_polymorphic_record_type(CheckerContext *c, O
 			c->allow_in_progress_type_operand = prev_allow_in_progress;
 		});
 
-		TEMPORARY_ALLOCATOR_GUARD();
 		if (is_call_expr_field_value(ce)) {
 			named_fields = true;
 			operands = array_make<Operand>(temporary_allocator(), ce->args.count);
diff --git a/src/common_memory.cpp b/src/common_memory.cpp
index ac82e824c..8e606a62c 100644
--- a/src/common_memory.cpp
+++ b/src/common_memory.cpp
@@ -392,12 +392,14 @@ ArenaTemp arena_temp_begin(Arena *arena) {
 	GB_ASSERT(arena);
 	GB_ASSERT(arena->parent_thread == get_current_thread());
 
+	if (arena->curr_block == nullptr) {
+		arena_alloc(arena, 0, 1);
+	}
+
 	ArenaTemp temp = {};
 	temp.arena = arena;
 	temp.block = arena->curr_block;
-	if (arena->curr_block != nullptr) {
-		temp.used = arena->curr_block->used;
-	}
+	temp.used  = arena->curr_block->used;
 	arena->temp_count += 1;
 	return temp;
 }
@@ -428,8 +430,8 @@ void arena_temp_end(ArenaTemp const &temp) {
 		MemoryBlock *block = arena->curr_block;
 		if (block) {
 			GB_ASSERT_MSG(block->used >= temp.used, "out of order use of arena_temp_end");
-			isize amount_to_zero = gb_min(block->used - temp.used, block->size - block->used);
-			gb_zero_size(block->base + temp.used, amount_to_zero);
+			// `arena_alloc` expects the memory to be zeroed already
+			gb_zero_size(block->base + temp.used, block->used - temp.used);
 			block->used = temp.used;
 		}
 	}
@@ -605,16 +607,14 @@ gb_internal gbAllocator permanent_allocator() {
 }
 
 gb_internal gbAllocator temporary_allocator() {
-	// return {thread_arena_allocator_proc, cast(void *)cast(uintptr)ThreadArena_Temporary};
-	return permanent_allocator();
+	return {thread_arena_allocator_proc, cast(void *)cast(uintptr)ThreadArena_Temporary};
 }
 
 
 #define TEMP_ARENA_GUARD(arena) ArenaTempGuard GB_DEFER_3(_arena_guard_){arena}
 
 
-// #define TEMPORARY_ALLOCATOR_GUARD() TEMP_ARENA_GUARD(get_arena(ThreadArena_Temporary))
-#define TEMPORARY_ALLOCATOR_GUARD()
+#define TEMPORARY_ALLOCATOR_GUARD() TEMP_ARENA_GUARD(get_arena(ThreadArena_Temporary))
 #define PERMANENT_ALLOCATOR_GUARD()
 
 

From cd08004d33f8982477030c090c48d22b4d6e6911 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:38:09 +0100
Subject: [PATCH 188/215] Free the temporary memory of each procedure once it
 is generated; keep the strings used as keys of the constant string maps
 permanently

---
 src/llvm_backend.cpp       | 2 ++
 src/llvm_backend_const.cpp | 3 +--
 src/llvm_backend_proc.cpp  | 4 ++--
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 8a015669d..900a762f9 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -3789,6 +3789,8 @@ gb_internal void lb_generate_procedure(lbModule *m, lbProcedure *p) {
 		return;
 	}
 
+	TEMPORARY_ALLOCATOR_GUARD();
+
 	if (p->body != nullptr) { // Build Procedure
 		m->curr_procedure = p;
 		lb_begin_procedure_body(p);
diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index db123b142..7eda9515d 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -1317,8 +1317,7 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 			isize len = value.value_string.len;
 
 			if (is_type_string16(res.type) || is_type_cstring16(res.type)) {
-				TEMPORARY_ALLOCATOR_GUARD();
-				String16 s16 = string_to_string16(temporary_allocator(), value.value_string);
+				String16 s16 = string_to_string16(permanent_allocator(), value.value_string);
 				len = s16.len;
 				ptr = lb_find_or_add_entity_string16_ptr(m, s16, custom_link_section);
 			} else {
diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp
index 3172bc0b0..6a2ac0faa 100644
--- a/src/llvm_backend_proc.cpp
+++ b/src/llvm_backend_proc.cpp
@@ -4959,7 +4959,7 @@ gb_internal lbValue lb_handle_param_value(lbProcedure *p, Type *parameter_type,
 		{
 			Ast *orig = param_value.original_ast_expr;
 			if (orig->kind == Ast_BasicDirective) {
-				gbString expr = expr_to_string(call_expression, temporary_allocator());
+				gbString expr = expr_to_string(call_expression, permanent_allocator());
 				return lb_const_string(p->module, make_string_c(expr));
 			}
 
@@ -4999,7 +4999,7 @@ gb_internal lbValue lb_handle_param_value(lbProcedure *p, Type *parameter_type,
 				}
 			}
 
-			gbString expr = expr_to_string(target_expr, temporary_allocator());
+			gbString expr = expr_to_string(target_expr, permanent_allocator());
 			return lb_const_string(p->module, make_string_c(expr));
 		}
 

From 5795183b757176d42d739570e3616b5b9d1e2020 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 19:37:26 +0100
Subject: [PATCH 189/215] Queue a polymorphic specialization's body when it is
 first used rather than when it is generated, so the minimum dependency set is
 only generated once; assert that every body in it was checked rather than
 checking any missed ones late

---
 src/check_expr.cpp |  40 ++++---------
 src/checker.cpp    | 138 ++++++++++++---------------------------------
 src/checker.hpp    |   1 +
 3 files changed, 48 insertions(+), 131 deletions(-)

diff --git a/src/check_expr.cpp b/src/check_expr.cpp
index 72f57da35..7f079e5bf 100644
--- a/src/check_expr.cpp
+++ b/src/check_expr.cpp
@@ -568,27 +568,11 @@ gb_internal Type *strip_poly_specialized_proc_type(Type *full) {
 	return t;
 }
 
-// Reuse an existing generated specialization `other`, scheduling its body if unchecked.
-// Caller must have released gen_procs->mutex first.
-gb_internal bool reuse_gen_polymorphic_procedure(Checker *checker, Entity *other, Ast *poly_def_node, PolyProcData *poly_proc_data) {
+// Reuse an existing generated specialization `other`, whose body is checked once it is used
+gb_internal bool reuse_gen_polymorphic_procedure(Entity *other, PolyProcData *poly_proc_data) {
 	if (poly_proc_data) {
 		poly_proc_data->gen_entity = other;
 	}
-
-	DeclInfo *decl = other->decl_info;
-	if (decl->proc_checked_state != ProcCheckedState_Checked) {
-		ProcInfo *proc_info = permanent_alloc_item<ProcInfo>();
-		proc_info->file  = other->file;
-		proc_info->token = other->token;
-		proc_info->decl  = decl;
-		proc_info->type  = proc_entity_full_type(other);
-		proc_info->body  = decl->proc_lit->ProcLit.body;
-		proc_info->tags  = other->Procedure.tags;
-		proc_info->generated_from_polymorphic = true;
-		proc_info->poly_def_node = poly_def_node;
-
-		check_procedure_later(checker, proc_info);
-	}
 	return true;
 }
 
@@ -773,7 +757,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 			Type *pt = base_type(proc_entity_full_type(other));
 			if (are_types_identical(pt, final_proc_type)) {
 				rw_mutex_shared_unlock(&gen_procs->mutex); // @local-mutex
-				return reuse_gen_polymorphic_procedure(nctx.checker, other, poly_def_node, poly_proc_data);
+				return reuse_gen_polymorphic_procedure(other, poly_proc_data);
 			}
 		}
 		rw_mutex_shared_unlock(&gen_procs->mutex); // @local-mutex
@@ -788,7 +772,7 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 		Entity *other = gen_procs->procs[i];
 		if (gen_procs->hashes[i] == final_hash && are_types_identical(base_type(proc_entity_full_type(other)), final_proc_type)) {
 			rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
-			return reuse_gen_polymorphic_procedure(nctx.checker, other, poly_def_node, poly_proc_data);
+			return reuse_gen_polymorphic_procedure(other, poly_proc_data);
 		}
 	}
 
@@ -860,10 +844,6 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 
 	AstFile *file = base_entity->file;
 
-	array_add(&gen_procs->procs, entity);
-	array_add(&gen_procs->hashes, proc_type_identity_hash(final_proc_type));
-	rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
-
 	ProcInfo *proc_info = permanent_alloc_item<ProcInfo>();
 	proc_info->file  = file;
 	proc_info->token = token;
@@ -874,6 +854,12 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 	proc_info->generated_from_polymorphic = true;
 	proc_info->poly_def_node = poly_def_node;
 
+	// Before it can be found by another thread which could use it first
+	d->gen_proc_info.store(proc_info);
+
+	array_add(&gen_procs->procs, entity);
+	array_add(&gen_procs->hashes, proc_type_identity_hash(final_proc_type));
+	rw_mutex_unlock(&gen_procs->mutex); // @local-mutex
 
 	if (poly_proc_data) {
 		poly_proc_data->gen_entity = entity;
@@ -926,9 +912,6 @@ gb_internal bool find_or_generate_polymorphic_procedure(CheckerContext *old_c, E
 		}
 	}
 
-	// NOTE(bill): Check the newly generated procedure body
-	check_procedure_later(nctx.checker, proc_info);
-
 	return true;
 }
 
@@ -7771,9 +7754,6 @@ gb_internal bool check_call_arguments_single(CheckerContext *c, Ast *call, Opera
 
 		} else {
 			decl->where_clauses_evaluated = true;
-			if (ok && (data->gen_entity->flags & EntityFlag_ProcBodyChecked) == 0) {
-				check_procedure_later(c->checker, e->file, e->token, decl, proc_entity_full_type(e), decl->proc_lit->ProcLit.body, decl->proc_lit->ProcLit.tags);
-			}
 			if (is_type_proc(data->gen_entity->type)) {
 				Type *t = base_type(entity_to_use->type);
 				data->result_type = t->Proc.results;
diff --git a/src/checker.cpp b/src/checker.cpp
index 01702b14e..0a4dec1fb 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -12,6 +12,7 @@ gb_internal void check_expr(CheckerContext *c, Operand *operand, Ast *expression
 gb_internal void check_expr_or_type(CheckerContext *c, Operand *operand, Ast *expression, Type *type_hint=nullptr);
 gb_internal void add_comparison_procedures_for_fields(CheckerContext *c, Type *t);
 gb_internal Type *check_type(CheckerContext *ctx, Ast *e);
+gb_internal void check_procedure_later(Checker *c, ProcInfo *info);
 
 gb_internal bool is_operand_value(Operand o) {
 	switch (o.mode) {
@@ -2204,6 +2205,16 @@ gb_internal void add_entity_use(CheckerContext *c, Ast *identifier, Entity *enti
 	}
 	add_declaration_dependency(c, entity);
 	entity->flags |= EntityFlag_Used;
+	if (entity->kind == Entity_Procedure && entity->Procedure.generated_from_polymorphic) {
+		// Check the specialization body later
+		DeclInfo *decl = entity->decl_info;
+		if (decl != nullptr) {
+			ProcInfo *pi = decl->gen_proc_info.exchange(nullptr);
+			if (pi != nullptr) {
+				check_procedure_later(c->checker, pi);
+			}
+		}
+	}
 	if (entity_has_deferred_procedure(entity)) {
 		Entity *deferred = entity->Procedure.deferred_procedure.entity;
 		if (deferred != entity) {
@@ -6432,60 +6443,6 @@ gb_internal void calculate_global_init_order(Checker *c) {
 	}
 }
 
-gb_internal void check_procedure_later_from_entity(Checker *c, Entity *e, char const *from_msg) {
-	if (e == nullptr || e->kind != Entity_Procedure) {
-		return;
-	}
-	if (e->Procedure.is_foreign) {
-		return;
-	}
-	if ((e->flags & EntityFlag_ProcBodyChecked) != 0) {
-		return;
-	}
-	if ((e->flags & EntityFlag_Overridden) != 0) {
-		// NOTE (zen3ger) Delay checking of a proc alias until the underlying proc is checked.
-		GB_ASSERT(e->aliased_of != nullptr);
-		GB_ASSERT(e->aliased_of->kind == Entity_Procedure);
-		if ((e->aliased_of->flags & EntityFlag_ProcBodyChecked) != 0) {
-			e->flags |= EntityFlag_ProcBodyChecked;
-			return;
-		}
-		// NOTE (zen3ger) A proc alias *does not* have a body and tags!
-		check_procedure_later(c, e->file, e->token, e->decl_info, e->type, nullptr, 0);
-		return;
-	}
-	Type *type = base_type(e->type);
-	if (type == t_invalid) {
-		return;
-	}
-	GB_ASSERT_MSG(type->kind == Type_Proc, "%s", type_to_string(e->type));
-
-	if (is_type_polymorphic(type) && !type->Proc.is_poly_specialized) {
-		return;
-	}
-
-	GB_ASSERT(e->decl_info != nullptr);
-
-	ProcInfo *pi = permanent_alloc_item<ProcInfo>();
-	pi->file  = e->file;
-	pi->token = e->token;
-	pi->decl  = e->decl_info;
-	pi->type  = proc_entity_full_type(e);
-
-	Ast *pl = e->decl_info->proc_lit;
-	GB_ASSERT(pl != nullptr);
-	pi->body  = pl->ProcLit.body;
-	pi->tags  = pl->ProcLit.tags;
-	if (pi->body == nullptr) {
-		return;
-	}
-	if (from_msg != nullptr) {
-		debugf("CHECK PROCEDURE LATER [FROM %s]! %.*s :: %s {...}\n", from_msg, LIT(e->token.string), type_to_string(e->type));
-	}
-	check_procedure_later(c, pi);
-}
-
-
 gb_internal bool check_proc_info(Checker *c, ProcInfo *pi, UntypedExprInfoMap *untyped) {
 	if (pi == nullptr) {
 		return false;
@@ -6534,12 +6491,7 @@ gb_internal bool check_proc_info(Checker *c, ProcInfo *pi, UntypedExprInfoMap *u
 	if (pt->is_polymorphic && pt->is_poly_specialized) {
 		Entity *e = pi->decl->entity;
 		GB_ASSERT(e != nullptr);
-		if ((e->flags & EntityFlag_Used) == 0) {
-			// NOTE(bill, 2019-08-31): It was never used, don't check
-			// NOTE(bill, 2023-01-02): This may need to be checked again if it is used elsewhere?
-			pi->decl->proc_checked_state.store(ProcCheckedState_Unchecked);
-			return false;
-		}
+		GB_ASSERT_MSG((e->flags & EntityFlag_Used) != 0, "unused specialization '%.*s' queued for checking", LIT(name));
 	}
 
 	CheckerContext ctx = {};
@@ -6603,15 +6555,6 @@ gb_internal bool check_proc_info(Checker *c, ProcInfo *pi, UntypedExprInfoMap *u
 
 	add_untyped_expressions(&c->info, ctx.untyped);
 
-	rw_mutex_shared_lock(&ctx.decl->deps_mutex);
-	FOR_PTR_SET(dep, ctx.decl->deps) {
-		if (dep && dep->kind == Entity_Procedure &&
-		    (dep->flags & EntityFlag_ProcBodyChecked) == 0) {
-			check_procedure_later_from_entity(c, dep, NULL);
-		}
-	}
-	rw_mutex_shared_unlock(&ctx.decl->deps_mutex);
-
 	return true;
 }
 
@@ -6619,38 +6562,37 @@ GB_STATIC_ASSERT(sizeof(isize) == sizeof(void *));
 
 gb_internal bool consume_proc_info(Checker *c, ProcInfo *pi, UntypedExprInfoMap *untyped);
 
-gb_internal void check_unchecked_bodies(Checker *c) {
-	// NOTE(2021-02-26, bill): Sanity checker
-	// This is a partial hack to make sure all procedure bodies have been checked
-	// even ones which should not exist, due to the multithreaded nature of the parser
-	// HACK TODO(2021-02-26, bill): Actually fix this race condition
-
+gb_internal void check_min_dep_bodies_were_checked(Checker *c) {
 	GB_ASSERT(c->procs_to_check.count == 0);
+	global_after_checking_procedure_bodies = true;
 
-	UntypedExprInfoMap untyped = {};
-	defer (map_destroy(&untyped));
-
-	// use the `procs_to_check` array
-	global_procedure_body_in_worker_queue = false;
+	if (any_errors()) {
+		// e.g. a body is not checked when its `where` clauses fail
+		return;
+	}
 
 	for (Entity *e : c->info.entities) {
-		if (e->min_dep_count.load(std::memory_order_relaxed) > 0) {
-			check_procedure_later_from_entity(c, e, "check_unchecked_bodies");
+		if (e->kind != Entity_Procedure || e->min_dep_count.load(std::memory_order_relaxed) == 0) {
+			continue;
 		}
-	}
-
-	if (!global_procedure_body_in_worker_queue) {
-		for_array(i, c->procs_to_check) {
-			ProcInfo *pi = c->procs_to_check[i];
-			consume_proc_info(c, pi, &untyped);
+		Entity *original = e;
+		while ((e->flags & EntityFlag_Overridden) && e->aliased_of != nullptr) {
+			e = e->aliased_of;
 		}
-		array_clear(&c->procs_to_check);
-	} else {
-		thread_pool_wait();
+		if (e->Procedure.is_foreign || (e->flags & EntityFlag_ProcBodyChecked) != 0) {
+			continue;
+		}
+		Type *type = base_type(e->type);
+		if (type == t_invalid || (is_type_polymorphic(type) && !type->Proc.is_poly_specialized)) {
+			continue;
+		}
+		DeclInfo *decl = e->decl_info;
+		if (decl == nullptr || decl->proc_lit == nullptr || decl->proc_lit->ProcLit.body == nullptr) {
+			continue;
+		}
+		GB_PANIC("the body of '%.*s' :: %s was never checked (%s)",
+		         LIT(original->token.string), type_to_string(e->type), token_pos_to_string(e->token.pos));
 	}
-
-	global_procedure_body_in_worker_queue = false;
-	global_after_checking_procedure_bodies = true;
 }
 
 gb_internal void check_safety_all_procedures_for_unchecked(Checker *c) {
@@ -7774,13 +7716,7 @@ gb_internal void check_parsed_files(Checker *c) {
 	generate_minimum_dependency_set(c, c->info.entry_point);
 
 	TIME_SECTION("check bodies have all been checked");
-	check_unchecked_bodies(c);
-
-	TIME_SECTION("check #soa types");
-	check_merge_queues_into_arrays(c);
-
-	TIME_SECTION("update minimum dependency set again");
-	generate_minimum_dependency_set_internal(c, c->info.entry_point);
+	check_min_dep_bodies_were_checked(c);
 
 	// NOTE(laytan): has to be ran after generate_minimum_dependency_set,
 	// because that collects the test procedures.
diff --git a/src/checker.hpp b/src/checker.hpp
index 6c91c2b91..04cf1e41a 100644
--- a/src/checker.hpp
+++ b/src/checker.hpp
@@ -225,6 +225,7 @@ struct DeclInfo {
 	Type *        gen_proc_type; // Precalculated
 
 	Entity *     para_poly_original;
+	std::atomic<struct ProcInfo *> gen_proc_info; // a specialization's body, queued for checking when it is first used
 
 	bool                          is_using;
 	bool                          foreign_require_results;

From d046345202026ada417d9cb866d1673d2a6e794a Mon Sep 17 00:00:00 2001
From: Arthur031221 <levi74108520963@gmail.com>
Date: Sun, 4 Oct 2026 03:39:11 +0800
Subject: [PATCH 190/215] Preserve fractional timestamps in timezone
 conversions

Apply timezone offsets to the normalized nanosecond timestamp.
Test fractional roundtrips, dates before 1970 and nanosecond carry.

Co-authored-by: dozn <16659513+dozn@users.noreply.github.com>
Signed-off-by: Arthur031221 <levi74108520963@gmail.com>
---
 core/time/timezone/tzdate.odin      |  6 +--
 tests/core/time/test_core_time.odin | 64 +++++++++++++++++++++++++++--
 2 files changed, 63 insertions(+), 7 deletions(-)

diff --git a/core/time/timezone/tzdate.odin b/core/time/timezone/tzdate.odin
index 29e8ad25c..e00e5ac84 100644
--- a/core/time/timezone/tzdate.odin
+++ b/core/time/timezone/tzdate.odin
@@ -187,8 +187,7 @@ datetime_to_utc :: proc(dt: datetime.DateTime) -> (out: datetime.DateTime, succe
 	tm := time.datetime_to_time(dt) or_return
 	record := region_get_nearest(dt.tz, tm) or_return
 
-	secs := time.time_to_unix(tm)
-	adj_time := time.unix(secs - record.utc_offset, 0)
+	adj_time := time.time_add(tm, -time.Duration(record.utc_offset) * time.Second)
 	adj_dt := time.time_to_datetime(adj_time) or_return
 	return adj_dt, true
 }
@@ -220,8 +219,7 @@ datetime_to_tz :: proc(dt: datetime.DateTime, tz: ^datetime.TZ_Region) -> (out:
 	tm := time.datetime_to_time(dt) or_return
 	record := region_get_nearest(tz, tm) or_return
 
-	secs := time.time_to_unix(tm)
-	adj_time := time.unix(secs + record.utc_offset, i64(dt.nano))
+	adj_time := time.time_add(tm, time.Duration(record.utc_offset) * time.Second)
 	adj_dt := time.time_to_datetime(adj_time) or_return
 	adj_dt.tz = tz
 
diff --git a/tests/core/time/test_core_time.odin b/tests/core/time/test_core_time.odin
index d1f83c0dc..f06541bfe 100644
--- a/tests/core/time/test_core_time.odin
+++ b/tests/core/time/test_core_time.odin
@@ -355,14 +355,72 @@ date_component_roundtrip_test :: proc(t: ^testing.T, moment: dt.DateTime) {
 datetime_eq :: proc(dt1: dt.DateTime, dt2: dt.DateTime) -> bool {
 	return (
 		dt1.year == dt2.year && dt1.month == dt2.month   && dt1.day == dt2.day &&
-		dt1.hour == dt2.hour && dt1.minute == dt2.minute && dt1.second == dt2.second
+		dt1.hour == dt2.hour && dt1.minute == dt2.minute && dt1.second == dt2.second &&
+		dt1.nano == dt2.nano
 	)
 }
 
+@test
+test_convert_timezone_fractional_timestamp :: proc(t: ^testing.T) {
+	utc_now := time.unix(1750697120, 478850200)
+	utc_date_time, utc_ok := time.time_to_datetime(utc_now)
+	testing.expect(t, utc_ok)
+
+	van_tz, van_ok := tz.region_load("America/Vancouver")
+	testing.expect(t, van_ok)
+	defer tz.region_destroy(van_tz)
+	van_date_time, van_converted := tz.datetime_to_tz(utc_date_time, van_tz)
+	testing.expect(t, van_converted)
+	returned_date_time, returned := tz.datetime_to_utc(van_date_time)
+	testing.expect(t, returned)
+
+	utc_time, utc_valid := time.compound_to_time(utc_date_time)
+	van_time, van_valid := time.compound_to_time(returned_date_time)
+	testing.expect(t, utc_valid && van_valid)
+	testing.expect_value(t, van_time, utc_time)
+}
+
+@test
+test_convert_timezone_normalized_timestamp :: proc(t: ^testing.T) {
+	zone := dt.TZ_Region{rrule = {has_dst = false, std_offset = 3600}}
+	cases := [3]struct {
+		input, normalized, utc: dt.DateTime,
+	}{
+		{
+			{{2024, 1, 1}, {0, 0, 0, 123456789}, nil},
+			{{2024, 1, 1}, {0, 0, 0, 123456789}, nil},
+			{{2023, 12, 31}, {23, 0, 0, 123456789}, nil},
+		},
+		{
+			{{2024, 1, 1}, {0, 0, 59, 1000000000}, nil},
+			{{2024, 1, 1}, {0, 1, 0, 0}, nil},
+			{{2023, 12, 31}, {23, 1, 0, 0}, nil},
+		},
+		{
+			{{1969, 12, 31}, {23, 59, 59, 123456789}, nil},
+			{{1969, 12, 31}, {23, 59, 59, 123456789}, nil},
+			{{1969, 12, 31}, {22, 59, 59, 123456789}, nil},
+		},
+	}
+	for tc in cases {
+		input := tc.input
+		input.tz = &zone
+		utc, utc_ok := tz.datetime_to_utc(input)
+		testing.expect(t, utc_ok)
+		testing.expect(t, datetime_eq(utc, tc.utc))
+		testing.expect(t, utc.tz == nil)
+
+		local, local_ok := tz.datetime_to_tz(tc.utc, &zone)
+		testing.expect(t, local_ok)
+		testing.expect(t, datetime_eq(local, tc.normalized))
+		testing.expect(t, local.tz == &zone)
+	}
+}
+
 @test
 test_convert_timezone_roundtrip :: proc(t: ^testing.T) {
-	dst_dt, _ := dt.components_to_datetime(2024, 10, 4, 23, 47, 0)
-	std_dt, _ := dt.components_to_datetime(2024, 11, 4, 23, 47, 0)
+	dst_dt, _ := dt.components_to_datetime(2024, 10, 4, 23, 47, 0, 123456789)
+	std_dt, _ := dt.components_to_datetime(2024, 11, 4, 23, 47, 0, 987654321)
 
 	local_tz, local_load_ok := tz.region_load("local")
 	defer tz.region_destroy(local_tz)

From bdb03647390aa01412a09f6577cda798c28882df Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 22:26:08 +0100
Subject: [PATCH 191/215] Remove the missing procedures fallback from the
 backend: the checker adds the Objective-C runtime procedures the backend
 calls, local foreign procedures with a duplicate name are bound to the
 existing declaration, and local procedures passed to a `$` parameter are
 created up front

---
 src/check_builtin.cpp        |  8 +++++
 src/check_type.cpp           |  1 +
 src/checker.cpp              | 12 ++++++++
 src/entity.cpp               |  3 +-
 src/llvm_backend.cpp         | 59 +++++++++++-------------------------
 src/llvm_backend.hpp         |  2 --
 src/llvm_backend_general.cpp | 16 ++--------
 src/llvm_backend_stmt.cpp    |  3 +-
 8 files changed, 46 insertions(+), 58 deletions(-)

diff --git a/src/check_builtin.cpp b/src/check_builtin.cpp
index f453fb0aa..41e037eeb 100644
--- a/src/check_builtin.cpp
+++ b/src/check_builtin.cpp
@@ -686,6 +686,14 @@ gb_internal bool check_builtin_objc_procedure(CheckerContext *c, Operand *operan
 		} else {
 			try_to_add_package_dependency(c, "runtime", "_NSConcreteStackBlock");
 		}
+		for (isize i = 0; i < capture_arg_count; i++) {
+			Type *t = param_operands[i].type;
+			if (is_type_pointer(t) && is_type_objc_object(t)) {
+				try_to_add_package_dependency(c, "runtime", "_Block_object_assign");
+				try_to_add_package_dependency(c, "runtime", "_Block_object_dispose");
+				break;
+			}
+		}
 
 		*operand = poly_op;
 		operand->type = alloc_type_pointer(operand->type);
diff --git a/src/check_type.cpp b/src/check_type.cpp
index 98e562501..959ce39a9 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -3358,6 +3358,7 @@ gb_internal Type *check_get_params(CheckerContext *ctx, Scope *scope, Ast *_para
 							Ast *expr = unparen_expr(op.expr);
 							Entity *proc_entity = strip_entity_wrapping(expr);
 							if (proc_entity) {
+								proc_entity->flags |= EntityFlag_PolyConstArg;
 								poly_const = exact_value_procedure(proc_entity->identifier.load() ? proc_entity->identifier.load() : op.expr);
 								valid = true;
 							} else if (expr->kind == Ast_ProcLit) {
diff --git a/src/checker.cpp b/src/checker.cpp
index 0a4dec1fb..82e1dc154 100644
--- a/src/checker.cpp
+++ b/src/checker.cpp
@@ -3377,6 +3377,18 @@ gb_internal void generate_minimum_dependency_set(Checker *c, Entity *start) {
 		str_lit("multi_pointer_slice_expr_error"),
 	);
 
+	FORCE_ADD_RUNTIME_ENTITIES(c->info.objc_class_implementations.count.load(std::memory_order_relaxed) > 0,
+		str_lit("objc_lookUpClass"),
+		str_lit("sel_registerName"),
+		str_lit("objc_allocateClassPair"),
+		str_lit("objc_registerClassPair"),
+		str_lit("class_addMethod"),
+		str_lit("class_addIvar"),
+		str_lit("class_getInstanceVariable"),
+		str_lit("ivar_getOffset"),
+		str_lit("object_getClass"),
+	);
+
 
 	{ // init min dep basic equal procs
 		struct { BasicKind kind; char const *name; } const procs[] = {
diff --git a/src/entity.cpp b/src/entity.cpp
index 4a7800450..355bd1ca6 100644
--- a/src/entity.cpp
+++ b/src/entity.cpp
@@ -76,7 +76,8 @@ enum EntityFlag : u64 {
 	EntityFlag_Init          = 1ull<<31,
 	EntityFlag_Subtype       = 1ull<<32,
 	EntityFlag_Fini          = 1ull<<33,
-	
+	EntityFlag_PolyConstArg  = 1ull<<34, // passed to a `$` parameter, so a local procedure may be called outside its parent
+
 	EntityFlag_CustomLinkName = 1ull<<40,
 	EntityFlag_CustomLinkage_Internal = 1ull<<41,
 	EntityFlag_CustomLinkage_Strong   = 1ull<<42,
diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 900a762f9..2d25e4703 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2441,12 +2441,13 @@ gb_internal void lb_create_global_procedures_and_types(lbGenerator *gen, Checker
 		Scope * scope = e->scope;
 
 		if ((scope->flags & ScopeFlag_File) == 0) {
-			continue;
+			if (e->kind != Entity_Procedure || (e->flags & EntityFlag_PolyConstArg) == 0) {
+				continue;
+			}
+		} else {
+			GB_ASSERT(scope->parent->flags & ScopeFlag_Pkg);
 		}
 
-		Scope *package_scope = scope->parent;
-		GB_ASSERT(package_scope->flags & ScopeFlag_Pkg);
-
 		switch (e->kind) {
 		case Entity_Variable:
 			// NOTE(bill): Handled above as it requires a specific load order
@@ -3354,51 +3355,27 @@ gb_internal void lb_generate_procedures(lbGenerator *gen, bool do_threading) {
 	lb_exit_if_worker_failed();
 }
 
-gb_internal WORKER_TASK_PROC(lb_generate_missing_procedures_to_check_worker_proc) {
+gb_internal WORKER_TASK_PROC(lb_generate_queued_procedures_worker_proc) {
 	lbModule *m = cast(lbModule *)data;
-	for (Entity *e = nullptr; mpsc_dequeue(&m->missing_procedures_to_check, &e); /**/) {
-		lbProcedure *p = lb_create_procedure(m, e, false);
-		if (!p->is_done.load(std::memory_order_relaxed)) {
-			debugf("Generate missing procedure: %.*s module %p\n", LIT(p->name), m);
-		}
-		mpsc_enqueue(&m->procedures_to_generate, p);
-	}
 	for (lbProcedure *p = nullptr; mpsc_dequeue(&m->procedures_to_generate, &p); /**/) {
 		lb_generate_procedure(m, p);
 	}
 	return 0;
 }
 
-gb_internal void lb_generate_missing_procedures(lbGenerator *gen, bool do_threading) {
-	isize retry_count = 0;
-retry:;
-	if (do_threading) {
-		for (auto const &entry : gen->modules) {
-			lbModule *m = entry.value;
-			// NOTE(bill): procedures may be added during generation
-			thread_pool_add_task(lb_generate_missing_procedures_to_check_worker_proc, m);
-		}
-		thread_pool_wait();
-	} else {
-		for (auto const &entry : gen->modules) {
-			lbModule *m = entry.value;
-			// NOTE(bill): procedures may be added during generation
-			lb_generate_missing_procedures_to_check_worker_proc(m);
-		}
-	}
-
+gb_internal void lb_generate_queued_procedures(lbGenerator *gen, bool do_threading) {
 	for (auto const &entry : gen->modules) {
 		lbModule *m = entry.value;
-		if (m->missing_procedures_to_check.count != 0 || m->procedures_to_generate.count != 0) {
-			if (retry_count > gen->modules.count) {
-				GB_ASSERT(m->missing_procedures_to_check.count == 0 && m->procedures_to_generate.count == 0);
-			}
-
-			retry_count += 1;
-			goto retry;
+		if (do_threading) {
+			thread_pool_add_task(lb_generate_queued_procedures_worker_proc, m);
+		} else {
+			lb_generate_queued_procedures_worker_proc(m);
 		}
-		GB_ASSERT(m->missing_procedures_to_check.count == 0);
-		GB_ASSERT(m->procedures_to_generate.count == 0);
+	}
+	thread_pool_wait();
+
+	for (auto const &entry : gen->modules) {
+		GB_ASSERT(entry.value->procedures_to_generate.count == 0);
 	}
 }
 
@@ -4236,8 +4213,8 @@ gb_internal bool lb_generate_code(lbGenerator *gen) {
 		lb_create_main_procedure(default_module, gen->startup_runtime, gen->cleanup_runtime);
 	}
 
-	TIME_SECTION("LLVM Procedure Generation (missing)");
-	lb_generate_missing_procedures(gen, do_threading);
+	TIME_SECTION("LLVM Procedure Generation (queued)");
+	lb_generate_queued_procedures(gen, do_threading);
 
 	if (gen->objc_names) {
 		TIME_SECTION("Finalize objc names");
diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index 824fe2f88..7a3b12575 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -153,8 +153,6 @@ struct lbModule {
 	StringMap<lbProcedure *> procedures;
 	PtrMap<LLVMValueRef, Entity *> procedure_values;
 
-	MPSCQueue<Entity *> missing_procedures_to_check;
-
 	StringMap<LLVMValueRef>   const_strings;
 	String16Map<LLVMValueRef> const_string16s;
 
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index a2b2a44b9..9893debbf 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -165,7 +165,6 @@ gb_internal WORKER_TASK_PROC(lb_init_module_worker_proc) {
 	array_init(&m->global_procedures_to_create, a, 0, 1024);
 	array_init(&m->global_types_to_create, a, 0, 1024);
 	array_init(&m->global_variables, a);
-	mpsc_init(&m->missing_procedures_to_check, a);
 	map_init(&m->debug_values);
 
 	string_map_init(&m->objc_classes);
@@ -4086,25 +4085,16 @@ gb_internal lbValue lb_find_procedure_value_from_entity(lbModule *m, Entity *e)
 
 	// NOTE(bill): Until the modules are generated in parallel, a procedure may be referenced before it is created
 	// (e.g. an @(init) procedure by the startup procedure), but after that it was missed by the frontend
-	bool missing = gen->modules_in_parallel;
-
 	if (!ignore_body) {
-		if (missing) {
-			debugf("Missing Procedure (lb_find_procedure_value_from_entity): %.*s module %p\n", LIT(e->token.string), m);
-		}
+		GB_ASSERT_MSG(!gen->modules_in_parallel, "missing procedure '%.*s' (%s)", LIT(e->token.string), token_pos_to_string(e->token.pos));
 		mpsc_enqueue(&m->procedures_to_generate, proc);
 	} else {
 		rw_mutex_shared_lock(&other_module->values_mutex);
 		auto *found = map_get(&other_module->values, e);
 		rw_mutex_shared_unlock(&other_module->values_mutex);
 		if (found == nullptr) {
-			if (missing) {
-				debugf("Missing Procedure (lb_find_procedure_value_from_entity): %.*s module %p\n", LIT(e->token.string), other_module);
-				// another module's context may only be used by the thread generating that module
-				mpsc_enqueue(&other_module->missing_procedures_to_check, e);
-			} else {
-				mpsc_enqueue(&other_module->procedures_to_generate, lb_create_procedure(other_module, e, false));
-			}
+			GB_ASSERT_MSG(!gen->modules_in_parallel, "missing procedure '%.*s' (%s)", LIT(e->token.string), token_pos_to_string(e->token.pos));
+			mpsc_enqueue(&other_module->procedures_to_generate, lb_create_procedure(other_module, e, false));
 		}
 	}
 
diff --git a/src/llvm_backend_stmt.cpp b/src/llvm_backend_stmt.cpp
index d35b48835..eb51e6370 100644
--- a/src/llvm_backend_stmt.cpp
+++ b/src/llvm_backend_stmt.cpp
@@ -234,7 +234,8 @@ gb_internal void lb_build_constant_value_decl(lbProcedure *p, AstValueDecl *vd)
 			lbValue *prev_value = string_map_get(&p->module->members, name);
 			if (prev_value != nullptr) {
 				// NOTE(bill): Don't do mutliple declarations in the IR
-				return;
+				lb_add_entity(p->module, e, *prev_value);
+				continue;
 			}
 
 			e->Procedure.link_name = name;

From 733c3fdea73861109d6e7036dd475fb871006a66 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 22:31:40 +0100
Subject: [PATCH 192/215] Add to the tests the equal procedure dependencies
 test

---
 tests/issues/run.bat | 2 +-
 tests/issues/run.sh  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 75d94c400..9c12b346d 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -99,7 +99,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_fast_isel_lowering.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_fast_isel_lowering.odin %COMMON% -o:none || exit /b
 ..\..\..\odin test ..\test_issue_equal_proc_dependencies.odin %COMMON%  || exit /b
-..\..\..\odin test ..\test_issue_equal_proc_dependencies.odin %COMMON% -build-mode:obj -show-debug-messages 2>&1 | find /i /c "missing procedure" | findstr /x "0" || exit /b
+..\..\..\odin test ..\test_issue_equal_proc_dependencies.odin %COMMON% -build-mode:obj 2>&1 | find /i /c "Assertion Failure" | findstr /x "0" || exit /b
 
 @echo off
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index e14677895..c0684abeb 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -125,7 +125,7 @@ $ODIN test ../test_issue_omitted_field_union.odin $COMMON
 $ODIN test ../test_issue_fast_isel_lowering.odin $COMMON
 $ODIN test ../test_issue_fast_isel_lowering.odin $COMMON -o:none
 $ODIN test ../test_issue_equal_proc_dependencies.odin $COMMON
-if [[ $($ODIN test ../test_issue_equal_proc_dependencies.odin $COMMON -build-mode:obj -show-debug-messages 2>&1 | grep -ci "missing procedure") -eq 0 ]]; then
+if [[ $($ODIN test ../test_issue_equal_proc_dependencies.odin $COMMON -build-mode:obj 2>&1 | grep -ci "Assertion Failure") -eq 0 ]]; then
 	echo "SUCCESSFUL 1/1"
 else
 	echo "SUCCESSFUL 0/1"

From 5a4b877beb336439044d3daa8903ad18b47e3f8b Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 22:33:08 +0100
Subject: [PATCH 193/215] Only match the missing procedure assertion in the
 equal procedure dependencies issue test

---
 tests/issues/run.bat | 2 +-
 tests/issues/run.sh  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/issues/run.bat b/tests/issues/run.bat
index 9c12b346d..5c459a910 100644
--- a/tests/issues/run.bat
+++ b/tests/issues/run.bat
@@ -99,7 +99,7 @@ clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b
 ..\..\..\odin test ..\test_issue_fast_isel_lowering.odin %COMMON%  || exit /b
 ..\..\..\odin test ..\test_issue_fast_isel_lowering.odin %COMMON% -o:none || exit /b
 ..\..\..\odin test ..\test_issue_equal_proc_dependencies.odin %COMMON%  || exit /b
-..\..\..\odin test ..\test_issue_equal_proc_dependencies.odin %COMMON% -build-mode:obj 2>&1 | find /i /c "Assertion Failure" | findstr /x "0" || exit /b
+..\..\..\odin test ..\test_issue_equal_proc_dependencies.odin %COMMON% -build-mode:obj 2>&1 | find /i /c "missing procedure" | findstr /x "0" || exit /b
 
 @echo off
 
diff --git a/tests/issues/run.sh b/tests/issues/run.sh
index c0684abeb..c4596914c 100755
--- a/tests/issues/run.sh
+++ b/tests/issues/run.sh
@@ -125,7 +125,7 @@ $ODIN test ../test_issue_omitted_field_union.odin $COMMON
 $ODIN test ../test_issue_fast_isel_lowering.odin $COMMON
 $ODIN test ../test_issue_fast_isel_lowering.odin $COMMON -o:none
 $ODIN test ../test_issue_equal_proc_dependencies.odin $COMMON
-if [[ $($ODIN test ../test_issue_equal_proc_dependencies.odin $COMMON -build-mode:obj 2>&1 | grep -ci "Assertion Failure") -eq 0 ]]; then
+if [[ $($ODIN test ../test_issue_equal_proc_dependencies.odin $COMMON -build-mode:obj 2>&1 | grep -ci "missing procedure") -eq 0 ]]; then
 	echo "SUCCESSFUL 1/1"
 else
 	echo "SUCCESSFUL 0/1"

From 66ccc1011c6e13e2a1ddba7ecd15cbf3bffd83bb Mon Sep 17 00:00:00 2001
From: Brad Lewis <22850972+BradLewis@users.noreply.github.com>
Date: Sun, 4 Oct 2026 09:11:04 +1100
Subject: [PATCH 194/215] Fix odin parser assert with invalid for-in stmt

---
 core/odin/parser/parser.odin | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/core/odin/parser/parser.odin b/core/odin/parser/parser.odin
index aabb52923..ff816319e 100644
--- a/core/odin/parser/parser.odin
+++ b/core/odin/parser/parser.odin
@@ -934,8 +934,7 @@ parse_for_stmt :: proc(p: ^Parser) -> ^ast.Stmt {
 						next_token := peek_token(p)
 						if next_token.kind == .In || next_token.kind == .Comma {
 							cond = parse_simple_stmt(p, {.In})
-							if as, ok := cond.derived_stmt.(^ast.Assign_Stmt); ok {
-								assert(as.op.kind == .In)
+							if as, ok := cond.derived_stmt.(^ast.Assign_Stmt); ok && as.op.kind == .In {
 								is_range = true
 							}
 							break general_conds

From 1396a36bd31cc81e90d3e5cd8cab0ca497455db5 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:25:17 +0100
Subject: [PATCH 195/215] Prefer `/OPT:NOICF` when using `-debug` on Windows to
 improve linking performance

---
 src/linker.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/linker.cpp b/src/linker.cpp
index 519480826..c45aa4bd8 100644
--- a/src/linker.cpp
+++ b/src/linker.cpp
@@ -384,6 +384,10 @@ try_cross_linking:;
 
 			if (build_context.ODIN_DEBUG) {
 				link_settings = gb_string_append_fmt(link_settings, " /DEBUG");
+				if (build_context.build_mode != BuildMode_StaticLibrary) {
+					// NOTE(bill): `/opt:ref` would also fold identical functions, which is slow and confuses the debugger
+					link_settings = gb_string_append_fmt(link_settings, " /OPT:NOICF");
+				}
 			}
 
 			gbString object_files = gb_string_make(heap_allocator(), "");

From 55eecd010ab65b60666bdc06750e16425f6a6472 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 09:58:15 +0100
Subject: [PATCH 196/215] In a ternary if expr, large aggregate need to be
 selected through memory

---
 src/llvm_backend_expr.cpp | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index a1e99e7b6..10ad9a367 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -4710,6 +4710,28 @@ gb_internal lbValue lb_build_expr_internal(lbProcedure *p, Ast *expr) {
 	case_ast_node(te, TernaryIfExpr, expr);
 		GB_ASSERT(te->y != nullptr);
 		Type *type = default_type(type_of_expr(expr));
+		LLVMTypeKind type_kind = LLVMGetTypeKind(lb_type(p->module, type));
+		if ((type_kind == LLVMStructTypeKind || type_kind == LLVMArrayTypeKind) && type_size_of(type) > 64) {
+			// NOTE(bill): A large aggregate needs to be selected through memory
+			// as instruction selection splits a `phi` or `select` of it per field
+			lbAddr res = lb_add_local_generated(p, type, false);
+
+			lbBlock *then  = lb_create_block(p, "if.then");
+			lbBlock *done  = lb_create_block(p, "if.done");
+			lbBlock *else_ = lb_create_block(p, "if.else");
+
+			lb_build_cond(p, te->cond, then, else_);
+			lb_start_block(p, then);
+			lb_addr_store(p, res, lb_emit_conv(p, lb_build_expr(p, te->x), type));
+			lb_emit_jump(p, done);
+
+			lb_start_block(p, else_);
+			lb_addr_store(p, res, lb_emit_conv(p, lb_build_expr(p, te->y), type));
+			lb_emit_jump(p, done);
+
+			lb_start_block(p, done);
+			return lb_addr_load(p, res);
+		}
 		if (lb_is_expr_trivial(te->x) && lb_is_expr_trivial(te->y)) {
 			lbValue cond = lb_build_expr(p, te->cond);
 			lbValue x = lb_emit_conv(p, lb_build_expr(p, te->x), type);

From 0ade92df563ef5493e95fcbdb90fadd978df3374 Mon Sep 17 00:00:00 2001
From: "DeadDonuts Corp." <80545411+staledonuts@users.noreply.github.com>
Date: Sun, 4 Oct 2026 11:01:30 +0200
Subject: [PATCH 197/215] Fix glsl mix_vec4 and mix_dvec4 implementations

Fix mix implementation typo bug.
Line 763 and 766  never used the target value to progress y  channel.
---
 core/math/linalg/glsl/linalg_glsl.odin | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/core/math/linalg/glsl/linalg_glsl.odin b/core/math/linalg/glsl/linalg_glsl.odin
index 46ee7a6f7..b8d73fd0a 100644
--- a/core/math/linalg/glsl/linalg_glsl.odin
+++ b/core/math/linalg/glsl/linalg_glsl.odin
@@ -760,10 +760,10 @@ mix :: proc{
 @(require_results) mix_f64  :: proc "c" (x, y, t: f64) -> f64   { return x*(1-t) + y*t }
 @(require_results) mix_vec2 :: proc "c" (x, y, t: vec2) -> vec2 { return {mix(x.x, y.x, t.x), mix(x.y, y.y, t.y)} }
 @(require_results) mix_vec3 :: proc "c" (x, y, t: vec3) -> vec3 { return {mix(x.x, y.x, t.x), mix(x.y, y.y, t.y), mix(x.z, y.z, t.z)} }
-@(require_results) mix_vec4 :: proc "c" (x, y, t: vec4) -> vec4 { return {mix(x.x, y.x, t.x), mix(x.y, y.y, y.y), mix(x.z, y.z, t.z), mix(x.w, y.w, t.w)} }
+@(require_results) mix_vec4 :: proc "c" (x, y, t: vec4) -> vec4 { return {mix(x.x, y.x, t.x), mix(x.y, y.y, t.y), mix(x.z, y.z, t.z), mix(x.w, y.w, t.w)} }
 @(require_results) mix_dvec2 :: proc "c" (x, y, t: dvec2) -> dvec2 { return {mix(x.x, y.x, t.x), mix(x.y, y.y, t.y)} }
 @(require_results) mix_dvec3 :: proc "c" (x, y, t: dvec3) -> dvec3 { return {mix(x.x, y.x, t.x), mix(x.y, y.y, t.y), mix(x.z, y.z, t.z)} }
-@(require_results) mix_dvec4 :: proc "c" (x, y, t: dvec4) -> dvec4 { return {mix(x.x, y.x, t.x), mix(x.y, y.y, y.y), mix(x.z, y.z, t.z), mix(x.w, y.w, t.w)} }
+@(require_results) mix_dvec4 :: proc "c" (x, y, t: dvec4) -> dvec4 { return {mix(x.x, y.x, t.x), mix(x.y, y.y, t.y), mix(x.z, y.z, t.z), mix(x.w, y.w, t.w)} }
 
 lerp :: proc{
 	lerp_f32,

From 6fbc112088454cec05116a68b5c7dc9189751dd8 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 10:05:19 +0100
Subject: [PATCH 198/215] Lower more instructions for the fast instruction
 selector in LLVM

---
 src/llvm_backend.cpp | 100 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 98 insertions(+), 2 deletions(-)

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 2d25e4703..89c9139d8 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2820,6 +2820,98 @@ gb_internal bool lb_scalarize_aggregate_store(lbFastIselLowering *s, LLVMValueRe
 	return true;
 }
 
+// NOTE(bill): If a a constant has too many fields to store one at a time is set or copied from a constant instead
+gb_internal void lb_lower_large_constant_store(lbFastIselLowering *s, LLVMValueRef store) {
+	lbModule *m = s->m;
+	LLVMValueRef value = LLVMGetOperand(store, 0);
+	LLVMValueRef ptr   = LLVMGetOperand(store, 1);
+	LLVMTypeRef  type  = LLVMTypeOf(value);
+
+	LLVMTargetDataRef data_layout = LLVMGetModuleDataLayout(m->mod);
+	unsigned alignment = gb_max(LLVMGetAlignment(store), 1u);
+	if (!LLVMIsAConstant(value) || lb_const_has_misaligned_pointer(data_layout, value, 0, alignment)) {
+		return;
+	}
+
+	LLVMPositionBuilderBefore(s->builder, store);
+	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(store));
+
+	LLVMValueRef size = LLVMConstInt(LLVMInt64TypeInContext(m->ctx), LLVMStoreSizeOfType(data_layout, type), false);
+	if (LLVMIsNull(value)) {
+		LLVMBuildMemSet(s->builder, ptr, LLVMConstInt(LLVMInt8TypeInContext(m->ctx), 0, false), size, alignment);
+		LLVMInstructionEraseFromParent(store);
+		return;
+	}
+
+	LLVMValueRef global = LLVMAddGlobal(m->mod, type, "");
+	LLVMSetInitializer(global, value);
+	LLVMSetGlobalConstant(global, true);
+	LLVMSetAlignment(global, alignment);
+
+	LLVMSetLinkage(global, LLVMPrivateLinkage);
+	LLVMSetUnnamedAddress(global, LLVMGlobalUnnamedAddr);
+
+	LLVMBuildMemCpy(s->builder, ptr, alignment, global, alignment, size);
+
+	LLVMInstructionEraseFromParent(store);
+}
+
+// NOTE(bill): The fast instruction selector in LLVM cannot select a call to `memmove` nor to the floating point `minnum` and `maxnum`.
+// To improve things we can them through a function of the module which calls them
+gb_internal void lb_redirect_unselectable_call(lbFastIselLowering *s, LLVMValueRef call) {
+	lbModule *m = s->m;
+
+	LLVMValueRef callee = LLVMGetCalledValue(call);
+	if (!LLVMIsAFunction(callee)) {
+		return;
+	}
+	size_t      name_len = 0;
+	char const *name_text = LLVMGetValueName2(callee, &name_len);
+	String      name = make_string(cast(u8 const *)name_text, name_len);
+
+	LLVMTypeRef fn_type = LLVMGlobalGetValueType(callee);
+	if (LLVMGetCalledFunctionType(call) != fn_type || LLVMIsFunctionVarArg(fn_type)) {
+		return;
+	}
+	unsigned     param_count = LLVMCountParamTypes(fn_type);
+	LLVMTypeKind return_kind = LLVMGetTypeKind(LLVMGetReturnType(fn_type));
+	bool is_memmove = name == "memmove" && param_count == 3 && return_kind == LLVMPointerTypeKind;
+	bool is_minmax  = (string_starts_with(name, str_lit("llvm.minnum.")) ||
+	                   string_starts_with(name, str_lit("llvm.maxnum."))) &&
+	                  (return_kind == LLVMFloatTypeKind ||
+	                   return_kind == LLVMDoubleTypeKind);
+	if (!is_memmove && !is_minmax) {
+		return;
+	}
+
+	gbString wrapper_name = gb_string_make(heap_allocator(), "__$fast_isel$");
+	wrapper_name          = gb_string_append_length(wrapper_name, name.text, name.len);
+	defer (gb_string_free(wrapper_name));
+
+	LLVMValueRef wrapper = LLVMGetNamedFunction(m->mod, wrapper_name);
+	defer (LLVMSetOperand(call, cast(unsigned)LLVMGetNumOperands(call) - 1, wrapper));
+
+	if (wrapper != nullptr) {
+		return;
+	}
+
+	LLVMCallConv cc = cast(LLVMCallConv)LLVMGetFunctionCallConv(callee);
+	wrapper = LLVMAddFunction(m->mod, wrapper_name, fn_type);
+	LLVMSetLinkage(wrapper, LLVMInternalLinkage);
+	LLVMSetFunctionCallConv(wrapper, cc);
+	lb_add_attribute_to_proc(m, wrapper, "nounwind");
+
+	LLVMValueRef params[3] = {};
+	LLVMGetParams(wrapper, params);
+
+	LLVMPositionBuilderAtEnd(s->builder, LLVMAppendBasicBlockInContext(m->ctx, wrapper, ""));
+	LLVMSetCurrentDebugLocation2(s->builder, nullptr);
+
+	LLVMValueRef inner = LLVMBuildCall2(s->builder, fn_type, callee, params, param_count, "");
+	LLVMSetInstructionCallConv(inner, cc);
+	LLVMBuildRet(s->builder, inner);
+}
+
 gb_internal bool lb_is_aggregate_type(LLVMTypeRef type) {
 	LLVMTypeKind kind = LLVMGetTypeKind(type);
 	return kind == LLVMStructTypeKind || kind == LLVMArrayTypeKind;
@@ -2986,7 +3078,8 @@ gb_internal void lb_lower_for_fast_isel(lbModule *m) {
 	auto work = array_make<LLVMValueRef>(heap_allocator(), 0, 64);
 	defer (array_free(&work));
 
-	for (LLVMValueRef fn = LLVMGetFirstFunction(m->mod); fn != nullptr; fn = LLVMGetNextFunction(fn)) {
+	LLVMValueRef last_fn = LLVMGetLastFunction(m->mod);
+	for (LLVMValueRef fn = LLVMGetFirstFunction(m->mod); fn != nullptr; fn = fn == last_fn ? nullptr : LLVMGetNextFunction(fn)) {
 		array_clear(&work);
 		array_clear(&s.phis);
 
@@ -2998,7 +3091,9 @@ gb_internal void lb_lower_for_fast_isel(lbModule *m) {
 			}
 		}
 		for (LLVMValueRef store : work) {
-			lb_scalarize_aggregate_store(&s, store);
+			if (!lb_scalarize_aggregate_store(&s, store)) {
+				lb_lower_large_constant_store(&s, store);
+			}
 		}
 
 		// NOTE(bill): A field read out of an aggregate value is read where that aggregate came from
@@ -3023,6 +3118,7 @@ gb_internal void lb_lower_for_fast_isel(lbModule *m) {
 			}
 			if (LLVMIsACallInst(i)) {
 				lb_truncate_bool_arguments(&s, i);
+				lb_redirect_unselectable_call(&s, i);
 				continue;
 			}
 			if (LLVMIsASwitchInst(i)) {

From ddcf115f6f891aa50046577c2922340aa84744ed Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 10:12:35 +0100
Subject: [PATCH 199/215] Implement the same large aggregate improvement for
 `or_else`

---
 src/llvm_backend_expr.cpp    |  3 +--
 src/llvm_backend_utility.cpp | 24 ++++++++++++++++++++++++
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp
index 10ad9a367..de9aee30b 100644
--- a/src/llvm_backend_expr.cpp
+++ b/src/llvm_backend_expr.cpp
@@ -4710,8 +4710,7 @@ gb_internal lbValue lb_build_expr_internal(lbProcedure *p, Ast *expr) {
 	case_ast_node(te, TernaryIfExpr, expr);
 		GB_ASSERT(te->y != nullptr);
 		Type *type = default_type(type_of_expr(expr));
-		LLVMTypeKind type_kind = LLVMGetTypeKind(lb_type(p->module, type));
-		if ((type_kind == LLVMStructTypeKind || type_kind == LLVMArrayTypeKind) && type_size_of(type) > 64) {
+		if (lb_is_type_large_aggregate(p->module, type)) {
 			// NOTE(bill): A large aggregate needs to be selected through memory
 			// as instruction selection splits a `phi` or `select` of it per field
 			lbAddr res = lb_add_local_generated(p, type, false);
diff --git a/src/llvm_backend_utility.cpp b/src/llvm_backend_utility.cpp
index aa33073c5..a4385c883 100644
--- a/src/llvm_backend_utility.cpp
+++ b/src/llvm_backend_utility.cpp
@@ -489,6 +489,11 @@ gb_internal bool lb_is_type_trivial(Type *type) {
 	return false;
 }
 
+gb_internal bool lb_is_type_large_aggregate(lbModule *m, Type *type) {
+	LLVMTypeKind kind = LLVMGetTypeKind(lb_type(m, type));
+	return (kind == LLVMStructTypeKind || kind == LLVMArrayTypeKind) && type_size_of(type) > 64;
+}
+
 gb_internal bool lb_is_expr_trivial(Ast *e) {
 	Type *type = default_type(type_of_expr(e));
 	if (lb_is_type_trivial(type)) {
@@ -556,6 +561,25 @@ gb_internal lbValue lb_emit_or_else(lbProcedure *p, Ast *arg, Ast *else_expr, Ty
 		}
 		return {};
 	} else {
+		if (lb_is_type_large_aggregate(p->module, type)) {
+			lbAddr res = lb_add_local_generated(p, type, false);
+
+			lbBlock *then  = lb_create_block(p, "or_else.then");
+			lbBlock *done  = lb_create_block(p, "or_else.done");
+			lbBlock *else_ = lb_create_block(p, "or_else.else");
+
+			lb_emit_if(p, lb_emit_try_has_value(p, rhs), then, else_);
+			lb_start_block(p, then);
+			lb_addr_store(p, res, lb_emit_conv(p, lhs, type));
+			lb_emit_jump(p, done);
+
+			lb_start_block(p, else_);
+			lb_addr_store(p, res, lb_emit_conv(p, lb_build_expr(p, else_expr), type));
+			lb_emit_jump(p, done);
+
+			lb_start_block(p, done);
+			return lb_addr_load(p, res);
+		}
 		if (lb_is_type_trivial(type) && lb_is_expr_trivial(else_expr)) {
 			lbValue has_value = lb_emit_try_has_value(p, rhs);
 			lbValue then_val = lb_emit_conv(p, lhs, type);

From ccf1ae4fe9d3988f3cdf6285dc9441bfd342f325 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 10:16:50 +0100
Subject: [PATCH 200/215] Move the lowering for LLVM's fast instruction
 selector to `llvm_backend_opt.cpp`

---
 src/llvm_backend.cpp         | 621 -----------------------------------
 src/llvm_backend.hpp         |   3 +
 src/llvm_backend_general.cpp |   2 +-
 src/llvm_backend_opt.cpp     | 619 ++++++++++++++++++++++++++++++++++
 4 files changed, 623 insertions(+), 622 deletions(-)

diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp
index 89c9139d8..134b776aa 100644
--- a/src/llvm_backend.cpp
+++ b/src/llvm_backend.cpp
@@ -2546,627 +2546,6 @@ gb_internal bool lb_is_module_empty(lbModule *m) {
 	return true;
 }
 
-// NOTE(bill, 2026-10-03)
-//
-// LLVM's fast instruction selector cannot select a first class aggregate `load`, `store`, `insertvalue`, or `select`,
-// and hands the rest of the block to SelectionDAG.
-// SROA leaves many behind so it stores/loads the fields instead
-enum {
-	LB_SCALARIZE_MAX_LEAVES = 32,
-	LB_SCALARIZE_MAX_DEPTH  = 8,
-};
-
-struct lbAggregateLeaf {
-	unsigned path[LB_SCALARIZE_MAX_DEPTH];
-	unsigned depth;
-};
-
-struct lbScalarizedPhi {
-	LLVMValueRef aggregate;
-	unsigned     path[LB_SCALARIZE_MAX_DEPTH];
-	unsigned     depth;
-	LLVMValueRef field;
-	bool         ok;
-};
-
-struct lbFastIselLowering {
-	lbModule *     m;
-	LLVMBuilderRef builder;
-	LLVMValueRef   store;
-	Array<lbScalarizedPhi> phis;
-};
-
-gb_internal i64 lb_aggregate_path_offset(LLVMTypeRef type, unsigned const *path, unsigned depth, LLVMTypeRef *leaf_type_) {
-	i64 offset = 0;
-	for (unsigned d = 0; d < depth; d++) {
-		if (LLVMGetTypeKind(type) == LLVMStructTypeKind) {
-			bool is_packed = LLVMIsPackedStruct(type);
-			i64 field_offset = 0;
-			for (unsigned i = 0; i <= path[d]; i++) {
-				LLVMTypeRef field = LLVMStructGetTypeAtIndex(type, i);
-				if (!is_packed) {
-					field_offset = llvm_align_formula(field_offset, lb_alignof(field));
-				}
-				if (i == path[d]) {
-					type = field;
-					break;
-				}
-				field_offset += lb_sizeof(field);
-			}
-			offset += field_offset;
-		} else {
-			type = OdinLLVMGetArrayElementType(type);
-			offset += cast(i64)path[d] * lb_sizeof(type);
-		}
-	}
-	if (leaf_type_) *leaf_type_ = type;
-	return offset;
-}
-
-gb_internal bool lb_aggregate_leaves(LLVMTypeRef type, unsigned *path, unsigned depth, lbAggregateLeaf *leaves, isize *leaf_count) {
-	LLVMTypeKind kind = LLVMGetTypeKind(type);
-	if (kind == LLVMStructTypeKind || kind == LLVMArrayTypeKind) {
-		if (depth >= LB_SCALARIZE_MAX_DEPTH) {
-			return false;
-		}
-		if (kind == LLVMStructTypeKind && LLVMIsOpaqueStruct(type)) {
-			return false;
-		}
-		unsigned count = kind == LLVMStructTypeKind ? LLVMCountStructElementTypes(type) : cast(unsigned)LLVMGetArrayLength(type);
-		for (unsigned i = 0; i < count; i++) {
-			path[depth] = i;
-			LLVMTypeRef elem = kind == LLVMStructTypeKind ? LLVMStructGetTypeAtIndex(type, i) : OdinLLVMGetArrayElementType(type);
-			if (!lb_aggregate_leaves(elem, path, depth+1, leaves, leaf_count)) {
-				return false;
-			}
-		}
-		return true;
-	}
-
-	if (*leaf_count >= LB_SCALARIZE_MAX_LEAVES) {
-		return false;
-	}
-
-	lbAggregateLeaf *leaf = &leaves[(*leaf_count)++];
-	gb_memmove(leaf->path, path, depth*gb_size_of(unsigned));
-	leaf->depth = depth;
-	return true;
-}
-
-gb_internal unsigned lb_alignment_at_offset(unsigned alignment, i64 offset) {
-	unsigned a = gb_max(alignment, 1u);
-	while (offset % a != 0) {
-		a >>= 1;
-	}
-	return a;
-}
-
-gb_internal LLVMValueRef lb_aggregate_field_gep(lbModule *m, LLVMBuilderRef b, LLVMTypeRef type, LLVMValueRef ptr, unsigned const *path, unsigned depth) {
-	LLVMValueRef indices[LB_SCALARIZE_MAX_DEPTH+1] = {};
-	LLVMTypeRef i32 = LLVMInt32TypeInContext(m->ctx);
-	indices[0] = LLVMConstInt(i32, 0, false);
-	for (unsigned d = 0; d < depth; d++) {
-		indices[d+1] = LLVMConstInt(i32, path[d], false);
-	}
-	return LLVMBuildInBoundsGEP2(b, type, ptr, indices, depth+1, "");
-}
-
-// returns false if the field cannot be reached without an aggregate value, and sets `*field_` to nullptr when it is undefined
-gb_internal bool lb_aggregate_field_value(lbFastIselLowering *s, LLVMValueRef v, unsigned const *path, unsigned depth, LLVMValueRef *field_) {
-	if (depth == 0) {
-		*field_ = (LLVMIsUndef(v) || LLVMIsPoison(v)) ? nullptr : v;
-		return true;
-	}
-	if (LLVMIsUndef(v) || LLVMIsPoison(v)) {
-		*field_ = nullptr;
-		return true;
-	}
-
-	if (LLVMIsAConstant(v)) {
-		LLVMValueRef elem = LLVMGetAggregateElement(v, path[0]);
-		if (elem != nullptr) {
-			return lb_aggregate_field_value(s, elem, path+1, depth-1, field_);
-		}
-	} else if (LLVMIsAInsertValueInst(v)) {
-		unsigned n = LLVMGetNumIndices(v);
-		unsigned const *indices = LLVMGetIndices(v);
-
-		unsigned k = 0;
-		while (k < n && k < depth && indices[k] == path[k]) {
-			k += 1;
-		}
-
-		if (k == n) {
-			return lb_aggregate_field_value(s, LLVMGetOperand(v, 1), path+n, depth-n, field_);
-		} else if (k < depth) {
-			return lb_aggregate_field_value(s, LLVMGetOperand(v, 0), path, depth, field_);
-		}
-		return false;
-	} else if (LLVMIsAExtractValueInst(v)) {
-		unsigned n = LLVMGetNumIndices(v);
-		if (n + depth <= LB_SCALARIZE_MAX_DEPTH) {
-			unsigned full[LB_SCALARIZE_MAX_DEPTH];
-			gb_memmove(full, LLVMGetIndices(v), n*gb_size_of(unsigned));
-			gb_memmove(full+n, path, depth*gb_size_of(unsigned));
-			return lb_aggregate_field_value(s, LLVMGetOperand(v, 0), full, n+depth, field_);
-		}
-		return false;
-	} else if (LLVMIsASelectInst(v)) {
-		LLVMValueRef x = nullptr;
-		LLVMValueRef y = nullptr;
-		if (!lb_aggregate_field_value(s, LLVMGetOperand(v, 1), path, depth, &x) ||
-		    !lb_aggregate_field_value(s, LLVMGetOperand(v, 2), path, depth, &y)) {
-			return false;
-		}
-		if (x == nullptr || y == nullptr) {
-			*field_ = x ? x : y;
-			return true;
-		}
-		LLVMPositionBuilderBefore(s->builder, s->store);
-		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(s->store));
-		*field_ = LLVMBuildSelect(s->builder, LLVMGetOperand(v, 0), x, y, "");
-		return true;
-	} else if (LLVMIsAPHINode(v)) {
-		for (lbScalarizedPhi const &e : s->phis) {
-			if (e.aggregate == v &&
-			    e.depth == depth &&
-			    gb_memcompare(e.path, path, depth*gb_size_of(unsigned)) == 0) {
-				*field_ = e.field;
-				return e.ok;
-			}
-		}
-
-		LLVMTypeRef field_type = nullptr;
-		lb_aggregate_path_offset(LLVMTypeOf(v), path, depth, &field_type);
-
-		LLVMPositionBuilderBefore(s->builder, v);
-		LLVMSetCurrentDebugLocation2(s->builder, nullptr);
-
-
-		// NOTE(bill): cached before its incoming values, as a loop reaches it again
-		isize index = s->phis.count;
-		lbScalarizedPhi entry = {};
-		entry.aggregate = v;
-		gb_memmove(entry.path, path, depth*gb_size_of(unsigned));
-
-		LLVMValueRef phi = LLVMBuildPhi(s->builder, field_type, "");
-		entry.depth = depth;
-		entry.field = phi;
-		entry.ok    = true;
-		array_add(&s->phis, entry);
-
-		LLVMValueRef saved_store = s->store;
-		bool ok = true;
-		unsigned incoming_count = LLVMCountIncoming(v);
-		for (unsigned k = 0; k < incoming_count; k++) {
-			LLVMBasicBlockRef block = LLVMGetIncomingBlock(v, k);
-			s->store = LLVMGetBasicBlockTerminator(block);
-			LLVMValueRef field = nullptr;
-			if (!lb_aggregate_field_value(s, LLVMGetIncomingValue(v, k), path, depth, &field)) {
-				ok = false;
-				field = nullptr;
-			}
-			if (field == nullptr) {
-				field = LLVMGetUndef(field_type);
-			}
-			LLVMAddIncoming(phi, &field, &block, 1);
-		}
-		s->store = saved_store;
-		s->phis[index].ok = ok;
-		*field_ = phi;
-		return ok;
-	} else if (LLVMIsALoadInst(v) && !LLVMGetVolatile(v) && LLVMGetOrdering(v) == LLVMAtomicOrderingNotAtomic) {
-		// NOTE(bill): Read the field where the aggregate was read, as the memory may change before the store
-		LLVMTypeRef type       = LLVMTypeOf(v);
-		LLVMTypeRef field_type = nullptr;
-		i64 offset = lb_aggregate_path_offset(type, path, depth, &field_type);
-
-		LLVMPositionBuilderBefore(s->builder, LLVMGetNextInstruction(v));
-		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(v));
-
-		LLVMValueRef ptr   = lb_aggregate_field_gep(s->m, s->builder, type, LLVMGetOperand(v, 0), path, depth);
-		LLVMValueRef field = LLVMBuildLoad2(s->builder, field_type, ptr, "");
-		LLVMSetAlignment(field, lb_alignment_at_offset(LLVMGetAlignment(v), offset));
-
-		*field_ = field;
-		return true;
-	}
-
-	if (depth == 1) {
-		LLVMPositionBuilderBefore(s->builder, s->store);
-		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(s->store));
-		*field_ = LLVMBuildExtractValue(s->builder, v, path[0], "");
-		return true;
-	}
-	return false;
-}
-
-gb_internal bool lb_scalarize_aggregate_store(lbFastIselLowering *s, LLVMValueRef store) {
-	LLVMValueRef value = LLVMGetOperand(store, 0);
-	LLVMValueRef ptr   = LLVMGetOperand(store, 1);
-	LLVMTypeRef  type  = LLVMTypeOf(value);
-
-	lbAggregateLeaf leaves[LB_SCALARIZE_MAX_LEAVES] = {};
-	isize leaf_count = 0;
-	unsigned path[LB_SCALARIZE_MAX_DEPTH] = {};
-
-	if (!lb_aggregate_leaves(type, path, 0, leaves, &leaf_count)) {
-		return false;
-	}
-	s->store = store;
-
-	LLVMValueRef fields[LB_SCALARIZE_MAX_LEAVES] = {};
-	for (isize i = 0; i < leaf_count; i++) {
-		if (!lb_aggregate_field_value(s, value, leaves[i].path, leaves[i].depth, &fields[i])) {
-			return false;
-		}
-	}
-
-	unsigned alignment = LLVMGetAlignment(store);
-
-	LLVMPositionBuilderBefore(s->builder, store);
-	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(store));
-
-	for (isize i = 0; i < leaf_count; i++) {
-		if (fields[i] == nullptr) {
-			continue;
-		}
-		i64 offset = lb_aggregate_path_offset(type, leaves[i].path, leaves[i].depth, nullptr);
-		LLVMValueRef field_ptr = lb_aggregate_field_gep(s->m, s->builder, type, ptr, leaves[i].path, leaves[i].depth);
-		LLVMValueRef field_store = LLVMBuildStore(s->builder, fields[i], field_ptr);
-		LLVMSetAlignment(field_store, lb_alignment_at_offset(alignment, offset));
-	}
-	LLVMInstructionEraseFromParent(store);
-	return true;
-}
-
-// NOTE(bill): If a a constant has too many fields to store one at a time is set or copied from a constant instead
-gb_internal void lb_lower_large_constant_store(lbFastIselLowering *s, LLVMValueRef store) {
-	lbModule *m = s->m;
-	LLVMValueRef value = LLVMGetOperand(store, 0);
-	LLVMValueRef ptr   = LLVMGetOperand(store, 1);
-	LLVMTypeRef  type  = LLVMTypeOf(value);
-
-	LLVMTargetDataRef data_layout = LLVMGetModuleDataLayout(m->mod);
-	unsigned alignment = gb_max(LLVMGetAlignment(store), 1u);
-	if (!LLVMIsAConstant(value) || lb_const_has_misaligned_pointer(data_layout, value, 0, alignment)) {
-		return;
-	}
-
-	LLVMPositionBuilderBefore(s->builder, store);
-	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(store));
-
-	LLVMValueRef size = LLVMConstInt(LLVMInt64TypeInContext(m->ctx), LLVMStoreSizeOfType(data_layout, type), false);
-	if (LLVMIsNull(value)) {
-		LLVMBuildMemSet(s->builder, ptr, LLVMConstInt(LLVMInt8TypeInContext(m->ctx), 0, false), size, alignment);
-		LLVMInstructionEraseFromParent(store);
-		return;
-	}
-
-	LLVMValueRef global = LLVMAddGlobal(m->mod, type, "");
-	LLVMSetInitializer(global, value);
-	LLVMSetGlobalConstant(global, true);
-	LLVMSetAlignment(global, alignment);
-
-	LLVMSetLinkage(global, LLVMPrivateLinkage);
-	LLVMSetUnnamedAddress(global, LLVMGlobalUnnamedAddr);
-
-	LLVMBuildMemCpy(s->builder, ptr, alignment, global, alignment, size);
-
-	LLVMInstructionEraseFromParent(store);
-}
-
-// NOTE(bill): The fast instruction selector in LLVM cannot select a call to `memmove` nor to the floating point `minnum` and `maxnum`.
-// To improve things we can them through a function of the module which calls them
-gb_internal void lb_redirect_unselectable_call(lbFastIselLowering *s, LLVMValueRef call) {
-	lbModule *m = s->m;
-
-	LLVMValueRef callee = LLVMGetCalledValue(call);
-	if (!LLVMIsAFunction(callee)) {
-		return;
-	}
-	size_t      name_len = 0;
-	char const *name_text = LLVMGetValueName2(callee, &name_len);
-	String      name = make_string(cast(u8 const *)name_text, name_len);
-
-	LLVMTypeRef fn_type = LLVMGlobalGetValueType(callee);
-	if (LLVMGetCalledFunctionType(call) != fn_type || LLVMIsFunctionVarArg(fn_type)) {
-		return;
-	}
-	unsigned     param_count = LLVMCountParamTypes(fn_type);
-	LLVMTypeKind return_kind = LLVMGetTypeKind(LLVMGetReturnType(fn_type));
-	bool is_memmove = name == "memmove" && param_count == 3 && return_kind == LLVMPointerTypeKind;
-	bool is_minmax  = (string_starts_with(name, str_lit("llvm.minnum.")) ||
-	                   string_starts_with(name, str_lit("llvm.maxnum."))) &&
-	                  (return_kind == LLVMFloatTypeKind ||
-	                   return_kind == LLVMDoubleTypeKind);
-	if (!is_memmove && !is_minmax) {
-		return;
-	}
-
-	gbString wrapper_name = gb_string_make(heap_allocator(), "__$fast_isel$");
-	wrapper_name          = gb_string_append_length(wrapper_name, name.text, name.len);
-	defer (gb_string_free(wrapper_name));
-
-	LLVMValueRef wrapper = LLVMGetNamedFunction(m->mod, wrapper_name);
-	defer (LLVMSetOperand(call, cast(unsigned)LLVMGetNumOperands(call) - 1, wrapper));
-
-	if (wrapper != nullptr) {
-		return;
-	}
-
-	LLVMCallConv cc = cast(LLVMCallConv)LLVMGetFunctionCallConv(callee);
-	wrapper = LLVMAddFunction(m->mod, wrapper_name, fn_type);
-	LLVMSetLinkage(wrapper, LLVMInternalLinkage);
-	LLVMSetFunctionCallConv(wrapper, cc);
-	lb_add_attribute_to_proc(m, wrapper, "nounwind");
-
-	LLVMValueRef params[3] = {};
-	LLVMGetParams(wrapper, params);
-
-	LLVMPositionBuilderAtEnd(s->builder, LLVMAppendBasicBlockInContext(m->ctx, wrapper, ""));
-	LLVMSetCurrentDebugLocation2(s->builder, nullptr);
-
-	LLVMValueRef inner = LLVMBuildCall2(s->builder, fn_type, callee, params, param_count, "");
-	LLVMSetInstructionCallConv(inner, cc);
-	LLVMBuildRet(s->builder, inner);
-}
-
-gb_internal bool lb_is_aggregate_type(LLVMTypeRef type) {
-	LLVMTypeKind kind = LLVMGetTypeKind(type);
-	return kind == LLVMStructTypeKind || kind == LLVMArrayTypeKind;
-}
-
-gb_internal bool lb_is_plain_access(LLVMValueRef inst) {
-	return !LLVMGetVolatile(inst) && LLVMGetOrdering(inst) == LLVMAtomicOrderingNotAtomic;
-}
-
-gb_internal void lb_lower_bool_select(lbFastIselLowering *s, LLVMValueRef select) {
-	LLVMValueRef c = LLVMGetOperand(select, 0);
-	LLVMValueRef x = LLVMGetOperand(select, 1);
-	LLVMValueRef y = LLVMGetOperand(select, 2);
-	if (LLVMGetTypeKind(LLVMTypeOf(c)) != LLVMIntegerTypeKind) {
-		return;
-	}
-	LLVMPositionBuilderBefore(s->builder, select);
-	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(select));
-	LLVMValueRef t = LLVMConstInt(LLVMTypeOf(c), 1, false);
-
-	LLVMValueRef res = nullptr;
-	if (LLVMIsAConstantInt(x)) {
-		res = LLVMConstIntGetZExtValue(x) ? LLVMBuildOr(s->builder, c, y, "") : LLVMBuildAnd(s->builder, LLVMBuildXor(s->builder, c, t, ""), y, "");
-	} else if (LLVMIsAConstantInt(y)) {
-		res = LLVMConstIntGetZExtValue(y) ? LLVMBuildOr(s->builder, LLVMBuildXor(s->builder, c, t, ""), x, "") : LLVMBuildAnd(s->builder, c, x, "");
-	} else {
-		LLVMValueRef a = LLVMBuildAnd(s->builder, c, x, "");
-		LLVMValueRef b = LLVMBuildAnd(s->builder, LLVMBuildXor(s->builder, c, t, ""), y, "");
-		res = LLVMBuildOr(s->builder, a, b, "");
-	}
-	LLVMReplaceAllUsesWith(select, res);
-	LLVMInstructionEraseFromParent(select);
-}
-
-gb_internal void lb_truncate_bool_arguments(lbFastIselLowering *s, LLVMValueRef call) {
-	LLVMTypeRef i1 = LLVMInt1TypeInContext(s->m->ctx);
-	LLVMTypeRef i8 = LLVMInt8TypeInContext(s->m->ctx);
-	LLVMBasicBlockRef block = LLVMGetInstructionParent(call);
-	unsigned arg_count = LLVMGetNumArgOperands(call);
-	for (unsigned a = 0; a < arg_count; a++) {
-		LLVMValueRef arg = LLVMGetOperand(call, a);
-		if (LLVMTypeOf(arg) != i1 || LLVMIsAConstantInt(arg)) {
-			continue;
-		}
-		LLVMUseRef first_use = LLVMGetFirstUse(arg);
-		if (LLVMIsATruncInst(arg) && LLVMGetInstructionParent(arg) == block &&
-		    first_use != nullptr && LLVMGetNextUse(first_use) == nullptr) {
-			continue;
-		}
-		LLVMPositionBuilderBefore(s->builder, call);
-		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(call));
-		LLVMValueRef byte = LLVMBuildZExt(s->builder, arg, i8, "");
-		LLVMSetOperand(call, a, LLVMBuildTrunc(s->builder, byte, i1, ""));
-	}
-}
-
-gb_internal void lb_lower_small_switch(lbFastIselLowering *s, LLVMValueRef sw) {
-	enum {MAX_CASES = 3};
-	LLVMValueRef cond = LLVMGetOperand(sw, 0);
-	unsigned case_count = (cast(unsigned)LLVMGetNumOperands(sw) - 2) / 2;
-	if (case_count == 0 || case_count > MAX_CASES || LLVMGetIntTypeWidth(LLVMTypeOf(cond)) > 64) {
-		return;
-	}
-
-	LLVMBasicBlockRef block      = LLVMGetInstructionParent(sw);
-	LLVMBasicBlockRef next_block = LLVMGetNextBasicBlock(block);
-
-	LLVMValueRef fn     = LLVMGetBasicBlockParent(block);
-	LLVMMetadataRef loc = LLVMInstructionGetDebugLoc(sw);
-
-	LLVMBasicBlockRef from[MAX_CASES+1] = {};
-	LLVMBasicBlockRef to  [MAX_CASES+1] = {};
-
-	LLVMBasicBlockRef curr = block;
-
-	LLVMPositionBuilderBefore(s->builder, sw);
-	LLVMSetCurrentDebugLocation2(s->builder, loc);
-
-	for (unsigned j = 0; j < case_count; j++) {
-		LLVMBasicBlockRef dest = LLVMGetSuccessor(sw, j+1);
-		LLVMBasicBlockRef else_block = LLVMGetSwitchDefaultDest(sw);
-		if (j+1 < case_count) {
-			if (next_block != nullptr) {
-				else_block = LLVMInsertBasicBlockInContext(s->m->ctx, next_block, "");
-			} else {
-				else_block = LLVMAppendBasicBlockInContext(s->m->ctx, fn, "");
-			}
-		}
-
-		LLVMValueRef cmp = LLVMBuildICmp(s->builder, LLVMIntEQ, cond, LLVMGetOperand(sw, 2 + 2*j), "");
-		LLVMBuildCondBr(s->builder, cmp, dest, else_block);
-
-		from[j] = curr;
-		to[j]   = dest;
-
-		if (j+1 < case_count) {
-			curr = else_block;
-			LLVMPositionBuilderAtEnd(s->builder, curr);
-			LLVMSetCurrentDebugLocation2(s->builder, loc);
-		}
-	}
-	from[case_count] = curr;
-	to  [case_count] = LLVMGetSwitchDefaultDest(sw);
-	LLVMInstructionEraseFromParent(sw);
-
-	// the incoming entries for `block` become one for each new edge
-	for (unsigned e = 0; e <= case_count; e++) {
-		bool seen = false;
-		for (unsigned k = 0; k < e; k++) {
-			seen |= to[k] == to[e];
-		}
-		if (seen) {
-			continue;
-		}
-
-		LLVMBasicBlockRef dest = to[e];
-		for (LLVMValueRef phi = LLVMGetFirstInstruction(dest); phi != nullptr && LLVMIsAPHINode(phi); /**/) {
-			LLVMValueRef next             = LLVMGetNextInstruction(phi);
-			LLVMValueRef value_from_block = nullptr;
-
-			unsigned incoming_count = LLVMCountIncoming(phi);
-			for (unsigned k = 0; k < incoming_count; k++) {
-				if (LLVMGetIncomingBlock(phi, k) == block) {
-					value_from_block = LLVMGetIncomingValue(phi, k);
-				}
-			}
-
-			if (value_from_block != nullptr) {
-				LLVMPositionBuilderBefore(s->builder, phi);
-				LLVMSetCurrentDebugLocation2(s->builder, nullptr);
-
-				LLVMValueRef new_phi = LLVMBuildPhi(s->builder, LLVMTypeOf(phi), "");
-				for (unsigned k = 0; k < incoming_count; k++) {
-					LLVMBasicBlockRef incoming_block = LLVMGetIncomingBlock(phi, k);
-					if (incoming_block != block) {
-						LLVMValueRef incoming_value = LLVMGetIncomingValue(phi, k);
-						LLVMAddIncoming(new_phi, &incoming_value, &incoming_block, 1);
-					}
-				}
-				for (unsigned k = 0; k <= case_count; k++) {
-					if (to[k] == dest) {
-						LLVMAddIncoming(new_phi, &value_from_block, &from[k], 1);
-					}
-				}
-				LLVMReplaceAllUsesWith(phi, new_phi);
-				LLVMInstructionEraseFromParent(phi);
-			}
-
-			phi = next;
-		}
-	}
-}
-
-gb_internal void lb_lower_for_fast_isel(lbModule *m) {
-	lbFastIselLowering s = {};
-	s.m = m;
-
-	s.builder = LLVMCreateBuilderInContext(m->ctx);
-	defer (LLVMDisposeBuilder(s.builder));
-
-	array_init(&s.phis, heap_allocator());
-	defer (array_free(&s.phis));
-
-	auto work = array_make<LLVMValueRef>(heap_allocator(), 0, 64);
-	defer (array_free(&work));
-
-	LLVMValueRef last_fn = LLVMGetLastFunction(m->mod);
-	for (LLVMValueRef fn = LLVMGetFirstFunction(m->mod); fn != nullptr; fn = fn == last_fn ? nullptr : LLVMGetNextFunction(fn)) {
-		array_clear(&work);
-		array_clear(&s.phis);
-
-		for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
-			for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; i = LLVMGetNextInstruction(i)) {
-				if (LLVMIsAStoreInst(i) && lb_is_plain_access(i) && lb_is_aggregate_type(LLVMTypeOf(LLVMGetOperand(i, 0)))) {
-					array_add(&work, i);
-				}
-			}
-		}
-		for (LLVMValueRef store : work) {
-			if (!lb_scalarize_aggregate_store(&s, store)) {
-				lb_lower_large_constant_store(&s, store);
-			}
-		}
-
-		// NOTE(bill): A field read out of an aggregate value is read where that aggregate came from
-		array_clear(&work);
-		for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
-			for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; i = LLVMGetNextInstruction(i)) {
-				if (LLVMIsAExtractValueInst(i) && !lb_is_aggregate_type(LLVMTypeOf(i))) {
-					array_add(&work, i);
-				} else if (LLVMIsASelectInst(i) && LLVMTypeOf(i) == LLVMInt1TypeInContext(m->ctx)) {
-					array_add(&work, i);
-				} else if (LLVMIsACallInst(i)) {
-					array_add(&work, i);
-				} else if (LLVMIsASwitchInst(i)) {
-					array_add(&work, i);
-				}
-			}
-		}
-		for (LLVMValueRef i : work) {
-			if (LLVMIsASelectInst(i)) {
-				lb_lower_bool_select(&s, i);
-				continue;
-			}
-			if (LLVMIsACallInst(i)) {
-				lb_truncate_bool_arguments(&s, i);
-				lb_redirect_unselectable_call(&s, i);
-				continue;
-			}
-			if (LLVMIsASwitchInst(i)) {
-				lb_lower_small_switch(&s, i);
-				continue;
-			}
-			LLVMValueRef agg = LLVMGetOperand(i, 0);
-			unsigned n = LLVMGetNumIndices(i);
-			if (n > LB_SCALARIZE_MAX_DEPTH) {
-				continue;
-			}
-
-			if (!(LLVMIsAConstant(agg)        ||
-			      LLVMIsAInsertValueInst(agg) ||
-			      LLVMIsASelectInst(agg)      ||
-			      LLVMIsAPHINode(agg)         ||
-			      (LLVMIsALoadInst(agg) && lb_is_plain_access(agg)))) {
-				continue;
-			}
-
-			s.store = i;
-
-			LLVMValueRef field = nullptr;
-			if (lb_aggregate_field_value(&s, agg, LLVMGetIndices(i), n, &field) && field != nullptr) {
-				LLVMReplaceAllUsesWith(i, field);
-				LLVMInstructionEraseFromParent(i);
-			}
-		}
-
-		bool removed = true;
-		while (removed) {
-			removed = false;
-			for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
-				for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; /**/) {
-					LLVMValueRef next = LLVMGetNextInstruction(i);
-					if (LLVMGetFirstUse(i) == nullptr &&
-					    (LLVMIsAInsertValueInst(i) || LLVMIsAExtractValueInst(i) || LLVMIsASelectInst(i) || LLVMIsAPHINode(i) ||
-					     LLVMIsAGetElementPtrInst(i) || (LLVMIsALoadInst(i) && lb_is_plain_access(i)))) {
-						LLVMInstructionEraseFromParent(i);
-						removed = true;
-					}
-					i = next;
-				}
-			}
-		}
-	}
-}
-
 struct lbLLVMEmitWorker {
 	LLVMTargetMachineRef target_machine;
 	LLVMCodeGenFileType code_gen_file_type;
diff --git a/src/llvm_backend.hpp b/src/llvm_backend.hpp
index 7a3b12575..5bc9c95ff 100644
--- a/src/llvm_backend.hpp
+++ b/src/llvm_backend.hpp
@@ -630,6 +630,9 @@ gb_internal void lb_mem_copy_non_overlapping(lbProcedure *p, lbValue dst, lbValu
 gb_internal LLVMValueRef lb_mem_zero_ptr_internal(lbProcedure *p, LLVMValueRef ptr, LLVMValueRef len, unsigned alignment, bool is_volatile);
 gb_internal LLVMValueRef lb_mem_zero_ptr_internal(lbProcedure *p, LLVMValueRef ptr, usize len, unsigned alignment, bool is_volatile);
 
+gb_internal bool lb_const_has_misaligned_pointer(LLVMTargetDataRef td, LLVMValueRef c, u64 offset, u64 base_align);
+gb_internal void lb_add_attribute_to_proc(lbModule *m, LLVMValueRef proc_value, char const *name, u64 value=0);
+
 gb_internal gb_inline i64 lb_max_zero_init_size(void) {
 	if (build_context.metrics.os == TargetOs_darwin && build_context.metrics.arch == TargetArch_arm64) {
 		// https://github.com/odin-lang/Odin/issues/6347
diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp
index 9893debbf..5d26220ac 100644
--- a/src/llvm_backend_general.cpp
+++ b/src/llvm_backend_general.cpp
@@ -3514,7 +3514,7 @@ gb_internal void lb_add_nocapture_proc_attribute_at_index(lbProcedure *p, isize
 	LLVMAddAttributeAtIndex(p->value, cast(unsigned)index, lb_create_nocapture_attribute(p->module->ctx));
 }
 
-gb_internal void lb_add_attribute_to_proc(lbModule *m, LLVMValueRef proc_value, char const *name, u64 value=0) {
+gb_internal void lb_add_attribute_to_proc(lbModule *m, LLVMValueRef proc_value, char const *name, u64 value) {
 	LLVMAddAttributeAtIndex(proc_value, LLVMAttributeIndex_FunctionIndex, lb_create_enum_attribute(m->ctx, name, value));
 }
 
diff --git a/src/llvm_backend_opt.cpp b/src/llvm_backend_opt.cpp
index 0f925301c..4df0cc27b 100644
--- a/src/llvm_backend_opt.cpp
+++ b/src/llvm_backend_opt.cpp
@@ -488,4 +488,623 @@ gb_internal void lb_run_remove_unused_globals_pass(lbModule *m) {
 	}
 }
 
+// NOTE(bill, 2026-10-03)
+//
+// LLVM's fast instruction selector cannot select a first class aggregate `load`, `store`, `insertvalue`, or `select`,
+// and hands the rest of the block to SelectionDAG.
+// SROA leaves many behind so it stores/loads the fields instead
+enum {
+	LB_SCALARIZE_MAX_LEAVES = 32,
+	LB_SCALARIZE_MAX_DEPTH  = 8,
+};
 
+struct lbAggregateLeaf {
+	unsigned path[LB_SCALARIZE_MAX_DEPTH];
+	unsigned depth;
+};
+
+struct lbScalarizedPhi {
+	LLVMValueRef aggregate;
+	unsigned     path[LB_SCALARIZE_MAX_DEPTH];
+	unsigned     depth;
+	LLVMValueRef field;
+	bool         ok;
+};
+
+struct lbFastIselLowering {
+	lbModule *     m;
+	LLVMBuilderRef builder;
+	LLVMValueRef   store;
+	Array<lbScalarizedPhi> phis;
+};
+
+gb_internal i64 lb_aggregate_path_offset(LLVMTypeRef type, unsigned const *path, unsigned depth, LLVMTypeRef *leaf_type_) {
+	i64 offset = 0;
+	for (unsigned d = 0; d < depth; d++) {
+		if (LLVMGetTypeKind(type) == LLVMStructTypeKind) {
+			bool is_packed = LLVMIsPackedStruct(type);
+			i64 field_offset = 0;
+			for (unsigned i = 0; i <= path[d]; i++) {
+				LLVMTypeRef field = LLVMStructGetTypeAtIndex(type, i);
+				if (!is_packed) {
+					field_offset = llvm_align_formula(field_offset, lb_alignof(field));
+				}
+				if (i == path[d]) {
+					type = field;
+					break;
+				}
+				field_offset += lb_sizeof(field);
+			}
+			offset += field_offset;
+		} else {
+			type = OdinLLVMGetArrayElementType(type);
+			offset += cast(i64)path[d] * lb_sizeof(type);
+		}
+	}
+	if (leaf_type_) *leaf_type_ = type;
+	return offset;
+}
+
+gb_internal bool lb_aggregate_leaves(LLVMTypeRef type, unsigned *path, unsigned depth, lbAggregateLeaf *leaves, isize *leaf_count) {
+	LLVMTypeKind kind = LLVMGetTypeKind(type);
+	if (kind == LLVMStructTypeKind || kind == LLVMArrayTypeKind) {
+		if (depth >= LB_SCALARIZE_MAX_DEPTH) {
+			return false;
+		}
+		if (kind == LLVMStructTypeKind && LLVMIsOpaqueStruct(type)) {
+			return false;
+		}
+		unsigned count = kind == LLVMStructTypeKind ? LLVMCountStructElementTypes(type) : cast(unsigned)LLVMGetArrayLength(type);
+		for (unsigned i = 0; i < count; i++) {
+			path[depth] = i;
+			LLVMTypeRef elem = kind == LLVMStructTypeKind ? LLVMStructGetTypeAtIndex(type, i) : OdinLLVMGetArrayElementType(type);
+			if (!lb_aggregate_leaves(elem, path, depth+1, leaves, leaf_count)) {
+				return false;
+			}
+		}
+		return true;
+	}
+
+	if (*leaf_count >= LB_SCALARIZE_MAX_LEAVES) {
+		return false;
+	}
+
+	lbAggregateLeaf *leaf = &leaves[(*leaf_count)++];
+	gb_memmove(leaf->path, path, depth*gb_size_of(unsigned));
+	leaf->depth = depth;
+	return true;
+}
+
+gb_internal unsigned lb_aggregate_field_alignment(unsigned alignment, i64 offset) {
+	unsigned a = gb_max(alignment, 1u);
+	while (offset % a != 0) {
+		a >>= 1;
+	}
+	return a;
+}
+
+gb_internal LLVMValueRef lb_aggregate_field_gep(lbModule *m, LLVMBuilderRef b, LLVMTypeRef type, LLVMValueRef ptr, unsigned const *path, unsigned depth) {
+	LLVMValueRef indices[LB_SCALARIZE_MAX_DEPTH+1] = {};
+	LLVMTypeRef i32 = LLVMInt32TypeInContext(m->ctx);
+	indices[0] = LLVMConstInt(i32, 0, false);
+	for (unsigned d = 0; d < depth; d++) {
+		indices[d+1] = LLVMConstInt(i32, path[d], false);
+	}
+	return LLVMBuildInBoundsGEP2(b, type, ptr, indices, depth+1, "");
+}
+
+// returns false if the field cannot be reached without an aggregate value, and sets `*field_` to nullptr when it is undefined
+gb_internal bool lb_aggregate_field_value(lbFastIselLowering *s, LLVMValueRef v, unsigned const *path, unsigned depth, LLVMValueRef *field_) {
+	if (depth == 0) {
+		*field_ = (LLVMIsUndef(v) || LLVMIsPoison(v)) ? nullptr : v;
+		return true;
+	}
+	if (LLVMIsUndef(v) || LLVMIsPoison(v)) {
+		*field_ = nullptr;
+		return true;
+	}
+
+	if (LLVMIsAConstant(v)) {
+		LLVMValueRef elem = LLVMGetAggregateElement(v, path[0]);
+		if (elem != nullptr) {
+			return lb_aggregate_field_value(s, elem, path+1, depth-1, field_);
+		}
+	} else if (LLVMIsAInsertValueInst(v)) {
+		unsigned n = LLVMGetNumIndices(v);
+		unsigned const *indices = LLVMGetIndices(v);
+
+		unsigned k = 0;
+		while (k < n && k < depth && indices[k] == path[k]) {
+			k += 1;
+		}
+
+		if (k == n) {
+			return lb_aggregate_field_value(s, LLVMGetOperand(v, 1), path+n, depth-n, field_);
+		} else if (k < depth) {
+			return lb_aggregate_field_value(s, LLVMGetOperand(v, 0), path, depth, field_);
+		}
+		return false;
+	} else if (LLVMIsAExtractValueInst(v)) {
+		unsigned n = LLVMGetNumIndices(v);
+		if (n + depth <= LB_SCALARIZE_MAX_DEPTH) {
+			unsigned full[LB_SCALARIZE_MAX_DEPTH];
+			gb_memmove(full, LLVMGetIndices(v), n*gb_size_of(unsigned));
+			gb_memmove(full+n, path, depth*gb_size_of(unsigned));
+			return lb_aggregate_field_value(s, LLVMGetOperand(v, 0), full, n+depth, field_);
+		}
+		return false;
+	} else if (LLVMIsASelectInst(v)) {
+		LLVMValueRef x = nullptr;
+		LLVMValueRef y = nullptr;
+		if (!lb_aggregate_field_value(s, LLVMGetOperand(v, 1), path, depth, &x) ||
+		    !lb_aggregate_field_value(s, LLVMGetOperand(v, 2), path, depth, &y)) {
+			return false;
+		}
+		if (x == nullptr || y == nullptr) {
+			*field_ = x ? x : y;
+			return true;
+		}
+		LLVMPositionBuilderBefore(s->builder, s->store);
+		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(s->store));
+		*field_ = LLVMBuildSelect(s->builder, LLVMGetOperand(v, 0), x, y, "");
+		return true;
+	} else if (LLVMIsAPHINode(v)) {
+		for (lbScalarizedPhi const &e : s->phis) {
+			if (e.aggregate == v &&
+			    e.depth == depth &&
+			    gb_memcompare(e.path, path, depth*gb_size_of(unsigned)) == 0) {
+				*field_ = e.field;
+				return e.ok;
+			}
+		}
+
+		LLVMTypeRef field_type = nullptr;
+		lb_aggregate_path_offset(LLVMTypeOf(v), path, depth, &field_type);
+
+		LLVMPositionBuilderBefore(s->builder, v);
+		LLVMSetCurrentDebugLocation2(s->builder, nullptr);
+
+
+		// NOTE(bill): cached before its incoming values, as a loop reaches it again
+		isize index = s->phis.count;
+		lbScalarizedPhi entry = {};
+		entry.aggregate = v;
+		gb_memmove(entry.path, path, depth*gb_size_of(unsigned));
+
+		LLVMValueRef phi = LLVMBuildPhi(s->builder, field_type, "");
+		entry.depth = depth;
+		entry.field = phi;
+		entry.ok    = true;
+		array_add(&s->phis, entry);
+
+		LLVMValueRef saved_store = s->store;
+		bool ok = true;
+		unsigned incoming_count = LLVMCountIncoming(v);
+		for (unsigned k = 0; k < incoming_count; k++) {
+			LLVMBasicBlockRef block = LLVMGetIncomingBlock(v, k);
+			s->store = LLVMGetBasicBlockTerminator(block);
+			LLVMValueRef field = nullptr;
+			if (!lb_aggregate_field_value(s, LLVMGetIncomingValue(v, k), path, depth, &field)) {
+				ok = false;
+				field = nullptr;
+			}
+			if (field == nullptr) {
+				field = LLVMGetUndef(field_type);
+			}
+			LLVMAddIncoming(phi, &field, &block, 1);
+		}
+		s->store = saved_store;
+		s->phis[index].ok = ok;
+		*field_ = phi;
+		return ok;
+	} else if (LLVMIsALoadInst(v) && !LLVMGetVolatile(v) && LLVMGetOrdering(v) == LLVMAtomicOrderingNotAtomic) {
+		// NOTE(bill): Read the field where the aggregate was read, as the memory may change before the store
+		LLVMTypeRef type       = LLVMTypeOf(v);
+		LLVMTypeRef field_type = nullptr;
+		i64 offset = lb_aggregate_path_offset(type, path, depth, &field_type);
+
+		LLVMPositionBuilderBefore(s->builder, LLVMGetNextInstruction(v));
+		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(v));
+
+		LLVMValueRef ptr   = lb_aggregate_field_gep(s->m, s->builder, type, LLVMGetOperand(v, 0), path, depth);
+		LLVMValueRef field = LLVMBuildLoad2(s->builder, field_type, ptr, "");
+		LLVMSetAlignment(field, lb_aggregate_field_alignment(LLVMGetAlignment(v), offset));
+
+		*field_ = field;
+		return true;
+	}
+
+	if (depth == 1) {
+		LLVMPositionBuilderBefore(s->builder, s->store);
+		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(s->store));
+		*field_ = LLVMBuildExtractValue(s->builder, v, path[0], "");
+		return true;
+	}
+	return false;
+}
+
+gb_internal bool lb_scalarize_aggregate_store(lbFastIselLowering *s, LLVMValueRef store) {
+	LLVMValueRef value = LLVMGetOperand(store, 0);
+	LLVMValueRef ptr   = LLVMGetOperand(store, 1);
+	LLVMTypeRef  type  = LLVMTypeOf(value);
+
+	lbAggregateLeaf leaves[LB_SCALARIZE_MAX_LEAVES] = {};
+	isize leaf_count = 0;
+	unsigned path[LB_SCALARIZE_MAX_DEPTH] = {};
+
+	if (!lb_aggregate_leaves(type, path, 0, leaves, &leaf_count)) {
+		return false;
+	}
+	s->store = store;
+
+	LLVMValueRef fields[LB_SCALARIZE_MAX_LEAVES] = {};
+	for (isize i = 0; i < leaf_count; i++) {
+		if (!lb_aggregate_field_value(s, value, leaves[i].path, leaves[i].depth, &fields[i])) {
+			return false;
+		}
+	}
+
+	unsigned alignment = LLVMGetAlignment(store);
+
+	LLVMPositionBuilderBefore(s->builder, store);
+	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(store));
+
+	for (isize i = 0; i < leaf_count; i++) {
+		if (fields[i] == nullptr) {
+			continue;
+		}
+		i64 offset = lb_aggregate_path_offset(type, leaves[i].path, leaves[i].depth, nullptr);
+		LLVMValueRef field_ptr = lb_aggregate_field_gep(s->m, s->builder, type, ptr, leaves[i].path, leaves[i].depth);
+		LLVMValueRef field_store = LLVMBuildStore(s->builder, fields[i], field_ptr);
+		LLVMSetAlignment(field_store, lb_aggregate_field_alignment(alignment, offset));
+	}
+	LLVMInstructionEraseFromParent(store);
+	return true;
+}
+
+// NOTE(bill): If a a constant has too many fields to store one at a time is set or copied from a constant instead
+gb_internal void lb_lower_large_constant_store(lbFastIselLowering *s, LLVMValueRef store) {
+	lbModule *m = s->m;
+	LLVMValueRef value = LLVMGetOperand(store, 0);
+	LLVMValueRef ptr   = LLVMGetOperand(store, 1);
+	LLVMTypeRef  type  = LLVMTypeOf(value);
+
+	LLVMTargetDataRef data_layout = LLVMGetModuleDataLayout(m->mod);
+	unsigned alignment = gb_max(LLVMGetAlignment(store), 1u);
+	if (!LLVMIsAConstant(value) || lb_const_has_misaligned_pointer(data_layout, value, 0, alignment)) {
+		return;
+	}
+
+	LLVMPositionBuilderBefore(s->builder, store);
+	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(store));
+
+	LLVMValueRef size = LLVMConstInt(LLVMInt64TypeInContext(m->ctx), LLVMStoreSizeOfType(data_layout, type), false);
+	if (LLVMIsNull(value)) {
+		LLVMBuildMemSet(s->builder, ptr, LLVMConstInt(LLVMInt8TypeInContext(m->ctx), 0, false), size, alignment);
+		LLVMInstructionEraseFromParent(store);
+		return;
+	}
+
+	LLVMValueRef global = LLVMAddGlobal(m->mod, type, "");
+	LLVMSetInitializer(global, value);
+	LLVMSetGlobalConstant(global, true);
+	LLVMSetAlignment(global, alignment);
+
+	LLVMSetLinkage(global, LLVMPrivateLinkage);
+	LLVMSetUnnamedAddress(global, LLVMGlobalUnnamedAddr);
+
+	LLVMBuildMemCpy(s->builder, ptr, alignment, global, alignment, size);
+
+	LLVMInstructionEraseFromParent(store);
+}
+
+// NOTE(bill): The fast instruction selector in LLVM cannot select a call to `memmove` nor to the floating point `minnum` and `maxnum`.
+// To improve things we can them through a function of the module which calls them
+gb_internal void lb_redirect_unselectable_call(lbFastIselLowering *s, LLVMValueRef call) {
+	lbModule *m = s->m;
+
+	LLVMValueRef callee = LLVMGetCalledValue(call);
+	if (!LLVMIsAFunction(callee)) {
+		return;
+	}
+	size_t      name_len = 0;
+	char const *name_text = LLVMGetValueName2(callee, &name_len);
+	String      name = make_string(cast(u8 const *)name_text, name_len);
+
+	LLVMTypeRef fn_type = LLVMGlobalGetValueType(callee);
+	if (LLVMGetCalledFunctionType(call) != fn_type || LLVMIsFunctionVarArg(fn_type)) {
+		return;
+	}
+	unsigned     param_count = LLVMCountParamTypes(fn_type);
+	LLVMTypeKind return_kind = LLVMGetTypeKind(LLVMGetReturnType(fn_type));
+	bool is_memmove = name == "memmove" && param_count == 3 && return_kind == LLVMPointerTypeKind;
+	bool is_minmax  = (string_starts_with(name, str_lit("llvm.minnum.")) ||
+	                   string_starts_with(name, str_lit("llvm.maxnum."))) &&
+	                  (return_kind == LLVMFloatTypeKind ||
+	                   return_kind == LLVMDoubleTypeKind);
+	if (!is_memmove && !is_minmax) {
+		return;
+	}
+
+	gbString wrapper_name = gb_string_make(heap_allocator(), "__$fast_isel$");
+	wrapper_name          = gb_string_append_length(wrapper_name, name.text, name.len);
+	defer (gb_string_free(wrapper_name));
+
+	LLVMValueRef wrapper = LLVMGetNamedFunction(m->mod, wrapper_name);
+	defer (LLVMSetOperand(call, cast(unsigned)LLVMGetNumOperands(call) - 1, wrapper));
+
+	if (wrapper != nullptr) {
+		return;
+	}
+
+	LLVMCallConv cc = cast(LLVMCallConv)LLVMGetFunctionCallConv(callee);
+	wrapper = LLVMAddFunction(m->mod, wrapper_name, fn_type);
+	LLVMSetLinkage(wrapper, LLVMInternalLinkage);
+	LLVMSetFunctionCallConv(wrapper, cc);
+	lb_add_attribute_to_proc(m, wrapper, "nounwind");
+
+	LLVMValueRef params[3] = {};
+	LLVMGetParams(wrapper, params);
+
+	LLVMPositionBuilderAtEnd(s->builder, LLVMAppendBasicBlockInContext(m->ctx, wrapper, ""));
+	LLVMSetCurrentDebugLocation2(s->builder, nullptr);
+
+	LLVMValueRef inner = LLVMBuildCall2(s->builder, fn_type, callee, params, param_count, "");
+	LLVMSetInstructionCallConv(inner, cc);
+	LLVMBuildRet(s->builder, inner);
+}
+
+gb_internal bool lb_is_aggregate_type(LLVMTypeRef type) {
+	LLVMTypeKind kind = LLVMGetTypeKind(type);
+	return kind == LLVMStructTypeKind || kind == LLVMArrayTypeKind;
+}
+
+gb_internal bool lb_is_plain_access(LLVMValueRef inst) {
+	return !LLVMGetVolatile(inst) && LLVMGetOrdering(inst) == LLVMAtomicOrderingNotAtomic;
+}
+
+gb_internal void lb_lower_bool_select(lbFastIselLowering *s, LLVMValueRef select) {
+	LLVMValueRef c = LLVMGetOperand(select, 0);
+	LLVMValueRef x = LLVMGetOperand(select, 1);
+	LLVMValueRef y = LLVMGetOperand(select, 2);
+	if (LLVMGetTypeKind(LLVMTypeOf(c)) != LLVMIntegerTypeKind) {
+		return;
+	}
+	LLVMPositionBuilderBefore(s->builder, select);
+	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(select));
+	LLVMValueRef t = LLVMConstInt(LLVMTypeOf(c), 1, false);
+
+	LLVMValueRef res = nullptr;
+	if (LLVMIsAConstantInt(x)) {
+		res = LLVMConstIntGetZExtValue(x) ? LLVMBuildOr(s->builder, c, y, "") : LLVMBuildAnd(s->builder, LLVMBuildXor(s->builder, c, t, ""), y, "");
+	} else if (LLVMIsAConstantInt(y)) {
+		res = LLVMConstIntGetZExtValue(y) ? LLVMBuildOr(s->builder, LLVMBuildXor(s->builder, c, t, ""), x, "") : LLVMBuildAnd(s->builder, c, x, "");
+	} else {
+		LLVMValueRef a = LLVMBuildAnd(s->builder, c, x, "");
+		LLVMValueRef b = LLVMBuildAnd(s->builder, LLVMBuildXor(s->builder, c, t, ""), y, "");
+		res = LLVMBuildOr(s->builder, a, b, "");
+	}
+	LLVMReplaceAllUsesWith(select, res);
+	LLVMInstructionEraseFromParent(select);
+}
+
+gb_internal void lb_truncate_bool_arguments(lbFastIselLowering *s, LLVMValueRef call) {
+	LLVMTypeRef i1 = LLVMInt1TypeInContext(s->m->ctx);
+	LLVMTypeRef i8 = LLVMInt8TypeInContext(s->m->ctx);
+	LLVMBasicBlockRef block = LLVMGetInstructionParent(call);
+	unsigned arg_count = LLVMGetNumArgOperands(call);
+	for (unsigned a = 0; a < arg_count; a++) {
+		LLVMValueRef arg = LLVMGetOperand(call, a);
+		if (LLVMTypeOf(arg) != i1 || LLVMIsAConstantInt(arg)) {
+			continue;
+		}
+		LLVMUseRef first_use = LLVMGetFirstUse(arg);
+		if (LLVMIsATruncInst(arg) && LLVMGetInstructionParent(arg) == block &&
+		    first_use != nullptr && LLVMGetNextUse(first_use) == nullptr) {
+			continue;
+		}
+		LLVMPositionBuilderBefore(s->builder, call);
+		LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(call));
+		LLVMValueRef byte = LLVMBuildZExt(s->builder, arg, i8, "");
+		LLVMSetOperand(call, a, LLVMBuildTrunc(s->builder, byte, i1, ""));
+	}
+}
+
+gb_internal void lb_lower_small_switch(lbFastIselLowering *s, LLVMValueRef sw) {
+	enum {MAX_CASES = 3};
+	LLVMValueRef cond = LLVMGetOperand(sw, 0);
+	unsigned case_count = (cast(unsigned)LLVMGetNumOperands(sw) - 2) / 2;
+	if (case_count == 0 || case_count > MAX_CASES || LLVMGetIntTypeWidth(LLVMTypeOf(cond)) > 64) {
+		return;
+	}
+
+	LLVMBasicBlockRef block      = LLVMGetInstructionParent(sw);
+	LLVMBasicBlockRef next_block = LLVMGetNextBasicBlock(block);
+
+	LLVMValueRef fn     = LLVMGetBasicBlockParent(block);
+	LLVMMetadataRef loc = LLVMInstructionGetDebugLoc(sw);
+
+	LLVMBasicBlockRef from[MAX_CASES+1] = {};
+	LLVMBasicBlockRef to  [MAX_CASES+1] = {};
+
+	LLVMBasicBlockRef curr = block;
+
+	LLVMPositionBuilderBefore(s->builder, sw);
+	LLVMSetCurrentDebugLocation2(s->builder, loc);
+
+	for (unsigned j = 0; j < case_count; j++) {
+		LLVMBasicBlockRef dest = LLVMGetSuccessor(sw, j+1);
+		LLVMBasicBlockRef else_block = LLVMGetSwitchDefaultDest(sw);
+		if (j+1 < case_count) {
+			if (next_block != nullptr) {
+				else_block = LLVMInsertBasicBlockInContext(s->m->ctx, next_block, "");
+			} else {
+				else_block = LLVMAppendBasicBlockInContext(s->m->ctx, fn, "");
+			}
+		}
+
+		LLVMValueRef cmp = LLVMBuildICmp(s->builder, LLVMIntEQ, cond, LLVMGetOperand(sw, 2 + 2*j), "");
+		LLVMBuildCondBr(s->builder, cmp, dest, else_block);
+
+		from[j] = curr;
+		to[j]   = dest;
+
+		if (j+1 < case_count) {
+			curr = else_block;
+			LLVMPositionBuilderAtEnd(s->builder, curr);
+			LLVMSetCurrentDebugLocation2(s->builder, loc);
+		}
+	}
+	from[case_count] = curr;
+	to  [case_count] = LLVMGetSwitchDefaultDest(sw);
+	LLVMInstructionEraseFromParent(sw);
+
+	// the incoming entries for `block` become one for each new edge
+	for (unsigned e = 0; e <= case_count; e++) {
+		bool seen = false;
+		for (unsigned k = 0; k < e; k++) {
+			seen |= to[k] == to[e];
+		}
+		if (seen) {
+			continue;
+		}
+
+		LLVMBasicBlockRef dest = to[e];
+		for (LLVMValueRef phi = LLVMGetFirstInstruction(dest); phi != nullptr && LLVMIsAPHINode(phi); /**/) {
+			LLVMValueRef next             = LLVMGetNextInstruction(phi);
+			LLVMValueRef value_from_block = nullptr;
+
+			unsigned incoming_count = LLVMCountIncoming(phi);
+			for (unsigned k = 0; k < incoming_count; k++) {
+				if (LLVMGetIncomingBlock(phi, k) == block) {
+					value_from_block = LLVMGetIncomingValue(phi, k);
+				}
+			}
+
+			if (value_from_block != nullptr) {
+				LLVMPositionBuilderBefore(s->builder, phi);
+				LLVMSetCurrentDebugLocation2(s->builder, nullptr);
+
+				LLVMValueRef new_phi = LLVMBuildPhi(s->builder, LLVMTypeOf(phi), "");
+				for (unsigned k = 0; k < incoming_count; k++) {
+					LLVMBasicBlockRef incoming_block = LLVMGetIncomingBlock(phi, k);
+					if (incoming_block != block) {
+						LLVMValueRef incoming_value = LLVMGetIncomingValue(phi, k);
+						LLVMAddIncoming(new_phi, &incoming_value, &incoming_block, 1);
+					}
+				}
+				for (unsigned k = 0; k <= case_count; k++) {
+					if (to[k] == dest) {
+						LLVMAddIncoming(new_phi, &value_from_block, &from[k], 1);
+					}
+				}
+				LLVMReplaceAllUsesWith(phi, new_phi);
+				LLVMInstructionEraseFromParent(phi);
+			}
+
+			phi = next;
+		}
+	}
+}
+
+gb_internal void lb_lower_for_fast_isel(lbModule *m) {
+	lbFastIselLowering s = {};
+	s.m = m;
+
+	s.builder = LLVMCreateBuilderInContext(m->ctx);
+	defer (LLVMDisposeBuilder(s.builder));
+
+	array_init(&s.phis, heap_allocator());
+	defer (array_free(&s.phis));
+
+	auto work = array_make<LLVMValueRef>(heap_allocator(), 0, 64);
+	defer (array_free(&work));
+
+	LLVMValueRef last_fn = LLVMGetLastFunction(m->mod);
+	for (LLVMValueRef fn = LLVMGetFirstFunction(m->mod); fn != nullptr; fn = fn == last_fn ? nullptr : LLVMGetNextFunction(fn)) {
+		array_clear(&work);
+		array_clear(&s.phis);
+
+		for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
+			for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; i = LLVMGetNextInstruction(i)) {
+				if (LLVMIsAStoreInst(i) && lb_is_plain_access(i) && lb_is_aggregate_type(LLVMTypeOf(LLVMGetOperand(i, 0)))) {
+					array_add(&work, i);
+				}
+			}
+		}
+		for (LLVMValueRef store : work) {
+			if (!lb_scalarize_aggregate_store(&s, store)) {
+				lb_lower_large_constant_store(&s, store);
+			}
+		}
+
+		// NOTE(bill): A field read out of an aggregate value is read where that aggregate came from
+		array_clear(&work);
+		for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
+			for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; i = LLVMGetNextInstruction(i)) {
+				if (LLVMIsAExtractValueInst(i) && !lb_is_aggregate_type(LLVMTypeOf(i))) {
+					array_add(&work, i);
+				} else if (LLVMIsASelectInst(i) && LLVMTypeOf(i) == LLVMInt1TypeInContext(m->ctx)) {
+					array_add(&work, i);
+				} else if (LLVMIsACallInst(i)) {
+					array_add(&work, i);
+				} else if (LLVMIsASwitchInst(i)) {
+					array_add(&work, i);
+				}
+			}
+		}
+		for (LLVMValueRef i : work) {
+			if (LLVMIsASelectInst(i)) {
+				lb_lower_bool_select(&s, i);
+				continue;
+			}
+			if (LLVMIsACallInst(i)) {
+				lb_truncate_bool_arguments(&s, i);
+				lb_redirect_unselectable_call(&s, i);
+				continue;
+			}
+			if (LLVMIsASwitchInst(i)) {
+				lb_lower_small_switch(&s, i);
+				continue;
+			}
+			LLVMValueRef agg = LLVMGetOperand(i, 0);
+			unsigned n = LLVMGetNumIndices(i);
+			if (n > LB_SCALARIZE_MAX_DEPTH) {
+				continue;
+			}
+
+			if (!(LLVMIsAConstant(agg)        ||
+			      LLVMIsAInsertValueInst(agg) ||
+			      LLVMIsASelectInst(agg)      ||
+			      LLVMIsAPHINode(agg)         ||
+			      (LLVMIsALoadInst(agg) && lb_is_plain_access(agg)))) {
+				continue;
+			}
+
+			s.store = i;
+
+			LLVMValueRef field = nullptr;
+			if (lb_aggregate_field_value(&s, agg, LLVMGetIndices(i), n, &field) && field != nullptr) {
+				LLVMReplaceAllUsesWith(i, field);
+				LLVMInstructionEraseFromParent(i);
+			}
+		}
+
+		bool removed = true;
+		while (removed) {
+			removed = false;
+			for (LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(fn); bb != nullptr; bb = LLVMGetNextBasicBlock(bb)) {
+				for (LLVMValueRef i = LLVMGetFirstInstruction(bb); i != nullptr; /**/) {
+					LLVMValueRef next = LLVMGetNextInstruction(i);
+					if (LLVMGetFirstUse(i) == nullptr &&
+					    (LLVMIsAInsertValueInst(i) || LLVMIsAExtractValueInst(i) || LLVMIsASelectInst(i) || LLVMIsAPHINode(i) ||
+					     LLVMIsAGetElementPtrInst(i) || (LLVMIsALoadInst(i) && lb_is_plain_access(i)))) {
+						LLVMInstructionEraseFromParent(i);
+						removed = true;
+					}
+					i = next;
+				}
+			}
+		}
+	}
+}

From c7de0b9e36195f5b6ae78a84edb7b087070f71a3 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 10:48:53 +0100
Subject: [PATCH 201/215] Copy a constant built in a local of its own rather
 than loading and storing it, and use a constant slice's backing array
 directly

---
 src/llvm_backend_const.cpp | 41 ++++++++++++++++++++++----------------
 1 file changed, 24 insertions(+), 17 deletions(-)

diff --git a/src/llvm_backend_const.cpp b/src/llvm_backend_const.cpp
index 7eda9515d..b7b2a65f2 100644
--- a/src/llvm_backend_const.cpp
+++ b/src/llvm_backend_const.cpp
@@ -524,6 +524,21 @@ gb_internal lbValue lb_emit_source_code_location_as_global(lbProcedure *p, Ast *
 
 
 
+// NOTE(bill): Constants which cannot be an LLVM constant were built in a local of their own
+// which was copied from rather than loaded and stored as a first class aggregate
+gb_internal void lb_store_local_constant(lbProcedure *p, LLVMValueRef dst, LLVMValueRef value) {
+	if (!LLVMIsALoadInst(value) || !LLVMIsAAllocaInst(LLVMGetOperand(value, 0))) {
+		LLVMBuildStore(p->builder, value, dst);
+		return;
+	}
+	LLVMValueRef src  = LLVMGetOperand(value, 0);
+	LLVMTypeRef  type = LLVMTypeOf(value);
+	LLVMValueRef size = LLVMConstInt(lb_type(p->module, t_int), lb_sizeof(type), false);
+
+	unsigned dst_alignment = LLVMABIAlignmentOfType(LLVMGetModuleDataLayout(p->module->mod), type);
+	LLVMBuildMemCpy(p->builder, dst, dst_alignment, src, lb_try_get_alignment(src, 1), size);
+}
+
 gb_internal LLVMValueRef lb_build_constant_array_values(lbModule *m, Type *type, Type *elem_type, isize count, LLVMValueRef *values, lbConstContext cc) {
 	if (cc.allow_local) {
 		cc.is_rodata = false;
@@ -552,7 +567,7 @@ gb_internal LLVMValueRef lb_build_constant_array_values(lbModule *m, Type *type,
 			if (is_type_proc(elem_type)) {
 				values[i] = LLVMConstPointerCast(values[i], llvm_elem_type);
 			}
-			LLVMBuildStore(p->builder, values[i], elem.value);
+			lb_store_local_constant(p, elem.value, values[i]);
 		}
 		return lb_addr_load(p, v).value;
 	}
@@ -1141,6 +1156,12 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 					                local_copy, alignment,
 					                LLVMConstInt(lb_type(m, t_int), type_size_of(t), false)
 					);
+				} else if (LLVMIsALoadInst(backing_array.value) && LLVMIsAAllocaInst(LLVMGetOperand(backing_array.value, 0)) &&
+				           LLVMGetFirstUse(backing_array.value) == nullptr) {
+					// NOTE(bill): the backing data was built in a local of its own which the slice uses rather than a copy of it
+					array_data = LLVMGetOperand(backing_array.value, 0);
+					LLVMSetAlignment(array_data, gb_max(LLVMGetAlignment(array_data), alignment));
+					LLVMInstructionEraseFromParent(backing_array.value);
 				} else {
 					array_data = llvm_alloca(p, LLVMTypeOf(backing_array.value), alignment);
 					LLVMBuildStore(p->builder, backing_array.value, array_data);
@@ -2166,13 +2187,7 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 										LLVMValueRef dst = LLVMBuildGEP2(p->builder, field_llvm_type, ptr, indices, idx_list_len+1, "");
 										dst = LLVMBuildPointerCast(p->builder, dst, lb_type(m, alloc_type_pointer(tav.type)), "");
 
-										if (LLVMIsALoadInst(elem_value)) {
-											i64 sz = type_size_of(tav.type);
-											LLVMValueRef src = LLVMGetOperand(elem_value, 0);
-											lb_mem_copy_non_overlapping(p, {dst, t_rawptr}, {src, t_rawptr}, lb_const_int(m, t_int, sz), false);
-										} else {
-											LLVMBuildStore(p->builder, elem_value, dst);
-										}
+										lb_store_local_constant(p, dst, elem_value);
 
 										values[index] = LLVMBuildLoad2(p->builder, field_llvm_type, ptr, "");
 
@@ -2262,15 +2277,7 @@ gb_internal lbValue lb_const_value(lbModule *m, Type *type, ExactValue value, lb
 					LLVMValueRef val = old_values[i];
 					if (!LLVMIsConstant(val)) {
 						LLVMValueRef dst = LLVMBuildStructGEP2(p->builder, llvm_addr_type(p->module, v.addr), v.addr.value, cast(unsigned)i, "");
-						// if (LLVMIsALoadInst(val)) {
-						// 	Type *ptr_type = v.addr.type;
-						// 	i64 sz = type_size_of(type_deref(ptr_type));
-
-						// 	LLVMValueRef src = LLVMGetOperand(val, 0);
-						// 	lb_mem_copy_non_overlapping(p, {dst, ptr_type}, {src, ptr_type}, lb_const_int(m, t_int, sz), false);
-						// } else {
-						LLVMBuildStore(p->builder, val, dst);
-						// }
+						lb_store_local_constant(p, dst, val);
 					}
 				}
 				return lb_addr_load(p, v);

From 52fcaaf024a8fd75cf2abe784679610d187a5157 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 10:49:41 +0100
Subject: [PATCH 202/215] Copy a large loaded aggregate through a local when
 the fast instruction selector cannot store it one field at a time

---
 src/llvm_backend_opt.cpp | 43 +++++++++++++++++++++++++++++++++++++++-
 1 file changed, 42 insertions(+), 1 deletion(-)

diff --git a/src/llvm_backend_opt.cpp b/src/llvm_backend_opt.cpp
index 4df0cc27b..d3502a147 100644
--- a/src/llvm_backend_opt.cpp
+++ b/src/llvm_backend_opt.cpp
@@ -863,6 +863,42 @@ gb_internal bool lb_is_plain_access(LLVMValueRef inst) {
 	return !LLVMGetVolatile(inst) && LLVMGetOrdering(inst) == LLVMAtomicOrderingNotAtomic;
 }
 
+gb_internal void lb_lower_large_loaded_store(lbFastIselLowering *s, LLVMValueRef store) {
+	lbModule *m = s->m;
+	LLVMValueRef load = LLVMGetOperand(store, 0);
+	LLVMValueRef ptr  = LLVMGetOperand(store, 1);
+	LLVMUseRef   use  = LLVMGetFirstUse(load);
+	if (!lb_is_plain_access(load) || LLVMGetNextUse(use) != nullptr) {
+		return;
+	}
+
+	LLVMTypeRef type = LLVMTypeOf(load);
+	LLVMTargetDataRef data_layout = LLVMGetModuleDataLayout(m->mod);
+	LLVMValueRef size = LLVMConstInt(LLVMInt64TypeInContext(m->ctx), LLVMStoreSizeOfType(data_layout, type), false);
+
+	unsigned load_alignment  = gb_max(LLVMGetAlignment(load), 1u);
+	unsigned store_alignment = gb_max(LLVMGetAlignment(store), 1u);
+	unsigned temp_alignment  = gb_max(LLVMABIAlignmentOfType(data_layout, type), load_alignment);
+
+	LLVMValueRef fn = LLVMGetBasicBlockParent(LLVMGetInstructionParent(store));
+	LLVMPositionBuilderBefore(s->builder, LLVMGetFirstInstruction(LLVMGetEntryBasicBlock(fn)));
+	LLVMSetCurrentDebugLocation2(s->builder, nullptr);
+
+	LLVMValueRef temp = LLVMBuildAlloca(s->builder, type, "");
+	LLVMSetAlignment(temp, temp_alignment);
+
+	LLVMPositionBuilderBefore(s->builder, LLVMGetNextInstruction(load));
+	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(load));
+	LLVMBuildMemCpy(s->builder, temp, temp_alignment, LLVMGetOperand(load, 0), load_alignment, size);
+
+	LLVMPositionBuilderBefore(s->builder, store);
+	LLVMSetCurrentDebugLocation2(s->builder, LLVMInstructionGetDebugLoc(store));
+	LLVMBuildMemCpy(s->builder, ptr, store_alignment, temp, temp_alignment, size);
+
+	LLVMInstructionEraseFromParent(store);
+	LLVMInstructionEraseFromParent(load);
+}
+
 gb_internal void lb_lower_bool_select(lbFastIselLowering *s, LLVMValueRef select) {
 	LLVMValueRef c = LLVMGetOperand(select, 0);
 	LLVMValueRef x = LLVMGetOperand(select, 1);
@@ -1033,7 +1069,12 @@ gb_internal void lb_lower_for_fast_isel(lbModule *m) {
 			}
 		}
 		for (LLVMValueRef store : work) {
-			if (!lb_scalarize_aggregate_store(&s, store)) {
+			if (lb_scalarize_aggregate_store(&s, store)) {
+				continue;
+			}
+			if (LLVMIsALoadInst(LLVMGetOperand(store, 0))) {
+				lb_lower_large_loaded_store(&s, store);
+			} else {
 				lb_lower_large_constant_store(&s, store);
 			}
 		}

From be590a7c3549a27457cbb0b6ef0be6c88fc2db73 Mon Sep 17 00:00:00 2001
From: Jeroen van Rijn <Kelimion@users.noreply.github.com>
Date: Sun, 4 Oct 2026 13:00:24 +0200
Subject: [PATCH 203/215] Make `radlink` default linker on Windows

---
 bin/radlink.exe        | Bin 991936 -> 1341088 bytes
 src/build_settings.cpp |  18 ++++---
 src/linker.cpp         | 110 +++++++++++++++++++++--------------------
 src/main.cpp           |   5 +-
 4 files changed, 70 insertions(+), 63 deletions(-)

diff --git a/bin/radlink.exe b/bin/radlink.exe
index 8fb74fcd7612588297ba31ade61af11739db97c5..c3c44ce9e98feb11db76abb05c1b63d1c2ca4831 100644
GIT binary patch
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diff --git a/src/build_settings.cpp b/src/build_settings.cpp
index 7add7d37e..af5576011 100644
--- a/src/build_settings.cpp
+++ b/src/build_settings.cpp
@@ -438,14 +438,23 @@ enum LTOKind : i32 {
 
 enum LinkerChoice : i32 {
 	Linker_Invalid = -1,
-	Linker_Default = 0,
+	Linker_Default = 0, // radlink on Windows
 	Linker_lld,
+	Linker_msvc,
 	Linker_radlink,
 	Linker_mold,
 
 	Linker_COUNT,
 };
 
+String linker_choices[Linker_COUNT] = {
+	str_lit("default"),
+	str_lit("lld"),
+	str_lit("msvc"),
+	str_lit("radlink"),
+	str_lit("mold"),
+};
+
 enum SourceCodeLocationInfo : u8 {
 	SourceCodeLocationInfo_Normal = 0,
 	SourceCodeLocationInfo_Obfuscated = 1,
@@ -453,13 +462,6 @@ enum SourceCodeLocationInfo : u8 {
 	SourceCodeLocationInfo_None = 3,
 };
 
-String linker_choices[Linker_COUNT] = {
-	str_lit("default"),
-	str_lit("lld"),
-	str_lit("radlink"),
-	str_lit("mold"),
-};
-
 enum IntegerDivisionByZeroKind : u8 {
 	IntegerDivisionByZero_Trap,
 	IntegerDivisionByZero_Zero,
diff --git a/src/linker.cpp b/src/linker.cpp
index 519480826..f212894d0 100644
--- a/src/linker.cpp
+++ b/src/linker.cpp
@@ -231,7 +231,7 @@ gb_internal i32 linker_stage(LinkerData *gen) {
 try_cross_linking:;
 
 	#if defined(GB_SYSTEM_WINDOWS)
-		String section_name = str_lit("msvc-link");
+		String section_name = str_lit("rad-link");
 		bool is_windows = build_context.metrics.os == TargetOs_windows;
 	#else
 		String section_name = str_lit("ld-link");
@@ -247,9 +247,7 @@ try_cross_linking:;
 	#if defined(GB_SYSTEM_LINUX) || defined(GB_SYSTEM_FREEBSD) || defined(GB_SYSTEM_NETBSD)
 		case Linker_mold:     section_name = str_lit("mold-link"); break;
 	#endif
-	#if defined(GB_SYSTEM_WINDOWS)
-		case Linker_radlink:  section_name = str_lit("rad-link"); break;
-	#endif
+		case Linker_msvc:     section_name = str_lit("msvc-link"); break;
 		default:
 			gb_printf_err("'%.*s' linker is not supported on this platform\n", LIT(linker_choices[build_context.linker_choice]));
 			return 1;
@@ -279,7 +277,6 @@ try_cross_linking:;
 				add_path(build_context.build_paths[BuildPath_VS_LIB].basename);
 			}
 
-
 			StringSet min_libs_set = {};
 			string_set_init(&min_libs_set, 64);
 			defer (string_set_destroy(&min_libs_set));
@@ -404,17 +401,44 @@ try_cross_linking:;
 				lld_lto_flags = gb_string_append_fmt(lld_lto_flags, "/opt:lldltojobs=%d ", build_context.thread_count);
 			}
 
+			String res_path = {};
+			String rc_path  = {};
+			defer (gb_free(heap_allocator(), res_path.text));
+			defer (gb_free(heap_allocator(), rc_path.text));
+
+			if (build_context.has_resource) {
+				res_path = quote_path(heap_allocator(), build_context.build_paths[BuildPath_RES]);
+				rc_path  = quote_path(heap_allocator(), build_context.build_paths[BuildPath_RC]);
+
+				if (build_context.build_paths[BuildPath_RC].basename == "")  {
+					debugf("Using precompiled resource %.*s\n", LIT(res_path));
+				} else {
+					debugf("Compiling resource %.*s\n", LIT(res_path));
+
+					result = system_exec_command_line_app("resource compiler",
+						"\"%.*src.exe\" /nologo /fo %.*s %.*s",
+						LIT(windows_sdk_bin_path),
+						LIT(res_path),
+						LIT(rc_path)
+					);
+
+					if (result) {
+						return result;
+					}
+				}
+			}
+
 			switch (build_context.linker_choice) {
 			case Linker_lld:
 				result = system_exec_msvc_linker_app("msvc-lld-link",
-					"\"%.*s\\bin\\lld-link\" %s -OUT:\"%.*s\" %s "
+					"\"%.*s\\bin\\lld-link\" %s %.*s -OUT:\"%.*s\" %s "
 					"/nologo /incremental:no /opt:ref /subsystem:%.*s "
 					"%.*s "
 					"%.*s "
 					"%s "
 					"%s "
 					"",
-					LIT(build_context.ODIN_ROOT), object_files, LIT(output_filename),
+					LIT(build_context.ODIN_ROOT), object_files, LIT(res_path), LIT(output_filename),
 					link_settings,
 					LIT(windows_subsystem_names[build_context.ODIN_WINDOWS_SUBSYSTEM]),
 					LIT(build_context.link_flags),
@@ -427,53 +451,8 @@ try_cross_linking:;
 					return result;
 				}
 				break;
-			case Linker_radlink:
-				result = system_exec_msvc_linker_app("msvc-rad-link",
-					"\"%.*s\\bin\\radlink\" %s -OUT:\"%.*s\" %s "
-					"/nologo /incremental:no /opt:ref /subsystem:%.*s "
-					"%.*s "
-					"%.*s "
-					"%s "
-					"",
-					LIT(build_context.ODIN_ROOT), object_files, LIT(output_filename),
-					link_settings,
-					LIT(windows_subsystem_names[build_context.ODIN_WINDOWS_SUBSYSTEM]),
-					LIT(build_context.link_flags),
-					LIT(build_context.extra_linker_flags),
-					lib_str
-				);
-
-				if (result) {
-					return result;
-				}
-				break;
-			default: { // msvc
-				String res_path = quote_path(heap_allocator(), build_context.build_paths[BuildPath_RES]);
-				String rc_path  = quote_path(heap_allocator(), build_context.build_paths[BuildPath_RC]);
-				defer (gb_free(heap_allocator(), res_path.text));
-				defer (gb_free(heap_allocator(), rc_path.text));
-
-				if (build_context.has_resource) {
-					if (build_context.build_paths[BuildPath_RC].basename == "")  {
-						debugf("Using precompiled resource %.*s\n", LIT(res_path));
-					} else {
-						debugf("Compiling resource %.*s\n", LIT(res_path));
-
-						result = system_exec_command_line_app("msvc-link",
-							"\"%.*src.exe\" /nologo /fo %.*s %.*s",
-							LIT(windows_sdk_bin_path),
-							LIT(res_path),
-							LIT(rc_path)
-						);
-
-						if (result) {
-							return result;
-						}
-					}
-				} else {
-					res_path = {};
-				}
 
+			case Linker_msvc: {
 				String linker_name = str_lit("link.exe");
 				switch (build_context.build_mode) {
 				case BuildMode_Executable:
@@ -490,7 +469,6 @@ try_cross_linking:;
 					break;
 				}
 
-
 				result = system_exec_msvc_linker_app("msvc-link",
 					"\"%.*s%.*s\" %s %.*s -OUT:\"%.*s\" %s "
 					"/nologo /subsystem:%.*s "
@@ -505,11 +483,35 @@ try_cross_linking:;
 					LIT(build_context.extra_linker_flags),
 					lib_str
 				);
+
 				if (result) {
 					return result;
 				}
 				break;
 			}
+
+			default: { // radlink
+				result = system_exec_msvc_linker_app("msvc-rad-link",
+					"\"%.*s\\bin\\radlink\" %s %.*s -OUT:\"%.*s\" %s "
+					"/nologo /incremental:no /opt:ref /subsystem:%.*s "
+					"%.*s "
+					"%.*s "
+					"%s "
+					"",
+					LIT(build_context.ODIN_ROOT), object_files, LIT(res_path), LIT(output_filename),
+					link_settings,
+					LIT(windows_subsystem_names[build_context.ODIN_WINDOWS_SUBSYSTEM]),
+					LIT(build_context.link_flags),
+					LIT(build_context.extra_linker_flags),
+					lib_str
+				);
+
+				if (result) {
+					return result;
+				}
+				break;
+
+			}
 			}
 		} else {
 
diff --git a/src/main.cpp b/src/main.cpp
index 17306bfe1..ce92b0897 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -1886,7 +1886,7 @@ gb_internal bool parse_build_flags(Array<String> args) {
 							GB_ASSERT(value.kind == ExactValue_String);
 							if (str_eq_ignore_case(value.value_string, str_lit("thin"))) {
 								build_context.lto_kind = LTO_Thin;
-								if (build_context.linker_choice == Linker_Invalid || build_context.linker_choice == Linker_Default) {
+								if (build_context.linker_choice == Linker_Invalid) {
 									build_context.linker_choice = Linker_lld;
 								}
 								if (!build_context.use_separate_modules) {
@@ -3092,6 +3092,9 @@ gb_internal int print_show_help(String const arg0, String command, String option
 			print_usage_line(2, "Specify the linker to use.");
 			print_usage_line(2, "Choices:");
 			for (i32 i = 0; i < Linker_COUNT; i++) {
+				#if !defined(GB_SYSTEM_WINDOWS)
+				if (linker_choices[i] == "msvc") continue;
+				#endif
 				print_usage_line(3, "%.*s", LIT(linker_choices[i]));
 			}
 		}

From e5b8ea0d2a986dbba2ddc515495fe55f4e1b12b4 Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Sun, 4 Oct 2026 14:09:47 +0200
Subject: [PATCH 204/215] Add test for issue #7689

---
 .../test_issue_7689/test_issue_7689.odin      | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 tests/issues/test_issue_7689/test_issue_7689.odin

diff --git a/tests/issues/test_issue_7689/test_issue_7689.odin b/tests/issues/test_issue_7689/test_issue_7689.odin
new file mode 100644
index 000000000..7b39cdd99
--- /dev/null
+++ b/tests/issues/test_issue_7689/test_issue_7689.odin
@@ -0,0 +1,21 @@
+package bug_repro
+
+import "core:fmt"
+import "core:os"
+
+main :: proc() {
+	x := len(os.args)+1 // runtime value so nothing is folded
+
+	r: int
+	if x == 1 {
+		r = 1
+	} else if x == 2 {
+		r = 2
+	} else if x == 3 {
+		r = 3
+	} else if x == 4 {
+		r = 4
+	}
+
+	fmt.println(r)
+}

From 854cd0e8d8f7d2b213f8750e840ff66b4715282e Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Sun, 4 Oct 2026 14:44:34 +0200
Subject: [PATCH 205/215] Fix #7689 - set debug source location of if/else
 "done" jump to end of the respective block

---
 src/llvm_backend_stmt.cpp                      | 12 ++++++++++++
 .../test_issue_7689/test_issue_7689.odin       | 18 ++++++++++++------
 2 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/src/llvm_backend_stmt.cpp b/src/llvm_backend_stmt.cpp
index d35b48835..727bdbf43 100644
--- a/src/llvm_backend_stmt.cpp
+++ b/src/llvm_backend_stmt.cpp
@@ -2912,6 +2912,9 @@ gb_internal void lb_build_if_stmt(lbProcedure *p, Ast *node) {
 			lb_start_block(p, then);
 
 			lb_build_stmt(p, is->body);
+			if (p->debug_info != nullptr) {
+				LLVMSetCurrentDebugLocation2(p->builder, lb_debug_end_location_from_ast(p, is->body));
+			}
 			lb_emit_jump(p, done);
 		} else {
 			if (is->else_stmt != nullptr) {
@@ -2921,6 +2924,9 @@ gb_internal void lb_build_if_stmt(lbProcedure *p, Ast *node) {
 				lb_open_scope(p, scope_of_node(is->else_stmt));
 				lb_build_stmt(p, is->else_stmt);
 				lb_close_scope(p, lbDeferExit_Default, nullptr, is->else_stmt);
+				if (p->debug_info != nullptr) {
+					LLVMSetCurrentDebugLocation2(p->builder, lb_debug_end_location_from_ast(p, is->else_stmt));
+				}
 			}
 			lb_emit_jump(p, done);
 
@@ -2929,6 +2935,9 @@ gb_internal void lb_build_if_stmt(lbProcedure *p, Ast *node) {
 		lb_start_block(p, then);
 
 		lb_build_stmt(p, is->body);
+		if (p->debug_info != nullptr) {
+			LLVMSetCurrentDebugLocation2(p->builder, lb_debug_end_location_from_ast(p, is->body));
+		}
 
 		lb_emit_jump(p, done);
 
@@ -2938,6 +2947,9 @@ gb_internal void lb_build_if_stmt(lbProcedure *p, Ast *node) {
 			lb_open_scope(p, scope_of_node(is->else_stmt));
 			lb_build_stmt(p, is->else_stmt);
 			lb_close_scope(p, lbDeferExit_Default, nullptr, is->else_stmt);
+			if (p->debug_info != nullptr) {
+				LLVMSetCurrentDebugLocation2(p->builder, lb_debug_end_location_from_ast(p, is->else_stmt));
+			}
 
 			lb_emit_jump(p, done);
 		}
diff --git a/tests/issues/test_issue_7689/test_issue_7689.odin b/tests/issues/test_issue_7689/test_issue_7689.odin
index 7b39cdd99..091ae9f56 100644
--- a/tests/issues/test_issue_7689/test_issue_7689.odin
+++ b/tests/issues/test_issue_7689/test_issue_7689.odin
@@ -9,12 +9,18 @@ main :: proc() {
 	r: int
 	if x == 1 {
 		r = 1
-	} else if x == 2 {
-		r = 2
-	} else if x == 3 {
-		r = 3
-	} else if x == 4 {
-		r = 4
+	} else {
+		if x == 2 {
+			r = 2
+		} else {
+			if x == 3 {
+				r = 3
+			} else {
+				if x == 4 {
+					r = 4
+				}
+			}
+		}
 	}
 
 	fmt.println(r)

From dc0b041d594ab7832b8785c2be0b2e59fba9e3eb Mon Sep 17 00:00:00 2001
From: Jeroen van Rijn <Kelimion@users.noreply.github.com>
Date: Sun, 4 Oct 2026 19:20:29 +0200
Subject: [PATCH 206/215] #force_inline math.lerp, unlerp, saturate

---
 core/math/math.odin | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/core/math/math.odin b/core/math/math.odin
index 6fe872907..46d99ef63 100644
--- a/core/math/math.odin
+++ b/core/math/math.odin
@@ -388,11 +388,11 @@ tan :: proc{
 	tan_f64, tan_f64le, tan_f64be,
 }
 
-@(require_results) lerp :: proc "contextless" (a, b: $T, t: $E) -> (x: T) { return a*(1-t) + b*t }
-@(require_results) saturate :: proc "contextless" (a: $T) -> (x: T) { return clamp(a, 0, 1) }
+@(require_results) lerp     :: #force_inline proc "contextless" (a, b: $T, t: $E) -> (x: T) { return a*(1-t) + b*t }
+@(require_results) saturate :: #force_inline proc "contextless" (a: $T) -> (x: T) { return clamp(a, 0, 1) }
 
 @(require_results)
-unlerp :: proc "contextless" (a, b, x: $T) -> (t: T) where intrinsics.type_is_float(T), !intrinsics.type_is_array(T) {
+unlerp :: #force_inline proc "contextless" (a, b, x: $T) -> (t: T) where intrinsics.type_is_float(T), !intrinsics.type_is_array(T) {
 	return (x-a)/(b-a)
 }
 
@@ -424,7 +424,6 @@ wrap :: proc "contextless" (x, y: $T) -> T where intrinsics.type_is_numeric(T),
 }
 @(require_results)
 angle_diff :: proc "contextless" (a, b: $T) -> T where intrinsics.type_is_numeric(T), !intrinsics.type_is_array(T) {
-
 	dist := wrap(b - a, TAU)
 	return wrap(dist*2, TAU) - dist
 }

From 6679c120f9792f5dec7334a565d1a8bfe7662031 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 18:34:52 +0100
Subject: [PATCH 207/215] Wait for a polymorphic struct's fields before reading
 them in the subtype and comparison checks

---
 src/types.cpp | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/types.cpp b/src/types.cpp
index 015b61ed3..11aba82bb 100644
--- a/src/types.cpp
+++ b/src/types.cpp
@@ -2068,6 +2068,7 @@ gb_internal bool is_type_map(Type *t) {
 }
 
 gb_internal void wait_for_union_variants(Type *t);
+gb_internal void wait_for_struct_fields(Type *t);
 
 gb_internal bool is_type_union_maybe_pointer(Type *t) {
 	t = base_type(t);
@@ -2923,6 +2924,7 @@ gb_internal bool is_type_comparable(Type *t) {
 		if (t->Struct.is_raw_union) {
 			return is_type_simple_compare(t);
 		}
+		wait_for_struct_fields(t);
 		for_array(i, t->Struct.fields) {
 			Entity *f = t->Struct.fields[i];
 			if (!is_type_comparable(f->type)) {
@@ -2984,6 +2986,7 @@ gb_internal bool is_type_simple_compare(Type *t) {
 		return is_type_simple_compare(t->Matrix.elem);
 
 	case Type_Struct:
+		wait_for_struct_fields(t);
 		if (t->Struct.is_simple) {
 			return true;
 		}
@@ -3058,6 +3061,7 @@ gb_internal bool is_type_nearly_simple_compare(Type *t) {
 		return is_type_nearly_simple_compare(t->Matrix.elem);
 
 	case Type_Struct:
+		wait_for_struct_fields(t);
 		if (t->Struct.is_simple) {
 			return true;
 		}
@@ -3155,6 +3159,9 @@ gb_internal String lookup_subtype_polymorphic_field(Type *dst, Type *src) {
 	// bool dst_is_ptr = dst != prev_dst;
 
 	GB_ASSERT(is_type_struct(src) || is_type_union(src));
+	if (src->kind == Type_Struct) {
+		wait_for_struct_fields(src);
+	}
 	for_array(i, src->Struct.fields) {
 		Entity *f = src->Struct.fields[i];
 		if (f->kind == Entity_Variable && f->flags & EntityFlags_IsSubtype) {
@@ -3186,6 +3193,9 @@ gb_internal bool lookup_subtype_polymorphic_selection(Type *dst, Type *src, Sele
 	// bool dst_is_ptr = dst != prev_dst;
 
 	GB_ASSERT(is_type_struct(src) || is_type_union(src));
+	if (src->kind == Type_Struct) {
+		wait_for_struct_fields(src);
+	}
 	for_array(i, src->Struct.fields) {
 		Entity *f = src->Struct.fields[i];
 		if (f->kind == Entity_Variable && f->flags & EntityFlags_IsSubtype) {
@@ -5217,6 +5227,8 @@ gb_internal isize check_is_assignable_to_using_subtype(Type *src, Type *dst, isi
 	if (!is_type_struct(src)) {
 		return 0;
 	}
+	// a polymorphic record is published for reuse before its fields are checked
+	wait_for_struct_fields(src);
 
 	bool dst_is_polymorphic = is_type_polymorphic(dst);
 
@@ -5259,6 +5271,7 @@ gb_internal bool check_is_assignable_to_using_offset_zero_subtype(Type *src, Typ
 	if (!is_type_struct(src_struct)) {
 		return false;
 	}
+	wait_for_struct_fields(src_struct);
 
 	// We check multiple fields in case of #raw_union,
 	// but exit on the first field that is not at offset 0.

From 448f859ceec07bdd37ff86dc2a1be4651b5f7f8f Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 18:42:06 +0100
Subject: [PATCH 208/215] Read a switch's case values with
 `LLVMGetSwitchCaseValue` on LLVM 22 which no longer keeps them in its
 operands

---
 src/llvm_backend_opt.cpp | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/llvm_backend_opt.cpp b/src/llvm_backend_opt.cpp
index d3502a147..f2f8d70c6 100644
--- a/src/llvm_backend_opt.cpp
+++ b/src/llvm_backend_opt.cpp
@@ -949,7 +949,7 @@ gb_internal void lb_truncate_bool_arguments(lbFastIselLowering *s, LLVMValueRef
 gb_internal void lb_lower_small_switch(lbFastIselLowering *s, LLVMValueRef sw) {
 	enum {MAX_CASES = 3};
 	LLVMValueRef cond = LLVMGetOperand(sw, 0);
-	unsigned case_count = (cast(unsigned)LLVMGetNumOperands(sw) - 2) / 2;
+	unsigned case_count = LLVMGetNumSuccessors(sw) - 1;
 	if (case_count == 0 || case_count > MAX_CASES || LLVMGetIntTypeWidth(LLVMTypeOf(cond)) > 64) {
 		return;
 	}
@@ -979,7 +979,13 @@ gb_internal void lb_lower_small_switch(lbFastIselLowering *s, LLVMValueRef sw) {
 			}
 		}
 
-		LLVMValueRef cmp = LLVMBuildICmp(s->builder, LLVMIntEQ, cond, LLVMGetOperand(sw, 2 + 2*j), "");
+#if LLVM_VERSION_MAJOR >= 22
+		// LLVM 22 keeps a switch's case values apart from its operands
+		LLVMValueRef case_value = LLVMGetSwitchCaseValue(sw, j+1);
+#else
+		LLVMValueRef case_value = LLVMGetOperand(sw, 2 + 2*j);
+#endif
+		LLVMValueRef cmp = LLVMBuildICmp(s->builder, LLVMIntEQ, cond, case_value, "");
 		LLVMBuildCondBr(s->builder, cmp, dest, else_block);
 
 		from[j] = curr;

From 8a72e22f03b12ab8c8db3d112046d6150942bdcc Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 19:14:17 +0100
Subject: [PATCH 209/215] Allow `using` on `#soa` pointers, and make the fields
 a `using` `#soa` pointer parameter promotes assignable

---
 src/check_decl.cpp | 2 +-
 src/check_stmt.cpp | 2 +-
 src/check_type.cpp | 3 +--
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/check_decl.cpp b/src/check_decl.cpp
index 2c225c61f..70d4602b1 100644
--- a/src/check_decl.cpp
+++ b/src/check_decl.cpp
@@ -2425,7 +2425,7 @@ gb_internal bool check_proc_body(CheckerContext *ctx_, Token token, DeclInfo *de
 					break;
 				}
 
-				bool is_value = (e->flags & EntityFlag_Value) != 0 && !is_type_pointer(e->type);
+				bool is_value = (e->flags & EntityFlag_Value) != 0 && !is_type_pointer(e->type) && !is_type_soa_pointer(e->type);
 				String name = e->token.string;
 				Type *t = base_type(type_deref(e->type));
 				if (t->kind == Type_Struct) {
diff --git a/src/check_stmt.cpp b/src/check_stmt.cpp
index 1a8d90a1e..2c96089b9 100644
--- a/src/check_stmt.cpp
+++ b/src/check_stmt.cpp
@@ -846,7 +846,7 @@ gb_internal bool check_using_stmt_entity(CheckerContext *ctx, AstUsingStmt *us,
 	}
 
 	case Entity_Variable: {
-		bool is_ptr = is_type_pointer(e->type);
+		bool is_ptr = is_type_pointer(e->type) || is_type_soa_pointer(e->type);
 		Type *t = base_type(type_deref(e->type));
 		if (t->kind == Type_Struct) {
 			wait_for_record_signal(&t->Struct.fields_wait_signal, &t->Struct.checking_thread);
diff --git a/src/check_type.cpp b/src/check_type.cpp
index c1ec7f152..74d9e0c2e 100644
--- a/src/check_type.cpp
+++ b/src/check_type.cpp
@@ -232,10 +232,9 @@ gb_internal void check_struct_fields(CheckerContext *ctx, Ast *node, Slice<Entit
 
 		if (is_using && p->names.count > 0) {
 			Type *first_type = fields_array[fields_array.count-1]->type;
-			bool soa_ptr = is_type_soa_pointer(first_type);
 			Type *t = base_type(type_deref(first_type));
 
-			if ((soa_ptr || !does_field_type_allow_using(t)) &&
+			if (!does_field_type_allow_using(t) &&
 			    p->names.count >= 1 &&
 			    p->names[0]->kind == Ast_Ident) {
 				Token name_token = p->names[0]->Ident.token;

From 49578678900a303fd3a383dd73f9ea9a8fc0deb6 Mon Sep 17 00:00:00 2001
From: gingerBill <gingerBill@users.noreply.github.com>
Date: Sun, 4 Oct 2026 19:16:24 +0100
Subject: [PATCH 210/215] Update test_core_runtime.odin

---
 tests/core/runtime/test_core_runtime.odin | 76 +++++++++++++++++++++++
 1 file changed, 76 insertions(+)

diff --git a/tests/core/runtime/test_core_runtime.odin b/tests/core/runtime/test_core_runtime.odin
index abdb340f0..980cc0851 100644
--- a/tests/core/runtime/test_core_runtime.odin
+++ b/tests/core/runtime/test_core_runtime.odin
@@ -937,6 +937,82 @@ test_soa_pointer_using_field :: proc(t: ^testing.T) {
 	testing.expect_value(t, dyn.foo[1].bar, 7)
 }
 
+// `using` on an #soa pointer, as a field, a parameter and a statement
+@(test)
+test_soa_pointer_using :: proc(t: ^testing.T) {
+	Base :: struct {
+		id:  int,
+		tag: u8,
+	}
+	Entity :: struct {
+		translation: [3]f32,
+		using base:  Base,
+		velocity:    [1]f32,
+	}
+	Player :: struct {
+		foo:          i32,
+		using entity: #soa^#soa[dynamic]Entity,
+	}
+	Boss :: struct {
+		using player: Player,
+	}
+	Fixed_Player :: struct {
+		using entity: #soa^#soa[4]Entity,
+	}
+
+	entities: #soa[dynamic]Entity
+	defer delete(entities)
+	for i in 0..<3 {
+		append_soa(&entities, Entity{base = {id = i}})
+	}
+
+	player := Player{foo = 3, entity = &entities[1]}
+	player.velocity = 2
+	player.translation.y = 9
+	player.id += 100
+	v := &player.translation
+	v.z = 7
+	pp := &player
+	pp.tag = 99
+	testing.expect_value(t, entities[1].velocity, [1]f32{2})
+	testing.expect_value(t, entities[1].translation, [3]f32{0, 9, 7})
+	testing.expect_value(t, entities[1].id, 101)
+	testing.expect_value(t, entities[1].tag, 99)
+	testing.expect_value(t, entities[0].velocity, [1]f32{0})
+	testing.expect_value(t, entities[0].id, 0)
+
+	boss := Boss{player = {entity = &entities[2]}}
+	boss.velocity = 4
+	testing.expect_value(t, entities[2].velocity, [1]f32{4})
+
+	get_id :: proc(e: #soa^#soa[dynamic]Entity) -> int {
+		return e.id
+	}
+	testing.expect_value(t, get_id(player), 101)
+	testing.expect_value(t, get_id(boss), 2)
+
+	step :: proc(using e: #soa^#soa[dynamic]Entity) {
+		velocity = 5
+		translation.x = 1
+	}
+	step(&entities[0])
+	testing.expect_value(t, entities[0].velocity, [1]f32{5})
+	testing.expect_value(t, entities[0].translation.x, 1)
+
+	step_stmt :: proc(e: #soa^#soa[dynamic]Entity) {
+		using e
+		tag = 7
+	}
+	step_stmt(&entities[0])
+	testing.expect_value(t, entities[0].tag, 7)
+
+	fixed: #soa[4]Entity
+	fp := Fixed_Player{entity = &fixed[3]}
+	fp.velocity = 6
+	testing.expect_value(t, fixed[3].velocity, [1]f32{6})
+	testing.expect_value(t, fixed[2].velocity, [1]f32{0})
+}
+
 @(test)
 test_soa_array_allocator_resize :: proc(t: ^testing.T) {
 

From 2b82056df27296851cf60281855538a7aff0e764 Mon Sep 17 00:00:00 2001
From: Matthias Huerbe <matthiashuerbe@example.com>
Date: Sun, 4 Oct 2026 22:08:37 +0200
Subject: [PATCH 211/215] Fix -linker:radlink being rejected on Windows

---
 src/build_settings.cpp | 2 +-
 src/linker.cpp         | 5 ++++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/build_settings.cpp b/src/build_settings.cpp
index af5576011..8a6bb7ffe 100644
--- a/src/build_settings.cpp
+++ b/src/build_settings.cpp
@@ -2346,7 +2346,7 @@ gb_internal bool init_build_paths(String init_filename) {
 				return false;
 			}
 
-			if (build_context.linker_choice == Linker_Default && find_result.vs_exe_path.len == 0) {
+			if (build_context.linker_choice == Linker_msvc && find_result.vs_exe_path.len == 0) {
 				gb_printf_err("link.exe not found.\n");
 				return false;
 			}
diff --git a/src/linker.cpp b/src/linker.cpp
index 643a9a4d0..7a36a7946 100644
--- a/src/linker.cpp
+++ b/src/linker.cpp
@@ -69,7 +69,7 @@ gb_internal i32 system_exec_msvc_linker_app(char const *name, char const *fmt, .
 				gb_printf_err("Failed to create linker response file: %s\n", rsp_path);
 				return -1;
 			}
-			if (build_context.linker_choice != Linker_radlink) {
+			if (build_context.linker_choice != Linker_Default && build_context.linker_choice != Linker_radlink) {
 				// NOTE(bill): link.exe reads a response file without a BOM in the ANSI code page but radlink does not skip a BOM
 				gb_file_write(&f, "\xef\xbb\xbf", 3);
 			}
@@ -244,6 +244,9 @@ try_cross_linking:;
 		switch (build_context.linker_choice) {
 		case Linker_Default:  break;
 		case Linker_lld:      section_name = str_lit("lld-link"); break;
+	#if defined(GB_SYSTEM_WINDOWS)
+		case Linker_radlink:  break;
+	#endif
 	#if defined(GB_SYSTEM_LINUX) || defined(GB_SYSTEM_FREEBSD) || defined(GB_SYSTEM_NETBSD)
 		case Linker_mold:     section_name = str_lit("mold-link"); break;
 	#endif

From 6fd8888986e5458456912f66dfd168defdfd407a Mon Sep 17 00:00:00 2001
From: Alexander Zhura <nice.zhura@list.ru>
Date: Mon, 5 Oct 2026 10:03:06 +0300
Subject: [PATCH 212/215] Impl simd x86 sse2 _mm_insert_epi16 fix

---
 core/simd/x86/sse2.odin | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/core/simd/x86/sse2.odin b/core/simd/x86/sse2.odin
index 4c231c377..fba995720 100644
--- a/core/simd/x86/sse2.odin
+++ b/core/simd/x86/sse2.odin
@@ -482,10 +482,15 @@ _mm_packus_epi16 :: #force_inline proc "c" (a, b: __m128i) -> __m128i {
 _mm_extract_epi16 :: #force_inline proc "c" (a: __m128i, $IMM8: u32) -> i32 {
 	return i32(simd.extract(transmute(u16x8)a, IMM8))
 }
+
+// Copy `a` to `dst`, and insert the 16-bit integer `i` into `dst` at the location specified by `imm8`.
+//
+// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_insert_epi16)
 @(require_results, enable_target_feature="sse2")
-_mm_insert_epi16 :: #force_inline proc "c" (a: __m128i, i: i32, $IMM8: u32) -> __m128i {
-	return i32(simd.replace(transmute(u16x8)a, IMM8, i16(i)))
+_mm_insert_epi16 :: #force_inline proc "c" (a: __m128i, i: i32, $IMM8: i32) -> __m128i where 0 <= IMM8, IMM8 < 8 {
+	return transmute(__m128i)simd.replace(transmute(simd.i16x8)a, uint(IMM8), i16(i))
 }
+
 @(require_results, enable_target_feature="sse2")
 _mm_movemask_epi8 :: #force_inline proc "c" (a: __m128i) -> i32 {
 	return pmovmskb(transmute(i8x16)a)

From a496d00f69259bfe02be06c3baca24c947c16eec Mon Sep 17 00:00:00 2001
From: bplu4t2f <bplu4t2f@gmail.com>
Date: Mon, 5 Oct 2026 10:41:27 +0200
Subject: [PATCH 213/215] Fix incorrect number of bytes written when formatting
 floats with `h`/`H`

---
 core/fmt/fmt.odin | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/core/fmt/fmt.odin b/core/fmt/fmt.odin
index a2e6d2247..385526a6b 100644
--- a/core/fmt/fmt.odin
+++ b/core/fmt/fmt.odin
@@ -1461,8 +1461,17 @@ fmt_float :: proc(fi: ^Info, v: f64, bit_size: int, verb: rune) {
 		_fmt_float_as(fi, v, bit_size, verb, 'E', 6)
 
 	case 'h', 'H':
-		prev_fi := fi^
-		defer fi^ = prev_fi
+		prev_hash := fi.hash
+		defer fi.hash = prev_hash
+		prev_zero := fi.zero
+		defer fi.zero = prev_zero
+		prev_plus := fi.plus
+		defer fi.plus = prev_plus
+		prev_width := fi.width
+		defer fi.width = prev_width
+		prev_width_set := fi.width_set
+		defer fi.width_set = prev_width_set
+
 		fi.hash = false
 		fi.zero = true
 		fi.plus = false

From e6d352495cc697c123de2bcf5aa9bb8472f1785d Mon Sep 17 00:00:00 2001
From: pJotoro <50463913+pJotoro@users.noreply.github.com>
Date: Mon, 5 Oct 2026 11:28:11 +0200
Subject: [PATCH 214/215] Add GetCursor and GetDpiForSystem procedures

---
 core/sys/windows/user32.odin | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/core/sys/windows/user32.odin b/core/sys/windows/user32.odin
index 75ed1e91b..5006c0671 100644
--- a/core/sys/windows/user32.odin
+++ b/core/sys/windows/user32.odin
@@ -205,6 +205,7 @@ foreign user32 {
 	ClipCursor   :: proc(lpRect: LPRECT) -> BOOL ---
 	GetCursorPos :: proc(lpPoint: LPPOINT) -> BOOL ---
 	SetCursorPos :: proc(X, Y: INT) -> BOOL ---
+	GetCursor    :: proc() -> HCURSOR ---
 	SetCursor    :: proc(hCursor: HCURSOR) -> HCURSOR ---
 	when !intrinsics.is_package_imported("raylib") {
 		ShowCursor :: proc(bShow: BOOL) -> INT ---
@@ -229,6 +230,7 @@ foreign user32 {
 	GetThreadDpiAwarenessContext  :: proc() -> DPI_AWARENESS_CONTEXT ---
 	GetWindowDpiAwarenessContext  :: proc(hwnd: HWND) -> DPI_AWARENESS_CONTEXT ---
 	GetDpiFromDpiAwarenessContext :: proc(value: DPI_AWARENESS_CONTEXT) -> UINT ---
+	GetDpiForSystem 			  :: proc() -> UINT ---
 	GetDpiForWindow               :: proc(hwnd: HWND) -> UINT ---
 	SetProcessDpiAwarenessContext :: proc(value: DPI_AWARENESS_CONTEXT) -> BOOL ---
 

From bd37cf8bddec935a7cc59c1043ebd6266539448f Mon Sep 17 00:00:00 2001
From: Jeroen van Rijn <Kelimion@users.noreply.github.com>
Date: Mon, 5 Oct 2026 12:42:16 +0200
Subject: [PATCH 215/215] Upgrade Ubuntu CI to LLVM 22

---
 .github/workflows/ci.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 0bfcce1bb..faf517e80 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -102,8 +102,8 @@ jobs:
         run: |
           wget https://apt.llvm.org/llvm.sh
           chmod +x llvm.sh
-          sudo ./llvm.sh 20
-          echo "/usr/lib/llvm-20/bin" >> $GITHUB_PATH
+          sudo ./llvm.sh 22
+          echo "/usr/lib/llvm-22/bin" >> $GITHUB_PATH
       - name: Build Odin
         run: ./build_odin.sh release
       - name: Odin version