bbodi
1e8419d1d4
Fix core:simd/x86 AVX wrappers that did not build
...
Calling these failed to compile: `_mm256_round_pd` passed a u8 where
the intrinsic takes a u32, `_mm256_blend_pd` misspelt its parameter,
`_mm256_dp_ps` took its mask as an i8, `_mm_permute_ps/pd` used
SSE/SSE2 helpers without enabling them, and `_mm256_permute2f128_pd`
did not return its result.
2026-10-08 15:51:24 +02:00
bbodi
1e1ea828a5
Fix intrinsic signatures in core:simd/x86
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`_mm_cvtsd_ss` passed two `__m128d` to `llvm.x86.sse2.cvtsd2ss`,
which takes `(<4 x float>, <2 x double>)`, so LLVM failed with
"Intrinsic has incorrect argument type". `_mm_cvtss_sd` used
`llvm.x86.sse2.cvtss2sd`, which LLVM no longer has. Both wrappers
also took the wrong operand types; use Intel's (a: __m128, b: __m128d)
and (a: __m128d, b: __m128), and express `_mm_cvtss_sd` as a lane
conversion as clang does.
`_mm_prefetch` called `llvm.prefetch` without its pointer mangling and
`__rdtscp` declared `llvm.x86.rdtscp` as taking a pointer when it
returns `{i64, i32}`; both were rejected by LLVM too.
2026-10-08 15:12:18 +02:00
bbodi
26912ceb95
Replace removed LLVM intrinsics in core:simd/x86
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LLVM has dropped many x86 intrinsics in favour of generic IR, and
auto-upgrades them only when reading bitcode. Odin declares them
directly, so the calls became undefined external symbols and failed
to link, e.g. `undefined reference to llvm.x86.sse41.pmaxsb`.
Express the affected wrappers the way clang's headers now do: scalar
lane ops, simd.min/max/abs/sqrt, shuffles for the immediate blends,
masked or narrowed multiplies, conversions and an unaligned store.
`_addcarryx_*` now use `llvm.x86.addcarry.*`, as clang does.
`_mm_sqrt_ss` took an unused second argument; it now takes one, as
in Intel's definition. It could not have been used before.
2026-10-08 15:12:18 +02:00
Alexander Zhura
620a7ab1c6
Impl simd x86 avx2 intrinsics set
2026-10-05 22:20:52 +03:00
Alexander Zhura
6fd8888986
Impl simd x86 sse2 _mm_insert_epi16 fix
2026-10-05 10:03:06 +03:00
gingerBill
56e7efb1d4
Adjust doc comments that misrender as CommonMark
2026-10-02 14:36:03 +01:00
Alexander Zhura
ce6aac3028
Impl simd x86 avx512 typo fix
2026-10-01 19:21:35 +03:00
Alexander Zhura
cd3570eef8
Impl simd x86 avx512 evex512
2026-09-30 19:03:52 +03:00
gingerBill
38b8d5f4f4
Merge pull request #7632 from alexthed1rk/impl-simd-arm-neon-transpose-reverse
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Impl simd arm neon transpose reverse
2026-09-29 13:06:47 +01:00
Alexander Zhura
f3dff6da4b
Impl simd x86 avx2 avx512 shift logical
2026-09-29 13:21:03 +03:00
Alexander Zhura
da2c46aaee
Impl simd arm neon transpose reverse set2
2026-09-25 19:49:39 +03:00
Alexander Zhura
afbecefac7
Impl simd arm neon transpose reverse set1
2026-09-25 19:41:42 +03:00
Alexander Zhura
e493449c90
Impl simd arm neon zip unzip extract set3
2026-09-20 20:47:24 +03:00
Alexander Zhura
c975678004
Impl simd arm neon zip unzip extract set2
2026-09-20 20:43:31 +03:00
Alexander Zhura
945b5980d9
Impl simd arm neon zip unzip extract set1
2026-09-20 20:32:29 +03:00
Alexander Zhura
a4d997740a
Impl simd arm neon shift right
2026-09-14 19:28:08 +03:00
henrik-the-creator
47449e3abc
Fixed typo in avx.odin
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simd_shuffle only wants constants in the shuffle indices so using this proc would generate a compiler error before this change.
2026-09-08 11:12:21 -07:00
Alexander Zhura
f41f28e8b2
Impl simd arm neon shift right, rounding and accumulate
2026-09-06 17:59:13 +03:00
Alexander Zhura
0f47a87d59
Impl comptime uint32_t to int32_t cleanup
2026-09-05 13:33:56 +03:00
Alexander Zhura
3ee25c45d2
Impl simd arm neon shift left and insert
2026-09-02 14:03:18 +03:00
Alexander Zhura
807b33d4b0
Impl simd arm neon shift left and widen
2026-09-01 21:14:11 +03:00
Alexander Zhura
a170f48381
Impl simd arm neon shift left
2026-09-01 16:24:56 +03:00
Jeroen van Rijn
3eeda58634
Merge pull request #7344 from kalsprite/simd_builtin_diagnostics
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simd: enforce the `#simd` construction rules and stop two crashes
2026-08-16 12:17:39 +02:00
kalsprite
69fb453e51
redecl type; pairwise guard
2026-08-15 22:02:06 -07:00
Alexander Zhura
64a5887f83
Impl simd arm neon logical
2026-08-14 22:01:59 +03:00
Alexander Zhura
5385710fa5
Impl simd arm neon extended table lookup
2026-08-10 20:03:54 +03:00
Alexander Zhura
59b09aa559
Impl fix simd arm neon table lookup on be
2026-08-10 14:07:05 +03:00
Alex
1b14ce9453
Impl simd arm neon table lookup
2026-08-08 18:59:07 +03:00
Alexander Zhura
62afbd45f8
Impl simd arm neon table lookup
2026-08-08 18:49:08 +03:00
Jeroen van Rijn
1f5c523844
Merge pull request #7203 from maxrabin/fix/simd-grammar
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Fix grammar in simd.odin doc comment
2026-08-08 01:58:27 +02:00
Alexander Zhura
1fd3cbb0b5
Impl simd arm neon bit manipulation
2026-08-04 23:50:47 +03:00
Alexander Zhura
cc71be2a5b
Impl fix simd arm sha arch
2026-08-04 00:19:32 +03:00
Max Rabin
e9cb1e7019
Fix grammar in simd.odin doc comment
2026-08-03 22:26:18 +03:00
Alexander Zhura
659ba07cf3
Impl simd arm pmull
2026-08-01 16:22:15 +03:00
Jeroen van Rijn
cfd0c4dc69
Revert "Impl simd arm pmull"
2026-08-01 14:04:22 +02:00
Alexander Zhura
c2bb93ea59
Impl simd arm pmull
2026-08-01 14:20:19 +03:00
Alexander Zhura
91e62c4187
Impl simd arm crc32
2026-07-31 16:17:27 +03:00
kalsprite
98d6e0c26a
ARM chunking logic, improved docs
2026-05-20 17:55:29 -07:00
gingerBill
a91725f305
Add simd.interleave + simd.deinterleave
2026-05-19 21:32:09 +01:00
gingerBill
f231ef0596
Support simd.byte_swap
2026-05-19 15:44:31 +01:00
gingerBill
42d3f78bae
Improve simd.sign_bit code generation
2026-05-19 14:54:39 +01:00
gingerBill
c87d1a3cf6
Comment out the uncompleted stuff
2026-04-08 15:42:40 +01:00
gingerBill
2414f428a5
Add core:simd/x86/avx.odin
2026-04-08 15:37:46 +01:00
gingerBill
6f7226e692
Add intrinsics.simd_pairwise_(add|sub)
2026-04-07 15:45:50 +01:00
gingerBill
6e09ce9a04
intrinsics.to_bits_signed; simd.signbit
2026-04-07 15:25:41 +01:00
gingerBill
5de18d30f3
Add intrinsics.simd_approx_recip and intrinsics.simd_approx_recip_sqrt
2026-04-07 14:35:04 +01:00
gingerBill
885db93e20
Add intrinsics.simd_sums_of_n
2026-04-07 13:18:03 +01:00
gingerBill
ac1b5aea0f
Add intrinsics.simd_odd_even; More core:simd operations
2026-04-07 11:35:20 +01:00
Yawning Angel
9051f5a075
core/simd/x86: Fix _mm_blend_epi16
2026-03-16 15:52:59 +09:00
Yawning Angel
3a59e8c849
core/simd/arm: Add the SHA intrinsics
...
The SHA3 ones aren't in the developer.arm.com documentation.
2026-03-14 14:05:15 +09:00
bbodi