From 5767a5765a278cfdc77575188fadd54fc54d5abc Mon Sep 17 00:00:00 2001 From: Adam Honse Date: Tue, 16 Nov 2021 23:50:20 -0600 Subject: [PATCH] Remove dependency on libnvme, we're only using one small function from it and it's not packaged for any distros --- .../XPGSpectrixS40GController.cpp | 120 +++++++++++------- .../XPGSpectrixS40GController.h | 39 +++--- OpenRGB.pro | 1 - 3 files changed, 94 insertions(+), 66 deletions(-) diff --git a/Controllers/XPGSpectrixS40GControllerLinux/XPGSpectrixS40GController.cpp b/Controllers/XPGSpectrixS40GControllerLinux/XPGSpectrixS40GController.cpp index caf4c7da..08998f37 100644 --- a/Controllers/XPGSpectrixS40GControllerLinux/XPGSpectrixS40GController.cpp +++ b/Controllers/XPGSpectrixS40GControllerLinux/XPGSpectrixS40GController.cpp @@ -11,6 +11,67 @@ #include #include #include "LogManager.h" +#include + +/*---------------------------------------------------------------------*\ +| Functions for submitting NVME admin passthrough command taken from | +| libnvme: https://github.com/linux-nvme/libnvme | +\*---------------------------------------------------------------------*/ + +#define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, struct nvme_passthru_cmd) + +static int nvme_submit_passthru(int fd, unsigned long ioctl_cmd, + struct nvme_passthru_cmd *cmd, uint32_t *result) +{ + int err = ioctl(fd, ioctl_cmd, cmd); + + if (err >= 0 && result) + *result = cmd->result; + return err; +} + +static int nvme_passthru(int fd, unsigned long ioctl_cmd, uint8_t opcode, + uint8_t flags, uint16_t rsvd, uint32_t nsid, uint32_t cdw2, + uint32_t cdw3, uint32_t cdw10, uint32_t cdw11, uint32_t cdw12, + uint32_t cdw13, uint32_t cdw14, uint32_t cdw15, uint32_t data_len, + void *data, uint32_t metadata_len, void *metadata, + uint32_t timeout_ms, uint32_t *result) +{ + struct nvme_passthru_cmd cmd = { + .opcode = opcode, + .flags = flags, + .rsvd1 = rsvd, + .nsid = nsid, + .cdw2 = cdw2, + .cdw3 = cdw3, + .metadata = (uint64_t)(uintptr_t)metadata, + .addr = (uint64_t)(uintptr_t)data, + .metadata_len = metadata_len, + .data_len = data_len, + .cdw10 = cdw10, + .cdw11 = cdw11, + .cdw12 = cdw12, + .cdw13 = cdw13, + .cdw14 = cdw14, + .cdw15 = cdw15, + .timeout_ms = timeout_ms, + }; + + return nvme_submit_passthru(fd, ioctl_cmd, &cmd, result); +} + +int nvme_admin_passthru(int fd, uint8_t opcode, uint8_t flags, uint16_t rsvd, + uint32_t nsid, uint32_t cdw2, uint32_t cdw3, uint32_t cdw10, + uint32_t cdw11, uint32_t cdw12, uint32_t cdw13, uint32_t cdw14, + uint32_t cdw15, uint32_t data_len, void *data, + uint32_t metadata_len, void *metadata, uint32_t timeout_ms, + uint32_t *result) +{ + return nvme_passthru(fd, NVME_IOCTL_ADMIN_CMD, opcode, flags, rsvd, + nsid, cdw2, cdw3, cdw10, cdw11, cdw12, cdw13, + cdw14, cdw15, data_len, data, metadata_len, + metadata, timeout_ms, result); +} /*-----------------------------------------*\ | AsusAuraSMBusController.cpp | @@ -221,33 +282,17 @@ unsigned char XPGSpectrixS40GController::AuraRegisterRead(aura_register reg) void XPGSpectrixS40GController::AuraRegisterWrite(aura_register reg, unsigned char val) { - struct xpg_nvme_command cfg = - { - .opcode = 0, - .flags = 0, - .rsvd = 0, - .namespace_id = 0, - .data_len = 0, - .metadata_len = 0, - .timeout = 0, - .cdw2 = 0, - .cdw3 = 0, - .cdw10 = 0, - .cdw11 = 0, - .cdw12 = 0, - .cdw13 = 0, - .cdw14 = 0, - .cdw15 = 0, - }; + struct nvme_passthru_cmd cfg; + + memset(&cfg, 0, sizeof(nvme_passthru_cmd)); unsigned short corrected_reg = ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF); cfg.opcode = 0xFB; - cfg.namespace_id = 0x00000031; + cfg.nsid = 0x00000031; cfg.cdw12 = (corrected_reg << 16) | (dev << 1); cfg.cdw13 = 0x01100001; cfg.data_len = 1; - cfg.write = true; unsigned char data[1]; @@ -259,38 +304,23 @@ void XPGSpectrixS40GController::AuraRegisterWrite(aura_register reg, unsigned ch /*-----------------------------------------------------------------------------*\ | Send the command to the device | \*-----------------------------------------------------------------------------*/ - nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd, - cfg.namespace_id, cfg.cdw2, cfg.cdw3, cfg.cdw10, + nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd1, + cfg.nsid, cfg.cdw2, cfg.cdw3, cfg.cdw10, cfg.cdw11, cfg.cdw12, cfg.cdw13, cfg.cdw14, cfg.cdw15, cfg.data_len, data, cfg.metadata_len, - metadata, cfg.timeout, &result); + metadata, cfg.timeout_ms, &result); } void XPGSpectrixS40GController::AuraRegisterWriteBlock(aura_register reg, unsigned char * data, unsigned char sz) { - struct xpg_nvme_command cfg = - { - .opcode = 0, - .flags = 0, - .rsvd = 0, - .namespace_id = 0, - .data_len = 0, - .metadata_len = 0, - .timeout = 0, - .cdw2 = 0, - .cdw3 = 0, - .cdw10 = 0, - .cdw11 = 0, - .cdw12 = 0, - .cdw13 = 0, - .cdw14 = 0, - .cdw15 = 0, - }; + struct nvme_passthru_cmd cfg; + + memset(&cfg, 0, sizeof(nvme_passthru_cmd)); unsigned short corrected_reg = ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF); cfg.opcode = 0xFB; - cfg.namespace_id = 0x00000031; + cfg.nsid = 0x00000031; cfg.cdw12 = (corrected_reg << 16) | (dev << 1); cfg.cdw13 = 0x03100000 | sz; cfg.data_len = sz; @@ -301,10 +331,10 @@ void XPGSpectrixS40GController::AuraRegisterWriteBlock(aura_register reg, unsign /*-----------------------------------------------------------------------------*\ | Send the command to the device | \*-----------------------------------------------------------------------------*/ - nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd, - cfg.namespace_id, cfg.cdw2, cfg.cdw3, cfg.cdw10, + nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd1, + cfg.nsid, cfg.cdw2, cfg.cdw3, cfg.cdw10, cfg.cdw11, cfg.cdw12, cfg.cdw13, cfg.cdw14, cfg.cdw15, cfg.data_len, data, cfg.metadata_len, - metadata, cfg.timeout, &result); + metadata, cfg.timeout_ms, &result); } diff --git a/Controllers/XPGSpectrixS40GControllerLinux/XPGSpectrixS40GController.h b/Controllers/XPGSpectrixS40GControllerLinux/XPGSpectrixS40GController.h index 4ccd7d81..a99ac5c0 100644 --- a/Controllers/XPGSpectrixS40GControllerLinux/XPGSpectrixS40GController.h +++ b/Controllers/XPGSpectrixS40GControllerLinux/XPGSpectrixS40GController.h @@ -12,8 +12,6 @@ #include #include -#include "libnvme.h" - #pragma once #define XPG_SPECTRIX_LED_COUNT ( 8 ) @@ -111,25 +109,26 @@ enum AURA_CONFIG_CHANNEL_V2 = 0x1B, /* LED Channel V2 configuration offset */ }; -struct xpg_nvme_command +struct nvme_passthru_cmd { - __u8 opcode; - __u8 flags; - __u16 rsvd; - __u32 namespace_id; - __u32 data_len; - __u32 metadata_len; - __u32 timeout; - __u32 cdw2; - __u32 cdw3; - __u32 cdw10; - __u32 cdw11; - __u32 cdw12; - __u32 cdw13; - __u32 cdw14; - __u32 cdw15; - int read; - int write; + uint8_t opcode; + uint8_t flags; + uint16_t rsvd1; + uint32_t nsid; + uint32_t cdw2; + uint32_t cdw3; + uint64_t metadata; + uint64_t addr; + uint32_t metadata_len; + uint32_t data_len; + uint32_t cdw10; + uint32_t cdw11; + uint32_t cdw12; + uint32_t cdw13; + uint32_t cdw14; + uint32_t cdw15; + uint32_t timeout_ms; + uint32_t result; }; class XPGSpectrixS40GController diff --git a/OpenRGB.pro b/OpenRGB.pro index e34947ad..7882db8c 100644 --- a/OpenRGB.pro +++ b/OpenRGB.pro @@ -1156,7 +1156,6 @@ unix:!macx { -lmbedx509 \ -lmbedtls \ -lmbedcrypto \ - -lnvme \ COMPILER_VERSION = $$system($$QMAKE_CXX " -dumpversion") if (!versionAtLeast(COMPILER_VERSION, "9")) {