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Updates to DRAM controllers to avoid use of SMBus Quick Write and add fallback paths if SMBus Block Write is unavailable, in preparation for X299 SMBus support

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This commit is contained in:
Adam Honse
2026-06-14 16:52:20 -05:00
parent ed8fd91192
commit e79af523c0
9 changed files with 107 additions and 58 deletions
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7
Controllers/CorsairDRAMController/CorsairDRAMControllerDetect.cpp
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@@ -24,18 +24,15 @@ using namespace std::chrono_literals;
bool TestForCorsairDRAMController(i2c_smbus_interface *bus, unsigned char address)
{
int res = bus->i2c_smbus_write_quick(address, I2C_SMBUS_WRITE);
LOG_DEBUG("[%s] Trying address %02X", CORSAIR_DRAM_NAME, address);
int res = bus->i2c_smbus_read_byte_data(address, 0x43);
if(res < 0)
{
LOG_DEBUG("[%s] Failed: res was %04X", CORSAIR_DRAM_NAME, res);
return false;
}
res = bus->i2c_smbus_read_byte_data(address, 0x43);
if(!(res == 0x1A || res == 0x1B || res == 0x1C))
{
LOG_DEBUG("[%s] Failed: expected 0x1A, 0x1B, or 0x1C, got %04X", CORSAIR_DRAM_NAME, res);