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3 Commits

Author SHA1 Message Date
Adam Honse
abe7a49092 Updates to DRAM controllers to avoid use of SMBus Quick Write and add fallback paths if SMBus Block Write is unavailable, in preparation for X299 SMBus support 2026-06-15 23:54:33 -05:00
mangobiche
96dfa7009f Add support for Corsair Vengeance RGB DDR5 CMH32GX5M2E6000C36 2026-05-02 15:06:09 -05:00
Adam Honse
9a6ff77545 Combine Corsair RAM controllers, Corsair RAM identification packet testing 2026-04-09 00:47:06 -05:00