mirror of
https://github.com/CalcProgrammer1/OpenRGB.git
synced 2025-12-31 03:07:49 -05:00
191 lines
7.0 KiB
C++
191 lines
7.0 KiB
C++
#include "AuraController.h"
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#include "RGBController.h"
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#include "RGBController_Aura.h"
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#include "i2c_smbus.h"
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#include <vector>
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#include <stdio.h>
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#include <stdlib.h>
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#ifdef WIN32
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#include <Windows.h>
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#else
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#include <unistd.h>
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static void Sleep(unsigned int milliseconds)
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{
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usleep(1000 * milliseconds);
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}
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#endif
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/*----------------------------------------------------------------------*\
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| This list contains the available SMBus addresses for mapping Aura RAM |
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\*----------------------------------------------------------------------*/
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#define AURA_RAM_ADDRESS_COUNT 17
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static const unsigned char aura_ram_addresses[] =
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{
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0x70,
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0x71,
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0x73,
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0x74,
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0x75,
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0x76,
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0x78,
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0x79,
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0x7A,
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0x7B,
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0x7C,
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0x7D,
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0x7E,
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0x7F,
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0x4F,
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0x66,
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0x67
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};
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/*---------------------------------------------------------------------------------*\
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| This list contains the available SMBus addresses for mapping Aura motherboards |
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\*---------------------------------------------------------------------------------*/
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#define AURA_MOBO_ADDRESS_COUNT 4
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static const unsigned char aura_mobo_addresses[] =
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{
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0x40,
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0x4E,
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0x4F,
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0x66
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};
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/******************************************************************************************\
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* *
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* AuraRegisterWrite *
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* *
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* A standalone version of the AuraController::AuraRegisterWrite function for access *
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* to Aura devices without instancing the AuraController class or reading the config *
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* table from the device. *
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* *
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\******************************************************************************************/
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void AuraRegisterWrite(i2c_smbus_interface* bus, aura_dev_id dev, aura_register reg, unsigned char val)
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{
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//Write Aura register
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bus->i2c_smbus_write_word_data(dev, 0x00, ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF));
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//Write Aura value
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bus->i2c_smbus_write_byte_data(dev, 0x01, val);
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}
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/******************************************************************************************\
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* *
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* TestForAuraController *
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* *
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* Tests the given address to see if an Aura controller exists there. First does a *
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* quick write to test for a response, and if so does a simple read at 0xA0 to test *
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* for incrementing values 0...F which was observed at this location during data dump *
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* *
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\******************************************************************************************/
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bool TestForAuraController(i2c_smbus_interface* bus, unsigned char address)
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{
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bool pass = false;
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int res = bus->i2c_smbus_write_quick(address, I2C_SMBUS_WRITE);
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if (res >= 0)
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{
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pass = true;
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for (int i = 0xA0; i < 0xB0; i++)
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{
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res = bus->i2c_smbus_read_byte_data(address, i);
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if (res != (i - 0xA0))
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{
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pass = false;
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}
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}
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}
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return(pass);
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} /* TestForAuraController() */
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/******************************************************************************************\
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* *
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* DetectAuraControllers *
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* *
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* Detect Aura controllers on the enumerated I2C busses. Searches for Aura-enabled *
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* RAM at 0x77 and tries to initialize their slot addresses, then searches for them *
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* at their correct initialized addresses. Also looks for motherboard controller at *
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* address 0x4E. *
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* *
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* bus - pointer to i2c_smbus_interface where Aura device is connected *
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* dev - I2C address of Aura device *
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* *
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\******************************************************************************************/
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void DetectAuraControllers(std::vector<i2c_smbus_interface*> &busses, std::vector<RGBController*> &rgb_controllers)
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{
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AuraController* new_aura;
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RGBController_Aura* new_controller;
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for (unsigned int bus = 0; bus < busses.size(); bus++)
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{
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int address_list_idx = 0;
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// Remap Aura-enabled RAM modules on 0x77
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for (unsigned int slot = 0; slot < 8; slot++)
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{
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int res = busses[bus]->i2c_smbus_write_quick(0x77, I2C_SMBUS_WRITE);
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if (res < 0)
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{
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break;
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}
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do
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{
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if(address_list_idx < AURA_RAM_ADDRESS_COUNT)
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{
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res = busses[bus]->i2c_smbus_write_quick(aura_ram_addresses[address_list_idx], I2C_SMBUS_WRITE);
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address_list_idx++;
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}
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else
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{
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break;
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}
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} while (res >= 0);
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AuraRegisterWrite(busses[bus], 0x77, AURA_REG_SLOT_INDEX, slot);
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AuraRegisterWrite(busses[bus], 0x77, AURA_REG_I2C_ADDRESS, (aura_ram_addresses[address_list_idx] << 1));
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}
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// Add Aura-enabled controllers at their remapped addresses
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for (unsigned int address_list_idx = 0; address_list_idx < AURA_RAM_ADDRESS_COUNT; address_list_idx++)
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{
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if (TestForAuraController(busses[bus], aura_ram_addresses[address_list_idx]))
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{
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new_aura = new AuraController(busses[bus], aura_ram_addresses[address_list_idx]);
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new_controller = new RGBController_Aura(new_aura);
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rgb_controllers.push_back(new_controller);
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}
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Sleep(1);
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}
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// Add Aura-enabled motherboard controllers
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for (unsigned int address_list_idx = 0; address_list_idx < AURA_MOBO_ADDRESS_COUNT; address_list_idx++)
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{
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if (TestForAuraController(busses[bus], aura_mobo_addresses[address_list_idx]))
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{
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new_aura = new AuraController(busses[bus], aura_mobo_addresses[address_list_idx]);
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new_controller = new RGBController_Aura(new_aura);
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rgb_controllers.push_back(new_controller);
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}
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Sleep(1);
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}
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}
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} /* DetectAuraControllers() */
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