mirror of
https://github.com/CalcProgrammer1/OpenRGB.git
synced 2026-01-25 15:37:58 -05:00
502 lines
19 KiB
C++
502 lines
19 KiB
C++
/*-------------------------------------------------------------------*\
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| XPGSpectrixS40GController.cpp |
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| Driver for XPG's Spectrix S40G NVMe |
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| NicolasNewman 25th Mar 2021 |
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\*-------------------------------------------------------------------*/
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#include "XPGSpectrixS40GController.h"
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#include <malloc.h>
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#include <cstring>
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#include "LogManager.h"
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/*-----------------------------------------*\
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| AsusAuraSMBusController.cpp |
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| Driver for ASUS Aura RGB lighting |
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| controller |
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| Adam Honse (CalcProgrammer1) 8/19/2018 |
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\*-----------------------------------------*/
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#include <cstring>
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static const char* aura_channels[] = /* Aura channel strings */
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{
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"Audio",
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"Backplate",
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"Back I/O",
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"Center",
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"Center",
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"DRAM",
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"PCIe",
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"RGB Header",
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"RGB Header 2",
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"RGB Header",
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"Unknown",
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};
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XPGSpectrixS40GController::XPGSpectrixS40GController(int fd, aura_dev_id dev)
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{
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nvme_fd = fd;
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this->dev = dev;
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direct_reg = AURA_REG_COLORS_DIRECT_V2;
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effect_reg = AURA_REG_COLORS_EFFECT_V2;
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channel_cfg = AURA_CONFIG_CHANNEL_V2;
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led_count = 8;
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}
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XPGSpectrixS40GController::~XPGSpectrixS40GController()
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{
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}
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std::string XPGSpectrixS40GController::GetDeviceName()
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{
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return("SSD");
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}
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std::string XPGSpectrixS40GController::GetDeviceLocation()
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{
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return("I2C: SSD");
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}
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unsigned char XPGSpectrixS40GController::GetChannel(unsigned int led)
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{
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return(0);
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}
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const char * XPGSpectrixS40GController::GetChannelName(unsigned int led)
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{
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switch (config_table[channel_cfg + led])
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{
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case (unsigned char)AURA_LED_CHANNEL_AUDIO:
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return(aura_channels[0]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_BACKPLATE:
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return(aura_channels[1]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_BACK_IO:
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return(aura_channels[2]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_CENTER:
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return(aura_channels[3]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_CENTER_START:
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return(aura_channels[4]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_DRAM:
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return(aura_channels[5]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_PCIE:
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return(aura_channels[6]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_RGB_HEADER:
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return(aura_channels[7]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_RGB_HEADER_2:
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return(aura_channels[8]);
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break;
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case (unsigned char)AURA_LED_CHANNEL_RGB_HEADER_3:
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return(aura_channels[9]);
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break;
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default:
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return(aura_channels[10]);
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break;
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}
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}
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unsigned int XPGSpectrixS40GController::GetLEDCount()
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{
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return(led_count);
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}
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unsigned char XPGSpectrixS40GController::GetLEDRed(unsigned int led)
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{
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return(AuraRegisterRead(direct_reg + ( 3 * led )));
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}
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unsigned char XPGSpectrixS40GController::GetLEDGreen(unsigned int led)
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{
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return(AuraRegisterRead(direct_reg + ( 3 * led ) + 2));
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}
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unsigned char XPGSpectrixS40GController::GetLEDBlue(unsigned int led)
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{
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return(AuraRegisterRead(direct_reg + ( 3 * led ) + 1));
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}
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void XPGSpectrixS40GController::SaveMode()
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{
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AuraRegisterWrite(AURA_REG_APPLY, AURA_SAVE_VAL);
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}
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void XPGSpectrixS40GController::SetAllColorsDirect(RGBColor* colors)
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{
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unsigned char* color_buf = new unsigned char[led_count * 3];
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for (unsigned int i = 0; i < (led_count * 3); i += 3)
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{
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color_buf[i + 0] = RGBGetRValue(colors[i / 3]);
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color_buf[i + 1] = RGBGetBValue(colors[i / 3]);
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color_buf[i + 2] = RGBGetGValue(colors[i / 3]);
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}
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AuraRegisterWriteBlock(direct_reg, color_buf, led_count * 3);
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delete color_buf;
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}
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void XPGSpectrixS40GController::SetAllColorsEffect(RGBColor* colors)
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{
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unsigned char* color_buf = new unsigned char[led_count * 3];
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for (unsigned int i = 0; i < (led_count * 3); i += 3)
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{
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color_buf[i + 0] = RGBGetRValue(colors[i / 3]);
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color_buf[i + 1] = RGBGetBValue(colors[i / 3]);
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color_buf[i + 2] = RGBGetGValue(colors[i / 3]);
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}
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AuraRegisterWriteBlock(effect_reg, color_buf, led_count * 3);
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AuraRegisterWrite(AURA_REG_APPLY, AURA_APPLY_VAL);
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delete[] color_buf;
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}
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void XPGSpectrixS40GController::SetDirect(unsigned char direct)
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{
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AuraRegisterWrite(AURA_REG_DIRECT, direct);
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AuraRegisterWrite(AURA_REG_APPLY, AURA_APPLY_VAL);
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}
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void XPGSpectrixS40GController::SetLEDColorDirect(unsigned int led, unsigned char red, unsigned char green, unsigned char blue)
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{
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unsigned char colors[3] = { red, blue, green };
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AuraRegisterWriteBlock(direct_reg + ( 3 * led ), colors, 3);
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}
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void XPGSpectrixS40GController::SetLEDColorEffect(unsigned int led, unsigned char red, unsigned char green, unsigned char blue)
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{
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unsigned char colors[3] = { red, blue, green };
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AuraRegisterWriteBlock(effect_reg + (3 * led), colors, 3);
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AuraRegisterWrite(AURA_REG_APPLY, AURA_APPLY_VAL);
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}
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void XPGSpectrixS40GController::SetMode(unsigned char mode, unsigned char speed, unsigned char direction)
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{
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AuraRegisterWrite(AURA_REG_MODE, mode);
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AuraRegisterWrite(AURA_REG_SPEED, speed);
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AuraRegisterWrite(AURA_REG_DIRECTION, direction);
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AuraRegisterWrite(AURA_REG_APPLY, AURA_APPLY_VAL);
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}
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void XPGSpectrixS40GController::AuraUpdateDeviceName()
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{
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for (int i = 0; i < 16; i++)
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{
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device_name[i] = AuraRegisterRead(AURA_REG_DEVICE_NAME + i);
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}
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}
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unsigned char XPGSpectrixS40GController::AuraRegisterRead(aura_register reg)
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{
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return(0);
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}
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#include "libnvme.h"
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void XPGSpectrixS40GController::AuraRegisterWrite(aura_register reg, unsigned char val)
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{
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struct config {
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__u8 opcode;
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__u8 flags;
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__u16 rsvd;
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__u32 namespace_id;
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__u32 data_len;
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__u32 metadata_len;
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__u32 timeout;
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__u32 cdw2;
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__u32 cdw3;
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__u32 cdw10;
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__u32 cdw11;
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__u32 cdw12;
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__u32 cdw13;
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__u32 cdw14;
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__u32 cdw15;
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char *input_file;
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int raw_binary;
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int show_command;
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int dry_run;
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int read;
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int write;
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__u8 prefill;
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int latency;
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};
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struct config cfg = {
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.opcode = 0,
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.flags = 0,
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.rsvd = 0,
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.namespace_id = 0,
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.data_len = 0,
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.metadata_len = 0,
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.timeout = 10,
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.cdw2 = 0,
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.cdw3 = 0,
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.cdw10 = 0,
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.cdw11 = 0,
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.cdw12 = 0,
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.cdw13 = 0,
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.cdw14 = 0,
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.cdw15 = 0,
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.input_file = "",
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.prefill = 0,
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};
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unsigned short corrected_reg = ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF);
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cfg.opcode = 0xFB;
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cfg.namespace_id = 0x00000031;
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cfg.cdw12 = (corrected_reg << 16) | (dev << 1);
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cfg.cdw13 = 0x01100001;
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cfg.data_len = 1;
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cfg.write = true;
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unsigned char data[1];
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data[0] = val;
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unsigned char metadata[1];
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unsigned int result;
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nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd,
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cfg.namespace_id, cfg.cdw2, cfg.cdw3, cfg.cdw10,
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cfg.cdw11, cfg.cdw12, cfg.cdw13, cfg.cdw14,
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cfg.cdw15, cfg.data_len, data, cfg.metadata_len,
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metadata, cfg.timeout, &result);
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// if(hDevice != INVALID_HANDLE_VALUE)
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// {
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// /*-----------------------------------------------------------------------------*\
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// | Create buffer to hold STORAGE_PROTOCOL_COMMAND |
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// | Size must be enough for the STORAGE_PROTOCOL_COMMAND struct plus the command |
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// | data. Subtract sizeof(DWORD) as the Command field in the structure overlaps |
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// | the actual command data. |
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// \*-----------------------------------------------------------------------------*/
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// unsigned char buffer[sizeof(STORAGE_PROTOCOL_COMMAND) + (sizeof(DWORD) * 34) - sizeof(DWORD)];
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// /*-----------------------------------------------------------------------------*\
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// | Create STORAGE_PROTOCOL_COMMAND pointer and point it to the buffer |
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// \*-----------------------------------------------------------------------------*/
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// PSTORAGE_PROTOCOL_COMMAND command = (PSTORAGE_PROTOCOL_COMMAND)buffer;
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// /*-----------------------------------------------------------------------------*\
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// | Fill in STORAGE_PROTOCOL_COMMAND structure |
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// \*-----------------------------------------------------------------------------*/
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// command->Version = STORAGE_PROTOCOL_STRUCTURE_VERSION;
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// command->Length = sizeof(STORAGE_PROTOCOL_COMMAND);
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// command->ProtocolType = ProtocolTypeNvme;
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// command->Flags = STORAGE_PROTOCOL_COMMAND_FLAG_ADAPTER_REQUEST;
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// command->ReturnStatus = 0x00000000;
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// command->ErrorCode = 0x00000000;
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// command->CommandLength = STORAGE_PROTOCOL_COMMAND_LENGTH_NVME;
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// command->ErrorInfoLength = 0x00000040;
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// command->DataToDeviceTransferLength = 0x00000001;
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// command->DataFromDeviceTransferLength = 0x00000000;
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// command->TimeOutValue = 0x00000001;
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// command->ErrorInfoOffset = 0x00000090;
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// command->DataToDeviceBufferOffset = 0x000000D0;
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// command->DataFromDeviceBufferOffset = 0x00000000;
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// command->CommandSpecific = STORAGE_PROTOCOL_SPECIFIC_NVME_ADMIN_COMMAND;
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// command->Reserved0 = 0x00000000;
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// command->FixedProtocolReturnData = 0x00000000;
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// command->Reserved1[0] = 0x00000000;
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// command->Reserved1[1] = 0x00000000;
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// command->Reserved1[2] = 0x00000000;
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// /*-----------------------------------------------------------------------------*\
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// | Create ENE Register Write command, filling in the appropriate register and |
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// | value |
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// \*-----------------------------------------------------------------------------*/
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// PNVME_COMMAND CommandValue = (PNVME_COMMAND)command->Command;
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// unsigned short corrected_reg = ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF);
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// CommandValue->CDW0.OPC = 0xFB;
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// CommandValue->NSID = 0x00000031;
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// CommandValue->u.GENERAL.CDW12 = (corrected_reg << 16) | (dev << 1);
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// CommandValue->u.GENERAL.CDW13 = 0x01100001;
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// DWORD ExtraValue[18] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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// 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 };
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// ExtraValue[16] = val;
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// /*-----------------------------------------------------------------------------*\
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// | Copy the ENE Register Write extra data into the STORAGE_PROTOCOL_COMMAND |
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// | buffer |
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// \*-----------------------------------------------------------------------------*/
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// memcpy(&command->Command + sizeof(NVME_COMMAND), ExtraValue, sizeof(ExtraValue));
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// /*-----------------------------------------------------------------------------*\
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// | Send the STORAGE_PROTOCOL_COMMAND to the device |
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// \*-----------------------------------------------------------------------------*/
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// DeviceIoControl(hDevice, IOCTL_STORAGE_PROTOCOL_COMMAND, buffer, sizeof(buffer), buffer, sizeof(buffer), 0x0, (LPOVERLAPPED)0x0);
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// }
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}
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void XPGSpectrixS40GController::AuraRegisterWriteBlock(aura_register reg, unsigned char * data, unsigned char sz)
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{
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struct config {
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__u8 opcode;
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__u8 flags;
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__u16 rsvd;
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__u32 namespace_id;
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__u32 data_len;
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__u32 metadata_len;
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__u32 timeout;
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__u32 cdw2;
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__u32 cdw3;
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__u32 cdw10;
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__u32 cdw11;
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__u32 cdw12;
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__u32 cdw13;
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__u32 cdw14;
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__u32 cdw15;
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char *input_file;
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int raw_binary;
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int show_command;
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int dry_run;
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int read;
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int write;
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__u8 prefill;
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int latency;
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};
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struct config cfg = {
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.opcode = 0,
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.flags = 0,
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.rsvd = 0,
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.namespace_id = 0,
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.data_len = 0,
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.metadata_len = 0,
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.timeout = 0,
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.cdw2 = 0,
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.cdw3 = 0,
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.cdw10 = 0,
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.cdw11 = 0,
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.cdw12 = 0,
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.cdw13 = 0,
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.cdw14 = 0,
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.cdw15 = 0,
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.input_file = "",
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.prefill = 0,
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};
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unsigned short corrected_reg = ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF);
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cfg.opcode = 0xFB;
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cfg.namespace_id = 0x00000031;
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cfg.cdw12 = (corrected_reg << 16) | (dev << 1);
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cfg.cdw13 = 0x03100000 | sz;
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cfg.data_len = sz;
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unsigned char metadata[1];
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unsigned int result;
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nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd,
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cfg.namespace_id, cfg.cdw2, cfg.cdw3, cfg.cdw10,
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cfg.cdw11, cfg.cdw12, cfg.cdw13, cfg.cdw14,
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cfg.cdw15, cfg.data_len, data, cfg.metadata_len,
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metadata, cfg.timeout, &result);
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// if(hDevice != INVALID_HANDLE_VALUE)
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// {
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// /*-----------------------------------------------------------------------------*\
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// | Create buffer to hold STORAGE_PROTOCOL_COMMAND |
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// | Size must be enough for the STORAGE_PROTOCOL_COMMAND struct plus the command |
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// | data. Subtract sizeof(DWORD) as the Command field in the structure overlaps |
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// | the actual command data. |
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// \*-----------------------------------------------------------------------------*/
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// unsigned char buffer[sizeof(STORAGE_PROTOCOL_COMMAND) + (sizeof(DWORD) * 39) - sizeof(DWORD)];
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// /*-----------------------------------------------------------------------------*\
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// | Create STORAGE_PROTOCOL_COMMAND pointer and point it to the buffer |
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// \*-----------------------------------------------------------------------------*/
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// PSTORAGE_PROTOCOL_COMMAND command = (PSTORAGE_PROTOCOL_COMMAND)buffer;
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// /*-----------------------------------------------------------------------------*\
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// | Fill in STORAGE_PROTOCOL_COMMAND structure |
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// \*-----------------------------------------------------------------------------*/
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// command->Version = STORAGE_PROTOCOL_STRUCTURE_VERSION;
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// command->Length = sizeof(STORAGE_PROTOCOL_COMMAND);
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// command->ProtocolType = ProtocolTypeNvme;
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// command->Flags = STORAGE_PROTOCOL_COMMAND_FLAG_ADAPTER_REQUEST;
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// command->ReturnStatus = 0x00000000;
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// command->ErrorCode = 0x00000000;
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// command->CommandLength = STORAGE_PROTOCOL_COMMAND_LENGTH_NVME;
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// command->ErrorInfoLength = 0x00000040;
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// command->DataToDeviceTransferLength = sz;
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// command->DataFromDeviceTransferLength = 0x00000000;
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// command->TimeOutValue = 0x00000001;
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// command->ErrorInfoOffset = 0x00000090;
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// command->DataToDeviceBufferOffset = 0x000000D0;
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// command->DataFromDeviceBufferOffset = 0x00000000;
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// command->CommandSpecific = STORAGE_PROTOCOL_SPECIFIC_NVME_ADMIN_COMMAND;
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// command->Reserved0 = 0x00000000;
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// command->FixedProtocolReturnData = 0x00000000;
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// command->Reserved1[0] = 0x00000000;
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// command->Reserved1[1] = 0x00000000;
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// command->Reserved1[2] = 0x00000000;
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// /*-----------------------------------------------------------------------------*\
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// | Create ENE Register Write Block command, filling in the appropriate register |
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// | and value |
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// \*-----------------------------------------------------------------------------*/
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// PNVME_COMMAND CommandValue = (PNVME_COMMAND)command->Command;
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// unsigned short corrected_reg = ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF);
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// CommandValue->CDW0.OPC = 0xFB;
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// CommandValue->NSID = 0x00000031;
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// CommandValue->u.GENERAL.CDW12 = (corrected_reg << 16) | (dev << 1);
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// CommandValue->u.GENERAL.CDW13 = 0x03100000 | sz;
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// DWORD ExtraValue[23] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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// 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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// 0x00000000, 0x00000000, 0x00000000 };
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// memcpy(&ExtraValue[16], data, sz);
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// /*-----------------------------------------------------------------------------*\
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// | Copy the ENE Register Write Block extra data into the |
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// | STORAGE_PROTOCOL_COMMAND buffer |
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// \*-----------------------------------------------------------------------------*/
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// memcpy(&command->Command + sizeof(NVME_COMMAND), ExtraValue, sizeof(ExtraValue));
|
|
|
|
// /*-----------------------------------------------------------------------------*\
|
|
// | Send the STORAGE_PROTOCOL_COMMAND to the device |
|
|
// \*-----------------------------------------------------------------------------*/
|
|
// DeviceIoControl(hDevice, IOCTL_STORAGE_PROTOCOL_COMMAND, buffer, sizeof(buffer), buffer, sizeof(buffer), 0x0, (LPOVERLAPPED)0x0);
|
|
// }
|
|
}
|
|
|