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LLVM was claiming it cannot lower MEMBARRIER on chips with AVX, because some debugging code was left behind that deactivated SSE2, even though these chips do have SSE2. Also regenerate the codegen tables. Author: Nate Begeman <natebegeman@mac.com> Date: Fri Dec 3 21:54:14 2010 +0000 Remove SSE1-4 disable when AVX is enabled. While this may be useful for development, it completely breaks scalar fp in xmm regs when AVX is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120843 91177308-0d34-0410-b5e6-96231b3b80d8
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