From 43aa90fc3f2ad380202b44cbaecff4c837e596a2 Mon Sep 17 00:00:00 2001 From: Ben Meadors Date: Sat, 28 Feb 2026 08:38:08 -0600 Subject: [PATCH] Unlock 0x8B5 register macro guard for SX162 (#9777) --- src/mesh/SX126xInterface.cpp | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/mesh/SX126xInterface.cpp b/src/mesh/SX126xInterface.cpp index a9ee16545..553cd4ee5 100644 --- a/src/mesh/SX126xInterface.cpp +++ b/src/mesh/SX126xInterface.cpp @@ -194,16 +194,13 @@ template bool SX126xInterface::init() LOG_INFO("Set RX gain to power saving mode (boosted mode off); result: %d", result); } -#ifdef USE_GC1109_PA - // Undocumented SX1262 register patch recommended by Heltec/Semtech for improved RX sensitivity - // on boards with the GC1109 FEM. Sets bit 0 of register 0x8B5. - // Reference: https://github.com/meshcore-dev/MeshCore/pull/1398 + // Undocumented SX1262 register patch recommended by Heltec/Semtech for improved RX sensitivity. + // Sets bit 0 of register 0x8B5. if (module.SPIsetRegValue(0x8B5, 0x01, 0, 0) == RADIOLIB_ERR_NONE) { LOG_INFO("Applied SX1262 register 0x8B5 patch for GC1109 RX improvement"); } else { LOG_WARN("Failed to apply SX1262 register 0x8B5 patch for GC1109"); } -#endif #if 0 // Read/write a register we are not using (only used for FSK mode) to test SPI comms