diff --git a/variants/esp32s3/meshnology-w12/pins_arduino.h b/variants/esp32s3/meshnology-w12/pins_arduino.h
new file mode 100644
index 0000000000..b7f2c1e4c1
--- /dev/null
+++ b/variants/esp32s3/meshnology-w12/pins_arduino.h
@@ -0,0 +1,60 @@
+// Meshnology W12 - shadows the generic esp32s3 pins, minus RGB_BUILTIN/LED_BUILTIN so
+// digitalWrite() does not pull in the RMT RGB HAL, which fails to link in this build.
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include "soc/soc_caps.h"
+#include <stdint.h>
+
+#define USB_VID 0x303a
+#define USB_PID 0x1001
+
+static const uint8_t TX = 43;
+static const uint8_t RX = 44;
+
+static const uint8_t SDA = 17;
+static const uint8_t SCL = 18;
+
+// LR2021 SPI bus
+static const uint8_t SS = 8;
+static const uint8_t MOSI = 10;
+static const uint8_t MISO = 11;
+static const uint8_t SCK = 9;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+static const uint8_t A5 = 6;
+static const uint8_t A6 = 7;
+static const uint8_t A7 = 8;
+static const uint8_t A8 = 9;
+static const uint8_t A9 = 10;
+static const uint8_t A10 = 11;
+static const uint8_t A11 = 12;
+static const uint8_t A12 = 13;
+static const uint8_t A13 = 14;
+static const uint8_t A14 = 15;
+static const uint8_t A15 = 16;
+static const uint8_t A16 = 17;
+static const uint8_t A17 = 18;
+static const uint8_t A18 = 19;
+static const uint8_t A19 = 20;
+
+static const uint8_t T1 = 1;
+static const uint8_t T2 = 2;
+static const uint8_t T3 = 3;
+static const uint8_t T4 = 4;
+static const uint8_t T5 = 5;
+static const uint8_t T6 = 6;
+static const uint8_t T7 = 7;
+static const uint8_t T8 = 8;
+static const uint8_t T9 = 9;
+static const uint8_t T10 = 10;
+static const uint8_t T11 = 11;
+static const uint8_t T12 = 12;
+static const uint8_t T13 = 13;
+static const uint8_t T14 = 14;
+
+#endif /* Pins_Arduino_h */
diff --git a/variants/esp32s3/meshnology-w12/platformio.ini b/variants/esp32s3/meshnology-w12/platformio.ini
new file mode 100644
index 0000000000..01574b5735
--- /dev/null
+++ b/variants/esp32s3/meshnology-w12/platformio.ini
@@ -0,0 +1,26 @@
+; Meshnology W12 "WiFi LoRa 32 V5" - ESP32-S3R8 + LR2021 dual-band LoRa + SSD1315 OLED
+; No MESHNOLOGY_W12 hardware model exists in the protobufs yet, so this reports PRIVATE_HW.
+[env:meshnology_w12]
+custom_meshtastic_hw_model = 255
+custom_meshtastic_hw_model_slug = MESHNOLOGY_W12
+custom_meshtastic_architecture = esp32-s3
+custom_meshtastic_actively_supported = true
+custom_meshtastic_support_level = 1
+custom_meshtastic_display_name = Meshnology W12
+custom_meshtastic_requires_dfu = true
+custom_meshtastic_partition_scheme = 16MB
+
+extends = esp32s3_base
+board = esp32-s3-devkitc-1
+board_level = pr
+; ESP32-S3R8: 8 MB OPI PSRAM, 16 MB QIO flash
+board_build.partitions = default_16MB.csv
+board_upload.flash_size = 16MB
+board_build.flash_mode = qio
+board_build.psram_type = opi
+board_build.arduino.memory_type = qio_opi
+build_flags =
+  ${esp32s3_base.build_flags}
+  -D MESHNOLOGY_W12
+  -D ARDUINO_USB_CDC_ON_BOOT=1
+  -I variants/esp32s3/meshnology-w12
diff --git a/variants/esp32s3/meshnology-w12/variant.h b/variants/esp32s3/meshnology-w12/variant.h
new file mode 100644
index 0000000000..c412e02221
--- /dev/null
+++ b/variants/esp32s3/meshnology-w12/variant.h
@@ -0,0 +1,45 @@
+#pragma once
+
+// Meshnology W12 "WiFi LoRa 32 V5" - ESP32-S3R8 (8 MB PSRAM) + 16 MB flash + Semtech LR2021
+// dual-band LoRa (sub-GHz + 2.4 GHz) + SSD1315 0.96" OLED. Heltec V3-style pinout.
+
+// ─── OLED ─────────────────────────────────────────────────────────────────────
+// SSD1315 (SSD1306-compatible) 128x64 at 0x3C
+#define USE_SSD1306
+#define I2C_SDA 17
+#define I2C_SCL 18
+
+// Powers the OLED/peripheral rail; active LOW
+#define VEXT_ENABLE 45
+
+// ─── User input ───────────────────────────────────────────────────────────────
+#define BUTTON_PIN 0 // BOOT doubles as user button
+
+// ─── Battery ──────────────────────────────────────────────────────────────────
+// GPIO2 monitors a second (solar/VUSB) divider and is not used here
+#define BATTERY_PIN 1
+#define ADC_CHANNEL ADC_CHANNEL_0 // GPIO1 = ADC1_CH0
+#define ADC_MULTIPLIER 2.0
+
+// ─── LoRa radio ───────────────────────────────────────────────────────────────
+// RF switching is hardwired to the radio's CTX/CPS pins, and the external PA enables
+// (IO3 sub-GHz, IO4 2.4GHz) are pulled high, so no RF-switch DIO table is needed.
+#define USE_LR2021
+#define LORA_SCK 9
+#define LORA_MISO 11
+#define LORA_MOSI 10
+#define LORA_CS 8
+#define LORA_DIO1 14 // radio DIO8; also the LoRa sleep-wake pin
+
+#define LR2021_SPI_NSS_PIN LORA_CS
+#define LR2021_IRQ_PIN LORA_DIO1
+#define LR2021_NRESET_PIN 12
+#define LR2021_BUSY_PIN 13
+// Must be 8, not RadioLib's default of 5: DIO5 is not bonded out here, so the default
+// points every interrupt at a floating pin and scanChannel() never returns.
+#define LR2021_IRQ_DIO_NUM 8
+// DIO7 -> IO7 is a second, unused IRQ line. Plain crystal on XTA/XTB, so no TCXO voltage.
+
+// ─── Not wired up yet ─────────────────────────────────────────────────────────
+// RGB LED on GPIO46 stays off: HAS_NEOPIXEL pulls in the RMT HAL, which fails to link here.
+// L76K GNSS header (RX=39, TX=38, CTRL=48 active low, WAKE=40, PPS=41, RST=42) is unpopulated.