MESHTASTIC_PRESTAGE_VIA_PHY swaps the chip-specific payload write for
PhysicalLayer::writeTxBuffer() at the three prestage sites: LR11x0's writeBuffer8(),
LR2021's clearStaleTxFifo() plus writeRadioTxFifo(), and SX126x's raw WriteBuffer
stream. Nothing else changes, so arm -b against arm -w isolates the API.
The whole branch pins jp-bennett/RadioLib tx-buffer-bench, which is jgromes/RadioLib#1890
plus the two LRxxxx bus-lock commits this bench already carried. That moves every env off
develop's 13 August jgromes pin, so -b will not match r112-a exactly.
The SX126x in-RX staging keeps its raw write: writeTxBuffer() takes no buffer offset, and
that path deliberately stages behind RX's write point.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01A8t5a5eTjHb7MtMQ88WBu4
