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Jonathan BennettandClaude Opus 5 d66f416dfe Radio: 1 ms TCXO start-up delay by default, settable per variant (#12018)
* Radio: 1 ms TCXO start-up delay by default, settable per variant

begin() programs the DIO3 TCXO start-up delay at RadioLib's 5000 us. A
clear CAD leaves the chip on its RC oscillator, so the SET_TX that
follows waits out that delay before the PA ramps. That wait sits between
the channel verdict and the air, where another node can key up unheard.

After every successful begin(), SX126x (and STM32WLx) and LR11x0 now
reprogram the delay to TCXO_STARTUP_DELAY_US, 1000 us unless a variant.h
sets it. Boards without a TCXO Vref are untouched. On Portduino,
Lora.DIO3_TCXO_DELAY_US overrides the build value.

Measured at 1000 us, SHORT_TURBO, with no decode cost at the observer:
- T1000-E (LR1110): total loss 8.66% -> 6.02% (p=0.029)
- CH341 host (SX1262): miss 6.28% -> 3.63% (p=0.003)
- RAK4631 (SX1262): goodput +4.7% (p=0.012), miss n.s.

Co-Authored-By: Jonathan Bennett <jbennett@incomsystems.biz>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01REkPVFh6kvG4AZJ5A8AtM9

* Radio: fold the TCXO delay call into the following err check

cppcheck reports duplicateCondition where the new call sits in its own
`if (res == RADIOLIB_ERR_NONE)` ahead of another check of the same
variable that the first branch never writes. Merge each one into the
check that follows it. No behaviour change.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017M2zsJykWxd6xXHCj7uZd4

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Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 21:27:47 +00:00
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