From 0f0febdad0f122ab6e4244992f2b8cb105c0fcbc Mon Sep 17 00:00:00 2001 From: Matthew Leach Date: Fri, 6 Feb 2026 20:34:22 +0000 Subject: [PATCH] arch: arm64: exceptions: use `SP_EL0` as scratch reg When detecting stack overflow in the kernel exception handler, use `SP_EL0`, rather than `TPIDR_EL1` as the scratch register. This allows us to use the `TPIDR_EL1` register as a CPU-banked register for other purposes. Use of `SP_EL0` is safe here since the stack overflow check occurs during kernel exceptions and SP_EL0 will be restored by the user-space context restore logic, overriding the clobber. --- src/arch/arm64/exceptions/exceptions.s | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/arch/arm64/exceptions/exceptions.s b/src/arch/arm64/exceptions/exceptions.s index e4d57b8..e43ffe3 100644 --- a/src/arch/arm64/exceptions/exceptions.s +++ b/src/arch/arm64/exceptions/exceptions.s @@ -60,11 +60,11 @@ __vector_\handler: sub sp, sp, #(16 * 18) // Detect stack overflow without clobbering GP registers. - msr TPIDR_EL1, x0 + msr SP_EL0, x0 mov x0, sp //TODO: share this const value with Rust. tbnz x0, #15, 0f // #15 = KERNEL_STACK_SHIFT. - mrs x0, TPIDR_EL1 + mrs x0, SP_EL0 b __impl_\handler 0: