mirror of
https://github.com/CalcProgrammer1/OpenRGB.git
synced 2025-12-23 23:37:48 -05:00
HyperX controller to use DIMM_DETECTOR
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@@ -63,98 +63,59 @@ bool TestForHyperXDRAMController(i2c_smbus_interface* bus, unsigned char address
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* Detect HyperX DRAM controllers on the enumerated I2C busses. *
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* *
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* bus - pointer to i2c_smbus_interface where Aura device is connected *
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* dev - I2C address of Aura device *
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* slots - accessors to SPD information of the occupied slots *
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* *
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\******************************************************************************************/
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void DetectHyperXDRAMControllers(std::vector<i2c_smbus_interface*> &busses)
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void DetectHyperXDRAMControllers(i2c_smbus_interface* bus, std::vector<SPDWrapper*> &slots)
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{
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for(unsigned int bus = 0; bus < busses.size(); bus++)
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unsigned char slots_valid = 0x00;
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bool fury_detected = false;
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bool pred_detected = false;
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// Check for HyperX controller at 0x27
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LOG_DEBUG("[%s] Testing bus %d at address 0x27", HYPERX_CONTROLLER_NAME, bus->port_id);
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if(TestForHyperXDRAMController(bus, 0x27))
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{
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unsigned char slots_valid = 0x00;
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bool fury_detected = false;
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bool pred_detected = false;
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LOG_DEBUG("[%s] Checking VID/PID on bus %d...", HYPERX_CONTROLLER_NAME, bus);
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IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
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for(SPDWrapper *slot : slots)
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{
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// Check for HyperX controller at 0x27
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LOG_DEBUG("[%s] Testing bus %d at address 0x27", HYPERX_CONTROLLER_NAME, bus);
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LOG_DEBUG("[%s] SPD check success", HYPERX_CONTROLLER_NAME);
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if(TestForHyperXDRAMController(busses[bus], 0x27))
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slots_valid |= (1 << (slot->index()));
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if(slot->manufacturer_data(0x06) == 0x01)
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{
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// Switch to 2nd SPD page
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busses[bus]->i2c_smbus_write_byte_data(0x37, 0x00, 0xFF);
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std::this_thread::sleep_for(1ms);
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for(int slot_addr = 0x50; slot_addr <= 0x57; slot_addr++)
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{
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// Test for HyperX SPD at slot_addr
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// This test was copied from NGENUITY software
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// Tests SPD addresses in order: 0x40, 0x41
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int read_0x40 = busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x40);
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int read_0x41 = busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x41);
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LOG_DEBUG("[%s] SPD check: 0x40 => %02X, 0x41 => %02X, ",
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HYPERX_CONTROLLER_NAME, read_0x40, read_0x41);
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if((read_0x40 == 0x01) && (read_0x41 == 0x98))
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{
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LOG_DEBUG("[%s] SPD check success", HYPERX_CONTROLLER_NAME);
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slots_valid |= (1 << (slot_addr - 0x50));
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if(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x67) == 0x01)
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{
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fury_detected = true;
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}
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else
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{
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pred_detected = true;
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}
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}
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else
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{
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LOG_DEBUG("[%s] SPD check failed", HYPERX_CONTROLLER_NAME);
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}
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std::this_thread::sleep_for(1ms);
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}
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LOG_DEBUG("[%s] slots_valid=%d fury_detected=%d pred_detected=%d",
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HYPERX_CONTROLLER_NAME, slots_valid, fury_detected, pred_detected);
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// Switch back to 1st SPD page
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busses[bus]->i2c_smbus_write_byte_data(0x36, 0x00, 0xFF);
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std::this_thread::sleep_for(1ms);
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if(slots_valid != 0)
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{
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HyperXDRAMController* controller = new HyperXDRAMController(busses[bus], 0x27, slots_valid);
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RGBController_HyperXDRAM* rgb_controller = new RGBController_HyperXDRAM(controller);
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if(fury_detected && !pred_detected)
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{
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rgb_controller->name = "HyperX Fury RGB";
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}
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else if(!fury_detected && pred_detected)
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{
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rgb_controller->name = "HyperX Predator RGB";
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}
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ResourceManager::get()->RegisterRGBController(rgb_controller);
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}
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fury_detected = true;
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}
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else
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{
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pred_detected = true;
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}
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std::this_thread::sleep_for(1ms);
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}
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else
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LOG_DEBUG("[%s] slots_valid=%d fury_detected=%d pred_detected=%d",
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HYPERX_CONTROLLER_NAME, slots_valid, fury_detected, pred_detected);
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if(slots_valid != 0)
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{
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LOG_DEBUG("[%s] IF_DRAM_SMBUS was false for %04X %04X", HYPERX_CONTROLLER_NAME, busses[bus]->pci_vendor, busses[bus]->pci_device);
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HyperXDRAMController* controller = new HyperXDRAMController(bus, 0x27, slots_valid);
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RGBController_HyperXDRAM* rgb_controller = new RGBController_HyperXDRAM(controller);
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if(fury_detected && !pred_detected)
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{
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rgb_controller->name = "HyperX Fury RGB";
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}
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else if(!fury_detected && pred_detected)
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{
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rgb_controller->name = "HyperX Predator RGB";
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}
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ResourceManager::get()->RegisterRGBController(rgb_controller);
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}
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}
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} /* DetectHyperXDRAMControllers() */
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REGISTER_I2C_DETECTOR("HyperX DRAM", DetectHyperXDRAMControllers);
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REGISTER_I2C_DIMM_DETECTOR("HyperX DRAM", DetectHyperXDRAMControllers, JEDEC_KINGSTON, SPD_DDR4_SDRAM);
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@@ -111,6 +111,15 @@ uint16_t DDR4Accessor::jedec_id()
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return((this->at(0x140) << 8) + (this->at(0x141) & 0x7f) - 1);
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}
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uint8_t DDR4Accessor::manufacturer_data(uint16_t index)
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{
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if(index > 28)
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{
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return 0;
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}
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return this->at(0x161 + index);
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}
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DDR5Accessor::DDR5Accessor(i2c_smbus_interface *bus, uint8_t spd_addr)
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: SPDAccessor(bus, spd_addr)
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{
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@@ -129,3 +138,12 @@ uint16_t DDR5Accessor::jedec_id()
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{
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return((this->at(0x200) << 8) + (this->at(0x201) & 0x7f) - 1);
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}
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uint8_t DDR5Accessor::manufacturer_data(uint16_t index)
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{
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if(index > 84)
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{
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return 0;
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}
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return this->at(0x22B + index);
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}
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@@ -21,6 +21,7 @@ class SPDAccessor
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virtual SPDMemoryType memory_type() = 0;
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virtual uint16_t jedec_id() = 0;
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virtual uint8_t manufacturer_data(uint16_t index) = 0;
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virtual SPDAccessor *copy() = 0;
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@@ -42,6 +43,7 @@ class DDR4Accessor : public SPDAccessor
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virtual ~DDR4Accessor();
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virtual SPDMemoryType memory_type();
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virtual uint16_t jedec_id();
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virtual uint8_t manufacturer_data(uint16_t index);
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};
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class DDR5Accessor : public SPDAccessor
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@@ -51,4 +53,5 @@ class DDR5Accessor : public SPDAccessor
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virtual ~DDR5Accessor();
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virtual SPDMemoryType memory_type();
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virtual uint16_t jedec_id();
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virtual uint8_t manufacturer_data(uint16_t index);
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};
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@@ -52,6 +52,15 @@ uint16_t SPDWrapper::jedec_id()
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return accessor->jedec_id();
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}
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uint8_t SPDWrapper::manufacturer_data(uint16_t index)
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{
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if(accessor == nullptr)
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{
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return 0x00;
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}
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return accessor->manufacturer_data(index);
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}
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/*-------------------------------------------------------------------------*\
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| Helper functions for easier collection handling. |
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\*-------------------------------------------------------------------------*/
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@@ -23,6 +23,7 @@ class SPDWrapper
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SPDMemoryType memory_type();
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int index();
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uint16_t jedec_id();
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uint8_t manufacturer_data(uint16_t index);
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private:
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SPDAccessor *accessor = nullptr;
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