mirror of
https://github.com/CalcProgrammer1/OpenRGB.git
synced 2026-01-03 12:47:51 -05:00
e9107276cf
The latest RAM modules all show up at address 0x27 instead of 0x20-0x23. So lets remap them so they can be detected and controlled individually. Since other RGB software can already handle them add and assign the addresses used there as well.
147 lines
5.3 KiB
C++
147 lines
5.3 KiB
C++
#include "Detector.h"
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#include "CrucialController.h"
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#include "RGBController.h"
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#include "RGBController_Crucial.h"
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#include "i2c_smbus.h"
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#include "pci_ids.h"
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#include <vector>
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#include <stdio.h>
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#include <stdlib.h>
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using namespace std::chrono_literals;
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/*----------------------------------------------------------------------*\
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| This list contains the available SMBus addresses for Crucial RAM |
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\*----------------------------------------------------------------------*/
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#define CRUCIAL_ADDRESS_COUNT 8
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static const unsigned char crucial_addresses[] =
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{
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0x39,
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0x3A,
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0x3B,
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0x3C,
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0x20,
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0x21,
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0x22,
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0x23
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};
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/******************************************************************************************\
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* *
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* TestForCrucialController *
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* *
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* Tests the given address to see if an Crucial controller exists there. First does a*
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* quick write to test for a response, and if so does a simple read at 0xA0 to test *
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* for incrementing values 0...F which was observed at this location during data dump *
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* *
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\******************************************************************************************/
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bool TestForCrucialController(i2c_smbus_interface* bus, unsigned char address)
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{
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bool pass = false;
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int res = bus->i2c_smbus_write_quick(address, I2C_SMBUS_WRITE);
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if (res >= 0)
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{
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pass = true;
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for (int i = 0xA0; i < 0xB0; i++)
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{
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res = bus->i2c_smbus_read_byte_data(address, i);
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if (res != (i - 0xA0))
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{
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pass = false;
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}
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}
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}
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return(pass);
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} /* TestForCrucialController() */
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void CrucialRegisterWrite(i2c_smbus_interface* bus, unsigned char dev, unsigned short reg, unsigned char val)
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{
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//Write Crucial register
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bus->i2c_smbus_write_word_data(dev, 0x00, ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF));
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//Write Crucial value
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bus->i2c_smbus_write_byte_data(dev, 0x01, val);
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}
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/******************************************************************************************\
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* *
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* DetectCrucialControllers *
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* *
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* Detect Crucial controllers on the enumerated I2C busses. *
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* *
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* bus - pointer to i2c_smbus_interface where Aura device is connected *
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* dev - I2C address of Aura device *
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* *
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\******************************************************************************************/
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void DetectCrucialControllers(std::vector<i2c_smbus_interface*> &busses, std::vector<RGBController*> &rgb_controllers)
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{
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CrucialController* new_crucial;
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RGBController_Crucial* new_controller;
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for (unsigned int bus = 0; bus < busses.size(); bus++)
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{
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int address_list_idx = -1;
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IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
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{
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// Remap Crucial RAM modules on 0x27
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for (unsigned int slot = 0; slot < 4; slot++)
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{
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int res = busses[bus]->i2c_smbus_write_quick(0x27, I2C_SMBUS_WRITE);
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if (res < 0)
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{
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break;
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}
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do
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{
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address_list_idx++;
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if(address_list_idx < CRUCIAL_ADDRESS_COUNT)
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{
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res = busses[bus]->i2c_smbus_write_quick(crucial_addresses[address_list_idx], I2C_SMBUS_WRITE);
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}
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else
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{
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break;
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}
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} while (res >= 0);
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if(address_list_idx < CRUCIAL_ADDRESS_COUNT)
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{
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CrucialRegisterWrite(busses[bus], 0x27, 0x82EE, slot);
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CrucialRegisterWrite(busses[bus], 0x27, 0x82EF, (crucial_addresses[address_list_idx] << 1));
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CrucialRegisterWrite(busses[bus], 0x27, 0x82F0, 0xF0);
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}
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std::this_thread::sleep_for(1ms);
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}
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// Add Crucial controllers
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for (unsigned int address_list_idx = 0; address_list_idx < CRUCIAL_ADDRESS_COUNT; address_list_idx++)
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{
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if (TestForCrucialController(busses[bus], crucial_addresses[address_list_idx]))
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{
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new_crucial = new CrucialController(busses[bus], crucial_addresses[address_list_idx]);
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new_controller = new RGBController_Crucial(new_crucial);
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rgb_controllers.push_back(new_controller);
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}
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}
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}
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}
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} /* DetectCrucialControllers() */
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REGISTER_I2C_DETECTOR("Crucial", DetectCrucialControllers);
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