mirror of
https://github.com/Motion-Project/motion.git
synced 2026-02-03 03:21:38 -05:00
Remove mmx
This commit is contained in:
MrDave
222
src/alg.c
222
src/alg.c
@@ -9,11 +9,6 @@
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#include "motion.h"
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#include "alg.h"
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#ifdef __MMX__
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#define HAVE_MMX
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#include "mmx.h"
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#endif
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#define MAX2(x, y) ((x) > (y) ? (x) : (y))
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#define MAX3(x, y, z) ((x) > (y) ? ((x) > (z) ? (x) : (z)) : ((y) > (z) ? (y) : (z)))
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@@ -943,228 +938,11 @@ int alg_diff_standard(struct context *cnt, unsigned char *new)
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unsigned char *mask = imgs->mask;
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unsigned char *smartmask_final = imgs->smartmask_final;
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int *smartmask_buffer = imgs->smartmask_buffer;
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#ifdef HAVE_MMX
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mmx_t mmtemp; /* Used for transferring to/from memory. */
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int unload; /* Counter for unloading diff counts. */
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#endif
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i = imgs->motionsize;
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memset(out + i, 128, i / 2); /* Motion pictures are now b/w i.o. green */
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/*
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* Keeping this memset in the MMX case when zeroes are necessarily
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* written anyway seems to be beneficial in terms of speed. Perhaps a
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* cache thing?
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*/
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memset(out, 0, i);
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#ifdef HAVE_MMX
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/*
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* NOTE: The Pentium has two instruction pipes: U and V. I have grouped MMX
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* instructions in pairs according to how I think they will be scheduled in
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* the U and V pipes. Due to pairing constraints, the V pipe will sometimes
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* be empty (for example, memory access always goes into the U pipe).
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*
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* The following MMX registers are kept throughout the loop:
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* mm5 - 8 separate diff counters (unloaded periodically)
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* mm6 - mask: 00ff 00ff 00ff 00ff
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* mm7 - noise level as 8 packed bytes
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*
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* -- Per Jonsson
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*/
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/*
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* To avoid a div, we work with differences multiplied by 255 in the
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* default case and *mask otherwise. Thus, the limit to compare with is
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* 255 * (noise + 1) - 1).
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*/
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mmtemp.uw[0] = mmtemp.uw[1] = mmtemp.uw[2] = mmtemp.uw[3] =
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(unsigned short)(noise * 255 + 254);
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/*
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* Reset mm5 to zero, set the mm6 mask, and store the multiplied noise
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* level as four words in mm7.
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*/
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movq_m2r(mmtemp, mm7); /* U */
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pcmpeqb_r2r(mm6, mm6); /* V */
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pxor_r2r(mm5, mm5); /* U */
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psrlw_i2r(8, mm6); /* V */
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/*
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* We must unload mm5 every 255th round, because the diffs accumulate
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* in each packed byte, which can hold at most 255 diffs before it
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* gets saturated.
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*/
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unload = 255;
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for (; i > 7; i -= 8) {
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/* Calculate abs(*ref-*new) for 8 pixels in parallel. */
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movq_m2r(*ref, mm0); /* U: mm0 = r7 r6 r5 r4 r3 r2 r1 r0 */
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pxor_r2r(mm4, mm4); /* V: mm4 = 0 */
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movq_m2r(*new, mm1); /* U: mm1 = n7 n6 n5 n4 n3 n2 n1 n0 */
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movq_r2r(mm0, mm2); /* V: mm2 = r7 r6 r5 r4 r3 r2 r1 r0 */
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/* These subtractions are saturated, i.e. won't go below 0. */
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psubusb_r2r(mm1, mm0); /* U: mm0 = (r7-n7) ... (r0-n0) */
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psubusb_r2r(mm2, mm1); /* V: mm1 = (n7-r7) ... (n0-r0) */
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/* Each byte dX in mm0 is abs(nX-rX). */
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por_r2r(mm1, mm0); /* U: mm0 = d7 d6 d5 d4 d3 d2 d1 d0 */
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/* Expand the absolute differences to words in mm0 and mm1. */
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movq_r2r(mm0, mm1); /* U: mm1 = d7 d6 d5 d4 d3 d2 d1 d0 */
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punpcklbw_r2r(mm4, mm0); /* V: mm0 = d3 d2 d1 d0 */
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punpckhbw_r2r(mm4, mm1); /* U: mm1 = d7 d6 d5 d4 */
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if (mask) {
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/*
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* Load and expand 8 mask bytes to words in mm2 and mm3. Then
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* multiply by mm0 and mm1, respectively.
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*/
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movq_m2r(*mask, mm2); /* U: mm2 = m7 m6 m5 m4 m3 m2 m1 m0 */
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movq_r2r(mm2, mm3); /* U: mm3 = m7 m6 m5 m4 m3 m2 m1 m0 */
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punpcklbw_r2r(mm4, mm2); /* v: mm2 = m3 m2 m1 m0 */
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punpckhbw_r2r(mm4, mm3); /* U: mm3 = m7 m6 m5 m4 */
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pmullw_r2r(mm2, mm0); /* V: mm0 = (d3*m3) ... (d0*m0) */
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pmullw_r2r(mm3, mm1); /* U: mm1 = (d7*m7) ... (d4*m4) */
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mask += 8;
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} else {
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/*
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* Not using mask - multiply the absolute differences by 255. We
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* do this by left-shifting 8 places and then subtracting dX.
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*/
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movq_r2r(mm0, mm2); /* U: mm2 = d3 d2 d1 d0 */
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psllw_i2r(8, mm0); /* V: mm2 = (256*d3) ... (256*d0) */
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movq_r2r(mm1, mm3); /* U: mm3 = d7 d6 d5 d4 */
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psllw_i2r(8, mm1); /* V: mm3 = (256*d7) ... (256*d4) */
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psubusw_r2r(mm2, mm0); /* U */
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psubusw_r2r(mm3, mm1); /* V */
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}
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/*
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* Next, compare the multiplied absolute differences with the multiplied
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* noise level (repeated as 4 words in mm7), resulting in a "motion flag"
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* for each pixel.
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*
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* Since pcmpgtw performs signed comparisons, we have to subtract noise,
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* test for equality to 0 and then invert the result.
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*
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* Note that it is safe to generate the "motion flags" before the
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* smartmask code, as all that can happen is that individual flags get
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* reset to 0 because of the smartmask.
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*/
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psubusw_r2r(mm7, mm0); /* U: subtract by (multiplied) noise */
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psubusw_r2r(mm7, mm1); /* V */
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pcmpeqw_r2r(mm4, mm0); /* U: test for equality with 0 */
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pcmpeqw_r2r(mm4, mm1); /* V */
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pand_r2r(mm6, mm0); /* U: convert 0xffff -> 0x00ff */
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pand_r2r(mm6, mm1); /* V */
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pxor_r2r(mm6, mm0); /* U: invert the result */
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pxor_r2r(mm6, mm1); /* V */
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/* Each fX is the "motion flag" = 0 for no motion, 0xff for motion. */
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packuswb_r2r(mm1, mm0); /* U: mm0 = f7 f6 f5 f4 f3 f2 f1 f0 */
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if (smartmask_speed) {
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/*
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* Apply the smartmask. Basically, if *smartmask_final is 0, the
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* corresponding "motion flag" in mm0 will be reset.
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*/
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movq_m2r(*smartmask_final, mm3); /* U: mm3 = s7 s6 s5 s4 s3 s2 s1 s0 */
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/*
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* ...but move the "motion flags" to memory before, in order to
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* increment *smartmask_buffer properly below.
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*/
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movq_r2m(mm0, mmtemp); /* U */
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pcmpeqb_r2r(mm4, mm3); /* V: mm3 = 0xff where sX==0 */
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/* AND negates the target before anding. */
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pandn_r2r(mm0, mm3); /* U: mm3 = 0xff where dX>noise && sX>0 */
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movq_r2r(mm3, mm0); /* U */
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/* Add to *smartmask_buffer. This is probably the fastest way to do it. */
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if (cnt->event_nr != cnt->prev_event) {
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if (mmtemp.ub[0]) smartmask_buffer[0] += SMARTMASK_SENSITIVITY_INCR;
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if (mmtemp.ub[1]) smartmask_buffer[1] += SMARTMASK_SENSITIVITY_INCR;
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if (mmtemp.ub[2]) smartmask_buffer[2] += SMARTMASK_SENSITIVITY_INCR;
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if (mmtemp.ub[3]) smartmask_buffer[3] += SMARTMASK_SENSITIVITY_INCR;
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if (mmtemp.ub[4]) smartmask_buffer[4] += SMARTMASK_SENSITIVITY_INCR;
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if (mmtemp.ub[5]) smartmask_buffer[5] += SMARTMASK_SENSITIVITY_INCR;
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if (mmtemp.ub[6]) smartmask_buffer[6] += SMARTMASK_SENSITIVITY_INCR;
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if (mmtemp.ub[7]) smartmask_buffer[7] += SMARTMASK_SENSITIVITY_INCR;
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}
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smartmask_buffer += 8;
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smartmask_final += 8;
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}
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movq_m2r(*new, mm2); /* U: mm1 = n7 n6 n5 n4 n3 n2 n1 n0 */
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/*
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* Cancel out pixels in *new according to the "motion flags" in mm0.
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* Each NX is either 0 or nX as from *new.
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*/
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pand_r2r(mm0, mm2); /* U: mm1 = N7 N6 N5 N4 N3 N2 N1 N0 */
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psubb_r2r(mm0, mm4); /* V: mm4 = 0x01 where dX>noise */
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/*
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* mm5 holds 8 separate counts - each one is increased according to
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* the contents of mm4 (where each byte is either 0x00 or 0x01).
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*/
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movq_r2m(mm2, *out); /* U: this will stall */
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paddusb_r2r(mm4, mm5); /* V: add counts to mm5 */
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/*
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* Every 255th turn, we need to unload mm5 into the diffs variable,
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* because otherwise the packed bytes will get saturated.
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*/
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if (--unload == 0) {
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/* Unload mm5 to memory and reset it. */
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movq_r2m(mm5, mmtemp); /* U */
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pxor_r2r(mm5, mm5); /* V: mm5 = 0 */
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diffs += mmtemp.ub[0] + mmtemp.ub[1] + mmtemp.ub[2] + mmtemp.ub[3] +
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mmtemp.ub[4] + mmtemp.ub[5] + mmtemp.ub[6] + mmtemp.ub[7];
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unload = 255;
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}
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out += 8;
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ref += 8;
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new += 8;
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}
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/*
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* Check if there are diffs left in mm5 that need to be copied to the
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* diffs variable.
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*/
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if (unload < 255) {
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movq_r2m(mm5, mmtemp);
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diffs += mmtemp.ub[0] + mmtemp.ub[1] + mmtemp.ub[2] + mmtemp.ub[3] +
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mmtemp.ub[4] + mmtemp.ub[5] + mmtemp.ub[6] + mmtemp.ub[7];
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}
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emms();
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#endif
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/*
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* Note that the non-MMX code is present even if the MMX code is present.
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* This is necessary if the resolution is not a multiple of 8, in which
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* case the non-MMX code needs to take care of the remaining pixels.
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*/
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for (; i > 0; i--) {
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register unsigned char curdiff = (int)(abs(*ref - *new)); /* Using a temp variable is 12% faster. */
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/* Apply fixed mask */
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267
src/mmx.h
267
src/mmx.h
@@ -1,267 +0,0 @@
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/*
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* mmx.h
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* Copyright (C) 1997-2001 H. Dietz and R. Fisher
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*/
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#ifndef I386MMX_H
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#define I386MMX_H
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/*
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* The type of an value that fits in an MMX register (note that long
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* long constant values MUST be suffixed by LL and unsigned long long
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* values by ULL, lest they be truncated by the compiler)
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*/
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typedef union {
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long long q; /* Quadword (64-bit) value */
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unsigned long long uq; /* Unsigned Quadword */
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int d[2]; /* 2 Doubleword (32-bit) values */
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unsigned int ud[2]; /* 2 Unsigned Doubleword */
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short w[4]; /* 4 Word (16-bit) values */
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unsigned short uw[4]; /* 4 Unsigned Word */
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char b[8]; /* 8 Byte (8-bit) values */
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unsigned char ub[8]; /* 8 Unsigned Byte */
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float s[2]; /* Single-precision (32-bit) value */
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} mmx_t; /* On an 8-byte (64-bit) boundary */
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#define mmx_i2r(op,imm,reg) \
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__asm__ __volatile__ (#op " %0, %%" #reg \
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: /* nothing */ \
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: "i" (imm))
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#define mmx_m2r(op,mem,reg) \
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__asm__ __volatile__ (#op " %0, %%" #reg \
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: /* nothing */ \
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: "m" (mem))
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#define mmx_r2m(op,reg,mem) \
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__asm__ __volatile__ (#op " %%" #reg ", %0" \
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: "=m" (mem) \
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: /* nothing */ )
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#define mmx_r2r(op,regs,regd) \
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__asm__ __volatile__ (#op " %" #regs ", %" #regd)
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#define emms() __asm__ __volatile__ ("emms")
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#define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
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#define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
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#define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
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#define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
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#define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
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#define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
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#define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
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#define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
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#define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
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#define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
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#define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
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#define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
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#define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
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#define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
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#define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
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#define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
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#define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
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#define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
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#define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
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#define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
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#define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
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#define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
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#define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
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#define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
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#define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
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#define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
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#define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
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#define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
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#define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
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#define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
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#define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
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#define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
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#define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
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#define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
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#define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
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#define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
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#define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
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#define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
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#define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
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#define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
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#define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
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#define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
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#define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
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#define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
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#define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
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#define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
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#define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
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#define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
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#define por_m2r(var,reg) mmx_m2r (por, var, reg)
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#define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
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#define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg)
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#define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
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#define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
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#define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg)
|
||||
#define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
|
||||
#define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
|
||||
#define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg)
|
||||
#define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
|
||||
#define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
|
||||
|
||||
#define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg)
|
||||
#define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
|
||||
#define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
|
||||
#define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg)
|
||||
#define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
|
||||
#define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
|
||||
|
||||
#define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg)
|
||||
#define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
|
||||
#define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
|
||||
#define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg)
|
||||
#define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
|
||||
#define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
|
||||
#define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg)
|
||||
#define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
|
||||
#define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
|
||||
|
||||
#define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
|
||||
#define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
|
||||
#define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
|
||||
#define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
|
||||
#define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
|
||||
#define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
|
||||
|
||||
#define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
|
||||
#define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
|
||||
#define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
|
||||
#define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
|
||||
|
||||
#define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
|
||||
#define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
|
||||
#define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
|
||||
#define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
|
||||
|
||||
#define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
|
||||
#define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
|
||||
#define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
|
||||
#define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
|
||||
#define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
|
||||
#define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
|
||||
|
||||
#define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
|
||||
#define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
|
||||
#define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
|
||||
#define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
|
||||
#define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
|
||||
#define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
|
||||
|
||||
#define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg)
|
||||
#define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd)
|
||||
|
||||
|
||||
/* 3DNOW extensions */
|
||||
|
||||
#define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg)
|
||||
#define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd)
|
||||
|
||||
|
||||
/* AMD MMX extensions - also available in intel SSE */
|
||||
|
||||
|
||||
#define mmx_m2ri(op,mem,reg,imm) \
|
||||
__asm__ __volatile__ (#op " %1, %0, %%" #reg \
|
||||
: /* nothing */ \
|
||||
: "X" (mem), "X" (imm))
|
||||
#define mmx_r2ri(op,regs,regd,imm) \
|
||||
__asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
|
||||
: /* nothing */ \
|
||||
: "X" (imm))
|
||||
|
||||
#define mmx_fetch(mem,hint) \
|
||||
__asm__ __volatile__ ("prefetch" #hint " %0" \
|
||||
: /* nothing */ \
|
||||
: "X" (mem))
|
||||
|
||||
|
||||
#define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
|
||||
|
||||
#define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
|
||||
|
||||
#define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
|
||||
#define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
|
||||
#define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
|
||||
#define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
|
||||
|
||||
#define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
|
||||
|
||||
#define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
|
||||
|
||||
#define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
|
||||
#define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
|
||||
|
||||
#define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
|
||||
#define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
|
||||
|
||||
#define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
|
||||
#define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
|
||||
|
||||
#define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
|
||||
#define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
|
||||
|
||||
#define pmovmskb(mmreg,reg) \
|
||||
__asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg)
|
||||
|
||||
#define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
|
||||
#define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
|
||||
|
||||
#define prefetcht0(mem) mmx_fetch (mem, t0)
|
||||
#define prefetcht1(mem) mmx_fetch (mem, t1)
|
||||
#define prefetcht2(mem) mmx_fetch (mem, t2)
|
||||
#define prefetchnta(mem) mmx_fetch (mem, nta)
|
||||
|
||||
#define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
|
||||
#define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
|
||||
|
||||
#define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
|
||||
#define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
|
||||
|
||||
#define sfence() __asm__ __volatile__ ("sfence\n\t")
|
||||
|
||||
/* SSE2 */
|
||||
#define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm)
|
||||
#define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm)
|
||||
#define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm)
|
||||
#define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm)
|
||||
|
||||
#define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm)
|
||||
|
||||
#define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg)
|
||||
#define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var)
|
||||
#define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd)
|
||||
#define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg)
|
||||
#define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var)
|
||||
#define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd)
|
||||
|
||||
#define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var)
|
||||
|
||||
#define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg)
|
||||
#define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg)
|
||||
|
||||
#define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd)
|
||||
#define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd)
|
||||
|
||||
|
||||
#endif /* I386MMX_H */
|
||||
Reference in New Issue
Block a user