mirror of
https://github.com/CalcProgrammer1/OpenRGB.git
synced 2025-12-23 23:37:48 -05:00
Remove dependency on libnvme, we're only using one small function from it and it's not packaged for any distros
This commit is contained in:
@@ -11,6 +11,67 @@
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#include <malloc.h>
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#include <cstring>
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#include "LogManager.h"
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#include <sys/ioctl.h>
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/*---------------------------------------------------------------------*\
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| Functions for submitting NVME admin passthrough command taken from |
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| libnvme: https://github.com/linux-nvme/libnvme |
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\*---------------------------------------------------------------------*/
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#define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, struct nvme_passthru_cmd)
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static int nvme_submit_passthru(int fd, unsigned long ioctl_cmd,
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struct nvme_passthru_cmd *cmd, uint32_t *result)
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{
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int err = ioctl(fd, ioctl_cmd, cmd);
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if (err >= 0 && result)
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*result = cmd->result;
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return err;
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}
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static int nvme_passthru(int fd, unsigned long ioctl_cmd, uint8_t opcode,
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uint8_t flags, uint16_t rsvd, uint32_t nsid, uint32_t cdw2,
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uint32_t cdw3, uint32_t cdw10, uint32_t cdw11, uint32_t cdw12,
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uint32_t cdw13, uint32_t cdw14, uint32_t cdw15, uint32_t data_len,
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void *data, uint32_t metadata_len, void *metadata,
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uint32_t timeout_ms, uint32_t *result)
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{
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struct nvme_passthru_cmd cmd = {
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.opcode = opcode,
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.flags = flags,
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.rsvd1 = rsvd,
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.nsid = nsid,
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.cdw2 = cdw2,
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.cdw3 = cdw3,
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.metadata = (uint64_t)(uintptr_t)metadata,
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.addr = (uint64_t)(uintptr_t)data,
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.metadata_len = metadata_len,
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.data_len = data_len,
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.cdw10 = cdw10,
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.cdw11 = cdw11,
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.cdw12 = cdw12,
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.cdw13 = cdw13,
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.cdw14 = cdw14,
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.cdw15 = cdw15,
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.timeout_ms = timeout_ms,
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};
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return nvme_submit_passthru(fd, ioctl_cmd, &cmd, result);
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}
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int nvme_admin_passthru(int fd, uint8_t opcode, uint8_t flags, uint16_t rsvd,
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uint32_t nsid, uint32_t cdw2, uint32_t cdw3, uint32_t cdw10,
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uint32_t cdw11, uint32_t cdw12, uint32_t cdw13, uint32_t cdw14,
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uint32_t cdw15, uint32_t data_len, void *data,
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uint32_t metadata_len, void *metadata, uint32_t timeout_ms,
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uint32_t *result)
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{
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return nvme_passthru(fd, NVME_IOCTL_ADMIN_CMD, opcode, flags, rsvd,
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nsid, cdw2, cdw3, cdw10, cdw11, cdw12, cdw13,
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cdw14, cdw15, data_len, data, metadata_len,
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metadata, timeout_ms, result);
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}
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/*-----------------------------------------*\
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| AsusAuraSMBusController.cpp |
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@@ -221,33 +282,17 @@ unsigned char XPGSpectrixS40GController::AuraRegisterRead(aura_register reg)
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void XPGSpectrixS40GController::AuraRegisterWrite(aura_register reg, unsigned char val)
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{
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struct xpg_nvme_command cfg =
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{
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.opcode = 0,
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.flags = 0,
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.rsvd = 0,
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.namespace_id = 0,
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.data_len = 0,
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.metadata_len = 0,
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.timeout = 0,
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.cdw2 = 0,
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.cdw3 = 0,
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.cdw10 = 0,
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.cdw11 = 0,
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.cdw12 = 0,
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.cdw13 = 0,
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.cdw14 = 0,
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.cdw15 = 0,
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};
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struct nvme_passthru_cmd cfg;
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memset(&cfg, 0, sizeof(nvme_passthru_cmd));
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unsigned short corrected_reg = ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF);
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cfg.opcode = 0xFB;
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cfg.namespace_id = 0x00000031;
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cfg.nsid = 0x00000031;
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cfg.cdw12 = (corrected_reg << 16) | (dev << 1);
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cfg.cdw13 = 0x01100001;
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cfg.data_len = 1;
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cfg.write = true;
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unsigned char data[1];
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@@ -259,38 +304,23 @@ void XPGSpectrixS40GController::AuraRegisterWrite(aura_register reg, unsigned ch
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/*-----------------------------------------------------------------------------*\
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| Send the command to the device |
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\*-----------------------------------------------------------------------------*/
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nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd,
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cfg.namespace_id, cfg.cdw2, cfg.cdw3, cfg.cdw10,
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nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd1,
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cfg.nsid, cfg.cdw2, cfg.cdw3, cfg.cdw10,
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cfg.cdw11, cfg.cdw12, cfg.cdw13, cfg.cdw14,
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cfg.cdw15, cfg.data_len, data, cfg.metadata_len,
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metadata, cfg.timeout, &result);
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metadata, cfg.timeout_ms, &result);
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}
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void XPGSpectrixS40GController::AuraRegisterWriteBlock(aura_register reg, unsigned char * data, unsigned char sz)
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{
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struct xpg_nvme_command cfg =
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{
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.opcode = 0,
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.flags = 0,
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.rsvd = 0,
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.namespace_id = 0,
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.data_len = 0,
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.metadata_len = 0,
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.timeout = 0,
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.cdw2 = 0,
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.cdw3 = 0,
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.cdw10 = 0,
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.cdw11 = 0,
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.cdw12 = 0,
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.cdw13 = 0,
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.cdw14 = 0,
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.cdw15 = 0,
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};
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struct nvme_passthru_cmd cfg;
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memset(&cfg, 0, sizeof(nvme_passthru_cmd));
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unsigned short corrected_reg = ((reg << 8) & 0xFF00) | ((reg >> 8) & 0x00FF);
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cfg.opcode = 0xFB;
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cfg.namespace_id = 0x00000031;
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cfg.nsid = 0x00000031;
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cfg.cdw12 = (corrected_reg << 16) | (dev << 1);
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cfg.cdw13 = 0x03100000 | sz;
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cfg.data_len = sz;
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@@ -301,10 +331,10 @@ void XPGSpectrixS40GController::AuraRegisterWriteBlock(aura_register reg, unsign
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/*-----------------------------------------------------------------------------*\
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| Send the command to the device |
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\*-----------------------------------------------------------------------------*/
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nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd,
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cfg.namespace_id, cfg.cdw2, cfg.cdw3, cfg.cdw10,
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nvme_admin_passthru(nvme_fd, cfg.opcode, cfg.flags, cfg.rsvd1,
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cfg.nsid, cfg.cdw2, cfg.cdw3, cfg.cdw10,
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cfg.cdw11, cfg.cdw12, cfg.cdw13, cfg.cdw14,
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cfg.cdw15, cfg.data_len, data, cfg.metadata_len,
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metadata, cfg.timeout, &result);
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metadata, cfg.timeout_ms, &result);
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}
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@@ -12,8 +12,6 @@
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#include <hidapi/hidapi.h>
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#include <stdint.h>
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#include "libnvme.h"
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#pragma once
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#define XPG_SPECTRIX_LED_COUNT ( 8 )
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@@ -111,25 +109,26 @@ enum
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AURA_CONFIG_CHANNEL_V2 = 0x1B, /* LED Channel V2 configuration offset */
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};
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struct xpg_nvme_command
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struct nvme_passthru_cmd
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{
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__u8 opcode;
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__u8 flags;
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__u16 rsvd;
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__u32 namespace_id;
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__u32 data_len;
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__u32 metadata_len;
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__u32 timeout;
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__u32 cdw2;
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__u32 cdw3;
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__u32 cdw10;
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__u32 cdw11;
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__u32 cdw12;
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__u32 cdw13;
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__u32 cdw14;
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__u32 cdw15;
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int read;
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int write;
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uint8_t opcode;
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uint8_t flags;
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uint16_t rsvd1;
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uint32_t nsid;
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uint32_t cdw2;
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uint32_t cdw3;
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uint64_t metadata;
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uint64_t addr;
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uint32_t metadata_len;
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uint32_t data_len;
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uint32_t cdw10;
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uint32_t cdw11;
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uint32_t cdw12;
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uint32_t cdw13;
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uint32_t cdw14;
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uint32_t cdw15;
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uint32_t timeout_ms;
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uint32_t result;
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};
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class XPGSpectrixS40GController
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@@ -1156,7 +1156,6 @@ unix:!macx {
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-lmbedx509 \
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-lmbedtls \
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-lmbedcrypto \
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-lnvme \
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COMPILER_VERSION = $$system($$QMAKE_CXX " -dumpversion")
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if (!versionAtLeast(COMPILER_VERSION, "9")) {
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